1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */
2*4882a593Smuzhiyun /* Copyright(c) 2009-2012 Realtek Corporation.*/
3*4882a593Smuzhiyun
4*4882a593Smuzhiyun #ifndef __RTL8723E_TRX_H__
5*4882a593Smuzhiyun #define __RTL8723E_TRX_H__
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #define TX_DESC_SIZE 64
8*4882a593Smuzhiyun #define TX_DESC_AGGR_SUBFRAME_SIZE 32
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun #define RX_DESC_SIZE 32
11*4882a593Smuzhiyun #define RX_DRV_INFO_SIZE_UNIT 8
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun #define TX_DESC_NEXT_DESC_OFFSET 40
14*4882a593Smuzhiyun #define USB_HWDESC_HEADER_LEN 32
15*4882a593Smuzhiyun #define CRCLENGTH 4
16*4882a593Smuzhiyun
set_tx_desc_pkt_size(__le32 * __pdesc,u32 __val)17*4882a593Smuzhiyun static inline void set_tx_desc_pkt_size(__le32 *__pdesc, u32 __val)
18*4882a593Smuzhiyun {
19*4882a593Smuzhiyun le32p_replace_bits(__pdesc, __val, GENMASK(15, 0));
20*4882a593Smuzhiyun }
21*4882a593Smuzhiyun
set_tx_desc_offset(__le32 * __pdesc,u32 __val)22*4882a593Smuzhiyun static inline void set_tx_desc_offset(__le32 *__pdesc, u32 __val)
23*4882a593Smuzhiyun {
24*4882a593Smuzhiyun le32p_replace_bits(__pdesc, __val, GENMASK(23, 16));
25*4882a593Smuzhiyun }
26*4882a593Smuzhiyun
set_tx_desc_bmc(__le32 * __pdesc,u32 __val)27*4882a593Smuzhiyun static inline void set_tx_desc_bmc(__le32 *__pdesc, u32 __val)
28*4882a593Smuzhiyun {
29*4882a593Smuzhiyun le32p_replace_bits(__pdesc, __val, BIT(24));
30*4882a593Smuzhiyun }
31*4882a593Smuzhiyun
set_tx_desc_htc(__le32 * __pdesc,u32 __val)32*4882a593Smuzhiyun static inline void set_tx_desc_htc(__le32 *__pdesc, u32 __val)
33*4882a593Smuzhiyun {
34*4882a593Smuzhiyun le32p_replace_bits(__pdesc, __val, BIT(25));
35*4882a593Smuzhiyun }
36*4882a593Smuzhiyun
set_tx_desc_last_seg(__le32 * __pdesc,u32 __val)37*4882a593Smuzhiyun static inline void set_tx_desc_last_seg(__le32 *__pdesc, u32 __val)
38*4882a593Smuzhiyun {
39*4882a593Smuzhiyun le32p_replace_bits(__pdesc, __val, BIT(26));
40*4882a593Smuzhiyun }
41*4882a593Smuzhiyun
set_tx_desc_first_seg(__le32 * __pdesc,u32 __val)42*4882a593Smuzhiyun static inline void set_tx_desc_first_seg(__le32 *__pdesc, u32 __val)
43*4882a593Smuzhiyun {
44*4882a593Smuzhiyun le32p_replace_bits(__pdesc, __val, BIT(27));
45*4882a593Smuzhiyun }
46*4882a593Smuzhiyun
set_tx_desc_linip(__le32 * __pdesc,u32 __val)47*4882a593Smuzhiyun static inline void set_tx_desc_linip(__le32 *__pdesc, u32 __val)
48*4882a593Smuzhiyun {
49*4882a593Smuzhiyun le32p_replace_bits(__pdesc, __val, BIT(28));
50*4882a593Smuzhiyun }
51*4882a593Smuzhiyun
set_tx_desc_own(__le32 * __pdesc,u32 __val)52*4882a593Smuzhiyun static inline void set_tx_desc_own(__le32 *__pdesc, u32 __val)
53*4882a593Smuzhiyun {
54*4882a593Smuzhiyun le32p_replace_bits(__pdesc, __val, BIT(31));
55*4882a593Smuzhiyun }
56*4882a593Smuzhiyun
get_tx_desc_own(__le32 * __pdesc)57*4882a593Smuzhiyun static inline u32 get_tx_desc_own(__le32 *__pdesc)
58*4882a593Smuzhiyun {
59*4882a593Smuzhiyun return le32_get_bits(*__pdesc, BIT(31));
60*4882a593Smuzhiyun }
61*4882a593Smuzhiyun
set_tx_desc_macid(__le32 * __pdesc,u32 __val)62*4882a593Smuzhiyun static inline void set_tx_desc_macid(__le32 *__pdesc, u32 __val)
63*4882a593Smuzhiyun {
64*4882a593Smuzhiyun le32p_replace_bits((__pdesc + 1), __val, GENMASK(4, 0));
65*4882a593Smuzhiyun }
66*4882a593Smuzhiyun
set_tx_desc_agg_break(__le32 * __pdesc,u32 __val)67*4882a593Smuzhiyun static inline void set_tx_desc_agg_break(__le32 *__pdesc, u32 __val)
68*4882a593Smuzhiyun {
69*4882a593Smuzhiyun le32p_replace_bits((__pdesc + 1), __val, BIT(5));
70*4882a593Smuzhiyun }
71*4882a593Smuzhiyun
set_tx_desc_rdg_enable(__le32 * __pdesc,u32 __val)72*4882a593Smuzhiyun static inline void set_tx_desc_rdg_enable(__le32 *__pdesc, u32 __val)
73*4882a593Smuzhiyun {
74*4882a593Smuzhiyun le32p_replace_bits((__pdesc + 1), __val, BIT(7));
75*4882a593Smuzhiyun }
76*4882a593Smuzhiyun
set_tx_desc_queue_sel(__le32 * __pdesc,u32 __val)77*4882a593Smuzhiyun static inline void set_tx_desc_queue_sel(__le32 *__pdesc, u32 __val)
78*4882a593Smuzhiyun {
79*4882a593Smuzhiyun le32p_replace_bits((__pdesc + 1), __val, GENMASK(12, 8));
80*4882a593Smuzhiyun }
81*4882a593Smuzhiyun
set_tx_desc_rate_id(__le32 * __pdesc,u32 __val)82*4882a593Smuzhiyun static inline void set_tx_desc_rate_id(__le32 *__pdesc, u32 __val)
83*4882a593Smuzhiyun {
84*4882a593Smuzhiyun le32p_replace_bits((__pdesc + 1), __val, GENMASK(19, 16));
85*4882a593Smuzhiyun }
86*4882a593Smuzhiyun
set_tx_desc_sec_type(__le32 * __pdesc,u32 __val)87*4882a593Smuzhiyun static inline void set_tx_desc_sec_type(__le32 *__pdesc, u32 __val)
88*4882a593Smuzhiyun {
89*4882a593Smuzhiyun le32p_replace_bits((__pdesc + 1), __val, GENMASK(23, 22));
90*4882a593Smuzhiyun }
91*4882a593Smuzhiyun
set_tx_desc_more_frag(__le32 * __pdesc,u32 __val)92*4882a593Smuzhiyun static inline void set_tx_desc_more_frag(__le32 *__pdesc, u32 __val)
93*4882a593Smuzhiyun {
94*4882a593Smuzhiyun le32p_replace_bits((__pdesc + 2), __val, BIT(17));
95*4882a593Smuzhiyun }
96*4882a593Smuzhiyun
set_tx_desc_ampdu_density(__le32 * __pdesc,u32 __val)97*4882a593Smuzhiyun static inline void set_tx_desc_ampdu_density(__le32 *__pdesc, u32 __val)
98*4882a593Smuzhiyun {
99*4882a593Smuzhiyun le32p_replace_bits((__pdesc + 2), __val, GENMASK(22, 20));
100*4882a593Smuzhiyun }
101*4882a593Smuzhiyun
set_tx_desc_seq(__le32 * __pdesc,u32 __val)102*4882a593Smuzhiyun static inline void set_tx_desc_seq(__le32 *__pdesc, u32 __val)
103*4882a593Smuzhiyun {
104*4882a593Smuzhiyun le32p_replace_bits((__pdesc + 3), __val, GENMASK(27, 16));
105*4882a593Smuzhiyun }
106*4882a593Smuzhiyun
set_tx_desc_pkt_id(__le32 * __pdesc,u32 __val)107*4882a593Smuzhiyun static inline void set_tx_desc_pkt_id(__le32 *__pdesc, u32 __val)
108*4882a593Smuzhiyun {
109*4882a593Smuzhiyun le32p_replace_bits((__pdesc + 3), __val, GENMASK(31, 28));
110*4882a593Smuzhiyun }
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun /* For RTL8723 */
set_tx_desc_hwseq_en_8723(__le32 * __pdesc,u32 __val)113*4882a593Smuzhiyun static inline void set_tx_desc_hwseq_en_8723(__le32 *__pdesc, u32 __val)
114*4882a593Smuzhiyun {
115*4882a593Smuzhiyun le32p_replace_bits((__pdesc + 3), __val, BIT(31));
116*4882a593Smuzhiyun }
117*4882a593Smuzhiyun
set_tx_desc_hwseq_sel_8723(__le32 * __txdesc,u32 __value)118*4882a593Smuzhiyun static inline void set_tx_desc_hwseq_sel_8723(__le32 *__txdesc, u32 __value)
119*4882a593Smuzhiyun {
120*4882a593Smuzhiyun le32p_replace_bits((__txdesc + 4), __value, GENMASK(7, 6));
121*4882a593Smuzhiyun }
122*4882a593Smuzhiyun
set_tx_desc_rts_rate(__le32 * __pdesc,u32 __val)123*4882a593Smuzhiyun static inline void set_tx_desc_rts_rate(__le32 *__pdesc, u32 __val)
124*4882a593Smuzhiyun {
125*4882a593Smuzhiyun le32p_replace_bits((__pdesc + 4), __val, GENMASK(4, 0));
126*4882a593Smuzhiyun }
127*4882a593Smuzhiyun
set_tx_desc_use_rate(__le32 * __pdesc,u32 __val)128*4882a593Smuzhiyun static inline void set_tx_desc_use_rate(__le32 *__pdesc, u32 __val)
129*4882a593Smuzhiyun {
130*4882a593Smuzhiyun le32p_replace_bits((__pdesc + 4), __val, BIT(8));
131*4882a593Smuzhiyun }
132*4882a593Smuzhiyun
set_tx_desc_disable_fb(__le32 * __pdesc,u32 __val)133*4882a593Smuzhiyun static inline void set_tx_desc_disable_fb(__le32 *__pdesc, u32 __val)
134*4882a593Smuzhiyun {
135*4882a593Smuzhiyun le32p_replace_bits((__pdesc + 4), __val, BIT(10));
136*4882a593Smuzhiyun }
137*4882a593Smuzhiyun
set_tx_desc_cts2self(__le32 * __pdesc,u32 __val)138*4882a593Smuzhiyun static inline void set_tx_desc_cts2self(__le32 *__pdesc, u32 __val)
139*4882a593Smuzhiyun {
140*4882a593Smuzhiyun le32p_replace_bits((__pdesc + 4), __val, BIT(11));
141*4882a593Smuzhiyun }
142*4882a593Smuzhiyun
set_tx_desc_rts_enable(__le32 * __pdesc,u32 __val)143*4882a593Smuzhiyun static inline void set_tx_desc_rts_enable(__le32 *__pdesc, u32 __val)
144*4882a593Smuzhiyun {
145*4882a593Smuzhiyun le32p_replace_bits((__pdesc + 4), __val, BIT(12));
146*4882a593Smuzhiyun }
147*4882a593Smuzhiyun
set_tx_desc_hw_rts_enable(__le32 * __pdesc,u32 __val)148*4882a593Smuzhiyun static inline void set_tx_desc_hw_rts_enable(__le32 *__pdesc, u32 __val)
149*4882a593Smuzhiyun {
150*4882a593Smuzhiyun le32p_replace_bits((__pdesc + 4), __val, BIT(13));
151*4882a593Smuzhiyun }
152*4882a593Smuzhiyun
set_tx_desc_tx_sub_carrier(__le32 * __pdesc,u32 __val)153*4882a593Smuzhiyun static inline void set_tx_desc_tx_sub_carrier(__le32 *__pdesc, u32 __val)
154*4882a593Smuzhiyun {
155*4882a593Smuzhiyun le32p_replace_bits((__pdesc + 4), __val, GENMASK(21, 20));
156*4882a593Smuzhiyun }
157*4882a593Smuzhiyun
set_tx_desc_data_bw(__le32 * __pdesc,u32 __val)158*4882a593Smuzhiyun static inline void set_tx_desc_data_bw(__le32 *__pdesc, u32 __val)
159*4882a593Smuzhiyun {
160*4882a593Smuzhiyun le32p_replace_bits((__pdesc + 4), __val, BIT(25));
161*4882a593Smuzhiyun }
162*4882a593Smuzhiyun
set_tx_desc_rts_short(__le32 * __pdesc,u32 __val)163*4882a593Smuzhiyun static inline void set_tx_desc_rts_short(__le32 *__pdesc, u32 __val)
164*4882a593Smuzhiyun {
165*4882a593Smuzhiyun le32p_replace_bits((__pdesc + 4), __val, BIT(26));
166*4882a593Smuzhiyun }
167*4882a593Smuzhiyun
set_tx_desc_rts_bw(__le32 * __pdesc,u32 __val)168*4882a593Smuzhiyun static inline void set_tx_desc_rts_bw(__le32 *__pdesc, u32 __val)
169*4882a593Smuzhiyun {
170*4882a593Smuzhiyun le32p_replace_bits((__pdesc + 4), __val, BIT(27));
171*4882a593Smuzhiyun }
172*4882a593Smuzhiyun
set_tx_desc_rts_sc(__le32 * __pdesc,u32 __val)173*4882a593Smuzhiyun static inline void set_tx_desc_rts_sc(__le32 *__pdesc, u32 __val)
174*4882a593Smuzhiyun {
175*4882a593Smuzhiyun le32p_replace_bits((__pdesc + 4), __val, GENMASK(29, 28));
176*4882a593Smuzhiyun }
177*4882a593Smuzhiyun
set_tx_desc_rts_stbc(__le32 * __pdesc,u32 __val)178*4882a593Smuzhiyun static inline void set_tx_desc_rts_stbc(__le32 *__pdesc, u32 __val)
179*4882a593Smuzhiyun {
180*4882a593Smuzhiyun le32p_replace_bits((__pdesc + 4), __val, GENMASK(31, 30));
181*4882a593Smuzhiyun }
182*4882a593Smuzhiyun
set_tx_desc_tx_rate(__le32 * __pdesc,u32 __val)183*4882a593Smuzhiyun static inline void set_tx_desc_tx_rate(__le32 *__pdesc, u32 __val)
184*4882a593Smuzhiyun {
185*4882a593Smuzhiyun le32p_replace_bits((__pdesc + 5), __val, GENMASK(5, 0));
186*4882a593Smuzhiyun }
187*4882a593Smuzhiyun
set_tx_desc_data_shortgi(__le32 * __pdesc,u32 __val)188*4882a593Smuzhiyun static inline void set_tx_desc_data_shortgi(__le32 *__pdesc, u32 __val)
189*4882a593Smuzhiyun {
190*4882a593Smuzhiyun le32p_replace_bits((__pdesc + 5), __val, BIT(6));
191*4882a593Smuzhiyun }
192*4882a593Smuzhiyun
set_tx_desc_data_rate_fb_limit(__le32 * __pdesc,u32 __val)193*4882a593Smuzhiyun static inline void set_tx_desc_data_rate_fb_limit(__le32 *__pdesc, u32 __val)
194*4882a593Smuzhiyun {
195*4882a593Smuzhiyun le32p_replace_bits((__pdesc + 5), __val, GENMASK(12, 8));
196*4882a593Smuzhiyun }
197*4882a593Smuzhiyun
set_tx_desc_rts_rate_fb_limit(__le32 * __pdesc,u32 __val)198*4882a593Smuzhiyun static inline void set_tx_desc_rts_rate_fb_limit(__le32 *__pdesc, u32 __val)
199*4882a593Smuzhiyun {
200*4882a593Smuzhiyun le32p_replace_bits((__pdesc + 5), __val, GENMASK(16, 13));
201*4882a593Smuzhiyun }
202*4882a593Smuzhiyun
set_tx_desc_max_agg_num(__le32 * __pdesc,u32 __val)203*4882a593Smuzhiyun static inline void set_tx_desc_max_agg_num(__le32 *__pdesc, u32 __val)
204*4882a593Smuzhiyun {
205*4882a593Smuzhiyun le32p_replace_bits((__pdesc + 6), __val, GENMASK(15, 11));
206*4882a593Smuzhiyun }
207*4882a593Smuzhiyun
set_tx_desc_tx_buffer_size(__le32 * __pdesc,u32 __val)208*4882a593Smuzhiyun static inline void set_tx_desc_tx_buffer_size(__le32 *__pdesc, u32 __val)
209*4882a593Smuzhiyun {
210*4882a593Smuzhiyun le32p_replace_bits((__pdesc + 7), __val, GENMASK(15, 0));
211*4882a593Smuzhiyun }
212*4882a593Smuzhiyun
set_tx_desc_tx_buffer_address(__le32 * __pdesc,u32 __val)213*4882a593Smuzhiyun static inline void set_tx_desc_tx_buffer_address(__le32 *__pdesc, u32 __val)
214*4882a593Smuzhiyun {
215*4882a593Smuzhiyun *(__pdesc + 8) = cpu_to_le32(__val);
216*4882a593Smuzhiyun }
217*4882a593Smuzhiyun
get_tx_desc_tx_buffer_address(__le32 * __pdesc)218*4882a593Smuzhiyun static inline u32 get_tx_desc_tx_buffer_address(__le32 *__pdesc)
219*4882a593Smuzhiyun {
220*4882a593Smuzhiyun return le32_to_cpu(*(__pdesc + 8));
221*4882a593Smuzhiyun }
222*4882a593Smuzhiyun
set_tx_desc_next_desc_address(__le32 * __pdesc,u32 __val)223*4882a593Smuzhiyun static inline void set_tx_desc_next_desc_address(__le32 *__pdesc, u32 __val)
224*4882a593Smuzhiyun {
225*4882a593Smuzhiyun *(__pdesc + 10) = cpu_to_le32(__val);
226*4882a593Smuzhiyun }
227*4882a593Smuzhiyun
get_rx_desc_pkt_len(__le32 * __pdesc)228*4882a593Smuzhiyun static inline u32 get_rx_desc_pkt_len(__le32 *__pdesc)
229*4882a593Smuzhiyun {
230*4882a593Smuzhiyun return le32_get_bits(*__pdesc, GENMASK(13, 0));
231*4882a593Smuzhiyun }
232*4882a593Smuzhiyun
get_rx_desc_crc32(__le32 * __pdesc)233*4882a593Smuzhiyun static inline u32 get_rx_desc_crc32(__le32 *__pdesc)
234*4882a593Smuzhiyun {
235*4882a593Smuzhiyun return le32_get_bits(*__pdesc, BIT(14));
236*4882a593Smuzhiyun }
237*4882a593Smuzhiyun
get_rx_desc_icv(__le32 * __pdesc)238*4882a593Smuzhiyun static inline u32 get_rx_desc_icv(__le32 *__pdesc)
239*4882a593Smuzhiyun {
240*4882a593Smuzhiyun return le32_get_bits(*__pdesc, BIT(15));
241*4882a593Smuzhiyun }
242*4882a593Smuzhiyun
get_rx_desc_drv_info_size(__le32 * __pdesc)243*4882a593Smuzhiyun static inline u32 get_rx_desc_drv_info_size(__le32 *__pdesc)
244*4882a593Smuzhiyun {
245*4882a593Smuzhiyun return le32_get_bits(*__pdesc, GENMASK(19, 16));
246*4882a593Smuzhiyun }
247*4882a593Smuzhiyun
get_rx_desc_shift(__le32 * __pdesc)248*4882a593Smuzhiyun static inline u32 get_rx_desc_shift(__le32 *__pdesc)
249*4882a593Smuzhiyun {
250*4882a593Smuzhiyun return le32_get_bits(*__pdesc, GENMASK(25, 24));
251*4882a593Smuzhiyun }
252*4882a593Smuzhiyun
get_rx_desc_physt(__le32 * __pdesc)253*4882a593Smuzhiyun static inline u32 get_rx_desc_physt(__le32 *__pdesc)
254*4882a593Smuzhiyun {
255*4882a593Smuzhiyun return le32_get_bits(*__pdesc, BIT(26));
256*4882a593Smuzhiyun }
257*4882a593Smuzhiyun
get_rx_desc_swdec(__le32 * __pdesc)258*4882a593Smuzhiyun static inline u32 get_rx_desc_swdec(__le32 *__pdesc)
259*4882a593Smuzhiyun {
260*4882a593Smuzhiyun return le32_get_bits(*__pdesc, BIT(27));
261*4882a593Smuzhiyun }
262*4882a593Smuzhiyun
get_rx_desc_own(__le32 * __pdesc)263*4882a593Smuzhiyun static inline u32 get_rx_desc_own(__le32 *__pdesc)
264*4882a593Smuzhiyun {
265*4882a593Smuzhiyun return le32_get_bits(*__pdesc, BIT(31));
266*4882a593Smuzhiyun }
267*4882a593Smuzhiyun
set_rx_desc_pkt_len(__le32 * __pdesc,u32 __val)268*4882a593Smuzhiyun static inline void set_rx_desc_pkt_len(__le32 *__pdesc, u32 __val)
269*4882a593Smuzhiyun {
270*4882a593Smuzhiyun le32p_replace_bits(__pdesc, __val, GENMASK(13, 0));
271*4882a593Smuzhiyun }
272*4882a593Smuzhiyun
set_rx_desc_eor(__le32 * __pdesc,u32 __val)273*4882a593Smuzhiyun static inline void set_rx_desc_eor(__le32 *__pdesc, u32 __val)
274*4882a593Smuzhiyun {
275*4882a593Smuzhiyun le32p_replace_bits(__pdesc, __val, BIT(30));
276*4882a593Smuzhiyun }
277*4882a593Smuzhiyun
set_rx_desc_own(__le32 * __pdesc,u32 __val)278*4882a593Smuzhiyun static inline void set_rx_desc_own(__le32 *__pdesc, u32 __val)
279*4882a593Smuzhiyun {
280*4882a593Smuzhiyun le32p_replace_bits(__pdesc, __val, BIT(31));
281*4882a593Smuzhiyun }
282*4882a593Smuzhiyun
get_rx_desc_paggr(__le32 * __pdesc)283*4882a593Smuzhiyun static inline u32 get_rx_desc_paggr(__le32 *__pdesc)
284*4882a593Smuzhiyun {
285*4882a593Smuzhiyun return le32_get_bits(*(__pdesc + 1), BIT(14));
286*4882a593Smuzhiyun }
287*4882a593Smuzhiyun
get_rx_desc_faggr(__le32 * __pdesc)288*4882a593Smuzhiyun static inline u32 get_rx_desc_faggr(__le32 *__pdesc)
289*4882a593Smuzhiyun {
290*4882a593Smuzhiyun return le32_get_bits(*(__pdesc + 1), BIT(15));
291*4882a593Smuzhiyun }
292*4882a593Smuzhiyun
get_rx_desc_rxmcs(__le32 * __pdesc)293*4882a593Smuzhiyun static inline u32 get_rx_desc_rxmcs(__le32 *__pdesc)
294*4882a593Smuzhiyun {
295*4882a593Smuzhiyun return le32_get_bits(*(__pdesc + 3), GENMASK(5, 0));
296*4882a593Smuzhiyun }
297*4882a593Smuzhiyun
get_rx_desc_rxht(__le32 * __pdesc)298*4882a593Smuzhiyun static inline u32 get_rx_desc_rxht(__le32 *__pdesc)
299*4882a593Smuzhiyun {
300*4882a593Smuzhiyun return le32_get_bits(*(__pdesc + 3), BIT(6));
301*4882a593Smuzhiyun }
302*4882a593Smuzhiyun
get_rx_desc_splcp(__le32 * __pdesc)303*4882a593Smuzhiyun static inline u32 get_rx_desc_splcp(__le32 *__pdesc)
304*4882a593Smuzhiyun {
305*4882a593Smuzhiyun return le32_get_bits(*(__pdesc + 3), BIT(8));
306*4882a593Smuzhiyun }
307*4882a593Smuzhiyun
get_rx_desc_bw(__le32 * __pdesc)308*4882a593Smuzhiyun static inline u32 get_rx_desc_bw(__le32 *__pdesc)
309*4882a593Smuzhiyun {
310*4882a593Smuzhiyun return le32_get_bits(*(__pdesc + 3), BIT(9));
311*4882a593Smuzhiyun }
312*4882a593Smuzhiyun
get_rx_desc_tsfl(__le32 * __pdesc)313*4882a593Smuzhiyun static inline u32 get_rx_desc_tsfl(__le32 *__pdesc)
314*4882a593Smuzhiyun {
315*4882a593Smuzhiyun return le32_to_cpu(*(__pdesc + 5));
316*4882a593Smuzhiyun }
317*4882a593Smuzhiyun
get_rx_desc_buff_addr(__le32 * __pdesc)318*4882a593Smuzhiyun static inline u32 get_rx_desc_buff_addr(__le32 *__pdesc)
319*4882a593Smuzhiyun {
320*4882a593Smuzhiyun return le32_to_cpu(*(__pdesc + 6));
321*4882a593Smuzhiyun }
322*4882a593Smuzhiyun
set_rx_desc_buff_addr(__le32 * __pdesc,u32 __val)323*4882a593Smuzhiyun static inline void set_rx_desc_buff_addr(__le32 *__pdesc, u32 __val)
324*4882a593Smuzhiyun {
325*4882a593Smuzhiyun *(__pdesc + 6) = cpu_to_le32(__val);
326*4882a593Smuzhiyun }
327*4882a593Smuzhiyun
clear_pci_tx_desc_content(__le32 * __pdesc,u32 _size)328*4882a593Smuzhiyun static inline void clear_pci_tx_desc_content(__le32 *__pdesc, u32 _size)
329*4882a593Smuzhiyun {
330*4882a593Smuzhiyun if (_size > TX_DESC_NEXT_DESC_OFFSET)
331*4882a593Smuzhiyun memset(__pdesc, 0, TX_DESC_NEXT_DESC_OFFSET);
332*4882a593Smuzhiyun else
333*4882a593Smuzhiyun memset(__pdesc, 0, _size);
334*4882a593Smuzhiyun }
335*4882a593Smuzhiyun
336*4882a593Smuzhiyun struct rx_fwinfo_8723e {
337*4882a593Smuzhiyun u8 gain_trsw[4];
338*4882a593Smuzhiyun u8 pwdb_all;
339*4882a593Smuzhiyun u8 cfosho[4];
340*4882a593Smuzhiyun u8 cfotail[4];
341*4882a593Smuzhiyun s8 rxevm[2];
342*4882a593Smuzhiyun s8 rxsnr[4];
343*4882a593Smuzhiyun u8 pdsnr[2];
344*4882a593Smuzhiyun u8 csi_current[2];
345*4882a593Smuzhiyun u8 csi_target[2];
346*4882a593Smuzhiyun u8 sigevm;
347*4882a593Smuzhiyun u8 max_ex_pwr;
348*4882a593Smuzhiyun u8 ex_intf_flag:1;
349*4882a593Smuzhiyun u8 sgi_en:1;
350*4882a593Smuzhiyun u8 rxsc:2;
351*4882a593Smuzhiyun u8 reserve:4;
352*4882a593Smuzhiyun } __packed;
353*4882a593Smuzhiyun
354*4882a593Smuzhiyun struct tx_desc_8723e {
355*4882a593Smuzhiyun u32 pktsize:16;
356*4882a593Smuzhiyun u32 offset:8;
357*4882a593Smuzhiyun u32 bmc:1;
358*4882a593Smuzhiyun u32 htc:1;
359*4882a593Smuzhiyun u32 lastseg:1;
360*4882a593Smuzhiyun u32 firstseg:1;
361*4882a593Smuzhiyun u32 linip:1;
362*4882a593Smuzhiyun u32 noacm:1;
363*4882a593Smuzhiyun u32 gf:1;
364*4882a593Smuzhiyun u32 own:1;
365*4882a593Smuzhiyun
366*4882a593Smuzhiyun u32 macid:5;
367*4882a593Smuzhiyun u32 agg_en:1;
368*4882a593Smuzhiyun u32 bk:1;
369*4882a593Smuzhiyun u32 rdg_en:1;
370*4882a593Smuzhiyun u32 queuesel:5;
371*4882a593Smuzhiyun u32 rd_nav_ext:1;
372*4882a593Smuzhiyun u32 lsig_txop_en:1;
373*4882a593Smuzhiyun u32 pifs:1;
374*4882a593Smuzhiyun u32 rateid:4;
375*4882a593Smuzhiyun u32 nav_usehdr:1;
376*4882a593Smuzhiyun u32 en_descid:1;
377*4882a593Smuzhiyun u32 sectype:2;
378*4882a593Smuzhiyun u32 pktoffset:8;
379*4882a593Smuzhiyun
380*4882a593Smuzhiyun u32 rts_rc:6;
381*4882a593Smuzhiyun u32 data_rc:6;
382*4882a593Smuzhiyun u32 rsvd0:2;
383*4882a593Smuzhiyun u32 bar_retryht:2;
384*4882a593Smuzhiyun u32 rsvd1:1;
385*4882a593Smuzhiyun u32 morefrag:1;
386*4882a593Smuzhiyun u32 raw:1;
387*4882a593Smuzhiyun u32 ccx:1;
388*4882a593Smuzhiyun u32 ampdudensity:3;
389*4882a593Smuzhiyun u32 rsvd2:1;
390*4882a593Smuzhiyun u32 ant_sela:1;
391*4882a593Smuzhiyun u32 ant_selb:1;
392*4882a593Smuzhiyun u32 txant_cck:2;
393*4882a593Smuzhiyun u32 txant_l:2;
394*4882a593Smuzhiyun u32 txant_ht:2;
395*4882a593Smuzhiyun
396*4882a593Smuzhiyun u32 nextheadpage:8;
397*4882a593Smuzhiyun u32 tailpage:8;
398*4882a593Smuzhiyun u32 seq:12;
399*4882a593Smuzhiyun u32 pktid:4;
400*4882a593Smuzhiyun
401*4882a593Smuzhiyun u32 rtsrate:5;
402*4882a593Smuzhiyun u32 apdcfe:1;
403*4882a593Smuzhiyun u32 qos:1;
404*4882a593Smuzhiyun u32 hwseq_enable:1;
405*4882a593Smuzhiyun u32 userrate:1;
406*4882a593Smuzhiyun u32 dis_rtsfb:1;
407*4882a593Smuzhiyun u32 dis_datafb:1;
408*4882a593Smuzhiyun u32 cts2self:1;
409*4882a593Smuzhiyun u32 rts_en:1;
410*4882a593Smuzhiyun u32 hwrts_en:1;
411*4882a593Smuzhiyun u32 portid:1;
412*4882a593Smuzhiyun u32 rsvd3:3;
413*4882a593Smuzhiyun u32 waitdcts:1;
414*4882a593Smuzhiyun u32 cts2ap_en:1;
415*4882a593Smuzhiyun u32 txsc:2;
416*4882a593Smuzhiyun u32 stbc:2;
417*4882a593Smuzhiyun u32 txshort:1;
418*4882a593Smuzhiyun u32 txbw:1;
419*4882a593Smuzhiyun u32 rtsshort:1;
420*4882a593Smuzhiyun u32 rtsbw:1;
421*4882a593Smuzhiyun u32 rtssc:2;
422*4882a593Smuzhiyun u32 rtsstbc:2;
423*4882a593Smuzhiyun
424*4882a593Smuzhiyun u32 txrate:6;
425*4882a593Smuzhiyun u32 shortgi:1;
426*4882a593Smuzhiyun u32 ccxt:1;
427*4882a593Smuzhiyun u32 txrate_fb_lmt:5;
428*4882a593Smuzhiyun u32 rtsrate_fb_lmt:4;
429*4882a593Smuzhiyun u32 retrylmt_en:1;
430*4882a593Smuzhiyun u32 txretrylmt:6;
431*4882a593Smuzhiyun u32 usb_txaggnum:8;
432*4882a593Smuzhiyun
433*4882a593Smuzhiyun u32 txagca:5;
434*4882a593Smuzhiyun u32 txagcb:5;
435*4882a593Smuzhiyun u32 usemaxlen:1;
436*4882a593Smuzhiyun u32 maxaggnum:5;
437*4882a593Smuzhiyun u32 mcsg1maxlen:4;
438*4882a593Smuzhiyun u32 mcsg2maxlen:4;
439*4882a593Smuzhiyun u32 mcsg3maxlen:4;
440*4882a593Smuzhiyun u32 mcs7sgimaxlen:4;
441*4882a593Smuzhiyun
442*4882a593Smuzhiyun u32 txbuffersize:16;
443*4882a593Smuzhiyun u32 mcsg4maxlen:4;
444*4882a593Smuzhiyun u32 mcsg5maxlen:4;
445*4882a593Smuzhiyun u32 mcsg6maxlen:4;
446*4882a593Smuzhiyun u32 mcsg15sgimaxlen:4;
447*4882a593Smuzhiyun
448*4882a593Smuzhiyun u32 txbuffaddr;
449*4882a593Smuzhiyun u32 txbufferaddr64;
450*4882a593Smuzhiyun u32 nextdescaddress;
451*4882a593Smuzhiyun u32 nextdescaddress64;
452*4882a593Smuzhiyun
453*4882a593Smuzhiyun u32 reserve_pass_pcie_mm_limit[4];
454*4882a593Smuzhiyun } __packed;
455*4882a593Smuzhiyun
456*4882a593Smuzhiyun struct rx_desc_8723e {
457*4882a593Smuzhiyun u32 length:14;
458*4882a593Smuzhiyun u32 crc32:1;
459*4882a593Smuzhiyun u32 icverror:1;
460*4882a593Smuzhiyun u32 drv_infosize:4;
461*4882a593Smuzhiyun u32 security:3;
462*4882a593Smuzhiyun u32 qos:1;
463*4882a593Smuzhiyun u32 shift:2;
464*4882a593Smuzhiyun u32 phystatus:1;
465*4882a593Smuzhiyun u32 swdec:1;
466*4882a593Smuzhiyun u32 lastseg:1;
467*4882a593Smuzhiyun u32 firstseg:1;
468*4882a593Smuzhiyun u32 eor:1;
469*4882a593Smuzhiyun u32 own:1;
470*4882a593Smuzhiyun
471*4882a593Smuzhiyun u32 macid:5;
472*4882a593Smuzhiyun u32 tid:4;
473*4882a593Smuzhiyun u32 hwrsvd:5;
474*4882a593Smuzhiyun u32 paggr:1;
475*4882a593Smuzhiyun u32 faggr:1;
476*4882a593Smuzhiyun u32 a1_fit:4;
477*4882a593Smuzhiyun u32 a2_fit:4;
478*4882a593Smuzhiyun u32 pam:1;
479*4882a593Smuzhiyun u32 pwr:1;
480*4882a593Smuzhiyun u32 moredata:1;
481*4882a593Smuzhiyun u32 morefrag:1;
482*4882a593Smuzhiyun u32 type:2;
483*4882a593Smuzhiyun u32 mc:1;
484*4882a593Smuzhiyun u32 bc:1;
485*4882a593Smuzhiyun
486*4882a593Smuzhiyun u32 seq:12;
487*4882a593Smuzhiyun u32 frag:4;
488*4882a593Smuzhiyun u32 nextpktlen:14;
489*4882a593Smuzhiyun u32 nextind:1;
490*4882a593Smuzhiyun u32 rsvd:1;
491*4882a593Smuzhiyun
492*4882a593Smuzhiyun u32 rxmcs:6;
493*4882a593Smuzhiyun u32 rxht:1;
494*4882a593Smuzhiyun u32 amsdu:1;
495*4882a593Smuzhiyun u32 splcp:1;
496*4882a593Smuzhiyun u32 bandwidth:1;
497*4882a593Smuzhiyun u32 htc:1;
498*4882a593Smuzhiyun u32 tcpchk_rpt:1;
499*4882a593Smuzhiyun u32 ipcchk_rpt:1;
500*4882a593Smuzhiyun u32 tcpchk_valid:1;
501*4882a593Smuzhiyun u32 hwpcerr:1;
502*4882a593Smuzhiyun u32 hwpcind:1;
503*4882a593Smuzhiyun u32 iv0:16;
504*4882a593Smuzhiyun
505*4882a593Smuzhiyun u32 iv1;
506*4882a593Smuzhiyun
507*4882a593Smuzhiyun u32 tsfl;
508*4882a593Smuzhiyun
509*4882a593Smuzhiyun u32 bufferaddress;
510*4882a593Smuzhiyun u32 bufferaddress64;
511*4882a593Smuzhiyun
512*4882a593Smuzhiyun } __packed;
513*4882a593Smuzhiyun
514*4882a593Smuzhiyun void rtl8723e_tx_fill_desc(struct ieee80211_hw *hw,
515*4882a593Smuzhiyun struct ieee80211_hdr *hdr,
516*4882a593Smuzhiyun u8 *pdesc, u8 *txbd,
517*4882a593Smuzhiyun struct ieee80211_tx_info *info,
518*4882a593Smuzhiyun struct ieee80211_sta *sta,
519*4882a593Smuzhiyun struct sk_buff *skb, u8 hw_queue,
520*4882a593Smuzhiyun struct rtl_tcb_desc *ptcb_desc);
521*4882a593Smuzhiyun bool rtl8723e_rx_query_desc(struct ieee80211_hw *hw,
522*4882a593Smuzhiyun struct rtl_stats *status,
523*4882a593Smuzhiyun struct ieee80211_rx_status *rx_status,
524*4882a593Smuzhiyun u8 *pdesc, struct sk_buff *skb);
525*4882a593Smuzhiyun void rtl8723e_set_desc(struct ieee80211_hw *hw,
526*4882a593Smuzhiyun u8 *pdesc, bool istx, u8 desc_name, u8 *val);
527*4882a593Smuzhiyun u64 rtl8723e_get_desc(struct ieee80211_hw *hw,
528*4882a593Smuzhiyun u8 *pdesc, bool istx, u8 desc_name);
529*4882a593Smuzhiyun bool rtl8723e_is_tx_desc_closed(struct ieee80211_hw *hw,
530*4882a593Smuzhiyun u8 hw_queue, u16 index);
531*4882a593Smuzhiyun void rtl8723e_tx_polling(struct ieee80211_hw *hw, u8 hw_queue);
532*4882a593Smuzhiyun void rtl8723e_tx_fill_cmddesc(struct ieee80211_hw *hw, u8 *pdesc,
533*4882a593Smuzhiyun bool firstseg, bool lastseg,
534*4882a593Smuzhiyun struct sk_buff *skb);
535*4882a593Smuzhiyun #endif
536