1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /* Copyright(c) 2009-2012 Realtek Corporation.*/
3*4882a593Smuzhiyun
4*4882a593Smuzhiyun #include "../wifi.h"
5*4882a593Smuzhiyun #include "../pci.h"
6*4882a593Smuzhiyun #include "../base.h"
7*4882a593Smuzhiyun #include "../stats.h"
8*4882a593Smuzhiyun #include "reg.h"
9*4882a593Smuzhiyun #include "def.h"
10*4882a593Smuzhiyun #include "phy.h"
11*4882a593Smuzhiyun #include "fw.h"
12*4882a593Smuzhiyun #include "trx.h"
13*4882a593Smuzhiyun #include "led.h"
14*4882a593Smuzhiyun
_rtl92se_map_hwqueue_to_fwqueue(struct sk_buff * skb,u8 skb_queue)15*4882a593Smuzhiyun static u8 _rtl92se_map_hwqueue_to_fwqueue(struct sk_buff *skb, u8 skb_queue)
16*4882a593Smuzhiyun {
17*4882a593Smuzhiyun __le16 fc = rtl_get_fc(skb);
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun if (unlikely(ieee80211_is_beacon(fc)))
20*4882a593Smuzhiyun return QSLT_BEACON;
21*4882a593Smuzhiyun if (ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc))
22*4882a593Smuzhiyun return QSLT_MGNT;
23*4882a593Smuzhiyun if (ieee80211_is_nullfunc(fc))
24*4882a593Smuzhiyun return QSLT_HIGH;
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun /* Kernel commit 1bf4bbb4024dcdab changed EAPOL packets to use
27*4882a593Smuzhiyun * queue V0 at priority 7; however, the RTL8192SE appears to have
28*4882a593Smuzhiyun * that queue at priority 6
29*4882a593Smuzhiyun */
30*4882a593Smuzhiyun if (skb->priority == 7)
31*4882a593Smuzhiyun return QSLT_VO;
32*4882a593Smuzhiyun return skb->priority;
33*4882a593Smuzhiyun }
34*4882a593Smuzhiyun
_rtl92se_query_rxphystatus(struct ieee80211_hw * hw,struct rtl_stats * pstats,__le32 * pdesc,struct rx_fwinfo * p_drvinfo,bool packet_match_bssid,bool packet_toself,bool packet_beacon)35*4882a593Smuzhiyun static void _rtl92se_query_rxphystatus(struct ieee80211_hw *hw,
36*4882a593Smuzhiyun struct rtl_stats *pstats, __le32 *pdesc,
37*4882a593Smuzhiyun struct rx_fwinfo *p_drvinfo,
38*4882a593Smuzhiyun bool packet_match_bssid,
39*4882a593Smuzhiyun bool packet_toself,
40*4882a593Smuzhiyun bool packet_beacon)
41*4882a593Smuzhiyun {
42*4882a593Smuzhiyun struct rtl_priv *rtlpriv = rtl_priv(hw);
43*4882a593Smuzhiyun struct phy_sts_cck_8192s_t *cck_buf;
44*4882a593Smuzhiyun struct rtl_ps_ctl *ppsc = rtl_psc(rtlpriv);
45*4882a593Smuzhiyun s8 rx_pwr_all = 0, rx_pwr[4];
46*4882a593Smuzhiyun u8 rf_rx_num = 0, evm, pwdb_all;
47*4882a593Smuzhiyun u8 i, max_spatial_stream;
48*4882a593Smuzhiyun u32 rssi, total_rssi = 0;
49*4882a593Smuzhiyun bool is_cck = pstats->is_cck;
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun pstats->packet_matchbssid = packet_match_bssid;
52*4882a593Smuzhiyun pstats->packet_toself = packet_toself;
53*4882a593Smuzhiyun pstats->packet_beacon = packet_beacon;
54*4882a593Smuzhiyun pstats->rx_mimo_sig_qual[0] = -1;
55*4882a593Smuzhiyun pstats->rx_mimo_sig_qual[1] = -1;
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun if (is_cck) {
58*4882a593Smuzhiyun u8 report, cck_highpwr;
59*4882a593Smuzhiyun cck_buf = (struct phy_sts_cck_8192s_t *)p_drvinfo;
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun if (ppsc->rfpwr_state == ERFON)
62*4882a593Smuzhiyun cck_highpwr = (u8) rtl_get_bbreg(hw,
63*4882a593Smuzhiyun RFPGA0_XA_HSSIPARAMETER2,
64*4882a593Smuzhiyun 0x200);
65*4882a593Smuzhiyun else
66*4882a593Smuzhiyun cck_highpwr = false;
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun if (!cck_highpwr) {
69*4882a593Smuzhiyun u8 cck_agc_rpt = cck_buf->cck_agc_rpt;
70*4882a593Smuzhiyun report = cck_buf->cck_agc_rpt & 0xc0;
71*4882a593Smuzhiyun report = report >> 6;
72*4882a593Smuzhiyun switch (report) {
73*4882a593Smuzhiyun case 0x3:
74*4882a593Smuzhiyun rx_pwr_all = -40 - (cck_agc_rpt & 0x3e);
75*4882a593Smuzhiyun break;
76*4882a593Smuzhiyun case 0x2:
77*4882a593Smuzhiyun rx_pwr_all = -20 - (cck_agc_rpt & 0x3e);
78*4882a593Smuzhiyun break;
79*4882a593Smuzhiyun case 0x1:
80*4882a593Smuzhiyun rx_pwr_all = -2 - (cck_agc_rpt & 0x3e);
81*4882a593Smuzhiyun break;
82*4882a593Smuzhiyun case 0x0:
83*4882a593Smuzhiyun rx_pwr_all = 14 - (cck_agc_rpt & 0x3e);
84*4882a593Smuzhiyun break;
85*4882a593Smuzhiyun }
86*4882a593Smuzhiyun } else {
87*4882a593Smuzhiyun u8 cck_agc_rpt = cck_buf->cck_agc_rpt;
88*4882a593Smuzhiyun report = p_drvinfo->cfosho[0] & 0x60;
89*4882a593Smuzhiyun report = report >> 5;
90*4882a593Smuzhiyun switch (report) {
91*4882a593Smuzhiyun case 0x3:
92*4882a593Smuzhiyun rx_pwr_all = -40 - ((cck_agc_rpt & 0x1f) << 1);
93*4882a593Smuzhiyun break;
94*4882a593Smuzhiyun case 0x2:
95*4882a593Smuzhiyun rx_pwr_all = -20 - ((cck_agc_rpt & 0x1f) << 1);
96*4882a593Smuzhiyun break;
97*4882a593Smuzhiyun case 0x1:
98*4882a593Smuzhiyun rx_pwr_all = -2 - ((cck_agc_rpt & 0x1f) << 1);
99*4882a593Smuzhiyun break;
100*4882a593Smuzhiyun case 0x0:
101*4882a593Smuzhiyun rx_pwr_all = 14 - ((cck_agc_rpt & 0x1f) << 1);
102*4882a593Smuzhiyun break;
103*4882a593Smuzhiyun }
104*4882a593Smuzhiyun }
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all);
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun /* CCK gain is smaller than OFDM/MCS gain, */
109*4882a593Smuzhiyun /* so we add gain diff by experiences, the val is 6 */
110*4882a593Smuzhiyun pwdb_all += 6;
111*4882a593Smuzhiyun if (pwdb_all > 100)
112*4882a593Smuzhiyun pwdb_all = 100;
113*4882a593Smuzhiyun /* modify the offset to make the same gain index with OFDM. */
114*4882a593Smuzhiyun if (pwdb_all > 34 && pwdb_all <= 42)
115*4882a593Smuzhiyun pwdb_all -= 2;
116*4882a593Smuzhiyun else if (pwdb_all > 26 && pwdb_all <= 34)
117*4882a593Smuzhiyun pwdb_all -= 6;
118*4882a593Smuzhiyun else if (pwdb_all > 14 && pwdb_all <= 26)
119*4882a593Smuzhiyun pwdb_all -= 8;
120*4882a593Smuzhiyun else if (pwdb_all > 4 && pwdb_all <= 14)
121*4882a593Smuzhiyun pwdb_all -= 4;
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun pstats->rx_pwdb_all = pwdb_all;
124*4882a593Smuzhiyun pstats->recvsignalpower = rx_pwr_all;
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun if (packet_match_bssid) {
127*4882a593Smuzhiyun u8 sq;
128*4882a593Smuzhiyun if (pstats->rx_pwdb_all > 40) {
129*4882a593Smuzhiyun sq = 100;
130*4882a593Smuzhiyun } else {
131*4882a593Smuzhiyun sq = cck_buf->sq_rpt;
132*4882a593Smuzhiyun if (sq > 64)
133*4882a593Smuzhiyun sq = 0;
134*4882a593Smuzhiyun else if (sq < 20)
135*4882a593Smuzhiyun sq = 100;
136*4882a593Smuzhiyun else
137*4882a593Smuzhiyun sq = ((64 - sq) * 100) / 44;
138*4882a593Smuzhiyun }
139*4882a593Smuzhiyun
140*4882a593Smuzhiyun pstats->signalquality = sq;
141*4882a593Smuzhiyun pstats->rx_mimo_sig_qual[0] = sq;
142*4882a593Smuzhiyun pstats->rx_mimo_sig_qual[1] = -1;
143*4882a593Smuzhiyun }
144*4882a593Smuzhiyun } else {
145*4882a593Smuzhiyun rtlpriv->dm.rfpath_rxenable[0] =
146*4882a593Smuzhiyun rtlpriv->dm.rfpath_rxenable[1] = true;
147*4882a593Smuzhiyun for (i = RF90_PATH_A; i < RF6052_MAX_PATH; i++) {
148*4882a593Smuzhiyun if (rtlpriv->dm.rfpath_rxenable[i])
149*4882a593Smuzhiyun rf_rx_num++;
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun rx_pwr[i] = ((p_drvinfo->gain_trsw[i] &
152*4882a593Smuzhiyun 0x3f) * 2) - 110;
153*4882a593Smuzhiyun rssi = rtl_query_rxpwrpercentage(rx_pwr[i]);
154*4882a593Smuzhiyun total_rssi += rssi;
155*4882a593Smuzhiyun rtlpriv->stats.rx_snr_db[i] =
156*4882a593Smuzhiyun (long)(p_drvinfo->rxsnr[i] / 2);
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun if (packet_match_bssid)
159*4882a593Smuzhiyun pstats->rx_mimo_signalstrength[i] = (u8) rssi;
160*4882a593Smuzhiyun }
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun rx_pwr_all = ((p_drvinfo->pwdb_all >> 1) & 0x7f) - 110;
163*4882a593Smuzhiyun pwdb_all = rtl_query_rxpwrpercentage(rx_pwr_all);
164*4882a593Smuzhiyun pstats->rx_pwdb_all = pwdb_all;
165*4882a593Smuzhiyun pstats->rxpower = rx_pwr_all;
166*4882a593Smuzhiyun pstats->recvsignalpower = rx_pwr_all;
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun if (pstats->is_ht && pstats->rate >= DESC_RATEMCS8 &&
169*4882a593Smuzhiyun pstats->rate <= DESC_RATEMCS15)
170*4882a593Smuzhiyun max_spatial_stream = 2;
171*4882a593Smuzhiyun else
172*4882a593Smuzhiyun max_spatial_stream = 1;
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun for (i = 0; i < max_spatial_stream; i++) {
175*4882a593Smuzhiyun evm = rtl_evm_db_to_percentage(p_drvinfo->rxevm[i]);
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun if (packet_match_bssid) {
178*4882a593Smuzhiyun if (i == 0)
179*4882a593Smuzhiyun pstats->signalquality = (u8)(evm &
180*4882a593Smuzhiyun 0xff);
181*4882a593Smuzhiyun pstats->rx_mimo_sig_qual[i] = (u8) (evm & 0xff);
182*4882a593Smuzhiyun }
183*4882a593Smuzhiyun }
184*4882a593Smuzhiyun }
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun if (is_cck)
187*4882a593Smuzhiyun pstats->signalstrength = (u8)(rtl_signal_scale_mapping(hw,
188*4882a593Smuzhiyun pwdb_all));
189*4882a593Smuzhiyun else if (rf_rx_num != 0)
190*4882a593Smuzhiyun pstats->signalstrength = (u8) (rtl_signal_scale_mapping(hw,
191*4882a593Smuzhiyun total_rssi /= rf_rx_num));
192*4882a593Smuzhiyun }
193*4882a593Smuzhiyun
_rtl92se_translate_rx_signal_stuff(struct ieee80211_hw * hw,struct sk_buff * skb,struct rtl_stats * pstats,__le32 * pdesc,struct rx_fwinfo * p_drvinfo)194*4882a593Smuzhiyun static void _rtl92se_translate_rx_signal_stuff(struct ieee80211_hw *hw,
195*4882a593Smuzhiyun struct sk_buff *skb, struct rtl_stats *pstats,
196*4882a593Smuzhiyun __le32 *pdesc, struct rx_fwinfo *p_drvinfo)
197*4882a593Smuzhiyun {
198*4882a593Smuzhiyun struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
199*4882a593Smuzhiyun struct rtl_efuse *rtlefuse = rtl_efuse(rtl_priv(hw));
200*4882a593Smuzhiyun struct ieee80211_hdr *hdr;
201*4882a593Smuzhiyun u8 *tmp_buf;
202*4882a593Smuzhiyun u8 *praddr;
203*4882a593Smuzhiyun __le16 fc;
204*4882a593Smuzhiyun u16 type, cfc;
205*4882a593Smuzhiyun bool packet_matchbssid, packet_toself, packet_beacon = false;
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun tmp_buf = skb->data + pstats->rx_drvinfo_size + pstats->rx_bufshift;
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun hdr = (struct ieee80211_hdr *)tmp_buf;
210*4882a593Smuzhiyun fc = hdr->frame_control;
211*4882a593Smuzhiyun cfc = le16_to_cpu(fc);
212*4882a593Smuzhiyun type = WLAN_FC_GET_TYPE(fc);
213*4882a593Smuzhiyun praddr = hdr->addr1;
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun packet_matchbssid = ((IEEE80211_FTYPE_CTL != type) &&
216*4882a593Smuzhiyun ether_addr_equal(mac->bssid,
217*4882a593Smuzhiyun (cfc & IEEE80211_FCTL_TODS) ? hdr->addr1 :
218*4882a593Smuzhiyun (cfc & IEEE80211_FCTL_FROMDS) ? hdr->addr2 :
219*4882a593Smuzhiyun hdr->addr3) &&
220*4882a593Smuzhiyun (!pstats->hwerror) && (!pstats->crc) && (!pstats->icv));
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun packet_toself = packet_matchbssid &&
223*4882a593Smuzhiyun ether_addr_equal(praddr, rtlefuse->dev_addr);
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun if (ieee80211_is_beacon(fc))
226*4882a593Smuzhiyun packet_beacon = true;
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun _rtl92se_query_rxphystatus(hw, pstats, pdesc, p_drvinfo,
229*4882a593Smuzhiyun packet_matchbssid, packet_toself, packet_beacon);
230*4882a593Smuzhiyun rtl_process_phyinfo(hw, tmp_buf, pstats);
231*4882a593Smuzhiyun }
232*4882a593Smuzhiyun
rtl92se_rx_query_desc(struct ieee80211_hw * hw,struct rtl_stats * stats,struct ieee80211_rx_status * rx_status,u8 * pdesc8,struct sk_buff * skb)233*4882a593Smuzhiyun bool rtl92se_rx_query_desc(struct ieee80211_hw *hw, struct rtl_stats *stats,
234*4882a593Smuzhiyun struct ieee80211_rx_status *rx_status, u8 *pdesc8,
235*4882a593Smuzhiyun struct sk_buff *skb)
236*4882a593Smuzhiyun {
237*4882a593Smuzhiyun struct rx_fwinfo *p_drvinfo;
238*4882a593Smuzhiyun __le32 *pdesc = (__le32 *)pdesc8;
239*4882a593Smuzhiyun u32 phystatus = (u32)get_rx_status_desc_phy_status(pdesc);
240*4882a593Smuzhiyun struct ieee80211_hdr *hdr;
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun stats->length = (u16)get_rx_status_desc_pkt_len(pdesc);
243*4882a593Smuzhiyun stats->rx_drvinfo_size = (u8)get_rx_status_desc_drvinfo_size(pdesc) * 8;
244*4882a593Smuzhiyun stats->rx_bufshift = (u8)(get_rx_status_desc_shift(pdesc) & 0x03);
245*4882a593Smuzhiyun stats->icv = (u16)get_rx_status_desc_icv(pdesc);
246*4882a593Smuzhiyun stats->crc = (u16)get_rx_status_desc_crc32(pdesc);
247*4882a593Smuzhiyun stats->hwerror = (u16)(stats->crc | stats->icv);
248*4882a593Smuzhiyun stats->decrypted = !get_rx_status_desc_swdec(pdesc);
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun stats->rate = (u8)get_rx_status_desc_rx_mcs(pdesc);
251*4882a593Smuzhiyun stats->shortpreamble = (u16)get_rx_status_desc_splcp(pdesc);
252*4882a593Smuzhiyun stats->isampdu = (bool)(get_rx_status_desc_paggr(pdesc) == 1);
253*4882a593Smuzhiyun stats->isfirst_ampdu = (bool)((get_rx_status_desc_paggr(pdesc) == 1) &&
254*4882a593Smuzhiyun (get_rx_status_desc_faggr(pdesc) == 1));
255*4882a593Smuzhiyun stats->timestamp_low = get_rx_status_desc_tsfl(pdesc);
256*4882a593Smuzhiyun stats->rx_is40mhzpacket = (bool)get_rx_status_desc_bw(pdesc);
257*4882a593Smuzhiyun stats->is_ht = (bool)get_rx_status_desc_rx_ht(pdesc);
258*4882a593Smuzhiyun stats->is_cck = SE_RX_HAL_IS_CCK_RATE(pdesc);
259*4882a593Smuzhiyun
260*4882a593Smuzhiyun if (stats->hwerror)
261*4882a593Smuzhiyun return false;
262*4882a593Smuzhiyun
263*4882a593Smuzhiyun rx_status->freq = hw->conf.chandef.chan->center_freq;
264*4882a593Smuzhiyun rx_status->band = hw->conf.chandef.chan->band;
265*4882a593Smuzhiyun
266*4882a593Smuzhiyun if (stats->crc)
267*4882a593Smuzhiyun rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
268*4882a593Smuzhiyun
269*4882a593Smuzhiyun if (stats->rx_is40mhzpacket)
270*4882a593Smuzhiyun rx_status->bw = RATE_INFO_BW_40;
271*4882a593Smuzhiyun
272*4882a593Smuzhiyun if (stats->is_ht)
273*4882a593Smuzhiyun rx_status->encoding = RX_ENC_HT;
274*4882a593Smuzhiyun
275*4882a593Smuzhiyun rx_status->flag |= RX_FLAG_MACTIME_START;
276*4882a593Smuzhiyun
277*4882a593Smuzhiyun /* hw will set stats->decrypted true, if it finds the
278*4882a593Smuzhiyun * frame is open data frame or mgmt frame,
279*4882a593Smuzhiyun * hw will not decrypt robust managment frame
280*4882a593Smuzhiyun * for IEEE80211w but still set stats->decrypted
281*4882a593Smuzhiyun * true, so here we should set it back to undecrypted
282*4882a593Smuzhiyun * for IEEE80211w frame, and mac80211 sw will help
283*4882a593Smuzhiyun * to decrypt it */
284*4882a593Smuzhiyun if (stats->decrypted) {
285*4882a593Smuzhiyun hdr = (struct ieee80211_hdr *)(skb->data +
286*4882a593Smuzhiyun stats->rx_drvinfo_size + stats->rx_bufshift);
287*4882a593Smuzhiyun
288*4882a593Smuzhiyun if ((_ieee80211_is_robust_mgmt_frame(hdr)) &&
289*4882a593Smuzhiyun (ieee80211_has_protected(hdr->frame_control)))
290*4882a593Smuzhiyun rx_status->flag &= ~RX_FLAG_DECRYPTED;
291*4882a593Smuzhiyun else
292*4882a593Smuzhiyun rx_status->flag |= RX_FLAG_DECRYPTED;
293*4882a593Smuzhiyun }
294*4882a593Smuzhiyun
295*4882a593Smuzhiyun rx_status->rate_idx = rtlwifi_rate_mapping(hw, stats->is_ht,
296*4882a593Smuzhiyun false, stats->rate);
297*4882a593Smuzhiyun
298*4882a593Smuzhiyun rx_status->mactime = stats->timestamp_low;
299*4882a593Smuzhiyun if (phystatus) {
300*4882a593Smuzhiyun p_drvinfo = (struct rx_fwinfo *)(skb->data +
301*4882a593Smuzhiyun stats->rx_bufshift);
302*4882a593Smuzhiyun _rtl92se_translate_rx_signal_stuff(hw, skb, stats, pdesc,
303*4882a593Smuzhiyun p_drvinfo);
304*4882a593Smuzhiyun }
305*4882a593Smuzhiyun
306*4882a593Smuzhiyun /*rx_status->qual = stats->signal; */
307*4882a593Smuzhiyun rx_status->signal = stats->recvsignalpower + 10;
308*4882a593Smuzhiyun
309*4882a593Smuzhiyun return true;
310*4882a593Smuzhiyun }
311*4882a593Smuzhiyun
rtl92se_tx_fill_desc(struct ieee80211_hw * hw,struct ieee80211_hdr * hdr,u8 * pdesc8,u8 * pbd_desc_tx,struct ieee80211_tx_info * info,struct ieee80211_sta * sta,struct sk_buff * skb,u8 hw_queue,struct rtl_tcb_desc * ptcb_desc)312*4882a593Smuzhiyun void rtl92se_tx_fill_desc(struct ieee80211_hw *hw,
313*4882a593Smuzhiyun struct ieee80211_hdr *hdr, u8 *pdesc8,
314*4882a593Smuzhiyun u8 *pbd_desc_tx, struct ieee80211_tx_info *info,
315*4882a593Smuzhiyun struct ieee80211_sta *sta,
316*4882a593Smuzhiyun struct sk_buff *skb,
317*4882a593Smuzhiyun u8 hw_queue, struct rtl_tcb_desc *ptcb_desc)
318*4882a593Smuzhiyun {
319*4882a593Smuzhiyun struct rtl_priv *rtlpriv = rtl_priv(hw);
320*4882a593Smuzhiyun struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
321*4882a593Smuzhiyun struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
322*4882a593Smuzhiyun struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
323*4882a593Smuzhiyun __le32 *pdesc = (__le32 *)pdesc8;
324*4882a593Smuzhiyun u16 seq_number;
325*4882a593Smuzhiyun __le16 fc = hdr->frame_control;
326*4882a593Smuzhiyun u8 reserved_macid = 0;
327*4882a593Smuzhiyun u8 fw_qsel = _rtl92se_map_hwqueue_to_fwqueue(skb, hw_queue);
328*4882a593Smuzhiyun bool firstseg = (!(hdr->seq_ctrl & cpu_to_le16(IEEE80211_SCTL_FRAG)));
329*4882a593Smuzhiyun bool lastseg = (!(hdr->frame_control &
330*4882a593Smuzhiyun cpu_to_le16(IEEE80211_FCTL_MOREFRAGS)));
331*4882a593Smuzhiyun dma_addr_t mapping = dma_map_single(&rtlpci->pdev->dev, skb->data,
332*4882a593Smuzhiyun skb->len, DMA_TO_DEVICE);
333*4882a593Smuzhiyun u8 bw_40 = 0;
334*4882a593Smuzhiyun
335*4882a593Smuzhiyun if (dma_mapping_error(&rtlpci->pdev->dev, mapping)) {
336*4882a593Smuzhiyun rtl_dbg(rtlpriv, COMP_SEND, DBG_TRACE,
337*4882a593Smuzhiyun "DMA mapping error\n");
338*4882a593Smuzhiyun return;
339*4882a593Smuzhiyun }
340*4882a593Smuzhiyun if (mac->opmode == NL80211_IFTYPE_STATION) {
341*4882a593Smuzhiyun bw_40 = mac->bw_40;
342*4882a593Smuzhiyun } else if (mac->opmode == NL80211_IFTYPE_AP ||
343*4882a593Smuzhiyun mac->opmode == NL80211_IFTYPE_ADHOC) {
344*4882a593Smuzhiyun if (sta)
345*4882a593Smuzhiyun bw_40 = sta->bandwidth >= IEEE80211_STA_RX_BW_40;
346*4882a593Smuzhiyun }
347*4882a593Smuzhiyun
348*4882a593Smuzhiyun seq_number = (le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_SEQ) >> 4;
349*4882a593Smuzhiyun
350*4882a593Smuzhiyun rtl_get_tcb_desc(hw, info, sta, skb, ptcb_desc);
351*4882a593Smuzhiyun
352*4882a593Smuzhiyun CLEAR_PCI_TX_DESC_CONTENT(pdesc, TX_DESC_SIZE_RTL8192S);
353*4882a593Smuzhiyun
354*4882a593Smuzhiyun if (ieee80211_is_nullfunc(fc) || ieee80211_is_ctl(fc)) {
355*4882a593Smuzhiyun firstseg = true;
356*4882a593Smuzhiyun lastseg = true;
357*4882a593Smuzhiyun }
358*4882a593Smuzhiyun
359*4882a593Smuzhiyun if (firstseg) {
360*4882a593Smuzhiyun if (rtlpriv->dm.useramask) {
361*4882a593Smuzhiyun /* set txdesc macId */
362*4882a593Smuzhiyun if (ptcb_desc->mac_id < 32) {
363*4882a593Smuzhiyun set_tx_desc_macid(pdesc, ptcb_desc->mac_id);
364*4882a593Smuzhiyun reserved_macid |= ptcb_desc->mac_id;
365*4882a593Smuzhiyun }
366*4882a593Smuzhiyun }
367*4882a593Smuzhiyun set_tx_desc_rsvd_macid(pdesc, reserved_macid);
368*4882a593Smuzhiyun
369*4882a593Smuzhiyun set_tx_desc_txht(pdesc, ((ptcb_desc->hw_rate >=
370*4882a593Smuzhiyun DESC_RATEMCS0) ? 1 : 0));
371*4882a593Smuzhiyun
372*4882a593Smuzhiyun if (rtlhal->version == VERSION_8192S_ACUT) {
373*4882a593Smuzhiyun if (ptcb_desc->hw_rate == DESC_RATE1M ||
374*4882a593Smuzhiyun ptcb_desc->hw_rate == DESC_RATE2M ||
375*4882a593Smuzhiyun ptcb_desc->hw_rate == DESC_RATE5_5M ||
376*4882a593Smuzhiyun ptcb_desc->hw_rate == DESC_RATE11M) {
377*4882a593Smuzhiyun ptcb_desc->hw_rate = DESC_RATE12M;
378*4882a593Smuzhiyun }
379*4882a593Smuzhiyun }
380*4882a593Smuzhiyun
381*4882a593Smuzhiyun set_tx_desc_tx_rate(pdesc, ptcb_desc->hw_rate);
382*4882a593Smuzhiyun
383*4882a593Smuzhiyun if (ptcb_desc->use_shortgi || ptcb_desc->use_shortpreamble)
384*4882a593Smuzhiyun set_tx_desc_tx_short(pdesc, 0);
385*4882a593Smuzhiyun
386*4882a593Smuzhiyun /* Aggregation related */
387*4882a593Smuzhiyun if (info->flags & IEEE80211_TX_CTL_AMPDU)
388*4882a593Smuzhiyun set_tx_desc_agg_enable(pdesc, 1);
389*4882a593Smuzhiyun
390*4882a593Smuzhiyun /* For AMPDU, we must insert SSN into TX_DESC */
391*4882a593Smuzhiyun set_tx_desc_seq(pdesc, seq_number);
392*4882a593Smuzhiyun
393*4882a593Smuzhiyun /* Protection mode related */
394*4882a593Smuzhiyun /* For 92S, if RTS/CTS are set, HW will execute RTS. */
395*4882a593Smuzhiyun /* We choose only one protection mode to execute */
396*4882a593Smuzhiyun set_tx_desc_rts_enable(pdesc, ((ptcb_desc->rts_enable &&
397*4882a593Smuzhiyun !ptcb_desc->cts_enable) ?
398*4882a593Smuzhiyun 1 : 0));
399*4882a593Smuzhiyun set_tx_desc_cts_enable(pdesc, ((ptcb_desc->cts_enable) ?
400*4882a593Smuzhiyun 1 : 0));
401*4882a593Smuzhiyun set_tx_desc_rts_stbc(pdesc, ((ptcb_desc->rts_stbc) ? 1 : 0));
402*4882a593Smuzhiyun
403*4882a593Smuzhiyun set_tx_desc_rts_rate(pdesc, ptcb_desc->rts_rate);
404*4882a593Smuzhiyun set_tx_desc_rts_bandwidth(pdesc, 0);
405*4882a593Smuzhiyun set_tx_desc_rts_sub_carrier(pdesc, ptcb_desc->rts_sc);
406*4882a593Smuzhiyun set_tx_desc_rts_short(pdesc, ((ptcb_desc->rts_rate <=
407*4882a593Smuzhiyun DESC_RATE54M) ?
408*4882a593Smuzhiyun (ptcb_desc->rts_use_shortpreamble ? 1 : 0)
409*4882a593Smuzhiyun : (ptcb_desc->rts_use_shortgi ? 1 : 0)));
410*4882a593Smuzhiyun
411*4882a593Smuzhiyun
412*4882a593Smuzhiyun /* Set Bandwidth and sub-channel settings. */
413*4882a593Smuzhiyun if (bw_40) {
414*4882a593Smuzhiyun if (ptcb_desc->packet_bw) {
415*4882a593Smuzhiyun set_tx_desc_tx_bandwidth(pdesc, 1);
416*4882a593Smuzhiyun /* use duplicated mode */
417*4882a593Smuzhiyun set_tx_desc_tx_sub_carrier(pdesc, 0);
418*4882a593Smuzhiyun } else {
419*4882a593Smuzhiyun set_tx_desc_tx_bandwidth(pdesc, 0);
420*4882a593Smuzhiyun set_tx_desc_tx_sub_carrier(pdesc,
421*4882a593Smuzhiyun mac->cur_40_prime_sc);
422*4882a593Smuzhiyun }
423*4882a593Smuzhiyun } else {
424*4882a593Smuzhiyun set_tx_desc_tx_bandwidth(pdesc, 0);
425*4882a593Smuzhiyun set_tx_desc_tx_sub_carrier(pdesc, 0);
426*4882a593Smuzhiyun }
427*4882a593Smuzhiyun
428*4882a593Smuzhiyun /* 3 Fill necessary field in First Descriptor */
429*4882a593Smuzhiyun /*DWORD 0*/
430*4882a593Smuzhiyun set_tx_desc_linip(pdesc, 0);
431*4882a593Smuzhiyun set_tx_desc_offset(pdesc, 32);
432*4882a593Smuzhiyun set_tx_desc_pkt_size(pdesc, (u16)skb->len);
433*4882a593Smuzhiyun
434*4882a593Smuzhiyun /*DWORD 1*/
435*4882a593Smuzhiyun set_tx_desc_ra_brsr_id(pdesc, ptcb_desc->ratr_index);
436*4882a593Smuzhiyun
437*4882a593Smuzhiyun /* Fill security related */
438*4882a593Smuzhiyun if (info->control.hw_key) {
439*4882a593Smuzhiyun struct ieee80211_key_conf *keyconf;
440*4882a593Smuzhiyun
441*4882a593Smuzhiyun keyconf = info->control.hw_key;
442*4882a593Smuzhiyun switch (keyconf->cipher) {
443*4882a593Smuzhiyun case WLAN_CIPHER_SUITE_WEP40:
444*4882a593Smuzhiyun case WLAN_CIPHER_SUITE_WEP104:
445*4882a593Smuzhiyun set_tx_desc_sec_type(pdesc, 0x1);
446*4882a593Smuzhiyun break;
447*4882a593Smuzhiyun case WLAN_CIPHER_SUITE_TKIP:
448*4882a593Smuzhiyun set_tx_desc_sec_type(pdesc, 0x2);
449*4882a593Smuzhiyun break;
450*4882a593Smuzhiyun case WLAN_CIPHER_SUITE_CCMP:
451*4882a593Smuzhiyun set_tx_desc_sec_type(pdesc, 0x3);
452*4882a593Smuzhiyun break;
453*4882a593Smuzhiyun default:
454*4882a593Smuzhiyun set_tx_desc_sec_type(pdesc, 0x0);
455*4882a593Smuzhiyun break;
456*4882a593Smuzhiyun
457*4882a593Smuzhiyun }
458*4882a593Smuzhiyun }
459*4882a593Smuzhiyun
460*4882a593Smuzhiyun /* Set Packet ID */
461*4882a593Smuzhiyun set_tx_desc_packet_id(pdesc, 0);
462*4882a593Smuzhiyun
463*4882a593Smuzhiyun /* We will assign magement queue to BK. */
464*4882a593Smuzhiyun set_tx_desc_queue_sel(pdesc, fw_qsel);
465*4882a593Smuzhiyun
466*4882a593Smuzhiyun /* Alwasy enable all rate fallback range */
467*4882a593Smuzhiyun set_tx_desc_data_rate_fb_limit(pdesc, 0x1F);
468*4882a593Smuzhiyun
469*4882a593Smuzhiyun /* Fix: I don't kown why hw use 6.5M to tx when set it */
470*4882a593Smuzhiyun set_tx_desc_user_rate(pdesc,
471*4882a593Smuzhiyun ptcb_desc->use_driver_rate ? 1 : 0);
472*4882a593Smuzhiyun
473*4882a593Smuzhiyun /* Set NON_QOS bit. */
474*4882a593Smuzhiyun if (!ieee80211_is_data_qos(fc))
475*4882a593Smuzhiyun set_tx_desc_non_qos(pdesc, 1);
476*4882a593Smuzhiyun
477*4882a593Smuzhiyun }
478*4882a593Smuzhiyun
479*4882a593Smuzhiyun /* Fill fields that are required to be initialized
480*4882a593Smuzhiyun * in all of the descriptors */
481*4882a593Smuzhiyun /*DWORD 0 */
482*4882a593Smuzhiyun set_tx_desc_first_seg(pdesc, (firstseg ? 1 : 0));
483*4882a593Smuzhiyun set_tx_desc_last_seg(pdesc, (lastseg ? 1 : 0));
484*4882a593Smuzhiyun
485*4882a593Smuzhiyun /* DWORD 7 */
486*4882a593Smuzhiyun set_tx_desc_tx_buffer_size(pdesc, (u16)skb->len);
487*4882a593Smuzhiyun
488*4882a593Smuzhiyun /* DOWRD 8 */
489*4882a593Smuzhiyun set_tx_desc_tx_buffer_address(pdesc, mapping);
490*4882a593Smuzhiyun
491*4882a593Smuzhiyun rtl_dbg(rtlpriv, COMP_SEND, DBG_TRACE, "\n");
492*4882a593Smuzhiyun }
493*4882a593Smuzhiyun
rtl92se_tx_fill_cmddesc(struct ieee80211_hw * hw,u8 * pdesc8,bool firstseg,bool lastseg,struct sk_buff * skb)494*4882a593Smuzhiyun void rtl92se_tx_fill_cmddesc(struct ieee80211_hw *hw, u8 *pdesc8,
495*4882a593Smuzhiyun bool firstseg, bool lastseg, struct sk_buff *skb)
496*4882a593Smuzhiyun {
497*4882a593Smuzhiyun struct rtl_priv *rtlpriv = rtl_priv(hw);
498*4882a593Smuzhiyun struct rtl_pci *rtlpci = rtl_pcidev(rtl_pcipriv(hw));
499*4882a593Smuzhiyun struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
500*4882a593Smuzhiyun struct rtl_tcb_desc *tcb_desc = (struct rtl_tcb_desc *)(skb->cb);
501*4882a593Smuzhiyun __le32 *pdesc = (__le32 *)pdesc8;
502*4882a593Smuzhiyun
503*4882a593Smuzhiyun dma_addr_t mapping = dma_map_single(&rtlpci->pdev->dev, skb->data,
504*4882a593Smuzhiyun skb->len, DMA_TO_DEVICE);
505*4882a593Smuzhiyun
506*4882a593Smuzhiyun if (dma_mapping_error(&rtlpci->pdev->dev, mapping)) {
507*4882a593Smuzhiyun rtl_dbg(rtlpriv, COMP_SEND, DBG_TRACE,
508*4882a593Smuzhiyun "DMA mapping error\n");
509*4882a593Smuzhiyun return;
510*4882a593Smuzhiyun }
511*4882a593Smuzhiyun /* Clear all status */
512*4882a593Smuzhiyun CLEAR_PCI_TX_DESC_CONTENT(pdesc, TX_CMDDESC_SIZE_RTL8192S);
513*4882a593Smuzhiyun
514*4882a593Smuzhiyun /* This bit indicate this packet is used for FW download. */
515*4882a593Smuzhiyun if (tcb_desc->cmd_or_init == DESC_PACKET_TYPE_INIT) {
516*4882a593Smuzhiyun /* For firmware downlaod we only need to set LINIP */
517*4882a593Smuzhiyun set_tx_desc_linip(pdesc, tcb_desc->last_inipkt);
518*4882a593Smuzhiyun
519*4882a593Smuzhiyun /* 92SE must set as 1 for firmware download HW DMA error */
520*4882a593Smuzhiyun set_tx_desc_first_seg(pdesc, 1);
521*4882a593Smuzhiyun set_tx_desc_last_seg(pdesc, 1);
522*4882a593Smuzhiyun
523*4882a593Smuzhiyun /* 92SE need not to set TX packet size when firmware download */
524*4882a593Smuzhiyun set_tx_desc_pkt_size(pdesc, (u16)(skb->len));
525*4882a593Smuzhiyun set_tx_desc_tx_buffer_size(pdesc, (u16)(skb->len));
526*4882a593Smuzhiyun set_tx_desc_tx_buffer_address(pdesc, mapping);
527*4882a593Smuzhiyun
528*4882a593Smuzhiyun wmb();
529*4882a593Smuzhiyun set_tx_desc_own(pdesc, 1);
530*4882a593Smuzhiyun } else { /* H2C Command Desc format (Host TXCMD) */
531*4882a593Smuzhiyun /* 92SE must set as 1 for firmware download HW DMA error */
532*4882a593Smuzhiyun set_tx_desc_first_seg(pdesc, 1);
533*4882a593Smuzhiyun set_tx_desc_last_seg(pdesc, 1);
534*4882a593Smuzhiyun
535*4882a593Smuzhiyun set_tx_desc_offset(pdesc, 0x20);
536*4882a593Smuzhiyun
537*4882a593Smuzhiyun /* Buffer size + command header */
538*4882a593Smuzhiyun set_tx_desc_pkt_size(pdesc, (u16)(skb->len));
539*4882a593Smuzhiyun /* Fixed queue of H2C command */
540*4882a593Smuzhiyun set_tx_desc_queue_sel(pdesc, 0x13);
541*4882a593Smuzhiyun
542*4882a593Smuzhiyun le32p_replace_bits((__le32 *)skb->data, rtlhal->h2c_txcmd_seq,
543*4882a593Smuzhiyun GENMASK(30, 24));
544*4882a593Smuzhiyun set_tx_desc_tx_buffer_size(pdesc, (u16)(skb->len));
545*4882a593Smuzhiyun set_tx_desc_tx_buffer_address(pdesc, mapping);
546*4882a593Smuzhiyun
547*4882a593Smuzhiyun wmb();
548*4882a593Smuzhiyun set_tx_desc_own(pdesc, 1);
549*4882a593Smuzhiyun
550*4882a593Smuzhiyun }
551*4882a593Smuzhiyun }
552*4882a593Smuzhiyun
rtl92se_set_desc(struct ieee80211_hw * hw,u8 * pdesc8,bool istx,u8 desc_name,u8 * val)553*4882a593Smuzhiyun void rtl92se_set_desc(struct ieee80211_hw *hw, u8 *pdesc8, bool istx,
554*4882a593Smuzhiyun u8 desc_name, u8 *val)
555*4882a593Smuzhiyun {
556*4882a593Smuzhiyun __le32 *pdesc = (__le32 *)pdesc8;
557*4882a593Smuzhiyun
558*4882a593Smuzhiyun if (istx) {
559*4882a593Smuzhiyun switch (desc_name) {
560*4882a593Smuzhiyun case HW_DESC_OWN:
561*4882a593Smuzhiyun wmb();
562*4882a593Smuzhiyun set_tx_desc_own(pdesc, 1);
563*4882a593Smuzhiyun break;
564*4882a593Smuzhiyun case HW_DESC_TX_NEXTDESC_ADDR:
565*4882a593Smuzhiyun set_tx_desc_next_desc_address(pdesc, *(u32 *)val);
566*4882a593Smuzhiyun break;
567*4882a593Smuzhiyun default:
568*4882a593Smuzhiyun WARN_ONCE(true, "rtl8192se: ERR txdesc :%d not processed\n",
569*4882a593Smuzhiyun desc_name);
570*4882a593Smuzhiyun break;
571*4882a593Smuzhiyun }
572*4882a593Smuzhiyun } else {
573*4882a593Smuzhiyun switch (desc_name) {
574*4882a593Smuzhiyun case HW_DESC_RXOWN:
575*4882a593Smuzhiyun wmb();
576*4882a593Smuzhiyun set_rx_status_desc_own(pdesc, 1);
577*4882a593Smuzhiyun break;
578*4882a593Smuzhiyun case HW_DESC_RXBUFF_ADDR:
579*4882a593Smuzhiyun set_rx_status__desc_buff_addr(pdesc, *(u32 *)val);
580*4882a593Smuzhiyun break;
581*4882a593Smuzhiyun case HW_DESC_RXPKT_LEN:
582*4882a593Smuzhiyun set_rx_status_desc_pkt_len(pdesc, *(u32 *)val);
583*4882a593Smuzhiyun break;
584*4882a593Smuzhiyun case HW_DESC_RXERO:
585*4882a593Smuzhiyun set_rx_status_desc_eor(pdesc, 1);
586*4882a593Smuzhiyun break;
587*4882a593Smuzhiyun default:
588*4882a593Smuzhiyun WARN_ONCE(true, "rtl8192se: ERR rxdesc :%d not processed\n",
589*4882a593Smuzhiyun desc_name);
590*4882a593Smuzhiyun break;
591*4882a593Smuzhiyun }
592*4882a593Smuzhiyun }
593*4882a593Smuzhiyun }
594*4882a593Smuzhiyun
rtl92se_get_desc(struct ieee80211_hw * hw,u8 * desc8,bool istx,u8 desc_name)595*4882a593Smuzhiyun u64 rtl92se_get_desc(struct ieee80211_hw *hw,
596*4882a593Smuzhiyun u8 *desc8, bool istx, u8 desc_name)
597*4882a593Smuzhiyun {
598*4882a593Smuzhiyun u32 ret = 0;
599*4882a593Smuzhiyun __le32 *desc = (__le32 *)desc8;
600*4882a593Smuzhiyun
601*4882a593Smuzhiyun if (istx) {
602*4882a593Smuzhiyun switch (desc_name) {
603*4882a593Smuzhiyun case HW_DESC_OWN:
604*4882a593Smuzhiyun ret = get_tx_desc_own(desc);
605*4882a593Smuzhiyun break;
606*4882a593Smuzhiyun case HW_DESC_TXBUFF_ADDR:
607*4882a593Smuzhiyun ret = get_tx_desc_tx_buffer_address(desc);
608*4882a593Smuzhiyun break;
609*4882a593Smuzhiyun default:
610*4882a593Smuzhiyun WARN_ONCE(true, "rtl8192se: ERR txdesc :%d not processed\n",
611*4882a593Smuzhiyun desc_name);
612*4882a593Smuzhiyun break;
613*4882a593Smuzhiyun }
614*4882a593Smuzhiyun } else {
615*4882a593Smuzhiyun switch (desc_name) {
616*4882a593Smuzhiyun case HW_DESC_OWN:
617*4882a593Smuzhiyun ret = get_rx_status_desc_own(desc);
618*4882a593Smuzhiyun break;
619*4882a593Smuzhiyun case HW_DESC_RXPKT_LEN:
620*4882a593Smuzhiyun ret = get_rx_status_desc_pkt_len(desc);
621*4882a593Smuzhiyun break;
622*4882a593Smuzhiyun case HW_DESC_RXBUFF_ADDR:
623*4882a593Smuzhiyun ret = get_rx_status_desc_buff_addr(desc);
624*4882a593Smuzhiyun break;
625*4882a593Smuzhiyun default:
626*4882a593Smuzhiyun WARN_ONCE(true, "rtl8192se: ERR rxdesc :%d not processed\n",
627*4882a593Smuzhiyun desc_name);
628*4882a593Smuzhiyun break;
629*4882a593Smuzhiyun }
630*4882a593Smuzhiyun }
631*4882a593Smuzhiyun return ret;
632*4882a593Smuzhiyun }
633*4882a593Smuzhiyun
rtl92se_tx_polling(struct ieee80211_hw * hw,u8 hw_queue)634*4882a593Smuzhiyun void rtl92se_tx_polling(struct ieee80211_hw *hw, u8 hw_queue)
635*4882a593Smuzhiyun {
636*4882a593Smuzhiyun struct rtl_priv *rtlpriv = rtl_priv(hw);
637*4882a593Smuzhiyun rtl_write_word(rtlpriv, TP_POLL, BIT(0) << (hw_queue));
638*4882a593Smuzhiyun }
639