1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun /* Copyright(c) 2009-2012 Realtek Corporation.*/ 3*4882a593Smuzhiyun 4*4882a593Smuzhiyun #ifndef __REALTEK_PCI92SE_HW_H__ 5*4882a593Smuzhiyun #define __REALTEK_PCI92SE_HW_H__ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #define MSR_LINK_MANAGED 2 8*4882a593Smuzhiyun #define MSR_LINK_NONE 0 9*4882a593Smuzhiyun #define MSR_LINK_SHIFT 0 10*4882a593Smuzhiyun #define MSR_LINK_ADHOC 1 11*4882a593Smuzhiyun #define MSR_LINK_MASTER 3 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun enum WIRELESS_NETWORK_TYPE { 14*4882a593Smuzhiyun WIRELESS_11B = 1, 15*4882a593Smuzhiyun WIRELESS_11G = 2, 16*4882a593Smuzhiyun WIRELESS_11A = 4, 17*4882a593Smuzhiyun WIRELESS_11N = 8 18*4882a593Smuzhiyun }; 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun void rtl92se_get_hw_reg(struct ieee80211_hw *hw, 21*4882a593Smuzhiyun u8 variable, u8 *val); 22*4882a593Smuzhiyun void rtl92se_read_eeprom_info(struct ieee80211_hw *hw); 23*4882a593Smuzhiyun void rtl92se_interrupt_recognized(struct ieee80211_hw *hw, 24*4882a593Smuzhiyun struct rtl_int *int_vec); 25*4882a593Smuzhiyun int rtl92se_hw_init(struct ieee80211_hw *hw); 26*4882a593Smuzhiyun void rtl92se_card_disable(struct ieee80211_hw *hw); 27*4882a593Smuzhiyun void rtl92se_enable_interrupt(struct ieee80211_hw *hw); 28*4882a593Smuzhiyun void rtl92se_disable_interrupt(struct ieee80211_hw *hw); 29*4882a593Smuzhiyun int rtl92se_set_network_type(struct ieee80211_hw *hw, 30*4882a593Smuzhiyun enum nl80211_iftype type); 31*4882a593Smuzhiyun void rtl92se_set_check_bssid(struct ieee80211_hw *hw, bool check_bssid); 32*4882a593Smuzhiyun void rtl92se_set_mac_addr(struct rtl_io *io, const u8 *addr); 33*4882a593Smuzhiyun void rtl92se_set_qos(struct ieee80211_hw *hw, int aci); 34*4882a593Smuzhiyun void rtl92se_set_beacon_related_registers(struct ieee80211_hw *hw); 35*4882a593Smuzhiyun void rtl92se_set_beacon_interval(struct ieee80211_hw *hw); 36*4882a593Smuzhiyun void rtl92se_update_interrupt_mask(struct ieee80211_hw *hw, 37*4882a593Smuzhiyun u32 add_msr, u32 rm_msr); 38*4882a593Smuzhiyun void rtl92se_set_hw_reg(struct ieee80211_hw *hw, u8 variable, 39*4882a593Smuzhiyun u8 *val); 40*4882a593Smuzhiyun void rtl92se_update_hal_rate_tbl(struct ieee80211_hw *hw, 41*4882a593Smuzhiyun struct ieee80211_sta *sta, u8 rssi_level, bool update_bw); 42*4882a593Smuzhiyun void rtl92se_update_channel_access_setting(struct ieee80211_hw *hw); 43*4882a593Smuzhiyun bool rtl92se_gpio_radio_on_off_checking(struct ieee80211_hw *hw, 44*4882a593Smuzhiyun u8 *valid); 45*4882a593Smuzhiyun void rtl8192se_gpiobit3_cfg_inputmode(struct ieee80211_hw *hw); 46*4882a593Smuzhiyun void rtl92se_enable_hw_security_config(struct ieee80211_hw *hw); 47*4882a593Smuzhiyun void rtl92se_set_key(struct ieee80211_hw *hw, 48*4882a593Smuzhiyun u32 key_index, u8 *macaddr, bool is_group, 49*4882a593Smuzhiyun u8 enc_algo, bool is_wepkey, bool clear_all); 50*4882a593Smuzhiyun void rtl92se_suspend(struct ieee80211_hw *hw); 51*4882a593Smuzhiyun void rtl92se_resume(struct ieee80211_hw *hw); 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun #endif 54