1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun /* Copyright(c) 2009-2012 Realtek Corporation.*/ 3*4882a593Smuzhiyun 4*4882a593Smuzhiyun #ifndef __RTL92CU_HW_H__ 5*4882a593Smuzhiyun #define __RTL92CU_HW_H__ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #define H2C_RA_MASK 6 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #define LLT_LAST_ENTRY_OF_TX_PKT_BUFFER 255 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun #define RX_PAGE_SIZE_REG_VALUE PBP_128 12*4882a593Smuzhiyun /* Note: We will divide number of page equally for each queue 13*4882a593Smuzhiyun * other than public queue! */ 14*4882a593Smuzhiyun #define TX_TOTAL_PAGE_NUMBER 0xF8 15*4882a593Smuzhiyun #define TX_PAGE_BOUNDARY (TX_TOTAL_PAGE_NUMBER + 1) 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun #define CHIP_B_PAGE_NUM_PUBQ 0xE7 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun /* For Test Chip Setting 20*4882a593Smuzhiyun * (HPQ + LPQ + PUBQ) shall be TX_TOTAL_PAGE_NUMBER */ 21*4882a593Smuzhiyun #define CHIP_A_PAGE_NUM_PUBQ 0x7E 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun /* For Chip A Setting */ 24*4882a593Smuzhiyun #define WMM_CHIP_A_TX_TOTAL_PAGE_NUMBER 0xF5 25*4882a593Smuzhiyun #define WMM_CHIP_A_TX_PAGE_BOUNDARY \ 26*4882a593Smuzhiyun (WMM_CHIP_A_TX_TOTAL_PAGE_NUMBER + 1) /* F6 */ 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun #define WMM_CHIP_A_PAGE_NUM_PUBQ 0xA3 29*4882a593Smuzhiyun #define WMM_CHIP_A_PAGE_NUM_HPQ 0x29 30*4882a593Smuzhiyun #define WMM_CHIP_A_PAGE_NUM_LPQ 0x29 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun /* Note: For Chip B Setting ,modify later */ 33*4882a593Smuzhiyun #define WMM_CHIP_B_TX_TOTAL_PAGE_NUMBER 0xF5 34*4882a593Smuzhiyun #define WMM_CHIP_B_TX_PAGE_BOUNDARY \ 35*4882a593Smuzhiyun (WMM_CHIP_B_TX_TOTAL_PAGE_NUMBER + 1) /* F6 */ 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun #define WMM_CHIP_B_PAGE_NUM_PUBQ 0xB0 38*4882a593Smuzhiyun #define WMM_CHIP_B_PAGE_NUM_HPQ 0x29 39*4882a593Smuzhiyun #define WMM_CHIP_B_PAGE_NUM_LPQ 0x1C 40*4882a593Smuzhiyun #define WMM_CHIP_B_PAGE_NUM_NPQ 0x1C 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun #define BOARD_TYPE_NORMAL_MASK 0xE0 43*4882a593Smuzhiyun #define BOARD_TYPE_TEST_MASK 0x0F 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun /* should be renamed and moved to another file */ 46*4882a593Smuzhiyun enum _BOARD_TYPE_8192CUSB { 47*4882a593Smuzhiyun BOARD_USB_DONGLE = 0, /* USB dongle */ 48*4882a593Smuzhiyun BOARD_USB_HIGH_PA = 1, /* USB dongle - high power PA */ 49*4882a593Smuzhiyun BOARD_MINICARD = 2, /* Minicard */ 50*4882a593Smuzhiyun BOARD_USB_SOLO = 3, /* USB solo-Slim module */ 51*4882a593Smuzhiyun BOARD_USB_COMBO = 4, /* USB Combo-Slim module */ 52*4882a593Smuzhiyun }; 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun #define IS_HIGHT_PA(boardtype) \ 55*4882a593Smuzhiyun ((boardtype == BOARD_USB_HIGH_PA) ? true : false) 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun #define RTL92C_DRIVER_INFO_SIZE 4 58*4882a593Smuzhiyun void rtl92cu_read_eeprom_info(struct ieee80211_hw *hw); 59*4882a593Smuzhiyun void rtl92cu_enable_hw_security_config(struct ieee80211_hw *hw); 60*4882a593Smuzhiyun int rtl92cu_hw_init(struct ieee80211_hw *hw); 61*4882a593Smuzhiyun void rtl92cu_card_disable(struct ieee80211_hw *hw); 62*4882a593Smuzhiyun int rtl92cu_set_network_type(struct ieee80211_hw *hw, enum nl80211_iftype type); 63*4882a593Smuzhiyun void rtl92cu_set_beacon_related_registers(struct ieee80211_hw *hw); 64*4882a593Smuzhiyun void rtl92cu_set_beacon_interval(struct ieee80211_hw *hw); 65*4882a593Smuzhiyun void rtl92cu_update_interrupt_mask(struct ieee80211_hw *hw, 66*4882a593Smuzhiyun u32 add_msr, u32 rm_msr); 67*4882a593Smuzhiyun void rtl92cu_get_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val); 68*4882a593Smuzhiyun void rtl92cu_set_hw_reg(struct ieee80211_hw *hw, u8 variable, u8 *val); 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun void rtl92cu_update_channel_access_setting(struct ieee80211_hw *hw); 71*4882a593Smuzhiyun bool rtl92cu_gpio_radio_on_off_checking(struct ieee80211_hw *hw, u8 * valid); 72*4882a593Smuzhiyun void rtl92cu_set_check_bssid(struct ieee80211_hw *hw, bool check_bssid); 73*4882a593Smuzhiyun int rtl92c_download_fw(struct ieee80211_hw *hw); 74*4882a593Smuzhiyun void rtl92c_set_fw_pwrmode_cmd(struct ieee80211_hw *hw, u8 mode); 75*4882a593Smuzhiyun void rtl92c_set_fw_joinbss_report_cmd(struct ieee80211_hw *hw, u8 mstatus); 76*4882a593Smuzhiyun void rtl92c_fill_h2c_cmd(struct ieee80211_hw *hw, 77*4882a593Smuzhiyun u8 element_id, u32 cmd_len, u8 *p_cmdbuffer); 78*4882a593Smuzhiyun bool rtl92cu_phy_mac_config(struct ieee80211_hw *hw); 79*4882a593Smuzhiyun void rtl92cu_update_hal_rate_tbl(struct ieee80211_hw *hw, 80*4882a593Smuzhiyun struct ieee80211_sta *sta, 81*4882a593Smuzhiyun u8 rssi_level, bool update_bw); 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun #endif 84