xref: /OK3568_Linux_fs/kernel/drivers/net/wireless/realtek/rtlwifi/rtl8192ce/phy.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */
2*4882a593Smuzhiyun /* Copyright(c) 2009-2012  Realtek Corporation.*/
3*4882a593Smuzhiyun 
4*4882a593Smuzhiyun #ifndef __RTL92C_PHY_H__
5*4882a593Smuzhiyun #define __RTL92C_PHY_H__
6*4882a593Smuzhiyun 
7*4882a593Smuzhiyun #define MAX_PRECMD_CNT			16
8*4882a593Smuzhiyun #define MAX_RFDEPENDCMD_CNT		16
9*4882a593Smuzhiyun #define MAX_POSTCMD_CNT			16
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun #define MAX_DOZE_WAITING_TIMES_9x	64
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun #define RT_CANNOT_IO(hw)		false
14*4882a593Smuzhiyun #define HIGHPOWER_RADIOA_ARRAYLEN	22
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun #define MAX_TOLERANCE			5
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun #define	APK_BB_REG_NUM			5
19*4882a593Smuzhiyun #define	APK_AFE_REG_NUM			16
20*4882a593Smuzhiyun #define	APK_CURVE_REG_NUM		4
21*4882a593Smuzhiyun #define	PATH_NUM			2
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun #define LOOP_LIMIT			5
24*4882a593Smuzhiyun #define MAX_STALL_TIME			50
25*4882a593Smuzhiyun #define ANTENNADIVERSITYVALUE		0x80
26*4882a593Smuzhiyun #define MAX_TXPWR_IDX_NMODE_92S		63
27*4882a593Smuzhiyun #define RESET_CNT_LIMIT			3
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun #define IQK_ADDA_REG_NUM		16
30*4882a593Smuzhiyun #define IQK_MAC_REG_NUM			4
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun #define IQK_DELAY_TIME			1
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun #define RF90_PATH_MAX			2
35*4882a593Smuzhiyun 
36*4882a593Smuzhiyun #define CT_OFFSET_MAC_ADDR		0X16
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun #define CT_OFFSET_CCK_TX_PWR_IDX	0x5A
39*4882a593Smuzhiyun #define CT_OFFSET_HT401S_TX_PWR_IDX	0x60
40*4882a593Smuzhiyun #define CT_OFFSET_HT402S_TX_PWR_IDX_DIF	0x66
41*4882a593Smuzhiyun #define CT_OFFSET_HT20_TX_PWR_IDX_DIFF	0x69
42*4882a593Smuzhiyun #define CT_OFFSET_OFDM_TX_PWR_IDX_DIFF	0x6C
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun #define CT_OFFSET_HT40_MAX_PWR_OFFSET	0x6F
45*4882a593Smuzhiyun #define CT_OFFSET_HT20_MAX_PWR_OFFSET	0x72
46*4882a593Smuzhiyun 
47*4882a593Smuzhiyun #define CT_OFFSET_CHANNEL_PLAH		0x75
48*4882a593Smuzhiyun #define CT_OFFSET_THERMAL_METER		0x78
49*4882a593Smuzhiyun #define CT_OFFSET_RF_OPTION		0x79
50*4882a593Smuzhiyun #define CT_OFFSET_VERSION		0x7E
51*4882a593Smuzhiyun #define CT_OFFSET_CUSTOMER_ID		0x7F
52*4882a593Smuzhiyun 
53*4882a593Smuzhiyun #define RTL92C_MAX_PATH_NUM		2
54*4882a593Smuzhiyun 
55*4882a593Smuzhiyun bool rtl92c_phy_bb_config(struct ieee80211_hw *hw);
56*4882a593Smuzhiyun u32 rtl92c_phy_query_bb_reg(struct ieee80211_hw *hw, u32 regaddr, u32 bitmask);
57*4882a593Smuzhiyun void rtl92c_phy_set_bb_reg(struct ieee80211_hw *hw, u32 regaddr, u32 bitmask,
58*4882a593Smuzhiyun 			   u32 data);
59*4882a593Smuzhiyun u32 rtl92c_phy_query_rf_reg(struct ieee80211_hw *hw, enum radio_path rfpath,
60*4882a593Smuzhiyun 			    u32 regaddr, u32 bitmask);
61*4882a593Smuzhiyun void rtl92ce_phy_set_rf_reg(struct ieee80211_hw *hw, enum radio_path rfpath,
62*4882a593Smuzhiyun 			    u32 regaddr, u32 bitmask, u32 data);
63*4882a593Smuzhiyun bool rtl92c_phy_mac_config(struct ieee80211_hw *hw);
64*4882a593Smuzhiyun bool rtl92ce_phy_bb_config(struct ieee80211_hw *hw);
65*4882a593Smuzhiyun bool rtl92c_phy_rf_config(struct ieee80211_hw *hw);
66*4882a593Smuzhiyun bool rtl92c_phy_config_rf_with_feaderfile(struct ieee80211_hw *hw,
67*4882a593Smuzhiyun 					  enum radio_path rfpath);
68*4882a593Smuzhiyun void rtl92c_phy_get_hw_reg_originalvalue(struct ieee80211_hw *hw);
69*4882a593Smuzhiyun void rtl92c_phy_get_txpower_level(struct ieee80211_hw *hw, long *powerlevel);
70*4882a593Smuzhiyun void rtl92c_phy_set_txpower_level(struct ieee80211_hw *hw, u8 channel);
71*4882a593Smuzhiyun bool rtl92c_phy_update_txpower_dbm(struct ieee80211_hw *hw,
72*4882a593Smuzhiyun 					  long power_indbm);
73*4882a593Smuzhiyun void rtl92c_phy_set_bw_mode(struct ieee80211_hw *hw,
74*4882a593Smuzhiyun 			    enum nl80211_channel_type ch_type);
75*4882a593Smuzhiyun void rtl92c_phy_sw_chnl_callback(struct ieee80211_hw *hw);
76*4882a593Smuzhiyun u8 rtl92c_phy_sw_chnl(struct ieee80211_hw *hw);
77*4882a593Smuzhiyun void rtl92c_phy_iq_calibrate(struct ieee80211_hw *hw, bool b_recovery);
78*4882a593Smuzhiyun void rtl92c_phy_set_beacon_hw_reg(struct ieee80211_hw *hw, u16 beaconinterval);
79*4882a593Smuzhiyun void rtl92c_phy_ap_calibrate(struct ieee80211_hw *hw, s8 delta);
80*4882a593Smuzhiyun void rtl92c_phy_lc_calibrate(struct ieee80211_hw *hw);
81*4882a593Smuzhiyun void _rtl92ce_phy_lc_calibrate(struct ieee80211_hw *hw, bool is2t);
82*4882a593Smuzhiyun void rtl92c_phy_set_rfpath_switch(struct ieee80211_hw *hw, bool bmain);
83*4882a593Smuzhiyun bool rtl92c_phy_config_rf_with_headerfile(struct ieee80211_hw *hw,
84*4882a593Smuzhiyun 					  enum radio_path rfpath);
85*4882a593Smuzhiyun bool rtl8192_phy_check_is_legal_rfpath(struct ieee80211_hw *hw,
86*4882a593Smuzhiyun 				       u32 rfpath);
87*4882a593Smuzhiyun bool rtl92ce_phy_set_rf_power_state(struct ieee80211_hw *hw,
88*4882a593Smuzhiyun 				    enum rf_pwrstate rfpwr_state);
89*4882a593Smuzhiyun void rtl92ce_phy_set_rf_on(struct ieee80211_hw *hw);
90*4882a593Smuzhiyun bool rtl92c_phy_set_io_cmd(struct ieee80211_hw *hw, enum io_type iotype);
91*4882a593Smuzhiyun void rtl92c_phy_set_io(struct ieee80211_hw *hw);
92*4882a593Smuzhiyun void rtl92c_bb_block_on(struct ieee80211_hw *hw);
93*4882a593Smuzhiyun u32 _rtl92c_phy_rf_serial_read(struct ieee80211_hw *hw, enum radio_path rfpath,
94*4882a593Smuzhiyun 			       u32 offset);
95*4882a593Smuzhiyun u32 _rtl92c_phy_fw_rf_serial_read(struct ieee80211_hw *hw,
96*4882a593Smuzhiyun 				  enum radio_path rfpath, u32 offset);
97*4882a593Smuzhiyun u32 _rtl92c_phy_calculate_bit_shift(u32 bitmask);
98*4882a593Smuzhiyun void _rtl92c_phy_rf_serial_write(struct ieee80211_hw *hw,
99*4882a593Smuzhiyun 				 enum radio_path rfpath, u32 offset, u32 data);
100*4882a593Smuzhiyun void _rtl92c_phy_fw_rf_serial_write(struct ieee80211_hw *hw,
101*4882a593Smuzhiyun 				    enum radio_path rfpath, u32 offset,
102*4882a593Smuzhiyun 				    u32 data);
103*4882a593Smuzhiyun void _rtl92c_store_pwrindex_diffrate_offset(struct ieee80211_hw *hw,
104*4882a593Smuzhiyun 					    u32 regaddr, u32 bitmask, u32 data);
105*4882a593Smuzhiyun bool _rtl92ce_phy_config_mac_with_headerfile(struct ieee80211_hw *hw);
106*4882a593Smuzhiyun void _rtl92c_phy_init_bb_rf_register_definition(struct ieee80211_hw *hw);
107*4882a593Smuzhiyun bool _rtl92c_phy_bb8192c_config_parafile(struct ieee80211_hw *hw);
108*4882a593Smuzhiyun void _rtl92c_phy_set_rf_sleep(struct ieee80211_hw *hw);
109*4882a593Smuzhiyun bool rtl92c_phy_set_rf_power_state(struct ieee80211_hw *hw,
110*4882a593Smuzhiyun 				   enum rf_pwrstate rfpwr_state);
111*4882a593Smuzhiyun bool _rtl92ce_phy_config_bb_with_headerfile(struct ieee80211_hw *hw,
112*4882a593Smuzhiyun 					    u8 configtype);
113*4882a593Smuzhiyun bool _rtl92ce_phy_config_bb_with_pgheaderfile(struct ieee80211_hw *hw,
114*4882a593Smuzhiyun 					      u8 configtype);
115*4882a593Smuzhiyun void rtl92ce_phy_set_bw_mode_callback(struct ieee80211_hw *hw);
116*4882a593Smuzhiyun 
117*4882a593Smuzhiyun #endif
118