1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun /* Copyright(c) 2012 Realtek Corporation.*/ 3*4882a593Smuzhiyun 4*4882a593Smuzhiyun /*=========================================== 5*4882a593Smuzhiyun * The following is for 8821A 2Ant BT Co-exist definition 6*4882a593Smuzhiyun *=========================================== 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun #define BT_INFO_8821A_2ANT_B_FTP BIT7 9*4882a593Smuzhiyun #define BT_INFO_8821A_2ANT_B_A2DP BIT6 10*4882a593Smuzhiyun #define BT_INFO_8821A_2ANT_B_HID BIT5 11*4882a593Smuzhiyun #define BT_INFO_8821A_2ANT_B_SCO_BUSY BIT4 12*4882a593Smuzhiyun #define BT_INFO_8821A_2ANT_B_ACL_BUSY BIT3 13*4882a593Smuzhiyun #define BT_INFO_8821A_2ANT_B_INQ_PAGE BIT2 14*4882a593Smuzhiyun #define BT_INFO_8821A_2ANT_B_SCO_ESCO BIT1 15*4882a593Smuzhiyun #define BT_INFO_8821A_2ANT_B_CONNECTION BIT0 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun #define BTC_RSSI_COEX_THRESH_TOL_8821A_2ANT 2 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun /* WiFi RSSI Threshold for 2-Ant TDMA/1-Ant PS-TDMA translation */ 20*4882a593Smuzhiyun #define BT_8821A_2ANT_WIFI_RSSI_COEXSWITCH_THRES 42 21*4882a593Smuzhiyun /* BT RSSI Threshold for 2-Ant TDMA/1-Ant PS-TDMA translation */ 22*4882a593Smuzhiyun #define BT_8821A_2ANT_BT_RSSI_COEXSWITCH_THRES 46 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun enum _BT_INFO_SRC_8821A_2ANT { 25*4882a593Smuzhiyun BT_INFO_SRC_8821A_2ANT_WIFI_FW = 0x0, 26*4882a593Smuzhiyun BT_INFO_SRC_8821A_2ANT_BT_RSP = 0x1, 27*4882a593Smuzhiyun BT_INFO_SRC_8821A_2ANT_BT_ACTIVE_SEND = 0x2, 28*4882a593Smuzhiyun BT_INFO_SRC_8821A_2ANT_MAX 29*4882a593Smuzhiyun }; 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun enum _BT_8821A_2ANT_BT_STATUS { 32*4882a593Smuzhiyun BT_8821A_2ANT_BT_STATUS_IDLE = 0x0, 33*4882a593Smuzhiyun BT_8821A_2ANT_BT_STATUS_CON_IDLE = 0x1, 34*4882a593Smuzhiyun BT_8821A_2ANT_BT_STATUS_NON_IDLE = 0x2, 35*4882a593Smuzhiyun BT_8821A_2ANT_BT_STATUS_ACL_BUSY = 0x3, 36*4882a593Smuzhiyun BT_8821A_2ANT_BT_STATUS_SCO_BUSY = 0x4, 37*4882a593Smuzhiyun BT_8821A_2ANT_BT_STATUS_ACL_SCO_BUSY = 0x5, 38*4882a593Smuzhiyun BT_8821A_2ANT_BT_STATUS_MAX 39*4882a593Smuzhiyun }; 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun enum _BT_8821A_2ANT_COEX_ALGO { 42*4882a593Smuzhiyun BT_8821A_2ANT_COEX_ALGO_UNDEFINED = 0x0, 43*4882a593Smuzhiyun BT_8821A_2ANT_COEX_ALGO_SCO = 0x1, 44*4882a593Smuzhiyun BT_8821A_2ANT_COEX_ALGO_HID = 0x2, 45*4882a593Smuzhiyun BT_8821A_2ANT_COEX_ALGO_A2DP = 0x3, 46*4882a593Smuzhiyun BT_8821A_2ANT_COEX_ALGO_A2DP_PANHS = 0x4, 47*4882a593Smuzhiyun BT_8821A_2ANT_COEX_ALGO_PANEDR = 0x5, 48*4882a593Smuzhiyun BT_8821A_2ANT_COEX_ALGO_PANHS = 0x6, 49*4882a593Smuzhiyun BT_8821A_2ANT_COEX_ALGO_PANEDR_A2DP = 0x7, 50*4882a593Smuzhiyun BT_8821A_2ANT_COEX_ALGO_PANEDR_HID = 0x8, 51*4882a593Smuzhiyun BT_8821A_2ANT_COEX_ALGO_HID_A2DP_PANEDR = 0x9, 52*4882a593Smuzhiyun BT_8821A_2ANT_COEX_ALGO_HID_A2DP = 0xa, 53*4882a593Smuzhiyun BT_8821A_2ANT_COEX_ALGO_MAX = 0xb, 54*4882a593Smuzhiyun }; 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun struct coex_dm_8821a_2ant { 57*4882a593Smuzhiyun /* fw mechanism */ 58*4882a593Smuzhiyun bool pre_dec_bt_pwr_lvl; 59*4882a593Smuzhiyun bool cur_dec_bt_pwr_lvl; 60*4882a593Smuzhiyun u8 pre_fw_dac_swing_lvl; 61*4882a593Smuzhiyun u8 cur_fw_dac_swing_lvl; 62*4882a593Smuzhiyun bool cur_ignore_wlan_act; 63*4882a593Smuzhiyun bool pre_ignore_wlan_act; 64*4882a593Smuzhiyun u8 pre_ps_tdma; 65*4882a593Smuzhiyun u8 cur_ps_tdma; 66*4882a593Smuzhiyun u8 ps_tdma_para[5]; 67*4882a593Smuzhiyun u8 ps_tdma_du_adj_type; 68*4882a593Smuzhiyun bool reset_tdma_adjust; 69*4882a593Smuzhiyun bool auto_tdma_adjust; 70*4882a593Smuzhiyun bool pre_ps_tdma_on; 71*4882a593Smuzhiyun bool cur_ps_tdma_on; 72*4882a593Smuzhiyun bool pre_bt_auto_report; 73*4882a593Smuzhiyun bool cur_bt_auto_report; 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun /* sw mechanism */ 76*4882a593Smuzhiyun bool pre_rf_rx_lpf_shrink; 77*4882a593Smuzhiyun bool cur_rf_rx_lpf_shrink; 78*4882a593Smuzhiyun u32 bt_rf0x1e_backup; 79*4882a593Smuzhiyun bool pre_low_penalty_ra; 80*4882a593Smuzhiyun bool cur_low_penalty_ra; 81*4882a593Smuzhiyun bool pre_dac_swing_on; 82*4882a593Smuzhiyun u32 pre_dac_swing_lvl; 83*4882a593Smuzhiyun bool cur_dac_swing_on; 84*4882a593Smuzhiyun u32 cur_dac_swing_lvl; 85*4882a593Smuzhiyun bool pre_adc_back_off; 86*4882a593Smuzhiyun bool cur_adc_back_off; 87*4882a593Smuzhiyun bool pre_agc_table_en; 88*4882a593Smuzhiyun bool cur_agc_table_en; 89*4882a593Smuzhiyun u32 pre_val0x6c0; 90*4882a593Smuzhiyun u32 cur_val0x6c0; 91*4882a593Smuzhiyun u32 pre_val0x6c4; 92*4882a593Smuzhiyun u32 cur_val0x6c4; 93*4882a593Smuzhiyun u32 pre_val0x6c8; 94*4882a593Smuzhiyun u32 cur_val0x6c8; 95*4882a593Smuzhiyun u8 pre_val0x6cc; 96*4882a593Smuzhiyun u8 cur_val0x6cc; 97*4882a593Smuzhiyun bool limited_dig; 98*4882a593Smuzhiyun 99*4882a593Smuzhiyun /* algorithm related */ 100*4882a593Smuzhiyun u8 pre_algorithm; 101*4882a593Smuzhiyun u8 cur_algorithm; 102*4882a593Smuzhiyun u8 bt_status; 103*4882a593Smuzhiyun u8 wifi_chnl_info[3]; 104*4882a593Smuzhiyun u8 pre_lps; 105*4882a593Smuzhiyun u8 cur_lps; 106*4882a593Smuzhiyun u8 pre_rpwm; 107*4882a593Smuzhiyun u8 cur_rpwm; 108*4882a593Smuzhiyun }; 109*4882a593Smuzhiyun 110*4882a593Smuzhiyun struct coex_sta_8821a_2ant { 111*4882a593Smuzhiyun bool bt_link_exist; 112*4882a593Smuzhiyun bool sco_exist; 113*4882a593Smuzhiyun bool a2dp_exist; 114*4882a593Smuzhiyun bool hid_exist; 115*4882a593Smuzhiyun bool pan_exist; 116*4882a593Smuzhiyun bool under_lps; 117*4882a593Smuzhiyun bool under_ips; 118*4882a593Smuzhiyun u32 high_priority_tx; 119*4882a593Smuzhiyun u32 high_priority_rx; 120*4882a593Smuzhiyun u32 low_priority_tx; 121*4882a593Smuzhiyun u32 low_priority_rx; 122*4882a593Smuzhiyun u8 bt_rssi; 123*4882a593Smuzhiyun bool bt_tx_rx_mask; 124*4882a593Smuzhiyun u8 pre_bt_rssi_state; 125*4882a593Smuzhiyun u8 pre_wifi_rssi_state[4]; 126*4882a593Smuzhiyun bool c2h_bt_info_req_sent; 127*4882a593Smuzhiyun u8 bt_info_c2h[BT_INFO_SRC_8821A_2ANT_MAX][10]; 128*4882a593Smuzhiyun u32 bt_info_c2h_cnt[BT_INFO_SRC_8821A_2ANT_MAX]; 129*4882a593Smuzhiyun bool c2h_bt_inquiry_page; 130*4882a593Smuzhiyun u8 bt_retry_cnt; 131*4882a593Smuzhiyun u8 bt_info_ext; 132*4882a593Smuzhiyun 133*4882a593Smuzhiyun u32 crc_ok_cck; 134*4882a593Smuzhiyun u32 crc_ok_11g; 135*4882a593Smuzhiyun u32 crc_ok_11n; 136*4882a593Smuzhiyun u32 crc_ok_11n_agg; 137*4882a593Smuzhiyun 138*4882a593Smuzhiyun u32 crc_err_cck; 139*4882a593Smuzhiyun u32 crc_err_11g; 140*4882a593Smuzhiyun u32 crc_err_11n; 141*4882a593Smuzhiyun u32 crc_err_11n_agg; 142*4882a593Smuzhiyun 143*4882a593Smuzhiyun u8 coex_table_type; 144*4882a593Smuzhiyun bool force_lps_on; 145*4882a593Smuzhiyun 146*4882a593Smuzhiyun u8 dis_ver_info_cnt; 147*4882a593Smuzhiyun }; 148*4882a593Smuzhiyun 149*4882a593Smuzhiyun /*=========================================== 150*4882a593Smuzhiyun * The following is interface which will notify coex module. 151*4882a593Smuzhiyun *=========================================== 152*4882a593Smuzhiyun */ 153*4882a593Smuzhiyun void 154*4882a593Smuzhiyun ex_btc8821a2ant_init_hwconfig( 155*4882a593Smuzhiyun struct btc_coexist *btcoexist 156*4882a593Smuzhiyun ); 157*4882a593Smuzhiyun void 158*4882a593Smuzhiyun ex_btc8821a2ant_init_coex_dm( 159*4882a593Smuzhiyun struct btc_coexist *btcoexist 160*4882a593Smuzhiyun ); 161*4882a593Smuzhiyun void 162*4882a593Smuzhiyun ex_btc8821a2ant_ips_notify( 163*4882a593Smuzhiyun struct btc_coexist *btcoexist, 164*4882a593Smuzhiyun u8 type 165*4882a593Smuzhiyun ); 166*4882a593Smuzhiyun void 167*4882a593Smuzhiyun ex_btc8821a2ant_lps_notify( 168*4882a593Smuzhiyun struct btc_coexist *btcoexist, 169*4882a593Smuzhiyun u8 type 170*4882a593Smuzhiyun ); 171*4882a593Smuzhiyun void 172*4882a593Smuzhiyun ex_btc8821a2ant_scan_notify( 173*4882a593Smuzhiyun struct btc_coexist *btcoexist, 174*4882a593Smuzhiyun u8 type 175*4882a593Smuzhiyun ); 176*4882a593Smuzhiyun void 177*4882a593Smuzhiyun ex_btc8821a2ant_connect_notify( 178*4882a593Smuzhiyun struct btc_coexist *btcoexist, 179*4882a593Smuzhiyun u8 type 180*4882a593Smuzhiyun ); 181*4882a593Smuzhiyun void 182*4882a593Smuzhiyun ex_btc8821a2ant_media_status_notify( 183*4882a593Smuzhiyun struct btc_coexist *btcoexist, 184*4882a593Smuzhiyun u8 type 185*4882a593Smuzhiyun ); 186*4882a593Smuzhiyun void 187*4882a593Smuzhiyun ex_btc8821a2ant_special_packet_notify( 188*4882a593Smuzhiyun struct btc_coexist *btcoexist, 189*4882a593Smuzhiyun u8 type 190*4882a593Smuzhiyun ); 191*4882a593Smuzhiyun void 192*4882a593Smuzhiyun ex_btc8821a2ant_bt_info_notify( 193*4882a593Smuzhiyun struct btc_coexist *btcoexist, 194*4882a593Smuzhiyun u8 *tmp_buf, 195*4882a593Smuzhiyun u8 length 196*4882a593Smuzhiyun ); 197*4882a593Smuzhiyun void 198*4882a593Smuzhiyun ex_btc8821a2ant_halt_notify( 199*4882a593Smuzhiyun struct btc_coexist *btcoexist 200*4882a593Smuzhiyun ); 201*4882a593Smuzhiyun void 202*4882a593Smuzhiyun ex_btc8821a2ant_periodical( 203*4882a593Smuzhiyun struct btc_coexist *btcoexist 204*4882a593Smuzhiyun ); 205*4882a593Smuzhiyun void 206*4882a593Smuzhiyun ex_btc8821a2ant_display_coex_info( 207*4882a593Smuzhiyun struct btc_coexist *btcoexist, 208*4882a593Smuzhiyun struct seq_file *m 209*4882a593Smuzhiyun ); 210*4882a593Smuzhiyun void ex_btc8821a2ant_pnp_notify(struct btc_coexist *btcoexist, u8 pnp_state); 211*4882a593Smuzhiyun void ex_btc8821a2ant_pre_load_firmware(struct btc_coexist *btcoexist); 212