1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */
2*4882a593Smuzhiyun
3*4882a593Smuzhiyun /* Definitions for RTL8187SE hardware
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright 2009 Larry Finger <Larry.Finger@lwfinger.net>
6*4882a593Smuzhiyun * Copyright 2014 Andrea Merello <andrea.merello@gmail.com>
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * Based on the r8180 and Realtek r8187se drivers, which are:
9*4882a593Smuzhiyun * Copyright 2004-2005 Andrea Merello <andrea.merello@gmail.com>, et al.
10*4882a593Smuzhiyun *
11*4882a593Smuzhiyun * Also based on the rtl8187 driver, which is:
12*4882a593Smuzhiyun * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
13*4882a593Smuzhiyun * Copyright 2007 Andrea Merello <andrea.merello@gmail.com>
14*4882a593Smuzhiyun */
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun #ifndef RTL8187SE_RTL8225_H
17*4882a593Smuzhiyun #define RTL8187SE_RTL8225_H
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun #define RTL8225SE_ANAPARAM_ON 0xb0054d00
20*4882a593Smuzhiyun #define RTL8225SE_ANAPARAM2_ON 0x000004c6
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun /* all off except PLL */
23*4882a593Smuzhiyun #define RTL8225SE_ANAPARAM_OFF 0xb0054dec
24*4882a593Smuzhiyun /* all on including PLL */
25*4882a593Smuzhiyun #define RTL8225SE_ANAPARAM_OFF2 0xb0054dfc
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun #define RTL8225SE_ANAPARAM2_OFF 0x00ff04c6
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun #define RTL8225SE_ANAPARAM3 0x10
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun enum rtl8187se_power_state {
32*4882a593Smuzhiyun RTL8187SE_POWER_ON,
33*4882a593Smuzhiyun RTL8187SE_POWER_OFF,
34*4882a593Smuzhiyun RTL8187SE_POWER_SLEEP
35*4882a593Smuzhiyun };
36*4882a593Smuzhiyun
rtl8225se_write_phy_ofdm(struct ieee80211_hw * dev,u8 addr,u8 data)37*4882a593Smuzhiyun static inline void rtl8225se_write_phy_ofdm(struct ieee80211_hw *dev,
38*4882a593Smuzhiyun u8 addr, u8 data)
39*4882a593Smuzhiyun {
40*4882a593Smuzhiyun rtl8180_write_phy(dev, addr, data);
41*4882a593Smuzhiyun }
42*4882a593Smuzhiyun
rtl8225se_write_phy_cck(struct ieee80211_hw * dev,u8 addr,u8 data)43*4882a593Smuzhiyun static inline void rtl8225se_write_phy_cck(struct ieee80211_hw *dev,
44*4882a593Smuzhiyun u8 addr, u8 data)
45*4882a593Smuzhiyun {
46*4882a593Smuzhiyun rtl8180_write_phy(dev, addr, data | 0x10000);
47*4882a593Smuzhiyun }
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun const struct rtl818x_rf_ops *rtl8187se_detect_rf(struct ieee80211_hw *);
51*4882a593Smuzhiyun void rtl8225se_rf_stop(struct ieee80211_hw *dev);
52*4882a593Smuzhiyun void rtl8225se_rf_set_channel(struct ieee80211_hw *dev,
53*4882a593Smuzhiyun struct ieee80211_conf *conf);
54*4882a593Smuzhiyun void rtl8225se_rf_conf_erp(struct ieee80211_hw *dev,
55*4882a593Smuzhiyun struct ieee80211_bss_conf *info);
56*4882a593Smuzhiyun void rtl8225se_rf_init(struct ieee80211_hw *dev);
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun #endif /* RTL8187SE_RTL8225_H */
59