xref: /OK3568_Linux_fs/kernel/drivers/net/wireless/realtek/rtl818x/rtl8180/max2820.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Radio tuning for Maxim max2820 on RTL8180
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright 2007 Andrea Merello <andrea.merello@gmail.com>
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * Code from the BSD driver and the rtl8181 project have been
8*4882a593Smuzhiyun  * very useful to understand certain things
9*4882a593Smuzhiyun  *
10*4882a593Smuzhiyun  * I want to thanks the Authors of such projects and the Ndiswrapper
11*4882a593Smuzhiyun  * project Authors.
12*4882a593Smuzhiyun  *
13*4882a593Smuzhiyun  * A special Big Thanks also is for all people who donated me cards,
14*4882a593Smuzhiyun  * making possible the creation of the original rtl8180 driver
15*4882a593Smuzhiyun  * from which this code is derived!
16*4882a593Smuzhiyun  */
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun #include <linux/pci.h>
19*4882a593Smuzhiyun #include <linux/delay.h>
20*4882a593Smuzhiyun #include <net/mac80211.h>
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun #include "rtl8180.h"
23*4882a593Smuzhiyun #include "max2820.h"
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun static const u32 max2820_chan[] = {
26*4882a593Smuzhiyun 	12, /* CH 1 */
27*4882a593Smuzhiyun 	17,
28*4882a593Smuzhiyun 	22,
29*4882a593Smuzhiyun 	27,
30*4882a593Smuzhiyun 	32,
31*4882a593Smuzhiyun 	37,
32*4882a593Smuzhiyun 	42,
33*4882a593Smuzhiyun 	47,
34*4882a593Smuzhiyun 	52,
35*4882a593Smuzhiyun 	57,
36*4882a593Smuzhiyun 	62,
37*4882a593Smuzhiyun 	67,
38*4882a593Smuzhiyun 	72,
39*4882a593Smuzhiyun 	84, /* CH 14 */
40*4882a593Smuzhiyun };
41*4882a593Smuzhiyun 
write_max2820(struct ieee80211_hw * dev,u8 addr,u32 data)42*4882a593Smuzhiyun static void write_max2820(struct ieee80211_hw *dev, u8 addr, u32 data)
43*4882a593Smuzhiyun {
44*4882a593Smuzhiyun 	struct rtl8180_priv *priv = dev->priv;
45*4882a593Smuzhiyun 	u32 phy_config;
46*4882a593Smuzhiyun 
47*4882a593Smuzhiyun 	phy_config = 0x90 + (data & 0xf);
48*4882a593Smuzhiyun 	phy_config <<= 16;
49*4882a593Smuzhiyun 	phy_config += addr;
50*4882a593Smuzhiyun 	phy_config <<= 8;
51*4882a593Smuzhiyun 	phy_config += (data >> 4) & 0xff;
52*4882a593Smuzhiyun 
53*4882a593Smuzhiyun 	rtl818x_iowrite32(priv,
54*4882a593Smuzhiyun 		(__le32 __iomem *) &priv->map->RFPinsOutput, phy_config);
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun 	msleep(1);
57*4882a593Smuzhiyun }
58*4882a593Smuzhiyun 
max2820_write_phy_antenna(struct ieee80211_hw * dev,short chan)59*4882a593Smuzhiyun static void max2820_write_phy_antenna(struct ieee80211_hw *dev, short chan)
60*4882a593Smuzhiyun {
61*4882a593Smuzhiyun 	struct rtl8180_priv *priv = dev->priv;
62*4882a593Smuzhiyun 	u8 ant;
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun 	ant = MAXIM_ANTENNA;
65*4882a593Smuzhiyun 	if (priv->rfparam & RF_PARAM_ANTBDEFAULT)
66*4882a593Smuzhiyun 		ant |= BB_ANTENNA_B;
67*4882a593Smuzhiyun 	if (chan == 14)
68*4882a593Smuzhiyun 		ant |= BB_ANTATTEN_CHAN14;
69*4882a593Smuzhiyun 
70*4882a593Smuzhiyun 	rtl8180_write_phy(dev, 0x10, ant);
71*4882a593Smuzhiyun }
72*4882a593Smuzhiyun 
max2820_rf_calc_rssi(u8 agc,u8 sq)73*4882a593Smuzhiyun static u8 max2820_rf_calc_rssi(u8 agc, u8 sq)
74*4882a593Smuzhiyun {
75*4882a593Smuzhiyun 	bool odd;
76*4882a593Smuzhiyun 
77*4882a593Smuzhiyun 	odd = !!(agc & 1);
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun 	agc >>= 1;
80*4882a593Smuzhiyun 	if (odd)
81*4882a593Smuzhiyun 		agc += 76;
82*4882a593Smuzhiyun 	else
83*4882a593Smuzhiyun 		agc += 66;
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun 	/* TODO: change addends above to avoid mult / div below */
86*4882a593Smuzhiyun 	return 65 * agc / 100;
87*4882a593Smuzhiyun }
88*4882a593Smuzhiyun 
max2820_rf_set_channel(struct ieee80211_hw * dev,struct ieee80211_conf * conf)89*4882a593Smuzhiyun static void max2820_rf_set_channel(struct ieee80211_hw *dev,
90*4882a593Smuzhiyun 				   struct ieee80211_conf *conf)
91*4882a593Smuzhiyun {
92*4882a593Smuzhiyun 	struct rtl8180_priv *priv = dev->priv;
93*4882a593Smuzhiyun 	int channel = conf ?
94*4882a593Smuzhiyun 		ieee80211_frequency_to_channel(conf->chandef.chan->center_freq) : 1;
95*4882a593Smuzhiyun 	unsigned int chan_idx = channel - 1;
96*4882a593Smuzhiyun 	u32 txpw = priv->channels[chan_idx].hw_value & 0xFF;
97*4882a593Smuzhiyun 	u32 chan = max2820_chan[chan_idx];
98*4882a593Smuzhiyun 
99*4882a593Smuzhiyun 	/* While philips SA2400 drive the PA bias from
100*4882a593Smuzhiyun 	 * sa2400, for MAXIM we do this directly from BB */
101*4882a593Smuzhiyun 	rtl8180_write_phy(dev, 3, txpw);
102*4882a593Smuzhiyun 
103*4882a593Smuzhiyun 	max2820_write_phy_antenna(dev, channel);
104*4882a593Smuzhiyun 	write_max2820(dev, 3, chan);
105*4882a593Smuzhiyun }
106*4882a593Smuzhiyun 
max2820_rf_stop(struct ieee80211_hw * dev)107*4882a593Smuzhiyun static void max2820_rf_stop(struct ieee80211_hw *dev)
108*4882a593Smuzhiyun {
109*4882a593Smuzhiyun 	rtl8180_write_phy(dev, 3, 0x8);
110*4882a593Smuzhiyun 	write_max2820(dev, 1, 0);
111*4882a593Smuzhiyun }
112*4882a593Smuzhiyun 
113*4882a593Smuzhiyun 
max2820_rf_init(struct ieee80211_hw * dev)114*4882a593Smuzhiyun static void max2820_rf_init(struct ieee80211_hw *dev)
115*4882a593Smuzhiyun {
116*4882a593Smuzhiyun 	struct rtl8180_priv *priv = dev->priv;
117*4882a593Smuzhiyun 
118*4882a593Smuzhiyun 	/* MAXIM from netbsd driver */
119*4882a593Smuzhiyun 	write_max2820(dev, 0, 0x007); /* test mode as indicated in datasheet */
120*4882a593Smuzhiyun 	write_max2820(dev, 1, 0x01e); /* enable register */
121*4882a593Smuzhiyun 	write_max2820(dev, 2, 0x001); /* synt register */
122*4882a593Smuzhiyun 
123*4882a593Smuzhiyun 	max2820_rf_set_channel(dev, NULL);
124*4882a593Smuzhiyun 
125*4882a593Smuzhiyun 	write_max2820(dev, 4, 0x313); /* rx register */
126*4882a593Smuzhiyun 
127*4882a593Smuzhiyun 	/* PA is driven directly by the BB, we keep the MAXIM bias
128*4882a593Smuzhiyun 	 * at the highest value in case that setting it to lower
129*4882a593Smuzhiyun 	 * values may introduce some further attenuation somewhere..
130*4882a593Smuzhiyun 	 */
131*4882a593Smuzhiyun 	write_max2820(dev, 5, 0x00f);
132*4882a593Smuzhiyun 
133*4882a593Smuzhiyun 	/* baseband configuration */
134*4882a593Smuzhiyun 	rtl8180_write_phy(dev, 0, 0x88); /* sys1       */
135*4882a593Smuzhiyun 	rtl8180_write_phy(dev, 3, 0x08); /* txagc      */
136*4882a593Smuzhiyun 	rtl8180_write_phy(dev, 4, 0xf8); /* lnadet     */
137*4882a593Smuzhiyun 	rtl8180_write_phy(dev, 5, 0x90); /* ifagcinit  */
138*4882a593Smuzhiyun 	rtl8180_write_phy(dev, 6, 0x1a); /* ifagclimit */
139*4882a593Smuzhiyun 	rtl8180_write_phy(dev, 7, 0x64); /* ifagcdet   */
140*4882a593Smuzhiyun 
141*4882a593Smuzhiyun 	max2820_write_phy_antenna(dev, 1);
142*4882a593Smuzhiyun 
143*4882a593Smuzhiyun 	rtl8180_write_phy(dev, 0x11, 0x88); /* trl */
144*4882a593Smuzhiyun 
145*4882a593Smuzhiyun 	if (rtl818x_ioread8(priv, &priv->map->CONFIG2) &
146*4882a593Smuzhiyun 	    RTL818X_CONFIG2_ANTENNA_DIV)
147*4882a593Smuzhiyun 		rtl8180_write_phy(dev, 0x12, 0xc7);
148*4882a593Smuzhiyun 	else
149*4882a593Smuzhiyun 		rtl8180_write_phy(dev, 0x12, 0x47);
150*4882a593Smuzhiyun 
151*4882a593Smuzhiyun 	rtl8180_write_phy(dev, 0x13, 0x9b);
152*4882a593Smuzhiyun 
153*4882a593Smuzhiyun 	rtl8180_write_phy(dev, 0x19, 0x0);  /* CHESTLIM */
154*4882a593Smuzhiyun 	rtl8180_write_phy(dev, 0x1a, 0x9f); /* CHSQLIM  */
155*4882a593Smuzhiyun 
156*4882a593Smuzhiyun 	max2820_rf_set_channel(dev, NULL);
157*4882a593Smuzhiyun }
158*4882a593Smuzhiyun 
159*4882a593Smuzhiyun const struct rtl818x_rf_ops max2820_rf_ops = {
160*4882a593Smuzhiyun 	.name		= "Maxim",
161*4882a593Smuzhiyun 	.init		= max2820_rf_init,
162*4882a593Smuzhiyun 	.stop		= max2820_rf_stop,
163*4882a593Smuzhiyun 	.set_chan	= max2820_rf_set_channel,
164*4882a593Smuzhiyun 	.calc_rssi	= max2820_rf_calc_rssi,
165*4882a593Smuzhiyun };
166