xref: /OK3568_Linux_fs/kernel/drivers/net/wireless/realtek/rtl818x/rtl8180/grf5101.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun 
3*4882a593Smuzhiyun /*
4*4882a593Smuzhiyun  * Radio tuning for GCT GRF5101 on RTL8180
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  * Copyright 2007 Andrea Merello <andrea.merello@gmail.com>
7*4882a593Smuzhiyun  *
8*4882a593Smuzhiyun  * Code from the BSD driver and the rtl8181 project have been
9*4882a593Smuzhiyun  * very useful to understand certain things
10*4882a593Smuzhiyun  *
11*4882a593Smuzhiyun  * I want to thanks the Authors of such projects and the Ndiswrapper
12*4882a593Smuzhiyun  * project Authors.
13*4882a593Smuzhiyun  *
14*4882a593Smuzhiyun  * A special Big Thanks also is for all people who donated me cards,
15*4882a593Smuzhiyun  * making possible the creation of the original rtl8180 driver
16*4882a593Smuzhiyun  * from which this code is derived!
17*4882a593Smuzhiyun  */
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun #include <linux/pci.h>
20*4882a593Smuzhiyun #include <linux/delay.h>
21*4882a593Smuzhiyun #include <net/mac80211.h>
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun #include "rtl8180.h"
24*4882a593Smuzhiyun #include "grf5101.h"
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun static const int grf5101_encode[] = {
27*4882a593Smuzhiyun 	0x0, 0x8, 0x4, 0xC,
28*4882a593Smuzhiyun 	0x2, 0xA, 0x6, 0xE,
29*4882a593Smuzhiyun 	0x1, 0x9, 0x5, 0xD,
30*4882a593Smuzhiyun 	0x3, 0xB, 0x7, 0xF
31*4882a593Smuzhiyun };
32*4882a593Smuzhiyun 
write_grf5101(struct ieee80211_hw * dev,u8 addr,u32 data)33*4882a593Smuzhiyun static void write_grf5101(struct ieee80211_hw *dev, u8 addr, u32 data)
34*4882a593Smuzhiyun {
35*4882a593Smuzhiyun 	struct rtl8180_priv *priv = dev->priv;
36*4882a593Smuzhiyun 	u32 phy_config;
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun 	phy_config =  grf5101_encode[(data >> 8) & 0xF];
39*4882a593Smuzhiyun 	phy_config |= grf5101_encode[(data >> 4) & 0xF] << 4;
40*4882a593Smuzhiyun 	phy_config |= grf5101_encode[data & 0xF] << 8;
41*4882a593Smuzhiyun 	phy_config |= grf5101_encode[(addr >> 1) & 0xF] << 12;
42*4882a593Smuzhiyun 	phy_config |= (addr & 1) << 16;
43*4882a593Smuzhiyun 	phy_config |= grf5101_encode[(data & 0xf000) >> 12] << 24;
44*4882a593Smuzhiyun 
45*4882a593Smuzhiyun 	/* MAC will bang bits to the chip */
46*4882a593Smuzhiyun 	phy_config |= 0x90000000;
47*4882a593Smuzhiyun 
48*4882a593Smuzhiyun 	rtl818x_iowrite32(priv,
49*4882a593Smuzhiyun 		(__le32 __iomem *) &priv->map->RFPinsOutput, phy_config);
50*4882a593Smuzhiyun 
51*4882a593Smuzhiyun 	msleep(3);
52*4882a593Smuzhiyun }
53*4882a593Smuzhiyun 
grf5101_write_phy_antenna(struct ieee80211_hw * dev,short chan)54*4882a593Smuzhiyun static void grf5101_write_phy_antenna(struct ieee80211_hw *dev, short chan)
55*4882a593Smuzhiyun {
56*4882a593Smuzhiyun 	struct rtl8180_priv *priv = dev->priv;
57*4882a593Smuzhiyun 	u8 ant = GRF5101_ANTENNA;
58*4882a593Smuzhiyun 
59*4882a593Smuzhiyun 	if (priv->rfparam & RF_PARAM_ANTBDEFAULT)
60*4882a593Smuzhiyun 		ant |= BB_ANTENNA_B;
61*4882a593Smuzhiyun 
62*4882a593Smuzhiyun 	if (chan == 14)
63*4882a593Smuzhiyun 		ant |= BB_ANTATTEN_CHAN14;
64*4882a593Smuzhiyun 
65*4882a593Smuzhiyun 	rtl8180_write_phy(dev, 0x10, ant);
66*4882a593Smuzhiyun }
67*4882a593Smuzhiyun 
grf5101_rf_calc_rssi(u8 agc,u8 sq)68*4882a593Smuzhiyun static u8 grf5101_rf_calc_rssi(u8 agc, u8 sq)
69*4882a593Smuzhiyun {
70*4882a593Smuzhiyun 	if (agc > 60)
71*4882a593Smuzhiyun 		return 65;
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun 	/* TODO(?): just return agc (or agc + 5) to avoid mult / div */
74*4882a593Smuzhiyun 	return 65 * agc / 60;
75*4882a593Smuzhiyun }
76*4882a593Smuzhiyun 
grf5101_rf_set_channel(struct ieee80211_hw * dev,struct ieee80211_conf * conf)77*4882a593Smuzhiyun static void grf5101_rf_set_channel(struct ieee80211_hw *dev,
78*4882a593Smuzhiyun 				   struct ieee80211_conf *conf)
79*4882a593Smuzhiyun {
80*4882a593Smuzhiyun 	struct rtl8180_priv *priv = dev->priv;
81*4882a593Smuzhiyun 	int channel =
82*4882a593Smuzhiyun 		ieee80211_frequency_to_channel(conf->chandef.chan->center_freq);
83*4882a593Smuzhiyun 	u32 txpw = priv->channels[channel - 1].hw_value & 0xFF;
84*4882a593Smuzhiyun 	u32 chan = channel - 1;
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun 	/* set TX power */
87*4882a593Smuzhiyun 	write_grf5101(dev, 0x15, 0x0);
88*4882a593Smuzhiyun 	write_grf5101(dev, 0x06, txpw);
89*4882a593Smuzhiyun 	write_grf5101(dev, 0x15, 0x10);
90*4882a593Smuzhiyun 	write_grf5101(dev, 0x15, 0x0);
91*4882a593Smuzhiyun 
92*4882a593Smuzhiyun 	/* set frequency */
93*4882a593Smuzhiyun 	write_grf5101(dev, 0x07, 0x0);
94*4882a593Smuzhiyun 	write_grf5101(dev, 0x0B, chan);
95*4882a593Smuzhiyun 	write_grf5101(dev, 0x07, 0x1000);
96*4882a593Smuzhiyun 
97*4882a593Smuzhiyun 	grf5101_write_phy_antenna(dev, channel);
98*4882a593Smuzhiyun }
99*4882a593Smuzhiyun 
grf5101_rf_stop(struct ieee80211_hw * dev)100*4882a593Smuzhiyun static void grf5101_rf_stop(struct ieee80211_hw *dev)
101*4882a593Smuzhiyun {
102*4882a593Smuzhiyun 	struct rtl8180_priv *priv = dev->priv;
103*4882a593Smuzhiyun 	u32 anaparam;
104*4882a593Smuzhiyun 
105*4882a593Smuzhiyun 	anaparam = priv->anaparam;
106*4882a593Smuzhiyun 	anaparam &= 0x000fffff;
107*4882a593Smuzhiyun 	anaparam |= 0x3f900000;
108*4882a593Smuzhiyun 	rtl8180_set_anaparam(priv, anaparam);
109*4882a593Smuzhiyun 
110*4882a593Smuzhiyun 	write_grf5101(dev, 0x07, 0x0);
111*4882a593Smuzhiyun 	write_grf5101(dev, 0x1f, 0x45);
112*4882a593Smuzhiyun 	write_grf5101(dev, 0x1f, 0x5);
113*4882a593Smuzhiyun 	write_grf5101(dev, 0x00, 0x8e4);
114*4882a593Smuzhiyun }
115*4882a593Smuzhiyun 
grf5101_rf_init(struct ieee80211_hw * dev)116*4882a593Smuzhiyun static void grf5101_rf_init(struct ieee80211_hw *dev)
117*4882a593Smuzhiyun {
118*4882a593Smuzhiyun 	struct rtl8180_priv *priv = dev->priv;
119*4882a593Smuzhiyun 
120*4882a593Smuzhiyun 	rtl8180_set_anaparam(priv, priv->anaparam);
121*4882a593Smuzhiyun 
122*4882a593Smuzhiyun 	write_grf5101(dev, 0x1f, 0x0);
123*4882a593Smuzhiyun 	write_grf5101(dev, 0x1f, 0x0);
124*4882a593Smuzhiyun 	write_grf5101(dev, 0x1f, 0x40);
125*4882a593Smuzhiyun 	write_grf5101(dev, 0x1f, 0x60);
126*4882a593Smuzhiyun 	write_grf5101(dev, 0x1f, 0x61);
127*4882a593Smuzhiyun 	write_grf5101(dev, 0x1f, 0x61);
128*4882a593Smuzhiyun 	write_grf5101(dev, 0x00, 0xae4);
129*4882a593Smuzhiyun 	write_grf5101(dev, 0x1f, 0x1);
130*4882a593Smuzhiyun 	write_grf5101(dev, 0x1f, 0x41);
131*4882a593Smuzhiyun 	write_grf5101(dev, 0x1f, 0x61);
132*4882a593Smuzhiyun 
133*4882a593Smuzhiyun 	write_grf5101(dev, 0x01, 0x1a23);
134*4882a593Smuzhiyun 	write_grf5101(dev, 0x02, 0x4971);
135*4882a593Smuzhiyun 	write_grf5101(dev, 0x03, 0x41de);
136*4882a593Smuzhiyun 	write_grf5101(dev, 0x04, 0x2d80);
137*4882a593Smuzhiyun 	write_grf5101(dev, 0x05, 0x68ff);	/* 0x61ff original value */
138*4882a593Smuzhiyun 	write_grf5101(dev, 0x06, 0x0);
139*4882a593Smuzhiyun 	write_grf5101(dev, 0x07, 0x0);
140*4882a593Smuzhiyun 	write_grf5101(dev, 0x08, 0x7533);
141*4882a593Smuzhiyun 	write_grf5101(dev, 0x09, 0xc401);
142*4882a593Smuzhiyun 	write_grf5101(dev, 0x0a, 0x0);
143*4882a593Smuzhiyun 	write_grf5101(dev, 0x0c, 0x1c7);
144*4882a593Smuzhiyun 	write_grf5101(dev, 0x0d, 0x29d3);
145*4882a593Smuzhiyun 	write_grf5101(dev, 0x0e, 0x2e8);
146*4882a593Smuzhiyun 	write_grf5101(dev, 0x10, 0x192);
147*4882a593Smuzhiyun 	write_grf5101(dev, 0x11, 0x248);
148*4882a593Smuzhiyun 	write_grf5101(dev, 0x12, 0x0);
149*4882a593Smuzhiyun 	write_grf5101(dev, 0x13, 0x20c4);
150*4882a593Smuzhiyun 	write_grf5101(dev, 0x14, 0xf4fc);
151*4882a593Smuzhiyun 	write_grf5101(dev, 0x15, 0x0);
152*4882a593Smuzhiyun 	write_grf5101(dev, 0x16, 0x1500);
153*4882a593Smuzhiyun 
154*4882a593Smuzhiyun 	write_grf5101(dev, 0x07, 0x1000);
155*4882a593Smuzhiyun 
156*4882a593Smuzhiyun 	/* baseband configuration */
157*4882a593Smuzhiyun 	rtl8180_write_phy(dev, 0, 0xa8);
158*4882a593Smuzhiyun 	rtl8180_write_phy(dev, 3, 0x0);
159*4882a593Smuzhiyun 	rtl8180_write_phy(dev, 4, 0xc0);
160*4882a593Smuzhiyun 	rtl8180_write_phy(dev, 5, 0x90);
161*4882a593Smuzhiyun 	rtl8180_write_phy(dev, 6, 0x1e);
162*4882a593Smuzhiyun 	rtl8180_write_phy(dev, 7, 0x64);
163*4882a593Smuzhiyun 
164*4882a593Smuzhiyun 	grf5101_write_phy_antenna(dev, 1);
165*4882a593Smuzhiyun 
166*4882a593Smuzhiyun 	rtl8180_write_phy(dev, 0x11, 0x88);
167*4882a593Smuzhiyun 
168*4882a593Smuzhiyun 	if (rtl818x_ioread8(priv, &priv->map->CONFIG2) &
169*4882a593Smuzhiyun 	    RTL818X_CONFIG2_ANTENNA_DIV)
170*4882a593Smuzhiyun 		rtl8180_write_phy(dev, 0x12, 0xc0); /* enable ant diversity */
171*4882a593Smuzhiyun 	else
172*4882a593Smuzhiyun 		rtl8180_write_phy(dev, 0x12, 0x40); /* disable ant diversity */
173*4882a593Smuzhiyun 
174*4882a593Smuzhiyun 	rtl8180_write_phy(dev, 0x13, 0x90 | priv->csthreshold);
175*4882a593Smuzhiyun 
176*4882a593Smuzhiyun 	rtl8180_write_phy(dev, 0x19, 0x0);
177*4882a593Smuzhiyun 	rtl8180_write_phy(dev, 0x1a, 0xa0);
178*4882a593Smuzhiyun 	rtl8180_write_phy(dev, 0x1b, 0x44);
179*4882a593Smuzhiyun }
180*4882a593Smuzhiyun 
181*4882a593Smuzhiyun const struct rtl818x_rf_ops grf5101_rf_ops = {
182*4882a593Smuzhiyun 	.name		= "GCT",
183*4882a593Smuzhiyun 	.init		= grf5101_rf_init,
184*4882a593Smuzhiyun 	.stop		= grf5101_rf_stop,
185*4882a593Smuzhiyun 	.set_chan	= grf5101_rf_set_channel,
186*4882a593Smuzhiyun 	.calc_rssi	= grf5101_rf_calc_rssi,
187*4882a593Smuzhiyun };
188