1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun #ifndef _RAYCTL_H_ 3*4882a593Smuzhiyun #define _RAYCTL_H_ 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun typedef unsigned char UCHAR; 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun /****** IEEE 802.11 constants ************************************************/ 8*4882a593Smuzhiyun #define ADDRLEN 6 9*4882a593Smuzhiyun /* Frame control 1 bit fields */ 10*4882a593Smuzhiyun #define PROTOCOL_VER 0x00 11*4882a593Smuzhiyun #define DATA_TYPE 0x08 12*4882a593Smuzhiyun #define ASSOC_REQ_TYPE 0x00 13*4882a593Smuzhiyun #define ASSOC_RESP_TYPE 0x10 14*4882a593Smuzhiyun #define REASSOC_REQ_TYPE 0x20 15*4882a593Smuzhiyun #define REASSOC_RESP_TYPE 0x30 16*4882a593Smuzhiyun #define NULL_MSG_TYPE 0x48 17*4882a593Smuzhiyun #define BEACON_TYPE 0x80 18*4882a593Smuzhiyun #define DISASSOC_TYPE 0xA0 19*4882a593Smuzhiyun #define PSPOLL_TYPE 0xA4 20*4882a593Smuzhiyun #define AUTHENTIC_TYPE 0xB0 21*4882a593Smuzhiyun #define DEAUTHENTIC_TYPE 0xC0 22*4882a593Smuzhiyun /* Frame control 2 bit fields */ 23*4882a593Smuzhiyun #define FC2_TO_DS 0x01 24*4882a593Smuzhiyun #define FC2_FROM_DS 0x02 25*4882a593Smuzhiyun #define FC2_MORE_FRAG 0x04 26*4882a593Smuzhiyun #define FC2_RETRY 0x08 27*4882a593Smuzhiyun #define FC2_PSM 0x10 28*4882a593Smuzhiyun #define FC2_MORE_DATA 0x20 29*4882a593Smuzhiyun #define FC2_WEP 0x40 30*4882a593Smuzhiyun #define FC2_ORDER 0x80 31*4882a593Smuzhiyun /*****************************************************************************/ 32*4882a593Smuzhiyun /* 802.11 element ID's and lengths */ 33*4882a593Smuzhiyun #define C_BP_CAPABILITY_ESS 0x01 34*4882a593Smuzhiyun #define C_BP_CAPABILITY_IBSS 0x02 35*4882a593Smuzhiyun #define C_BP_CAPABILITY_CF_POLLABLE 0x04 36*4882a593Smuzhiyun #define C_BP_CAPABILITY_CF_POLL_REQUEST 0x08 37*4882a593Smuzhiyun #define C_BP_CAPABILITY_PRIVACY 0x10 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun #define C_ESSID_ELEMENT_ID 0 40*4882a593Smuzhiyun #define C_ESSID_ELEMENT_MAX_LENGTH 32 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun #define C_SUPPORTED_RATES_ELEMENT_ID 1 43*4882a593Smuzhiyun #define C_SUPPORTED_RATES_ELEMENT_LENGTH 2 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun #define C_FH_PARAM_SET_ELEMENT_ID 2 46*4882a593Smuzhiyun #define C_FH_PARAM_SET_ELEMENT_LNGTH 5 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun #define C_CF_PARAM_SET_ELEMENT_ID 4 49*4882a593Smuzhiyun #define C_CF_PARAM_SET_ELEMENT_LNGTH 6 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun #define C_TIM_ELEMENT_ID 5 52*4882a593Smuzhiyun #define C_TIM_BITMAP_LENGTH 251 53*4882a593Smuzhiyun #define C_TIM_BMCAST_BIT 0x01 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun #define C_IBSS_ELEMENT_ID 6 56*4882a593Smuzhiyun #define C_IBSS_ELEMENT_LENGTH 2 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun #define C_JAPAN_CALL_SIGN_ELEMENT_ID 51 59*4882a593Smuzhiyun #define C_JAPAN_CALL_SIGN_ELEMENT_LNGTH 12 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun #define C_DISASSOC_REASON_CODE_LEN 2 62*4882a593Smuzhiyun #define C_DISASSOC_REASON_CODE_DEFAULT 8 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun #define C_CRC_LEN 4 65*4882a593Smuzhiyun #define C_NUM_SUPPORTED_RATES 8 66*4882a593Smuzhiyun /****** IEEE 802.11 mac header for type data packets *************************/ 67*4882a593Smuzhiyun struct mac_header { 68*4882a593Smuzhiyun UCHAR frame_ctl_1; 69*4882a593Smuzhiyun UCHAR frame_ctl_2; 70*4882a593Smuzhiyun UCHAR duration_lsb; 71*4882a593Smuzhiyun UCHAR duration_msb; 72*4882a593Smuzhiyun UCHAR addr_1[ADDRLEN]; 73*4882a593Smuzhiyun UCHAR addr_2[ADDRLEN]; 74*4882a593Smuzhiyun UCHAR addr_3[ADDRLEN]; 75*4882a593Smuzhiyun UCHAR seq_frag_num[2]; 76*4882a593Smuzhiyun /* UCHAR addr_4[ADDRLEN]; *//* only present for AP to AP (TO DS and FROM DS */ 77*4882a593Smuzhiyun }; 78*4882a593Smuzhiyun /****** IEEE 802.11 frame element structures *********************************/ 79*4882a593Smuzhiyun struct essid_element 80*4882a593Smuzhiyun { 81*4882a593Smuzhiyun UCHAR id; 82*4882a593Smuzhiyun UCHAR length; 83*4882a593Smuzhiyun UCHAR text[C_ESSID_ELEMENT_MAX_LENGTH]; 84*4882a593Smuzhiyun }; 85*4882a593Smuzhiyun struct rates_element 86*4882a593Smuzhiyun { 87*4882a593Smuzhiyun UCHAR id; 88*4882a593Smuzhiyun UCHAR length; 89*4882a593Smuzhiyun UCHAR value[8]; 90*4882a593Smuzhiyun }; 91*4882a593Smuzhiyun struct freq_hop_element 92*4882a593Smuzhiyun { 93*4882a593Smuzhiyun UCHAR id; 94*4882a593Smuzhiyun UCHAR length; 95*4882a593Smuzhiyun UCHAR dwell_time[2]; 96*4882a593Smuzhiyun UCHAR hop_set; 97*4882a593Smuzhiyun UCHAR hop_pattern; 98*4882a593Smuzhiyun UCHAR hop_index; 99*4882a593Smuzhiyun }; 100*4882a593Smuzhiyun struct tim_element 101*4882a593Smuzhiyun { 102*4882a593Smuzhiyun UCHAR id; 103*4882a593Smuzhiyun UCHAR length; 104*4882a593Smuzhiyun UCHAR dtim_count; 105*4882a593Smuzhiyun UCHAR dtim_period; 106*4882a593Smuzhiyun UCHAR bitmap_control; 107*4882a593Smuzhiyun UCHAR tim[C_TIM_BITMAP_LENGTH]; 108*4882a593Smuzhiyun }; 109*4882a593Smuzhiyun struct ibss_element 110*4882a593Smuzhiyun { 111*4882a593Smuzhiyun UCHAR id; 112*4882a593Smuzhiyun UCHAR length; 113*4882a593Smuzhiyun UCHAR atim_window[2]; 114*4882a593Smuzhiyun }; 115*4882a593Smuzhiyun struct japan_call_sign_element 116*4882a593Smuzhiyun { 117*4882a593Smuzhiyun UCHAR id; 118*4882a593Smuzhiyun UCHAR length; 119*4882a593Smuzhiyun UCHAR call_sign[12]; 120*4882a593Smuzhiyun }; 121*4882a593Smuzhiyun /****** Beacon message structures ********************************************/ 122*4882a593Smuzhiyun /* .elements is a large lump of max size because elements are variable size */ 123*4882a593Smuzhiyun struct infra_beacon 124*4882a593Smuzhiyun { 125*4882a593Smuzhiyun UCHAR timestamp[8]; 126*4882a593Smuzhiyun UCHAR beacon_intvl[2]; 127*4882a593Smuzhiyun UCHAR capability[2]; 128*4882a593Smuzhiyun UCHAR elements[sizeof(struct essid_element) 129*4882a593Smuzhiyun + sizeof(struct rates_element) 130*4882a593Smuzhiyun + sizeof(struct freq_hop_element) 131*4882a593Smuzhiyun + sizeof(struct japan_call_sign_element) 132*4882a593Smuzhiyun + sizeof(struct tim_element)]; 133*4882a593Smuzhiyun }; 134*4882a593Smuzhiyun struct adhoc_beacon 135*4882a593Smuzhiyun { 136*4882a593Smuzhiyun UCHAR timestamp[8]; 137*4882a593Smuzhiyun UCHAR beacon_intvl[2]; 138*4882a593Smuzhiyun UCHAR capability[2]; 139*4882a593Smuzhiyun UCHAR elements[sizeof(struct essid_element) 140*4882a593Smuzhiyun + sizeof(struct rates_element) 141*4882a593Smuzhiyun + sizeof(struct freq_hop_element) 142*4882a593Smuzhiyun + sizeof(struct japan_call_sign_element) 143*4882a593Smuzhiyun + sizeof(struct ibss_element)]; 144*4882a593Smuzhiyun }; 145*4882a593Smuzhiyun /*****************************************************************************/ 146*4882a593Smuzhiyun /*****************************************************************************/ 147*4882a593Smuzhiyun /* #define C_MAC_HDR_2_WEP 0x40 */ 148*4882a593Smuzhiyun /* TX/RX CCS constants */ 149*4882a593Smuzhiyun #define TX_HEADER_LENGTH 0x1C 150*4882a593Smuzhiyun #define RX_MAC_HEADER_LENGTH 0x18 151*4882a593Smuzhiyun #define TX_AUTHENTICATE_LENGTH (TX_HEADER_LENGTH + 6) 152*4882a593Smuzhiyun #define TX_AUTHENTICATE_LENGTH_MSB (TX_AUTHENTICATE_LENGTH >> 8) 153*4882a593Smuzhiyun #define TX_AUTHENTICATE_LENGTH_LSB (TX_AUTHENTICATE_LENGTH & 0xff) 154*4882a593Smuzhiyun #define TX_DEAUTHENTICATE_LENGTH (TX_HEADER_LENGTH + 2) 155*4882a593Smuzhiyun #define TX_DEAUTHENTICATE_LENGTH_MSB (TX_AUTHENTICATE_LENGTH >> 8) 156*4882a593Smuzhiyun #define TX_DEAUTHENTICATE_LENGTH_LSB (TX_AUTHENTICATE_LENGTH & 0xff) 157*4882a593Smuzhiyun #define FCS_LEN 4 158*4882a593Smuzhiyun 159*4882a593Smuzhiyun #define ADHOC 0 160*4882a593Smuzhiyun #define INFRA 1 161*4882a593Smuzhiyun 162*4882a593Smuzhiyun #define TYPE_STA 0 163*4882a593Smuzhiyun #define TYPE_AP 1 164*4882a593Smuzhiyun 165*4882a593Smuzhiyun #define PASSIVE_SCAN 1 166*4882a593Smuzhiyun #define ACTIVE_SCAN 1 167*4882a593Smuzhiyun 168*4882a593Smuzhiyun #define PSM_CAM 0 169*4882a593Smuzhiyun 170*4882a593Smuzhiyun /* Country codes */ 171*4882a593Smuzhiyun #define USA 1 172*4882a593Smuzhiyun #define EUROPE 2 173*4882a593Smuzhiyun #define JAPAN 3 174*4882a593Smuzhiyun #define KOREA 4 175*4882a593Smuzhiyun #define SPAIN 5 176*4882a593Smuzhiyun #define FRANCE 6 177*4882a593Smuzhiyun #define ISRAEL 7 178*4882a593Smuzhiyun #define AUSTRALIA 8 179*4882a593Smuzhiyun #define JAPAN_TEST 9 180*4882a593Smuzhiyun 181*4882a593Smuzhiyun /* Hop pattern lengths */ 182*4882a593Smuzhiyun #define USA_HOP_MOD 79 183*4882a593Smuzhiyun #define EUROPE_HOP_MOD 79 184*4882a593Smuzhiyun #define JAPAN_HOP_MOD 23 185*4882a593Smuzhiyun #define KOREA_HOP_MOD 23 186*4882a593Smuzhiyun #define SPAIN_HOP_MOD 27 187*4882a593Smuzhiyun #define FRANCE_HOP_MOD 35 188*4882a593Smuzhiyun #define ISRAEL_HOP_MOD 35 189*4882a593Smuzhiyun #define AUSTRALIA_HOP_MOD 47 190*4882a593Smuzhiyun #define JAPAN_TEST_HOP_MOD 23 191*4882a593Smuzhiyun 192*4882a593Smuzhiyun #define ESSID_SIZE 32 193*4882a593Smuzhiyun /**********************************************************************/ 194*4882a593Smuzhiyun /* CIS Register Constants */ 195*4882a593Smuzhiyun #define CIS_OFFSET 0x0f00 196*4882a593Smuzhiyun /* Configuration Option Register (0x0F00) */ 197*4882a593Smuzhiyun #define COR_OFFSET 0x00 198*4882a593Smuzhiyun #define COR_SOFT_RESET 0x80 199*4882a593Smuzhiyun #define COR_LEVEL_IRQ 0x40 200*4882a593Smuzhiyun #define COR_CONFIG_NUM 0x01 201*4882a593Smuzhiyun #define COR_DEFAULT (COR_LEVEL_IRQ | COR_CONFIG_NUM) 202*4882a593Smuzhiyun 203*4882a593Smuzhiyun /* Card Configuration and Status Register (0x0F01) */ 204*4882a593Smuzhiyun #define CCSR_OFFSET 0x01 205*4882a593Smuzhiyun #define CCSR_HOST_INTR_PENDING 0x01 206*4882a593Smuzhiyun #define CCSR_POWER_DOWN 0x04 207*4882a593Smuzhiyun 208*4882a593Smuzhiyun /* HCS Interrupt Register (0x0F05) */ 209*4882a593Smuzhiyun #define HCS_INTR_OFFSET 0x05 210*4882a593Smuzhiyun /* #define HCS_INTR_OFFSET 0x0A */ 211*4882a593Smuzhiyun #define HCS_INTR_CLEAR 0x00 212*4882a593Smuzhiyun 213*4882a593Smuzhiyun /* ECF Interrupt Register (0x0F06) */ 214*4882a593Smuzhiyun #define ECF_INTR_OFFSET 0x06 215*4882a593Smuzhiyun /* #define ECF_INTR_OFFSET 0x0C */ 216*4882a593Smuzhiyun #define ECF_INTR_SET 0x01 217*4882a593Smuzhiyun 218*4882a593Smuzhiyun /* Authorization Register 0 (0x0F08) */ 219*4882a593Smuzhiyun #define AUTH_0_ON 0x57 220*4882a593Smuzhiyun 221*4882a593Smuzhiyun /* Authorization Register 1 (0x0F09) */ 222*4882a593Smuzhiyun #define AUTH_1_ON 0x82 223*4882a593Smuzhiyun 224*4882a593Smuzhiyun /* Program Mode Register (0x0F0A) */ 225*4882a593Smuzhiyun #define PC2PM 0x02 226*4882a593Smuzhiyun #define PC2CAL 0x10 227*4882a593Smuzhiyun #define PC2MLSE 0x20 228*4882a593Smuzhiyun 229*4882a593Smuzhiyun /* PC Test Mode Register (0x0F0B) */ 230*4882a593Smuzhiyun #define PC_TEST_MODE 0x08 231*4882a593Smuzhiyun 232*4882a593Smuzhiyun /* Frequency Control Word (0x0F10) */ 233*4882a593Smuzhiyun /* Range 0x02 - 0xA6 */ 234*4882a593Smuzhiyun 235*4882a593Smuzhiyun /* Test Mode Control 1-4 (0x0F14 - 0x0F17) */ 236*4882a593Smuzhiyun 237*4882a593Smuzhiyun /**********************************************************************/ 238*4882a593Smuzhiyun 239*4882a593Smuzhiyun /* Shared RAM Area */ 240*4882a593Smuzhiyun #define SCB_BASE 0x0000 241*4882a593Smuzhiyun #define STATUS_BASE 0x0100 242*4882a593Smuzhiyun #define HOST_TO_ECF_BASE 0x0200 243*4882a593Smuzhiyun #define ECF_TO_HOST_BASE 0x0300 244*4882a593Smuzhiyun #define CCS_BASE 0x0400 245*4882a593Smuzhiyun #define RCS_BASE 0x0800 246*4882a593Smuzhiyun #define INFRA_TIM_BASE 0x0C00 247*4882a593Smuzhiyun #define SSID_LIST_BASE 0x0D00 248*4882a593Smuzhiyun #define TX_BUF_BASE 0x1000 249*4882a593Smuzhiyun #define RX_BUF_BASE 0x8000 250*4882a593Smuzhiyun 251*4882a593Smuzhiyun #define NUMBER_OF_CCS 64 252*4882a593Smuzhiyun #define NUMBER_OF_RCS 64 253*4882a593Smuzhiyun /*#define NUMBER_OF_TX_CCS 14 */ 254*4882a593Smuzhiyun #define NUMBER_OF_TX_CCS 14 255*4882a593Smuzhiyun 256*4882a593Smuzhiyun #define TX_BUF_SIZE (2048 - sizeof(struct tx_msg)) 257*4882a593Smuzhiyun #define RX_BUFF_END 0x3FFF 258*4882a593Smuzhiyun /* Values for buffer_status */ 259*4882a593Smuzhiyun #define CCS_BUFFER_FREE 0 260*4882a593Smuzhiyun #define CCS_BUFFER_BUSY 1 261*4882a593Smuzhiyun #define CCS_COMMAND_COMPLETE 2 262*4882a593Smuzhiyun #define CCS_COMMAND_FAILED 3 263*4882a593Smuzhiyun 264*4882a593Smuzhiyun /* Values for cmd */ 265*4882a593Smuzhiyun #define CCS_DOWNLOAD_STARTUP_PARAMS 1 266*4882a593Smuzhiyun #define CCS_UPDATE_PARAMS 2 267*4882a593Smuzhiyun #define CCS_REPORT_PARAMS 3 268*4882a593Smuzhiyun #define CCS_UPDATE_MULTICAST_LIST 4 269*4882a593Smuzhiyun #define CCS_UPDATE_POWER_SAVINGS_MODE 5 270*4882a593Smuzhiyun #define CCS_START_NETWORK 6 271*4882a593Smuzhiyun #define CCS_JOIN_NETWORK 7 272*4882a593Smuzhiyun #define CCS_START_ASSOCIATION 8 273*4882a593Smuzhiyun #define CCS_TX_REQUEST 9 274*4882a593Smuzhiyun #define CCS_TEST_MEMORY 0xa 275*4882a593Smuzhiyun #define CCS_SHUTDOWN 0xb 276*4882a593Smuzhiyun #define CCS_DUMP_MEMORY 0xc 277*4882a593Smuzhiyun #define CCS_START_TIMER 0xe 278*4882a593Smuzhiyun #define CCS_LAST_CMD CCS_START_TIMER 279*4882a593Smuzhiyun 280*4882a593Smuzhiyun /* Values for link field */ 281*4882a593Smuzhiyun #define CCS_END_LIST 0xff 282*4882a593Smuzhiyun 283*4882a593Smuzhiyun /* values for buffer_status field */ 284*4882a593Smuzhiyun #define RCS_BUFFER_FREE 0 285*4882a593Smuzhiyun #define RCS_BUFFER_BUSY 1 286*4882a593Smuzhiyun #define RCS_COMPLETE 2 287*4882a593Smuzhiyun #define RCS_FAILED 3 288*4882a593Smuzhiyun #define RCS_BUFFER_RELEASE 0xFF 289*4882a593Smuzhiyun 290*4882a593Smuzhiyun /* values for interrupt_id field */ 291*4882a593Smuzhiyun #define PROCESS_RX_PACKET 0x80 /* */ 292*4882a593Smuzhiyun #define REJOIN_NET_COMPLETE 0x81 /* RCS ID: Rejoin Net Complete */ 293*4882a593Smuzhiyun #define ROAMING_INITIATED 0x82 /* RCS ID: Roaming Initiated */ 294*4882a593Smuzhiyun #define JAPAN_CALL_SIGN_RXD 0x83 /* RCS ID: New Japan Call Sign */ 295*4882a593Smuzhiyun 296*4882a593Smuzhiyun /*****************************************************************************/ 297*4882a593Smuzhiyun /* Memory types for dump memory command */ 298*4882a593Smuzhiyun #define C_MEM_PROG 0 299*4882a593Smuzhiyun #define C_MEM_XDATA 1 300*4882a593Smuzhiyun #define C_MEM_SFR 2 301*4882a593Smuzhiyun #define C_MEM_IDATA 3 302*4882a593Smuzhiyun 303*4882a593Smuzhiyun /*** Return values for hw_xmit **********/ 304*4882a593Smuzhiyun #define XMIT_OK (0) 305*4882a593Smuzhiyun #define XMIT_MSG_BAD (-1) 306*4882a593Smuzhiyun #define XMIT_NO_CCS (-2) 307*4882a593Smuzhiyun #define XMIT_NO_INTR (-3) 308*4882a593Smuzhiyun #define XMIT_NEED_AUTH (-4) 309*4882a593Smuzhiyun 310*4882a593Smuzhiyun /*** Values for card status */ 311*4882a593Smuzhiyun #define CARD_INSERTED (0) 312*4882a593Smuzhiyun 313*4882a593Smuzhiyun #define CARD_AWAITING_PARAM (1) 314*4882a593Smuzhiyun #define CARD_INIT_ERROR (11) 315*4882a593Smuzhiyun 316*4882a593Smuzhiyun #define CARD_DL_PARAM (2) 317*4882a593Smuzhiyun #define CARD_DL_PARAM_ERROR (12) 318*4882a593Smuzhiyun 319*4882a593Smuzhiyun #define CARD_DOING_ACQ (3) 320*4882a593Smuzhiyun 321*4882a593Smuzhiyun #define CARD_ACQ_COMPLETE (4) 322*4882a593Smuzhiyun #define CARD_ACQ_FAILED (14) 323*4882a593Smuzhiyun 324*4882a593Smuzhiyun #define CARD_AUTH_COMPLETE (5) 325*4882a593Smuzhiyun #define CARD_AUTH_REFUSED (15) 326*4882a593Smuzhiyun 327*4882a593Smuzhiyun #define CARD_ASSOC_COMPLETE (6) 328*4882a593Smuzhiyun #define CARD_ASSOC_FAILED (16) 329*4882a593Smuzhiyun 330*4882a593Smuzhiyun /*** Values for authentication_state ***********************************/ 331*4882a593Smuzhiyun #define UNAUTHENTICATED (0) 332*4882a593Smuzhiyun #define AWAITING_RESPONSE (1) 333*4882a593Smuzhiyun #define AUTHENTICATED (2) 334*4882a593Smuzhiyun #define NEED_TO_AUTH (3) 335*4882a593Smuzhiyun 336*4882a593Smuzhiyun /*** Values for authentication type ************************************/ 337*4882a593Smuzhiyun #define OPEN_AUTH_REQUEST (1) 338*4882a593Smuzhiyun #define OPEN_AUTH_RESPONSE (2) 339*4882a593Smuzhiyun #define BROADCAST_DEAUTH (0xc0) 340*4882a593Smuzhiyun /*** Values for timer functions ****************************************/ 341*4882a593Smuzhiyun #define TODO_NOTHING (0) 342*4882a593Smuzhiyun #define TODO_VERIFY_DL_START (-1) 343*4882a593Smuzhiyun #define TODO_START_NET (-2) 344*4882a593Smuzhiyun #define TODO_JOIN_NET (-3) 345*4882a593Smuzhiyun #define TODO_AUTHENTICATE_TIMEOUT (-4) 346*4882a593Smuzhiyun #define TODO_SEND_CCS (-5) 347*4882a593Smuzhiyun /***********************************************************************/ 348*4882a593Smuzhiyun /* Parameter passing structure for update/report parameter CCS's */ 349*4882a593Smuzhiyun struct object_id { 350*4882a593Smuzhiyun void *object_addr; 351*4882a593Smuzhiyun unsigned char object_length; 352*4882a593Smuzhiyun }; 353*4882a593Smuzhiyun 354*4882a593Smuzhiyun #define OBJID_network_type 0 355*4882a593Smuzhiyun #define OBJID_acting_as_ap_status 1 356*4882a593Smuzhiyun #define OBJID_current_ess_id 2 357*4882a593Smuzhiyun #define OBJID_scanning_mode 3 358*4882a593Smuzhiyun #define OBJID_power_mgt_state 4 359*4882a593Smuzhiyun #define OBJID_mac_address 5 360*4882a593Smuzhiyun #define OBJID_frag_threshold 6 361*4882a593Smuzhiyun #define OBJID_hop_time 7 362*4882a593Smuzhiyun #define OBJID_beacon_period 8 363*4882a593Smuzhiyun #define OBJID_dtim_period 9 364*4882a593Smuzhiyun #define OBJID_retry_max 10 365*4882a593Smuzhiyun #define OBJID_ack_timeout 11 366*4882a593Smuzhiyun #define OBJID_sifs 12 367*4882a593Smuzhiyun #define OBJID_difs 13 368*4882a593Smuzhiyun #define OBJID_pifs 14 369*4882a593Smuzhiyun #define OBJID_rts_threshold 15 370*4882a593Smuzhiyun #define OBJID_scan_dwell_time 16 371*4882a593Smuzhiyun #define OBJID_max_scan_dwell_time 17 372*4882a593Smuzhiyun #define OBJID_assoc_resp_timeout 18 373*4882a593Smuzhiyun #define OBJID_adhoc_scan_cycle_max 19 374*4882a593Smuzhiyun #define OBJID_infra_scan_cycle_max 20 375*4882a593Smuzhiyun #define OBJID_infra_super_cycle_max 21 376*4882a593Smuzhiyun #define OBJID_promiscuous_mode 22 377*4882a593Smuzhiyun #define OBJID_unique_word 23 378*4882a593Smuzhiyun #define OBJID_slot_time 24 379*4882a593Smuzhiyun #define OBJID_roaming_low_snr 25 380*4882a593Smuzhiyun #define OBJID_low_snr_count_thresh 26 381*4882a593Smuzhiyun #define OBJID_infra_missed_bcn 27 382*4882a593Smuzhiyun #define OBJID_adhoc_missed_bcn 28 383*4882a593Smuzhiyun #define OBJID_curr_country_code 29 384*4882a593Smuzhiyun #define OBJID_hop_pattern 30 385*4882a593Smuzhiyun #define OBJID_reserved 31 386*4882a593Smuzhiyun #define OBJID_cw_max_msb 32 387*4882a593Smuzhiyun #define OBJID_cw_min_msb 33 388*4882a593Smuzhiyun #define OBJID_noise_filter_gain 34 389*4882a593Smuzhiyun #define OBJID_noise_limit_offset 35 390*4882a593Smuzhiyun #define OBJID_det_rssi_thresh_offset 36 391*4882a593Smuzhiyun #define OBJID_med_busy_thresh_offset 37 392*4882a593Smuzhiyun #define OBJID_det_sync_thresh 38 393*4882a593Smuzhiyun #define OBJID_test_mode 39 394*4882a593Smuzhiyun #define OBJID_test_min_chan_num 40 395*4882a593Smuzhiyun #define OBJID_test_max_chan_num 41 396*4882a593Smuzhiyun #define OBJID_allow_bcast_ID_prbrsp 42 397*4882a593Smuzhiyun #define OBJID_privacy_must_start 43 398*4882a593Smuzhiyun #define OBJID_privacy_can_join 44 399*4882a593Smuzhiyun #define OBJID_basic_rate_set 45 400*4882a593Smuzhiyun 401*4882a593Smuzhiyun /**** Configuration/Status/Control Area ***************************/ 402*4882a593Smuzhiyun /* System Control Block (SCB) Area 403*4882a593Smuzhiyun * Located at Shared RAM offset 0 404*4882a593Smuzhiyun */ 405*4882a593Smuzhiyun struct scb { 406*4882a593Smuzhiyun UCHAR ccs_index; 407*4882a593Smuzhiyun UCHAR rcs_index; 408*4882a593Smuzhiyun }; 409*4882a593Smuzhiyun 410*4882a593Smuzhiyun /****** Status area at Shared RAM offset 0x0100 ******************************/ 411*4882a593Smuzhiyun struct status { 412*4882a593Smuzhiyun UCHAR mrx_overflow_for_host; /* 0=ECF may write, 1=host may write*/ 413*4882a593Smuzhiyun UCHAR mrx_checksum_error_for_host; /* 0=ECF may write, 1=host may write*/ 414*4882a593Smuzhiyun UCHAR rx_hec_error_for_host; /* 0=ECF may write, 1=host may write*/ 415*4882a593Smuzhiyun UCHAR reserved1; 416*4882a593Smuzhiyun short mrx_overflow; /* ECF increments on rx overflow */ 417*4882a593Smuzhiyun short mrx_checksum_error; /* ECF increments on rx CRC error */ 418*4882a593Smuzhiyun short rx_hec_error; /* ECF incs on mac header CRC error */ 419*4882a593Smuzhiyun UCHAR rxnoise; /* Average RSL measurement */ 420*4882a593Smuzhiyun }; 421*4882a593Smuzhiyun 422*4882a593Smuzhiyun /****** Host-to-ECF Data Area at Shared RAM offset 0x200 *********************/ 423*4882a593Smuzhiyun struct host_to_ecf_area { 424*4882a593Smuzhiyun 425*4882a593Smuzhiyun }; 426*4882a593Smuzhiyun 427*4882a593Smuzhiyun /****** ECF-to-Host Data Area at Shared RAM offset 0x0300 ********************/ 428*4882a593Smuzhiyun struct startup_res_518 { 429*4882a593Smuzhiyun UCHAR startup_word; 430*4882a593Smuzhiyun UCHAR station_addr[ADDRLEN]; 431*4882a593Smuzhiyun UCHAR calc_prog_chksum; 432*4882a593Smuzhiyun UCHAR calc_cis_chksum; 433*4882a593Smuzhiyun UCHAR ecf_spare[7]; 434*4882a593Smuzhiyun UCHAR japan_call_sign[12]; 435*4882a593Smuzhiyun }; 436*4882a593Smuzhiyun 437*4882a593Smuzhiyun struct startup_res_6 { 438*4882a593Smuzhiyun UCHAR startup_word; 439*4882a593Smuzhiyun UCHAR station_addr[ADDRLEN]; 440*4882a593Smuzhiyun UCHAR reserved; 441*4882a593Smuzhiyun UCHAR supp_rates[8]; 442*4882a593Smuzhiyun UCHAR japan_call_sign[12]; 443*4882a593Smuzhiyun UCHAR calc_prog_chksum; 444*4882a593Smuzhiyun UCHAR calc_cis_chksum; 445*4882a593Smuzhiyun UCHAR firmware_version[3]; 446*4882a593Smuzhiyun UCHAR asic_version; 447*4882a593Smuzhiyun UCHAR tib_length; 448*4882a593Smuzhiyun }; 449*4882a593Smuzhiyun 450*4882a593Smuzhiyun struct start_join_net_params { 451*4882a593Smuzhiyun UCHAR net_type; 452*4882a593Smuzhiyun UCHAR ssid[ESSID_SIZE]; 453*4882a593Smuzhiyun UCHAR reserved; 454*4882a593Smuzhiyun UCHAR privacy_can_join; 455*4882a593Smuzhiyun }; 456*4882a593Smuzhiyun 457*4882a593Smuzhiyun /****** Command Control Structure area at Shared ram offset 0x0400 ***********/ 458*4882a593Smuzhiyun /* Structures for command specific parameters (ccs.var) */ 459*4882a593Smuzhiyun struct update_param_cmd { 460*4882a593Smuzhiyun UCHAR object_id; 461*4882a593Smuzhiyun UCHAR number_objects; 462*4882a593Smuzhiyun UCHAR failure_cause; 463*4882a593Smuzhiyun }; 464*4882a593Smuzhiyun struct report_param_cmd { 465*4882a593Smuzhiyun UCHAR object_id; 466*4882a593Smuzhiyun UCHAR number_objects; 467*4882a593Smuzhiyun UCHAR failure_cause; 468*4882a593Smuzhiyun UCHAR length; 469*4882a593Smuzhiyun }; 470*4882a593Smuzhiyun struct start_network_cmd { 471*4882a593Smuzhiyun UCHAR update_param; 472*4882a593Smuzhiyun UCHAR bssid[ADDRLEN]; 473*4882a593Smuzhiyun UCHAR net_initiated; 474*4882a593Smuzhiyun UCHAR net_default_tx_rate; 475*4882a593Smuzhiyun UCHAR encryption; 476*4882a593Smuzhiyun }; 477*4882a593Smuzhiyun struct join_network_cmd { 478*4882a593Smuzhiyun UCHAR update_param; 479*4882a593Smuzhiyun UCHAR bssid[ADDRLEN]; 480*4882a593Smuzhiyun UCHAR net_initiated; 481*4882a593Smuzhiyun UCHAR net_default_tx_rate; 482*4882a593Smuzhiyun UCHAR encryption; 483*4882a593Smuzhiyun }; 484*4882a593Smuzhiyun struct tx_requested_cmd { 485*4882a593Smuzhiyun 486*4882a593Smuzhiyun UCHAR tx_data_ptr[2]; 487*4882a593Smuzhiyun UCHAR tx_data_length[2]; 488*4882a593Smuzhiyun UCHAR host_reserved[2]; 489*4882a593Smuzhiyun UCHAR reserved[3]; 490*4882a593Smuzhiyun UCHAR tx_rate; 491*4882a593Smuzhiyun UCHAR pow_sav_mode; 492*4882a593Smuzhiyun UCHAR retries; 493*4882a593Smuzhiyun UCHAR antenna; 494*4882a593Smuzhiyun }; 495*4882a593Smuzhiyun struct tx_requested_cmd_4 { 496*4882a593Smuzhiyun 497*4882a593Smuzhiyun UCHAR tx_data_ptr[2]; 498*4882a593Smuzhiyun UCHAR tx_data_length[2]; 499*4882a593Smuzhiyun UCHAR dest_addr[ADDRLEN]; 500*4882a593Smuzhiyun UCHAR pow_sav_mode; 501*4882a593Smuzhiyun UCHAR retries; 502*4882a593Smuzhiyun UCHAR station_id; 503*4882a593Smuzhiyun }; 504*4882a593Smuzhiyun struct memory_dump_cmd { 505*4882a593Smuzhiyun UCHAR memory_type; 506*4882a593Smuzhiyun UCHAR memory_ptr[2]; 507*4882a593Smuzhiyun UCHAR length; 508*4882a593Smuzhiyun }; 509*4882a593Smuzhiyun struct update_association_cmd { 510*4882a593Smuzhiyun UCHAR status; 511*4882a593Smuzhiyun UCHAR aid[2]; 512*4882a593Smuzhiyun }; 513*4882a593Smuzhiyun struct start_timer_cmd { 514*4882a593Smuzhiyun UCHAR duration[2]; 515*4882a593Smuzhiyun }; 516*4882a593Smuzhiyun 517*4882a593Smuzhiyun struct ccs { 518*4882a593Smuzhiyun UCHAR buffer_status; /* 0 = buffer free, 1 = buffer busy */ 519*4882a593Smuzhiyun /* 2 = command complete, 3 = failed */ 520*4882a593Smuzhiyun UCHAR cmd; /* command to ECF */ 521*4882a593Smuzhiyun UCHAR link; /* link to next CCS, FF=end of list */ 522*4882a593Smuzhiyun /* command specific parameters */ 523*4882a593Smuzhiyun union { 524*4882a593Smuzhiyun char reserved[13]; 525*4882a593Smuzhiyun struct update_param_cmd update_param; 526*4882a593Smuzhiyun struct report_param_cmd report_param; 527*4882a593Smuzhiyun UCHAR nummulticast; 528*4882a593Smuzhiyun UCHAR mode; 529*4882a593Smuzhiyun struct start_network_cmd start_network; 530*4882a593Smuzhiyun struct join_network_cmd join_network; 531*4882a593Smuzhiyun struct tx_requested_cmd tx_request; 532*4882a593Smuzhiyun struct memory_dump_cmd memory_dump; 533*4882a593Smuzhiyun struct update_association_cmd update_assoc; 534*4882a593Smuzhiyun struct start_timer_cmd start_timer; 535*4882a593Smuzhiyun } var; 536*4882a593Smuzhiyun }; 537*4882a593Smuzhiyun 538*4882a593Smuzhiyun /*****************************************************************************/ 539*4882a593Smuzhiyun /* Transmit buffer structures */ 540*4882a593Smuzhiyun struct tib_structure { 541*4882a593Smuzhiyun UCHAR ccs_index; 542*4882a593Smuzhiyun UCHAR psm; 543*4882a593Smuzhiyun UCHAR pass_fail; 544*4882a593Smuzhiyun UCHAR retry_count; 545*4882a593Smuzhiyun UCHAR max_retries; 546*4882a593Smuzhiyun UCHAR frags_remaining; 547*4882a593Smuzhiyun UCHAR no_rb; 548*4882a593Smuzhiyun UCHAR rts_reqd; 549*4882a593Smuzhiyun UCHAR csma_tx_cntrl_2; 550*4882a593Smuzhiyun UCHAR sifs_tx_cntrl_2; 551*4882a593Smuzhiyun UCHAR tx_dma_addr_1[2]; 552*4882a593Smuzhiyun UCHAR tx_dma_addr_2[2]; 553*4882a593Smuzhiyun UCHAR var_dur_2mhz[2]; 554*4882a593Smuzhiyun UCHAR var_dur_1mhz[2]; 555*4882a593Smuzhiyun UCHAR max_dur_2mhz[2]; 556*4882a593Smuzhiyun UCHAR max_dur_1mhz[2]; 557*4882a593Smuzhiyun UCHAR hdr_len; 558*4882a593Smuzhiyun UCHAR max_frag_len[2]; 559*4882a593Smuzhiyun UCHAR var_len[2]; 560*4882a593Smuzhiyun UCHAR phy_hdr_4; 561*4882a593Smuzhiyun UCHAR mac_hdr_1; 562*4882a593Smuzhiyun UCHAR mac_hdr_2; 563*4882a593Smuzhiyun UCHAR sid[2]; 564*4882a593Smuzhiyun }; 565*4882a593Smuzhiyun 566*4882a593Smuzhiyun struct phy_header { 567*4882a593Smuzhiyun UCHAR sfd[2]; 568*4882a593Smuzhiyun UCHAR hdr_3; 569*4882a593Smuzhiyun UCHAR hdr_4; 570*4882a593Smuzhiyun }; 571*4882a593Smuzhiyun struct ray_rx_msg { 572*4882a593Smuzhiyun struct mac_header mac; 573*4882a593Smuzhiyun UCHAR var[]; 574*4882a593Smuzhiyun }; 575*4882a593Smuzhiyun 576*4882a593Smuzhiyun struct tx_msg { 577*4882a593Smuzhiyun struct tib_structure tib; 578*4882a593Smuzhiyun struct phy_header phy; 579*4882a593Smuzhiyun struct mac_header mac; 580*4882a593Smuzhiyun UCHAR var[1]; 581*4882a593Smuzhiyun }; 582*4882a593Smuzhiyun 583*4882a593Smuzhiyun /****** ECF Receive Control Structure (RCS) Area at Shared RAM offset 0x0800 */ 584*4882a593Smuzhiyun /* Structures for command specific parameters (rcs.var) */ 585*4882a593Smuzhiyun struct rx_packet_cmd { 586*4882a593Smuzhiyun UCHAR rx_data_ptr[2]; 587*4882a593Smuzhiyun UCHAR rx_data_length[2]; 588*4882a593Smuzhiyun UCHAR rx_sig_lev; 589*4882a593Smuzhiyun UCHAR next_frag_rcs_index; 590*4882a593Smuzhiyun UCHAR totalpacketlength[2]; 591*4882a593Smuzhiyun }; 592*4882a593Smuzhiyun struct rejoin_net_cmplt_cmd { 593*4882a593Smuzhiyun UCHAR reserved; 594*4882a593Smuzhiyun UCHAR bssid[ADDRLEN]; 595*4882a593Smuzhiyun }; 596*4882a593Smuzhiyun struct japan_call_sign_rxd { 597*4882a593Smuzhiyun UCHAR rxd_call_sign[8]; 598*4882a593Smuzhiyun UCHAR reserved[5]; 599*4882a593Smuzhiyun }; 600*4882a593Smuzhiyun 601*4882a593Smuzhiyun struct rcs { 602*4882a593Smuzhiyun UCHAR buffer_status; 603*4882a593Smuzhiyun UCHAR interrupt_id; 604*4882a593Smuzhiyun UCHAR link_field; 605*4882a593Smuzhiyun /* command specific parameters */ 606*4882a593Smuzhiyun union { 607*4882a593Smuzhiyun UCHAR reserved[13]; 608*4882a593Smuzhiyun struct rx_packet_cmd rx_packet; 609*4882a593Smuzhiyun struct rejoin_net_cmplt_cmd rejoin_net_complete; 610*4882a593Smuzhiyun struct japan_call_sign_rxd japan_call_sign; 611*4882a593Smuzhiyun } var; 612*4882a593Smuzhiyun }; 613*4882a593Smuzhiyun 614*4882a593Smuzhiyun /****** Startup parameter structures for both versions of firmware ***********/ 615*4882a593Smuzhiyun struct b4_startup_params { 616*4882a593Smuzhiyun UCHAR a_network_type; /* C_ADHOC, C_INFRA */ 617*4882a593Smuzhiyun UCHAR a_acting_as_ap_status; /* C_TYPE_STA, C_TYPE_AP */ 618*4882a593Smuzhiyun UCHAR a_current_ess_id[ESSID_SIZE]; /* Null terminated unless 32 long */ 619*4882a593Smuzhiyun UCHAR a_scanning_mode; /* passive 0, active 1 */ 620*4882a593Smuzhiyun UCHAR a_power_mgt_state; /* CAM 0, */ 621*4882a593Smuzhiyun UCHAR a_mac_addr[ADDRLEN]; /* */ 622*4882a593Smuzhiyun UCHAR a_frag_threshold[2]; /* 512 */ 623*4882a593Smuzhiyun UCHAR a_hop_time[2]; /* 16k * 2**n, n=0-4 in Kus */ 624*4882a593Smuzhiyun UCHAR a_beacon_period[2]; /* n * a_hop_time in Kus */ 625*4882a593Smuzhiyun UCHAR a_dtim_period; /* in beacons */ 626*4882a593Smuzhiyun UCHAR a_retry_max; /* */ 627*4882a593Smuzhiyun UCHAR a_ack_timeout; /* */ 628*4882a593Smuzhiyun UCHAR a_sifs; /* */ 629*4882a593Smuzhiyun UCHAR a_difs; /* */ 630*4882a593Smuzhiyun UCHAR a_pifs; /* */ 631*4882a593Smuzhiyun UCHAR a_rts_threshold[2]; /* */ 632*4882a593Smuzhiyun UCHAR a_scan_dwell_time[2]; /* */ 633*4882a593Smuzhiyun UCHAR a_max_scan_dwell_time[2]; /* */ 634*4882a593Smuzhiyun UCHAR a_assoc_resp_timeout_thresh; /* */ 635*4882a593Smuzhiyun UCHAR a_adhoc_scan_cycle_max; /* */ 636*4882a593Smuzhiyun UCHAR a_infra_scan_cycle_max; /* */ 637*4882a593Smuzhiyun UCHAR a_infra_super_scan_cycle_max; /* */ 638*4882a593Smuzhiyun UCHAR a_promiscuous_mode; /* */ 639*4882a593Smuzhiyun UCHAR a_unique_word[2]; /* */ 640*4882a593Smuzhiyun UCHAR a_slot_time; /* */ 641*4882a593Smuzhiyun UCHAR a_roaming_low_snr_thresh; /* */ 642*4882a593Smuzhiyun UCHAR a_low_snr_count_thresh; /* */ 643*4882a593Smuzhiyun UCHAR a_infra_missed_bcn_thresh; /* */ 644*4882a593Smuzhiyun UCHAR a_adhoc_missed_bcn_thresh; /* */ 645*4882a593Smuzhiyun UCHAR a_curr_country_code; /* C_USA */ 646*4882a593Smuzhiyun UCHAR a_hop_pattern; /* */ 647*4882a593Smuzhiyun UCHAR a_hop_pattern_length; /* */ 648*4882a593Smuzhiyun /* b4 - b5 differences start here */ 649*4882a593Smuzhiyun UCHAR a_cw_max; /* */ 650*4882a593Smuzhiyun UCHAR a_cw_min; /* */ 651*4882a593Smuzhiyun UCHAR a_noise_filter_gain; /* */ 652*4882a593Smuzhiyun UCHAR a_noise_limit_offset; /* */ 653*4882a593Smuzhiyun UCHAR a_det_rssi_thresh_offset; /* */ 654*4882a593Smuzhiyun UCHAR a_med_busy_thresh_offset; /* */ 655*4882a593Smuzhiyun UCHAR a_det_sync_thresh; /* */ 656*4882a593Smuzhiyun UCHAR a_test_mode; /* */ 657*4882a593Smuzhiyun UCHAR a_test_min_chan_num; /* */ 658*4882a593Smuzhiyun UCHAR a_test_max_chan_num; /* */ 659*4882a593Smuzhiyun UCHAR a_rx_tx_delay; /* */ 660*4882a593Smuzhiyun UCHAR a_current_bss_id[ADDRLEN]; /* */ 661*4882a593Smuzhiyun UCHAR a_hop_set; /* */ 662*4882a593Smuzhiyun }; 663*4882a593Smuzhiyun struct b5_startup_params { 664*4882a593Smuzhiyun UCHAR a_network_type; /* C_ADHOC, C_INFRA */ 665*4882a593Smuzhiyun UCHAR a_acting_as_ap_status; /* C_TYPE_STA, C_TYPE_AP */ 666*4882a593Smuzhiyun UCHAR a_current_ess_id[ESSID_SIZE]; /* Null terminated unless 32 long */ 667*4882a593Smuzhiyun UCHAR a_scanning_mode; /* passive 0, active 1 */ 668*4882a593Smuzhiyun UCHAR a_power_mgt_state; /* CAM 0, */ 669*4882a593Smuzhiyun UCHAR a_mac_addr[ADDRLEN]; /* */ 670*4882a593Smuzhiyun UCHAR a_frag_threshold[2]; /* 512 */ 671*4882a593Smuzhiyun UCHAR a_hop_time[2]; /* 16k * 2**n, n=0-4 in Kus */ 672*4882a593Smuzhiyun UCHAR a_beacon_period[2]; /* n * a_hop_time in Kus */ 673*4882a593Smuzhiyun UCHAR a_dtim_period; /* in beacons */ 674*4882a593Smuzhiyun UCHAR a_retry_max; /* 4 */ 675*4882a593Smuzhiyun UCHAR a_ack_timeout; /* */ 676*4882a593Smuzhiyun UCHAR a_sifs; /* */ 677*4882a593Smuzhiyun UCHAR a_difs; /* */ 678*4882a593Smuzhiyun UCHAR a_pifs; /* */ 679*4882a593Smuzhiyun UCHAR a_rts_threshold[2]; /* */ 680*4882a593Smuzhiyun UCHAR a_scan_dwell_time[2]; /* */ 681*4882a593Smuzhiyun UCHAR a_max_scan_dwell_time[2]; /* */ 682*4882a593Smuzhiyun UCHAR a_assoc_resp_timeout_thresh; /* */ 683*4882a593Smuzhiyun UCHAR a_adhoc_scan_cycle_max; /* */ 684*4882a593Smuzhiyun UCHAR a_infra_scan_cycle_max; /* */ 685*4882a593Smuzhiyun UCHAR a_infra_super_scan_cycle_max; /* */ 686*4882a593Smuzhiyun UCHAR a_promiscuous_mode; /* */ 687*4882a593Smuzhiyun UCHAR a_unique_word[2]; /* */ 688*4882a593Smuzhiyun UCHAR a_slot_time; /* */ 689*4882a593Smuzhiyun UCHAR a_roaming_low_snr_thresh; /* */ 690*4882a593Smuzhiyun UCHAR a_low_snr_count_thresh; /* */ 691*4882a593Smuzhiyun UCHAR a_infra_missed_bcn_thresh; /* */ 692*4882a593Smuzhiyun UCHAR a_adhoc_missed_bcn_thresh; /* */ 693*4882a593Smuzhiyun UCHAR a_curr_country_code; /* C_USA */ 694*4882a593Smuzhiyun UCHAR a_hop_pattern; /* */ 695*4882a593Smuzhiyun UCHAR a_hop_pattern_length; /* */ 696*4882a593Smuzhiyun /* b4 - b5 differences start here */ 697*4882a593Smuzhiyun UCHAR a_cw_max[2]; /* */ 698*4882a593Smuzhiyun UCHAR a_cw_min[2]; /* */ 699*4882a593Smuzhiyun UCHAR a_noise_filter_gain; /* */ 700*4882a593Smuzhiyun UCHAR a_noise_limit_offset; /* */ 701*4882a593Smuzhiyun UCHAR a_det_rssi_thresh_offset; /* */ 702*4882a593Smuzhiyun UCHAR a_med_busy_thresh_offset; /* */ 703*4882a593Smuzhiyun UCHAR a_det_sync_thresh; /* */ 704*4882a593Smuzhiyun UCHAR a_test_mode; /* */ 705*4882a593Smuzhiyun UCHAR a_test_min_chan_num; /* */ 706*4882a593Smuzhiyun UCHAR a_test_max_chan_num; /* */ 707*4882a593Smuzhiyun UCHAR a_allow_bcast_SSID_probe_rsp; 708*4882a593Smuzhiyun UCHAR a_privacy_must_start; 709*4882a593Smuzhiyun UCHAR a_privacy_can_join; 710*4882a593Smuzhiyun UCHAR a_basic_rate_set[8]; 711*4882a593Smuzhiyun }; 712*4882a593Smuzhiyun 713*4882a593Smuzhiyun /*****************************************************************************/ 714*4882a593Smuzhiyun #define RAY_IOCG_PARMS (SIOCDEVPRIVATE) 715*4882a593Smuzhiyun #define RAY_IOCS_PARMS (SIOCDEVPRIVATE + 1) 716*4882a593Smuzhiyun #define RAY_DO_CMD (SIOCDEVPRIVATE + 2) 717*4882a593Smuzhiyun 718*4882a593Smuzhiyun /****** ethernet <-> 802.11 translation **************************************/ 719*4882a593Smuzhiyun typedef struct snaphdr_t 720*4882a593Smuzhiyun { 721*4882a593Smuzhiyun UCHAR dsap; 722*4882a593Smuzhiyun UCHAR ssap; 723*4882a593Smuzhiyun UCHAR ctrl; 724*4882a593Smuzhiyun UCHAR org[3]; 725*4882a593Smuzhiyun UCHAR ethertype[2]; 726*4882a593Smuzhiyun } snaphdr_t; 727*4882a593Smuzhiyun 728*4882a593Smuzhiyun #define BRIDGE_ENCAP 0xf80000 729*4882a593Smuzhiyun #define RFC1042_ENCAP 0 730*4882a593Smuzhiyun #define SNAP_ID 0x0003aaaa 731*4882a593Smuzhiyun #define RAY_IPX_TYPE 0x8137 732*4882a593Smuzhiyun #define APPLEARP_TYPE 0x80f3 733*4882a593Smuzhiyun /*****************************************************************************/ 734*4882a593Smuzhiyun #endif /* _RAYCTL_H_ */ 735