xref: /OK3568_Linux_fs/kernel/drivers/net/wireless/quantenna/qtnfmac/qlink_util.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun /* Copyright (c) 2015-2016 Quantenna Communications. All rights reserved. */
3*4882a593Smuzhiyun 
4*4882a593Smuzhiyun #include <linux/nl80211.h>
5*4882a593Smuzhiyun 
6*4882a593Smuzhiyun #include "qlink_util.h"
7*4882a593Smuzhiyun 
qlink_iface_type_to_nl_mask(u16 qlink_type)8*4882a593Smuzhiyun u16 qlink_iface_type_to_nl_mask(u16 qlink_type)
9*4882a593Smuzhiyun {
10*4882a593Smuzhiyun 	u16 result = 0;
11*4882a593Smuzhiyun 
12*4882a593Smuzhiyun 	switch (qlink_type) {
13*4882a593Smuzhiyun 	case QLINK_IFTYPE_AP:
14*4882a593Smuzhiyun 		result |= BIT(NL80211_IFTYPE_AP);
15*4882a593Smuzhiyun 		break;
16*4882a593Smuzhiyun 	case QLINK_IFTYPE_STATION:
17*4882a593Smuzhiyun 		result |= BIT(NL80211_IFTYPE_STATION);
18*4882a593Smuzhiyun 		break;
19*4882a593Smuzhiyun 	case QLINK_IFTYPE_ADHOC:
20*4882a593Smuzhiyun 		result |= BIT(NL80211_IFTYPE_ADHOC);
21*4882a593Smuzhiyun 		break;
22*4882a593Smuzhiyun 	case QLINK_IFTYPE_MONITOR:
23*4882a593Smuzhiyun 		result |= BIT(NL80211_IFTYPE_MONITOR);
24*4882a593Smuzhiyun 		break;
25*4882a593Smuzhiyun 	case QLINK_IFTYPE_WDS:
26*4882a593Smuzhiyun 		result |= BIT(NL80211_IFTYPE_WDS);
27*4882a593Smuzhiyun 		break;
28*4882a593Smuzhiyun 	case QLINK_IFTYPE_AP_VLAN:
29*4882a593Smuzhiyun 		result |= BIT(NL80211_IFTYPE_AP_VLAN);
30*4882a593Smuzhiyun 		break;
31*4882a593Smuzhiyun 	}
32*4882a593Smuzhiyun 
33*4882a593Smuzhiyun 	return result;
34*4882a593Smuzhiyun }
35*4882a593Smuzhiyun 
qlink_chan_width_mask_to_nl(u16 qlink_mask)36*4882a593Smuzhiyun u8 qlink_chan_width_mask_to_nl(u16 qlink_mask)
37*4882a593Smuzhiyun {
38*4882a593Smuzhiyun 	u8 result = 0;
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun 	if (qlink_mask & BIT(QLINK_CHAN_WIDTH_5))
41*4882a593Smuzhiyun 		result |= BIT(NL80211_CHAN_WIDTH_5);
42*4882a593Smuzhiyun 
43*4882a593Smuzhiyun 	if (qlink_mask & BIT(QLINK_CHAN_WIDTH_10))
44*4882a593Smuzhiyun 		result |= BIT(NL80211_CHAN_WIDTH_10);
45*4882a593Smuzhiyun 
46*4882a593Smuzhiyun 	if (qlink_mask & BIT(QLINK_CHAN_WIDTH_20_NOHT))
47*4882a593Smuzhiyun 		result |= BIT(NL80211_CHAN_WIDTH_20_NOHT);
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun 	if (qlink_mask & BIT(QLINK_CHAN_WIDTH_20))
50*4882a593Smuzhiyun 		result |= BIT(NL80211_CHAN_WIDTH_20);
51*4882a593Smuzhiyun 
52*4882a593Smuzhiyun 	if (qlink_mask & BIT(QLINK_CHAN_WIDTH_40))
53*4882a593Smuzhiyun 		result |= BIT(NL80211_CHAN_WIDTH_40);
54*4882a593Smuzhiyun 
55*4882a593Smuzhiyun 	if (qlink_mask & BIT(QLINK_CHAN_WIDTH_80))
56*4882a593Smuzhiyun 		result |= BIT(NL80211_CHAN_WIDTH_80);
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun 	if (qlink_mask & BIT(QLINK_CHAN_WIDTH_80P80))
59*4882a593Smuzhiyun 		result |= BIT(NL80211_CHAN_WIDTH_80P80);
60*4882a593Smuzhiyun 
61*4882a593Smuzhiyun 	if (qlink_mask & BIT(QLINK_CHAN_WIDTH_160))
62*4882a593Smuzhiyun 		result |= BIT(NL80211_CHAN_WIDTH_160);
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun 	return result;
65*4882a593Smuzhiyun }
66*4882a593Smuzhiyun 
qlink_chanwidth_to_nl(u8 qlw)67*4882a593Smuzhiyun static enum nl80211_chan_width qlink_chanwidth_to_nl(u8 qlw)
68*4882a593Smuzhiyun {
69*4882a593Smuzhiyun 	switch (qlw) {
70*4882a593Smuzhiyun 	case QLINK_CHAN_WIDTH_20_NOHT:
71*4882a593Smuzhiyun 		return NL80211_CHAN_WIDTH_20_NOHT;
72*4882a593Smuzhiyun 	case QLINK_CHAN_WIDTH_20:
73*4882a593Smuzhiyun 		return NL80211_CHAN_WIDTH_20;
74*4882a593Smuzhiyun 	case QLINK_CHAN_WIDTH_40:
75*4882a593Smuzhiyun 		return NL80211_CHAN_WIDTH_40;
76*4882a593Smuzhiyun 	case QLINK_CHAN_WIDTH_80:
77*4882a593Smuzhiyun 		return NL80211_CHAN_WIDTH_80;
78*4882a593Smuzhiyun 	case QLINK_CHAN_WIDTH_80P80:
79*4882a593Smuzhiyun 		return NL80211_CHAN_WIDTH_80P80;
80*4882a593Smuzhiyun 	case QLINK_CHAN_WIDTH_160:
81*4882a593Smuzhiyun 		return NL80211_CHAN_WIDTH_160;
82*4882a593Smuzhiyun 	case QLINK_CHAN_WIDTH_5:
83*4882a593Smuzhiyun 		return NL80211_CHAN_WIDTH_5;
84*4882a593Smuzhiyun 	case QLINK_CHAN_WIDTH_10:
85*4882a593Smuzhiyun 		return NL80211_CHAN_WIDTH_10;
86*4882a593Smuzhiyun 	default:
87*4882a593Smuzhiyun 		return -1;
88*4882a593Smuzhiyun 	}
89*4882a593Smuzhiyun }
90*4882a593Smuzhiyun 
qlink_chanwidth_nl_to_qlink(enum nl80211_chan_width nlwidth)91*4882a593Smuzhiyun static u8 qlink_chanwidth_nl_to_qlink(enum nl80211_chan_width nlwidth)
92*4882a593Smuzhiyun {
93*4882a593Smuzhiyun 	switch (nlwidth) {
94*4882a593Smuzhiyun 	case NL80211_CHAN_WIDTH_20_NOHT:
95*4882a593Smuzhiyun 		return QLINK_CHAN_WIDTH_20_NOHT;
96*4882a593Smuzhiyun 	case NL80211_CHAN_WIDTH_20:
97*4882a593Smuzhiyun 		return QLINK_CHAN_WIDTH_20;
98*4882a593Smuzhiyun 	case NL80211_CHAN_WIDTH_40:
99*4882a593Smuzhiyun 		return QLINK_CHAN_WIDTH_40;
100*4882a593Smuzhiyun 	case NL80211_CHAN_WIDTH_80:
101*4882a593Smuzhiyun 		return QLINK_CHAN_WIDTH_80;
102*4882a593Smuzhiyun 	case NL80211_CHAN_WIDTH_80P80:
103*4882a593Smuzhiyun 		return QLINK_CHAN_WIDTH_80P80;
104*4882a593Smuzhiyun 	case NL80211_CHAN_WIDTH_160:
105*4882a593Smuzhiyun 		return QLINK_CHAN_WIDTH_160;
106*4882a593Smuzhiyun 	case NL80211_CHAN_WIDTH_5:
107*4882a593Smuzhiyun 		return QLINK_CHAN_WIDTH_5;
108*4882a593Smuzhiyun 	case NL80211_CHAN_WIDTH_10:
109*4882a593Smuzhiyun 		return QLINK_CHAN_WIDTH_10;
110*4882a593Smuzhiyun 	default:
111*4882a593Smuzhiyun 		return -1;
112*4882a593Smuzhiyun 	}
113*4882a593Smuzhiyun }
114*4882a593Smuzhiyun 
qlink_chandef_q2cfg(struct wiphy * wiphy,const struct qlink_chandef * qch,struct cfg80211_chan_def * chdef)115*4882a593Smuzhiyun void qlink_chandef_q2cfg(struct wiphy *wiphy,
116*4882a593Smuzhiyun 			 const struct qlink_chandef *qch,
117*4882a593Smuzhiyun 			 struct cfg80211_chan_def *chdef)
118*4882a593Smuzhiyun {
119*4882a593Smuzhiyun 	struct ieee80211_channel *chan;
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun 	chan = ieee80211_get_channel(wiphy, le16_to_cpu(qch->chan.center_freq));
122*4882a593Smuzhiyun 
123*4882a593Smuzhiyun 	chdef->chan = chan;
124*4882a593Smuzhiyun 	chdef->center_freq1 = le16_to_cpu(qch->center_freq1);
125*4882a593Smuzhiyun 	chdef->center_freq2 = le16_to_cpu(qch->center_freq2);
126*4882a593Smuzhiyun 	chdef->width = qlink_chanwidth_to_nl(qch->width);
127*4882a593Smuzhiyun 	chdef->edmg.bw_config = 0;
128*4882a593Smuzhiyun 	chdef->edmg.channels = 0;
129*4882a593Smuzhiyun }
130*4882a593Smuzhiyun 
qlink_chandef_cfg2q(const struct cfg80211_chan_def * chdef,struct qlink_chandef * qch)131*4882a593Smuzhiyun void qlink_chandef_cfg2q(const struct cfg80211_chan_def *chdef,
132*4882a593Smuzhiyun 			 struct qlink_chandef *qch)
133*4882a593Smuzhiyun {
134*4882a593Smuzhiyun 	struct ieee80211_channel *chan = chdef->chan;
135*4882a593Smuzhiyun 
136*4882a593Smuzhiyun 	qch->chan.hw_value = cpu_to_le16(chan->hw_value);
137*4882a593Smuzhiyun 	qch->chan.center_freq = cpu_to_le16(chan->center_freq);
138*4882a593Smuzhiyun 	qch->chan.flags = cpu_to_le32(chan->flags);
139*4882a593Smuzhiyun 
140*4882a593Smuzhiyun 	qch->center_freq1 = cpu_to_le16(chdef->center_freq1);
141*4882a593Smuzhiyun 	qch->center_freq2 = cpu_to_le16(chdef->center_freq2);
142*4882a593Smuzhiyun 	qch->width = qlink_chanwidth_nl_to_qlink(chdef->width);
143*4882a593Smuzhiyun }
144*4882a593Smuzhiyun 
qlink_hidden_ssid_nl2q(enum nl80211_hidden_ssid nl_val)145*4882a593Smuzhiyun enum qlink_hidden_ssid qlink_hidden_ssid_nl2q(enum nl80211_hidden_ssid nl_val)
146*4882a593Smuzhiyun {
147*4882a593Smuzhiyun 	switch (nl_val) {
148*4882a593Smuzhiyun 	case NL80211_HIDDEN_SSID_ZERO_LEN:
149*4882a593Smuzhiyun 		return QLINK_HIDDEN_SSID_ZERO_LEN;
150*4882a593Smuzhiyun 	case NL80211_HIDDEN_SSID_ZERO_CONTENTS:
151*4882a593Smuzhiyun 		return QLINK_HIDDEN_SSID_ZERO_CONTENTS;
152*4882a593Smuzhiyun 	case NL80211_HIDDEN_SSID_NOT_IN_USE:
153*4882a593Smuzhiyun 	default:
154*4882a593Smuzhiyun 		return QLINK_HIDDEN_SSID_NOT_IN_USE;
155*4882a593Smuzhiyun 	}
156*4882a593Smuzhiyun }
157*4882a593Smuzhiyun 
qtnf_utils_is_bit_set(const u8 * arr,unsigned int bit,unsigned int arr_max_len)158*4882a593Smuzhiyun bool qtnf_utils_is_bit_set(const u8 *arr, unsigned int bit,
159*4882a593Smuzhiyun 			   unsigned int arr_max_len)
160*4882a593Smuzhiyun {
161*4882a593Smuzhiyun 	unsigned int idx = bit / BITS_PER_BYTE;
162*4882a593Smuzhiyun 	u8 mask = 1 << (bit - (idx * BITS_PER_BYTE));
163*4882a593Smuzhiyun 
164*4882a593Smuzhiyun 	if (idx >= arr_max_len)
165*4882a593Smuzhiyun 		return false;
166*4882a593Smuzhiyun 
167*4882a593Smuzhiyun 	return arr[idx] & mask;
168*4882a593Smuzhiyun }
169*4882a593Smuzhiyun 
qlink_acl_data_cfg2q(const struct cfg80211_acl_data * acl,struct qlink_acl_data * qacl)170*4882a593Smuzhiyun void qlink_acl_data_cfg2q(const struct cfg80211_acl_data *acl,
171*4882a593Smuzhiyun 			  struct qlink_acl_data *qacl)
172*4882a593Smuzhiyun {
173*4882a593Smuzhiyun 	switch (acl->acl_policy) {
174*4882a593Smuzhiyun 	case NL80211_ACL_POLICY_ACCEPT_UNLESS_LISTED:
175*4882a593Smuzhiyun 		qacl->policy =
176*4882a593Smuzhiyun 			cpu_to_le32(QLINK_ACL_POLICY_ACCEPT_UNLESS_LISTED);
177*4882a593Smuzhiyun 		break;
178*4882a593Smuzhiyun 	case NL80211_ACL_POLICY_DENY_UNLESS_LISTED:
179*4882a593Smuzhiyun 		qacl->policy = cpu_to_le32(QLINK_ACL_POLICY_DENY_UNLESS_LISTED);
180*4882a593Smuzhiyun 		break;
181*4882a593Smuzhiyun 	}
182*4882a593Smuzhiyun 
183*4882a593Smuzhiyun 	qacl->num_entries = cpu_to_le32(acl->n_acl_entries);
184*4882a593Smuzhiyun 	memcpy(qacl->mac_addrs, acl->mac_addrs,
185*4882a593Smuzhiyun 	       acl->n_acl_entries * sizeof(*qacl->mac_addrs));
186*4882a593Smuzhiyun }
187*4882a593Smuzhiyun 
qlink_utils_band_cfg2q(enum nl80211_band band)188*4882a593Smuzhiyun enum qlink_band qlink_utils_band_cfg2q(enum nl80211_band band)
189*4882a593Smuzhiyun {
190*4882a593Smuzhiyun 	switch (band) {
191*4882a593Smuzhiyun 	case NL80211_BAND_2GHZ:
192*4882a593Smuzhiyun 		return QLINK_BAND_2GHZ;
193*4882a593Smuzhiyun 	case NL80211_BAND_5GHZ:
194*4882a593Smuzhiyun 		return QLINK_BAND_5GHZ;
195*4882a593Smuzhiyun 	case NL80211_BAND_60GHZ:
196*4882a593Smuzhiyun 		return QLINK_BAND_60GHZ;
197*4882a593Smuzhiyun 	default:
198*4882a593Smuzhiyun 		return -EINVAL;
199*4882a593Smuzhiyun 	}
200*4882a593Smuzhiyun }
201*4882a593Smuzhiyun 
qlink_utils_dfs_state_cfg2q(enum nl80211_dfs_state state)202*4882a593Smuzhiyun enum qlink_dfs_state qlink_utils_dfs_state_cfg2q(enum nl80211_dfs_state state)
203*4882a593Smuzhiyun {
204*4882a593Smuzhiyun 	switch (state) {
205*4882a593Smuzhiyun 	case NL80211_DFS_USABLE:
206*4882a593Smuzhiyun 		return QLINK_DFS_USABLE;
207*4882a593Smuzhiyun 	case NL80211_DFS_AVAILABLE:
208*4882a593Smuzhiyun 		return QLINK_DFS_AVAILABLE;
209*4882a593Smuzhiyun 	case NL80211_DFS_UNAVAILABLE:
210*4882a593Smuzhiyun 	default:
211*4882a593Smuzhiyun 		return QLINK_DFS_UNAVAILABLE;
212*4882a593Smuzhiyun 	}
213*4882a593Smuzhiyun }
214*4882a593Smuzhiyun 
qlink_utils_chflags_cfg2q(u32 cfgflags)215*4882a593Smuzhiyun u32 qlink_utils_chflags_cfg2q(u32 cfgflags)
216*4882a593Smuzhiyun {
217*4882a593Smuzhiyun 	u32 flags = 0;
218*4882a593Smuzhiyun 
219*4882a593Smuzhiyun 	if (cfgflags & IEEE80211_CHAN_DISABLED)
220*4882a593Smuzhiyun 		flags |= QLINK_CHAN_DISABLED;
221*4882a593Smuzhiyun 
222*4882a593Smuzhiyun 	if (cfgflags & IEEE80211_CHAN_NO_IR)
223*4882a593Smuzhiyun 		flags |= QLINK_CHAN_NO_IR;
224*4882a593Smuzhiyun 
225*4882a593Smuzhiyun 	if (cfgflags & IEEE80211_CHAN_RADAR)
226*4882a593Smuzhiyun 		flags |= QLINK_CHAN_RADAR;
227*4882a593Smuzhiyun 
228*4882a593Smuzhiyun 	if (cfgflags & IEEE80211_CHAN_NO_HT40PLUS)
229*4882a593Smuzhiyun 		flags |= QLINK_CHAN_NO_HT40PLUS;
230*4882a593Smuzhiyun 
231*4882a593Smuzhiyun 	if (cfgflags & IEEE80211_CHAN_NO_HT40MINUS)
232*4882a593Smuzhiyun 		flags |= QLINK_CHAN_NO_HT40MINUS;
233*4882a593Smuzhiyun 
234*4882a593Smuzhiyun 	if (cfgflags & IEEE80211_CHAN_NO_80MHZ)
235*4882a593Smuzhiyun 		flags |= QLINK_CHAN_NO_80MHZ;
236*4882a593Smuzhiyun 
237*4882a593Smuzhiyun 	if (cfgflags & IEEE80211_CHAN_NO_160MHZ)
238*4882a593Smuzhiyun 		flags |= QLINK_CHAN_NO_160MHZ;
239*4882a593Smuzhiyun 
240*4882a593Smuzhiyun 	return flags;
241*4882a593Smuzhiyun }
242*4882a593Smuzhiyun 
qtnf_reg_rule_flags_parse(u32 qflags)243*4882a593Smuzhiyun static u32 qtnf_reg_rule_flags_parse(u32 qflags)
244*4882a593Smuzhiyun {
245*4882a593Smuzhiyun 	u32 flags = 0;
246*4882a593Smuzhiyun 
247*4882a593Smuzhiyun 	if (qflags & QLINK_RRF_NO_OFDM)
248*4882a593Smuzhiyun 		flags |= NL80211_RRF_NO_OFDM;
249*4882a593Smuzhiyun 
250*4882a593Smuzhiyun 	if (qflags & QLINK_RRF_NO_CCK)
251*4882a593Smuzhiyun 		flags |= NL80211_RRF_NO_CCK;
252*4882a593Smuzhiyun 
253*4882a593Smuzhiyun 	if (qflags & QLINK_RRF_NO_INDOOR)
254*4882a593Smuzhiyun 		flags |= NL80211_RRF_NO_INDOOR;
255*4882a593Smuzhiyun 
256*4882a593Smuzhiyun 	if (qflags & QLINK_RRF_NO_OUTDOOR)
257*4882a593Smuzhiyun 		flags |= NL80211_RRF_NO_OUTDOOR;
258*4882a593Smuzhiyun 
259*4882a593Smuzhiyun 	if (qflags & QLINK_RRF_DFS)
260*4882a593Smuzhiyun 		flags |= NL80211_RRF_DFS;
261*4882a593Smuzhiyun 
262*4882a593Smuzhiyun 	if (qflags & QLINK_RRF_PTP_ONLY)
263*4882a593Smuzhiyun 		flags |= NL80211_RRF_PTP_ONLY;
264*4882a593Smuzhiyun 
265*4882a593Smuzhiyun 	if (qflags & QLINK_RRF_PTMP_ONLY)
266*4882a593Smuzhiyun 		flags |= NL80211_RRF_PTMP_ONLY;
267*4882a593Smuzhiyun 
268*4882a593Smuzhiyun 	if (qflags & QLINK_RRF_NO_IR)
269*4882a593Smuzhiyun 		flags |= NL80211_RRF_NO_IR;
270*4882a593Smuzhiyun 
271*4882a593Smuzhiyun 	if (qflags & QLINK_RRF_AUTO_BW)
272*4882a593Smuzhiyun 		flags |= NL80211_RRF_AUTO_BW;
273*4882a593Smuzhiyun 
274*4882a593Smuzhiyun 	if (qflags & QLINK_RRF_IR_CONCURRENT)
275*4882a593Smuzhiyun 		flags |= NL80211_RRF_IR_CONCURRENT;
276*4882a593Smuzhiyun 
277*4882a593Smuzhiyun 	if (qflags & QLINK_RRF_NO_HT40MINUS)
278*4882a593Smuzhiyun 		flags |= NL80211_RRF_NO_HT40MINUS;
279*4882a593Smuzhiyun 
280*4882a593Smuzhiyun 	if (qflags & QLINK_RRF_NO_HT40PLUS)
281*4882a593Smuzhiyun 		flags |= NL80211_RRF_NO_HT40PLUS;
282*4882a593Smuzhiyun 
283*4882a593Smuzhiyun 	if (qflags & QLINK_RRF_NO_80MHZ)
284*4882a593Smuzhiyun 		flags |= NL80211_RRF_NO_80MHZ;
285*4882a593Smuzhiyun 
286*4882a593Smuzhiyun 	if (qflags & QLINK_RRF_NO_160MHZ)
287*4882a593Smuzhiyun 		flags |= NL80211_RRF_NO_160MHZ;
288*4882a593Smuzhiyun 
289*4882a593Smuzhiyun 	return flags;
290*4882a593Smuzhiyun }
291*4882a593Smuzhiyun 
qlink_utils_regrule_q2nl(struct ieee80211_reg_rule * rule,const struct qlink_tlv_reg_rule * tlv)292*4882a593Smuzhiyun void qlink_utils_regrule_q2nl(struct ieee80211_reg_rule *rule,
293*4882a593Smuzhiyun 			      const struct qlink_tlv_reg_rule *tlv)
294*4882a593Smuzhiyun {
295*4882a593Smuzhiyun 	rule->freq_range.start_freq_khz = le32_to_cpu(tlv->start_freq_khz);
296*4882a593Smuzhiyun 	rule->freq_range.end_freq_khz = le32_to_cpu(tlv->end_freq_khz);
297*4882a593Smuzhiyun 	rule->freq_range.max_bandwidth_khz =
298*4882a593Smuzhiyun 		le32_to_cpu(tlv->max_bandwidth_khz);
299*4882a593Smuzhiyun 	rule->power_rule.max_antenna_gain = le32_to_cpu(tlv->max_antenna_gain);
300*4882a593Smuzhiyun 	rule->power_rule.max_eirp = le32_to_cpu(tlv->max_eirp);
301*4882a593Smuzhiyun 	rule->dfs_cac_ms = le32_to_cpu(tlv->dfs_cac_ms);
302*4882a593Smuzhiyun 	rule->flags = qtnf_reg_rule_flags_parse(le32_to_cpu(tlv->flags));
303*4882a593Smuzhiyun }
304