xref: /OK3568_Linux_fs/kernel/drivers/net/wireless/nxp/mlinux/moal_pcie.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /** @file moal_pcie.c
2*4882a593Smuzhiyun  *
3*4882a593Smuzhiyun  *  @brief This file contains PCIE IF (interface) module
4*4882a593Smuzhiyun  *  related functions.
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * Copyright 2008-2022 NXP
8*4882a593Smuzhiyun  *
9*4882a593Smuzhiyun  * This software file (the File) is distributed by NXP
10*4882a593Smuzhiyun  * under the terms of the GNU General Public License Version 2, June 1991
11*4882a593Smuzhiyun  * (the License).  You may use, redistribute and/or modify the File in
12*4882a593Smuzhiyun  * accordance with the terms and conditions of the License, a copy of which
13*4882a593Smuzhiyun  * is available by writing to the Free Software Foundation, Inc.,
14*4882a593Smuzhiyun  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
15*4882a593Smuzhiyun  * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
16*4882a593Smuzhiyun  *
17*4882a593Smuzhiyun  * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
18*4882a593Smuzhiyun  * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
19*4882a593Smuzhiyun  * ARE EXPRESSLY DISCLAIMED.  The License provides additional details about
20*4882a593Smuzhiyun  * this warranty disclaimer.
21*4882a593Smuzhiyun  *
22*4882a593Smuzhiyun  */
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun /********************************************************
25*4882a593Smuzhiyun Change log:
26*4882a593Smuzhiyun     02/01/2012: initial version
27*4882a593Smuzhiyun ********************************************************/
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun #include <linux/firmware.h>
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun #if defined(STA_CFG80211) || defined(UAP_CFG80211)
32*4882a593Smuzhiyun #include "moal_cfg80211.h"
33*4882a593Smuzhiyun #endif
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun #include "moal_pcie.h"
36*4882a593Smuzhiyun 
37*4882a593Smuzhiyun #if LINUX_VERSION_CODE < KERNEL_VERSION(5, 4, 70)
38*4882a593Smuzhiyun #ifdef IMX_SUPPORT
39*4882a593Smuzhiyun #include <linux/busfreq-imx.h>
40*4882a593Smuzhiyun #endif
41*4882a593Smuzhiyun #endif
42*4882a593Smuzhiyun 
43*4882a593Smuzhiyun #if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 1, 0)
44*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_IPV6)
45*4882a593Smuzhiyun #include <net/addrconf.h>
46*4882a593Smuzhiyun #endif
47*4882a593Smuzhiyun #endif
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun /********************************************************
50*4882a593Smuzhiyun 			Local Variables
51*4882a593Smuzhiyun ********************************************************/
52*4882a593Smuzhiyun #define DRV_NAME "NXP mdriver PCIe"
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun /* PCIE resume handler */
55*4882a593Smuzhiyun static int woal_pcie_resume(struct pci_dev *pdev);
56*4882a593Smuzhiyun static void woal_pcie_reg_dbg(moal_handle *phandle);
57*4882a593Smuzhiyun static void woal_pcie_unregister_dev(moal_handle *handle);
58*4882a593Smuzhiyun static void woal_pcie_cleanup(pcie_service_card *card);
59*4882a593Smuzhiyun static mlan_status woal_pcie_init(pcie_service_card *card);
60*4882a593Smuzhiyun 
61*4882a593Smuzhiyun /** WLAN IDs */
62*4882a593Smuzhiyun static const struct pci_device_id wlan_ids[] = {
63*4882a593Smuzhiyun #ifdef PCIE8897
64*4882a593Smuzhiyun 	{
65*4882a593Smuzhiyun 		PCIE_VENDOR_ID_MRVL,
66*4882a593Smuzhiyun 		PCIE_DEVICE_ID_88W8897P,
67*4882a593Smuzhiyun 		PCI_ANY_ID,
68*4882a593Smuzhiyun 		PCI_ANY_ID,
69*4882a593Smuzhiyun 		0,
70*4882a593Smuzhiyun 		0,
71*4882a593Smuzhiyun 	},
72*4882a593Smuzhiyun #endif
73*4882a593Smuzhiyun #ifdef PCIE8997
74*4882a593Smuzhiyun 	{
75*4882a593Smuzhiyun 		PCIE_VENDOR_ID_MRVL,
76*4882a593Smuzhiyun 		PCIE_DEVICE_ID_88W8997P,
77*4882a593Smuzhiyun 		PCI_ANY_ID,
78*4882a593Smuzhiyun 		PCI_ANY_ID,
79*4882a593Smuzhiyun 		0,
80*4882a593Smuzhiyun 		0,
81*4882a593Smuzhiyun 	},
82*4882a593Smuzhiyun 	{
83*4882a593Smuzhiyun 		PCIE_VENDOR_ID_V2_MRVL,
84*4882a593Smuzhiyun 		PCIE_DEVICE_ID_88W8997P,
85*4882a593Smuzhiyun 		PCI_ANY_ID,
86*4882a593Smuzhiyun 		PCI_ANY_ID,
87*4882a593Smuzhiyun 		0,
88*4882a593Smuzhiyun 		0,
89*4882a593Smuzhiyun 	},
90*4882a593Smuzhiyun #endif
91*4882a593Smuzhiyun #ifdef PCIE9097
92*4882a593Smuzhiyun 	{
93*4882a593Smuzhiyun 		PCIE_VENDOR_ID_V2_MRVL,
94*4882a593Smuzhiyun 		PCIE_DEVICE_ID_88W9097,
95*4882a593Smuzhiyun 		PCI_ANY_ID,
96*4882a593Smuzhiyun 		PCI_ANY_ID,
97*4882a593Smuzhiyun 		0,
98*4882a593Smuzhiyun 		0,
99*4882a593Smuzhiyun 	},
100*4882a593Smuzhiyun #endif
101*4882a593Smuzhiyun #ifdef PCIE9098
102*4882a593Smuzhiyun 	{
103*4882a593Smuzhiyun 		PCIE_VENDOR_ID_V2_MRVL,
104*4882a593Smuzhiyun 		PCIE_DEVICE_ID_88W9098P_FN0,
105*4882a593Smuzhiyun 		PCI_ANY_ID,
106*4882a593Smuzhiyun 		PCI_ANY_ID,
107*4882a593Smuzhiyun 		0,
108*4882a593Smuzhiyun 		0,
109*4882a593Smuzhiyun 	},
110*4882a593Smuzhiyun 	{
111*4882a593Smuzhiyun 		PCIE_VENDOR_ID_V2_MRVL,
112*4882a593Smuzhiyun 		PCIE_DEVICE_ID_88W9098P_FN1,
113*4882a593Smuzhiyun 		PCI_ANY_ID,
114*4882a593Smuzhiyun 		PCI_ANY_ID,
115*4882a593Smuzhiyun 		0,
116*4882a593Smuzhiyun 		0,
117*4882a593Smuzhiyun 	},
118*4882a593Smuzhiyun #endif
119*4882a593Smuzhiyun #ifdef PCIENW62X
120*4882a593Smuzhiyun 	{
121*4882a593Smuzhiyun 		PCIE_VENDOR_ID_NXP,
122*4882a593Smuzhiyun 		PCIE_DEVICE_ID_88WNW62X,
123*4882a593Smuzhiyun 		PCI_ANY_ID,
124*4882a593Smuzhiyun 		PCI_ANY_ID,
125*4882a593Smuzhiyun 		0,
126*4882a593Smuzhiyun 		0,
127*4882a593Smuzhiyun 	},
128*4882a593Smuzhiyun #endif
129*4882a593Smuzhiyun 
130*4882a593Smuzhiyun 	{},
131*4882a593Smuzhiyun };
132*4882a593Smuzhiyun /* moal interface ops */
133*4882a593Smuzhiyun static moal_if_ops pcie_ops;
134*4882a593Smuzhiyun 
135*4882a593Smuzhiyun /********************************************************
136*4882a593Smuzhiyun 			Global Variables
137*4882a593Smuzhiyun ********************************************************/
138*4882a593Smuzhiyun 
139*4882a593Smuzhiyun /********************************************************
140*4882a593Smuzhiyun 			Local Functions
141*4882a593Smuzhiyun ********************************************************/
142*4882a593Smuzhiyun 
143*4882a593Smuzhiyun static mlan_status woal_pcie_preinit(struct pci_dev *pdev);
144*4882a593Smuzhiyun #if defined(PCIE8897) || defined(PCIE8997) || defined(PCIE9098) ||             \
145*4882a593Smuzhiyun 	defined(PCIE9097) || defined(PCIENW62X)
146*4882a593Smuzhiyun static rdwr_status woal_pcie_rdwr_firmware(moal_handle *phandle, t_u8 doneflag,
147*4882a593Smuzhiyun 					   t_u8 resetflag);
148*4882a593Smuzhiyun #endif
149*4882a593Smuzhiyun 
150*4882a593Smuzhiyun /**  @brief This function updates the card types
151*4882a593Smuzhiyun  *
152*4882a593Smuzhiyun  *  @param handle   A Pointer to the moal_handle structure
153*4882a593Smuzhiyun  *  @param card     A Pointer to card
154*4882a593Smuzhiyun  *
155*4882a593Smuzhiyun  *  @return         N/A
156*4882a593Smuzhiyun  */
woal_update_card_type(t_void * card)157*4882a593Smuzhiyun static t_u16 woal_update_card_type(t_void *card)
158*4882a593Smuzhiyun {
159*4882a593Smuzhiyun 	pcie_service_card *cardp_pcie = (pcie_service_card *)card;
160*4882a593Smuzhiyun 	t_u16 card_type = 0;
161*4882a593Smuzhiyun 
162*4882a593Smuzhiyun 	/* Update card type */
163*4882a593Smuzhiyun #ifdef PCIE8897
164*4882a593Smuzhiyun 	if (cardp_pcie->dev->device == PCIE_DEVICE_ID_88W8897P) {
165*4882a593Smuzhiyun 		card_type = CARD_TYPE_PCIE8897;
166*4882a593Smuzhiyun 		moal_memcpy_ext(NULL, driver_version, CARD_PCIE8897,
167*4882a593Smuzhiyun 				strlen(CARD_PCIE8897), strlen(driver_version));
168*4882a593Smuzhiyun 		moal_memcpy_ext(NULL,
169*4882a593Smuzhiyun 				driver_version + strlen(INTF_CARDTYPE) +
170*4882a593Smuzhiyun 					strlen(KERN_VERSION),
171*4882a593Smuzhiyun 				V15, strlen(V15),
172*4882a593Smuzhiyun 				strlen(driver_version) - strlen(INTF_CARDTYPE) -
173*4882a593Smuzhiyun 					strlen(KERN_VERSION));
174*4882a593Smuzhiyun 	}
175*4882a593Smuzhiyun #endif
176*4882a593Smuzhiyun #ifdef PCIE8997
177*4882a593Smuzhiyun 	if (cardp_pcie->dev->device == PCIE_DEVICE_ID_88W8997P) {
178*4882a593Smuzhiyun 		card_type = CARD_TYPE_PCIE8997;
179*4882a593Smuzhiyun 		moal_memcpy_ext(NULL, driver_version, CARD_PCIE8997,
180*4882a593Smuzhiyun 				strlen(CARD_PCIE8997), strlen(driver_version));
181*4882a593Smuzhiyun 		moal_memcpy_ext(NULL,
182*4882a593Smuzhiyun 				driver_version + strlen(INTF_CARDTYPE) +
183*4882a593Smuzhiyun 					strlen(KERN_VERSION),
184*4882a593Smuzhiyun 				V16, strlen(V16),
185*4882a593Smuzhiyun 				strlen(driver_version) - strlen(INTF_CARDTYPE) -
186*4882a593Smuzhiyun 					strlen(KERN_VERSION));
187*4882a593Smuzhiyun 	}
188*4882a593Smuzhiyun #endif
189*4882a593Smuzhiyun #ifdef PCIE9097
190*4882a593Smuzhiyun 	if (cardp_pcie->dev->device == PCIE_DEVICE_ID_88W9097) {
191*4882a593Smuzhiyun 		card_type = CARD_TYPE_PCIE9097;
192*4882a593Smuzhiyun 		moal_memcpy_ext(NULL, driver_version, CARD_PCIE9097,
193*4882a593Smuzhiyun 				strlen(CARD_PCIE9097), strlen(driver_version));
194*4882a593Smuzhiyun 		moal_memcpy_ext(NULL,
195*4882a593Smuzhiyun 				driver_version + strlen(INTF_CARDTYPE) +
196*4882a593Smuzhiyun 					strlen(KERN_VERSION),
197*4882a593Smuzhiyun 				V17, strlen(V17),
198*4882a593Smuzhiyun 				strlen(driver_version) - strlen(INTF_CARDTYPE) -
199*4882a593Smuzhiyun 					strlen(KERN_VERSION));
200*4882a593Smuzhiyun 	}
201*4882a593Smuzhiyun #endif
202*4882a593Smuzhiyun #ifdef PCIE9098
203*4882a593Smuzhiyun 	if (cardp_pcie->dev->device == PCIE_DEVICE_ID_88W9098P_FN0 ||
204*4882a593Smuzhiyun 	    cardp_pcie->dev->device == PCIE_DEVICE_ID_88W9098P_FN1) {
205*4882a593Smuzhiyun 		card_type = CARD_TYPE_PCIE9098;
206*4882a593Smuzhiyun 		moal_memcpy_ext(NULL, driver_version, CARD_PCIE9098,
207*4882a593Smuzhiyun 				strlen(CARD_PCIE9098), strlen(driver_version));
208*4882a593Smuzhiyun 		moal_memcpy_ext(NULL,
209*4882a593Smuzhiyun 				driver_version + strlen(INTF_CARDTYPE) +
210*4882a593Smuzhiyun 					strlen(KERN_VERSION),
211*4882a593Smuzhiyun 				V17, strlen(V17),
212*4882a593Smuzhiyun 				strlen(driver_version) - strlen(INTF_CARDTYPE) -
213*4882a593Smuzhiyun 					strlen(KERN_VERSION));
214*4882a593Smuzhiyun 	}
215*4882a593Smuzhiyun #endif
216*4882a593Smuzhiyun #ifdef PCIENW62X
217*4882a593Smuzhiyun 	if (cardp_pcie->dev->device == PCIE_DEVICE_ID_88WNW62X) {
218*4882a593Smuzhiyun 		card_type = CARD_TYPE_PCIENW62X;
219*4882a593Smuzhiyun 		moal_memcpy_ext(NULL, driver_version, CARD_PCIENW62X,
220*4882a593Smuzhiyun 				strlen(CARD_PCIENW62X), strlen(driver_version));
221*4882a593Smuzhiyun 		moal_memcpy_ext(NULL,
222*4882a593Smuzhiyun 				driver_version + strlen(INTF_CARDTYPE) +
223*4882a593Smuzhiyun 					strlen(KERN_VERSION),
224*4882a593Smuzhiyun 				V17, strlen(V17),
225*4882a593Smuzhiyun 				strlen(driver_version) - strlen(INTF_CARDTYPE) -
226*4882a593Smuzhiyun 					strlen(KERN_VERSION));
227*4882a593Smuzhiyun 	}
228*4882a593Smuzhiyun #endif
229*4882a593Smuzhiyun 
230*4882a593Smuzhiyun 	return card_type;
231*4882a593Smuzhiyun }
232*4882a593Smuzhiyun 
233*4882a593Smuzhiyun #if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 18, 0)
234*4882a593Smuzhiyun /**
235*4882a593Smuzhiyun  * @brief Function to process pre/post PCIe function level reset
236*4882a593Smuzhiyun  *
237*4882a593Smuzhiyun  * @param handle    A pointer to moal_handle structure
238*4882a593Smuzhiyun  * @param prepare   True :- its a pre FLR call from the kernel
239*4882a593Smuzhiyun  *		    False :- its a post FLR call from the kernel
240*4882a593Smuzhiyun  * @param flr       True: call from FLR
241*4882a593Smuzhiyun  *
242*4882a593Smuzhiyun  * Note: This function is mix of woal_switch_drv_mode() and
243*4882a593Smuzhiyun  * remove_card(). Idea is to cleanup the software only without
244*4882a593Smuzhiyun  * touching the PCIe specific code. Likewise, during init init
245*4882a593Smuzhiyun  * everything, including hw, but do not reinitiate PCIe stack
246*4882a593Smuzhiyun  *
247*4882a593Smuzhiyun  * @return        MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
248*4882a593Smuzhiyun  */
woal_do_flr(moal_handle * handle,bool prepare,bool flr_flag)249*4882a593Smuzhiyun static mlan_status woal_do_flr(moal_handle *handle, bool prepare, bool flr_flag)
250*4882a593Smuzhiyun {
251*4882a593Smuzhiyun 	unsigned int i;
252*4882a593Smuzhiyun 	int index = 0;
253*4882a593Smuzhiyun 	mlan_status status = MLAN_STATUS_SUCCESS;
254*4882a593Smuzhiyun 	moal_private *priv = NULL;
255*4882a593Smuzhiyun 	pcie_service_card *card = NULL;
256*4882a593Smuzhiyun 	int fw_serial_bkp = 0;
257*4882a593Smuzhiyun 
258*4882a593Smuzhiyun 	ENTER();
259*4882a593Smuzhiyun 
260*4882a593Smuzhiyun 	if (!handle) {
261*4882a593Smuzhiyun 		PRINTM(MINFO, "\n Handle null during prepare=%d\n", prepare);
262*4882a593Smuzhiyun 		LEAVE();
263*4882a593Smuzhiyun 		return status;
264*4882a593Smuzhiyun 	}
265*4882a593Smuzhiyun 
266*4882a593Smuzhiyun 	card = (pcie_service_card *)handle->card;
267*4882a593Smuzhiyun 
268*4882a593Smuzhiyun 	if (card == NULL) {
269*4882a593Smuzhiyun 		PRINTM(MERROR, "The parameter 'card' is NULL\n");
270*4882a593Smuzhiyun 		LEAVE();
271*4882a593Smuzhiyun 		return (mlan_status)MLAN_STATUS_FAILURE;
272*4882a593Smuzhiyun 	}
273*4882a593Smuzhiyun 
274*4882a593Smuzhiyun 	if (!IS_PCIE8997(handle->card_type) &&
275*4882a593Smuzhiyun 	    !IS_PCIE9097(handle->card_type) &&
276*4882a593Smuzhiyun 	    !IS_PCIENW62X(handle->card_type) &&
277*4882a593Smuzhiyun 	    !IS_PCIE9098(handle->card_type)) {
278*4882a593Smuzhiyun 		LEAVE();
279*4882a593Smuzhiyun 		return status;
280*4882a593Smuzhiyun 	}
281*4882a593Smuzhiyun 
282*4882a593Smuzhiyun 	if (MOAL_ACQ_SEMAPHORE_BLOCK(&AddRemoveCardSem))
283*4882a593Smuzhiyun 		goto exit_sem_err;
284*4882a593Smuzhiyun 
285*4882a593Smuzhiyun 	if (!prepare)
286*4882a593Smuzhiyun 		goto perform_init;
287*4882a593Smuzhiyun 
288*4882a593Smuzhiyun 	/* Reset all interfaces */
289*4882a593Smuzhiyun 	priv = woal_get_priv(handle, MLAN_BSS_ROLE_ANY);
290*4882a593Smuzhiyun 	woal_reset_intf(priv, MOAL_IOCTL_WAIT, MTRUE);
291*4882a593Smuzhiyun 
292*4882a593Smuzhiyun 	/* Shutdown firmware */
293*4882a593Smuzhiyun 	handle->init_wait_q_woken = MFALSE;
294*4882a593Smuzhiyun 	status = mlan_shutdown_fw(handle->pmlan_adapter);
295*4882a593Smuzhiyun 
296*4882a593Smuzhiyun 	if (status == MLAN_STATUS_PENDING)
297*4882a593Smuzhiyun 		wait_event_interruptible(handle->init_wait_q,
298*4882a593Smuzhiyun 					 handle->init_wait_q_woken);
299*4882a593Smuzhiyun 
300*4882a593Smuzhiyun 	if (atomic_read(&handle->rx_pending) ||
301*4882a593Smuzhiyun 	    atomic_read(&handle->tx_pending) ||
302*4882a593Smuzhiyun 	    atomic_read(&handle->ioctl_pending)) {
303*4882a593Smuzhiyun 		PRINTM(MERROR,
304*4882a593Smuzhiyun 		       "ERR: rx_pending=%d,tx_pending=%d,ioctl_pending=%d\n",
305*4882a593Smuzhiyun 		       atomic_read(&handle->rx_pending),
306*4882a593Smuzhiyun 		       atomic_read(&handle->tx_pending),
307*4882a593Smuzhiyun 		       atomic_read(&handle->ioctl_pending));
308*4882a593Smuzhiyun 	}
309*4882a593Smuzhiyun 
310*4882a593Smuzhiyun 	unregister_inetaddr_notifier(&handle->woal_notifier);
311*4882a593Smuzhiyun #if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 1, 0)
312*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_IPV6)
313*4882a593Smuzhiyun 	unregister_inet6addr_notifier(&handle->woal_inet6_notifier);
314*4882a593Smuzhiyun #endif
315*4882a593Smuzhiyun #endif
316*4882a593Smuzhiyun 
317*4882a593Smuzhiyun #ifdef WIFI_DIRECT_SUPPORT
318*4882a593Smuzhiyun #if defined(STA_CFG80211) && defined(UAP_CFG80211)
319*4882a593Smuzhiyun #if CFG80211_VERSION_CODE >= WIFI_DIRECT_KERNEL_VERSION
320*4882a593Smuzhiyun 	/* Remove virtual interface */
321*4882a593Smuzhiyun 	woal_remove_virtual_interface(handle);
322*4882a593Smuzhiyun #endif
323*4882a593Smuzhiyun #endif
324*4882a593Smuzhiyun #endif
325*4882a593Smuzhiyun 
326*4882a593Smuzhiyun 	/* Remove interface */
327*4882a593Smuzhiyun 	for (i = 0; i < handle->priv_num; i++)
328*4882a593Smuzhiyun 		woal_remove_interface(handle, i);
329*4882a593Smuzhiyun 
330*4882a593Smuzhiyun 	/* Unregister mlan */
331*4882a593Smuzhiyun 	if (handle->pmlan_adapter) {
332*4882a593Smuzhiyun 		mlan_unregister(handle->pmlan_adapter);
333*4882a593Smuzhiyun 		if (atomic_read(&handle->lock_count) ||
334*4882a593Smuzhiyun 		    atomic_read(&handle->malloc_count) ||
335*4882a593Smuzhiyun 		    atomic_read(&handle->mbufalloc_count)) {
336*4882a593Smuzhiyun 			PRINTM(MERROR,
337*4882a593Smuzhiyun 			       "mlan has memory leak: lock_count=%d,"
338*4882a593Smuzhiyun 			       " malloc_count=%d, mbufalloc_count=%d\n",
339*4882a593Smuzhiyun 			       atomic_read(&handle->lock_count),
340*4882a593Smuzhiyun 			       atomic_read(&handle->malloc_count),
341*4882a593Smuzhiyun 			       atomic_read(&handle->mbufalloc_count));
342*4882a593Smuzhiyun 		}
343*4882a593Smuzhiyun 		if (atomic_read(&handle->malloc_cons_count)) {
344*4882a593Smuzhiyun 			PRINTM(MERROR,
345*4882a593Smuzhiyun 			       "mlan has memory leak: malloc_cons_count=%d\n",
346*4882a593Smuzhiyun 			       atomic_read(&handle->malloc_cons_count));
347*4882a593Smuzhiyun 		}
348*4882a593Smuzhiyun 		handle->pmlan_adapter = NULL;
349*4882a593Smuzhiyun 	}
350*4882a593Smuzhiyun 
351*4882a593Smuzhiyun 	goto exit;
352*4882a593Smuzhiyun 
353*4882a593Smuzhiyun perform_init:
354*4882a593Smuzhiyun 	handle->priv_num = 0;
355*4882a593Smuzhiyun 
356*4882a593Smuzhiyun 	/* Init SW */
357*4882a593Smuzhiyun 	if (woal_init_sw(handle)) {
358*4882a593Smuzhiyun 		PRINTM(MFATAL, "Software Init Failed\n");
359*4882a593Smuzhiyun 		goto err_init_fw;
360*4882a593Smuzhiyun 	}
361*4882a593Smuzhiyun 
362*4882a593Smuzhiyun #ifdef PCIE9098
363*4882a593Smuzhiyun 	if (card->dev->device == PCIE_DEVICE_ID_88W9098P_FN1)
364*4882a593Smuzhiyun 		mlan_set_int_mode(handle->pmlan_adapter, pcie_int_mode, 1);
365*4882a593Smuzhiyun 	else
366*4882a593Smuzhiyun #endif
367*4882a593Smuzhiyun 		/* Update pcie_int_mode in mlan adapter */
368*4882a593Smuzhiyun 		mlan_set_int_mode(handle->pmlan_adapter,
369*4882a593Smuzhiyun 				  handle->params.pcie_int_mode, 0);
370*4882a593Smuzhiyun 
371*4882a593Smuzhiyun 	/* Init FW and HW */
372*4882a593Smuzhiyun 	/* Load wlan only binary */
373*4882a593Smuzhiyun 	if (flr_flag) {
374*4882a593Smuzhiyun 		fw_serial_bkp = moal_extflg_isset(handle, EXT_FW_SERIAL);
375*4882a593Smuzhiyun 		moal_extflg_clear(handle, EXT_FW_SERIAL);
376*4882a593Smuzhiyun 		woal_update_firmware_name(handle);
377*4882a593Smuzhiyun 	}
378*4882a593Smuzhiyun 	if (woal_init_fw(handle)) {
379*4882a593Smuzhiyun 		PRINTM(MFATAL, "Firmware Init Failed\n");
380*4882a593Smuzhiyun 		woal_pcie_reg_dbg(handle);
381*4882a593Smuzhiyun 		if (fw_serial_bkp)
382*4882a593Smuzhiyun 			moal_extflg_set(handle, EXT_FW_SERIAL);
383*4882a593Smuzhiyun 		goto err_init_fw;
384*4882a593Smuzhiyun 	}
385*4882a593Smuzhiyun 	if (flr_flag && fw_serial_bkp)
386*4882a593Smuzhiyun 		moal_extflg_set(handle, EXT_FW_SERIAL);
387*4882a593Smuzhiyun 	if (IS_PCIE9098(handle->card_type))
388*4882a593Smuzhiyun 		handle->event_fw_dump = MTRUE;
389*4882a593Smuzhiyun exit:
390*4882a593Smuzhiyun 	MOAL_REL_SEMAPHORE(&AddRemoveCardSem);
391*4882a593Smuzhiyun 
392*4882a593Smuzhiyun exit_sem_err:
393*4882a593Smuzhiyun 	LEAVE();
394*4882a593Smuzhiyun 	return status;
395*4882a593Smuzhiyun 
396*4882a593Smuzhiyun err_init_fw:
397*4882a593Smuzhiyun 	if ((handle->hardware_status == HardwareStatusFwReady) ||
398*4882a593Smuzhiyun 	    (handle->hardware_status == HardwareStatusReady)) {
399*4882a593Smuzhiyun 		PRINTM(MINFO, "shutdown mlan\n");
400*4882a593Smuzhiyun 		handle->init_wait_q_woken = MFALSE;
401*4882a593Smuzhiyun 		status = mlan_shutdown_fw(handle->pmlan_adapter);
402*4882a593Smuzhiyun 		if (status == MLAN_STATUS_PENDING)
403*4882a593Smuzhiyun 			wait_event_interruptible(handle->init_wait_q,
404*4882a593Smuzhiyun 						 handle->init_wait_q_woken);
405*4882a593Smuzhiyun 	}
406*4882a593Smuzhiyun #ifdef ANDROID_KERNEL
407*4882a593Smuzhiyun #if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 5, 0)
408*4882a593Smuzhiyun 	wakeup_source_trash(&handle->ws);
409*4882a593Smuzhiyun #else
410*4882a593Smuzhiyun 	wake_lock_destroy(&handle->wake_lock);
411*4882a593Smuzhiyun #endif
412*4882a593Smuzhiyun #endif
413*4882a593Smuzhiyun #ifdef CONFIG_PROC_FS
414*4882a593Smuzhiyun 	woal_proc_exit(handle);
415*4882a593Smuzhiyun #endif
416*4882a593Smuzhiyun 	/* Unregister device */
417*4882a593Smuzhiyun 	PRINTM(MINFO, "unregister device\n");
418*4882a593Smuzhiyun 	woal_pcie_unregister_dev(handle);
419*4882a593Smuzhiyun 	handle->surprise_removed = MTRUE;
420*4882a593Smuzhiyun #ifdef REASSOCIATION
421*4882a593Smuzhiyun 	if (handle->reassoc_thread.pid)
422*4882a593Smuzhiyun 		wake_up_interruptible(&handle->reassoc_thread.wait_q);
423*4882a593Smuzhiyun 	/* waiting for main thread quit */
424*4882a593Smuzhiyun 	while (handle->reassoc_thread.pid)
425*4882a593Smuzhiyun 		woal_sched_timeout(2);
426*4882a593Smuzhiyun #endif /* REASSOCIATION */
427*4882a593Smuzhiyun 	woal_terminate_workqueue(handle);
428*4882a593Smuzhiyun 	woal_free_moal_handle(handle);
429*4882a593Smuzhiyun 
430*4882a593Smuzhiyun 	for (index = 0; index < MAX_MLAN_ADAPTER; index++) {
431*4882a593Smuzhiyun 		if (m_handle[index] == handle)
432*4882a593Smuzhiyun 			break;
433*4882a593Smuzhiyun 	}
434*4882a593Smuzhiyun 	if (index < MAX_MLAN_ADAPTER)
435*4882a593Smuzhiyun 		m_handle[index] = NULL;
436*4882a593Smuzhiyun 	card->handle = NULL;
437*4882a593Smuzhiyun 	MOAL_REL_SEMAPHORE(&AddRemoveCardSem);
438*4882a593Smuzhiyun 	LEAVE();
439*4882a593Smuzhiyun 	return (mlan_status)MLAN_STATUS_FAILURE;
440*4882a593Smuzhiyun }
441*4882a593Smuzhiyun #endif
442*4882a593Smuzhiyun 
443*4882a593Smuzhiyun /**
444*4882a593Smuzhiyun  *  @brief This function handles PCIE driver probe
445*4882a593Smuzhiyun  *
446*4882a593Smuzhiyun  *  @param pdev     A pointer to pci_dev structure
447*4882a593Smuzhiyun  *  @param id       A pointer to pci_device_id structure
448*4882a593Smuzhiyun  *
449*4882a593Smuzhiyun  *  @return         error code
450*4882a593Smuzhiyun  */
woal_pcie_probe(struct pci_dev * pdev,const struct pci_device_id * id)451*4882a593Smuzhiyun static int woal_pcie_probe(struct pci_dev *pdev, const struct pci_device_id *id)
452*4882a593Smuzhiyun {
453*4882a593Smuzhiyun 	pcie_service_card *card = NULL;
454*4882a593Smuzhiyun 	t_u16 card_type = 0;
455*4882a593Smuzhiyun 	int ret = 0;
456*4882a593Smuzhiyun 
457*4882a593Smuzhiyun 	ENTER();
458*4882a593Smuzhiyun 
459*4882a593Smuzhiyun 	PRINTM(MINFO, "vendor=0x%4.04X device=0x%4.04X rev=%d\n", pdev->vendor,
460*4882a593Smuzhiyun 	       pdev->device, pdev->revision);
461*4882a593Smuzhiyun 
462*4882a593Smuzhiyun 	/* Preinit PCIE device so allocate PCIE memory can be successful */
463*4882a593Smuzhiyun 	if (woal_pcie_preinit(pdev)) {
464*4882a593Smuzhiyun 		PRINTM(MFATAL, "MOAL PCIE preinit failed\n");
465*4882a593Smuzhiyun 		LEAVE();
466*4882a593Smuzhiyun 		return -EFAULT;
467*4882a593Smuzhiyun 	}
468*4882a593Smuzhiyun 
469*4882a593Smuzhiyun 	card = kzalloc(sizeof(pcie_service_card), GFP_KERNEL);
470*4882a593Smuzhiyun 	if (!card) {
471*4882a593Smuzhiyun 		PRINTM(MERROR, "%s: failed to alloc memory\n", __func__);
472*4882a593Smuzhiyun 		ret = -ENOMEM;
473*4882a593Smuzhiyun 		goto err;
474*4882a593Smuzhiyun 	}
475*4882a593Smuzhiyun 
476*4882a593Smuzhiyun 	card->dev = pdev;
477*4882a593Smuzhiyun 
478*4882a593Smuzhiyun 	card_type = woal_update_card_type(card);
479*4882a593Smuzhiyun 	if (!card_type) {
480*4882a593Smuzhiyun 		PRINTM(MERROR, "pcie probe: woal_update_card_type() failed\n");
481*4882a593Smuzhiyun 		ret = MLAN_STATUS_FAILURE;
482*4882a593Smuzhiyun 		goto err;
483*4882a593Smuzhiyun 	}
484*4882a593Smuzhiyun 	if (MLAN_STATUS_SUCCESS != woal_pcie_init(card)) {
485*4882a593Smuzhiyun 		PRINTM(MERROR, "woal_pcie_init failed\n");
486*4882a593Smuzhiyun 		ret = -EFAULT;
487*4882a593Smuzhiyun 		goto err;
488*4882a593Smuzhiyun 	}
489*4882a593Smuzhiyun 
490*4882a593Smuzhiyun 	if (woal_add_card(card, &card->dev->dev, &pcie_ops, card_type) ==
491*4882a593Smuzhiyun 	    NULL) {
492*4882a593Smuzhiyun 		woal_pcie_cleanup(card);
493*4882a593Smuzhiyun 		PRINTM(MERROR, "%s: failed\n", __func__);
494*4882a593Smuzhiyun 		ret = -EFAULT;
495*4882a593Smuzhiyun 		goto err;
496*4882a593Smuzhiyun 	}
497*4882a593Smuzhiyun 
498*4882a593Smuzhiyun #ifdef IMX_SUPPORT
499*4882a593Smuzhiyun 	woal_regist_oob_wakeup_irq(card->handle);
500*4882a593Smuzhiyun #endif /* IMX_SUPPORT */
501*4882a593Smuzhiyun 
502*4882a593Smuzhiyun 	LEAVE();
503*4882a593Smuzhiyun 	return ret;
504*4882a593Smuzhiyun err:
505*4882a593Smuzhiyun 	kfree(card);
506*4882a593Smuzhiyun 	if (pci_is_enabled(pdev))
507*4882a593Smuzhiyun 		pci_disable_device(pdev);
508*4882a593Smuzhiyun 
509*4882a593Smuzhiyun 	LEAVE();
510*4882a593Smuzhiyun 	return ret;
511*4882a593Smuzhiyun }
512*4882a593Smuzhiyun 
513*4882a593Smuzhiyun /**
514*4882a593Smuzhiyun  *  @brief This function handles PCIE driver remove
515*4882a593Smuzhiyun  *
516*4882a593Smuzhiyun  *  @param pdev     A pointer to pci_dev structure
517*4882a593Smuzhiyun  *
518*4882a593Smuzhiyun  *  @return         error code
519*4882a593Smuzhiyun  */
woal_pcie_remove(struct pci_dev * dev)520*4882a593Smuzhiyun static void woal_pcie_remove(struct pci_dev *dev)
521*4882a593Smuzhiyun {
522*4882a593Smuzhiyun 	pcie_service_card *card;
523*4882a593Smuzhiyun 	moal_handle *handle;
524*4882a593Smuzhiyun 
525*4882a593Smuzhiyun 	ENTER();
526*4882a593Smuzhiyun 	card = pci_get_drvdata(dev);
527*4882a593Smuzhiyun 	if (!card) {
528*4882a593Smuzhiyun 		PRINTM(MINFO, "PCIE card removed from slot\n");
529*4882a593Smuzhiyun 		LEAVE();
530*4882a593Smuzhiyun 		return;
531*4882a593Smuzhiyun 	}
532*4882a593Smuzhiyun 
533*4882a593Smuzhiyun 	handle = card->handle;
534*4882a593Smuzhiyun 	if (!handle || !handle->priv_num) {
535*4882a593Smuzhiyun 		PRINTM(MINFO, "PCIE card handle removed\n");
536*4882a593Smuzhiyun 		LEAVE();
537*4882a593Smuzhiyun 		return;
538*4882a593Smuzhiyun 	}
539*4882a593Smuzhiyun 	handle->surprise_removed = MTRUE;
540*4882a593Smuzhiyun 
541*4882a593Smuzhiyun #ifdef IMX_SUPPORT
542*4882a593Smuzhiyun 	woal_unregist_oob_wakeup_irq(card->handle);
543*4882a593Smuzhiyun #endif /* IMX_SUPPORT */
544*4882a593Smuzhiyun 	woal_remove_card(card);
545*4882a593Smuzhiyun 	woal_pcie_cleanup(card);
546*4882a593Smuzhiyun 	kfree(card);
547*4882a593Smuzhiyun 
548*4882a593Smuzhiyun 	LEAVE();
549*4882a593Smuzhiyun 	return;
550*4882a593Smuzhiyun }
551*4882a593Smuzhiyun 
552*4882a593Smuzhiyun /**
553*4882a593Smuzhiyun  *  @brief This function handles PCIE driver remove
554*4882a593Smuzhiyun  *
555*4882a593Smuzhiyun  *  @param pdev     A pointer to pci_dev structure
556*4882a593Smuzhiyun  *
557*4882a593Smuzhiyun  *  @return         error code
558*4882a593Smuzhiyun  */
woal_pcie_shutdown(struct pci_dev * dev)559*4882a593Smuzhiyun static void woal_pcie_shutdown(struct pci_dev *dev)
560*4882a593Smuzhiyun {
561*4882a593Smuzhiyun 	pcie_service_card *card;
562*4882a593Smuzhiyun 	moal_handle *handle;
563*4882a593Smuzhiyun 
564*4882a593Smuzhiyun 	ENTER();
565*4882a593Smuzhiyun 	PRINTM(MCMND, "<--- Enter woal_pcie_shutdown --->\n");
566*4882a593Smuzhiyun 
567*4882a593Smuzhiyun 	card = pci_get_drvdata(dev);
568*4882a593Smuzhiyun 	if (!card) {
569*4882a593Smuzhiyun 		PRINTM(MINFO, "PCIE card removed from slot\n");
570*4882a593Smuzhiyun 		LEAVE();
571*4882a593Smuzhiyun 		return;
572*4882a593Smuzhiyun 	}
573*4882a593Smuzhiyun 	handle = card->handle;
574*4882a593Smuzhiyun 	if (handle->second_mac)
575*4882a593Smuzhiyun 		goto done;
576*4882a593Smuzhiyun #if defined(PCIE9098) || defined(PCIE9097) || defined(PCIENW62X)
577*4882a593Smuzhiyun 	if (IS_PCIE9098(handle->card_type) || IS_PCIENW62X(handle->card_type) ||
578*4882a593Smuzhiyun 	    IS_PCIE9097(handle->card_type)) {
579*4882a593Smuzhiyun 		if (RDWR_STATUS_FAILURE !=
580*4882a593Smuzhiyun 		    woal_pcie_rdwr_firmware(handle, 0, 1))
581*4882a593Smuzhiyun 			PRINTM(MMSG, "wlan: start in-bound IR...\n");
582*4882a593Smuzhiyun 	}
583*4882a593Smuzhiyun #endif
584*4882a593Smuzhiyun done:
585*4882a593Smuzhiyun 	handle->surprise_removed = MTRUE;
586*4882a593Smuzhiyun 	pci_disable_device(dev);
587*4882a593Smuzhiyun 	PRINTM(MCMND, "<--- Leave woal_pcie_shutdown --->\n");
588*4882a593Smuzhiyun 	LEAVE();
589*4882a593Smuzhiyun 	return;
590*4882a593Smuzhiyun }
591*4882a593Smuzhiyun 
592*4882a593Smuzhiyun /**
593*4882a593Smuzhiyun  *  @brief Handle suspend
594*4882a593Smuzhiyun  *
595*4882a593Smuzhiyun  *  @param pdev     A pointer to pci_dev structure
596*4882a593Smuzhiyun  *  @param state    PM state message
597*4882a593Smuzhiyun  *
598*4882a593Smuzhiyun  *  @return         error code
599*4882a593Smuzhiyun  */
woal_pcie_suspend(struct pci_dev * pdev,pm_message_t state)600*4882a593Smuzhiyun static int woal_pcie_suspend(struct pci_dev *pdev, pm_message_t state)
601*4882a593Smuzhiyun {
602*4882a593Smuzhiyun 	pcie_service_card *cardp;
603*4882a593Smuzhiyun 	moal_handle *handle = NULL;
604*4882a593Smuzhiyun 	moal_handle *ref_handle = NULL;
605*4882a593Smuzhiyun 	int i;
606*4882a593Smuzhiyun 	int ret = MLAN_STATUS_SUCCESS;
607*4882a593Smuzhiyun 	int hs_actived;
608*4882a593Smuzhiyun 	mlan_ds_ps_info pm_info;
609*4882a593Smuzhiyun 	int keep_power = 0;
610*4882a593Smuzhiyun 
611*4882a593Smuzhiyun 	ENTER();
612*4882a593Smuzhiyun 	if (pdev) {
613*4882a593Smuzhiyun 		cardp = (pcie_service_card *)pci_get_drvdata(pdev);
614*4882a593Smuzhiyun 		if (!cardp || !cardp->handle) {
615*4882a593Smuzhiyun 			LEAVE();
616*4882a593Smuzhiyun 			return MLAN_STATUS_SUCCESS;
617*4882a593Smuzhiyun 		}
618*4882a593Smuzhiyun 	} else {
619*4882a593Smuzhiyun 		PRINTM(MERROR, "PCIE device is not specified\n");
620*4882a593Smuzhiyun 		LEAVE();
621*4882a593Smuzhiyun 		return -ENOSYS;
622*4882a593Smuzhiyun 	}
623*4882a593Smuzhiyun 
624*4882a593Smuzhiyun 	handle = cardp->handle;
625*4882a593Smuzhiyun 	if (handle->second_mac)
626*4882a593Smuzhiyun 		PRINTM(MCMND, "<--- Enter woal_pcie_suspend# --->\n");
627*4882a593Smuzhiyun 	else
628*4882a593Smuzhiyun 		PRINTM(MCMND, "<--- Enter woal_pcie_suspend --->\n");
629*4882a593Smuzhiyun 	if (handle->is_suspended == MTRUE) {
630*4882a593Smuzhiyun 		PRINTM(MWARN, "Device already suspended\n");
631*4882a593Smuzhiyun 		LEAVE();
632*4882a593Smuzhiyun 		return MLAN_STATUS_SUCCESS;
633*4882a593Smuzhiyun 	}
634*4882a593Smuzhiyun 	if (handle->fw_dump) {
635*4882a593Smuzhiyun 		PRINTM(MMSG, "suspend not allowed while FW dump!");
636*4882a593Smuzhiyun 		ret = -EBUSY;
637*4882a593Smuzhiyun 		goto done;
638*4882a593Smuzhiyun 	}
639*4882a593Smuzhiyun 	for (i = 0; i < MIN(handle->priv_num, MLAN_MAX_BSS_NUM); i++) {
640*4882a593Smuzhiyun 		if (handle->priv[i] &&
641*4882a593Smuzhiyun 		    (GET_BSS_ROLE(handle->priv[i]) == MLAN_BSS_ROLE_STA))
642*4882a593Smuzhiyun 			woal_cancel_scan(handle->priv[i], MOAL_IOCTL_WAIT);
643*4882a593Smuzhiyun 	}
644*4882a593Smuzhiyun 	handle->suspend_fail = MFALSE;
645*4882a593Smuzhiyun 	memset(&pm_info, 0, sizeof(pm_info));
646*4882a593Smuzhiyun #define MAX_RETRY_NUM 8
647*4882a593Smuzhiyun 	for (i = 0; i < MAX_RETRY_NUM; i++) {
648*4882a593Smuzhiyun 		if (MLAN_STATUS_SUCCESS ==
649*4882a593Smuzhiyun 		    woal_get_pm_info(woal_get_priv(handle, MLAN_BSS_ROLE_ANY),
650*4882a593Smuzhiyun 				     &pm_info)) {
651*4882a593Smuzhiyun 			if (pm_info.is_suspend_allowed == MTRUE)
652*4882a593Smuzhiyun 				break;
653*4882a593Smuzhiyun 			else
654*4882a593Smuzhiyun 				PRINTM(MMSG,
655*4882a593Smuzhiyun 				       "Suspend not allowed and retry again\n");
656*4882a593Smuzhiyun 		}
657*4882a593Smuzhiyun 		woal_sched_timeout(100);
658*4882a593Smuzhiyun 	}
659*4882a593Smuzhiyun 	if (pm_info.is_suspend_allowed == MFALSE) {
660*4882a593Smuzhiyun 		PRINTM(MMSG, "Suspend not allowed\n");
661*4882a593Smuzhiyun 		ret = -EBUSY;
662*4882a593Smuzhiyun 		goto done;
663*4882a593Smuzhiyun 	}
664*4882a593Smuzhiyun 
665*4882a593Smuzhiyun 	for (i = 0; i < handle->priv_num; i++)
666*4882a593Smuzhiyun 		netif_device_detach(handle->priv[i]->netdev);
667*4882a593Smuzhiyun 	if (moal_extflg_isset(handle, EXT_PM_KEEP_POWER))
668*4882a593Smuzhiyun 		keep_power = MTRUE;
669*4882a593Smuzhiyun 	else
670*4882a593Smuzhiyun 		keep_power = MFALSE;
671*4882a593Smuzhiyun 
672*4882a593Smuzhiyun 	if (keep_power) {
673*4882a593Smuzhiyun 		/* Enable Host Sleep */
674*4882a593Smuzhiyun 		hs_actived = woal_enable_hs(
675*4882a593Smuzhiyun 			woal_get_priv(handle, MLAN_BSS_ROLE_ANY));
676*4882a593Smuzhiyun 		if (hs_actived == MTRUE) {
677*4882a593Smuzhiyun 			/* Indicate device suspended */
678*4882a593Smuzhiyun 			handle->is_suspended = MTRUE;
679*4882a593Smuzhiyun 		} else {
680*4882a593Smuzhiyun 			PRINTM(MMSG, "HS not actived, suspend fail!");
681*4882a593Smuzhiyun 			handle->suspend_fail = MTRUE;
682*4882a593Smuzhiyun 			for (i = 0; i < handle->priv_num; i++)
683*4882a593Smuzhiyun 				netif_device_attach(handle->priv[i]->netdev);
684*4882a593Smuzhiyun 			ret = -EBUSY;
685*4882a593Smuzhiyun 			goto done;
686*4882a593Smuzhiyun 		}
687*4882a593Smuzhiyun 	}
688*4882a593Smuzhiyun 	woal_flush_workqueue(handle);
689*4882a593Smuzhiyun 	if (!keep_power) {
690*4882a593Smuzhiyun #if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 18, 0)
691*4882a593Smuzhiyun 		woal_do_flr(handle, true, false);
692*4882a593Smuzhiyun #endif
693*4882a593Smuzhiyun 		handle->surprise_removed = MTRUE;
694*4882a593Smuzhiyun 		handle->is_suspended = MTRUE;
695*4882a593Smuzhiyun 	}
696*4882a593Smuzhiyun #ifdef IMX_SUPPORT
697*4882a593Smuzhiyun 	woal_enable_oob_wakeup_irq(handle);
698*4882a593Smuzhiyun #endif /* IMX_SUPPORT */
699*4882a593Smuzhiyun 	pci_enable_wake(pdev, pci_choose_state(pdev, state), 1);
700*4882a593Smuzhiyun 	pci_save_state(pdev);
701*4882a593Smuzhiyun 	ref_handle = (moal_handle *)handle->pref_mac;
702*4882a593Smuzhiyun 	if (ref_handle && ref_handle->is_suspended)
703*4882a593Smuzhiyun 		pci_set_power_state(pdev, pci_choose_state(pdev, state));
704*4882a593Smuzhiyun done:
705*4882a593Smuzhiyun 	PRINTM(MCMND, "<--- Leave woal_pcie_suspend --->\n");
706*4882a593Smuzhiyun 	LEAVE();
707*4882a593Smuzhiyun 	return ret;
708*4882a593Smuzhiyun }
709*4882a593Smuzhiyun 
710*4882a593Smuzhiyun /**
711*4882a593Smuzhiyun  *  @brief Handle resume
712*4882a593Smuzhiyun  *
713*4882a593Smuzhiyun  *  @param pdev     A pointer to pci_dev structure
714*4882a593Smuzhiyun  *
715*4882a593Smuzhiyun  *  @return         error code
716*4882a593Smuzhiyun  */
woal_pcie_resume(struct pci_dev * pdev)717*4882a593Smuzhiyun static int woal_pcie_resume(struct pci_dev *pdev)
718*4882a593Smuzhiyun {
719*4882a593Smuzhiyun 	moal_handle *handle;
720*4882a593Smuzhiyun 	pcie_service_card *cardp;
721*4882a593Smuzhiyun 	int keep_power = 0;
722*4882a593Smuzhiyun 	int i;
723*4882a593Smuzhiyun 
724*4882a593Smuzhiyun 	ENTER();
725*4882a593Smuzhiyun 	if (pdev) {
726*4882a593Smuzhiyun 		cardp = (pcie_service_card *)pci_get_drvdata(pdev);
727*4882a593Smuzhiyun 		if (!cardp || !cardp->handle) {
728*4882a593Smuzhiyun 			PRINTM(MERROR, "Card or handle is not valid\n");
729*4882a593Smuzhiyun 			LEAVE();
730*4882a593Smuzhiyun 			return MLAN_STATUS_SUCCESS;
731*4882a593Smuzhiyun 		}
732*4882a593Smuzhiyun 	} else {
733*4882a593Smuzhiyun 		PRINTM(MERROR, "PCIE device is not specified\n");
734*4882a593Smuzhiyun 		LEAVE();
735*4882a593Smuzhiyun 		return -ENOSYS;
736*4882a593Smuzhiyun 	}
737*4882a593Smuzhiyun 	handle = cardp->handle;
738*4882a593Smuzhiyun 	if (handle->second_mac)
739*4882a593Smuzhiyun 		PRINTM(MCMND, "<--- Enter woal_pcie_resume# --->\n");
740*4882a593Smuzhiyun 	else
741*4882a593Smuzhiyun 		PRINTM(MCMND, "<--- Enter woal_pcie_resume --->\n");
742*4882a593Smuzhiyun 	if (handle->is_suspended == MFALSE) {
743*4882a593Smuzhiyun 		PRINTM(MWARN, "Device already resumed\n");
744*4882a593Smuzhiyun 		goto done;
745*4882a593Smuzhiyun 	}
746*4882a593Smuzhiyun 	handle->is_suspended = MFALSE;
747*4882a593Smuzhiyun 
748*4882a593Smuzhiyun 	if (moal_extflg_isset(handle, EXT_PM_KEEP_POWER))
749*4882a593Smuzhiyun 		keep_power = MTRUE;
750*4882a593Smuzhiyun 	else
751*4882a593Smuzhiyun 		keep_power = MFALSE;
752*4882a593Smuzhiyun 
753*4882a593Smuzhiyun 	pci_set_power_state(pdev, PCI_D0);
754*4882a593Smuzhiyun 	pci_restore_state(pdev);
755*4882a593Smuzhiyun 	pci_enable_wake(pdev, PCI_D0, 0);
756*4882a593Smuzhiyun 	if (!keep_power) {
757*4882a593Smuzhiyun 		handle->surprise_removed = MFALSE;
758*4882a593Smuzhiyun #if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 18, 0)
759*4882a593Smuzhiyun 		woal_do_flr(handle, false, false);
760*4882a593Smuzhiyun #endif
761*4882a593Smuzhiyun 	} else {
762*4882a593Smuzhiyun 		if (woal_check_driver_status(handle)) {
763*4882a593Smuzhiyun 			PRINTM(MERROR, "Resuem, device is in hang state\n");
764*4882a593Smuzhiyun 			LEAVE();
765*4882a593Smuzhiyun 			return MLAN_STATUS_SUCCESS;
766*4882a593Smuzhiyun 		}
767*4882a593Smuzhiyun 		for (i = 0; i < handle->priv_num; i++)
768*4882a593Smuzhiyun 			netif_device_attach(handle->priv[i]->netdev);
769*4882a593Smuzhiyun 
770*4882a593Smuzhiyun 		woal_cancel_hs(woal_get_priv(handle, MLAN_BSS_ROLE_ANY),
771*4882a593Smuzhiyun 			       MOAL_NO_WAIT);
772*4882a593Smuzhiyun #ifdef IMX_SUPPORT
773*4882a593Smuzhiyun 		woal_disable_oob_wakeup_irq(handle);
774*4882a593Smuzhiyun #endif /* IMX_SUPPORT */
775*4882a593Smuzhiyun 	}
776*4882a593Smuzhiyun done:
777*4882a593Smuzhiyun 	PRINTM(MCMND, "<--- Leave woal_pcie_resume --->\n");
778*4882a593Smuzhiyun 	LEAVE();
779*4882a593Smuzhiyun 	return 0;
780*4882a593Smuzhiyun }
781*4882a593Smuzhiyun 
782*4882a593Smuzhiyun #if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 18, 0)
783*4882a593Smuzhiyun 
784*4882a593Smuzhiyun #if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 13, 0)
785*4882a593Smuzhiyun /**
786*4882a593Smuzhiyun  *  @brief Pcie reset prepare handler
787*4882a593Smuzhiyun  *
788*4882a593Smuzhiyun  *  @param pdev     A pointer to pci_dev structure
789*4882a593Smuzhiyun  */
woal_pcie_reset_prepare(struct pci_dev * pdev)790*4882a593Smuzhiyun static void woal_pcie_reset_prepare(struct pci_dev *pdev)
791*4882a593Smuzhiyun {
792*4882a593Smuzhiyun 	pcie_service_card *card;
793*4882a593Smuzhiyun 	moal_handle *handle;
794*4882a593Smuzhiyun 	moal_handle *ref_handle = NULL;
795*4882a593Smuzhiyun 
796*4882a593Smuzhiyun 	ENTER();
797*4882a593Smuzhiyun 
798*4882a593Smuzhiyun 	card = pci_get_drvdata(pdev);
799*4882a593Smuzhiyun 	if (!card) {
800*4882a593Smuzhiyun 		PRINTM(MINFO, "PCIE card removed from slot\n");
801*4882a593Smuzhiyun 		LEAVE();
802*4882a593Smuzhiyun 		return;
803*4882a593Smuzhiyun 	}
804*4882a593Smuzhiyun 
805*4882a593Smuzhiyun 	handle = card->handle;
806*4882a593Smuzhiyun 
807*4882a593Smuzhiyun 	if (!handle) {
808*4882a593Smuzhiyun 		PRINTM(MINFO, "Invalid handle\n");
809*4882a593Smuzhiyun 		LEAVE();
810*4882a593Smuzhiyun 		return;
811*4882a593Smuzhiyun 	}
812*4882a593Smuzhiyun 
813*4882a593Smuzhiyun 	PRINTM(MMSG, "%s: vendor=0x%4.04X device=0x%4.04X rev=%d Pre-FLR\n",
814*4882a593Smuzhiyun 	       __func__, pdev->vendor, pdev->device, pdev->revision);
815*4882a593Smuzhiyun 
816*4882a593Smuzhiyun 	/* Kernel would be performing FLR after this notification.
817*4882a593Smuzhiyun 	 * Cleanup up all software withouth cleaning anything related to
818*4882a593Smuzhiyun 	 * PCIe and HW.
819*4882a593Smuzhiyun 	 * Note. FW might not be healthy.
820*4882a593Smuzhiyun 	 */
821*4882a593Smuzhiyun 	// handle-> mac0 , ref_handle->second mac
822*4882a593Smuzhiyun 	if (handle->pref_mac) {
823*4882a593Smuzhiyun 		if (handle->second_mac) {
824*4882a593Smuzhiyun 			handle = (moal_handle *)handle->pref_mac;
825*4882a593Smuzhiyun 			ref_handle = (moal_handle *)handle->pref_mac;
826*4882a593Smuzhiyun 		} else {
827*4882a593Smuzhiyun 			ref_handle = (moal_handle *)handle->pref_mac;
828*4882a593Smuzhiyun 		}
829*4882a593Smuzhiyun 	}
830*4882a593Smuzhiyun 	handle->surprise_removed = MTRUE;
831*4882a593Smuzhiyun 	woal_do_flr(handle, true, true);
832*4882a593Smuzhiyun 	if (ref_handle) {
833*4882a593Smuzhiyun 		ref_handle->surprise_removed = MTRUE;
834*4882a593Smuzhiyun 		woal_do_flr(ref_handle, true, true);
835*4882a593Smuzhiyun 	}
836*4882a593Smuzhiyun 
837*4882a593Smuzhiyun 	LEAVE();
838*4882a593Smuzhiyun }
839*4882a593Smuzhiyun /**
840*4882a593Smuzhiyun  *  @brief Pcie reset done handler
841*4882a593Smuzhiyun  *
842*4882a593Smuzhiyun  *  @param pdev     A pointer to pci_dev structure
843*4882a593Smuzhiyun  */
woal_pcie_reset_done(struct pci_dev * pdev)844*4882a593Smuzhiyun static void woal_pcie_reset_done(struct pci_dev *pdev)
845*4882a593Smuzhiyun {
846*4882a593Smuzhiyun 	pcie_service_card *card;
847*4882a593Smuzhiyun 	moal_handle *handle;
848*4882a593Smuzhiyun 	moal_handle *ref_handle = NULL;
849*4882a593Smuzhiyun 	ENTER();
850*4882a593Smuzhiyun 
851*4882a593Smuzhiyun 	card = pci_get_drvdata(pdev);
852*4882a593Smuzhiyun 	if (!card) {
853*4882a593Smuzhiyun 		PRINTM(MINFO, "PCIE card removed from slot\n");
854*4882a593Smuzhiyun 		LEAVE();
855*4882a593Smuzhiyun 		return;
856*4882a593Smuzhiyun 	}
857*4882a593Smuzhiyun 
858*4882a593Smuzhiyun 	handle = card->handle;
859*4882a593Smuzhiyun 	if (!handle) {
860*4882a593Smuzhiyun 		PRINTM(MINFO, "Invalid handle\n");
861*4882a593Smuzhiyun 		LEAVE();
862*4882a593Smuzhiyun 		return;
863*4882a593Smuzhiyun 	}
864*4882a593Smuzhiyun 
865*4882a593Smuzhiyun 	PRINTM(MMSG, "%s: vendor=0x%4.04X device=0x%4.04X rev=%d Post-FLR\n",
866*4882a593Smuzhiyun 	       __func__, pdev->vendor, pdev->device, pdev->revision);
867*4882a593Smuzhiyun 
868*4882a593Smuzhiyun 	/* Kernel stores and restores PCIe function context before and
869*4882a593Smuzhiyun 	 * after performing FLR, respectively.
870*4882a593Smuzhiyun 	 *
871*4882a593Smuzhiyun 	 * Reconfigure the sw and fw including fw redownload
872*4882a593Smuzhiyun 	 */
873*4882a593Smuzhiyun 	// handle-> mac0 , ref_handle->second mac
874*4882a593Smuzhiyun 	if (handle->pref_mac) {
875*4882a593Smuzhiyun 		if (handle->second_mac) {
876*4882a593Smuzhiyun 			handle = (moal_handle *)handle->pref_mac;
877*4882a593Smuzhiyun 			ref_handle = (moal_handle *)handle->pref_mac;
878*4882a593Smuzhiyun 		} else {
879*4882a593Smuzhiyun 			ref_handle = (moal_handle *)handle->pref_mac;
880*4882a593Smuzhiyun 		}
881*4882a593Smuzhiyun 	}
882*4882a593Smuzhiyun 	handle->surprise_removed = MFALSE;
883*4882a593Smuzhiyun 	woal_do_flr(handle, false, true);
884*4882a593Smuzhiyun 	if (ref_handle) {
885*4882a593Smuzhiyun 		ref_handle->surprise_removed = MFALSE;
886*4882a593Smuzhiyun 		woal_do_flr(ref_handle, false, true);
887*4882a593Smuzhiyun 	}
888*4882a593Smuzhiyun 
889*4882a593Smuzhiyun 	LEAVE();
890*4882a593Smuzhiyun }
891*4882a593Smuzhiyun #else
woal_pcie_reset_notify(struct pci_dev * pdev,bool prepare)892*4882a593Smuzhiyun static void woal_pcie_reset_notify(struct pci_dev *pdev, bool prepare)
893*4882a593Smuzhiyun {
894*4882a593Smuzhiyun 	pcie_service_card *card;
895*4882a593Smuzhiyun 	moal_handle *handle;
896*4882a593Smuzhiyun 	moal_handle *ref_handle = NULL;
897*4882a593Smuzhiyun 
898*4882a593Smuzhiyun 	ENTER();
899*4882a593Smuzhiyun 
900*4882a593Smuzhiyun 	card = pci_get_drvdata(pdev);
901*4882a593Smuzhiyun 	if (!card) {
902*4882a593Smuzhiyun 		PRINTM(MINFO, "PCIE card removed from slot\n");
903*4882a593Smuzhiyun 		LEAVE();
904*4882a593Smuzhiyun 		return;
905*4882a593Smuzhiyun 	}
906*4882a593Smuzhiyun 
907*4882a593Smuzhiyun 	handle = card->handle;
908*4882a593Smuzhiyun 	if (!handle) {
909*4882a593Smuzhiyun 		PRINTM(MINFO, "Invalid handle\n");
910*4882a593Smuzhiyun 		LEAVE();
911*4882a593Smuzhiyun 		return;
912*4882a593Smuzhiyun 	}
913*4882a593Smuzhiyun 
914*4882a593Smuzhiyun 	PRINTM(MMSG, "%s: vendor=0x%4.04X device=0x%4.04X rev=%d %s\n",
915*4882a593Smuzhiyun 	       __func__, pdev->vendor, pdev->device, pdev->revision,
916*4882a593Smuzhiyun 	       prepare ? "Pre-FLR" : "Post-FLR");
917*4882a593Smuzhiyun 
918*4882a593Smuzhiyun 	// handle-> mac0 , ref_handle->second mac
919*4882a593Smuzhiyun 	if (handle->pref_mac) {
920*4882a593Smuzhiyun 		if (handle->second_mac) {
921*4882a593Smuzhiyun 			handle = (moal_handle *)handle->pref_mac;
922*4882a593Smuzhiyun 			ref_handle = (moal_handle *)handle->pref_mac;
923*4882a593Smuzhiyun 		} else {
924*4882a593Smuzhiyun 			ref_handle = (moal_handle *)handle->pref_mac;
925*4882a593Smuzhiyun 		}
926*4882a593Smuzhiyun 	}
927*4882a593Smuzhiyun 
928*4882a593Smuzhiyun 	if (prepare) {
929*4882a593Smuzhiyun 		/* Kernel would be performing FLR after this notification.
930*4882a593Smuzhiyun 		 * Cleanup up all software withouth cleaning anything related to
931*4882a593Smuzhiyun 		 * PCIe and HW.
932*4882a593Smuzhiyun 		 * Note. FW might not be healthy.
933*4882a593Smuzhiyun 		 */
934*4882a593Smuzhiyun 		handle->surprise_removed = MTRUE;
935*4882a593Smuzhiyun 		woal_do_flr(handle, prepare, true);
936*4882a593Smuzhiyun 		if (ref_handle) {
937*4882a593Smuzhiyun 			ref_handle->surprise_removed = MTRUE;
938*4882a593Smuzhiyun 			woal_do_flr(ref_handle, prepare, true);
939*4882a593Smuzhiyun 		}
940*4882a593Smuzhiyun 	} else {
941*4882a593Smuzhiyun 		/* Kernel stores and restores PCIe function context before and
942*4882a593Smuzhiyun 		 * after performing FLR, respectively.
943*4882a593Smuzhiyun 		 *
944*4882a593Smuzhiyun 		 * Reconfigure the sw and fw including fw redownload
945*4882a593Smuzhiyun 		 */
946*4882a593Smuzhiyun 		handle->surprise_removed = MFALSE;
947*4882a593Smuzhiyun 		woal_do_flr(handle, prepare, true);
948*4882a593Smuzhiyun 		if (ref_handle) {
949*4882a593Smuzhiyun 			ref_handle->surprise_removed = MFALSE;
950*4882a593Smuzhiyun 			woal_do_flr(ref_handle, prepare, true);
951*4882a593Smuzhiyun 		}
952*4882a593Smuzhiyun 	}
953*4882a593Smuzhiyun 	LEAVE();
954*4882a593Smuzhiyun }
955*4882a593Smuzhiyun #endif
956*4882a593Smuzhiyun 
957*4882a593Smuzhiyun static const struct pci_error_handlers woal_pcie_err_handler[] = {
958*4882a593Smuzhiyun #if LINUX_VERSION_CODE >= KERNEL_VERSION(4, 13, 0)
959*4882a593Smuzhiyun 	{
960*4882a593Smuzhiyun 		.reset_prepare = woal_pcie_reset_prepare,
961*4882a593Smuzhiyun 		.reset_done = woal_pcie_reset_done,
962*4882a593Smuzhiyun 	},
963*4882a593Smuzhiyun #else
964*4882a593Smuzhiyun 	{
965*4882a593Smuzhiyun 		.reset_notify = woal_pcie_reset_notify,
966*4882a593Smuzhiyun 	},
967*4882a593Smuzhiyun #endif
968*4882a593Smuzhiyun };
969*4882a593Smuzhiyun #endif // KERNEL_VERSION(3.18.0)
970*4882a593Smuzhiyun 
971*4882a593Smuzhiyun /* PCI Device Driver */
972*4882a593Smuzhiyun static struct pci_driver REFDATA wlan_pcie = {
973*4882a593Smuzhiyun 	.name = "wlan_pcie",
974*4882a593Smuzhiyun 	.id_table = wlan_ids,
975*4882a593Smuzhiyun 	.probe = woal_pcie_probe,
976*4882a593Smuzhiyun 	.remove = woal_pcie_remove,
977*4882a593Smuzhiyun 	.shutdown = woal_pcie_shutdown,
978*4882a593Smuzhiyun #ifdef CONFIG_PM
979*4882a593Smuzhiyun 	/* Power Management Hooks */
980*4882a593Smuzhiyun 	.suspend = woal_pcie_suspend,
981*4882a593Smuzhiyun 	.resume = woal_pcie_resume,
982*4882a593Smuzhiyun #endif
983*4882a593Smuzhiyun #if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 18, 0)
984*4882a593Smuzhiyun 	.err_handler = woal_pcie_err_handler,
985*4882a593Smuzhiyun #endif
986*4882a593Smuzhiyun };
987*4882a593Smuzhiyun 
988*4882a593Smuzhiyun /********************************************************
989*4882a593Smuzhiyun 			Global Functions
990*4882a593Smuzhiyun ********************************************************/
991*4882a593Smuzhiyun 
992*4882a593Smuzhiyun /**
993*4882a593Smuzhiyun  *  @brief This function writes data into card register
994*4882a593Smuzhiyun  *
995*4882a593Smuzhiyun  *  @param handle   A Pointer to the moal_handle structure
996*4882a593Smuzhiyun  *  @param reg      Register offset
997*4882a593Smuzhiyun  *  @param data     Value
998*4882a593Smuzhiyun  *
999*4882a593Smuzhiyun  *  @return    		MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
1000*4882a593Smuzhiyun  */
woal_pcie_write_reg(moal_handle * handle,t_u32 reg,t_u32 data)1001*4882a593Smuzhiyun static mlan_status woal_pcie_write_reg(moal_handle *handle, t_u32 reg,
1002*4882a593Smuzhiyun 				       t_u32 data)
1003*4882a593Smuzhiyun {
1004*4882a593Smuzhiyun 	pcie_service_card *card = (pcie_service_card *)handle->card;
1005*4882a593Smuzhiyun 
1006*4882a593Smuzhiyun 	iowrite32(data, card->pci_mmap1 + reg);
1007*4882a593Smuzhiyun 
1008*4882a593Smuzhiyun 	return MLAN_STATUS_SUCCESS;
1009*4882a593Smuzhiyun }
1010*4882a593Smuzhiyun 
1011*4882a593Smuzhiyun /**
1012*4882a593Smuzhiyun  *  @brief This function reads data from card register
1013*4882a593Smuzhiyun  *
1014*4882a593Smuzhiyun  *  @param handle   A Pointer to the moal_handle structure
1015*4882a593Smuzhiyun  *  @param reg      Register offset
1016*4882a593Smuzhiyun  *  @param data     Value
1017*4882a593Smuzhiyun  *
1018*4882a593Smuzhiyun  *  @return    		MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
1019*4882a593Smuzhiyun  */
woal_pcie_read_reg(moal_handle * handle,t_u32 reg,t_u32 * data)1020*4882a593Smuzhiyun static mlan_status woal_pcie_read_reg(moal_handle *handle, t_u32 reg,
1021*4882a593Smuzhiyun 				      t_u32 *data)
1022*4882a593Smuzhiyun {
1023*4882a593Smuzhiyun 	pcie_service_card *card = (pcie_service_card *)handle->card;
1024*4882a593Smuzhiyun 	*data = ioread32(card->pci_mmap1 + reg);
1025*4882a593Smuzhiyun 
1026*4882a593Smuzhiyun 	if (*data == MLAN_STATUS_FAILURE)
1027*4882a593Smuzhiyun 		return MLAN_STATUS_FAILURE;
1028*4882a593Smuzhiyun 
1029*4882a593Smuzhiyun 	return MLAN_STATUS_SUCCESS;
1030*4882a593Smuzhiyun }
1031*4882a593Smuzhiyun 
1032*4882a593Smuzhiyun /**
1033*4882a593Smuzhiyun  *  @brief This function writes multiple bytes into card memory
1034*4882a593Smuzhiyun  *
1035*4882a593Smuzhiyun  *  @param handle   A Pointer to the moal_handle structure
1036*4882a593Smuzhiyun  *  @param pmbuf	Pointer to mlan_buffer structure
1037*4882a593Smuzhiyun  *  @param port		Port
1038*4882a593Smuzhiyun  *  @param timeout 	Time out value
1039*4882a593Smuzhiyun  *
1040*4882a593Smuzhiyun  *  @return    		MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
1041*4882a593Smuzhiyun  */
woal_pcie_write_data_sync(moal_handle * handle,mlan_buffer * pmbuf,t_u32 port,t_u32 timeout)1042*4882a593Smuzhiyun static mlan_status woal_pcie_write_data_sync(moal_handle *handle,
1043*4882a593Smuzhiyun 					     mlan_buffer *pmbuf, t_u32 port,
1044*4882a593Smuzhiyun 					     t_u32 timeout)
1045*4882a593Smuzhiyun {
1046*4882a593Smuzhiyun 	return MLAN_STATUS_SUCCESS;
1047*4882a593Smuzhiyun }
1048*4882a593Smuzhiyun 
1049*4882a593Smuzhiyun /**
1050*4882a593Smuzhiyun  *  @brief This function reads multiple bytes from card memory
1051*4882a593Smuzhiyun  *
1052*4882a593Smuzhiyun  *  @param handle   A Pointer to the moal_handle structure
1053*4882a593Smuzhiyun  *  @param pmbuf	Pointer to mlan_buffer structure
1054*4882a593Smuzhiyun  *  @param port		Port
1055*4882a593Smuzhiyun  *  @param timeout 	Time out value
1056*4882a593Smuzhiyun  *
1057*4882a593Smuzhiyun  *  @return    		MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
1058*4882a593Smuzhiyun  */
woal_pcie_read_data_sync(moal_handle * handle,mlan_buffer * pmbuf,t_u32 port,t_u32 timeout)1059*4882a593Smuzhiyun static mlan_status woal_pcie_read_data_sync(moal_handle *handle,
1060*4882a593Smuzhiyun 					    mlan_buffer *pmbuf, t_u32 port,
1061*4882a593Smuzhiyun 					    t_u32 timeout)
1062*4882a593Smuzhiyun {
1063*4882a593Smuzhiyun 	return MLAN_STATUS_SUCCESS;
1064*4882a593Smuzhiyun }
1065*4882a593Smuzhiyun 
1066*4882a593Smuzhiyun /**
1067*4882a593Smuzhiyun  *  @brief This function handles the interrupt.
1068*4882a593Smuzhiyun  *
1069*4882a593Smuzhiyun  *  @param irq	    The irq no. of PCIE device
1070*4882a593Smuzhiyun  *  @param dev_id   A pointer to the pci_dev structure
1071*4882a593Smuzhiyun  *
1072*4882a593Smuzhiyun  *  @return         IRQ_HANDLED
1073*4882a593Smuzhiyun  */
woal_pcie_interrupt(int irq,void * dev_id)1074*4882a593Smuzhiyun static irqreturn_t woal_pcie_interrupt(int irq, void *dev_id)
1075*4882a593Smuzhiyun {
1076*4882a593Smuzhiyun 	struct pci_dev *pdev;
1077*4882a593Smuzhiyun 	pcie_service_card *card;
1078*4882a593Smuzhiyun 	moal_handle *handle;
1079*4882a593Smuzhiyun 	mlan_status ret = MLAN_STATUS_SUCCESS;
1080*4882a593Smuzhiyun 
1081*4882a593Smuzhiyun 	pdev = (struct pci_dev *)dev_id;
1082*4882a593Smuzhiyun 	if (!pdev) {
1083*4882a593Smuzhiyun 		PRINTM(MFATAL, "%s: pdev is NULL\n", (t_u8 *)pdev);
1084*4882a593Smuzhiyun 		goto exit;
1085*4882a593Smuzhiyun 	}
1086*4882a593Smuzhiyun 
1087*4882a593Smuzhiyun 	card = (pcie_service_card *)pci_get_drvdata(pdev);
1088*4882a593Smuzhiyun 	if (!card || !card->handle) {
1089*4882a593Smuzhiyun 		PRINTM(MFATAL, "%s: card=%p handle=%p\n", __func__, card,
1090*4882a593Smuzhiyun 		       card ? card->handle : NULL);
1091*4882a593Smuzhiyun 		goto exit;
1092*4882a593Smuzhiyun 	}
1093*4882a593Smuzhiyun 	handle = card->handle;
1094*4882a593Smuzhiyun 	if (handle->surprise_removed == MTRUE) {
1095*4882a593Smuzhiyun 		ret = MLAN_STATUS_FAILURE;
1096*4882a593Smuzhiyun 		goto exit;
1097*4882a593Smuzhiyun 	}
1098*4882a593Smuzhiyun 	PRINTM(MINFO, "*** IN PCIE IRQ ***\n");
1099*4882a593Smuzhiyun 	handle->main_state = MOAL_RECV_INT;
1100*4882a593Smuzhiyun 	if (handle->second_mac)
1101*4882a593Smuzhiyun 		PRINTM(MINTR, "**\n");
1102*4882a593Smuzhiyun 	else
1103*4882a593Smuzhiyun 		PRINTM(MINTR, "*\n");
1104*4882a593Smuzhiyun 
1105*4882a593Smuzhiyun 	ret = mlan_interrupt(0xffff, handle->pmlan_adapter);
1106*4882a593Smuzhiyun 	if (handle->is_suspended) {
1107*4882a593Smuzhiyun 		PRINTM(MINTR, "Receive interrupt in hs_suspended\n");
1108*4882a593Smuzhiyun 		goto exit;
1109*4882a593Smuzhiyun 	}
1110*4882a593Smuzhiyun 	queue_work(handle->workqueue, &handle->main_work);
1111*4882a593Smuzhiyun 
1112*4882a593Smuzhiyun exit:
1113*4882a593Smuzhiyun 	if (ret == MLAN_STATUS_SUCCESS)
1114*4882a593Smuzhiyun 		return IRQ_HANDLED;
1115*4882a593Smuzhiyun 	else
1116*4882a593Smuzhiyun 		return IRQ_NONE;
1117*4882a593Smuzhiyun }
1118*4882a593Smuzhiyun 
1119*4882a593Smuzhiyun /**
1120*4882a593Smuzhiyun  *  @brief This function handles the MSI-X interrupt.
1121*4882a593Smuzhiyun  *
1122*4882a593Smuzhiyun  *  @param irq	    The irq no. of PCIE device
1123*4882a593Smuzhiyun  *  @param dev_id   A pointer to the msix_context structure
1124*4882a593Smuzhiyun  *
1125*4882a593Smuzhiyun  *  @return         IRQ_HANDLED
1126*4882a593Smuzhiyun  */
woal_pcie_msix_interrupt(int irq,void * dev_id)1127*4882a593Smuzhiyun static irqreturn_t woal_pcie_msix_interrupt(int irq, void *dev_id)
1128*4882a593Smuzhiyun {
1129*4882a593Smuzhiyun 	struct pci_dev *pdev;
1130*4882a593Smuzhiyun 	pcie_service_card *card;
1131*4882a593Smuzhiyun 	moal_handle *handle;
1132*4882a593Smuzhiyun 	msix_context *ctx = (msix_context *)dev_id;
1133*4882a593Smuzhiyun 	mlan_status ret = MLAN_STATUS_SUCCESS;
1134*4882a593Smuzhiyun 
1135*4882a593Smuzhiyun 	if (!ctx) {
1136*4882a593Smuzhiyun 		PRINTM(MFATAL, "%s: ctx=%p is NULL\n", __func__, ctx);
1137*4882a593Smuzhiyun 		goto exit;
1138*4882a593Smuzhiyun 	}
1139*4882a593Smuzhiyun 
1140*4882a593Smuzhiyun 	pdev = ctx->dev;
1141*4882a593Smuzhiyun 
1142*4882a593Smuzhiyun 	if (!pdev) {
1143*4882a593Smuzhiyun 		PRINTM(MFATAL, "%s: pdev is NULL\n", (t_u8 *)pdev);
1144*4882a593Smuzhiyun 		goto exit;
1145*4882a593Smuzhiyun 	}
1146*4882a593Smuzhiyun 
1147*4882a593Smuzhiyun 	card = (pcie_service_card *)pci_get_drvdata(pdev);
1148*4882a593Smuzhiyun 	if (!card || !card->handle) {
1149*4882a593Smuzhiyun 		PRINTM(MFATAL, "%s: card=%p handle=%p\n", __func__, card,
1150*4882a593Smuzhiyun 		       card ? card->handle : NULL);
1151*4882a593Smuzhiyun 		goto exit;
1152*4882a593Smuzhiyun 	}
1153*4882a593Smuzhiyun 	handle = card->handle;
1154*4882a593Smuzhiyun 	if (handle->surprise_removed == MTRUE) {
1155*4882a593Smuzhiyun 		ret = MLAN_STATUS_FAILURE;
1156*4882a593Smuzhiyun 		goto exit;
1157*4882a593Smuzhiyun 	}
1158*4882a593Smuzhiyun 	PRINTM(MINFO, "*** IN PCIE IRQ ***\n");
1159*4882a593Smuzhiyun 	handle->main_state = MOAL_RECV_INT;
1160*4882a593Smuzhiyun 	if (handle->second_mac)
1161*4882a593Smuzhiyun 		PRINTM(MINTR, "**\n");
1162*4882a593Smuzhiyun 	else
1163*4882a593Smuzhiyun 		PRINTM(MINTR, "*\n");
1164*4882a593Smuzhiyun 	ret = mlan_interrupt(ctx->msg_id, handle->pmlan_adapter);
1165*4882a593Smuzhiyun 	queue_work(handle->workqueue, &handle->main_work);
1166*4882a593Smuzhiyun 
1167*4882a593Smuzhiyun exit:
1168*4882a593Smuzhiyun 	if (ret == MLAN_STATUS_SUCCESS)
1169*4882a593Smuzhiyun 		return IRQ_HANDLED;
1170*4882a593Smuzhiyun 	else
1171*4882a593Smuzhiyun 		return IRQ_NONE;
1172*4882a593Smuzhiyun }
1173*4882a593Smuzhiyun /**
1174*4882a593Smuzhiyun  *  @brief This function pre-initializes the PCI-E host
1175*4882a593Smuzhiyun  *  memory space, etc.
1176*4882a593Smuzhiyun  *
1177*4882a593Smuzhiyun  *  @param handle   A pointer to moal_handle structure
1178*4882a593Smuzhiyun  *
1179*4882a593Smuzhiyun  *  @return         MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
1180*4882a593Smuzhiyun  */
woal_pcie_preinit(struct pci_dev * pdev)1181*4882a593Smuzhiyun static mlan_status woal_pcie_preinit(struct pci_dev *pdev)
1182*4882a593Smuzhiyun {
1183*4882a593Smuzhiyun 	int ret;
1184*4882a593Smuzhiyun 
1185*4882a593Smuzhiyun 	if (pdev->multifunction)
1186*4882a593Smuzhiyun 		device_disable_async_suspend(&pdev->dev);
1187*4882a593Smuzhiyun 
1188*4882a593Smuzhiyun 	ret = pci_enable_device(pdev);
1189*4882a593Smuzhiyun 
1190*4882a593Smuzhiyun 	if (ret)
1191*4882a593Smuzhiyun 		goto err_enable_dev;
1192*4882a593Smuzhiyun 
1193*4882a593Smuzhiyun 	pci_set_master(pdev);
1194*4882a593Smuzhiyun 
1195*4882a593Smuzhiyun 	PRINTM(MINFO, "Try set_consistent_dma_mask(32)\n");
1196*4882a593Smuzhiyun #if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 18, 0)
1197*4882a593Smuzhiyun 	ret = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
1198*4882a593Smuzhiyun #else
1199*4882a593Smuzhiyun 	ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
1200*4882a593Smuzhiyun #endif
1201*4882a593Smuzhiyun 	if (ret) {
1202*4882a593Smuzhiyun 		PRINTM(MERROR, "set_dma_mask(32) failed\n");
1203*4882a593Smuzhiyun 		goto err_set_dma_mask;
1204*4882a593Smuzhiyun 	}
1205*4882a593Smuzhiyun 
1206*4882a593Smuzhiyun #if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 18, 0)
1207*4882a593Smuzhiyun 	ret = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
1208*4882a593Smuzhiyun #else
1209*4882a593Smuzhiyun 	ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
1210*4882a593Smuzhiyun #endif
1211*4882a593Smuzhiyun 	if (ret) {
1212*4882a593Smuzhiyun 		PRINTM(MERROR, "set_consistent_dma_mask(64) failed\n");
1213*4882a593Smuzhiyun 		goto err_set_dma_mask;
1214*4882a593Smuzhiyun 	}
1215*4882a593Smuzhiyun 	return MLAN_STATUS_SUCCESS;
1216*4882a593Smuzhiyun 
1217*4882a593Smuzhiyun err_set_dma_mask:
1218*4882a593Smuzhiyun 	pci_disable_device(pdev);
1219*4882a593Smuzhiyun err_enable_dev:
1220*4882a593Smuzhiyun 	return MLAN_STATUS_FAILURE;
1221*4882a593Smuzhiyun }
1222*4882a593Smuzhiyun 
1223*4882a593Smuzhiyun /**
1224*4882a593Smuzhiyun  *  @brief This function initializes the PCI-E host
1225*4882a593Smuzhiyun  *  memory space, etc.
1226*4882a593Smuzhiyun  *
1227*4882a593Smuzhiyun  *  @param card   A pointer to pcie_service_card structure
1228*4882a593Smuzhiyun  *
1229*4882a593Smuzhiyun  *  @return         MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
1230*4882a593Smuzhiyun  */
woal_pcie_init(pcie_service_card * card)1231*4882a593Smuzhiyun static mlan_status woal_pcie_init(pcie_service_card *card)
1232*4882a593Smuzhiyun {
1233*4882a593Smuzhiyun 	struct pci_dev *pdev = NULL;
1234*4882a593Smuzhiyun 	int ret;
1235*4882a593Smuzhiyun 
1236*4882a593Smuzhiyun 	pdev = card->dev;
1237*4882a593Smuzhiyun 	pci_set_drvdata(pdev, card);
1238*4882a593Smuzhiyun #if 0
1239*4882a593Smuzhiyun 	ret = pci_enable_device(pdev);
1240*4882a593Smuzhiyun 	if (ret)
1241*4882a593Smuzhiyun 		goto err_enable_dev;
1242*4882a593Smuzhiyun 
1243*4882a593Smuzhiyun 	pci_set_master(pdev);
1244*4882a593Smuzhiyun 
1245*4882a593Smuzhiyun 	PRINTM(MINFO, "Try set_consistent_dma_mask(32)\n");
1246*4882a593Smuzhiyun #if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 18, 0)
1247*4882a593Smuzhiyun 	ret = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
1248*4882a593Smuzhiyun #else
1249*4882a593Smuzhiyun 	ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
1250*4882a593Smuzhiyun #endif
1251*4882a593Smuzhiyun 	if (ret) {
1252*4882a593Smuzhiyun 		PRINTM(MERROR, "set_dma_mask(32) failed\n");
1253*4882a593Smuzhiyun 		goto err_set_dma_mask;
1254*4882a593Smuzhiyun 	}
1255*4882a593Smuzhiyun 
1256*4882a593Smuzhiyun #if LINUX_VERSION_CODE >= KERNEL_VERSION(5, 18, 0)
1257*4882a593Smuzhiyun 	ret = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
1258*4882a593Smuzhiyun #else
1259*4882a593Smuzhiyun 	ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
1260*4882a593Smuzhiyun #endif
1261*4882a593Smuzhiyun 	if (ret) {
1262*4882a593Smuzhiyun 		PRINTM(MERROR, "set_consistent_dma_mask(64) failed\n");
1263*4882a593Smuzhiyun 		goto err_set_dma_mask;
1264*4882a593Smuzhiyun 	}
1265*4882a593Smuzhiyun #endif
1266*4882a593Smuzhiyun 
1267*4882a593Smuzhiyun 	ret = pci_request_region(pdev, 0, DRV_NAME);
1268*4882a593Smuzhiyun 	if (ret) {
1269*4882a593Smuzhiyun 		PRINTM(MERROR, "req_reg(0) error\n");
1270*4882a593Smuzhiyun 		goto err_req_region0;
1271*4882a593Smuzhiyun 	}
1272*4882a593Smuzhiyun 	card->pci_mmap = pci_iomap(pdev, 0, 0);
1273*4882a593Smuzhiyun 	if (!card->pci_mmap) {
1274*4882a593Smuzhiyun 		PRINTM(MERROR, "iomap(0) error\n");
1275*4882a593Smuzhiyun 		goto err_iomap0;
1276*4882a593Smuzhiyun 	}
1277*4882a593Smuzhiyun 	ret = pci_request_region(pdev, 2, DRV_NAME);
1278*4882a593Smuzhiyun 	if (ret) {
1279*4882a593Smuzhiyun 		PRINTM(MERROR, "req_reg(2) error\n");
1280*4882a593Smuzhiyun 		goto err_req_region2;
1281*4882a593Smuzhiyun 	}
1282*4882a593Smuzhiyun 	card->pci_mmap1 = pci_iomap(pdev, 2, 0);
1283*4882a593Smuzhiyun 	if (!card->pci_mmap1) {
1284*4882a593Smuzhiyun 		PRINTM(MERROR, "iomap(2) error\n");
1285*4882a593Smuzhiyun 		goto err_iomap2;
1286*4882a593Smuzhiyun 	}
1287*4882a593Smuzhiyun 
1288*4882a593Smuzhiyun 	PRINTM(MINFO,
1289*4882a593Smuzhiyun 	       "PCI memory map Virt0: %p PCI memory map Virt2: "
1290*4882a593Smuzhiyun 	       "%p\n",
1291*4882a593Smuzhiyun 	       card->pci_mmap, card->pci_mmap1);
1292*4882a593Smuzhiyun 
1293*4882a593Smuzhiyun 	return MLAN_STATUS_SUCCESS;
1294*4882a593Smuzhiyun 
1295*4882a593Smuzhiyun err_iomap2:
1296*4882a593Smuzhiyun 	pci_release_region(pdev, 2);
1297*4882a593Smuzhiyun err_req_region2:
1298*4882a593Smuzhiyun 	pci_iounmap(pdev, card->pci_mmap);
1299*4882a593Smuzhiyun err_iomap0:
1300*4882a593Smuzhiyun 	pci_release_region(pdev, 0);
1301*4882a593Smuzhiyun err_req_region0:
1302*4882a593Smuzhiyun #if 0
1303*4882a593Smuzhiyun err_set_dma_mask:
1304*4882a593Smuzhiyun #endif
1305*4882a593Smuzhiyun 
1306*4882a593Smuzhiyun #if 0
1307*4882a593Smuzhiyun err_enable_dev:
1308*4882a593Smuzhiyun #endif
1309*4882a593Smuzhiyun 	pci_set_drvdata(pdev, NULL);
1310*4882a593Smuzhiyun 	return MLAN_STATUS_FAILURE;
1311*4882a593Smuzhiyun }
1312*4882a593Smuzhiyun 
1313*4882a593Smuzhiyun /**
1314*4882a593Smuzhiyun  *  @brief This function registers the PCIE device
1315*4882a593Smuzhiyun  *
1316*4882a593Smuzhiyun  *  @param handle   A pointer to moal_handle structure
1317*4882a593Smuzhiyun  *
1318*4882a593Smuzhiyun  *  @return         MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
1319*4882a593Smuzhiyun  */
woal_pcie_register_dev(moal_handle * handle)1320*4882a593Smuzhiyun static mlan_status woal_pcie_register_dev(moal_handle *handle)
1321*4882a593Smuzhiyun {
1322*4882a593Smuzhiyun 	mlan_status ret = MLAN_STATUS_SUCCESS;
1323*4882a593Smuzhiyun 	pcie_service_card *card = NULL;
1324*4882a593Smuzhiyun 	struct pci_dev *pdev = NULL;
1325*4882a593Smuzhiyun 	unsigned char nvec;
1326*4882a593Smuzhiyun 	unsigned char i, j;
1327*4882a593Smuzhiyun 	ENTER();
1328*4882a593Smuzhiyun 
1329*4882a593Smuzhiyun 	if (!handle || !handle->card) {
1330*4882a593Smuzhiyun 		PRINTM(MINFO, "%s: handle=%p card=%p\n", __FUNCTION__, handle,
1331*4882a593Smuzhiyun 		       handle ? handle->card : NULL);
1332*4882a593Smuzhiyun 		LEAVE();
1333*4882a593Smuzhiyun 		return MLAN_STATUS_FAILURE;
1334*4882a593Smuzhiyun 	}
1335*4882a593Smuzhiyun 
1336*4882a593Smuzhiyun 	card = (pcie_service_card *)handle->card;
1337*4882a593Smuzhiyun 	pdev = card->dev;
1338*4882a593Smuzhiyun 	/* save adapter pointer in card */
1339*4882a593Smuzhiyun 	card->handle = handle;
1340*4882a593Smuzhiyun 
1341*4882a593Smuzhiyun 	switch (pcie_int_mode) {
1342*4882a593Smuzhiyun 	case PCIE_INT_MODE_MSIX:
1343*4882a593Smuzhiyun 		pcie_int_mode = PCIE_INT_MODE_MSIX;
1344*4882a593Smuzhiyun 		nvec = PCIE_NUM_MSIX_VECTORS;
1345*4882a593Smuzhiyun 
1346*4882a593Smuzhiyun 		for (i = 0; i < nvec; i++) {
1347*4882a593Smuzhiyun 			card->msix_entries[i].entry = i;
1348*4882a593Smuzhiyun 		}
1349*4882a593Smuzhiyun 
1350*4882a593Smuzhiyun 		/* Try to enable msix */
1351*4882a593Smuzhiyun #if LINUX_VERSION_CODE >= KERNEL_VERSION(3, 14, 0)
1352*4882a593Smuzhiyun 		ret = pci_enable_msix_exact(pdev, card->msix_entries, nvec);
1353*4882a593Smuzhiyun #else /* LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 31) */
1354*4882a593Smuzhiyun 		ret = pci_enable_msix(pdev, card->msix_entries, nvec);
1355*4882a593Smuzhiyun #endif
1356*4882a593Smuzhiyun 
1357*4882a593Smuzhiyun 		if (ret == 0) {
1358*4882a593Smuzhiyun 			for (i = 0; i < nvec; i++) {
1359*4882a593Smuzhiyun 				card->msix_contexts[i].dev = pdev;
1360*4882a593Smuzhiyun 				card->msix_contexts[i].msg_id = i;
1361*4882a593Smuzhiyun 				ret = request_irq(card->msix_entries[i].vector,
1362*4882a593Smuzhiyun 						  woal_pcie_msix_interrupt, 0,
1363*4882a593Smuzhiyun 						  "mrvl_pcie_msix",
1364*4882a593Smuzhiyun 						  &(card->msix_contexts[i]));
1365*4882a593Smuzhiyun 
1366*4882a593Smuzhiyun 				if (ret) {
1367*4882a593Smuzhiyun 					PRINTM(MFATAL,
1368*4882a593Smuzhiyun 					       "request_irq failed: ret=%d\n",
1369*4882a593Smuzhiyun 					       ret);
1370*4882a593Smuzhiyun 					for (j = 0; j < i; j++)
1371*4882a593Smuzhiyun 						free_irq(card->msix_entries[j]
1372*4882a593Smuzhiyun 								 .vector,
1373*4882a593Smuzhiyun 							 &(card->msix_contexts
1374*4882a593Smuzhiyun 								   [i]));
1375*4882a593Smuzhiyun 					pci_disable_msix(pdev);
1376*4882a593Smuzhiyun 					break;
1377*4882a593Smuzhiyun 				}
1378*4882a593Smuzhiyun 			}
1379*4882a593Smuzhiyun 			if (i == nvec)
1380*4882a593Smuzhiyun 				break;
1381*4882a593Smuzhiyun 		}
1382*4882a593Smuzhiyun 		// follow through
1383*4882a593Smuzhiyun 
1384*4882a593Smuzhiyun 		/* fall through */
1385*4882a593Smuzhiyun 	case PCIE_INT_MODE_MSI:
1386*4882a593Smuzhiyun 		pcie_int_mode = PCIE_INT_MODE_MSI;
1387*4882a593Smuzhiyun 		ret = pci_enable_msi(pdev);
1388*4882a593Smuzhiyun 		if (ret == 0) {
1389*4882a593Smuzhiyun 			ret = request_irq(pdev->irq, woal_pcie_interrupt, 0,
1390*4882a593Smuzhiyun 					  "mrvl_pcie_msi", pdev);
1391*4882a593Smuzhiyun 			if (ret) {
1392*4882a593Smuzhiyun 				PRINTM(MFATAL, "request_irq failed: ret=%d\n",
1393*4882a593Smuzhiyun 				       ret);
1394*4882a593Smuzhiyun 				pci_disable_msi(pdev);
1395*4882a593Smuzhiyun 			} else {
1396*4882a593Smuzhiyun 				break;
1397*4882a593Smuzhiyun 			}
1398*4882a593Smuzhiyun 		}
1399*4882a593Smuzhiyun 		// follow through
1400*4882a593Smuzhiyun 
1401*4882a593Smuzhiyun 		/* fall through */
1402*4882a593Smuzhiyun 	case PCIE_INT_MODE_LEGACY:
1403*4882a593Smuzhiyun 		pcie_int_mode = PCIE_INT_MODE_LEGACY;
1404*4882a593Smuzhiyun 		ret = request_irq(pdev->irq, woal_pcie_interrupt, IRQF_SHARED,
1405*4882a593Smuzhiyun 				  "mrvl_pcie", pdev);
1406*4882a593Smuzhiyun 		if (ret) {
1407*4882a593Smuzhiyun 			PRINTM(MFATAL, "request_irq failed: ret=%d\n", ret);
1408*4882a593Smuzhiyun 			ret = MLAN_STATUS_FAILURE;
1409*4882a593Smuzhiyun 			goto done;
1410*4882a593Smuzhiyun 		}
1411*4882a593Smuzhiyun 
1412*4882a593Smuzhiyun 		break;
1413*4882a593Smuzhiyun 
1414*4882a593Smuzhiyun 	default:
1415*4882a593Smuzhiyun 		PRINTM(MFATAL, "pcie_int_mode %d failed\n", pcie_int_mode);
1416*4882a593Smuzhiyun 		ret = MLAN_STATUS_FAILURE;
1417*4882a593Smuzhiyun 		goto done;
1418*4882a593Smuzhiyun 		break;
1419*4882a593Smuzhiyun 	}
1420*4882a593Smuzhiyun 
1421*4882a593Smuzhiyun #ifdef PCIE9098
1422*4882a593Smuzhiyun 	if (card->dev->device == PCIE_DEVICE_ID_88W9098P_FN1)
1423*4882a593Smuzhiyun 		mlan_set_int_mode(handle->pmlan_adapter, pcie_int_mode, 1);
1424*4882a593Smuzhiyun 	else
1425*4882a593Smuzhiyun #endif
1426*4882a593Smuzhiyun 		mlan_set_int_mode(handle->pmlan_adapter, pcie_int_mode, 0);
1427*4882a593Smuzhiyun 
1428*4882a593Smuzhiyun done:
1429*4882a593Smuzhiyun 	LEAVE();
1430*4882a593Smuzhiyun 	return ret;
1431*4882a593Smuzhiyun }
1432*4882a593Smuzhiyun 
1433*4882a593Smuzhiyun /**
1434*4882a593Smuzhiyun  *  @brief This function cleans up the host memory spaces
1435*4882a593Smuzhiyun  *
1436*4882a593Smuzhiyun  *  @param card   A pointer to pcie_service_card structure
1437*4882a593Smuzhiyun  *
1438*4882a593Smuzhiyun  *  @return         N/A
1439*4882a593Smuzhiyun  */
woal_pcie_cleanup(pcie_service_card * card)1440*4882a593Smuzhiyun static void woal_pcie_cleanup(pcie_service_card *card)
1441*4882a593Smuzhiyun {
1442*4882a593Smuzhiyun 	struct pci_dev *pdev = NULL;
1443*4882a593Smuzhiyun 	pdev = card->dev;
1444*4882a593Smuzhiyun 	PRINTM(MINFO, "Clearing driver ready signature\n");
1445*4882a593Smuzhiyun 
1446*4882a593Smuzhiyun 	if (pdev) {
1447*4882a593Smuzhiyun 		pci_iounmap(pdev, card->pci_mmap);
1448*4882a593Smuzhiyun 		pci_iounmap(pdev, card->pci_mmap1);
1449*4882a593Smuzhiyun 
1450*4882a593Smuzhiyun 		if (pci_is_enabled(pdev))
1451*4882a593Smuzhiyun 			pci_disable_device(pdev);
1452*4882a593Smuzhiyun 
1453*4882a593Smuzhiyun 		pci_release_region(pdev, 0);
1454*4882a593Smuzhiyun 		pci_release_region(pdev, 2);
1455*4882a593Smuzhiyun 		pci_set_drvdata(pdev, NULL);
1456*4882a593Smuzhiyun 	}
1457*4882a593Smuzhiyun }
1458*4882a593Smuzhiyun 
1459*4882a593Smuzhiyun /**
1460*4882a593Smuzhiyun  *  @brief This function unregisters the PCIE device
1461*4882a593Smuzhiyun  *
1462*4882a593Smuzhiyun  *  @param handle   A pointer to moal_handle structure
1463*4882a593Smuzhiyun  *
1464*4882a593Smuzhiyun  *  @return         MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
1465*4882a593Smuzhiyun  */
woal_pcie_unregister_dev(moal_handle * handle)1466*4882a593Smuzhiyun static void woal_pcie_unregister_dev(moal_handle *handle)
1467*4882a593Smuzhiyun {
1468*4882a593Smuzhiyun 	pcie_service_card *card =
1469*4882a593Smuzhiyun 		handle ? (pcie_service_card *)handle->card : NULL;
1470*4882a593Smuzhiyun 	struct pci_dev *pdev = NULL;
1471*4882a593Smuzhiyun 	unsigned char i;
1472*4882a593Smuzhiyun 	unsigned char nvec;
1473*4882a593Smuzhiyun 	ENTER();
1474*4882a593Smuzhiyun 
1475*4882a593Smuzhiyun 	if (card) {
1476*4882a593Smuzhiyun 		pdev = card->dev;
1477*4882a593Smuzhiyun 		PRINTM(MINFO, "%s(): calling free_irq()\n", __func__);
1478*4882a593Smuzhiyun 
1479*4882a593Smuzhiyun 		switch (pcie_int_mode) {
1480*4882a593Smuzhiyun 		case PCIE_INT_MODE_MSIX:
1481*4882a593Smuzhiyun 			nvec = PCIE_NUM_MSIX_VECTORS;
1482*4882a593Smuzhiyun 
1483*4882a593Smuzhiyun 			for (i = 0; i < nvec; i++)
1484*4882a593Smuzhiyun 				synchronize_irq(card->msix_entries[i].vector);
1485*4882a593Smuzhiyun 
1486*4882a593Smuzhiyun 			for (i = 0; i < nvec; i++)
1487*4882a593Smuzhiyun 				free_irq(card->msix_entries[i].vector,
1488*4882a593Smuzhiyun 					 &(card->msix_contexts[i]));
1489*4882a593Smuzhiyun 
1490*4882a593Smuzhiyun 			pci_disable_msix(pdev);
1491*4882a593Smuzhiyun 
1492*4882a593Smuzhiyun 			break;
1493*4882a593Smuzhiyun 
1494*4882a593Smuzhiyun 		case PCIE_INT_MODE_MSI:
1495*4882a593Smuzhiyun 			free_irq(card->dev->irq, pdev);
1496*4882a593Smuzhiyun 			pci_disable_msi(pdev);
1497*4882a593Smuzhiyun 			break;
1498*4882a593Smuzhiyun 
1499*4882a593Smuzhiyun 		case PCIE_INT_MODE_LEGACY:
1500*4882a593Smuzhiyun 			free_irq(card->dev->irq, pdev);
1501*4882a593Smuzhiyun 			break;
1502*4882a593Smuzhiyun 
1503*4882a593Smuzhiyun 		default:
1504*4882a593Smuzhiyun 			PRINTM(MFATAL, "pcie_int_mode %d failed\n",
1505*4882a593Smuzhiyun 			       pcie_int_mode);
1506*4882a593Smuzhiyun 			break;
1507*4882a593Smuzhiyun 		}
1508*4882a593Smuzhiyun 		card->handle = NULL;
1509*4882a593Smuzhiyun 	}
1510*4882a593Smuzhiyun 	LEAVE();
1511*4882a593Smuzhiyun }
1512*4882a593Smuzhiyun 
1513*4882a593Smuzhiyun /**
1514*4882a593Smuzhiyun  *  @brief This function registers the IF module in bus driver
1515*4882a593Smuzhiyun  *
1516*4882a593Smuzhiyun  *  @return	    MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
1517*4882a593Smuzhiyun  */
woal_pcie_bus_register(void)1518*4882a593Smuzhiyun mlan_status woal_pcie_bus_register(void)
1519*4882a593Smuzhiyun {
1520*4882a593Smuzhiyun 	mlan_status ret = MLAN_STATUS_SUCCESS;
1521*4882a593Smuzhiyun 	ENTER();
1522*4882a593Smuzhiyun 
1523*4882a593Smuzhiyun 	/* API registers the NXP PCIE driver */
1524*4882a593Smuzhiyun 	if (pci_register_driver(&wlan_pcie)) {
1525*4882a593Smuzhiyun 		PRINTM(MFATAL, "PCIE Driver Registration Failed \n");
1526*4882a593Smuzhiyun 		ret = MLAN_STATUS_FAILURE;
1527*4882a593Smuzhiyun 	}
1528*4882a593Smuzhiyun 
1529*4882a593Smuzhiyun 	LEAVE();
1530*4882a593Smuzhiyun 	return ret;
1531*4882a593Smuzhiyun }
1532*4882a593Smuzhiyun 
1533*4882a593Smuzhiyun /**
1534*4882a593Smuzhiyun  *  @brief This function de-registers the IF module in bus driver
1535*4882a593Smuzhiyun  *
1536*4882a593Smuzhiyun  *  @return 	   N/A
1537*4882a593Smuzhiyun  */
woal_pcie_bus_unregister(void)1538*4882a593Smuzhiyun void woal_pcie_bus_unregister(void)
1539*4882a593Smuzhiyun {
1540*4882a593Smuzhiyun 	ENTER();
1541*4882a593Smuzhiyun 
1542*4882a593Smuzhiyun 	/* PCIE Driver Unregistration */
1543*4882a593Smuzhiyun 	pci_unregister_driver(&wlan_pcie);
1544*4882a593Smuzhiyun 
1545*4882a593Smuzhiyun 	LEAVE();
1546*4882a593Smuzhiyun }
1547*4882a593Smuzhiyun 
1548*4882a593Smuzhiyun #if defined(PCIE9098) || defined(PCIE9097) || defined(PCIENW62X)
1549*4882a593Smuzhiyun #define PCIE9098_DUMP_CTRL_REG 0x1C94
1550*4882a593Smuzhiyun #define PCIE9098_DUMP_START_REG 0x1C98
1551*4882a593Smuzhiyun #define PCIE9098_DUMP_END_REG 0x1C9F
1552*4882a593Smuzhiyun #endif
1553*4882a593Smuzhiyun #if defined(PCIE8897) || defined(PCIE8997)
1554*4882a593Smuzhiyun #define DEBUG_DUMP_CTRL_REG 0xCF4
1555*4882a593Smuzhiyun #define DEBUG_DUMP_START_REG 0xCF8
1556*4882a593Smuzhiyun #define DEBUG_DUMP_END_REG 0xCFF
1557*4882a593Smuzhiyun #endif
1558*4882a593Smuzhiyun 
1559*4882a593Smuzhiyun #if defined(PCIE9098) || defined(PCIE9097) || defined(PCIENW62X)
1560*4882a593Smuzhiyun #define PCIE9098_SCRATCH_12_REG 0x1C90
1561*4882a593Smuzhiyun #define PCIE9098_SCRATCH_14_REG 0x1C98
1562*4882a593Smuzhiyun #define PCIE9098_SCRATCH_15_REG 0x1C9C
1563*4882a593Smuzhiyun #define PCIE9098_DUMP_REG_START 0x1C20
1564*4882a593Smuzhiyun #define PCIE9098_DUMP_REG_END 0x1C9C
1565*4882a593Smuzhiyun #endif
1566*4882a593Smuzhiyun 
1567*4882a593Smuzhiyun #if defined(PCIE8997) || defined(PCIE8897)
1568*4882a593Smuzhiyun #define PCIE_SCRATCH_12_REG 0x0CF0;
1569*4882a593Smuzhiyun #define PCIE_SCRATCH_14_REG 0x0CF8;
1570*4882a593Smuzhiyun #define PCIE_SCRATCH_15_REG 0x0CFC;
1571*4882a593Smuzhiyun #define PCIE_DUMP_START_REG 0xC00
1572*4882a593Smuzhiyun #define PCIE_DUMP_END_REG 0xCFC
1573*4882a593Smuzhiyun #endif
1574*4882a593Smuzhiyun /**
1575*4882a593Smuzhiyun  *  @brief This function save the log of pcie register value
1576*4882a593Smuzhiyun  *
1577*4882a593Smuzhiyun  *  @param phandle   A pointer to moal_handle
1578*4882a593Smuzhiyun  *  @param buffer    A pointer to buffer saving log
1579*4882a593Smuzhiyun  *
1580*4882a593Smuzhiyun  *  @return         The length of this log
1581*4882a593Smuzhiyun  */
woal_pcie_dump_reg_info(moal_handle * phandle,t_u8 * buffer)1582*4882a593Smuzhiyun static int woal_pcie_dump_reg_info(moal_handle *phandle, t_u8 *buffer)
1583*4882a593Smuzhiyun {
1584*4882a593Smuzhiyun 	char *drv_ptr = (char *)buffer;
1585*4882a593Smuzhiyun 	t_u32 reg = 0, value = 0;
1586*4882a593Smuzhiyun 	t_u8 i;
1587*4882a593Smuzhiyun 	char buf[256], *ptr;
1588*4882a593Smuzhiyun 	pcie_service_card *card = (pcie_service_card *)phandle->card;
1589*4882a593Smuzhiyun 	int config_reg_table[] = {0x00, 0x04, 0x10, 0x18, 0x2c,
1590*4882a593Smuzhiyun 				  0x3c, 0x44, 0x80, 0x98, 0x170};
1591*4882a593Smuzhiyun 	t_u32 dump_start_reg = 0;
1592*4882a593Smuzhiyun 	t_u32 dump_end_reg = 0;
1593*4882a593Smuzhiyun 	t_u32 scratch_14_reg = 0;
1594*4882a593Smuzhiyun 	t_u32 scratch_15_reg = 0;
1595*4882a593Smuzhiyun #if defined(PCIE9098) || defined(PCIE9097) || defined(PCIENW62X)
1596*4882a593Smuzhiyun 	/* Tx/Rx/Event AMDA start address */
1597*4882a593Smuzhiyun 	t_u32 adma_reg_table[] = {0x10000, 0x10800, 0x10880, 0x11000, 0x11080};
1598*4882a593Smuzhiyun 	t_u8 j;
1599*4882a593Smuzhiyun #endif
1600*4882a593Smuzhiyun 	ENTER();
1601*4882a593Smuzhiyun 	mlan_pm_wakeup_card(phandle->pmlan_adapter, MTRUE);
1602*4882a593Smuzhiyun 	drv_ptr += sprintf(drv_ptr,
1603*4882a593Smuzhiyun 			   "------------PCIe Registers dump-------------\n");
1604*4882a593Smuzhiyun 	drv_ptr += sprintf(drv_ptr, "Config Space Registers:\n");
1605*4882a593Smuzhiyun 	for (i = 0; i < ARRAY_SIZE(config_reg_table); i++) {
1606*4882a593Smuzhiyun 		pci_read_config_dword(card->dev, config_reg_table[i], &value);
1607*4882a593Smuzhiyun 		drv_ptr += sprintf(drv_ptr, "reg:0x%02x value=0x%08x\n",
1608*4882a593Smuzhiyun 				   config_reg_table[i], value);
1609*4882a593Smuzhiyun 	}
1610*4882a593Smuzhiyun 	drv_ptr += sprintf(drv_ptr, "FW Scrach Registers:\n");
1611*4882a593Smuzhiyun 
1612*4882a593Smuzhiyun #if defined(PCIE8897) || defined(PCIE8997)
1613*4882a593Smuzhiyun 	if (IS_PCIE8897(phandle->card_type) ||
1614*4882a593Smuzhiyun 	    IS_PCIE8997(phandle->card_type)) {
1615*4882a593Smuzhiyun 		reg = PCIE_SCRATCH_12_REG;
1616*4882a593Smuzhiyun 		dump_start_reg = PCIE_DUMP_START_REG;
1617*4882a593Smuzhiyun 		dump_end_reg = PCIE_DUMP_END_REG;
1618*4882a593Smuzhiyun 		scratch_14_reg = PCIE_SCRATCH_14_REG;
1619*4882a593Smuzhiyun 		scratch_15_reg = PCIE_SCRATCH_15_REG;
1620*4882a593Smuzhiyun 	}
1621*4882a593Smuzhiyun #endif
1622*4882a593Smuzhiyun 
1623*4882a593Smuzhiyun #if defined(PCIE9098) || defined(PCIE9097) || defined(PCIENW62X)
1624*4882a593Smuzhiyun 	if (IS_PCIE9098(phandle->card_type) ||
1625*4882a593Smuzhiyun 	    IS_PCIENW62X(phandle->card_type) ||
1626*4882a593Smuzhiyun 	    IS_PCIE9097(phandle->card_type)) {
1627*4882a593Smuzhiyun 		reg = PCIE9098_SCRATCH_12_REG;
1628*4882a593Smuzhiyun 		dump_start_reg = PCIE9098_DUMP_REG_START;
1629*4882a593Smuzhiyun 		dump_end_reg = PCIE9098_DUMP_REG_END;
1630*4882a593Smuzhiyun 		scratch_14_reg = PCIE9098_SCRATCH_14_REG;
1631*4882a593Smuzhiyun 		scratch_15_reg = PCIE9098_SCRATCH_15_REG;
1632*4882a593Smuzhiyun 	}
1633*4882a593Smuzhiyun #endif
1634*4882a593Smuzhiyun 
1635*4882a593Smuzhiyun 	woal_pcie_read_reg(phandle, reg, &value);
1636*4882a593Smuzhiyun 	drv_ptr += sprintf(drv_ptr, "reg:0x%x value=0x%x\n", reg, value);
1637*4882a593Smuzhiyun 	for (i = 0; i < 2; i++) {
1638*4882a593Smuzhiyun 		reg = scratch_14_reg;
1639*4882a593Smuzhiyun 		woal_pcie_read_reg(phandle, reg, &value);
1640*4882a593Smuzhiyun 		drv_ptr +=
1641*4882a593Smuzhiyun 			sprintf(drv_ptr, "reg:0x%x value=0x%x\n", reg, value);
1642*4882a593Smuzhiyun 
1643*4882a593Smuzhiyun 		reg = scratch_15_reg;
1644*4882a593Smuzhiyun 		woal_pcie_read_reg(phandle, reg, &value);
1645*4882a593Smuzhiyun 		drv_ptr +=
1646*4882a593Smuzhiyun 			sprintf(drv_ptr, "reg:0x%x value=0x%x\n", reg, value);
1647*4882a593Smuzhiyun 
1648*4882a593Smuzhiyun 		mdelay(100);
1649*4882a593Smuzhiyun 	}
1650*4882a593Smuzhiyun 	drv_ptr +=
1651*4882a593Smuzhiyun 		sprintf(drv_ptr,
1652*4882a593Smuzhiyun 			"Interface registers dump from offset 0x%x to 0x%x\n",
1653*4882a593Smuzhiyun 			dump_start_reg, dump_end_reg);
1654*4882a593Smuzhiyun 	memset(buf, 0, sizeof(buf));
1655*4882a593Smuzhiyun 	ptr = buf;
1656*4882a593Smuzhiyun 	i = 1;
1657*4882a593Smuzhiyun 	for (reg = dump_start_reg; reg <= dump_end_reg; reg += 4) {
1658*4882a593Smuzhiyun 		woal_pcie_read_reg(phandle, reg, &value);
1659*4882a593Smuzhiyun 		ptr += sprintf(ptr, "%08x ", value);
1660*4882a593Smuzhiyun 		if (!(i % 8)) {
1661*4882a593Smuzhiyun 			drv_ptr += sprintf(drv_ptr, "%s\n", buf);
1662*4882a593Smuzhiyun 			memset(buf, 0, sizeof(buf));
1663*4882a593Smuzhiyun 			ptr = buf;
1664*4882a593Smuzhiyun 		}
1665*4882a593Smuzhiyun 		i++;
1666*4882a593Smuzhiyun 	}
1667*4882a593Smuzhiyun #if defined(PCIE9098) || defined(PCIE9097) || defined(PCIENW62X)
1668*4882a593Smuzhiyun 	if (IS_PCIE9098(phandle->card_type) ||
1669*4882a593Smuzhiyun 	    IS_PCIENW62X(phandle->card_type) ||
1670*4882a593Smuzhiyun 	    IS_PCIE9097(phandle->card_type)) {
1671*4882a593Smuzhiyun 		drv_ptr += sprintf(
1672*4882a593Smuzhiyun 			drv_ptr,
1673*4882a593Smuzhiyun 			"PCIE registers from offset 0x1c20 to 0x1c9c:\n");
1674*4882a593Smuzhiyun 		memset(buf, 0, sizeof(buf));
1675*4882a593Smuzhiyun 		ptr = buf;
1676*4882a593Smuzhiyun 		i = 1;
1677*4882a593Smuzhiyun 		for (reg = 0x1c20; reg <= 0x1c9c; reg += 4) {
1678*4882a593Smuzhiyun 			woal_pcie_read_reg(phandle, reg, &value);
1679*4882a593Smuzhiyun 			ptr += sprintf(ptr, "%08x ", value);
1680*4882a593Smuzhiyun 			if (!(i % 8)) {
1681*4882a593Smuzhiyun 				drv_ptr += sprintf(drv_ptr, "%s\n", buf);
1682*4882a593Smuzhiyun 				memset(buf, 0, sizeof(buf));
1683*4882a593Smuzhiyun 				ptr = buf;
1684*4882a593Smuzhiyun 			}
1685*4882a593Smuzhiyun 			i++;
1686*4882a593Smuzhiyun 		}
1687*4882a593Smuzhiyun 		drv_ptr += sprintf(drv_ptr, "%s\n", buf);
1688*4882a593Smuzhiyun 	}
1689*4882a593Smuzhiyun 	if (IS_PCIE9098(phandle->card_type) ||
1690*4882a593Smuzhiyun 	    IS_PCIENW62X(phandle->card_type) ||
1691*4882a593Smuzhiyun 	    IS_PCIE9097(phandle->card_type)) {
1692*4882a593Smuzhiyun 		drv_ptr += sprintf(drv_ptr,
1693*4882a593Smuzhiyun 				   "ADMA Tx/Rx/Event/Cmd/CmdResp registers:\n");
1694*4882a593Smuzhiyun 		for (j = 0; j < ARRAY_SIZE(adma_reg_table); j++) {
1695*4882a593Smuzhiyun 			drv_ptr += sprintf(
1696*4882a593Smuzhiyun 				drv_ptr,
1697*4882a593Smuzhiyun 				"ADMA registers dump from offset 0x%x to 0x%x\n",
1698*4882a593Smuzhiyun 				adma_reg_table[j], adma_reg_table[j] + 0x68);
1699*4882a593Smuzhiyun 			memset(buf, 0, sizeof(buf));
1700*4882a593Smuzhiyun 			ptr = buf;
1701*4882a593Smuzhiyun 			i = 1;
1702*4882a593Smuzhiyun 			for (reg = adma_reg_table[j];
1703*4882a593Smuzhiyun 			     reg <= (adma_reg_table[j] + 0x68); reg += 4) {
1704*4882a593Smuzhiyun 				woal_pcie_read_reg(phandle, reg, &value);
1705*4882a593Smuzhiyun 				ptr += sprintf(ptr, "%08x ", value);
1706*4882a593Smuzhiyun 				if (!(i % 8)) {
1707*4882a593Smuzhiyun 					drv_ptr +=
1708*4882a593Smuzhiyun 						sprintf(drv_ptr, "%s\n", buf);
1709*4882a593Smuzhiyun 					memset(buf, 0, sizeof(buf));
1710*4882a593Smuzhiyun 					ptr = buf;
1711*4882a593Smuzhiyun 				}
1712*4882a593Smuzhiyun 				i++;
1713*4882a593Smuzhiyun 			}
1714*4882a593Smuzhiyun 			drv_ptr += sprintf(drv_ptr, "%s\n", buf);
1715*4882a593Smuzhiyun 		}
1716*4882a593Smuzhiyun 	}
1717*4882a593Smuzhiyun #endif
1718*4882a593Smuzhiyun 	drv_ptr += sprintf(drv_ptr,
1719*4882a593Smuzhiyun 			   "-----------PCIe Registers dump End-----------\n");
1720*4882a593Smuzhiyun 	mlan_pm_wakeup_card(phandle->pmlan_adapter, MFALSE);
1721*4882a593Smuzhiyun 	LEAVE();
1722*4882a593Smuzhiyun 	return drv_ptr - (char *)buffer;
1723*4882a593Smuzhiyun }
1724*4882a593Smuzhiyun 
1725*4882a593Smuzhiyun /**
1726*4882a593Smuzhiyun  *  @brief This function reads and displays PCIE scratch registers for debugging
1727*4882a593Smuzhiyun  *
1728*4882a593Smuzhiyun  *  @param phandle  A pointer to moal_handle
1729*4882a593Smuzhiyun  *
1730*4882a593Smuzhiyun  *  @return         N/A
1731*4882a593Smuzhiyun  */
woal_pcie_reg_dbg(moal_handle * phandle)1732*4882a593Smuzhiyun static void woal_pcie_reg_dbg(moal_handle *phandle)
1733*4882a593Smuzhiyun {
1734*4882a593Smuzhiyun 	t_u32 reg = 0, value = 0;
1735*4882a593Smuzhiyun 	t_u8 i;
1736*4882a593Smuzhiyun 	char buf[256], *ptr;
1737*4882a593Smuzhiyun 	pcie_service_card *card = (pcie_service_card *)phandle->card;
1738*4882a593Smuzhiyun 	int config_reg_table[] = {0x00, 0x04, 0x10, 0x18, 0x2c,
1739*4882a593Smuzhiyun 				  0x3c, 0x44, 0x80, 0x98, 0x170};
1740*4882a593Smuzhiyun 	t_u32 dump_start_reg = 0;
1741*4882a593Smuzhiyun 	t_u32 dump_end_reg = 0;
1742*4882a593Smuzhiyun 	t_u32 scratch_14_reg = 0;
1743*4882a593Smuzhiyun 	t_u32 scratch_15_reg = 0;
1744*4882a593Smuzhiyun #if defined(PCIE9098) || defined(PCIE9097) || defined(PCIENW62X)
1745*4882a593Smuzhiyun 	/* Tx/Rx/Event AMDA start address */
1746*4882a593Smuzhiyun 	t_u32 adma_reg_table[] = {0x10000, 0x10800, 0x10880, 0x11000, 0x11080};
1747*4882a593Smuzhiyun 	t_u8 j;
1748*4882a593Smuzhiyun #endif
1749*4882a593Smuzhiyun 	mlan_pm_wakeup_card(phandle->pmlan_adapter, MTRUE);
1750*4882a593Smuzhiyun 	PRINTM(MMSG, "Config Space Registers:\n");
1751*4882a593Smuzhiyun 	for (i = 0; i < ARRAY_SIZE(config_reg_table); i++) {
1752*4882a593Smuzhiyun 		pci_read_config_dword(card->dev, config_reg_table[i], &value);
1753*4882a593Smuzhiyun 		PRINTM(MERROR, "reg:0x%02x value=0x%08x\n", config_reg_table[i],
1754*4882a593Smuzhiyun 		       value);
1755*4882a593Smuzhiyun 	}
1756*4882a593Smuzhiyun 	PRINTM(MMSG, "FW Scrach Registers:\n");
1757*4882a593Smuzhiyun #if defined(PCIE8897) || defined(PCIE8997)
1758*4882a593Smuzhiyun 	if (IS_PCIE8897(phandle->card_type) ||
1759*4882a593Smuzhiyun 	    IS_PCIE8997(phandle->card_type)) {
1760*4882a593Smuzhiyun 		reg = PCIE_SCRATCH_12_REG;
1761*4882a593Smuzhiyun 		dump_start_reg = PCIE_DUMP_START_REG;
1762*4882a593Smuzhiyun 		dump_end_reg = PCIE_DUMP_END_REG;
1763*4882a593Smuzhiyun 		scratch_14_reg = PCIE_SCRATCH_14_REG;
1764*4882a593Smuzhiyun 		scratch_15_reg = PCIE_SCRATCH_15_REG;
1765*4882a593Smuzhiyun 	}
1766*4882a593Smuzhiyun #endif
1767*4882a593Smuzhiyun 
1768*4882a593Smuzhiyun #if defined(PCIE9098) || defined(PCIE9097) || defined(PCIENW62X)
1769*4882a593Smuzhiyun 	if (IS_PCIE9098(phandle->card_type) ||
1770*4882a593Smuzhiyun 	    IS_PCIENW62X(phandle->card_type) ||
1771*4882a593Smuzhiyun 	    IS_PCIE9097(phandle->card_type)) {
1772*4882a593Smuzhiyun 		reg = PCIE9098_SCRATCH_12_REG;
1773*4882a593Smuzhiyun 		dump_start_reg = PCIE9098_DUMP_START_REG;
1774*4882a593Smuzhiyun 		dump_end_reg = PCIE9098_DUMP_END_REG;
1775*4882a593Smuzhiyun 		scratch_14_reg = PCIE9098_SCRATCH_14_REG;
1776*4882a593Smuzhiyun 		scratch_15_reg = PCIE9098_SCRATCH_15_REG;
1777*4882a593Smuzhiyun 	}
1778*4882a593Smuzhiyun #endif
1779*4882a593Smuzhiyun 	woal_pcie_read_reg(phandle, reg, &value);
1780*4882a593Smuzhiyun 	PRINTM(MERROR, "reg:0x%x value=0x%x\n", reg, value);
1781*4882a593Smuzhiyun 	for (i = 0; i < 2; i++) {
1782*4882a593Smuzhiyun 		reg = scratch_14_reg;
1783*4882a593Smuzhiyun 		woal_pcie_read_reg(phandle, reg, &value);
1784*4882a593Smuzhiyun 		PRINTM(MERROR, "reg:0x%x value=0x%x\n", reg, value);
1785*4882a593Smuzhiyun 
1786*4882a593Smuzhiyun 		reg = scratch_15_reg;
1787*4882a593Smuzhiyun 		woal_pcie_read_reg(phandle, reg, &value);
1788*4882a593Smuzhiyun 		PRINTM(MERROR, "reg:0x%x value=0x%x\n", reg, value);
1789*4882a593Smuzhiyun 
1790*4882a593Smuzhiyun 		mdelay(100);
1791*4882a593Smuzhiyun 	}
1792*4882a593Smuzhiyun 	PRINTM(MMSG, "Interface registers dump from offset 0x%x to 0x%x\n",
1793*4882a593Smuzhiyun 	       dump_start_reg, dump_end_reg);
1794*4882a593Smuzhiyun 	memset(buf, 0, sizeof(buf));
1795*4882a593Smuzhiyun 	ptr = buf;
1796*4882a593Smuzhiyun 	i = 1;
1797*4882a593Smuzhiyun 	for (reg = dump_start_reg; reg <= dump_end_reg; reg += 4) {
1798*4882a593Smuzhiyun 		woal_pcie_read_reg(phandle, reg, &value);
1799*4882a593Smuzhiyun 		ptr += sprintf(ptr, "%08x ", value);
1800*4882a593Smuzhiyun 		if (!(i % 8)) {
1801*4882a593Smuzhiyun 			PRINTM(MMSG, "%s\n", buf);
1802*4882a593Smuzhiyun 			memset(buf, 0, sizeof(buf));
1803*4882a593Smuzhiyun 			ptr = buf;
1804*4882a593Smuzhiyun 		}
1805*4882a593Smuzhiyun 		i++;
1806*4882a593Smuzhiyun 	}
1807*4882a593Smuzhiyun #if defined(PCIE9098) || defined(PCIE9097) || defined(PCIENW62X)
1808*4882a593Smuzhiyun 	if (IS_PCIE9098(phandle->card_type) ||
1809*4882a593Smuzhiyun 	    IS_PCIENW62X(phandle->card_type) ||
1810*4882a593Smuzhiyun 	    IS_PCIE9097(phandle->card_type)) {
1811*4882a593Smuzhiyun 		PRINTM(MMSG, "PCIE registers from offset 0x1c20 to 0x1c9c:\n");
1812*4882a593Smuzhiyun 		memset(buf, 0, sizeof(buf));
1813*4882a593Smuzhiyun 		ptr = buf;
1814*4882a593Smuzhiyun 		i = 1;
1815*4882a593Smuzhiyun 		for (reg = 0x1c20; reg <= 0x1c9c; reg += 4) {
1816*4882a593Smuzhiyun 			woal_pcie_read_reg(phandle, reg, &value);
1817*4882a593Smuzhiyun 			ptr += sprintf(ptr, "%08x ", value);
1818*4882a593Smuzhiyun 			if (!(i % 8)) {
1819*4882a593Smuzhiyun 				PRINTM(MMSG, "%s\n", buf);
1820*4882a593Smuzhiyun 				memset(buf, 0, sizeof(buf));
1821*4882a593Smuzhiyun 				ptr = buf;
1822*4882a593Smuzhiyun 			}
1823*4882a593Smuzhiyun 			i++;
1824*4882a593Smuzhiyun 		}
1825*4882a593Smuzhiyun 		PRINTM(MMSG, "%s\n", buf);
1826*4882a593Smuzhiyun 	}
1827*4882a593Smuzhiyun 	if (IS_PCIE9098(phandle->card_type) ||
1828*4882a593Smuzhiyun 	    IS_PCIENW62X(phandle->card_type) ||
1829*4882a593Smuzhiyun 	    IS_PCIE9097(phandle->card_type)) {
1830*4882a593Smuzhiyun 		PRINTM(MMSG, "ADMA Tx/Rx/Event/Cmd/CmdResp registers:\n");
1831*4882a593Smuzhiyun 		for (j = 0; j < ARRAY_SIZE(adma_reg_table); j++) {
1832*4882a593Smuzhiyun 			PRINTM(MMSG,
1833*4882a593Smuzhiyun 			       "ADMA registers dump from offset 0x%x to 0x%x\n",
1834*4882a593Smuzhiyun 			       adma_reg_table[j], adma_reg_table[j] + 0x68);
1835*4882a593Smuzhiyun 			memset(buf, 0, sizeof(buf));
1836*4882a593Smuzhiyun 			ptr = buf;
1837*4882a593Smuzhiyun 			i = 1;
1838*4882a593Smuzhiyun 			for (reg = adma_reg_table[j];
1839*4882a593Smuzhiyun 			     reg <= (adma_reg_table[j] + 0x68); reg += 4) {
1840*4882a593Smuzhiyun 				woal_pcie_read_reg(phandle, reg, &value);
1841*4882a593Smuzhiyun 				ptr += sprintf(ptr, "%08x ", value);
1842*4882a593Smuzhiyun 				if (!(i % 8)) {
1843*4882a593Smuzhiyun 					PRINTM(MMSG, "%s\n", buf);
1844*4882a593Smuzhiyun 					memset(buf, 0, sizeof(buf));
1845*4882a593Smuzhiyun 					ptr = buf;
1846*4882a593Smuzhiyun 				}
1847*4882a593Smuzhiyun 				i++;
1848*4882a593Smuzhiyun 			}
1849*4882a593Smuzhiyun 			PRINTM(MMSG, "%s\n", buf);
1850*4882a593Smuzhiyun 		}
1851*4882a593Smuzhiyun 	}
1852*4882a593Smuzhiyun #endif
1853*4882a593Smuzhiyun 	mlan_pm_wakeup_card(phandle->pmlan_adapter, MFALSE);
1854*4882a593Smuzhiyun }
1855*4882a593Smuzhiyun 
1856*4882a593Smuzhiyun #define DEBUG_FW_DONE 0xFF
1857*4882a593Smuzhiyun #define MAX_POLL_TRIES 100
1858*4882a593Smuzhiyun 
1859*4882a593Smuzhiyun typedef enum {
1860*4882a593Smuzhiyun 	DUMP_TYPE_ITCM = 0,
1861*4882a593Smuzhiyun 	DUMP_TYPE_DTCM = 1,
1862*4882a593Smuzhiyun 	DUMP_TYPE_SQRAM = 2,
1863*4882a593Smuzhiyun 	DUMP_TYPE_IRAM = 3,
1864*4882a593Smuzhiyun 	DUMP_TYPE_APU = 4,
1865*4882a593Smuzhiyun 	DUMP_TYPE_CIU = 5,
1866*4882a593Smuzhiyun 	DUMP_TYPE_ICU = 6,
1867*4882a593Smuzhiyun 	DUMP_TYPE_MAC = 7,
1868*4882a593Smuzhiyun } dumped_mem_type;
1869*4882a593Smuzhiyun 
1870*4882a593Smuzhiyun #define MAX_NAME_LEN 8
1871*4882a593Smuzhiyun 
1872*4882a593Smuzhiyun typedef struct {
1873*4882a593Smuzhiyun 	t_u8 mem_name[MAX_NAME_LEN];
1874*4882a593Smuzhiyun 	t_u8 *mem_Ptr;
1875*4882a593Smuzhiyun 	struct file *pfile_mem;
1876*4882a593Smuzhiyun 	t_u8 done_flag;
1877*4882a593Smuzhiyun 	t_u8 type;
1878*4882a593Smuzhiyun } memory_type_mapping;
1879*4882a593Smuzhiyun 
1880*4882a593Smuzhiyun #ifdef PCIE8897
1881*4882a593Smuzhiyun #define DEBUG_HOST_READY_8897 0xEE
1882*4882a593Smuzhiyun #define DEBUG_MEMDUMP_FINISH_8897 0xFE
1883*4882a593Smuzhiyun static memory_type_mapping mem_type_mapping_tbl_8897[] = {
1884*4882a593Smuzhiyun 	{"ITCM", NULL, NULL, 0xF0, FW_DUMP_TYPE_MEM_ITCM},
1885*4882a593Smuzhiyun 	{"DTCM", NULL, NULL, 0xF1, FW_DUMP_TYPE_MEM_DTCM},
1886*4882a593Smuzhiyun 	{"SQRAM", NULL, NULL, 0xF2, FW_DUMP_TYPE_MEM_SQRAM},
1887*4882a593Smuzhiyun 	{"IRAM", NULL, NULL, 0xF3, FW_DUMP_TYPE_MEM_IRAM},
1888*4882a593Smuzhiyun 	{"APU", NULL, NULL, 0xF4, FW_DUMP_TYPE_REG_APU},
1889*4882a593Smuzhiyun 	{"CIU", NULL, NULL, 0xF5, FW_DUMP_TYPE_REG_CIU},
1890*4882a593Smuzhiyun 	{"ICU", NULL, NULL, 0xF6, FW_DUMP_TYPE_REG_ICU},
1891*4882a593Smuzhiyun 	{"MAC", NULL, NULL, 0xF7, FW_DUMP_TYPE_REG_MAC},
1892*4882a593Smuzhiyun };
1893*4882a593Smuzhiyun #endif
1894*4882a593Smuzhiyun 
1895*4882a593Smuzhiyun #if defined(PCIE8997) || defined(PCIE9098) || defined(PCIE9097) ||             \
1896*4882a593Smuzhiyun 	defined(PCIENW62X)
1897*4882a593Smuzhiyun #define DEBUG_HOST_READY_8997 0xCC
1898*4882a593Smuzhiyun #define DEBUG_HOST_EVENT_READY 0xAA
1899*4882a593Smuzhiyun #define DEBUG_HOST_RESET_READY 0x99
1900*4882a593Smuzhiyun static memory_type_mapping mem_type_mapping_tbl_8997 = {"DUMP", NULL, NULL,
1901*4882a593Smuzhiyun 							0xDD, 0x00};
1902*4882a593Smuzhiyun 
1903*4882a593Smuzhiyun #endif
1904*4882a593Smuzhiyun 
1905*4882a593Smuzhiyun #if defined(PCIE8897) || defined(PCIE8997) || defined(PCIE9098) ||             \
1906*4882a593Smuzhiyun 	defined(PCIE9097) || defined(PCIENW62X)
1907*4882a593Smuzhiyun /**
1908*4882a593Smuzhiyun  *  @brief This function reads data by 8 bit from card register
1909*4882a593Smuzhiyun  *
1910*4882a593Smuzhiyun  *  @param handle   A Pointer to the moal_handle structure
1911*4882a593Smuzhiyun  *  @param reg      Register offset
1912*4882a593Smuzhiyun  *  @param data     Value
1913*4882a593Smuzhiyun  *
1914*4882a593Smuzhiyun  *  @return    		MLAN_STATUS_SUCCESS or MLAN_STATUS_FAILURE
1915*4882a593Smuzhiyun  */
woal_read_reg_eight_bit(moal_handle * handle,t_u32 reg,t_u8 * data)1916*4882a593Smuzhiyun static mlan_status woal_read_reg_eight_bit(moal_handle *handle, t_u32 reg,
1917*4882a593Smuzhiyun 					   t_u8 *data)
1918*4882a593Smuzhiyun {
1919*4882a593Smuzhiyun 	pcie_service_card *card = (pcie_service_card *)handle->card;
1920*4882a593Smuzhiyun 	*data = ioread8(card->pci_mmap1 + reg);
1921*4882a593Smuzhiyun 	return MLAN_STATUS_SUCCESS;
1922*4882a593Smuzhiyun }
1923*4882a593Smuzhiyun 
1924*4882a593Smuzhiyun /**
1925*4882a593Smuzhiyun  *  @brief This function read/write firmware
1926*4882a593Smuzhiyun  *
1927*4882a593Smuzhiyun  *  @param phandle   A pointer to moal_handle
1928*4882a593Smuzhiyun  *  @param doneflag  done flag
1929*4882a593Smuzhiyun  *  @param resetflag reset flag;
1930*4882a593Smuzhiyun  *
1931*4882a593Smuzhiyun  *  @return         MLAN_STATUS_SUCCESS
1932*4882a593Smuzhiyun  */
woal_pcie_rdwr_firmware(moal_handle * phandle,t_u8 doneflag,t_u8 resetflag)1933*4882a593Smuzhiyun static rdwr_status woal_pcie_rdwr_firmware(moal_handle *phandle, t_u8 doneflag,
1934*4882a593Smuzhiyun 					   t_u8 resetflag)
1935*4882a593Smuzhiyun {
1936*4882a593Smuzhiyun 	int ret = 0;
1937*4882a593Smuzhiyun 	int tries = 0;
1938*4882a593Smuzhiyun 	t_u8 ctrl_data = 0;
1939*4882a593Smuzhiyun 	t_u32 reg_data = 0;
1940*4882a593Smuzhiyun 	t_u32 debug_host_ready = 0;
1941*4882a593Smuzhiyun 	t_u32 dump_ctrl_reg = 0;
1942*4882a593Smuzhiyun 
1943*4882a593Smuzhiyun #ifdef PCIE8897
1944*4882a593Smuzhiyun 	if (IS_PCIE8897(phandle->card_type)) {
1945*4882a593Smuzhiyun 		debug_host_ready = DEBUG_HOST_READY_8897;
1946*4882a593Smuzhiyun 		dump_ctrl_reg = DEBUG_DUMP_CTRL_REG;
1947*4882a593Smuzhiyun 	}
1948*4882a593Smuzhiyun #endif
1949*4882a593Smuzhiyun #if defined(PCIE8997)
1950*4882a593Smuzhiyun 	if (IS_PCIE8997(phandle->card_type)) {
1951*4882a593Smuzhiyun 		debug_host_ready = DEBUG_HOST_READY_8997;
1952*4882a593Smuzhiyun 		dump_ctrl_reg = DEBUG_DUMP_CTRL_REG;
1953*4882a593Smuzhiyun 	}
1954*4882a593Smuzhiyun #endif
1955*4882a593Smuzhiyun 
1956*4882a593Smuzhiyun #if defined(PCIE9098) || defined(PCIE9097) || defined(PCIENW62X)
1957*4882a593Smuzhiyun 	if (IS_PCIE9098(phandle->card_type) ||
1958*4882a593Smuzhiyun 	    IS_PCIENW62X(phandle->card_type) ||
1959*4882a593Smuzhiyun 	    IS_PCIE9097(phandle->card_type)) {
1960*4882a593Smuzhiyun 		if (phandle->event_fw_dump)
1961*4882a593Smuzhiyun 			debug_host_ready = DEBUG_HOST_EVENT_READY;
1962*4882a593Smuzhiyun 		else
1963*4882a593Smuzhiyun 			debug_host_ready = DEBUG_HOST_READY_8997;
1964*4882a593Smuzhiyun 		if (resetflag)
1965*4882a593Smuzhiyun 			debug_host_ready = DEBUG_HOST_RESET_READY;
1966*4882a593Smuzhiyun 		dump_ctrl_reg = PCIE9098_DUMP_CTRL_REG;
1967*4882a593Smuzhiyun 	}
1968*4882a593Smuzhiyun #endif
1969*4882a593Smuzhiyun 
1970*4882a593Smuzhiyun 	ret = woal_pcie_write_reg(phandle, dump_ctrl_reg, debug_host_ready);
1971*4882a593Smuzhiyun 	if (ret) {
1972*4882a593Smuzhiyun 		PRINTM(MERROR, "PCIE Write ERR, reg=0x%x debug_reay=0x%x\n",
1973*4882a593Smuzhiyun 		       dump_ctrl_reg, debug_host_ready);
1974*4882a593Smuzhiyun 		return RDWR_STATUS_FAILURE;
1975*4882a593Smuzhiyun 	}
1976*4882a593Smuzhiyun #if defined(PCIE9098) || defined(PCIE9097) || defined(PCIENW62X)
1977*4882a593Smuzhiyun 	if (IS_PCIE9098(phandle->card_type) ||
1978*4882a593Smuzhiyun 	    IS_PCIENW62X(phandle->card_type) ||
1979*4882a593Smuzhiyun 	    IS_PCIE9097(phandle->card_type)) {
1980*4882a593Smuzhiyun 		if (phandle->event_fw_dump || resetflag)
1981*4882a593Smuzhiyun 			return RDWR_STATUS_SUCCESS;
1982*4882a593Smuzhiyun 	}
1983*4882a593Smuzhiyun #endif
1984*4882a593Smuzhiyun 	ret = woal_pcie_read_reg(phandle, dump_ctrl_reg, &reg_data);
1985*4882a593Smuzhiyun 	if (ret) {
1986*4882a593Smuzhiyun 		PRINTM(MERROR, "PCIE Read DEBUG_DUMP_CTRL_REG 0x%x fail\n",
1987*4882a593Smuzhiyun 		       dump_ctrl_reg);
1988*4882a593Smuzhiyun 		return RDWR_STATUS_FAILURE;
1989*4882a593Smuzhiyun 	}
1990*4882a593Smuzhiyun 	for (tries = 0; tries < MAX_POLL_TRIES; tries++) {
1991*4882a593Smuzhiyun 		ret = woal_read_reg_eight_bit(phandle, dump_ctrl_reg,
1992*4882a593Smuzhiyun 					      &ctrl_data);
1993*4882a593Smuzhiyun 		if (ret) {
1994*4882a593Smuzhiyun 			PRINTM(MERROR, "PCIE READ reg 0x%x 8bit ERR\n",
1995*4882a593Smuzhiyun 			       dump_ctrl_reg);
1996*4882a593Smuzhiyun 			return RDWR_STATUS_FAILURE;
1997*4882a593Smuzhiyun 		}
1998*4882a593Smuzhiyun 		if (ctrl_data == DEBUG_FW_DONE)
1999*4882a593Smuzhiyun 			break;
2000*4882a593Smuzhiyun 		if (doneflag && ctrl_data == doneflag)
2001*4882a593Smuzhiyun 			return RDWR_STATUS_DONE;
2002*4882a593Smuzhiyun 		if (ctrl_data != debug_host_ready) {
2003*4882a593Smuzhiyun 			PRINTM(MMSG,
2004*4882a593Smuzhiyun 			       "The ctrl reg was changed, ctrl_data=0x%x, host_ready:0x%x try again!\n",
2005*4882a593Smuzhiyun 			       ctrl_data, debug_host_ready);
2006*4882a593Smuzhiyun 			ret = woal_pcie_write_reg(phandle, dump_ctrl_reg,
2007*4882a593Smuzhiyun 						  debug_host_ready);
2008*4882a593Smuzhiyun 			if (ret) {
2009*4882a593Smuzhiyun 				PRINTM(MERROR, "PCIE Write ERR\n");
2010*4882a593Smuzhiyun 				return RDWR_STATUS_FAILURE;
2011*4882a593Smuzhiyun 			}
2012*4882a593Smuzhiyun 		}
2013*4882a593Smuzhiyun #if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 36)
2014*4882a593Smuzhiyun 		usleep_range(99, 100);
2015*4882a593Smuzhiyun #else
2016*4882a593Smuzhiyun 		udelay(100);
2017*4882a593Smuzhiyun #endif
2018*4882a593Smuzhiyun 	}
2019*4882a593Smuzhiyun 	if (ctrl_data == debug_host_ready) {
2020*4882a593Smuzhiyun 		PRINTM(MERROR, "Fail to pull ctrl_data=0x%x host_ready=0x%x\n",
2021*4882a593Smuzhiyun 		       ctrl_data, debug_host_ready);
2022*4882a593Smuzhiyun 		return RDWR_STATUS_FAILURE;
2023*4882a593Smuzhiyun 	}
2024*4882a593Smuzhiyun 	return RDWR_STATUS_SUCCESS;
2025*4882a593Smuzhiyun }
2026*4882a593Smuzhiyun #endif
2027*4882a593Smuzhiyun 
2028*4882a593Smuzhiyun #ifdef PCIE8897
2029*4882a593Smuzhiyun /**
2030*4882a593Smuzhiyun  *  @brief This function dump firmware memory to file
2031*4882a593Smuzhiyun  *
2032*4882a593Smuzhiyun  *  @param phandle   A pointer to moal_handle
2033*4882a593Smuzhiyun  *
2034*4882a593Smuzhiyun  *  @return         N/A
2035*4882a593Smuzhiyun  */
woal_pcie_dump_fw_info_v1(moal_handle * phandle)2036*4882a593Smuzhiyun static void woal_pcie_dump_fw_info_v1(moal_handle *phandle)
2037*4882a593Smuzhiyun {
2038*4882a593Smuzhiyun 	int ret = 0;
2039*4882a593Smuzhiyun 	unsigned int reg, reg_start, reg_end;
2040*4882a593Smuzhiyun 	t_u8 *dbg_ptr = NULL;
2041*4882a593Smuzhiyun 	t_u32 sec, usec;
2042*4882a593Smuzhiyun 	t_u8 dump_num = 0;
2043*4882a593Smuzhiyun 	t_u8 idx = 0;
2044*4882a593Smuzhiyun 	t_u8 doneflag = 0;
2045*4882a593Smuzhiyun 	rdwr_status stat;
2046*4882a593Smuzhiyun 	t_u8 i = 0;
2047*4882a593Smuzhiyun 	t_u8 read_reg = 0;
2048*4882a593Smuzhiyun 	t_u32 memory_size = 0;
2049*4882a593Smuzhiyun 	t_u32 memdump_finsh = 0;
2050*4882a593Smuzhiyun 	t_u8 *end_ptr = NULL;
2051*4882a593Smuzhiyun 	memory_type_mapping *mem_type_mapping_tbl = mem_type_mapping_tbl_8897;
2052*4882a593Smuzhiyun 
2053*4882a593Smuzhiyun 	if (!phandle) {
2054*4882a593Smuzhiyun 		PRINTM(MERROR, "Could not dump firmwware info\n");
2055*4882a593Smuzhiyun 		return;
2056*4882a593Smuzhiyun 	}
2057*4882a593Smuzhiyun 	if (!phandle->fw_dump_buf) {
2058*4882a593Smuzhiyun 		ret = moal_vmalloc(phandle, FW_DUMP_INFO_LEN,
2059*4882a593Smuzhiyun 				   &(phandle->fw_dump_buf));
2060*4882a593Smuzhiyun 		if (ret != MLAN_STATUS_SUCCESS || !phandle->fw_dump_buf) {
2061*4882a593Smuzhiyun 			PRINTM(MERROR, "Failed to vmalloc fw dump bufffer\n");
2062*4882a593Smuzhiyun 			return;
2063*4882a593Smuzhiyun 		}
2064*4882a593Smuzhiyun 	} else {
2065*4882a593Smuzhiyun 		memset(phandle->fw_dump_buf, 0x00, FW_DUMP_INFO_LEN);
2066*4882a593Smuzhiyun 	}
2067*4882a593Smuzhiyun 	phandle->fw_dump_len = 0;
2068*4882a593Smuzhiyun 	/* start dump fw memory	*/
2069*4882a593Smuzhiyun 	moal_get_system_time(phandle, &sec, &usec);
2070*4882a593Smuzhiyun 	PRINTM(MMSG, "====PCIE DEBUG MODE OUTPUT START: %u.%06u ====\n", sec,
2071*4882a593Smuzhiyun 	       usec);
2072*4882a593Smuzhiyun 	/* read the number of the memories which will dump */
2073*4882a593Smuzhiyun 	if (RDWR_STATUS_FAILURE ==
2074*4882a593Smuzhiyun 	    woal_pcie_rdwr_firmware(phandle, doneflag, 0))
2075*4882a593Smuzhiyun 		goto done;
2076*4882a593Smuzhiyun 	reg = DEBUG_DUMP_START_REG;
2077*4882a593Smuzhiyun 	ret = woal_read_reg_eight_bit(phandle, reg, &dump_num);
2078*4882a593Smuzhiyun 	if (ret) {
2079*4882a593Smuzhiyun 		PRINTM(MMSG, "PCIE READ MEM NUM ERR\n");
2080*4882a593Smuzhiyun 		goto done;
2081*4882a593Smuzhiyun 	}
2082*4882a593Smuzhiyun 
2083*4882a593Smuzhiyun 	/* read the length of every memory which will dump */
2084*4882a593Smuzhiyun 	for (idx = 0;
2085*4882a593Smuzhiyun 	     idx < dump_num && idx < ARRAY_SIZE(mem_type_mapping_tbl_8897);
2086*4882a593Smuzhiyun 	     idx++) {
2087*4882a593Smuzhiyun 		if (RDWR_STATUS_FAILURE ==
2088*4882a593Smuzhiyun 		    woal_pcie_rdwr_firmware(phandle, doneflag, 0))
2089*4882a593Smuzhiyun 			goto done;
2090*4882a593Smuzhiyun 		memory_size = 0;
2091*4882a593Smuzhiyun 		reg = DEBUG_DUMP_START_REG;
2092*4882a593Smuzhiyun 		for (i = 0; i < 4; i++) {
2093*4882a593Smuzhiyun 			ret = woal_read_reg_eight_bit(phandle, reg, &read_reg);
2094*4882a593Smuzhiyun 			if (ret) {
2095*4882a593Smuzhiyun 				PRINTM(MMSG, "PCIE READ ERR\n");
2096*4882a593Smuzhiyun 				goto done;
2097*4882a593Smuzhiyun 			}
2098*4882a593Smuzhiyun 			memory_size |= (read_reg << i * 8);
2099*4882a593Smuzhiyun 			reg++;
2100*4882a593Smuzhiyun 		}
2101*4882a593Smuzhiyun 		if (memory_size == 0) {
2102*4882a593Smuzhiyun 			PRINTM(MMSG, "Firmware Dump Finished!\n");
2103*4882a593Smuzhiyun 			ret = woal_pcie_write_reg(phandle, DEBUG_DUMP_CTRL_REG,
2104*4882a593Smuzhiyun 						  memdump_finsh);
2105*4882a593Smuzhiyun 			if (ret) {
2106*4882a593Smuzhiyun 				PRINTM(MERROR,
2107*4882a593Smuzhiyun 				       "PCIE Write MEMDUMP_FINISH ERR\n");
2108*4882a593Smuzhiyun 				goto done;
2109*4882a593Smuzhiyun 			}
2110*4882a593Smuzhiyun 			break;
2111*4882a593Smuzhiyun 		} else {
2112*4882a593Smuzhiyun 			PRINTM(MMSG, "%s_SIZE=0x%x\n",
2113*4882a593Smuzhiyun 			       mem_type_mapping_tbl[idx].mem_name, memory_size);
2114*4882a593Smuzhiyun 			ret = moal_vmalloc(
2115*4882a593Smuzhiyun 				phandle, memory_size + 1,
2116*4882a593Smuzhiyun 				(t_u8 **)&mem_type_mapping_tbl[idx].mem_Ptr);
2117*4882a593Smuzhiyun 			if ((ret != MLAN_STATUS_SUCCESS) ||
2118*4882a593Smuzhiyun 			    !mem_type_mapping_tbl[idx].mem_Ptr) {
2119*4882a593Smuzhiyun 				PRINTM(MERROR,
2120*4882a593Smuzhiyun 				       "Error: vmalloc %s buffer failed!!!\n",
2121*4882a593Smuzhiyun 				       mem_type_mapping_tbl[idx].mem_name);
2122*4882a593Smuzhiyun 				goto done;
2123*4882a593Smuzhiyun 			}
2124*4882a593Smuzhiyun 			dbg_ptr = mem_type_mapping_tbl[idx].mem_Ptr;
2125*4882a593Smuzhiyun 			end_ptr = dbg_ptr + memory_size;
2126*4882a593Smuzhiyun 		}
2127*4882a593Smuzhiyun 		doneflag = mem_type_mapping_tbl[idx].done_flag;
2128*4882a593Smuzhiyun 		moal_get_system_time(phandle, &sec, &usec);
2129*4882a593Smuzhiyun 		PRINTM(MMSG, "Start %s output %u.%06u, please wait...\n",
2130*4882a593Smuzhiyun 		       mem_type_mapping_tbl[idx].mem_name, sec, usec);
2131*4882a593Smuzhiyun 		do {
2132*4882a593Smuzhiyun 			stat = woal_pcie_rdwr_firmware(phandle, doneflag, 0);
2133*4882a593Smuzhiyun 			if (RDWR_STATUS_FAILURE == stat)
2134*4882a593Smuzhiyun 				goto done;
2135*4882a593Smuzhiyun 
2136*4882a593Smuzhiyun 			reg_start = DEBUG_DUMP_START_REG;
2137*4882a593Smuzhiyun 			reg_end = DEBUG_DUMP_END_REG;
2138*4882a593Smuzhiyun 			for (reg = reg_start; reg <= reg_end; reg++) {
2139*4882a593Smuzhiyun 				ret = woal_read_reg_eight_bit(phandle, reg,
2140*4882a593Smuzhiyun 							      dbg_ptr);
2141*4882a593Smuzhiyun 				if (ret) {
2142*4882a593Smuzhiyun 					PRINTM(MMSG, "PCIE READ ERR\n");
2143*4882a593Smuzhiyun 					goto done;
2144*4882a593Smuzhiyun 				}
2145*4882a593Smuzhiyun 				if (dbg_ptr < end_ptr)
2146*4882a593Smuzhiyun 					dbg_ptr++;
2147*4882a593Smuzhiyun 				else
2148*4882a593Smuzhiyun 					PRINTM(MINFO,
2149*4882a593Smuzhiyun 					       "pre-allocced buf is not enough\n");
2150*4882a593Smuzhiyun 			}
2151*4882a593Smuzhiyun 			if (RDWR_STATUS_DONE == stat) {
2152*4882a593Smuzhiyun 				PRINTM(MMSG, "%s done: size=0x%x\n",
2153*4882a593Smuzhiyun 				       mem_type_mapping_tbl[idx].mem_name,
2154*4882a593Smuzhiyun 				       (unsigned int)(dbg_ptr -
2155*4882a593Smuzhiyun 						      mem_type_mapping_tbl[idx]
2156*4882a593Smuzhiyun 							      .mem_Ptr));
2157*4882a593Smuzhiyun 				woal_save_dump_info_to_buf(
2158*4882a593Smuzhiyun 					phandle,
2159*4882a593Smuzhiyun 					mem_type_mapping_tbl[idx].mem_Ptr,
2160*4882a593Smuzhiyun 					memory_size,
2161*4882a593Smuzhiyun 					mem_type_mapping_tbl[idx].type);
2162*4882a593Smuzhiyun 				moal_vfree(phandle,
2163*4882a593Smuzhiyun 					   mem_type_mapping_tbl[idx].mem_Ptr);
2164*4882a593Smuzhiyun 				mem_type_mapping_tbl[idx].mem_Ptr = NULL;
2165*4882a593Smuzhiyun 				break;
2166*4882a593Smuzhiyun 			}
2167*4882a593Smuzhiyun 		} while (1);
2168*4882a593Smuzhiyun 	}
2169*4882a593Smuzhiyun 	woal_append_end_block(phandle);
2170*4882a593Smuzhiyun 	moal_get_system_time(phandle, &sec, &usec);
2171*4882a593Smuzhiyun 	PRINTM(MMSG, "====PCIE DEBUG MODE OUTPUT END: %u.%06u ====\n", sec,
2172*4882a593Smuzhiyun 	       usec);
2173*4882a593Smuzhiyun 	/* end dump fw memory */
2174*4882a593Smuzhiyun done:
2175*4882a593Smuzhiyun 	for (idx = 0;
2176*4882a593Smuzhiyun 	     idx < dump_num && idx < ARRAY_SIZE(mem_type_mapping_tbl_8897);
2177*4882a593Smuzhiyun 	     idx++) {
2178*4882a593Smuzhiyun 		if (mem_type_mapping_tbl[idx].mem_Ptr) {
2179*4882a593Smuzhiyun 			moal_vfree(phandle, mem_type_mapping_tbl[idx].mem_Ptr);
2180*4882a593Smuzhiyun 			mem_type_mapping_tbl[idx].mem_Ptr = NULL;
2181*4882a593Smuzhiyun 		}
2182*4882a593Smuzhiyun 	}
2183*4882a593Smuzhiyun 
2184*4882a593Smuzhiyun 	return;
2185*4882a593Smuzhiyun }
2186*4882a593Smuzhiyun #endif
2187*4882a593Smuzhiyun 
2188*4882a593Smuzhiyun #if defined(PCIE8997) || defined(PCIE9098) || defined(PCIE9097) ||             \
2189*4882a593Smuzhiyun 	defined(PCIENW62X)
2190*4882a593Smuzhiyun /**
2191*4882a593Smuzhiyun  *  @brief This function dump firmware memory to file
2192*4882a593Smuzhiyun  *
2193*4882a593Smuzhiyun  *  @param phandle   A pointer to moal_handle
2194*4882a593Smuzhiyun  *
2195*4882a593Smuzhiyun  *  @return         N/A
2196*4882a593Smuzhiyun  */
woal_pcie_dump_fw_info_v2(moal_handle * phandle)2197*4882a593Smuzhiyun static void woal_pcie_dump_fw_info_v2(moal_handle *phandle)
2198*4882a593Smuzhiyun {
2199*4882a593Smuzhiyun 	int ret = 0;
2200*4882a593Smuzhiyun 	unsigned int reg, reg_start, reg_end;
2201*4882a593Smuzhiyun 	t_u8 *dbg_ptr = NULL;
2202*4882a593Smuzhiyun 	t_u8 *tmp_ptr = NULL;
2203*4882a593Smuzhiyun 	t_u32 sec, usec;
2204*4882a593Smuzhiyun 	t_u8 dump_num = 0;
2205*4882a593Smuzhiyun 	t_u8 doneflag = 0;
2206*4882a593Smuzhiyun 	rdwr_status stat;
2207*4882a593Smuzhiyun 	t_u32 memory_size = 0;
2208*4882a593Smuzhiyun 	t_u8 *end_ptr = NULL;
2209*4882a593Smuzhiyun 	memory_type_mapping *mem_type_mapping_tbl = &mem_type_mapping_tbl_8997;
2210*4882a593Smuzhiyun 	t_u32 dump_start_reg = 0;
2211*4882a593Smuzhiyun 	t_u32 dump_end_reg = 0;
2212*4882a593Smuzhiyun 
2213*4882a593Smuzhiyun 	if (!phandle) {
2214*4882a593Smuzhiyun 		PRINTM(MERROR, "Could not dump firmwware info\n");
2215*4882a593Smuzhiyun 		return;
2216*4882a593Smuzhiyun 	}
2217*4882a593Smuzhiyun #if defined(PCIE9098) || defined(PCIE9097) || defined(PCIENW62X)
2218*4882a593Smuzhiyun 	if (IS_PCIE9098(phandle->card_type) ||
2219*4882a593Smuzhiyun 	    IS_PCIENW62X(phandle->card_type) ||
2220*4882a593Smuzhiyun 	    IS_PCIE9097(phandle->card_type)) {
2221*4882a593Smuzhiyun 		if (phandle->event_fw_dump) {
2222*4882a593Smuzhiyun 			if (RDWR_STATUS_FAILURE !=
2223*4882a593Smuzhiyun 			    woal_pcie_rdwr_firmware(phandle, doneflag, 0)) {
2224*4882a593Smuzhiyun 				PRINTM(MMSG,
2225*4882a593Smuzhiyun 				       "====PCIE FW DUMP EVENT MODE START ====\n");
2226*4882a593Smuzhiyun 				return;
2227*4882a593Smuzhiyun 			}
2228*4882a593Smuzhiyun 		}
2229*4882a593Smuzhiyun 	}
2230*4882a593Smuzhiyun #endif
2231*4882a593Smuzhiyun 
2232*4882a593Smuzhiyun 	/* start dump fw memory	*/
2233*4882a593Smuzhiyun 	moal_get_system_time(phandle, &sec, &usec);
2234*4882a593Smuzhiyun 	PRINTM(MMSG, "====PCIE DEBUG MODE OUTPUT START: %u.%06u ====\n", sec,
2235*4882a593Smuzhiyun 	       usec);
2236*4882a593Smuzhiyun 	/* read the number of the memories which will dump */
2237*4882a593Smuzhiyun 	if (RDWR_STATUS_FAILURE ==
2238*4882a593Smuzhiyun 	    woal_pcie_rdwr_firmware(phandle, doneflag, 0))
2239*4882a593Smuzhiyun 		goto done;
2240*4882a593Smuzhiyun #if defined(PCIE9098) || defined(PCIE9097) || defined(PCIENW62X)
2241*4882a593Smuzhiyun 	if (IS_PCIE9098(phandle->card_type) ||
2242*4882a593Smuzhiyun 	    IS_PCIENW62X(phandle->card_type) ||
2243*4882a593Smuzhiyun 	    IS_PCIE9097(phandle->card_type)) {
2244*4882a593Smuzhiyun 		dump_start_reg = PCIE9098_DUMP_START_REG;
2245*4882a593Smuzhiyun 		dump_end_reg = PCIE9098_DUMP_END_REG;
2246*4882a593Smuzhiyun 	}
2247*4882a593Smuzhiyun #endif
2248*4882a593Smuzhiyun #ifdef PCIE8997
2249*4882a593Smuzhiyun 	if (IS_PCIE8997(phandle->card_type)) {
2250*4882a593Smuzhiyun 		dump_start_reg = DEBUG_DUMP_START_REG;
2251*4882a593Smuzhiyun 		dump_end_reg = DEBUG_DUMP_END_REG;
2252*4882a593Smuzhiyun 	}
2253*4882a593Smuzhiyun #endif
2254*4882a593Smuzhiyun 	reg = dump_start_reg;
2255*4882a593Smuzhiyun 	ret = woal_read_reg_eight_bit(phandle, reg, &dump_num);
2256*4882a593Smuzhiyun 	if (ret) {
2257*4882a593Smuzhiyun 		PRINTM(MMSG, "PCIE READ MEM NUM ERR\n");
2258*4882a593Smuzhiyun 		goto done;
2259*4882a593Smuzhiyun 	}
2260*4882a593Smuzhiyun 
2261*4882a593Smuzhiyun 	memory_size = 0x80000;
2262*4882a593Smuzhiyun 	ret = moal_vmalloc(phandle, memory_size + 1,
2263*4882a593Smuzhiyun 			   (t_u8 **)&mem_type_mapping_tbl->mem_Ptr);
2264*4882a593Smuzhiyun 	if ((ret != MLAN_STATUS_SUCCESS) || !mem_type_mapping_tbl->mem_Ptr) {
2265*4882a593Smuzhiyun 		PRINTM(MERROR, "Error: vmalloc %s buffer failed!!!\n",
2266*4882a593Smuzhiyun 		       mem_type_mapping_tbl->mem_name);
2267*4882a593Smuzhiyun 		goto done;
2268*4882a593Smuzhiyun 	}
2269*4882a593Smuzhiyun 	dbg_ptr = mem_type_mapping_tbl->mem_Ptr;
2270*4882a593Smuzhiyun 	end_ptr = dbg_ptr + memory_size;
2271*4882a593Smuzhiyun 
2272*4882a593Smuzhiyun 	doneflag = mem_type_mapping_tbl->done_flag;
2273*4882a593Smuzhiyun 	moal_get_system_time(phandle, &sec, &usec);
2274*4882a593Smuzhiyun 	PRINTM(MMSG, "Start %s output %u.%06u, please wait...\n",
2275*4882a593Smuzhiyun 	       mem_type_mapping_tbl->mem_name, sec, usec);
2276*4882a593Smuzhiyun 	do {
2277*4882a593Smuzhiyun 		stat = woal_pcie_rdwr_firmware(phandle, doneflag, 0);
2278*4882a593Smuzhiyun 		if (RDWR_STATUS_FAILURE == stat)
2279*4882a593Smuzhiyun 			goto done;
2280*4882a593Smuzhiyun 
2281*4882a593Smuzhiyun 		reg_start = dump_start_reg;
2282*4882a593Smuzhiyun 		reg_end = dump_end_reg;
2283*4882a593Smuzhiyun 		for (reg = reg_start; reg <= reg_end; reg++) {
2284*4882a593Smuzhiyun 			ret = woal_read_reg_eight_bit(phandle, reg, dbg_ptr);
2285*4882a593Smuzhiyun 			if (ret) {
2286*4882a593Smuzhiyun 				PRINTM(MMSG, "PCIE READ ERR\n");
2287*4882a593Smuzhiyun 				goto done;
2288*4882a593Smuzhiyun 			}
2289*4882a593Smuzhiyun 			dbg_ptr++;
2290*4882a593Smuzhiyun 			if (dbg_ptr >= end_ptr) {
2291*4882a593Smuzhiyun 				PRINTM(MINFO,
2292*4882a593Smuzhiyun 				       "pre-allocced buf is not enough\n");
2293*4882a593Smuzhiyun 				ret = moal_vmalloc(phandle,
2294*4882a593Smuzhiyun 						   memory_size + 0x4000 + 1,
2295*4882a593Smuzhiyun 						   (t_u8 **)&tmp_ptr);
2296*4882a593Smuzhiyun 				if ((ret != MLAN_STATUS_SUCCESS) || !tmp_ptr) {
2297*4882a593Smuzhiyun 					PRINTM(MERROR,
2298*4882a593Smuzhiyun 					       "Error: vmalloc  buffer failed!!!\n");
2299*4882a593Smuzhiyun 					goto done;
2300*4882a593Smuzhiyun 				}
2301*4882a593Smuzhiyun 				moal_memcpy_ext(phandle, tmp_ptr,
2302*4882a593Smuzhiyun 						mem_type_mapping_tbl->mem_Ptr,
2303*4882a593Smuzhiyun 						memory_size,
2304*4882a593Smuzhiyun 						memory_size + 0x4000);
2305*4882a593Smuzhiyun 				moal_vfree(phandle,
2306*4882a593Smuzhiyun 					   mem_type_mapping_tbl->mem_Ptr);
2307*4882a593Smuzhiyun 				mem_type_mapping_tbl->mem_Ptr = tmp_ptr;
2308*4882a593Smuzhiyun 				tmp_ptr = NULL;
2309*4882a593Smuzhiyun 				dbg_ptr = mem_type_mapping_tbl->mem_Ptr +
2310*4882a593Smuzhiyun 					  memory_size;
2311*4882a593Smuzhiyun 				memory_size += 0x4000;
2312*4882a593Smuzhiyun 				end_ptr = mem_type_mapping_tbl->mem_Ptr +
2313*4882a593Smuzhiyun 					  memory_size;
2314*4882a593Smuzhiyun 			}
2315*4882a593Smuzhiyun 		}
2316*4882a593Smuzhiyun 		if (RDWR_STATUS_DONE == stat) {
2317*4882a593Smuzhiyun #ifdef MLAN_64BIT
2318*4882a593Smuzhiyun 			PRINTM(MMSG,
2319*4882a593Smuzhiyun 			       "%s done:"
2320*4882a593Smuzhiyun 			       "size = 0x%lx\n",
2321*4882a593Smuzhiyun 			       mem_type_mapping_tbl->mem_name,
2322*4882a593Smuzhiyun 			       dbg_ptr - mem_type_mapping_tbl->mem_Ptr);
2323*4882a593Smuzhiyun #else
2324*4882a593Smuzhiyun 			PRINTM(MMSG,
2325*4882a593Smuzhiyun 			       "%s done:"
2326*4882a593Smuzhiyun 			       "size = 0x%x\n",
2327*4882a593Smuzhiyun 			       mem_type_mapping_tbl->mem_name,
2328*4882a593Smuzhiyun 			       dbg_ptr - mem_type_mapping_tbl->mem_Ptr);
2329*4882a593Smuzhiyun #endif
2330*4882a593Smuzhiyun 			if (phandle->fw_dump_buf) {
2331*4882a593Smuzhiyun 				moal_vfree(phandle, phandle->fw_dump_buf);
2332*4882a593Smuzhiyun 				phandle->fw_dump_buf = NULL;
2333*4882a593Smuzhiyun 				phandle->fw_dump_len = 0;
2334*4882a593Smuzhiyun 			}
2335*4882a593Smuzhiyun 			phandle->fw_dump_buf = mem_type_mapping_tbl->mem_Ptr;
2336*4882a593Smuzhiyun 			phandle->fw_dump_len =
2337*4882a593Smuzhiyun 				dbg_ptr - mem_type_mapping_tbl->mem_Ptr;
2338*4882a593Smuzhiyun 			mem_type_mapping_tbl->mem_Ptr = NULL;
2339*4882a593Smuzhiyun 			break;
2340*4882a593Smuzhiyun 		}
2341*4882a593Smuzhiyun 	} while (1);
2342*4882a593Smuzhiyun 	moal_get_system_time(phandle, &sec, &usec);
2343*4882a593Smuzhiyun 	PRINTM(MMSG, "====PCIE DEBUG MODE OUTPUT END: %u.%06u ====\n", sec,
2344*4882a593Smuzhiyun 	       usec);
2345*4882a593Smuzhiyun 	/* end dump fw memory */
2346*4882a593Smuzhiyun done:
2347*4882a593Smuzhiyun 	if (mem_type_mapping_tbl->mem_Ptr) {
2348*4882a593Smuzhiyun 		moal_vfree(phandle, mem_type_mapping_tbl->mem_Ptr);
2349*4882a593Smuzhiyun 		mem_type_mapping_tbl->mem_Ptr = NULL;
2350*4882a593Smuzhiyun 	}
2351*4882a593Smuzhiyun 
2352*4882a593Smuzhiyun 	return;
2353*4882a593Smuzhiyun }
2354*4882a593Smuzhiyun #endif
2355*4882a593Smuzhiyun 
2356*4882a593Smuzhiyun /**
2357*4882a593Smuzhiyun  *  @brief This function check if this is second mac
2358*4882a593Smuzhiyun  *
2359*4882a593Smuzhiyun  *  @param handle   A pointer to moal_handle structure
2360*4882a593Smuzhiyun  *  @return         MTRUE/MFALSE
2361*4882a593Smuzhiyun  *
2362*4882a593Smuzhiyun  */
woal_pcie_is_second_mac(moal_handle * handle)2363*4882a593Smuzhiyun static t_u8 woal_pcie_is_second_mac(moal_handle *handle)
2364*4882a593Smuzhiyun {
2365*4882a593Smuzhiyun #ifdef PCIE9098
2366*4882a593Smuzhiyun 	pcie_service_card *card = (pcie_service_card *)handle->card;
2367*4882a593Smuzhiyun 	if (card->dev->device == PCIE_DEVICE_ID_88W9098P_FN1)
2368*4882a593Smuzhiyun 		return MTRUE;
2369*4882a593Smuzhiyun #endif
2370*4882a593Smuzhiyun 	return MFALSE;
2371*4882a593Smuzhiyun }
2372*4882a593Smuzhiyun 
woal_pcie_dump_fw_info(moal_handle * phandle)2373*4882a593Smuzhiyun static void woal_pcie_dump_fw_info(moal_handle *phandle)
2374*4882a593Smuzhiyun {
2375*4882a593Smuzhiyun 	mlan_pm_wakeup_card(phandle->pmlan_adapter, MTRUE);
2376*4882a593Smuzhiyun 	phandle->fw_dump = MTRUE;
2377*4882a593Smuzhiyun #ifdef PCIE8897
2378*4882a593Smuzhiyun 	if (IS_PCIE8897(phandle->card_type))
2379*4882a593Smuzhiyun 		woal_pcie_dump_fw_info_v1(phandle);
2380*4882a593Smuzhiyun #endif
2381*4882a593Smuzhiyun #if defined(PCIE8997) || defined(PCIE9098) || defined(PCIE9097) ||             \
2382*4882a593Smuzhiyun 	defined(PCIENW62X)
2383*4882a593Smuzhiyun 	if (IS_PCIE8997(phandle->card_type) ||
2384*4882a593Smuzhiyun 	    IS_PCIENW62X(phandle->card_type) ||
2385*4882a593Smuzhiyun 	    IS_PCIE9098(phandle->card_type) ||
2386*4882a593Smuzhiyun 	    IS_PCIE9097(phandle->card_type)) {
2387*4882a593Smuzhiyun 		woal_pcie_dump_fw_info_v2(phandle);
2388*4882a593Smuzhiyun 		if (phandle->event_fw_dump) {
2389*4882a593Smuzhiyun 			phandle->event_fw_dump = MFALSE;
2390*4882a593Smuzhiyun 			queue_work(phandle->workqueue, &phandle->main_work);
2391*4882a593Smuzhiyun 			phandle->is_fw_dump_timer_set = MTRUE;
2392*4882a593Smuzhiyun 			woal_mod_timer(&phandle->fw_dump_timer, MOAL_TIMER_5S);
2393*4882a593Smuzhiyun 			return;
2394*4882a593Smuzhiyun 		}
2395*4882a593Smuzhiyun 	}
2396*4882a593Smuzhiyun #endif
2397*4882a593Smuzhiyun 	phandle->fw_dump = MFALSE;
2398*4882a593Smuzhiyun 	if (!phandle->priv_num)
2399*4882a593Smuzhiyun 		return;
2400*4882a593Smuzhiyun 	woal_send_fw_dump_complete_event(
2401*4882a593Smuzhiyun 		woal_get_priv(phandle, MLAN_BSS_ROLE_ANY));
2402*4882a593Smuzhiyun 	mlan_pm_wakeup_card(phandle->pmlan_adapter, MFALSE);
2403*4882a593Smuzhiyun 	queue_work(phandle->workqueue, &phandle->main_work);
2404*4882a593Smuzhiyun 	woal_process_hang(phandle);
2405*4882a593Smuzhiyun }
2406*4882a593Smuzhiyun 
woal_pcie_get_fw_name(moal_handle * handle)2407*4882a593Smuzhiyun static mlan_status woal_pcie_get_fw_name(moal_handle *handle)
2408*4882a593Smuzhiyun {
2409*4882a593Smuzhiyun 	mlan_status ret = MLAN_STATUS_SUCCESS;
2410*4882a593Smuzhiyun #ifdef PCIE9098
2411*4882a593Smuzhiyun 	pcie_service_card *card = (pcie_service_card *)handle->card;
2412*4882a593Smuzhiyun 	moal_handle *ref_handle = NULL;
2413*4882a593Smuzhiyun #endif
2414*4882a593Smuzhiyun 
2415*4882a593Smuzhiyun #if defined(PCIE8997) || defined(PCIE9098) || defined(PCIE9097) ||             \
2416*4882a593Smuzhiyun 	defined(PCIENW62X)
2417*4882a593Smuzhiyun 	t_u32 rev_id_reg = handle->card_info->rev_id_reg;
2418*4882a593Smuzhiyun 	t_u32 revision_id = 0;
2419*4882a593Smuzhiyun #endif
2420*4882a593Smuzhiyun 
2421*4882a593Smuzhiyun #if defined(PCIE8997) || defined(PCIE9098) || defined(PCIE9097) ||             \
2422*4882a593Smuzhiyun 	defined(PCIENW62X)
2423*4882a593Smuzhiyun 	t_u32 host_strap_reg = handle->card_info->host_strap_reg;
2424*4882a593Smuzhiyun 	t_u32 magic_reg = handle->card_info->magic_reg;
2425*4882a593Smuzhiyun 	t_u32 strap = 0;
2426*4882a593Smuzhiyun 	t_u32 magic = 0;
2427*4882a593Smuzhiyun #endif
2428*4882a593Smuzhiyun 
2429*4882a593Smuzhiyun 	ENTER();
2430*4882a593Smuzhiyun 
2431*4882a593Smuzhiyun 	if (handle->params.fw_name) {
2432*4882a593Smuzhiyun #ifdef PCIE9097
2433*4882a593Smuzhiyun 		if (IS_PCIE9097(handle->card_type)) {
2434*4882a593Smuzhiyun 			woal_pcie_read_reg(handle, rev_id_reg, &revision_id);
2435*4882a593Smuzhiyun 			revision_id &= 0xff;
2436*4882a593Smuzhiyun 			PRINTM(MCMND, "revision_id=0x%x\n", revision_id);
2437*4882a593Smuzhiyun 			switch (revision_id) {
2438*4882a593Smuzhiyun 			case PCIE9097_A0:
2439*4882a593Smuzhiyun 				break;
2440*4882a593Smuzhiyun 			case PCIE9097_B0:
2441*4882a593Smuzhiyun 			case PCIE9097_B1:
2442*4882a593Smuzhiyun 				handle->card_rev = CHIP_9097_REV_B0;
2443*4882a593Smuzhiyun 				break;
2444*4882a593Smuzhiyun 			default:
2445*4882a593Smuzhiyun 				break;
2446*4882a593Smuzhiyun 			}
2447*4882a593Smuzhiyun 		}
2448*4882a593Smuzhiyun #endif
2449*4882a593Smuzhiyun 		goto done;
2450*4882a593Smuzhiyun 	}
2451*4882a593Smuzhiyun 
2452*4882a593Smuzhiyun #ifdef PCIE8997
2453*4882a593Smuzhiyun 	if (IS_PCIE8997(handle->card_type)) {
2454*4882a593Smuzhiyun 		woal_pcie_read_reg(handle, rev_id_reg, &revision_id);
2455*4882a593Smuzhiyun 		woal_pcie_read_reg(handle, host_strap_reg, &strap);
2456*4882a593Smuzhiyun 		woal_pcie_read_reg(handle, magic_reg, &magic);
2457*4882a593Smuzhiyun 		revision_id &= 0xff;
2458*4882a593Smuzhiyun 		strap &= 0x7;
2459*4882a593Smuzhiyun 		magic &= 0xff;
2460*4882a593Smuzhiyun 		PRINTM(MCMND, "magic=0x%x, strap=0x%x, revision_id=0x%x\n",
2461*4882a593Smuzhiyun 		       magic, strap, revision_id);
2462*4882a593Smuzhiyun 		if ((revision_id == PCIE8997_A1) &&
2463*4882a593Smuzhiyun 		    (magic == CHIP_MAGIC_VALUE)) {
2464*4882a593Smuzhiyun 			if (strap == CARD_TYPE_PCIE_UART)
2465*4882a593Smuzhiyun 				strcpy(handle->card_info->fw_name,
2466*4882a593Smuzhiyun 				       PCIEUART8997_DEFAULT_COMBO_FW_NAME);
2467*4882a593Smuzhiyun 			else
2468*4882a593Smuzhiyun 				strcpy(handle->card_info->fw_name,
2469*4882a593Smuzhiyun 				       PCIEUSB8997_DEFAULT_COMBO_FW_NAME);
2470*4882a593Smuzhiyun 		}
2471*4882a593Smuzhiyun 	}
2472*4882a593Smuzhiyun #endif
2473*4882a593Smuzhiyun #ifdef PCIE9098
2474*4882a593Smuzhiyun 	if (IS_PCIE9098(handle->card_type)) {
2475*4882a593Smuzhiyun 		if (card->dev->device == PCIE_DEVICE_ID_88W9098P_FN0) {
2476*4882a593Smuzhiyun 			woal_pcie_read_reg(handle, rev_id_reg, &revision_id);
2477*4882a593Smuzhiyun 			woal_pcie_read_reg(handle, host_strap_reg, &strap);
2478*4882a593Smuzhiyun 			woal_pcie_read_reg(handle, magic_reg, &magic);
2479*4882a593Smuzhiyun 			revision_id &= 0xff;
2480*4882a593Smuzhiyun 			strap &= 0x7;
2481*4882a593Smuzhiyun 			magic &= 0xff;
2482*4882a593Smuzhiyun 			PRINTM(MCMND,
2483*4882a593Smuzhiyun 			       "magic=0x%x, strap=0x%x, revision_id=0x%x\n",
2484*4882a593Smuzhiyun 			       magic, strap, revision_id);
2485*4882a593Smuzhiyun 			switch (revision_id) {
2486*4882a593Smuzhiyun 			case PCIE9098_Z1Z2:
2487*4882a593Smuzhiyun 				if (magic == CHIP_MAGIC_VALUE) {
2488*4882a593Smuzhiyun 					if (strap == CARD_TYPE_PCIE_UART)
2489*4882a593Smuzhiyun 						strcpy(handle->card_info
2490*4882a593Smuzhiyun 							       ->fw_name,
2491*4882a593Smuzhiyun 						       PCIEUART9098_DEFAULT_COMBO_FW_NAME);
2492*4882a593Smuzhiyun 					else if (strap == CARD_TYPE_PCIE_PCIE)
2493*4882a593Smuzhiyun 						strcpy(handle->card_info
2494*4882a593Smuzhiyun 							       ->fw_name,
2495*4882a593Smuzhiyun 						       PCIEPCIE9098_DEFAULT_COMBO_FW_NAME);
2496*4882a593Smuzhiyun 					else
2497*4882a593Smuzhiyun 						strcpy(handle->card_info
2498*4882a593Smuzhiyun 							       ->fw_name,
2499*4882a593Smuzhiyun 						       PCIEUSB9098_DEFAULT_COMBO_FW_NAME);
2500*4882a593Smuzhiyun 				}
2501*4882a593Smuzhiyun 				strcpy(handle->card_info->fw_name_wlan,
2502*4882a593Smuzhiyun 				       PCIE9098_DEFAULT_WLAN_FW_NAME);
2503*4882a593Smuzhiyun 				break;
2504*4882a593Smuzhiyun 			case PCIE9098_A0:
2505*4882a593Smuzhiyun 			case PCIE9098_A1:
2506*4882a593Smuzhiyun 			case PCIE9098_A2:
2507*4882a593Smuzhiyun 				if (magic == CHIP_MAGIC_VALUE) {
2508*4882a593Smuzhiyun 					if (strap == CARD_TYPE_PCIE_UART)
2509*4882a593Smuzhiyun 						strcpy(handle->card_info
2510*4882a593Smuzhiyun 							       ->fw_name,
2511*4882a593Smuzhiyun 						       PCIEUART9098_COMBO_V1_FW_NAME);
2512*4882a593Smuzhiyun 					else if (strap == CARD_TYPE_PCIE_PCIE)
2513*4882a593Smuzhiyun 						strcpy(handle->card_info
2514*4882a593Smuzhiyun 							       ->fw_name,
2515*4882a593Smuzhiyun 						       PCIEPCIE9098_COMBO_V1_FW_NAME);
2516*4882a593Smuzhiyun 					else
2517*4882a593Smuzhiyun 						strcpy(handle->card_info
2518*4882a593Smuzhiyun 							       ->fw_name,
2519*4882a593Smuzhiyun 						       PCIEUSB9098_COMBO_V1_FW_NAME);
2520*4882a593Smuzhiyun 				}
2521*4882a593Smuzhiyun 				strcpy(handle->card_info->fw_name_wlan,
2522*4882a593Smuzhiyun 				       PCIE9098_WLAN_V1_FW_NAME);
2523*4882a593Smuzhiyun 				break;
2524*4882a593Smuzhiyun 			default:
2525*4882a593Smuzhiyun 				break;
2526*4882a593Smuzhiyun 			}
2527*4882a593Smuzhiyun 		} else {
2528*4882a593Smuzhiyun 			ref_handle = (moal_handle *)handle->pref_mac;
2529*4882a593Smuzhiyun 			if (ref_handle) {
2530*4882a593Smuzhiyun 				strcpy(handle->card_info->fw_name,
2531*4882a593Smuzhiyun 				       ref_handle->card_info->fw_name);
2532*4882a593Smuzhiyun 				strcpy(handle->card_info->fw_name_wlan,
2533*4882a593Smuzhiyun 				       ref_handle->card_info->fw_name_wlan);
2534*4882a593Smuzhiyun 			}
2535*4882a593Smuzhiyun 		}
2536*4882a593Smuzhiyun 	}
2537*4882a593Smuzhiyun #endif
2538*4882a593Smuzhiyun #ifdef PCIE9097
2539*4882a593Smuzhiyun 	if (IS_PCIE9097(handle->card_type)) {
2540*4882a593Smuzhiyun 		woal_pcie_read_reg(handle, rev_id_reg, &revision_id);
2541*4882a593Smuzhiyun 		woal_pcie_read_reg(handle, host_strap_reg, &strap);
2542*4882a593Smuzhiyun 		woal_pcie_read_reg(handle, magic_reg, &magic);
2543*4882a593Smuzhiyun 		revision_id &= 0xff;
2544*4882a593Smuzhiyun 		strap &= 0x7;
2545*4882a593Smuzhiyun 		magic &= 0xff;
2546*4882a593Smuzhiyun 		PRINTM(MCMND, "magic=0x%x, strap=0x%x, revision_id=0x%x\n",
2547*4882a593Smuzhiyun 		       magic, strap, revision_id);
2548*4882a593Smuzhiyun 		switch (revision_id) {
2549*4882a593Smuzhiyun 		case PCIE9097_A0:
2550*4882a593Smuzhiyun 			if (magic == CHIP_MAGIC_VALUE) {
2551*4882a593Smuzhiyun 				if (strap == CARD_TYPE_PCIE_UART)
2552*4882a593Smuzhiyun 					strcpy(handle->card_info->fw_name,
2553*4882a593Smuzhiyun 					       PCIEUART9097_DEFAULT_COMBO_FW_NAME);
2554*4882a593Smuzhiyun 				else
2555*4882a593Smuzhiyun 					strcpy(handle->card_info->fw_name,
2556*4882a593Smuzhiyun 					       PCIEUSB9097_DEFAULT_COMBO_FW_NAME);
2557*4882a593Smuzhiyun 			}
2558*4882a593Smuzhiyun 			strcpy(handle->card_info->fw_name_wlan,
2559*4882a593Smuzhiyun 			       PCIE9097_DEFAULT_WLAN_FW_NAME);
2560*4882a593Smuzhiyun 			break;
2561*4882a593Smuzhiyun 		case PCIE9097_B0:
2562*4882a593Smuzhiyun 		case PCIE9097_B1:
2563*4882a593Smuzhiyun 			if (magic == CHIP_MAGIC_VALUE) {
2564*4882a593Smuzhiyun 				if (strap == CARD_TYPE_PCIE_UART)
2565*4882a593Smuzhiyun 					strcpy(handle->card_info->fw_name,
2566*4882a593Smuzhiyun 					       PCIEUART9097_COMBO_V1_FW_NAME);
2567*4882a593Smuzhiyun 				else
2568*4882a593Smuzhiyun 					strcpy(handle->card_info->fw_name,
2569*4882a593Smuzhiyun 					       PCIEUSB9097_COMBO_V1_FW_NAME);
2570*4882a593Smuzhiyun 			}
2571*4882a593Smuzhiyun 			strcpy(handle->card_info->fw_name_wlan,
2572*4882a593Smuzhiyun 			       PCIE9097_WLAN_V1_FW_NAME);
2573*4882a593Smuzhiyun 			handle->card_rev = CHIP_9097_REV_B0;
2574*4882a593Smuzhiyun 			break;
2575*4882a593Smuzhiyun 		default:
2576*4882a593Smuzhiyun 			break;
2577*4882a593Smuzhiyun 		}
2578*4882a593Smuzhiyun 	}
2579*4882a593Smuzhiyun #endif
2580*4882a593Smuzhiyun #ifdef PCIENW62X
2581*4882a593Smuzhiyun 	if (IS_PCIENW62X(handle->card_type)) {
2582*4882a593Smuzhiyun 		woal_pcie_read_reg(handle, rev_id_reg, &revision_id);
2583*4882a593Smuzhiyun 		woal_pcie_read_reg(handle, host_strap_reg, &strap);
2584*4882a593Smuzhiyun 		woal_pcie_read_reg(handle, magic_reg, &magic);
2585*4882a593Smuzhiyun 		revision_id &= 0xff;
2586*4882a593Smuzhiyun 		strap &= 0x7;
2587*4882a593Smuzhiyun 		magic &= 0xff;
2588*4882a593Smuzhiyun 		PRINTM(MCMND, "magic=0x%x, strap=0x%x, revision_id=0x%x\n",
2589*4882a593Smuzhiyun 		       magic, strap, revision_id);
2590*4882a593Smuzhiyun 		if (magic == CHIP_MAGIC_VALUE) {
2591*4882a593Smuzhiyun 			if (strap == CARD_TYPE_PCIE_UART)
2592*4882a593Smuzhiyun 				strcpy(handle->card_info->fw_name,
2593*4882a593Smuzhiyun 				       PCIEUARTNW62X_DEFAULT_COMBO_FW_NAME);
2594*4882a593Smuzhiyun 			else
2595*4882a593Smuzhiyun 				strcpy(handle->card_info->fw_name,
2596*4882a593Smuzhiyun 				       PCIEUSBNW62X_DEFAULT_COMBO_FW_NAME);
2597*4882a593Smuzhiyun 		}
2598*4882a593Smuzhiyun 	}
2599*4882a593Smuzhiyun #endif
2600*4882a593Smuzhiyun done:
2601*4882a593Smuzhiyun 	PRINTM(MCMND, "combo fw:%s wlan fw:%s \n", handle->card_info->fw_name,
2602*4882a593Smuzhiyun 	       handle->card_info->fw_name_wlan);
2603*4882a593Smuzhiyun 	LEAVE();
2604*4882a593Smuzhiyun 	return ret;
2605*4882a593Smuzhiyun }
2606*4882a593Smuzhiyun 
2607*4882a593Smuzhiyun static moal_if_ops pcie_ops = {
2608*4882a593Smuzhiyun 	.register_dev = woal_pcie_register_dev,
2609*4882a593Smuzhiyun 	.unregister_dev = woal_pcie_unregister_dev,
2610*4882a593Smuzhiyun 	.read_reg = woal_pcie_read_reg,
2611*4882a593Smuzhiyun 	.write_reg = woal_pcie_write_reg,
2612*4882a593Smuzhiyun 	.read_data_sync = woal_pcie_read_data_sync,
2613*4882a593Smuzhiyun 	.write_data_sync = woal_pcie_write_data_sync,
2614*4882a593Smuzhiyun 	.get_fw_name = woal_pcie_get_fw_name,
2615*4882a593Smuzhiyun 	.dump_fw_info = woal_pcie_dump_fw_info,
2616*4882a593Smuzhiyun 	.reg_dbg = woal_pcie_reg_dbg,
2617*4882a593Smuzhiyun 	.dump_reg_info = woal_pcie_dump_reg_info,
2618*4882a593Smuzhiyun 	.is_second_mac = woal_pcie_is_second_mac,
2619*4882a593Smuzhiyun };
2620