1*4882a593Smuzhiyun /* SPDX-License-Identifier: ISC */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun #ifndef __MT76x2_EEPROM_H
7*4882a593Smuzhiyun #define __MT76x2_EEPROM_H
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include "../mt76x02_eeprom.h"
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun enum mt76x2_cal_channel_group {
12*4882a593Smuzhiyun MT_CH_5G_JAPAN,
13*4882a593Smuzhiyun MT_CH_5G_UNII_1,
14*4882a593Smuzhiyun MT_CH_5G_UNII_2,
15*4882a593Smuzhiyun MT_CH_5G_UNII_2E_1,
16*4882a593Smuzhiyun MT_CH_5G_UNII_2E_2,
17*4882a593Smuzhiyun MT_CH_5G_UNII_3,
18*4882a593Smuzhiyun __MT_CH_MAX
19*4882a593Smuzhiyun };
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun struct mt76x2_tx_power_info {
22*4882a593Smuzhiyun u8 target_power;
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun s8 delta_bw40;
25*4882a593Smuzhiyun s8 delta_bw80;
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun struct {
28*4882a593Smuzhiyun s8 tssi_slope;
29*4882a593Smuzhiyun s8 tssi_offset;
30*4882a593Smuzhiyun s8 target_power;
31*4882a593Smuzhiyun s8 delta;
32*4882a593Smuzhiyun } chain[MT_MAX_CHAINS];
33*4882a593Smuzhiyun };
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun struct mt76x2_temp_comp {
36*4882a593Smuzhiyun u8 temp_25_ref;
37*4882a593Smuzhiyun int lower_bound; /* J */
38*4882a593Smuzhiyun int upper_bound; /* J */
39*4882a593Smuzhiyun unsigned int high_slope; /* J / dB */
40*4882a593Smuzhiyun unsigned int low_slope; /* J / dB */
41*4882a593Smuzhiyun };
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun void mt76x2_get_rate_power(struct mt76x02_dev *dev, struct mt76_rate_power *t,
44*4882a593Smuzhiyun struct ieee80211_channel *chan);
45*4882a593Smuzhiyun void mt76x2_get_power_info(struct mt76x02_dev *dev,
46*4882a593Smuzhiyun struct mt76x2_tx_power_info *t,
47*4882a593Smuzhiyun struct ieee80211_channel *chan);
48*4882a593Smuzhiyun int mt76x2_get_temp_comp(struct mt76x02_dev *dev, struct mt76x2_temp_comp *t);
49*4882a593Smuzhiyun void mt76x2_read_rx_gain(struct mt76x02_dev *dev);
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun static inline bool
mt76x2_has_ext_lna(struct mt76x02_dev * dev)52*4882a593Smuzhiyun mt76x2_has_ext_lna(struct mt76x02_dev *dev)
53*4882a593Smuzhiyun {
54*4882a593Smuzhiyun u32 val = mt76x02_eeprom_get(dev, MT_EE_NIC_CONF_1);
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun if (dev->mphy.chandef.chan->band == NL80211_BAND_2GHZ)
57*4882a593Smuzhiyun return val & MT_EE_NIC_CONF_1_LNA_EXT_2G;
58*4882a593Smuzhiyun else
59*4882a593Smuzhiyun return val & MT_EE_NIC_CONF_1_LNA_EXT_5G;
60*4882a593Smuzhiyun }
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun static inline bool
mt76x2_temp_tx_alc_enabled(struct mt76x02_dev * dev)63*4882a593Smuzhiyun mt76x2_temp_tx_alc_enabled(struct mt76x02_dev *dev)
64*4882a593Smuzhiyun {
65*4882a593Smuzhiyun u16 val;
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun val = mt76x02_eeprom_get(dev, MT_EE_TX_POWER_EXT_PA_5G);
68*4882a593Smuzhiyun if (!(val & BIT(15)))
69*4882a593Smuzhiyun return false;
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun return mt76x02_eeprom_get(dev, MT_EE_NIC_CONF_1) &
72*4882a593Smuzhiyun MT_EE_NIC_CONF_1_TEMP_TX_ALC;
73*4882a593Smuzhiyun }
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun static inline bool
mt76x2_tssi_enabled(struct mt76x02_dev * dev)76*4882a593Smuzhiyun mt76x2_tssi_enabled(struct mt76x02_dev *dev)
77*4882a593Smuzhiyun {
78*4882a593Smuzhiyun return !mt76x2_temp_tx_alc_enabled(dev) &&
79*4882a593Smuzhiyun (mt76x02_eeprom_get(dev, MT_EE_NIC_CONF_1) &
80*4882a593Smuzhiyun MT_EE_NIC_CONF_1_TX_ALC_EN);
81*4882a593Smuzhiyun }
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun #endif
84