1*4882a593Smuzhiyun // SPDX-License-Identifier: ISC
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
4*4882a593Smuzhiyun * Copyright (C) 2018 Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #include <linux/kernel.h>
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include "mt76x02.h"
10*4882a593Smuzhiyun
mt76x02_tx(struct ieee80211_hw * hw,struct ieee80211_tx_control * control,struct sk_buff * skb)11*4882a593Smuzhiyun void mt76x02_tx(struct ieee80211_hw *hw, struct ieee80211_tx_control *control,
12*4882a593Smuzhiyun struct sk_buff *skb)
13*4882a593Smuzhiyun {
14*4882a593Smuzhiyun struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
15*4882a593Smuzhiyun struct mt76x02_dev *dev = hw->priv;
16*4882a593Smuzhiyun struct ieee80211_vif *vif = info->control.vif;
17*4882a593Smuzhiyun struct mt76_wcid *wcid = &dev->mt76.global_wcid;
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun if (control->sta) {
20*4882a593Smuzhiyun struct mt76x02_sta *msta;
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun msta = (struct mt76x02_sta *)control->sta->drv_priv;
23*4882a593Smuzhiyun wcid = &msta->wcid;
24*4882a593Smuzhiyun } else if (vif) {
25*4882a593Smuzhiyun struct mt76x02_vif *mvif;
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun mvif = (struct mt76x02_vif *)vif->drv_priv;
28*4882a593Smuzhiyun wcid = &mvif->group_wcid;
29*4882a593Smuzhiyun }
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun mt76_tx(&dev->mphy, control->sta, wcid, skb);
32*4882a593Smuzhiyun }
33*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(mt76x02_tx);
34*4882a593Smuzhiyun
mt76x02_queue_rx_skb(struct mt76_dev * mdev,enum mt76_rxq_id q,struct sk_buff * skb)35*4882a593Smuzhiyun void mt76x02_queue_rx_skb(struct mt76_dev *mdev, enum mt76_rxq_id q,
36*4882a593Smuzhiyun struct sk_buff *skb)
37*4882a593Smuzhiyun {
38*4882a593Smuzhiyun struct mt76x02_dev *dev = container_of(mdev, struct mt76x02_dev, mt76);
39*4882a593Smuzhiyun void *rxwi = skb->data;
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun if (q == MT_RXQ_MCU) {
42*4882a593Smuzhiyun mt76_mcu_rx_event(&dev->mt76, skb);
43*4882a593Smuzhiyun return;
44*4882a593Smuzhiyun }
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun skb_pull(skb, sizeof(struct mt76x02_rxwi));
47*4882a593Smuzhiyun if (mt76x02_mac_process_rx(dev, skb, rxwi)) {
48*4882a593Smuzhiyun dev_kfree_skb(skb);
49*4882a593Smuzhiyun return;
50*4882a593Smuzhiyun }
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun mt76_rx(mdev, q, skb);
53*4882a593Smuzhiyun }
54*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(mt76x02_queue_rx_skb);
55*4882a593Smuzhiyun
mt76x02_tx_get_max_txpwr_adj(struct mt76x02_dev * dev,const struct ieee80211_tx_rate * rate)56*4882a593Smuzhiyun s8 mt76x02_tx_get_max_txpwr_adj(struct mt76x02_dev *dev,
57*4882a593Smuzhiyun const struct ieee80211_tx_rate *rate)
58*4882a593Smuzhiyun {
59*4882a593Smuzhiyun s8 max_txpwr;
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun if (rate->flags & IEEE80211_TX_RC_VHT_MCS) {
62*4882a593Smuzhiyun u8 mcs = ieee80211_rate_get_vht_mcs(rate);
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun if (mcs == 8 || mcs == 9) {
65*4882a593Smuzhiyun max_txpwr = dev->mt76.rate_power.vht[8];
66*4882a593Smuzhiyun } else {
67*4882a593Smuzhiyun u8 nss, idx;
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun nss = ieee80211_rate_get_vht_nss(rate);
70*4882a593Smuzhiyun idx = ((nss - 1) << 3) + mcs;
71*4882a593Smuzhiyun max_txpwr = dev->mt76.rate_power.ht[idx & 0xf];
72*4882a593Smuzhiyun }
73*4882a593Smuzhiyun } else if (rate->flags & IEEE80211_TX_RC_MCS) {
74*4882a593Smuzhiyun max_txpwr = dev->mt76.rate_power.ht[rate->idx & 0xf];
75*4882a593Smuzhiyun } else {
76*4882a593Smuzhiyun enum nl80211_band band = dev->mphy.chandef.chan->band;
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun if (band == NL80211_BAND_2GHZ) {
79*4882a593Smuzhiyun const struct ieee80211_rate *r;
80*4882a593Smuzhiyun struct wiphy *wiphy = dev->mt76.hw->wiphy;
81*4882a593Smuzhiyun struct mt76_rate_power *rp = &dev->mt76.rate_power;
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun r = &wiphy->bands[band]->bitrates[rate->idx];
84*4882a593Smuzhiyun if (r->flags & IEEE80211_RATE_SHORT_PREAMBLE)
85*4882a593Smuzhiyun max_txpwr = rp->cck[r->hw_value & 0x3];
86*4882a593Smuzhiyun else
87*4882a593Smuzhiyun max_txpwr = rp->ofdm[r->hw_value & 0x7];
88*4882a593Smuzhiyun } else {
89*4882a593Smuzhiyun max_txpwr = dev->mt76.rate_power.ofdm[rate->idx & 0x7];
90*4882a593Smuzhiyun }
91*4882a593Smuzhiyun }
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun return max_txpwr;
94*4882a593Smuzhiyun }
95*4882a593Smuzhiyun
mt76x02_tx_get_txpwr_adj(struct mt76x02_dev * dev,s8 txpwr,s8 max_txpwr_adj)96*4882a593Smuzhiyun s8 mt76x02_tx_get_txpwr_adj(struct mt76x02_dev *dev, s8 txpwr, s8 max_txpwr_adj)
97*4882a593Smuzhiyun {
98*4882a593Smuzhiyun txpwr = min_t(s8, txpwr, dev->txpower_conf);
99*4882a593Smuzhiyun txpwr -= (dev->target_power + dev->target_power_delta[0]);
100*4882a593Smuzhiyun txpwr = min_t(s8, txpwr, max_txpwr_adj);
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun if (!dev->enable_tpc)
103*4882a593Smuzhiyun return 0;
104*4882a593Smuzhiyun else if (txpwr >= 0)
105*4882a593Smuzhiyun return min_t(s8, txpwr, 7);
106*4882a593Smuzhiyun else
107*4882a593Smuzhiyun return (txpwr < -16) ? 8 : (txpwr + 32) / 2;
108*4882a593Smuzhiyun }
109*4882a593Smuzhiyun
mt76x02_tx_set_txpwr_auto(struct mt76x02_dev * dev,s8 txpwr)110*4882a593Smuzhiyun void mt76x02_tx_set_txpwr_auto(struct mt76x02_dev *dev, s8 txpwr)
111*4882a593Smuzhiyun {
112*4882a593Smuzhiyun s8 txpwr_adj;
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun txpwr_adj = mt76x02_tx_get_txpwr_adj(dev, txpwr,
115*4882a593Smuzhiyun dev->mt76.rate_power.ofdm[4]);
116*4882a593Smuzhiyun mt76_rmw_field(dev, MT_PROT_AUTO_TX_CFG,
117*4882a593Smuzhiyun MT_PROT_AUTO_TX_CFG_PROT_PADJ, txpwr_adj);
118*4882a593Smuzhiyun mt76_rmw_field(dev, MT_PROT_AUTO_TX_CFG,
119*4882a593Smuzhiyun MT_PROT_AUTO_TX_CFG_AUTO_PADJ, txpwr_adj);
120*4882a593Smuzhiyun }
121*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(mt76x02_tx_set_txpwr_auto);
122*4882a593Smuzhiyun
mt76x02_tx_status_data(struct mt76_dev * mdev,u8 * update)123*4882a593Smuzhiyun bool mt76x02_tx_status_data(struct mt76_dev *mdev, u8 *update)
124*4882a593Smuzhiyun {
125*4882a593Smuzhiyun struct mt76x02_dev *dev = container_of(mdev, struct mt76x02_dev, mt76);
126*4882a593Smuzhiyun struct mt76x02_tx_status stat;
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun if (!mt76x02_mac_load_tx_status(dev, &stat))
129*4882a593Smuzhiyun return false;
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun mt76x02_send_tx_status(dev, &stat, update);
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun return true;
134*4882a593Smuzhiyun }
135*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(mt76x02_tx_status_data);
136*4882a593Smuzhiyun
mt76x02_tx_prepare_skb(struct mt76_dev * mdev,void * txwi_ptr,enum mt76_txq_id qid,struct mt76_wcid * wcid,struct ieee80211_sta * sta,struct mt76_tx_info * tx_info)137*4882a593Smuzhiyun int mt76x02_tx_prepare_skb(struct mt76_dev *mdev, void *txwi_ptr,
138*4882a593Smuzhiyun enum mt76_txq_id qid, struct mt76_wcid *wcid,
139*4882a593Smuzhiyun struct ieee80211_sta *sta,
140*4882a593Smuzhiyun struct mt76_tx_info *tx_info)
141*4882a593Smuzhiyun {
142*4882a593Smuzhiyun struct mt76x02_dev *dev = container_of(mdev, struct mt76x02_dev, mt76);
143*4882a593Smuzhiyun struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)tx_info->skb->data;
144*4882a593Smuzhiyun struct mt76x02_txwi *txwi = txwi_ptr;
145*4882a593Smuzhiyun bool ampdu = IEEE80211_SKB_CB(tx_info->skb)->flags & IEEE80211_TX_CTL_AMPDU;
146*4882a593Smuzhiyun int hdrlen, len, pid, qsel = MT_QSEL_EDCA;
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun if (qid == MT_TXQ_PSD && wcid && wcid->idx < 128)
149*4882a593Smuzhiyun mt76x02_mac_wcid_set_drop(dev, wcid->idx, false);
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun hdrlen = ieee80211_hdrlen(hdr->frame_control);
152*4882a593Smuzhiyun len = tx_info->skb->len - (hdrlen & 2);
153*4882a593Smuzhiyun mt76x02_mac_write_txwi(dev, txwi, tx_info->skb, wcid, sta, len);
154*4882a593Smuzhiyun
155*4882a593Smuzhiyun pid = mt76_tx_status_skb_add(mdev, wcid, tx_info->skb);
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun /* encode packet rate for no-skb packet id to fix up status reporting */
158*4882a593Smuzhiyun if (pid == MT_PACKET_ID_NO_SKB)
159*4882a593Smuzhiyun pid = MT_PACKET_ID_HAS_RATE |
160*4882a593Smuzhiyun (le16_to_cpu(txwi->rate) & MT_RXWI_RATE_INDEX) |
161*4882a593Smuzhiyun FIELD_PREP(MT_PKTID_AC,
162*4882a593Smuzhiyun skb_get_queue_mapping(tx_info->skb));
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun txwi->pktid = pid;
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun if (mt76_is_skb_pktid(pid) && ampdu)
167*4882a593Smuzhiyun qsel = MT_QSEL_MGMT;
168*4882a593Smuzhiyun
169*4882a593Smuzhiyun tx_info->info = FIELD_PREP(MT_TXD_INFO_QSEL, qsel) |
170*4882a593Smuzhiyun MT_TXD_INFO_80211;
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun if (!wcid || wcid->hw_key_idx == 0xff || wcid->sw_iv)
173*4882a593Smuzhiyun tx_info->info |= MT_TXD_INFO_WIV;
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun if (sta) {
176*4882a593Smuzhiyun struct mt76x02_sta *msta = (struct mt76x02_sta *)sta->drv_priv;
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun ewma_pktlen_add(&msta->pktlen, tx_info->skb->len);
179*4882a593Smuzhiyun }
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun return 0;
182*4882a593Smuzhiyun }
183*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(mt76x02_tx_prepare_skb);
184