xref: /OK3568_Linux_fs/kernel/drivers/net/wireless/mediatek/mt76/mt76x02_phy.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: ISC */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Copyright (C) 2018 Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>
4*4882a593Smuzhiyun  */
5*4882a593Smuzhiyun 
6*4882a593Smuzhiyun #ifndef __MT76x02_PHY_H
7*4882a593Smuzhiyun #define __MT76x02_PHY_H
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun #include "mt76x02_regs.h"
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun static inline int
mt76x02_get_rssi_gain_thresh(struct mt76x02_dev * dev)12*4882a593Smuzhiyun mt76x02_get_rssi_gain_thresh(struct mt76x02_dev *dev)
13*4882a593Smuzhiyun {
14*4882a593Smuzhiyun 	switch (dev->mphy.chandef.width) {
15*4882a593Smuzhiyun 	case NL80211_CHAN_WIDTH_80:
16*4882a593Smuzhiyun 		return -62;
17*4882a593Smuzhiyun 	case NL80211_CHAN_WIDTH_40:
18*4882a593Smuzhiyun 		return -65;
19*4882a593Smuzhiyun 	default:
20*4882a593Smuzhiyun 		return -68;
21*4882a593Smuzhiyun 	}
22*4882a593Smuzhiyun }
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun static inline int
mt76x02_get_low_rssi_gain_thresh(struct mt76x02_dev * dev)25*4882a593Smuzhiyun mt76x02_get_low_rssi_gain_thresh(struct mt76x02_dev *dev)
26*4882a593Smuzhiyun {
27*4882a593Smuzhiyun 	switch (dev->mphy.chandef.width) {
28*4882a593Smuzhiyun 	case NL80211_CHAN_WIDTH_80:
29*4882a593Smuzhiyun 		return -76;
30*4882a593Smuzhiyun 	case NL80211_CHAN_WIDTH_40:
31*4882a593Smuzhiyun 		return -79;
32*4882a593Smuzhiyun 	default:
33*4882a593Smuzhiyun 		return -82;
34*4882a593Smuzhiyun 	}
35*4882a593Smuzhiyun }
36*4882a593Smuzhiyun 
37*4882a593Smuzhiyun void mt76x02_add_rate_power_offset(struct mt76_rate_power *r, int offset);
38*4882a593Smuzhiyun void mt76x02_phy_set_txpower(struct mt76x02_dev *dev, int txp_0, int txp_2);
39*4882a593Smuzhiyun void mt76x02_limit_rate_power(struct mt76_rate_power *r, int limit);
40*4882a593Smuzhiyun int mt76x02_get_max_rate_power(struct mt76_rate_power *r);
41*4882a593Smuzhiyun void mt76x02_phy_set_rxpath(struct mt76x02_dev *dev);
42*4882a593Smuzhiyun void mt76x02_phy_set_txdac(struct mt76x02_dev *dev);
43*4882a593Smuzhiyun void mt76x02_phy_set_bw(struct mt76x02_dev *dev, int width, u8 ctrl);
44*4882a593Smuzhiyun void mt76x02_phy_set_band(struct mt76x02_dev *dev, int band,
45*4882a593Smuzhiyun 			  bool primary_upper);
46*4882a593Smuzhiyun bool mt76x02_phy_adjust_vga_gain(struct mt76x02_dev *dev);
47*4882a593Smuzhiyun void mt76x02_init_agc_gain(struct mt76x02_dev *dev);
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun #endif /* __MT76x02_PHY_H */
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