xref: /OK3568_Linux_fs/kernel/drivers/net/wireless/mediatek/mt76/mt76x02_mcu.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: ISC
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Copyright (C) 2016 Felix Fietkau <nbd@nbd.name>
4*4882a593Smuzhiyun  * Copyright (C) 2018 Lorenzo Bianconi <lorenzo.bianconi83@gmail.com>
5*4882a593Smuzhiyun  */
6*4882a593Smuzhiyun 
7*4882a593Smuzhiyun #include <linux/kernel.h>
8*4882a593Smuzhiyun #include <linux/firmware.h>
9*4882a593Smuzhiyun #include <linux/delay.h>
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun #include "mt76x02_mcu.h"
12*4882a593Smuzhiyun 
mt76x02_mcu_msg_send(struct mt76_dev * mdev,int cmd,const void * data,int len,bool wait_resp)13*4882a593Smuzhiyun int mt76x02_mcu_msg_send(struct mt76_dev *mdev, int cmd, const void *data,
14*4882a593Smuzhiyun 			 int len, bool wait_resp)
15*4882a593Smuzhiyun {
16*4882a593Smuzhiyun 	struct mt76x02_dev *dev = container_of(mdev, struct mt76x02_dev, mt76);
17*4882a593Smuzhiyun 	unsigned long expires = jiffies + HZ;
18*4882a593Smuzhiyun 	struct sk_buff *skb;
19*4882a593Smuzhiyun 	u32 tx_info;
20*4882a593Smuzhiyun 	int ret;
21*4882a593Smuzhiyun 	u8 seq;
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun 	if (dev->mcu_timeout)
24*4882a593Smuzhiyun 		return -EIO;
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun 	skb = mt76_mcu_msg_alloc(mdev, data, len);
27*4882a593Smuzhiyun 	if (!skb)
28*4882a593Smuzhiyun 		return -ENOMEM;
29*4882a593Smuzhiyun 
30*4882a593Smuzhiyun 	mutex_lock(&mdev->mcu.mutex);
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun 	seq = ++mdev->mcu.msg_seq & 0xf;
33*4882a593Smuzhiyun 	if (!seq)
34*4882a593Smuzhiyun 		seq = ++mdev->mcu.msg_seq & 0xf;
35*4882a593Smuzhiyun 
36*4882a593Smuzhiyun 	tx_info = MT_MCU_MSG_TYPE_CMD |
37*4882a593Smuzhiyun 		  FIELD_PREP(MT_MCU_MSG_CMD_TYPE, cmd) |
38*4882a593Smuzhiyun 		  FIELD_PREP(MT_MCU_MSG_CMD_SEQ, seq) |
39*4882a593Smuzhiyun 		  FIELD_PREP(MT_MCU_MSG_PORT, CPU_TX_PORT) |
40*4882a593Smuzhiyun 		  FIELD_PREP(MT_MCU_MSG_LEN, skb->len);
41*4882a593Smuzhiyun 
42*4882a593Smuzhiyun 	ret = mt76_tx_queue_skb_raw(dev, MT_TXQ_MCU, skb, tx_info);
43*4882a593Smuzhiyun 	if (ret)
44*4882a593Smuzhiyun 		goto out;
45*4882a593Smuzhiyun 
46*4882a593Smuzhiyun 	while (wait_resp) {
47*4882a593Smuzhiyun 		u32 *rxfce;
48*4882a593Smuzhiyun 		bool check_seq = false;
49*4882a593Smuzhiyun 
50*4882a593Smuzhiyun 		skb = mt76_mcu_get_response(&dev->mt76, expires);
51*4882a593Smuzhiyun 		if (!skb) {
52*4882a593Smuzhiyun 			dev_err(mdev->dev,
53*4882a593Smuzhiyun 				"MCU message %d (seq %d) timed out\n", cmd,
54*4882a593Smuzhiyun 				seq);
55*4882a593Smuzhiyun 			ret = -ETIMEDOUT;
56*4882a593Smuzhiyun 			dev->mcu_timeout = 1;
57*4882a593Smuzhiyun 			break;
58*4882a593Smuzhiyun 		}
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun 		rxfce = (u32 *)skb->cb;
61*4882a593Smuzhiyun 
62*4882a593Smuzhiyun 		if (seq == FIELD_GET(MT_RX_FCE_INFO_CMD_SEQ, *rxfce))
63*4882a593Smuzhiyun 			check_seq = true;
64*4882a593Smuzhiyun 
65*4882a593Smuzhiyun 		dev_kfree_skb(skb);
66*4882a593Smuzhiyun 		if (check_seq)
67*4882a593Smuzhiyun 			break;
68*4882a593Smuzhiyun 	}
69*4882a593Smuzhiyun 
70*4882a593Smuzhiyun out:
71*4882a593Smuzhiyun 	mutex_unlock(&mdev->mcu.mutex);
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun 	return ret;
74*4882a593Smuzhiyun }
75*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(mt76x02_mcu_msg_send);
76*4882a593Smuzhiyun 
mt76x02_mcu_function_select(struct mt76x02_dev * dev,enum mcu_function func,u32 val)77*4882a593Smuzhiyun int mt76x02_mcu_function_select(struct mt76x02_dev *dev, enum mcu_function func,
78*4882a593Smuzhiyun 				u32 val)
79*4882a593Smuzhiyun {
80*4882a593Smuzhiyun 	struct {
81*4882a593Smuzhiyun 		__le32 id;
82*4882a593Smuzhiyun 		__le32 value;
83*4882a593Smuzhiyun 	} __packed __aligned(4) msg = {
84*4882a593Smuzhiyun 		.id = cpu_to_le32(func),
85*4882a593Smuzhiyun 		.value = cpu_to_le32(val),
86*4882a593Smuzhiyun 	};
87*4882a593Smuzhiyun 	bool wait = false;
88*4882a593Smuzhiyun 
89*4882a593Smuzhiyun 	if (func != Q_SELECT)
90*4882a593Smuzhiyun 		wait = true;
91*4882a593Smuzhiyun 
92*4882a593Smuzhiyun 	return mt76_mcu_send_msg(dev, CMD_FUN_SET_OP, &msg, sizeof(msg), wait);
93*4882a593Smuzhiyun }
94*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(mt76x02_mcu_function_select);
95*4882a593Smuzhiyun 
mt76x02_mcu_set_radio_state(struct mt76x02_dev * dev,bool on)96*4882a593Smuzhiyun int mt76x02_mcu_set_radio_state(struct mt76x02_dev *dev, bool on)
97*4882a593Smuzhiyun {
98*4882a593Smuzhiyun 	struct {
99*4882a593Smuzhiyun 		__le32 mode;
100*4882a593Smuzhiyun 		__le32 level;
101*4882a593Smuzhiyun 	} __packed __aligned(4) msg = {
102*4882a593Smuzhiyun 		.mode = cpu_to_le32(on ? RADIO_ON : RADIO_OFF),
103*4882a593Smuzhiyun 		.level = cpu_to_le32(0),
104*4882a593Smuzhiyun 	};
105*4882a593Smuzhiyun 
106*4882a593Smuzhiyun 	return mt76_mcu_send_msg(dev, CMD_POWER_SAVING_OP, &msg, sizeof(msg),
107*4882a593Smuzhiyun 				 false);
108*4882a593Smuzhiyun }
109*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(mt76x02_mcu_set_radio_state);
110*4882a593Smuzhiyun 
mt76x02_mcu_calibrate(struct mt76x02_dev * dev,int type,u32 param)111*4882a593Smuzhiyun int mt76x02_mcu_calibrate(struct mt76x02_dev *dev, int type, u32 param)
112*4882a593Smuzhiyun {
113*4882a593Smuzhiyun 	struct {
114*4882a593Smuzhiyun 		__le32 id;
115*4882a593Smuzhiyun 		__le32 value;
116*4882a593Smuzhiyun 	} __packed __aligned(4) msg = {
117*4882a593Smuzhiyun 		.id = cpu_to_le32(type),
118*4882a593Smuzhiyun 		.value = cpu_to_le32(param),
119*4882a593Smuzhiyun 	};
120*4882a593Smuzhiyun 	bool is_mt76x2e = mt76_is_mmio(&dev->mt76) && is_mt76x2(dev);
121*4882a593Smuzhiyun 	int ret;
122*4882a593Smuzhiyun 
123*4882a593Smuzhiyun 	if (is_mt76x2e)
124*4882a593Smuzhiyun 		mt76_rmw(dev, MT_MCU_COM_REG0, BIT(31), 0);
125*4882a593Smuzhiyun 
126*4882a593Smuzhiyun 	ret = mt76_mcu_send_msg(dev, CMD_CALIBRATION_OP, &msg, sizeof(msg),
127*4882a593Smuzhiyun 				true);
128*4882a593Smuzhiyun 	if (ret)
129*4882a593Smuzhiyun 		return ret;
130*4882a593Smuzhiyun 
131*4882a593Smuzhiyun 	if (is_mt76x2e &&
132*4882a593Smuzhiyun 	    WARN_ON(!mt76_poll_msec(dev, MT_MCU_COM_REG0,
133*4882a593Smuzhiyun 				    BIT(31), BIT(31), 100)))
134*4882a593Smuzhiyun 		return -ETIMEDOUT;
135*4882a593Smuzhiyun 
136*4882a593Smuzhiyun 	return 0;
137*4882a593Smuzhiyun }
138*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(mt76x02_mcu_calibrate);
139*4882a593Smuzhiyun 
mt76x02_mcu_cleanup(struct mt76x02_dev * dev)140*4882a593Smuzhiyun int mt76x02_mcu_cleanup(struct mt76x02_dev *dev)
141*4882a593Smuzhiyun {
142*4882a593Smuzhiyun 	struct sk_buff *skb;
143*4882a593Smuzhiyun 
144*4882a593Smuzhiyun 	mt76_wr(dev, MT_MCU_INT_LEVEL, 1);
145*4882a593Smuzhiyun 	usleep_range(20000, 30000);
146*4882a593Smuzhiyun 
147*4882a593Smuzhiyun 	while ((skb = skb_dequeue(&dev->mt76.mcu.res_q)) != NULL)
148*4882a593Smuzhiyun 		dev_kfree_skb(skb);
149*4882a593Smuzhiyun 
150*4882a593Smuzhiyun 	return 0;
151*4882a593Smuzhiyun }
152*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(mt76x02_mcu_cleanup);
153*4882a593Smuzhiyun 
mt76x02_set_ethtool_fwver(struct mt76x02_dev * dev,const struct mt76x02_fw_header * h)154*4882a593Smuzhiyun void mt76x02_set_ethtool_fwver(struct mt76x02_dev *dev,
155*4882a593Smuzhiyun 			       const struct mt76x02_fw_header *h)
156*4882a593Smuzhiyun {
157*4882a593Smuzhiyun 	u16 bld = le16_to_cpu(h->build_ver);
158*4882a593Smuzhiyun 	u16 ver = le16_to_cpu(h->fw_ver);
159*4882a593Smuzhiyun 
160*4882a593Smuzhiyun 	snprintf(dev->mt76.hw->wiphy->fw_version,
161*4882a593Smuzhiyun 		 sizeof(dev->mt76.hw->wiphy->fw_version),
162*4882a593Smuzhiyun 		 "%d.%d.%02d-b%x",
163*4882a593Smuzhiyun 		 (ver >> 12) & 0xf, (ver >> 8) & 0xf, ver & 0xf, bld);
164*4882a593Smuzhiyun }
165*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(mt76x02_set_ethtool_fwver);
166