1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (C) 2014 Felix Fietkau <nbd@openwrt.org>
4*4882a593Smuzhiyun * Copyright (C) 2015 Jakub Kicinski <kubakici@wp.pl>
5*4882a593Smuzhiyun * Copyright (C) 2018 Stanislaw Gruszka <stf_xl@wp.pl>
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <linux/etherdevice.h>
9*4882a593Smuzhiyun #include "mt76x0.h"
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun static void
mt76x0_set_channel(struct mt76x02_dev * dev,struct cfg80211_chan_def * chandef)12*4882a593Smuzhiyun mt76x0_set_channel(struct mt76x02_dev *dev, struct cfg80211_chan_def *chandef)
13*4882a593Smuzhiyun {
14*4882a593Smuzhiyun cancel_delayed_work_sync(&dev->cal_work);
15*4882a593Smuzhiyun mt76x02_pre_tbtt_enable(dev, false);
16*4882a593Smuzhiyun if (mt76_is_mmio(&dev->mt76))
17*4882a593Smuzhiyun tasklet_disable(&dev->dfs_pd.dfs_tasklet);
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun mt76_set_channel(&dev->mphy);
20*4882a593Smuzhiyun mt76x0_phy_set_channel(dev, chandef);
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun mt76x02_mac_cc_reset(dev);
23*4882a593Smuzhiyun mt76x02_edcca_init(dev);
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun if (mt76_is_mmio(&dev->mt76)) {
26*4882a593Smuzhiyun mt76x02_dfs_init_params(dev);
27*4882a593Smuzhiyun tasklet_enable(&dev->dfs_pd.dfs_tasklet);
28*4882a593Smuzhiyun }
29*4882a593Smuzhiyun mt76x02_pre_tbtt_enable(dev, true);
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun mt76_txq_schedule_all(&dev->mphy);
32*4882a593Smuzhiyun }
33*4882a593Smuzhiyun
mt76x0_config(struct ieee80211_hw * hw,u32 changed)34*4882a593Smuzhiyun int mt76x0_config(struct ieee80211_hw *hw, u32 changed)
35*4882a593Smuzhiyun {
36*4882a593Smuzhiyun struct mt76x02_dev *dev = hw->priv;
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun mutex_lock(&dev->mt76.mutex);
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
41*4882a593Smuzhiyun ieee80211_stop_queues(hw);
42*4882a593Smuzhiyun mt76x0_set_channel(dev, &hw->conf.chandef);
43*4882a593Smuzhiyun ieee80211_wake_queues(hw);
44*4882a593Smuzhiyun }
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun if (changed & IEEE80211_CONF_CHANGE_POWER) {
47*4882a593Smuzhiyun dev->txpower_conf = hw->conf.power_level * 2;
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun if (test_bit(MT76_STATE_RUNNING, &dev->mphy.state))
50*4882a593Smuzhiyun mt76x0_phy_set_txpower(dev);
51*4882a593Smuzhiyun }
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
54*4882a593Smuzhiyun if (!(hw->conf.flags & IEEE80211_CONF_MONITOR))
55*4882a593Smuzhiyun dev->mt76.rxfilter |= MT_RX_FILTR_CFG_PROMISC;
56*4882a593Smuzhiyun else
57*4882a593Smuzhiyun dev->mt76.rxfilter &= ~MT_RX_FILTR_CFG_PROMISC;
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun mt76_wr(dev, MT_RX_FILTR_CFG, dev->mt76.rxfilter);
60*4882a593Smuzhiyun }
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun mutex_unlock(&dev->mt76.mutex);
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun return 0;
65*4882a593Smuzhiyun }
66*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(mt76x0_config);
67