xref: /OK3568_Linux_fs/kernel/drivers/net/wireless/mediatek/mt76/mt7615/main.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: ISC
2*4882a593Smuzhiyun /* Copyright (C) 2019 MediaTek Inc.
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * Author: Roy Luo <royluo@google.com>
5*4882a593Smuzhiyun  *         Ryder Lee <ryder.lee@mediatek.com>
6*4882a593Smuzhiyun  *         Felix Fietkau <nbd@nbd.name>
7*4882a593Smuzhiyun  *         Lorenzo Bianconi <lorenzo@kernel.org>
8*4882a593Smuzhiyun  */
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #include <linux/etherdevice.h>
11*4882a593Smuzhiyun #include <linux/module.h>
12*4882a593Smuzhiyun #include "mt7615.h"
13*4882a593Smuzhiyun #include "mcu.h"
14*4882a593Smuzhiyun 
mt7615_dev_running(struct mt7615_dev * dev)15*4882a593Smuzhiyun static bool mt7615_dev_running(struct mt7615_dev *dev)
16*4882a593Smuzhiyun {
17*4882a593Smuzhiyun 	struct mt7615_phy *phy;
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun 	if (test_bit(MT76_STATE_RUNNING, &dev->mphy.state))
20*4882a593Smuzhiyun 		return true;
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun 	phy = mt7615_ext_phy(dev);
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun 	return phy && test_bit(MT76_STATE_RUNNING, &phy->mt76->state);
25*4882a593Smuzhiyun }
26*4882a593Smuzhiyun 
mt7615_free_pending_tx_skbs(struct mt7615_dev * dev,struct mt7615_sta * msta)27*4882a593Smuzhiyun static void mt7615_free_pending_tx_skbs(struct mt7615_dev *dev,
28*4882a593Smuzhiyun 					struct mt7615_sta *msta)
29*4882a593Smuzhiyun {
30*4882a593Smuzhiyun 	int i;
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun 	spin_lock_bh(&dev->pm.txq_lock);
33*4882a593Smuzhiyun 	for (i = 0; i < IEEE80211_NUM_ACS; i++) {
34*4882a593Smuzhiyun 		if (msta && dev->pm.tx_q[i].msta != msta)
35*4882a593Smuzhiyun 			continue;
36*4882a593Smuzhiyun 
37*4882a593Smuzhiyun 		dev_kfree_skb(dev->pm.tx_q[i].skb);
38*4882a593Smuzhiyun 		dev->pm.tx_q[i].skb = NULL;
39*4882a593Smuzhiyun 	}
40*4882a593Smuzhiyun 	spin_unlock_bh(&dev->pm.txq_lock);
41*4882a593Smuzhiyun }
42*4882a593Smuzhiyun 
mt7615_start(struct ieee80211_hw * hw)43*4882a593Smuzhiyun static int mt7615_start(struct ieee80211_hw *hw)
44*4882a593Smuzhiyun {
45*4882a593Smuzhiyun 	struct mt7615_dev *dev = mt7615_hw_dev(hw);
46*4882a593Smuzhiyun 	struct mt7615_phy *phy = mt7615_hw_phy(hw);
47*4882a593Smuzhiyun 	bool running;
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun 	if (!mt7615_wait_for_mcu_init(dev))
50*4882a593Smuzhiyun 		return -EIO;
51*4882a593Smuzhiyun 
52*4882a593Smuzhiyun 	mt7615_mutex_acquire(dev);
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun 	running = mt7615_dev_running(dev);
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun 	if (!running) {
57*4882a593Smuzhiyun 		mt7615_mcu_set_pm(dev, 0, 0);
58*4882a593Smuzhiyun 		mt7615_mcu_set_mac_enable(dev, 0, true);
59*4882a593Smuzhiyun 		mt7615_mac_enable_nf(dev, 0);
60*4882a593Smuzhiyun 	}
61*4882a593Smuzhiyun 
62*4882a593Smuzhiyun 	if (phy != &dev->phy) {
63*4882a593Smuzhiyun 		mt7615_mcu_set_pm(dev, 1, 0);
64*4882a593Smuzhiyun 		mt7615_mcu_set_mac_enable(dev, 1, true);
65*4882a593Smuzhiyun 		mt7615_mac_enable_nf(dev, 1);
66*4882a593Smuzhiyun 	}
67*4882a593Smuzhiyun 
68*4882a593Smuzhiyun 	mt7615_mcu_set_channel_domain(phy);
69*4882a593Smuzhiyun 	mt7615_mcu_set_chan_info(phy, MCU_EXT_CMD_SET_RX_PATH);
70*4882a593Smuzhiyun 
71*4882a593Smuzhiyun 	set_bit(MT76_STATE_RUNNING, &phy->mt76->state);
72*4882a593Smuzhiyun 
73*4882a593Smuzhiyun 	ieee80211_queue_delayed_work(hw, &phy->mac_work,
74*4882a593Smuzhiyun 				     MT7615_WATCHDOG_TIME);
75*4882a593Smuzhiyun 
76*4882a593Smuzhiyun 	if (!running)
77*4882a593Smuzhiyun 		mt7615_mac_reset_counters(dev);
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun 	mt7615_mutex_release(dev);
80*4882a593Smuzhiyun 
81*4882a593Smuzhiyun 	return 0;
82*4882a593Smuzhiyun }
83*4882a593Smuzhiyun 
mt7615_stop(struct ieee80211_hw * hw)84*4882a593Smuzhiyun static void mt7615_stop(struct ieee80211_hw *hw)
85*4882a593Smuzhiyun {
86*4882a593Smuzhiyun 	struct mt7615_dev *dev = mt7615_hw_dev(hw);
87*4882a593Smuzhiyun 	struct mt7615_phy *phy = mt7615_hw_phy(hw);
88*4882a593Smuzhiyun 
89*4882a593Smuzhiyun 	cancel_delayed_work_sync(&phy->mac_work);
90*4882a593Smuzhiyun 	del_timer_sync(&phy->roc_timer);
91*4882a593Smuzhiyun 	cancel_work_sync(&phy->roc_work);
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun 	cancel_delayed_work_sync(&dev->pm.ps_work);
94*4882a593Smuzhiyun 	cancel_work_sync(&dev->pm.wake_work);
95*4882a593Smuzhiyun 
96*4882a593Smuzhiyun 	mt7615_free_pending_tx_skbs(dev, NULL);
97*4882a593Smuzhiyun 
98*4882a593Smuzhiyun 	mt7615_mutex_acquire(dev);
99*4882a593Smuzhiyun 
100*4882a593Smuzhiyun 	mt76_testmode_reset(&dev->mt76, true);
101*4882a593Smuzhiyun 
102*4882a593Smuzhiyun 	clear_bit(MT76_STATE_RUNNING, &phy->mt76->state);
103*4882a593Smuzhiyun 	cancel_delayed_work_sync(&phy->scan_work);
104*4882a593Smuzhiyun 
105*4882a593Smuzhiyun 	if (phy != &dev->phy) {
106*4882a593Smuzhiyun 		mt7615_mcu_set_pm(dev, 1, 1);
107*4882a593Smuzhiyun 		mt7615_mcu_set_mac_enable(dev, 1, false);
108*4882a593Smuzhiyun 	}
109*4882a593Smuzhiyun 
110*4882a593Smuzhiyun 	if (!mt7615_dev_running(dev)) {
111*4882a593Smuzhiyun 		mt7615_mcu_set_pm(dev, 0, 1);
112*4882a593Smuzhiyun 		mt7615_mcu_set_mac_enable(dev, 0, false);
113*4882a593Smuzhiyun 	}
114*4882a593Smuzhiyun 
115*4882a593Smuzhiyun 	mt7615_mutex_release(dev);
116*4882a593Smuzhiyun }
117*4882a593Smuzhiyun 
get_omac_idx(enum nl80211_iftype type,u32 mask)118*4882a593Smuzhiyun static int get_omac_idx(enum nl80211_iftype type, u32 mask)
119*4882a593Smuzhiyun {
120*4882a593Smuzhiyun 	int i;
121*4882a593Smuzhiyun 
122*4882a593Smuzhiyun 	switch (type) {
123*4882a593Smuzhiyun 	case NL80211_IFTYPE_MONITOR:
124*4882a593Smuzhiyun 	case NL80211_IFTYPE_AP:
125*4882a593Smuzhiyun 	case NL80211_IFTYPE_MESH_POINT:
126*4882a593Smuzhiyun 	case NL80211_IFTYPE_ADHOC:
127*4882a593Smuzhiyun 		/* ap use hw bssid 0 and ext bssid */
128*4882a593Smuzhiyun 		if (~mask & BIT(HW_BSSID_0))
129*4882a593Smuzhiyun 			return HW_BSSID_0;
130*4882a593Smuzhiyun 
131*4882a593Smuzhiyun 		for (i = EXT_BSSID_1; i < EXT_BSSID_END; i++)
132*4882a593Smuzhiyun 			if (~mask & BIT(i))
133*4882a593Smuzhiyun 				return i;
134*4882a593Smuzhiyun 
135*4882a593Smuzhiyun 		break;
136*4882a593Smuzhiyun 	case NL80211_IFTYPE_STATION:
137*4882a593Smuzhiyun 		/* sta use hw bssid other than 0 */
138*4882a593Smuzhiyun 		for (i = HW_BSSID_1; i < HW_BSSID_MAX; i++)
139*4882a593Smuzhiyun 			if (~mask & BIT(i))
140*4882a593Smuzhiyun 				return i;
141*4882a593Smuzhiyun 
142*4882a593Smuzhiyun 		break;
143*4882a593Smuzhiyun 	default:
144*4882a593Smuzhiyun 		WARN_ON(1);
145*4882a593Smuzhiyun 		break;
146*4882a593Smuzhiyun 	}
147*4882a593Smuzhiyun 
148*4882a593Smuzhiyun 	return -1;
149*4882a593Smuzhiyun }
150*4882a593Smuzhiyun 
mt7615_add_interface(struct ieee80211_hw * hw,struct ieee80211_vif * vif)151*4882a593Smuzhiyun static int mt7615_add_interface(struct ieee80211_hw *hw,
152*4882a593Smuzhiyun 				struct ieee80211_vif *vif)
153*4882a593Smuzhiyun {
154*4882a593Smuzhiyun 	struct mt7615_vif *mvif = (struct mt7615_vif *)vif->drv_priv;
155*4882a593Smuzhiyun 	struct mt7615_dev *dev = mt7615_hw_dev(hw);
156*4882a593Smuzhiyun 	struct mt7615_phy *phy = mt7615_hw_phy(hw);
157*4882a593Smuzhiyun 	struct mt76_txq *mtxq;
158*4882a593Smuzhiyun 	bool ext_phy = phy != &dev->phy;
159*4882a593Smuzhiyun 	int idx, ret = 0;
160*4882a593Smuzhiyun 
161*4882a593Smuzhiyun 	mt7615_mutex_acquire(dev);
162*4882a593Smuzhiyun 
163*4882a593Smuzhiyun 	mt76_testmode_reset(&dev->mt76, true);
164*4882a593Smuzhiyun 
165*4882a593Smuzhiyun 	if (vif->type == NL80211_IFTYPE_MONITOR &&
166*4882a593Smuzhiyun 	    is_zero_ether_addr(vif->addr))
167*4882a593Smuzhiyun 		phy->monitor_vif = vif;
168*4882a593Smuzhiyun 
169*4882a593Smuzhiyun 	mvif->idx = ffs(~dev->mphy.vif_mask) - 1;
170*4882a593Smuzhiyun 	if (mvif->idx >= MT7615_MAX_INTERFACES) {
171*4882a593Smuzhiyun 		ret = -ENOSPC;
172*4882a593Smuzhiyun 		goto out;
173*4882a593Smuzhiyun 	}
174*4882a593Smuzhiyun 
175*4882a593Smuzhiyun 	idx = get_omac_idx(vif->type, dev->omac_mask);
176*4882a593Smuzhiyun 	if (idx < 0) {
177*4882a593Smuzhiyun 		ret = -ENOSPC;
178*4882a593Smuzhiyun 		goto out;
179*4882a593Smuzhiyun 	}
180*4882a593Smuzhiyun 	mvif->omac_idx = idx;
181*4882a593Smuzhiyun 
182*4882a593Smuzhiyun 	mvif->band_idx = ext_phy;
183*4882a593Smuzhiyun 	if (mt7615_ext_phy(dev))
184*4882a593Smuzhiyun 		mvif->wmm_idx = ext_phy * (MT7615_MAX_WMM_SETS / 2) +
185*4882a593Smuzhiyun 				mvif->idx % (MT7615_MAX_WMM_SETS / 2);
186*4882a593Smuzhiyun 	else
187*4882a593Smuzhiyun 		mvif->wmm_idx = mvif->idx % MT7615_MAX_WMM_SETS;
188*4882a593Smuzhiyun 
189*4882a593Smuzhiyun 	dev->mphy.vif_mask |= BIT(mvif->idx);
190*4882a593Smuzhiyun 	dev->omac_mask |= BIT(mvif->omac_idx);
191*4882a593Smuzhiyun 	phy->omac_mask |= BIT(mvif->omac_idx);
192*4882a593Smuzhiyun 
193*4882a593Smuzhiyun 	mt7615_mcu_set_dbdc(dev);
194*4882a593Smuzhiyun 
195*4882a593Smuzhiyun 	idx = MT7615_WTBL_RESERVED - mvif->idx;
196*4882a593Smuzhiyun 
197*4882a593Smuzhiyun 	INIT_LIST_HEAD(&mvif->sta.poll_list);
198*4882a593Smuzhiyun 	mvif->sta.wcid.idx = idx;
199*4882a593Smuzhiyun 	mvif->sta.wcid.ext_phy = mvif->band_idx;
200*4882a593Smuzhiyun 	mvif->sta.wcid.hw_key_idx = -1;
201*4882a593Smuzhiyun 	mt7615_mac_wtbl_update(dev, idx,
202*4882a593Smuzhiyun 			       MT_WTBL_UPDATE_ADM_COUNT_CLEAR);
203*4882a593Smuzhiyun 
204*4882a593Smuzhiyun 	rcu_assign_pointer(dev->mt76.wcid[idx], &mvif->sta.wcid);
205*4882a593Smuzhiyun 	if (vif->txq) {
206*4882a593Smuzhiyun 		mtxq = (struct mt76_txq *)vif->txq->drv_priv;
207*4882a593Smuzhiyun 		mtxq->wcid = &mvif->sta.wcid;
208*4882a593Smuzhiyun 	}
209*4882a593Smuzhiyun 
210*4882a593Smuzhiyun 	ret = mt7615_mcu_add_dev_info(dev, vif, true);
211*4882a593Smuzhiyun 	if (ret)
212*4882a593Smuzhiyun 		goto out;
213*4882a593Smuzhiyun 
214*4882a593Smuzhiyun 	if (dev->pm.enable) {
215*4882a593Smuzhiyun 		ret = mt7615_mcu_set_bss_pm(dev, vif, true);
216*4882a593Smuzhiyun 		if (ret)
217*4882a593Smuzhiyun 			goto out;
218*4882a593Smuzhiyun 
219*4882a593Smuzhiyun 		vif->driver_flags |= IEEE80211_VIF_BEACON_FILTER;
220*4882a593Smuzhiyun 		mt76_set(dev, MT_WF_RFCR(ext_phy),
221*4882a593Smuzhiyun 			 MT_WF_RFCR_DROP_OTHER_BEACON);
222*4882a593Smuzhiyun 	}
223*4882a593Smuzhiyun out:
224*4882a593Smuzhiyun 	mt7615_mutex_release(dev);
225*4882a593Smuzhiyun 
226*4882a593Smuzhiyun 	return ret;
227*4882a593Smuzhiyun }
228*4882a593Smuzhiyun 
mt7615_remove_interface(struct ieee80211_hw * hw,struct ieee80211_vif * vif)229*4882a593Smuzhiyun static void mt7615_remove_interface(struct ieee80211_hw *hw,
230*4882a593Smuzhiyun 				    struct ieee80211_vif *vif)
231*4882a593Smuzhiyun {
232*4882a593Smuzhiyun 	struct mt7615_vif *mvif = (struct mt7615_vif *)vif->drv_priv;
233*4882a593Smuzhiyun 	struct mt7615_sta *msta = &mvif->sta;
234*4882a593Smuzhiyun 	struct mt7615_dev *dev = mt7615_hw_dev(hw);
235*4882a593Smuzhiyun 	struct mt7615_phy *phy = mt7615_hw_phy(hw);
236*4882a593Smuzhiyun 	int idx = msta->wcid.idx;
237*4882a593Smuzhiyun 
238*4882a593Smuzhiyun 	/* TODO: disable beacon for the bss */
239*4882a593Smuzhiyun 
240*4882a593Smuzhiyun 	mt7615_mutex_acquire(dev);
241*4882a593Smuzhiyun 
242*4882a593Smuzhiyun 	mt76_testmode_reset(&dev->mt76, true);
243*4882a593Smuzhiyun 	if (vif == phy->monitor_vif)
244*4882a593Smuzhiyun 	    phy->monitor_vif = NULL;
245*4882a593Smuzhiyun 
246*4882a593Smuzhiyun 	mt7615_free_pending_tx_skbs(dev, msta);
247*4882a593Smuzhiyun 
248*4882a593Smuzhiyun 	if (dev->pm.enable) {
249*4882a593Smuzhiyun 		bool ext_phy = phy != &dev->phy;
250*4882a593Smuzhiyun 
251*4882a593Smuzhiyun 		mt7615_mcu_set_bss_pm(dev, vif, false);
252*4882a593Smuzhiyun 		mt76_clear(dev, MT_WF_RFCR(ext_phy),
253*4882a593Smuzhiyun 			   MT_WF_RFCR_DROP_OTHER_BEACON);
254*4882a593Smuzhiyun 	}
255*4882a593Smuzhiyun 	mt7615_mcu_add_dev_info(dev, vif, false);
256*4882a593Smuzhiyun 
257*4882a593Smuzhiyun 	rcu_assign_pointer(dev->mt76.wcid[idx], NULL);
258*4882a593Smuzhiyun 
259*4882a593Smuzhiyun 	dev->mphy.vif_mask &= ~BIT(mvif->idx);
260*4882a593Smuzhiyun 	dev->omac_mask &= ~BIT(mvif->omac_idx);
261*4882a593Smuzhiyun 	phy->omac_mask &= ~BIT(mvif->omac_idx);
262*4882a593Smuzhiyun 
263*4882a593Smuzhiyun 	mt7615_mutex_release(dev);
264*4882a593Smuzhiyun 
265*4882a593Smuzhiyun 	spin_lock_bh(&dev->sta_poll_lock);
266*4882a593Smuzhiyun 	if (!list_empty(&msta->poll_list))
267*4882a593Smuzhiyun 		list_del_init(&msta->poll_list);
268*4882a593Smuzhiyun 	spin_unlock_bh(&dev->sta_poll_lock);
269*4882a593Smuzhiyun }
270*4882a593Smuzhiyun 
mt7615_init_dfs_state(struct mt7615_phy * phy)271*4882a593Smuzhiyun static void mt7615_init_dfs_state(struct mt7615_phy *phy)
272*4882a593Smuzhiyun {
273*4882a593Smuzhiyun 	struct mt76_phy *mphy = phy->mt76;
274*4882a593Smuzhiyun 	struct ieee80211_hw *hw = mphy->hw;
275*4882a593Smuzhiyun 	struct cfg80211_chan_def *chandef = &hw->conf.chandef;
276*4882a593Smuzhiyun 
277*4882a593Smuzhiyun 	if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
278*4882a593Smuzhiyun 		return;
279*4882a593Smuzhiyun 
280*4882a593Smuzhiyun 	if (!(chandef->chan->flags & IEEE80211_CHAN_RADAR))
281*4882a593Smuzhiyun 		return;
282*4882a593Smuzhiyun 
283*4882a593Smuzhiyun 	if (mphy->chandef.chan->center_freq == chandef->chan->center_freq &&
284*4882a593Smuzhiyun 	    mphy->chandef.width == chandef->width)
285*4882a593Smuzhiyun 		return;
286*4882a593Smuzhiyun 
287*4882a593Smuzhiyun 	phy->dfs_state = -1;
288*4882a593Smuzhiyun }
289*4882a593Smuzhiyun 
mt7615_set_channel(struct mt7615_phy * phy)290*4882a593Smuzhiyun int mt7615_set_channel(struct mt7615_phy *phy)
291*4882a593Smuzhiyun {
292*4882a593Smuzhiyun 	struct mt7615_dev *dev = phy->dev;
293*4882a593Smuzhiyun 	bool ext_phy = phy != &dev->phy;
294*4882a593Smuzhiyun 	int ret;
295*4882a593Smuzhiyun 
296*4882a593Smuzhiyun 	cancel_delayed_work_sync(&phy->mac_work);
297*4882a593Smuzhiyun 
298*4882a593Smuzhiyun 	mt7615_mutex_acquire(dev);
299*4882a593Smuzhiyun 
300*4882a593Smuzhiyun 	set_bit(MT76_RESET, &phy->mt76->state);
301*4882a593Smuzhiyun 
302*4882a593Smuzhiyun 	mt7615_init_dfs_state(phy);
303*4882a593Smuzhiyun 	mt76_set_channel(phy->mt76);
304*4882a593Smuzhiyun 
305*4882a593Smuzhiyun 	if (is_mt7615(&dev->mt76) && dev->flash_eeprom) {
306*4882a593Smuzhiyun 		mt7615_mcu_apply_rx_dcoc(phy);
307*4882a593Smuzhiyun 		mt7615_mcu_apply_tx_dpd(phy);
308*4882a593Smuzhiyun 	}
309*4882a593Smuzhiyun 
310*4882a593Smuzhiyun 	ret = mt7615_mcu_set_chan_info(phy, MCU_EXT_CMD_CHANNEL_SWITCH);
311*4882a593Smuzhiyun 	if (ret)
312*4882a593Smuzhiyun 		goto out;
313*4882a593Smuzhiyun 
314*4882a593Smuzhiyun 	mt7615_mac_set_timing(phy);
315*4882a593Smuzhiyun 	ret = mt7615_dfs_init_radar_detector(phy);
316*4882a593Smuzhiyun 	mt7615_mac_cca_stats_reset(phy);
317*4882a593Smuzhiyun 	mt7615_mcu_set_sku_en(phy, !mt76_testmode_enabled(&dev->mt76));
318*4882a593Smuzhiyun 
319*4882a593Smuzhiyun 	mt7615_mac_reset_counters(dev);
320*4882a593Smuzhiyun 	phy->noise = 0;
321*4882a593Smuzhiyun 	phy->chfreq = mt76_rr(dev, MT_CHFREQ(ext_phy));
322*4882a593Smuzhiyun 
323*4882a593Smuzhiyun out:
324*4882a593Smuzhiyun 	clear_bit(MT76_RESET, &phy->mt76->state);
325*4882a593Smuzhiyun 
326*4882a593Smuzhiyun 	mt7615_mutex_release(dev);
327*4882a593Smuzhiyun 
328*4882a593Smuzhiyun 	mt76_txq_schedule_all(phy->mt76);
329*4882a593Smuzhiyun 
330*4882a593Smuzhiyun 	if (!mt76_testmode_enabled(&dev->mt76))
331*4882a593Smuzhiyun 		ieee80211_queue_delayed_work(phy->mt76->hw, &phy->mac_work,
332*4882a593Smuzhiyun 					     MT7615_WATCHDOG_TIME);
333*4882a593Smuzhiyun 
334*4882a593Smuzhiyun 	return ret;
335*4882a593Smuzhiyun }
336*4882a593Smuzhiyun 
337*4882a593Smuzhiyun static int
mt7615_queue_key_update(struct mt7615_dev * dev,enum set_key_cmd cmd,struct mt7615_sta * msta,struct ieee80211_key_conf * key)338*4882a593Smuzhiyun mt7615_queue_key_update(struct mt7615_dev *dev, enum set_key_cmd cmd,
339*4882a593Smuzhiyun 			struct mt7615_sta *msta,
340*4882a593Smuzhiyun 			struct ieee80211_key_conf *key)
341*4882a593Smuzhiyun {
342*4882a593Smuzhiyun 	struct mt7615_wtbl_desc *wd;
343*4882a593Smuzhiyun 
344*4882a593Smuzhiyun 	wd = kzalloc(sizeof(*wd), GFP_KERNEL);
345*4882a593Smuzhiyun 	if (!wd)
346*4882a593Smuzhiyun 		return -ENOMEM;
347*4882a593Smuzhiyun 
348*4882a593Smuzhiyun 	wd->type = MT7615_WTBL_KEY_DESC;
349*4882a593Smuzhiyun 	wd->sta = msta;
350*4882a593Smuzhiyun 
351*4882a593Smuzhiyun 	wd->key.key = kmemdup(key->key, key->keylen, GFP_KERNEL);
352*4882a593Smuzhiyun 	if (!wd->key.key) {
353*4882a593Smuzhiyun 		kfree(wd);
354*4882a593Smuzhiyun 		return -ENOMEM;
355*4882a593Smuzhiyun 	}
356*4882a593Smuzhiyun 	wd->key.cipher = key->cipher;
357*4882a593Smuzhiyun 	wd->key.keyidx = key->keyidx;
358*4882a593Smuzhiyun 	wd->key.keylen = key->keylen;
359*4882a593Smuzhiyun 	wd->key.cmd = cmd;
360*4882a593Smuzhiyun 
361*4882a593Smuzhiyun 	spin_lock_bh(&dev->mt76.lock);
362*4882a593Smuzhiyun 	list_add_tail(&wd->node, &dev->wd_head);
363*4882a593Smuzhiyun 	spin_unlock_bh(&dev->mt76.lock);
364*4882a593Smuzhiyun 
365*4882a593Smuzhiyun 	queue_work(dev->mt76.wq, &dev->wtbl_work);
366*4882a593Smuzhiyun 
367*4882a593Smuzhiyun 	return 0;
368*4882a593Smuzhiyun }
369*4882a593Smuzhiyun 
mt7615_set_key(struct ieee80211_hw * hw,enum set_key_cmd cmd,struct ieee80211_vif * vif,struct ieee80211_sta * sta,struct ieee80211_key_conf * key)370*4882a593Smuzhiyun static int mt7615_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
371*4882a593Smuzhiyun 			  struct ieee80211_vif *vif, struct ieee80211_sta *sta,
372*4882a593Smuzhiyun 			  struct ieee80211_key_conf *key)
373*4882a593Smuzhiyun {
374*4882a593Smuzhiyun 	struct mt7615_dev *dev = mt7615_hw_dev(hw);
375*4882a593Smuzhiyun 	struct mt7615_vif *mvif = (struct mt7615_vif *)vif->drv_priv;
376*4882a593Smuzhiyun 	struct mt7615_sta *msta = sta ? (struct mt7615_sta *)sta->drv_priv :
377*4882a593Smuzhiyun 				  &mvif->sta;
378*4882a593Smuzhiyun 	struct mt76_wcid *wcid = &msta->wcid;
379*4882a593Smuzhiyun 	int idx = key->keyidx, err;
380*4882a593Smuzhiyun 
381*4882a593Smuzhiyun 	/* The hardware does not support per-STA RX GTK, fallback
382*4882a593Smuzhiyun 	 * to software mode for these.
383*4882a593Smuzhiyun 	 */
384*4882a593Smuzhiyun 	if ((vif->type == NL80211_IFTYPE_ADHOC ||
385*4882a593Smuzhiyun 	     vif->type == NL80211_IFTYPE_MESH_POINT) &&
386*4882a593Smuzhiyun 	    (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
387*4882a593Smuzhiyun 	     key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
388*4882a593Smuzhiyun 	    !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE))
389*4882a593Smuzhiyun 		return -EOPNOTSUPP;
390*4882a593Smuzhiyun 
391*4882a593Smuzhiyun 	/* fall back to sw encryption for unsupported ciphers */
392*4882a593Smuzhiyun 	switch (key->cipher) {
393*4882a593Smuzhiyun 	case WLAN_CIPHER_SUITE_AES_CMAC:
394*4882a593Smuzhiyun 		key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIE;
395*4882a593Smuzhiyun 		break;
396*4882a593Smuzhiyun 	case WLAN_CIPHER_SUITE_WEP40:
397*4882a593Smuzhiyun 	case WLAN_CIPHER_SUITE_WEP104:
398*4882a593Smuzhiyun 	case WLAN_CIPHER_SUITE_TKIP:
399*4882a593Smuzhiyun 	case WLAN_CIPHER_SUITE_CCMP:
400*4882a593Smuzhiyun 	case WLAN_CIPHER_SUITE_CCMP_256:
401*4882a593Smuzhiyun 	case WLAN_CIPHER_SUITE_GCMP:
402*4882a593Smuzhiyun 	case WLAN_CIPHER_SUITE_GCMP_256:
403*4882a593Smuzhiyun 	case WLAN_CIPHER_SUITE_SMS4:
404*4882a593Smuzhiyun 		break;
405*4882a593Smuzhiyun 	default:
406*4882a593Smuzhiyun 		return -EOPNOTSUPP;
407*4882a593Smuzhiyun 	}
408*4882a593Smuzhiyun 
409*4882a593Smuzhiyun 	mt7615_mutex_acquire(dev);
410*4882a593Smuzhiyun 
411*4882a593Smuzhiyun 	if (cmd == SET_KEY) {
412*4882a593Smuzhiyun 		key->hw_key_idx = wcid->idx;
413*4882a593Smuzhiyun 		wcid->hw_key_idx = idx;
414*4882a593Smuzhiyun 	} else if (idx == wcid->hw_key_idx) {
415*4882a593Smuzhiyun 		wcid->hw_key_idx = -1;
416*4882a593Smuzhiyun 	}
417*4882a593Smuzhiyun 	mt76_wcid_key_setup(&dev->mt76, wcid,
418*4882a593Smuzhiyun 			    cmd == SET_KEY ? key : NULL);
419*4882a593Smuzhiyun 
420*4882a593Smuzhiyun 	if (mt76_is_mmio(&dev->mt76))
421*4882a593Smuzhiyun 		err = mt7615_mac_wtbl_set_key(dev, wcid, key, cmd);
422*4882a593Smuzhiyun 	else
423*4882a593Smuzhiyun 		err = mt7615_queue_key_update(dev, cmd, msta, key);
424*4882a593Smuzhiyun 
425*4882a593Smuzhiyun 	mt7615_mutex_release(dev);
426*4882a593Smuzhiyun 
427*4882a593Smuzhiyun 	return err;
428*4882a593Smuzhiyun }
429*4882a593Smuzhiyun 
mt7615_config(struct ieee80211_hw * hw,u32 changed)430*4882a593Smuzhiyun static int mt7615_config(struct ieee80211_hw *hw, u32 changed)
431*4882a593Smuzhiyun {
432*4882a593Smuzhiyun 	struct mt7615_dev *dev = mt7615_hw_dev(hw);
433*4882a593Smuzhiyun 	struct mt7615_phy *phy = mt7615_hw_phy(hw);
434*4882a593Smuzhiyun 	bool band = phy != &dev->phy;
435*4882a593Smuzhiyun 	int ret = 0;
436*4882a593Smuzhiyun 
437*4882a593Smuzhiyun 	if (changed & (IEEE80211_CONF_CHANGE_CHANNEL |
438*4882a593Smuzhiyun 		       IEEE80211_CONF_CHANGE_POWER)) {
439*4882a593Smuzhiyun #ifdef CONFIG_NL80211_TESTMODE
440*4882a593Smuzhiyun 		if (dev->mt76.test.state != MT76_TM_STATE_OFF) {
441*4882a593Smuzhiyun 			mt7615_mutex_acquire(dev);
442*4882a593Smuzhiyun 			mt76_testmode_reset(&dev->mt76, false);
443*4882a593Smuzhiyun 			mt7615_mutex_release(dev);
444*4882a593Smuzhiyun 		}
445*4882a593Smuzhiyun #endif
446*4882a593Smuzhiyun 		ieee80211_stop_queues(hw);
447*4882a593Smuzhiyun 		ret = mt7615_set_channel(phy);
448*4882a593Smuzhiyun 		ieee80211_wake_queues(hw);
449*4882a593Smuzhiyun 	}
450*4882a593Smuzhiyun 
451*4882a593Smuzhiyun 	mt7615_mutex_acquire(dev);
452*4882a593Smuzhiyun 
453*4882a593Smuzhiyun 	if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
454*4882a593Smuzhiyun 		mt76_testmode_reset(&dev->mt76, true);
455*4882a593Smuzhiyun 
456*4882a593Smuzhiyun 		if (!(hw->conf.flags & IEEE80211_CONF_MONITOR))
457*4882a593Smuzhiyun 			phy->rxfilter |= MT_WF_RFCR_DROP_OTHER_UC;
458*4882a593Smuzhiyun 		else
459*4882a593Smuzhiyun 			phy->rxfilter &= ~MT_WF_RFCR_DROP_OTHER_UC;
460*4882a593Smuzhiyun 
461*4882a593Smuzhiyun 		mt76_wr(dev, MT_WF_RFCR(band), phy->rxfilter);
462*4882a593Smuzhiyun 	}
463*4882a593Smuzhiyun 
464*4882a593Smuzhiyun 	mt7615_mutex_release(dev);
465*4882a593Smuzhiyun 
466*4882a593Smuzhiyun 	return ret;
467*4882a593Smuzhiyun }
468*4882a593Smuzhiyun 
469*4882a593Smuzhiyun static int
mt7615_conf_tx(struct ieee80211_hw * hw,struct ieee80211_vif * vif,u16 queue,const struct ieee80211_tx_queue_params * params)470*4882a593Smuzhiyun mt7615_conf_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif, u16 queue,
471*4882a593Smuzhiyun 	       const struct ieee80211_tx_queue_params *params)
472*4882a593Smuzhiyun {
473*4882a593Smuzhiyun 	struct mt7615_vif *mvif = (struct mt7615_vif *)vif->drv_priv;
474*4882a593Smuzhiyun 	struct mt7615_dev *dev = mt7615_hw_dev(hw);
475*4882a593Smuzhiyun 	int err;
476*4882a593Smuzhiyun 
477*4882a593Smuzhiyun 	mt7615_mutex_acquire(dev);
478*4882a593Smuzhiyun 
479*4882a593Smuzhiyun 	queue = mt7615_lmac_mapping(dev, queue);
480*4882a593Smuzhiyun 	queue += mvif->wmm_idx * MT7615_MAX_WMM_SETS;
481*4882a593Smuzhiyun 	err = mt7615_mcu_set_wmm(dev, queue, params);
482*4882a593Smuzhiyun 
483*4882a593Smuzhiyun 	mt7615_mutex_release(dev);
484*4882a593Smuzhiyun 
485*4882a593Smuzhiyun 	return err;
486*4882a593Smuzhiyun }
487*4882a593Smuzhiyun 
mt7615_configure_filter(struct ieee80211_hw * hw,unsigned int changed_flags,unsigned int * total_flags,u64 multicast)488*4882a593Smuzhiyun static void mt7615_configure_filter(struct ieee80211_hw *hw,
489*4882a593Smuzhiyun 				    unsigned int changed_flags,
490*4882a593Smuzhiyun 				    unsigned int *total_flags,
491*4882a593Smuzhiyun 				    u64 multicast)
492*4882a593Smuzhiyun {
493*4882a593Smuzhiyun 	struct mt7615_dev *dev = mt7615_hw_dev(hw);
494*4882a593Smuzhiyun 	struct mt7615_phy *phy = mt7615_hw_phy(hw);
495*4882a593Smuzhiyun 	bool band = phy != &dev->phy;
496*4882a593Smuzhiyun 
497*4882a593Smuzhiyun 	u32 ctl_flags = MT_WF_RFCR1_DROP_ACK |
498*4882a593Smuzhiyun 			MT_WF_RFCR1_DROP_BF_POLL |
499*4882a593Smuzhiyun 			MT_WF_RFCR1_DROP_BA |
500*4882a593Smuzhiyun 			MT_WF_RFCR1_DROP_CFEND |
501*4882a593Smuzhiyun 			MT_WF_RFCR1_DROP_CFACK;
502*4882a593Smuzhiyun 	u32 flags = 0;
503*4882a593Smuzhiyun 
504*4882a593Smuzhiyun 	mt7615_mutex_acquire(dev);
505*4882a593Smuzhiyun 
506*4882a593Smuzhiyun #define MT76_FILTER(_flag, _hw) do { \
507*4882a593Smuzhiyun 		flags |= *total_flags & FIF_##_flag;			\
508*4882a593Smuzhiyun 		phy->rxfilter &= ~(_hw);				\
509*4882a593Smuzhiyun 		if (!mt76_testmode_enabled(&dev->mt76))			\
510*4882a593Smuzhiyun 			phy->rxfilter |= !(flags & FIF_##_flag) * (_hw);\
511*4882a593Smuzhiyun 	} while (0)
512*4882a593Smuzhiyun 
513*4882a593Smuzhiyun 	phy->rxfilter &= ~(MT_WF_RFCR_DROP_OTHER_BSS |
514*4882a593Smuzhiyun 			   MT_WF_RFCR_DROP_OTHER_BEACON |
515*4882a593Smuzhiyun 			   MT_WF_RFCR_DROP_FRAME_REPORT |
516*4882a593Smuzhiyun 			   MT_WF_RFCR_DROP_PROBEREQ |
517*4882a593Smuzhiyun 			   MT_WF_RFCR_DROP_MCAST_FILTERED |
518*4882a593Smuzhiyun 			   MT_WF_RFCR_DROP_MCAST |
519*4882a593Smuzhiyun 			   MT_WF_RFCR_DROP_BCAST |
520*4882a593Smuzhiyun 			   MT_WF_RFCR_DROP_DUPLICATE |
521*4882a593Smuzhiyun 			   MT_WF_RFCR_DROP_A2_BSSID |
522*4882a593Smuzhiyun 			   MT_WF_RFCR_DROP_UNWANTED_CTL |
523*4882a593Smuzhiyun 			   MT_WF_RFCR_DROP_STBC_MULTI);
524*4882a593Smuzhiyun 
525*4882a593Smuzhiyun 	MT76_FILTER(OTHER_BSS, MT_WF_RFCR_DROP_OTHER_TIM |
526*4882a593Smuzhiyun 			       MT_WF_RFCR_DROP_A3_MAC |
527*4882a593Smuzhiyun 			       MT_WF_RFCR_DROP_A3_BSSID);
528*4882a593Smuzhiyun 
529*4882a593Smuzhiyun 	MT76_FILTER(FCSFAIL, MT_WF_RFCR_DROP_FCSFAIL);
530*4882a593Smuzhiyun 
531*4882a593Smuzhiyun 	MT76_FILTER(CONTROL, MT_WF_RFCR_DROP_CTS |
532*4882a593Smuzhiyun 			     MT_WF_RFCR_DROP_RTS |
533*4882a593Smuzhiyun 			     MT_WF_RFCR_DROP_CTL_RSV |
534*4882a593Smuzhiyun 			     MT_WF_RFCR_DROP_NDPA);
535*4882a593Smuzhiyun 
536*4882a593Smuzhiyun 	*total_flags = flags;
537*4882a593Smuzhiyun 	mt76_wr(dev, MT_WF_RFCR(band), phy->rxfilter);
538*4882a593Smuzhiyun 
539*4882a593Smuzhiyun 	if (*total_flags & FIF_CONTROL)
540*4882a593Smuzhiyun 		mt76_clear(dev, MT_WF_RFCR1(band), ctl_flags);
541*4882a593Smuzhiyun 	else
542*4882a593Smuzhiyun 		mt76_set(dev, MT_WF_RFCR1(band), ctl_flags);
543*4882a593Smuzhiyun 
544*4882a593Smuzhiyun 	mt7615_mutex_release(dev);
545*4882a593Smuzhiyun }
546*4882a593Smuzhiyun 
mt7615_bss_info_changed(struct ieee80211_hw * hw,struct ieee80211_vif * vif,struct ieee80211_bss_conf * info,u32 changed)547*4882a593Smuzhiyun static void mt7615_bss_info_changed(struct ieee80211_hw *hw,
548*4882a593Smuzhiyun 				    struct ieee80211_vif *vif,
549*4882a593Smuzhiyun 				    struct ieee80211_bss_conf *info,
550*4882a593Smuzhiyun 				    u32 changed)
551*4882a593Smuzhiyun {
552*4882a593Smuzhiyun 	struct mt7615_dev *dev = mt7615_hw_dev(hw);
553*4882a593Smuzhiyun 	struct mt7615_phy *phy = mt7615_hw_phy(hw);
554*4882a593Smuzhiyun 
555*4882a593Smuzhiyun 	mt7615_mutex_acquire(dev);
556*4882a593Smuzhiyun 
557*4882a593Smuzhiyun 	if (changed & BSS_CHANGED_ERP_SLOT) {
558*4882a593Smuzhiyun 		int slottime = info->use_short_slot ? 9 : 20;
559*4882a593Smuzhiyun 
560*4882a593Smuzhiyun 		if (slottime != phy->slottime) {
561*4882a593Smuzhiyun 			phy->slottime = slottime;
562*4882a593Smuzhiyun 			mt7615_mac_set_timing(phy);
563*4882a593Smuzhiyun 		}
564*4882a593Smuzhiyun 	}
565*4882a593Smuzhiyun 
566*4882a593Smuzhiyun 	if (changed & BSS_CHANGED_BEACON_ENABLED) {
567*4882a593Smuzhiyun 		mt7615_mcu_add_bss_info(phy, vif, NULL, info->enable_beacon);
568*4882a593Smuzhiyun 		mt7615_mcu_sta_add(dev, vif, NULL, info->enable_beacon);
569*4882a593Smuzhiyun 
570*4882a593Smuzhiyun 		if (vif->p2p && info->enable_beacon)
571*4882a593Smuzhiyun 			mt7615_mcu_set_p2p_oppps(hw, vif);
572*4882a593Smuzhiyun 	}
573*4882a593Smuzhiyun 
574*4882a593Smuzhiyun 	if (changed & (BSS_CHANGED_BEACON |
575*4882a593Smuzhiyun 		       BSS_CHANGED_BEACON_ENABLED))
576*4882a593Smuzhiyun 		mt7615_mcu_add_beacon(dev, hw, vif, info->enable_beacon);
577*4882a593Smuzhiyun 
578*4882a593Smuzhiyun 	if (changed & BSS_CHANGED_PS)
579*4882a593Smuzhiyun 		mt7615_mcu_set_vif_ps(dev, vif);
580*4882a593Smuzhiyun 
581*4882a593Smuzhiyun 	if (changed & BSS_CHANGED_ARP_FILTER)
582*4882a593Smuzhiyun 		mt7615_mcu_update_arp_filter(hw, vif, info);
583*4882a593Smuzhiyun 
584*4882a593Smuzhiyun 	mt7615_mutex_release(dev);
585*4882a593Smuzhiyun }
586*4882a593Smuzhiyun 
587*4882a593Smuzhiyun static void
mt7615_channel_switch_beacon(struct ieee80211_hw * hw,struct ieee80211_vif * vif,struct cfg80211_chan_def * chandef)588*4882a593Smuzhiyun mt7615_channel_switch_beacon(struct ieee80211_hw *hw,
589*4882a593Smuzhiyun 			     struct ieee80211_vif *vif,
590*4882a593Smuzhiyun 			     struct cfg80211_chan_def *chandef)
591*4882a593Smuzhiyun {
592*4882a593Smuzhiyun 	struct mt7615_dev *dev = mt7615_hw_dev(hw);
593*4882a593Smuzhiyun 
594*4882a593Smuzhiyun 	mt7615_mutex_acquire(dev);
595*4882a593Smuzhiyun 	mt7615_mcu_add_beacon(dev, hw, vif, true);
596*4882a593Smuzhiyun 	mt7615_mutex_release(dev);
597*4882a593Smuzhiyun }
598*4882a593Smuzhiyun 
mt7615_mac_sta_add(struct mt76_dev * mdev,struct ieee80211_vif * vif,struct ieee80211_sta * sta)599*4882a593Smuzhiyun int mt7615_mac_sta_add(struct mt76_dev *mdev, struct ieee80211_vif *vif,
600*4882a593Smuzhiyun 		       struct ieee80211_sta *sta)
601*4882a593Smuzhiyun {
602*4882a593Smuzhiyun 	struct mt7615_dev *dev = container_of(mdev, struct mt7615_dev, mt76);
603*4882a593Smuzhiyun 	struct mt7615_sta *msta = (struct mt7615_sta *)sta->drv_priv;
604*4882a593Smuzhiyun 	struct mt7615_vif *mvif = (struct mt7615_vif *)vif->drv_priv;
605*4882a593Smuzhiyun 	int idx, err;
606*4882a593Smuzhiyun 
607*4882a593Smuzhiyun 	idx = mt76_wcid_alloc(dev->mt76.wcid_mask, MT7615_WTBL_STA - 1);
608*4882a593Smuzhiyun 	if (idx < 0)
609*4882a593Smuzhiyun 		return -ENOSPC;
610*4882a593Smuzhiyun 
611*4882a593Smuzhiyun 	INIT_LIST_HEAD(&msta->poll_list);
612*4882a593Smuzhiyun 	msta->vif = mvif;
613*4882a593Smuzhiyun 	msta->wcid.sta = 1;
614*4882a593Smuzhiyun 	msta->wcid.idx = idx;
615*4882a593Smuzhiyun 	msta->wcid.ext_phy = mvif->band_idx;
616*4882a593Smuzhiyun 
617*4882a593Smuzhiyun 	err = mt7615_pm_wake(dev);
618*4882a593Smuzhiyun 	if (err)
619*4882a593Smuzhiyun 		return err;
620*4882a593Smuzhiyun 
621*4882a593Smuzhiyun 	if (vif->type == NL80211_IFTYPE_STATION && !sta->tdls) {
622*4882a593Smuzhiyun 		struct mt7615_phy *phy;
623*4882a593Smuzhiyun 
624*4882a593Smuzhiyun 		phy = mvif->band_idx ? mt7615_ext_phy(dev) : &dev->phy;
625*4882a593Smuzhiyun 		mt7615_mcu_add_bss_info(phy, vif, sta, true);
626*4882a593Smuzhiyun 	}
627*4882a593Smuzhiyun 	mt7615_mac_wtbl_update(dev, idx,
628*4882a593Smuzhiyun 			       MT_WTBL_UPDATE_ADM_COUNT_CLEAR);
629*4882a593Smuzhiyun 	mt7615_mcu_sta_add(dev, vif, sta, true);
630*4882a593Smuzhiyun 
631*4882a593Smuzhiyun 	mt7615_pm_power_save_sched(dev);
632*4882a593Smuzhiyun 
633*4882a593Smuzhiyun 	return 0;
634*4882a593Smuzhiyun }
635*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(mt7615_mac_sta_add);
636*4882a593Smuzhiyun 
mt7615_mac_sta_remove(struct mt76_dev * mdev,struct ieee80211_vif * vif,struct ieee80211_sta * sta)637*4882a593Smuzhiyun void mt7615_mac_sta_remove(struct mt76_dev *mdev, struct ieee80211_vif *vif,
638*4882a593Smuzhiyun 			   struct ieee80211_sta *sta)
639*4882a593Smuzhiyun {
640*4882a593Smuzhiyun 	struct mt7615_dev *dev = container_of(mdev, struct mt7615_dev, mt76);
641*4882a593Smuzhiyun 	struct mt7615_sta *msta = (struct mt7615_sta *)sta->drv_priv;
642*4882a593Smuzhiyun 
643*4882a593Smuzhiyun 	mt7615_free_pending_tx_skbs(dev, msta);
644*4882a593Smuzhiyun 	mt7615_pm_wake(dev);
645*4882a593Smuzhiyun 
646*4882a593Smuzhiyun 	mt7615_mcu_sta_add(dev, vif, sta, false);
647*4882a593Smuzhiyun 	mt7615_mac_wtbl_update(dev, msta->wcid.idx,
648*4882a593Smuzhiyun 			       MT_WTBL_UPDATE_ADM_COUNT_CLEAR);
649*4882a593Smuzhiyun 	if (vif->type == NL80211_IFTYPE_STATION && !sta->tdls) {
650*4882a593Smuzhiyun 		struct mt7615_vif *mvif = (struct mt7615_vif *)vif->drv_priv;
651*4882a593Smuzhiyun 		struct mt7615_phy *phy;
652*4882a593Smuzhiyun 
653*4882a593Smuzhiyun 		phy = mvif->band_idx ? mt7615_ext_phy(dev) : &dev->phy;
654*4882a593Smuzhiyun 		mt7615_mcu_add_bss_info(phy, vif, sta, false);
655*4882a593Smuzhiyun 	}
656*4882a593Smuzhiyun 
657*4882a593Smuzhiyun 	spin_lock_bh(&dev->sta_poll_lock);
658*4882a593Smuzhiyun 	if (!list_empty(&msta->poll_list))
659*4882a593Smuzhiyun 		list_del_init(&msta->poll_list);
660*4882a593Smuzhiyun 	spin_unlock_bh(&dev->sta_poll_lock);
661*4882a593Smuzhiyun 
662*4882a593Smuzhiyun 	mt7615_pm_power_save_sched(dev);
663*4882a593Smuzhiyun }
664*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(mt7615_mac_sta_remove);
665*4882a593Smuzhiyun 
mt7615_sta_rate_tbl_update(struct ieee80211_hw * hw,struct ieee80211_vif * vif,struct ieee80211_sta * sta)666*4882a593Smuzhiyun static void mt7615_sta_rate_tbl_update(struct ieee80211_hw *hw,
667*4882a593Smuzhiyun 				       struct ieee80211_vif *vif,
668*4882a593Smuzhiyun 				       struct ieee80211_sta *sta)
669*4882a593Smuzhiyun {
670*4882a593Smuzhiyun 	struct mt7615_dev *dev = mt7615_hw_dev(hw);
671*4882a593Smuzhiyun 	struct mt7615_phy *phy = mt7615_hw_phy(hw);
672*4882a593Smuzhiyun 	struct mt7615_sta *msta = (struct mt7615_sta *)sta->drv_priv;
673*4882a593Smuzhiyun 	struct ieee80211_sta_rates *sta_rates = rcu_dereference(sta->rates);
674*4882a593Smuzhiyun 	int i;
675*4882a593Smuzhiyun 
676*4882a593Smuzhiyun 	if (!sta_rates)
677*4882a593Smuzhiyun 		return;
678*4882a593Smuzhiyun 
679*4882a593Smuzhiyun 	spin_lock_bh(&dev->mt76.lock);
680*4882a593Smuzhiyun 	for (i = 0; i < ARRAY_SIZE(msta->rates); i++) {
681*4882a593Smuzhiyun 		msta->rates[i].idx = sta_rates->rate[i].idx;
682*4882a593Smuzhiyun 		msta->rates[i].count = sta_rates->rate[i].count;
683*4882a593Smuzhiyun 		msta->rates[i].flags = sta_rates->rate[i].flags;
684*4882a593Smuzhiyun 
685*4882a593Smuzhiyun 		if (msta->rates[i].idx < 0 || !msta->rates[i].count)
686*4882a593Smuzhiyun 			break;
687*4882a593Smuzhiyun 	}
688*4882a593Smuzhiyun 	msta->n_rates = i;
689*4882a593Smuzhiyun 	if (!test_bit(MT76_STATE_PM, &phy->mt76->state))
690*4882a593Smuzhiyun 		mt7615_mac_set_rates(phy, msta, NULL, msta->rates);
691*4882a593Smuzhiyun 	spin_unlock_bh(&dev->mt76.lock);
692*4882a593Smuzhiyun }
693*4882a593Smuzhiyun 
694*4882a593Smuzhiyun static void
mt7615_wake_tx_queue(struct ieee80211_hw * hw,struct ieee80211_txq * txq)695*4882a593Smuzhiyun mt7615_wake_tx_queue(struct ieee80211_hw *hw, struct ieee80211_txq *txq)
696*4882a593Smuzhiyun {
697*4882a593Smuzhiyun 	struct mt7615_dev *dev = mt7615_hw_dev(hw);
698*4882a593Smuzhiyun 	struct mt7615_phy *phy = mt7615_hw_phy(hw);
699*4882a593Smuzhiyun 	struct mt76_phy *mphy = phy->mt76;
700*4882a593Smuzhiyun 
701*4882a593Smuzhiyun 	if (!test_bit(MT76_STATE_RUNNING, &mphy->state))
702*4882a593Smuzhiyun 		return;
703*4882a593Smuzhiyun 
704*4882a593Smuzhiyun 	if (test_bit(MT76_STATE_PM, &mphy->state)) {
705*4882a593Smuzhiyun 		queue_work(dev->mt76.wq, &dev->pm.wake_work);
706*4882a593Smuzhiyun 		return;
707*4882a593Smuzhiyun 	}
708*4882a593Smuzhiyun 
709*4882a593Smuzhiyun 	dev->pm.last_activity = jiffies;
710*4882a593Smuzhiyun 	mt76_worker_schedule(&dev->mt76.tx_worker);
711*4882a593Smuzhiyun }
712*4882a593Smuzhiyun 
mt7615_tx(struct ieee80211_hw * hw,struct ieee80211_tx_control * control,struct sk_buff * skb)713*4882a593Smuzhiyun static void mt7615_tx(struct ieee80211_hw *hw,
714*4882a593Smuzhiyun 		      struct ieee80211_tx_control *control,
715*4882a593Smuzhiyun 		      struct sk_buff *skb)
716*4882a593Smuzhiyun {
717*4882a593Smuzhiyun 	struct mt7615_dev *dev = mt7615_hw_dev(hw);
718*4882a593Smuzhiyun 	struct mt76_phy *mphy = hw->priv;
719*4882a593Smuzhiyun 	struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
720*4882a593Smuzhiyun 	struct ieee80211_vif *vif = info->control.vif;
721*4882a593Smuzhiyun 	struct mt76_wcid *wcid = &dev->mt76.global_wcid;
722*4882a593Smuzhiyun 	struct mt7615_sta *msta = NULL;
723*4882a593Smuzhiyun 	int qid;
724*4882a593Smuzhiyun 
725*4882a593Smuzhiyun 	if (control->sta) {
726*4882a593Smuzhiyun 		msta = (struct mt7615_sta *)control->sta->drv_priv;
727*4882a593Smuzhiyun 		wcid = &msta->wcid;
728*4882a593Smuzhiyun 	}
729*4882a593Smuzhiyun 
730*4882a593Smuzhiyun 	if (vif && !control->sta) {
731*4882a593Smuzhiyun 		struct mt7615_vif *mvif;
732*4882a593Smuzhiyun 
733*4882a593Smuzhiyun 		mvif = (struct mt7615_vif *)vif->drv_priv;
734*4882a593Smuzhiyun 		msta = &mvif->sta;
735*4882a593Smuzhiyun 		wcid = &msta->wcid;
736*4882a593Smuzhiyun 	}
737*4882a593Smuzhiyun 
738*4882a593Smuzhiyun 	if (!test_bit(MT76_STATE_PM, &mphy->state)) {
739*4882a593Smuzhiyun 		dev->pm.last_activity = jiffies;
740*4882a593Smuzhiyun 		mt76_tx(mphy, control->sta, wcid, skb);
741*4882a593Smuzhiyun 		return;
742*4882a593Smuzhiyun 	}
743*4882a593Smuzhiyun 
744*4882a593Smuzhiyun 	qid = skb_get_queue_mapping(skb);
745*4882a593Smuzhiyun 	if (qid >= MT_TXQ_PSD) {
746*4882a593Smuzhiyun 		qid = IEEE80211_AC_BE;
747*4882a593Smuzhiyun 		skb_set_queue_mapping(skb, qid);
748*4882a593Smuzhiyun 	}
749*4882a593Smuzhiyun 
750*4882a593Smuzhiyun 	spin_lock_bh(&dev->pm.txq_lock);
751*4882a593Smuzhiyun 	if (!dev->pm.tx_q[qid].skb) {
752*4882a593Smuzhiyun 		ieee80211_stop_queues(hw);
753*4882a593Smuzhiyun 		dev->pm.tx_q[qid].msta = msta;
754*4882a593Smuzhiyun 		dev->pm.tx_q[qid].skb = skb;
755*4882a593Smuzhiyun 		queue_work(dev->mt76.wq, &dev->pm.wake_work);
756*4882a593Smuzhiyun 	} else {
757*4882a593Smuzhiyun 		dev_kfree_skb(skb);
758*4882a593Smuzhiyun 	}
759*4882a593Smuzhiyun 	spin_unlock_bh(&dev->pm.txq_lock);
760*4882a593Smuzhiyun }
761*4882a593Smuzhiyun 
mt7615_set_rts_threshold(struct ieee80211_hw * hw,u32 val)762*4882a593Smuzhiyun static int mt7615_set_rts_threshold(struct ieee80211_hw *hw, u32 val)
763*4882a593Smuzhiyun {
764*4882a593Smuzhiyun 	struct mt7615_dev *dev = mt7615_hw_dev(hw);
765*4882a593Smuzhiyun 	struct mt7615_phy *phy = mt7615_hw_phy(hw);
766*4882a593Smuzhiyun 
767*4882a593Smuzhiyun 	mt7615_mutex_acquire(dev);
768*4882a593Smuzhiyun 	mt7615_mcu_set_rts_thresh(phy, val);
769*4882a593Smuzhiyun 	mt7615_mutex_release(dev);
770*4882a593Smuzhiyun 
771*4882a593Smuzhiyun 	return 0;
772*4882a593Smuzhiyun }
773*4882a593Smuzhiyun 
774*4882a593Smuzhiyun static int
mt7615_ampdu_action(struct ieee80211_hw * hw,struct ieee80211_vif * vif,struct ieee80211_ampdu_params * params)775*4882a593Smuzhiyun mt7615_ampdu_action(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
776*4882a593Smuzhiyun 		    struct ieee80211_ampdu_params *params)
777*4882a593Smuzhiyun {
778*4882a593Smuzhiyun 	enum ieee80211_ampdu_mlme_action action = params->action;
779*4882a593Smuzhiyun 	struct mt7615_dev *dev = mt7615_hw_dev(hw);
780*4882a593Smuzhiyun 	struct ieee80211_sta *sta = params->sta;
781*4882a593Smuzhiyun 	struct ieee80211_txq *txq = sta->txq[params->tid];
782*4882a593Smuzhiyun 	struct mt7615_sta *msta = (struct mt7615_sta *)sta->drv_priv;
783*4882a593Smuzhiyun 	u16 tid = params->tid;
784*4882a593Smuzhiyun 	u16 ssn = params->ssn;
785*4882a593Smuzhiyun 	struct mt76_txq *mtxq;
786*4882a593Smuzhiyun 	int ret = 0;
787*4882a593Smuzhiyun 
788*4882a593Smuzhiyun 	if (!txq)
789*4882a593Smuzhiyun 		return -EINVAL;
790*4882a593Smuzhiyun 
791*4882a593Smuzhiyun 	mtxq = (struct mt76_txq *)txq->drv_priv;
792*4882a593Smuzhiyun 
793*4882a593Smuzhiyun 	mt7615_mutex_acquire(dev);
794*4882a593Smuzhiyun 
795*4882a593Smuzhiyun 	switch (action) {
796*4882a593Smuzhiyun 	case IEEE80211_AMPDU_RX_START:
797*4882a593Smuzhiyun 		mt76_rx_aggr_start(&dev->mt76, &msta->wcid, tid, ssn,
798*4882a593Smuzhiyun 				   params->buf_size);
799*4882a593Smuzhiyun 		mt7615_mcu_add_rx_ba(dev, params, true);
800*4882a593Smuzhiyun 		break;
801*4882a593Smuzhiyun 	case IEEE80211_AMPDU_RX_STOP:
802*4882a593Smuzhiyun 		mt76_rx_aggr_stop(&dev->mt76, &msta->wcid, tid);
803*4882a593Smuzhiyun 		mt7615_mcu_add_rx_ba(dev, params, false);
804*4882a593Smuzhiyun 		break;
805*4882a593Smuzhiyun 	case IEEE80211_AMPDU_TX_OPERATIONAL:
806*4882a593Smuzhiyun 		mtxq->aggr = true;
807*4882a593Smuzhiyun 		mtxq->send_bar = false;
808*4882a593Smuzhiyun 		mt7615_mcu_add_tx_ba(dev, params, true);
809*4882a593Smuzhiyun 		ssn = mt7615_mac_get_sta_tid_sn(dev, msta->wcid.idx, tid);
810*4882a593Smuzhiyun 		ieee80211_send_bar(vif, sta->addr, tid,
811*4882a593Smuzhiyun 				   IEEE80211_SN_TO_SEQ(ssn));
812*4882a593Smuzhiyun 		break;
813*4882a593Smuzhiyun 	case IEEE80211_AMPDU_TX_STOP_FLUSH:
814*4882a593Smuzhiyun 	case IEEE80211_AMPDU_TX_STOP_FLUSH_CONT:
815*4882a593Smuzhiyun 		mtxq->aggr = false;
816*4882a593Smuzhiyun 		mt7615_mcu_add_tx_ba(dev, params, false);
817*4882a593Smuzhiyun 		break;
818*4882a593Smuzhiyun 	case IEEE80211_AMPDU_TX_START:
819*4882a593Smuzhiyun 		ssn = mt7615_mac_get_sta_tid_sn(dev, msta->wcid.idx, tid);
820*4882a593Smuzhiyun 		params->ssn = ssn;
821*4882a593Smuzhiyun 		ret = IEEE80211_AMPDU_TX_START_IMMEDIATE;
822*4882a593Smuzhiyun 		break;
823*4882a593Smuzhiyun 	case IEEE80211_AMPDU_TX_STOP_CONT:
824*4882a593Smuzhiyun 		mtxq->aggr = false;
825*4882a593Smuzhiyun 		mt7615_mcu_add_tx_ba(dev, params, false);
826*4882a593Smuzhiyun 		ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
827*4882a593Smuzhiyun 		break;
828*4882a593Smuzhiyun 	}
829*4882a593Smuzhiyun 	mt7615_mutex_release(dev);
830*4882a593Smuzhiyun 
831*4882a593Smuzhiyun 	return ret;
832*4882a593Smuzhiyun }
833*4882a593Smuzhiyun 
834*4882a593Smuzhiyun static int
mt7615_sta_add(struct ieee80211_hw * hw,struct ieee80211_vif * vif,struct ieee80211_sta * sta)835*4882a593Smuzhiyun mt7615_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
836*4882a593Smuzhiyun 	       struct ieee80211_sta *sta)
837*4882a593Smuzhiyun {
838*4882a593Smuzhiyun     return mt76_sta_state(hw, vif, sta, IEEE80211_STA_NOTEXIST,
839*4882a593Smuzhiyun 			  IEEE80211_STA_NONE);
840*4882a593Smuzhiyun }
841*4882a593Smuzhiyun 
842*4882a593Smuzhiyun static int
mt7615_sta_remove(struct ieee80211_hw * hw,struct ieee80211_vif * vif,struct ieee80211_sta * sta)843*4882a593Smuzhiyun mt7615_sta_remove(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
844*4882a593Smuzhiyun 		  struct ieee80211_sta *sta)
845*4882a593Smuzhiyun {
846*4882a593Smuzhiyun     return mt76_sta_state(hw, vif, sta, IEEE80211_STA_NONE,
847*4882a593Smuzhiyun 			  IEEE80211_STA_NOTEXIST);
848*4882a593Smuzhiyun }
849*4882a593Smuzhiyun 
850*4882a593Smuzhiyun static int
mt7615_get_stats(struct ieee80211_hw * hw,struct ieee80211_low_level_stats * stats)851*4882a593Smuzhiyun mt7615_get_stats(struct ieee80211_hw *hw,
852*4882a593Smuzhiyun 		 struct ieee80211_low_level_stats *stats)
853*4882a593Smuzhiyun {
854*4882a593Smuzhiyun 	struct mt7615_phy *phy = mt7615_hw_phy(hw);
855*4882a593Smuzhiyun 	struct mib_stats *mib = &phy->mib;
856*4882a593Smuzhiyun 
857*4882a593Smuzhiyun 	mt7615_mutex_acquire(phy->dev);
858*4882a593Smuzhiyun 
859*4882a593Smuzhiyun 	stats->dot11RTSSuccessCount = mib->rts_cnt;
860*4882a593Smuzhiyun 	stats->dot11RTSFailureCount = mib->rts_retries_cnt;
861*4882a593Smuzhiyun 	stats->dot11FCSErrorCount = mib->fcs_err_cnt;
862*4882a593Smuzhiyun 	stats->dot11ACKFailureCount = mib->ack_fail_cnt;
863*4882a593Smuzhiyun 
864*4882a593Smuzhiyun 	memset(mib, 0, sizeof(*mib));
865*4882a593Smuzhiyun 
866*4882a593Smuzhiyun 	mt7615_mutex_release(phy->dev);
867*4882a593Smuzhiyun 
868*4882a593Smuzhiyun 	return 0;
869*4882a593Smuzhiyun }
870*4882a593Smuzhiyun 
871*4882a593Smuzhiyun static u64
mt7615_get_tsf(struct ieee80211_hw * hw,struct ieee80211_vif * vif)872*4882a593Smuzhiyun mt7615_get_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
873*4882a593Smuzhiyun {
874*4882a593Smuzhiyun 	struct mt7615_dev *dev = mt7615_hw_dev(hw);
875*4882a593Smuzhiyun 	union {
876*4882a593Smuzhiyun 		u64 t64;
877*4882a593Smuzhiyun 		u32 t32[2];
878*4882a593Smuzhiyun 	} tsf;
879*4882a593Smuzhiyun 
880*4882a593Smuzhiyun 	mt7615_mutex_acquire(dev);
881*4882a593Smuzhiyun 
882*4882a593Smuzhiyun 	mt76_set(dev, MT_LPON_T0CR, MT_LPON_T0CR_MODE); /* TSF read */
883*4882a593Smuzhiyun 	tsf.t32[0] = mt76_rr(dev, MT_LPON_UTTR0);
884*4882a593Smuzhiyun 	tsf.t32[1] = mt76_rr(dev, MT_LPON_UTTR1);
885*4882a593Smuzhiyun 
886*4882a593Smuzhiyun 	mt7615_mutex_release(dev);
887*4882a593Smuzhiyun 
888*4882a593Smuzhiyun 	return tsf.t64;
889*4882a593Smuzhiyun }
890*4882a593Smuzhiyun 
891*4882a593Smuzhiyun static void
mt7615_set_tsf(struct ieee80211_hw * hw,struct ieee80211_vif * vif,u64 timestamp)892*4882a593Smuzhiyun mt7615_set_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
893*4882a593Smuzhiyun 	       u64 timestamp)
894*4882a593Smuzhiyun {
895*4882a593Smuzhiyun 	struct mt7615_dev *dev = mt7615_hw_dev(hw);
896*4882a593Smuzhiyun 	union {
897*4882a593Smuzhiyun 		u64 t64;
898*4882a593Smuzhiyun 		u32 t32[2];
899*4882a593Smuzhiyun 	} tsf = { .t64 = timestamp, };
900*4882a593Smuzhiyun 
901*4882a593Smuzhiyun 	mt7615_mutex_acquire(dev);
902*4882a593Smuzhiyun 
903*4882a593Smuzhiyun 	mt76_wr(dev, MT_LPON_UTTR0, tsf.t32[0]);
904*4882a593Smuzhiyun 	mt76_wr(dev, MT_LPON_UTTR1, tsf.t32[1]);
905*4882a593Smuzhiyun 	/* TSF software overwrite */
906*4882a593Smuzhiyun 	mt76_set(dev, MT_LPON_T0CR, MT_LPON_T0CR_WRITE);
907*4882a593Smuzhiyun 
908*4882a593Smuzhiyun 	mt7615_mutex_release(dev);
909*4882a593Smuzhiyun }
910*4882a593Smuzhiyun 
911*4882a593Smuzhiyun static void
mt7615_set_coverage_class(struct ieee80211_hw * hw,s16 coverage_class)912*4882a593Smuzhiyun mt7615_set_coverage_class(struct ieee80211_hw *hw, s16 coverage_class)
913*4882a593Smuzhiyun {
914*4882a593Smuzhiyun 	struct mt7615_phy *phy = mt7615_hw_phy(hw);
915*4882a593Smuzhiyun 	struct mt7615_dev *dev = phy->dev;
916*4882a593Smuzhiyun 
917*4882a593Smuzhiyun 	mt7615_mutex_acquire(dev);
918*4882a593Smuzhiyun 	phy->coverage_class = max_t(s16, coverage_class, 0);
919*4882a593Smuzhiyun 	mt7615_mac_set_timing(phy);
920*4882a593Smuzhiyun 	mt7615_mutex_release(dev);
921*4882a593Smuzhiyun }
922*4882a593Smuzhiyun 
923*4882a593Smuzhiyun static int
mt7615_set_antenna(struct ieee80211_hw * hw,u32 tx_ant,u32 rx_ant)924*4882a593Smuzhiyun mt7615_set_antenna(struct ieee80211_hw *hw, u32 tx_ant, u32 rx_ant)
925*4882a593Smuzhiyun {
926*4882a593Smuzhiyun 	struct mt7615_dev *dev = mt7615_hw_dev(hw);
927*4882a593Smuzhiyun 	struct mt7615_phy *phy = mt7615_hw_phy(hw);
928*4882a593Smuzhiyun 	int max_nss = hweight8(hw->wiphy->available_antennas_tx);
929*4882a593Smuzhiyun 	bool ext_phy = phy != &dev->phy;
930*4882a593Smuzhiyun 
931*4882a593Smuzhiyun 	if (!tx_ant || tx_ant != rx_ant || ffs(tx_ant) > max_nss)
932*4882a593Smuzhiyun 		return -EINVAL;
933*4882a593Smuzhiyun 
934*4882a593Smuzhiyun 	if ((BIT(hweight8(tx_ant)) - 1) != tx_ant)
935*4882a593Smuzhiyun 		tx_ant = BIT(ffs(tx_ant) - 1) - 1;
936*4882a593Smuzhiyun 
937*4882a593Smuzhiyun 	mt7615_mutex_acquire(dev);
938*4882a593Smuzhiyun 
939*4882a593Smuzhiyun 	phy->mt76->antenna_mask = tx_ant;
940*4882a593Smuzhiyun 	if (ext_phy) {
941*4882a593Smuzhiyun 		if (dev->chainmask == 0xf)
942*4882a593Smuzhiyun 			tx_ant <<= 2;
943*4882a593Smuzhiyun 		else
944*4882a593Smuzhiyun 			tx_ant <<= 1;
945*4882a593Smuzhiyun 	}
946*4882a593Smuzhiyun 	phy->chainmask = tx_ant;
947*4882a593Smuzhiyun 
948*4882a593Smuzhiyun 	mt76_set_stream_caps(phy->mt76, true);
949*4882a593Smuzhiyun 
950*4882a593Smuzhiyun 	mt7615_mutex_release(dev);
951*4882a593Smuzhiyun 
952*4882a593Smuzhiyun 	return 0;
953*4882a593Smuzhiyun }
954*4882a593Smuzhiyun 
mt7615_roc_iter(void * priv,u8 * mac,struct ieee80211_vif * vif)955*4882a593Smuzhiyun static void mt7615_roc_iter(void *priv, u8 *mac,
956*4882a593Smuzhiyun 			    struct ieee80211_vif *vif)
957*4882a593Smuzhiyun {
958*4882a593Smuzhiyun 	struct mt7615_phy *phy = priv;
959*4882a593Smuzhiyun 
960*4882a593Smuzhiyun 	mt7615_mcu_set_roc(phy, vif, NULL, 0);
961*4882a593Smuzhiyun }
962*4882a593Smuzhiyun 
mt7615_roc_work(struct work_struct * work)963*4882a593Smuzhiyun void mt7615_roc_work(struct work_struct *work)
964*4882a593Smuzhiyun {
965*4882a593Smuzhiyun 	struct mt7615_phy *phy;
966*4882a593Smuzhiyun 
967*4882a593Smuzhiyun 	phy = (struct mt7615_phy *)container_of(work, struct mt7615_phy,
968*4882a593Smuzhiyun 						roc_work);
969*4882a593Smuzhiyun 
970*4882a593Smuzhiyun 	if (!test_and_clear_bit(MT76_STATE_ROC, &phy->mt76->state))
971*4882a593Smuzhiyun 		return;
972*4882a593Smuzhiyun 
973*4882a593Smuzhiyun 	mt7615_mutex_acquire(phy->dev);
974*4882a593Smuzhiyun 	ieee80211_iterate_active_interfaces(phy->mt76->hw,
975*4882a593Smuzhiyun 					    IEEE80211_IFACE_ITER_RESUME_ALL,
976*4882a593Smuzhiyun 					    mt7615_roc_iter, phy);
977*4882a593Smuzhiyun 	mt7615_mutex_release(phy->dev);
978*4882a593Smuzhiyun 	ieee80211_remain_on_channel_expired(phy->mt76->hw);
979*4882a593Smuzhiyun }
980*4882a593Smuzhiyun 
mt7615_roc_timer(struct timer_list * timer)981*4882a593Smuzhiyun void mt7615_roc_timer(struct timer_list *timer)
982*4882a593Smuzhiyun {
983*4882a593Smuzhiyun 	struct mt7615_phy *phy = from_timer(phy, timer, roc_timer);
984*4882a593Smuzhiyun 
985*4882a593Smuzhiyun 	ieee80211_queue_work(phy->mt76->hw, &phy->roc_work);
986*4882a593Smuzhiyun }
987*4882a593Smuzhiyun 
mt7615_scan_work(struct work_struct * work)988*4882a593Smuzhiyun void mt7615_scan_work(struct work_struct *work)
989*4882a593Smuzhiyun {
990*4882a593Smuzhiyun 	struct mt7615_phy *phy;
991*4882a593Smuzhiyun 
992*4882a593Smuzhiyun 	phy = (struct mt7615_phy *)container_of(work, struct mt7615_phy,
993*4882a593Smuzhiyun 						scan_work.work);
994*4882a593Smuzhiyun 
995*4882a593Smuzhiyun 	while (true) {
996*4882a593Smuzhiyun 		struct mt7615_mcu_rxd *rxd;
997*4882a593Smuzhiyun 		struct sk_buff *skb;
998*4882a593Smuzhiyun 
999*4882a593Smuzhiyun 		spin_lock_bh(&phy->dev->mt76.lock);
1000*4882a593Smuzhiyun 		skb = __skb_dequeue(&phy->scan_event_list);
1001*4882a593Smuzhiyun 		spin_unlock_bh(&phy->dev->mt76.lock);
1002*4882a593Smuzhiyun 
1003*4882a593Smuzhiyun 		if (!skb)
1004*4882a593Smuzhiyun 			break;
1005*4882a593Smuzhiyun 
1006*4882a593Smuzhiyun 		rxd = (struct mt7615_mcu_rxd *)skb->data;
1007*4882a593Smuzhiyun 		if (rxd->eid == MCU_EVENT_SCHED_SCAN_DONE) {
1008*4882a593Smuzhiyun 			ieee80211_sched_scan_results(phy->mt76->hw);
1009*4882a593Smuzhiyun 		} else if (test_and_clear_bit(MT76_HW_SCANNING,
1010*4882a593Smuzhiyun 					      &phy->mt76->state)) {
1011*4882a593Smuzhiyun 			struct cfg80211_scan_info info = {
1012*4882a593Smuzhiyun 				.aborted = false,
1013*4882a593Smuzhiyun 			};
1014*4882a593Smuzhiyun 
1015*4882a593Smuzhiyun 			ieee80211_scan_completed(phy->mt76->hw, &info);
1016*4882a593Smuzhiyun 		}
1017*4882a593Smuzhiyun 		dev_kfree_skb(skb);
1018*4882a593Smuzhiyun 	}
1019*4882a593Smuzhiyun }
1020*4882a593Smuzhiyun 
1021*4882a593Smuzhiyun static int
mt7615_hw_scan(struct ieee80211_hw * hw,struct ieee80211_vif * vif,struct ieee80211_scan_request * req)1022*4882a593Smuzhiyun mt7615_hw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
1023*4882a593Smuzhiyun 	       struct ieee80211_scan_request *req)
1024*4882a593Smuzhiyun {
1025*4882a593Smuzhiyun 	struct mt7615_dev *dev = mt7615_hw_dev(hw);
1026*4882a593Smuzhiyun 	struct mt76_phy *mphy = hw->priv;
1027*4882a593Smuzhiyun 	int err;
1028*4882a593Smuzhiyun 
1029*4882a593Smuzhiyun 	mt7615_mutex_acquire(dev);
1030*4882a593Smuzhiyun 	err = mt7615_mcu_hw_scan(mphy->priv, vif, req);
1031*4882a593Smuzhiyun 	mt7615_mutex_release(dev);
1032*4882a593Smuzhiyun 
1033*4882a593Smuzhiyun 	return err;
1034*4882a593Smuzhiyun }
1035*4882a593Smuzhiyun 
1036*4882a593Smuzhiyun static void
mt7615_cancel_hw_scan(struct ieee80211_hw * hw,struct ieee80211_vif * vif)1037*4882a593Smuzhiyun mt7615_cancel_hw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1038*4882a593Smuzhiyun {
1039*4882a593Smuzhiyun 	struct mt7615_dev *dev = mt7615_hw_dev(hw);
1040*4882a593Smuzhiyun 	struct mt76_phy *mphy = hw->priv;
1041*4882a593Smuzhiyun 
1042*4882a593Smuzhiyun 	mt7615_mutex_acquire(dev);
1043*4882a593Smuzhiyun 	mt7615_mcu_cancel_hw_scan(mphy->priv, vif);
1044*4882a593Smuzhiyun 	mt7615_mutex_release(dev);
1045*4882a593Smuzhiyun }
1046*4882a593Smuzhiyun 
1047*4882a593Smuzhiyun static int
mt7615_start_sched_scan(struct ieee80211_hw * hw,struct ieee80211_vif * vif,struct cfg80211_sched_scan_request * req,struct ieee80211_scan_ies * ies)1048*4882a593Smuzhiyun mt7615_start_sched_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
1049*4882a593Smuzhiyun 			struct cfg80211_sched_scan_request *req,
1050*4882a593Smuzhiyun 			struct ieee80211_scan_ies *ies)
1051*4882a593Smuzhiyun {
1052*4882a593Smuzhiyun 	struct mt7615_dev *dev = mt7615_hw_dev(hw);
1053*4882a593Smuzhiyun 	struct mt76_phy *mphy = hw->priv;
1054*4882a593Smuzhiyun 	int err;
1055*4882a593Smuzhiyun 
1056*4882a593Smuzhiyun 	mt7615_mutex_acquire(dev);
1057*4882a593Smuzhiyun 
1058*4882a593Smuzhiyun 	err = mt7615_mcu_sched_scan_req(mphy->priv, vif, req);
1059*4882a593Smuzhiyun 	if (err < 0)
1060*4882a593Smuzhiyun 		goto out;
1061*4882a593Smuzhiyun 
1062*4882a593Smuzhiyun 	err = mt7615_mcu_sched_scan_enable(mphy->priv, vif, true);
1063*4882a593Smuzhiyun out:
1064*4882a593Smuzhiyun 	mt7615_mutex_release(dev);
1065*4882a593Smuzhiyun 
1066*4882a593Smuzhiyun 	return err;
1067*4882a593Smuzhiyun }
1068*4882a593Smuzhiyun 
1069*4882a593Smuzhiyun static int
mt7615_stop_sched_scan(struct ieee80211_hw * hw,struct ieee80211_vif * vif)1070*4882a593Smuzhiyun mt7615_stop_sched_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
1071*4882a593Smuzhiyun {
1072*4882a593Smuzhiyun 	struct mt7615_dev *dev = mt7615_hw_dev(hw);
1073*4882a593Smuzhiyun 	struct mt76_phy *mphy = hw->priv;
1074*4882a593Smuzhiyun 	int err;
1075*4882a593Smuzhiyun 
1076*4882a593Smuzhiyun 	mt7615_mutex_acquire(dev);
1077*4882a593Smuzhiyun 	err = mt7615_mcu_sched_scan_enable(mphy->priv, vif, false);
1078*4882a593Smuzhiyun 	mt7615_mutex_release(dev);
1079*4882a593Smuzhiyun 
1080*4882a593Smuzhiyun 	return err;
1081*4882a593Smuzhiyun }
1082*4882a593Smuzhiyun 
mt7615_remain_on_channel(struct ieee80211_hw * hw,struct ieee80211_vif * vif,struct ieee80211_channel * chan,int duration,enum ieee80211_roc_type type)1083*4882a593Smuzhiyun static int mt7615_remain_on_channel(struct ieee80211_hw *hw,
1084*4882a593Smuzhiyun 				    struct ieee80211_vif *vif,
1085*4882a593Smuzhiyun 				    struct ieee80211_channel *chan,
1086*4882a593Smuzhiyun 				    int duration,
1087*4882a593Smuzhiyun 				    enum ieee80211_roc_type type)
1088*4882a593Smuzhiyun {
1089*4882a593Smuzhiyun 	struct mt7615_phy *phy = mt7615_hw_phy(hw);
1090*4882a593Smuzhiyun 	int err;
1091*4882a593Smuzhiyun 
1092*4882a593Smuzhiyun 	if (test_and_set_bit(MT76_STATE_ROC, &phy->mt76->state))
1093*4882a593Smuzhiyun 		return 0;
1094*4882a593Smuzhiyun 
1095*4882a593Smuzhiyun 	mt7615_mutex_acquire(phy->dev);
1096*4882a593Smuzhiyun 
1097*4882a593Smuzhiyun 	err = mt7615_mcu_set_roc(phy, vif, chan, duration);
1098*4882a593Smuzhiyun 	if (err < 0) {
1099*4882a593Smuzhiyun 		clear_bit(MT76_STATE_ROC, &phy->mt76->state);
1100*4882a593Smuzhiyun 		goto out;
1101*4882a593Smuzhiyun 	}
1102*4882a593Smuzhiyun 
1103*4882a593Smuzhiyun 	if (!wait_event_timeout(phy->roc_wait, phy->roc_grant, HZ)) {
1104*4882a593Smuzhiyun 		mt7615_mcu_set_roc(phy, vif, NULL, 0);
1105*4882a593Smuzhiyun 		clear_bit(MT76_STATE_ROC, &phy->mt76->state);
1106*4882a593Smuzhiyun 		err = -ETIMEDOUT;
1107*4882a593Smuzhiyun 	}
1108*4882a593Smuzhiyun 
1109*4882a593Smuzhiyun out:
1110*4882a593Smuzhiyun 	mt7615_mutex_release(phy->dev);
1111*4882a593Smuzhiyun 
1112*4882a593Smuzhiyun 	return err;
1113*4882a593Smuzhiyun }
1114*4882a593Smuzhiyun 
mt7615_cancel_remain_on_channel(struct ieee80211_hw * hw,struct ieee80211_vif * vif)1115*4882a593Smuzhiyun static int mt7615_cancel_remain_on_channel(struct ieee80211_hw *hw,
1116*4882a593Smuzhiyun 					   struct ieee80211_vif *vif)
1117*4882a593Smuzhiyun {
1118*4882a593Smuzhiyun 	struct mt7615_phy *phy = mt7615_hw_phy(hw);
1119*4882a593Smuzhiyun 
1120*4882a593Smuzhiyun 	if (!test_and_clear_bit(MT76_STATE_ROC, &phy->mt76->state))
1121*4882a593Smuzhiyun 		return 0;
1122*4882a593Smuzhiyun 
1123*4882a593Smuzhiyun 	del_timer_sync(&phy->roc_timer);
1124*4882a593Smuzhiyun 	cancel_work_sync(&phy->roc_work);
1125*4882a593Smuzhiyun 
1126*4882a593Smuzhiyun 	mt7615_mutex_acquire(phy->dev);
1127*4882a593Smuzhiyun 	mt7615_mcu_set_roc(phy, vif, NULL, 0);
1128*4882a593Smuzhiyun 	mt7615_mutex_release(phy->dev);
1129*4882a593Smuzhiyun 
1130*4882a593Smuzhiyun 	return 0;
1131*4882a593Smuzhiyun }
1132*4882a593Smuzhiyun 
1133*4882a593Smuzhiyun #ifdef CONFIG_PM
mt7615_suspend(struct ieee80211_hw * hw,struct cfg80211_wowlan * wowlan)1134*4882a593Smuzhiyun static int mt7615_suspend(struct ieee80211_hw *hw,
1135*4882a593Smuzhiyun 			  struct cfg80211_wowlan *wowlan)
1136*4882a593Smuzhiyun {
1137*4882a593Smuzhiyun 	struct mt7615_dev *dev = mt7615_hw_dev(hw);
1138*4882a593Smuzhiyun 	struct mt7615_phy *phy = mt7615_hw_phy(hw);
1139*4882a593Smuzhiyun 	bool ext_phy = phy != &dev->phy;
1140*4882a593Smuzhiyun 	int err = 0;
1141*4882a593Smuzhiyun 
1142*4882a593Smuzhiyun 	cancel_delayed_work_sync(&dev->pm.ps_work);
1143*4882a593Smuzhiyun 	mt7615_free_pending_tx_skbs(dev, NULL);
1144*4882a593Smuzhiyun 
1145*4882a593Smuzhiyun 	mt7615_mutex_acquire(dev);
1146*4882a593Smuzhiyun 
1147*4882a593Smuzhiyun 	clear_bit(MT76_STATE_RUNNING, &phy->mt76->state);
1148*4882a593Smuzhiyun 	cancel_delayed_work_sync(&phy->scan_work);
1149*4882a593Smuzhiyun 	cancel_delayed_work_sync(&phy->mac_work);
1150*4882a593Smuzhiyun 
1151*4882a593Smuzhiyun 	mt76_set(dev, MT_WF_RFCR(ext_phy), MT_WF_RFCR_DROP_OTHER_BEACON);
1152*4882a593Smuzhiyun 
1153*4882a593Smuzhiyun 	set_bit(MT76_STATE_SUSPEND, &phy->mt76->state);
1154*4882a593Smuzhiyun 	ieee80211_iterate_active_interfaces(hw,
1155*4882a593Smuzhiyun 					    IEEE80211_IFACE_ITER_RESUME_ALL,
1156*4882a593Smuzhiyun 					    mt7615_mcu_set_suspend_iter, phy);
1157*4882a593Smuzhiyun 
1158*4882a593Smuzhiyun 	if (!mt7615_dev_running(dev))
1159*4882a593Smuzhiyun 		err = mt7615_mcu_set_hif_suspend(dev, true);
1160*4882a593Smuzhiyun 
1161*4882a593Smuzhiyun 	mt7615_mutex_release(dev);
1162*4882a593Smuzhiyun 
1163*4882a593Smuzhiyun 	return err;
1164*4882a593Smuzhiyun }
1165*4882a593Smuzhiyun 
mt7615_resume(struct ieee80211_hw * hw)1166*4882a593Smuzhiyun static int mt7615_resume(struct ieee80211_hw *hw)
1167*4882a593Smuzhiyun {
1168*4882a593Smuzhiyun 	struct mt7615_dev *dev = mt7615_hw_dev(hw);
1169*4882a593Smuzhiyun 	struct mt7615_phy *phy = mt7615_hw_phy(hw);
1170*4882a593Smuzhiyun 	bool running, ext_phy = phy != &dev->phy;
1171*4882a593Smuzhiyun 
1172*4882a593Smuzhiyun 	mt7615_mutex_acquire(dev);
1173*4882a593Smuzhiyun 
1174*4882a593Smuzhiyun 	running = mt7615_dev_running(dev);
1175*4882a593Smuzhiyun 	set_bit(MT76_STATE_RUNNING, &phy->mt76->state);
1176*4882a593Smuzhiyun 
1177*4882a593Smuzhiyun 	if (!running) {
1178*4882a593Smuzhiyun 		int err;
1179*4882a593Smuzhiyun 
1180*4882a593Smuzhiyun 		err = mt7615_mcu_set_hif_suspend(dev, false);
1181*4882a593Smuzhiyun 		if (err < 0) {
1182*4882a593Smuzhiyun 			mt7615_mutex_release(dev);
1183*4882a593Smuzhiyun 			return err;
1184*4882a593Smuzhiyun 		}
1185*4882a593Smuzhiyun 	}
1186*4882a593Smuzhiyun 
1187*4882a593Smuzhiyun 	clear_bit(MT76_STATE_SUSPEND, &phy->mt76->state);
1188*4882a593Smuzhiyun 	ieee80211_iterate_active_interfaces(hw,
1189*4882a593Smuzhiyun 					    IEEE80211_IFACE_ITER_RESUME_ALL,
1190*4882a593Smuzhiyun 					    mt7615_mcu_set_suspend_iter, phy);
1191*4882a593Smuzhiyun 
1192*4882a593Smuzhiyun 	ieee80211_queue_delayed_work(hw, &phy->mac_work,
1193*4882a593Smuzhiyun 				     MT7615_WATCHDOG_TIME);
1194*4882a593Smuzhiyun 	mt76_clear(dev, MT_WF_RFCR(ext_phy), MT_WF_RFCR_DROP_OTHER_BEACON);
1195*4882a593Smuzhiyun 
1196*4882a593Smuzhiyun 	mt7615_mutex_release(dev);
1197*4882a593Smuzhiyun 
1198*4882a593Smuzhiyun 	return 0;
1199*4882a593Smuzhiyun }
1200*4882a593Smuzhiyun 
mt7615_set_wakeup(struct ieee80211_hw * hw,bool enabled)1201*4882a593Smuzhiyun static void mt7615_set_wakeup(struct ieee80211_hw *hw, bool enabled)
1202*4882a593Smuzhiyun {
1203*4882a593Smuzhiyun 	struct mt7615_dev *dev = mt7615_hw_dev(hw);
1204*4882a593Smuzhiyun 	struct mt76_dev *mdev = &dev->mt76;
1205*4882a593Smuzhiyun 
1206*4882a593Smuzhiyun 	device_set_wakeup_enable(mdev->dev, enabled);
1207*4882a593Smuzhiyun }
1208*4882a593Smuzhiyun 
mt7615_set_rekey_data(struct ieee80211_hw * hw,struct ieee80211_vif * vif,struct cfg80211_gtk_rekey_data * data)1209*4882a593Smuzhiyun static void mt7615_set_rekey_data(struct ieee80211_hw *hw,
1210*4882a593Smuzhiyun 				  struct ieee80211_vif *vif,
1211*4882a593Smuzhiyun 				  struct cfg80211_gtk_rekey_data *data)
1212*4882a593Smuzhiyun {
1213*4882a593Smuzhiyun 	struct mt7615_dev *dev = mt7615_hw_dev(hw);
1214*4882a593Smuzhiyun 
1215*4882a593Smuzhiyun 	mt7615_mutex_acquire(dev);
1216*4882a593Smuzhiyun 	mt7615_mcu_update_gtk_rekey(hw, vif, data);
1217*4882a593Smuzhiyun 	mt7615_mutex_release(dev);
1218*4882a593Smuzhiyun }
1219*4882a593Smuzhiyun #endif /* CONFIG_PM */
1220*4882a593Smuzhiyun 
1221*4882a593Smuzhiyun const struct ieee80211_ops mt7615_ops = {
1222*4882a593Smuzhiyun 	.tx = mt7615_tx,
1223*4882a593Smuzhiyun 	.start = mt7615_start,
1224*4882a593Smuzhiyun 	.stop = mt7615_stop,
1225*4882a593Smuzhiyun 	.add_interface = mt7615_add_interface,
1226*4882a593Smuzhiyun 	.remove_interface = mt7615_remove_interface,
1227*4882a593Smuzhiyun 	.config = mt7615_config,
1228*4882a593Smuzhiyun 	.conf_tx = mt7615_conf_tx,
1229*4882a593Smuzhiyun 	.configure_filter = mt7615_configure_filter,
1230*4882a593Smuzhiyun 	.bss_info_changed = mt7615_bss_info_changed,
1231*4882a593Smuzhiyun 	.sta_add = mt7615_sta_add,
1232*4882a593Smuzhiyun 	.sta_remove = mt7615_sta_remove,
1233*4882a593Smuzhiyun 	.sta_pre_rcu_remove = mt76_sta_pre_rcu_remove,
1234*4882a593Smuzhiyun 	.set_key = mt7615_set_key,
1235*4882a593Smuzhiyun 	.ampdu_action = mt7615_ampdu_action,
1236*4882a593Smuzhiyun 	.set_rts_threshold = mt7615_set_rts_threshold,
1237*4882a593Smuzhiyun 	.wake_tx_queue = mt7615_wake_tx_queue,
1238*4882a593Smuzhiyun 	.sta_rate_tbl_update = mt7615_sta_rate_tbl_update,
1239*4882a593Smuzhiyun 	.sw_scan_start = mt76_sw_scan,
1240*4882a593Smuzhiyun 	.sw_scan_complete = mt76_sw_scan_complete,
1241*4882a593Smuzhiyun 	.release_buffered_frames = mt76_release_buffered_frames,
1242*4882a593Smuzhiyun 	.get_txpower = mt76_get_txpower,
1243*4882a593Smuzhiyun 	.channel_switch_beacon = mt7615_channel_switch_beacon,
1244*4882a593Smuzhiyun 	.get_stats = mt7615_get_stats,
1245*4882a593Smuzhiyun 	.get_tsf = mt7615_get_tsf,
1246*4882a593Smuzhiyun 	.set_tsf = mt7615_set_tsf,
1247*4882a593Smuzhiyun 	.get_survey = mt76_get_survey,
1248*4882a593Smuzhiyun 	.get_antenna = mt76_get_antenna,
1249*4882a593Smuzhiyun 	.set_antenna = mt7615_set_antenna,
1250*4882a593Smuzhiyun 	.set_coverage_class = mt7615_set_coverage_class,
1251*4882a593Smuzhiyun 	.hw_scan = mt7615_hw_scan,
1252*4882a593Smuzhiyun 	.cancel_hw_scan = mt7615_cancel_hw_scan,
1253*4882a593Smuzhiyun 	.sched_scan_start = mt7615_start_sched_scan,
1254*4882a593Smuzhiyun 	.sched_scan_stop = mt7615_stop_sched_scan,
1255*4882a593Smuzhiyun 	.remain_on_channel = mt7615_remain_on_channel,
1256*4882a593Smuzhiyun 	.cancel_remain_on_channel = mt7615_cancel_remain_on_channel,
1257*4882a593Smuzhiyun 	CFG80211_TESTMODE_CMD(mt76_testmode_cmd)
1258*4882a593Smuzhiyun 	CFG80211_TESTMODE_DUMP(mt76_testmode_dump)
1259*4882a593Smuzhiyun #ifdef CONFIG_PM
1260*4882a593Smuzhiyun 	.suspend = mt7615_suspend,
1261*4882a593Smuzhiyun 	.resume = mt7615_resume,
1262*4882a593Smuzhiyun 	.set_wakeup = mt7615_set_wakeup,
1263*4882a593Smuzhiyun 	.set_rekey_data = mt7615_set_rekey_data,
1264*4882a593Smuzhiyun #endif /* CONFIG_PM */
1265*4882a593Smuzhiyun };
1266*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(mt7615_ops);
1267*4882a593Smuzhiyun 
1268*4882a593Smuzhiyun MODULE_LICENSE("Dual BSD/GPL");
1269