1*4882a593Smuzhiyun // SPDX-License-Identifier: ISC
2*4882a593Smuzhiyun
3*4882a593Smuzhiyun #include "mt7615.h"
4*4882a593Smuzhiyun
5*4882a593Smuzhiyun static int
mt7615_radar_pattern_set(void * data,u64 val)6*4882a593Smuzhiyun mt7615_radar_pattern_set(void *data, u64 val)
7*4882a593Smuzhiyun {
8*4882a593Smuzhiyun struct mt7615_dev *dev = data;
9*4882a593Smuzhiyun int err;
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun if (!mt7615_wait_for_mcu_init(dev))
12*4882a593Smuzhiyun return 0;
13*4882a593Smuzhiyun
14*4882a593Smuzhiyun mt7615_mutex_acquire(dev);
15*4882a593Smuzhiyun err = mt7615_mcu_rdd_send_pattern(dev);
16*4882a593Smuzhiyun mt7615_mutex_release(dev);
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun return err;
19*4882a593Smuzhiyun }
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun DEFINE_DEBUGFS_ATTRIBUTE(fops_radar_pattern, NULL,
22*4882a593Smuzhiyun mt7615_radar_pattern_set, "%lld\n");
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun static int
mt7615_scs_set(void * data,u64 val)25*4882a593Smuzhiyun mt7615_scs_set(void *data, u64 val)
26*4882a593Smuzhiyun {
27*4882a593Smuzhiyun struct mt7615_dev *dev = data;
28*4882a593Smuzhiyun struct mt7615_phy *ext_phy;
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun if (!mt7615_wait_for_mcu_init(dev))
31*4882a593Smuzhiyun return 0;
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun mt7615_mac_set_scs(&dev->phy, val);
34*4882a593Smuzhiyun ext_phy = mt7615_ext_phy(dev);
35*4882a593Smuzhiyun if (ext_phy)
36*4882a593Smuzhiyun mt7615_mac_set_scs(ext_phy, val);
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun return 0;
39*4882a593Smuzhiyun }
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun static int
mt7615_scs_get(void * data,u64 * val)42*4882a593Smuzhiyun mt7615_scs_get(void *data, u64 *val)
43*4882a593Smuzhiyun {
44*4882a593Smuzhiyun struct mt7615_dev *dev = data;
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun *val = dev->phy.scs_en;
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun return 0;
49*4882a593Smuzhiyun }
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun DEFINE_DEBUGFS_ATTRIBUTE(fops_scs, mt7615_scs_get,
52*4882a593Smuzhiyun mt7615_scs_set, "%lld\n");
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun static int
mt7615_pm_set(void * data,u64 val)55*4882a593Smuzhiyun mt7615_pm_set(void *data, u64 val)
56*4882a593Smuzhiyun {
57*4882a593Smuzhiyun struct mt7615_dev *dev = data;
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun if (!mt7615_wait_for_mcu_init(dev))
60*4882a593Smuzhiyun return 0;
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun return mt7615_pm_set_enable(dev, val);
63*4882a593Smuzhiyun }
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun static int
mt7615_pm_get(void * data,u64 * val)66*4882a593Smuzhiyun mt7615_pm_get(void *data, u64 *val)
67*4882a593Smuzhiyun {
68*4882a593Smuzhiyun struct mt7615_dev *dev = data;
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun *val = dev->pm.enable;
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun return 0;
73*4882a593Smuzhiyun }
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun DEFINE_DEBUGFS_ATTRIBUTE(fops_pm, mt7615_pm_get, mt7615_pm_set, "%lld\n");
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun static int
mt7615_pm_idle_timeout_set(void * data,u64 val)78*4882a593Smuzhiyun mt7615_pm_idle_timeout_set(void *data, u64 val)
79*4882a593Smuzhiyun {
80*4882a593Smuzhiyun struct mt7615_dev *dev = data;
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun dev->pm.idle_timeout = msecs_to_jiffies(val);
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun return 0;
85*4882a593Smuzhiyun }
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun static int
mt7615_pm_idle_timeout_get(void * data,u64 * val)88*4882a593Smuzhiyun mt7615_pm_idle_timeout_get(void *data, u64 *val)
89*4882a593Smuzhiyun {
90*4882a593Smuzhiyun struct mt7615_dev *dev = data;
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun *val = jiffies_to_msecs(dev->pm.idle_timeout);
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun return 0;
95*4882a593Smuzhiyun }
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun DEFINE_DEBUGFS_ATTRIBUTE(fops_pm_idle_timeout, mt7615_pm_idle_timeout_get,
98*4882a593Smuzhiyun mt7615_pm_idle_timeout_set, "%lld\n");
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun static int
mt7615_dbdc_set(void * data,u64 val)101*4882a593Smuzhiyun mt7615_dbdc_set(void *data, u64 val)
102*4882a593Smuzhiyun {
103*4882a593Smuzhiyun struct mt7615_dev *dev = data;
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun if (!mt7615_wait_for_mcu_init(dev))
106*4882a593Smuzhiyun return 0;
107*4882a593Smuzhiyun
108*4882a593Smuzhiyun if (val)
109*4882a593Smuzhiyun mt7615_register_ext_phy(dev);
110*4882a593Smuzhiyun else
111*4882a593Smuzhiyun mt7615_unregister_ext_phy(dev);
112*4882a593Smuzhiyun
113*4882a593Smuzhiyun return 0;
114*4882a593Smuzhiyun }
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun static int
mt7615_dbdc_get(void * data,u64 * val)117*4882a593Smuzhiyun mt7615_dbdc_get(void *data, u64 *val)
118*4882a593Smuzhiyun {
119*4882a593Smuzhiyun struct mt7615_dev *dev = data;
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun *val = !!mt7615_ext_phy(dev);
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun return 0;
124*4882a593Smuzhiyun }
125*4882a593Smuzhiyun
126*4882a593Smuzhiyun DEFINE_DEBUGFS_ATTRIBUTE(fops_dbdc, mt7615_dbdc_get,
127*4882a593Smuzhiyun mt7615_dbdc_set, "%lld\n");
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun static int
mt7615_fw_debug_set(void * data,u64 val)130*4882a593Smuzhiyun mt7615_fw_debug_set(void *data, u64 val)
131*4882a593Smuzhiyun {
132*4882a593Smuzhiyun struct mt7615_dev *dev = data;
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun if (!mt7615_wait_for_mcu_init(dev))
135*4882a593Smuzhiyun return 0;
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun dev->fw_debug = val;
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun mt7615_mutex_acquire(dev);
140*4882a593Smuzhiyun mt7615_mcu_fw_log_2_host(dev, dev->fw_debug ? 2 : 0);
141*4882a593Smuzhiyun mt7615_mutex_release(dev);
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun return 0;
144*4882a593Smuzhiyun }
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun static int
mt7615_fw_debug_get(void * data,u64 * val)147*4882a593Smuzhiyun mt7615_fw_debug_get(void *data, u64 *val)
148*4882a593Smuzhiyun {
149*4882a593Smuzhiyun struct mt7615_dev *dev = data;
150*4882a593Smuzhiyun
151*4882a593Smuzhiyun *val = dev->fw_debug;
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun return 0;
154*4882a593Smuzhiyun }
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun DEFINE_DEBUGFS_ATTRIBUTE(fops_fw_debug, mt7615_fw_debug_get,
157*4882a593Smuzhiyun mt7615_fw_debug_set, "%lld\n");
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun static int
mt7615_reset_test_set(void * data,u64 val)160*4882a593Smuzhiyun mt7615_reset_test_set(void *data, u64 val)
161*4882a593Smuzhiyun {
162*4882a593Smuzhiyun struct mt7615_dev *dev = data;
163*4882a593Smuzhiyun struct sk_buff *skb;
164*4882a593Smuzhiyun
165*4882a593Smuzhiyun if (!mt7615_wait_for_mcu_init(dev))
166*4882a593Smuzhiyun return 0;
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun skb = alloc_skb(1, GFP_KERNEL);
169*4882a593Smuzhiyun if (!skb)
170*4882a593Smuzhiyun return -ENOMEM;
171*4882a593Smuzhiyun
172*4882a593Smuzhiyun skb_put(skb, 1);
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun mt7615_mutex_acquire(dev);
175*4882a593Smuzhiyun mt76_tx_queue_skb_raw(dev, 0, skb, 0);
176*4882a593Smuzhiyun mt7615_mutex_release(dev);
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun return 0;
179*4882a593Smuzhiyun }
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun DEFINE_DEBUGFS_ATTRIBUTE(fops_reset_test, NULL,
182*4882a593Smuzhiyun mt7615_reset_test_set, "%lld\n");
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun static void
mt7615_ampdu_stat_read_phy(struct mt7615_phy * phy,struct seq_file * file)185*4882a593Smuzhiyun mt7615_ampdu_stat_read_phy(struct mt7615_phy *phy,
186*4882a593Smuzhiyun struct seq_file *file)
187*4882a593Smuzhiyun {
188*4882a593Smuzhiyun struct mt7615_dev *dev = file->private;
189*4882a593Smuzhiyun u32 reg = is_mt7663(&dev->mt76) ? MT_MIB_ARNG(0) : MT_AGG_ASRCR0;
190*4882a593Smuzhiyun bool ext_phy = phy != &dev->phy;
191*4882a593Smuzhiyun int bound[7], i, range;
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun if (!phy)
194*4882a593Smuzhiyun return;
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun range = mt76_rr(dev, reg);
197*4882a593Smuzhiyun for (i = 0; i < 4; i++)
198*4882a593Smuzhiyun bound[i] = MT_AGG_ASRCR_RANGE(range, i) + 1;
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun range = mt76_rr(dev, reg + 4);
201*4882a593Smuzhiyun for (i = 0; i < 3; i++)
202*4882a593Smuzhiyun bound[i + 4] = MT_AGG_ASRCR_RANGE(range, i) + 1;
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun seq_printf(file, "\nPhy %d\n", ext_phy);
205*4882a593Smuzhiyun
206*4882a593Smuzhiyun seq_printf(file, "Length: %8d | ", bound[0]);
207*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(bound) - 1; i++)
208*4882a593Smuzhiyun seq_printf(file, "%3d -%3d | ",
209*4882a593Smuzhiyun bound[i], bound[i + 1]);
210*4882a593Smuzhiyun seq_puts(file, "\nCount: ");
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun range = ext_phy ? ARRAY_SIZE(dev->mt76.aggr_stats) / 2 : 0;
213*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(bound); i++)
214*4882a593Smuzhiyun seq_printf(file, "%8d | ", dev->mt76.aggr_stats[i + range]);
215*4882a593Smuzhiyun seq_puts(file, "\n");
216*4882a593Smuzhiyun
217*4882a593Smuzhiyun seq_printf(file, "BA miss count: %d\n", phy->mib.ba_miss_cnt);
218*4882a593Smuzhiyun seq_printf(file, "PER: %ld.%1ld%%\n",
219*4882a593Smuzhiyun phy->mib.aggr_per / 10, phy->mib.aggr_per % 10);
220*4882a593Smuzhiyun }
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun static int
mt7615_ampdu_stat_show(struct seq_file * file,void * data)223*4882a593Smuzhiyun mt7615_ampdu_stat_show(struct seq_file *file, void *data)
224*4882a593Smuzhiyun {
225*4882a593Smuzhiyun struct mt7615_dev *dev = file->private;
226*4882a593Smuzhiyun
227*4882a593Smuzhiyun mt7615_mutex_acquire(dev);
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun mt7615_ampdu_stat_read_phy(&dev->phy, file);
230*4882a593Smuzhiyun mt7615_ampdu_stat_read_phy(mt7615_ext_phy(dev), file);
231*4882a593Smuzhiyun
232*4882a593Smuzhiyun mt7615_mutex_release(dev);
233*4882a593Smuzhiyun
234*4882a593Smuzhiyun return 0;
235*4882a593Smuzhiyun }
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun DEFINE_SHOW_ATTRIBUTE(mt7615_ampdu_stat);
238*4882a593Smuzhiyun
239*4882a593Smuzhiyun static void
mt7615_radio_read_phy(struct mt7615_phy * phy,struct seq_file * s)240*4882a593Smuzhiyun mt7615_radio_read_phy(struct mt7615_phy *phy, struct seq_file *s)
241*4882a593Smuzhiyun {
242*4882a593Smuzhiyun struct mt7615_dev *dev = dev_get_drvdata(s->private);
243*4882a593Smuzhiyun bool ext_phy = phy != &dev->phy;
244*4882a593Smuzhiyun
245*4882a593Smuzhiyun if (!phy)
246*4882a593Smuzhiyun return;
247*4882a593Smuzhiyun
248*4882a593Smuzhiyun seq_printf(s, "Radio %d sensitivity: ofdm=%d cck=%d\n", ext_phy,
249*4882a593Smuzhiyun phy->ofdm_sensitivity, phy->cck_sensitivity);
250*4882a593Smuzhiyun seq_printf(s, "Radio %d false CCA: ofdm=%d cck=%d\n", ext_phy,
251*4882a593Smuzhiyun phy->false_cca_ofdm, phy->false_cca_cck);
252*4882a593Smuzhiyun }
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun static int
mt7615_radio_read(struct seq_file * s,void * data)255*4882a593Smuzhiyun mt7615_radio_read(struct seq_file *s, void *data)
256*4882a593Smuzhiyun {
257*4882a593Smuzhiyun struct mt7615_dev *dev = dev_get_drvdata(s->private);
258*4882a593Smuzhiyun
259*4882a593Smuzhiyun mt7615_radio_read_phy(&dev->phy, s);
260*4882a593Smuzhiyun mt7615_radio_read_phy(mt7615_ext_phy(dev), s);
261*4882a593Smuzhiyun
262*4882a593Smuzhiyun return 0;
263*4882a593Smuzhiyun }
264*4882a593Smuzhiyun
mt7615_read_temperature(struct seq_file * s,void * data)265*4882a593Smuzhiyun static int mt7615_read_temperature(struct seq_file *s, void *data)
266*4882a593Smuzhiyun {
267*4882a593Smuzhiyun struct mt7615_dev *dev = dev_get_drvdata(s->private);
268*4882a593Smuzhiyun int temp;
269*4882a593Smuzhiyun
270*4882a593Smuzhiyun if (!mt7615_wait_for_mcu_init(dev))
271*4882a593Smuzhiyun return 0;
272*4882a593Smuzhiyun
273*4882a593Smuzhiyun /* cpu */
274*4882a593Smuzhiyun mt7615_mutex_acquire(dev);
275*4882a593Smuzhiyun temp = mt7615_mcu_get_temperature(dev, 0);
276*4882a593Smuzhiyun mt7615_mutex_release(dev);
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun seq_printf(s, "Temperature: %d\n", temp);
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun return 0;
281*4882a593Smuzhiyun }
282*4882a593Smuzhiyun
283*4882a593Smuzhiyun static int
mt7615_queues_acq(struct seq_file * s,void * data)284*4882a593Smuzhiyun mt7615_queues_acq(struct seq_file *s, void *data)
285*4882a593Smuzhiyun {
286*4882a593Smuzhiyun struct mt7615_dev *dev = dev_get_drvdata(s->private);
287*4882a593Smuzhiyun int i;
288*4882a593Smuzhiyun
289*4882a593Smuzhiyun mt7615_mutex_acquire(dev);
290*4882a593Smuzhiyun
291*4882a593Smuzhiyun for (i = 0; i < 16; i++) {
292*4882a593Smuzhiyun int j, wmm_idx = i % MT7615_MAX_WMM_SETS;
293*4882a593Smuzhiyun int acs = i / MT7615_MAX_WMM_SETS;
294*4882a593Smuzhiyun u32 ctrl, val, qlen = 0;
295*4882a593Smuzhiyun
296*4882a593Smuzhiyun val = mt76_rr(dev, MT_PLE_AC_QEMPTY(acs, wmm_idx));
297*4882a593Smuzhiyun ctrl = BIT(31) | BIT(15) | (acs << 8);
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun for (j = 0; j < 32; j++) {
300*4882a593Smuzhiyun if (val & BIT(j))
301*4882a593Smuzhiyun continue;
302*4882a593Smuzhiyun
303*4882a593Smuzhiyun mt76_wr(dev, MT_PLE_FL_Q0_CTRL,
304*4882a593Smuzhiyun ctrl | (j + (wmm_idx << 5)));
305*4882a593Smuzhiyun qlen += mt76_get_field(dev, MT_PLE_FL_Q3_CTRL,
306*4882a593Smuzhiyun GENMASK(11, 0));
307*4882a593Smuzhiyun }
308*4882a593Smuzhiyun seq_printf(s, "AC%d%d: queued=%d\n", wmm_idx, acs, qlen);
309*4882a593Smuzhiyun }
310*4882a593Smuzhiyun
311*4882a593Smuzhiyun mt7615_mutex_release(dev);
312*4882a593Smuzhiyun
313*4882a593Smuzhiyun return 0;
314*4882a593Smuzhiyun }
315*4882a593Smuzhiyun
316*4882a593Smuzhiyun static int
mt7615_queues_read(struct seq_file * s,void * data)317*4882a593Smuzhiyun mt7615_queues_read(struct seq_file *s, void *data)
318*4882a593Smuzhiyun {
319*4882a593Smuzhiyun struct mt7615_dev *dev = dev_get_drvdata(s->private);
320*4882a593Smuzhiyun static const struct {
321*4882a593Smuzhiyun char *queue;
322*4882a593Smuzhiyun int id;
323*4882a593Smuzhiyun } queue_map[] = {
324*4882a593Smuzhiyun { "PDMA0", MT_TXQ_BE },
325*4882a593Smuzhiyun { "MCUQ", MT_TXQ_MCU },
326*4882a593Smuzhiyun { "MCUFWQ", MT_TXQ_FWDL },
327*4882a593Smuzhiyun };
328*4882a593Smuzhiyun int i;
329*4882a593Smuzhiyun
330*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(queue_map); i++) {
331*4882a593Smuzhiyun struct mt76_queue *q = dev->mt76.q_tx[queue_map[i].id];
332*4882a593Smuzhiyun
333*4882a593Smuzhiyun if (!q)
334*4882a593Smuzhiyun continue;
335*4882a593Smuzhiyun
336*4882a593Smuzhiyun seq_printf(s,
337*4882a593Smuzhiyun "%s: queued=%d head=%d tail=%d\n",
338*4882a593Smuzhiyun queue_map[i].queue, q->queued, q->head,
339*4882a593Smuzhiyun q->tail);
340*4882a593Smuzhiyun }
341*4882a593Smuzhiyun
342*4882a593Smuzhiyun return 0;
343*4882a593Smuzhiyun }
344*4882a593Smuzhiyun
345*4882a593Smuzhiyun static int
mt7615_rf_reg_set(void * data,u64 val)346*4882a593Smuzhiyun mt7615_rf_reg_set(void *data, u64 val)
347*4882a593Smuzhiyun {
348*4882a593Smuzhiyun struct mt7615_dev *dev = data;
349*4882a593Smuzhiyun
350*4882a593Smuzhiyun mt7615_rf_wr(dev, dev->debugfs_rf_wf, dev->debugfs_rf_reg, val);
351*4882a593Smuzhiyun
352*4882a593Smuzhiyun return 0;
353*4882a593Smuzhiyun }
354*4882a593Smuzhiyun
355*4882a593Smuzhiyun static int
mt7615_rf_reg_get(void * data,u64 * val)356*4882a593Smuzhiyun mt7615_rf_reg_get(void *data, u64 *val)
357*4882a593Smuzhiyun {
358*4882a593Smuzhiyun struct mt7615_dev *dev = data;
359*4882a593Smuzhiyun
360*4882a593Smuzhiyun *val = mt7615_rf_rr(dev, dev->debugfs_rf_wf, dev->debugfs_rf_reg);
361*4882a593Smuzhiyun
362*4882a593Smuzhiyun return 0;
363*4882a593Smuzhiyun }
364*4882a593Smuzhiyun
365*4882a593Smuzhiyun DEFINE_DEBUGFS_ATTRIBUTE(fops_rf_reg, mt7615_rf_reg_get, mt7615_rf_reg_set,
366*4882a593Smuzhiyun "0x%08llx\n");
367*4882a593Smuzhiyun
mt7615_init_debugfs(struct mt7615_dev * dev)368*4882a593Smuzhiyun int mt7615_init_debugfs(struct mt7615_dev *dev)
369*4882a593Smuzhiyun {
370*4882a593Smuzhiyun struct dentry *dir;
371*4882a593Smuzhiyun
372*4882a593Smuzhiyun dir = mt76_register_debugfs(&dev->mt76);
373*4882a593Smuzhiyun if (!dir)
374*4882a593Smuzhiyun return -ENOMEM;
375*4882a593Smuzhiyun
376*4882a593Smuzhiyun if (is_mt7615(&dev->mt76))
377*4882a593Smuzhiyun debugfs_create_devm_seqfile(dev->mt76.dev, "xmit-queues", dir,
378*4882a593Smuzhiyun mt7615_queues_read);
379*4882a593Smuzhiyun else
380*4882a593Smuzhiyun debugfs_create_devm_seqfile(dev->mt76.dev, "xmit-queues", dir,
381*4882a593Smuzhiyun mt76_queues_read);
382*4882a593Smuzhiyun debugfs_create_devm_seqfile(dev->mt76.dev, "acq", dir,
383*4882a593Smuzhiyun mt7615_queues_acq);
384*4882a593Smuzhiyun debugfs_create_file("ampdu_stat", 0400, dir, dev, &mt7615_ampdu_stat_fops);
385*4882a593Smuzhiyun debugfs_create_file("scs", 0600, dir, dev, &fops_scs);
386*4882a593Smuzhiyun debugfs_create_file("dbdc", 0600, dir, dev, &fops_dbdc);
387*4882a593Smuzhiyun debugfs_create_file("fw_debug", 0600, dir, dev, &fops_fw_debug);
388*4882a593Smuzhiyun debugfs_create_file("runtime-pm", 0600, dir, dev, &fops_pm);
389*4882a593Smuzhiyun debugfs_create_file("idle-timeout", 0600, dir, dev,
390*4882a593Smuzhiyun &fops_pm_idle_timeout);
391*4882a593Smuzhiyun debugfs_create_devm_seqfile(dev->mt76.dev, "radio", dir,
392*4882a593Smuzhiyun mt7615_radio_read);
393*4882a593Smuzhiyun debugfs_create_u32("dfs_hw_pattern", 0400, dir, &dev->hw_pattern);
394*4882a593Smuzhiyun /* test pattern knobs */
395*4882a593Smuzhiyun debugfs_create_u8("pattern_len", 0600, dir,
396*4882a593Smuzhiyun &dev->radar_pattern.n_pulses);
397*4882a593Smuzhiyun debugfs_create_u32("pulse_period", 0600, dir,
398*4882a593Smuzhiyun &dev->radar_pattern.period);
399*4882a593Smuzhiyun debugfs_create_u16("pulse_width", 0600, dir,
400*4882a593Smuzhiyun &dev->radar_pattern.width);
401*4882a593Smuzhiyun debugfs_create_u16("pulse_power", 0600, dir,
402*4882a593Smuzhiyun &dev->radar_pattern.power);
403*4882a593Smuzhiyun debugfs_create_file("radar_trigger", 0200, dir, dev,
404*4882a593Smuzhiyun &fops_radar_pattern);
405*4882a593Smuzhiyun debugfs_create_file("reset_test", 0200, dir, dev,
406*4882a593Smuzhiyun &fops_reset_test);
407*4882a593Smuzhiyun debugfs_create_devm_seqfile(dev->mt76.dev, "temperature", dir,
408*4882a593Smuzhiyun mt7615_read_temperature);
409*4882a593Smuzhiyun
410*4882a593Smuzhiyun debugfs_create_u32("rf_wfidx", 0600, dir, &dev->debugfs_rf_wf);
411*4882a593Smuzhiyun debugfs_create_u32("rf_regidx", 0600, dir, &dev->debugfs_rf_reg);
412*4882a593Smuzhiyun debugfs_create_file_unsafe("rf_regval", 0600, dir, dev,
413*4882a593Smuzhiyun &fops_rf_reg);
414*4882a593Smuzhiyun
415*4882a593Smuzhiyun return 0;
416*4882a593Smuzhiyun }
417*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(mt7615_init_debugfs);
418