xref: /OK3568_Linux_fs/kernel/drivers/net/wireless/marvell/mwifiex/11n.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * NXP Wireless LAN device driver: 802.11n
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * Copyright 2011-2020 NXP
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  * This software file (the "File") is distributed by NXP
7*4882a593Smuzhiyun  * under the terms of the GNU General Public License Version 2, June 1991
8*4882a593Smuzhiyun  * (the "License").  You may use, redistribute and/or modify this File in
9*4882a593Smuzhiyun  * accordance with the terms and conditions of the License, a copy of which
10*4882a593Smuzhiyun  * is available by writing to the Free Software Foundation, Inc.,
11*4882a593Smuzhiyun  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA or on the
12*4882a593Smuzhiyun  * worldwide web at http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt.
13*4882a593Smuzhiyun  *
14*4882a593Smuzhiyun  * THE FILE IS DISTRIBUTED AS-IS, WITHOUT WARRANTY OF ANY KIND, AND THE
15*4882a593Smuzhiyun  * IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
16*4882a593Smuzhiyun  * ARE EXPRESSLY DISCLAIMED.  The License provides additional details about
17*4882a593Smuzhiyun  * this warranty disclaimer.
18*4882a593Smuzhiyun  */
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun #include "decl.h"
21*4882a593Smuzhiyun #include "ioctl.h"
22*4882a593Smuzhiyun #include "util.h"
23*4882a593Smuzhiyun #include "fw.h"
24*4882a593Smuzhiyun #include "main.h"
25*4882a593Smuzhiyun #include "wmm.h"
26*4882a593Smuzhiyun #include "11n.h"
27*4882a593Smuzhiyun 
28*4882a593Smuzhiyun /*
29*4882a593Smuzhiyun  * Fills HT capability information field, AMPDU Parameters field, HT extended
30*4882a593Smuzhiyun  * capability field, and supported MCS set fields.
31*4882a593Smuzhiyun  *
32*4882a593Smuzhiyun  * HT capability information field, AMPDU Parameters field, supported MCS set
33*4882a593Smuzhiyun  * fields are retrieved from cfg80211 stack
34*4882a593Smuzhiyun  *
35*4882a593Smuzhiyun  * RD responder bit to set to clear in the extended capability header.
36*4882a593Smuzhiyun  */
mwifiex_fill_cap_info(struct mwifiex_private * priv,u8 radio_type,struct ieee80211_ht_cap * ht_cap)37*4882a593Smuzhiyun int mwifiex_fill_cap_info(struct mwifiex_private *priv, u8 radio_type,
38*4882a593Smuzhiyun 			  struct ieee80211_ht_cap *ht_cap)
39*4882a593Smuzhiyun {
40*4882a593Smuzhiyun 	uint16_t ht_ext_cap = le16_to_cpu(ht_cap->extended_ht_cap_info);
41*4882a593Smuzhiyun 	struct ieee80211_supported_band *sband =
42*4882a593Smuzhiyun 					priv->wdev.wiphy->bands[radio_type];
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun 	if (WARN_ON_ONCE(!sband)) {
45*4882a593Smuzhiyun 		mwifiex_dbg(priv->adapter, ERROR, "Invalid radio type!\n");
46*4882a593Smuzhiyun 		return -EINVAL;
47*4882a593Smuzhiyun 	}
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun 	ht_cap->ampdu_params_info =
50*4882a593Smuzhiyun 		(sband->ht_cap.ampdu_factor &
51*4882a593Smuzhiyun 		 IEEE80211_HT_AMPDU_PARM_FACTOR) |
52*4882a593Smuzhiyun 		((sband->ht_cap.ampdu_density <<
53*4882a593Smuzhiyun 		 IEEE80211_HT_AMPDU_PARM_DENSITY_SHIFT) &
54*4882a593Smuzhiyun 		 IEEE80211_HT_AMPDU_PARM_DENSITY);
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun 	memcpy((u8 *)&ht_cap->mcs, &sband->ht_cap.mcs,
57*4882a593Smuzhiyun 	       sizeof(sband->ht_cap.mcs));
58*4882a593Smuzhiyun 
59*4882a593Smuzhiyun 	if (priv->bss_mode == NL80211_IFTYPE_STATION ||
60*4882a593Smuzhiyun 	    (sband->ht_cap.cap & IEEE80211_HT_CAP_SUP_WIDTH_20_40 &&
61*4882a593Smuzhiyun 	     (priv->adapter->sec_chan_offset !=
62*4882a593Smuzhiyun 					IEEE80211_HT_PARAM_CHA_SEC_NONE)))
63*4882a593Smuzhiyun 		/* Set MCS32 for infra mode or ad-hoc mode with 40MHz support */
64*4882a593Smuzhiyun 		SETHT_MCS32(ht_cap->mcs.rx_mask);
65*4882a593Smuzhiyun 
66*4882a593Smuzhiyun 	/* Clear RD responder bit */
67*4882a593Smuzhiyun 	ht_ext_cap &= ~IEEE80211_HT_EXT_CAP_RD_RESPONDER;
68*4882a593Smuzhiyun 
69*4882a593Smuzhiyun 	ht_cap->cap_info = cpu_to_le16(sband->ht_cap.cap);
70*4882a593Smuzhiyun 	ht_cap->extended_ht_cap_info = cpu_to_le16(ht_ext_cap);
71*4882a593Smuzhiyun 
72*4882a593Smuzhiyun 	if (ISSUPP_BEAMFORMING(priv->adapter->hw_dot_11n_dev_cap))
73*4882a593Smuzhiyun 		ht_cap->tx_BF_cap_info = cpu_to_le32(MWIFIEX_DEF_11N_TX_BF_CAP);
74*4882a593Smuzhiyun 
75*4882a593Smuzhiyun 	return 0;
76*4882a593Smuzhiyun }
77*4882a593Smuzhiyun 
78*4882a593Smuzhiyun /*
79*4882a593Smuzhiyun  * This function returns the pointer to an entry in BA Stream
80*4882a593Smuzhiyun  * table which matches the requested BA status.
81*4882a593Smuzhiyun  */
82*4882a593Smuzhiyun static struct mwifiex_tx_ba_stream_tbl *
mwifiex_get_ba_status(struct mwifiex_private * priv,enum mwifiex_ba_status ba_status)83*4882a593Smuzhiyun mwifiex_get_ba_status(struct mwifiex_private *priv,
84*4882a593Smuzhiyun 		      enum mwifiex_ba_status ba_status)
85*4882a593Smuzhiyun {
86*4882a593Smuzhiyun 	struct mwifiex_tx_ba_stream_tbl *tx_ba_tsr_tbl;
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun 	spin_lock_bh(&priv->tx_ba_stream_tbl_lock);
89*4882a593Smuzhiyun 	list_for_each_entry(tx_ba_tsr_tbl, &priv->tx_ba_stream_tbl_ptr, list) {
90*4882a593Smuzhiyun 		if (tx_ba_tsr_tbl->ba_status == ba_status) {
91*4882a593Smuzhiyun 			spin_unlock_bh(&priv->tx_ba_stream_tbl_lock);
92*4882a593Smuzhiyun 			return tx_ba_tsr_tbl;
93*4882a593Smuzhiyun 		}
94*4882a593Smuzhiyun 	}
95*4882a593Smuzhiyun 	spin_unlock_bh(&priv->tx_ba_stream_tbl_lock);
96*4882a593Smuzhiyun 	return NULL;
97*4882a593Smuzhiyun }
98*4882a593Smuzhiyun 
99*4882a593Smuzhiyun /*
100*4882a593Smuzhiyun  * This function handles the command response of delete a block
101*4882a593Smuzhiyun  * ack request.
102*4882a593Smuzhiyun  *
103*4882a593Smuzhiyun  * The function checks the response success status and takes action
104*4882a593Smuzhiyun  * accordingly (send an add BA request in case of success, or recreate
105*4882a593Smuzhiyun  * the deleted stream in case of failure, if the add BA was also
106*4882a593Smuzhiyun  * initiated by us).
107*4882a593Smuzhiyun  */
mwifiex_ret_11n_delba(struct mwifiex_private * priv,struct host_cmd_ds_command * resp)108*4882a593Smuzhiyun int mwifiex_ret_11n_delba(struct mwifiex_private *priv,
109*4882a593Smuzhiyun 			  struct host_cmd_ds_command *resp)
110*4882a593Smuzhiyun {
111*4882a593Smuzhiyun 	int tid;
112*4882a593Smuzhiyun 	struct mwifiex_tx_ba_stream_tbl *tx_ba_tbl;
113*4882a593Smuzhiyun 	struct host_cmd_ds_11n_delba *del_ba = &resp->params.del_ba;
114*4882a593Smuzhiyun 	uint16_t del_ba_param_set = le16_to_cpu(del_ba->del_ba_param_set);
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun 	tid = del_ba_param_set >> DELBA_TID_POS;
117*4882a593Smuzhiyun 	if (del_ba->del_result == BA_RESULT_SUCCESS) {
118*4882a593Smuzhiyun 		mwifiex_del_ba_tbl(priv, tid, del_ba->peer_mac_addr,
119*4882a593Smuzhiyun 				   TYPE_DELBA_SENT,
120*4882a593Smuzhiyun 				   INITIATOR_BIT(del_ba_param_set));
121*4882a593Smuzhiyun 
122*4882a593Smuzhiyun 		tx_ba_tbl = mwifiex_get_ba_status(priv, BA_SETUP_INPROGRESS);
123*4882a593Smuzhiyun 		if (tx_ba_tbl)
124*4882a593Smuzhiyun 			mwifiex_send_addba(priv, tx_ba_tbl->tid,
125*4882a593Smuzhiyun 					   tx_ba_tbl->ra);
126*4882a593Smuzhiyun 	} else { /*
127*4882a593Smuzhiyun 		  * In case of failure, recreate the deleted stream in case
128*4882a593Smuzhiyun 		  * we initiated the ADDBA
129*4882a593Smuzhiyun 		  */
130*4882a593Smuzhiyun 		if (!INITIATOR_BIT(del_ba_param_set))
131*4882a593Smuzhiyun 			return 0;
132*4882a593Smuzhiyun 
133*4882a593Smuzhiyun 		mwifiex_create_ba_tbl(priv, del_ba->peer_mac_addr, tid,
134*4882a593Smuzhiyun 				      BA_SETUP_INPROGRESS);
135*4882a593Smuzhiyun 
136*4882a593Smuzhiyun 		tx_ba_tbl = mwifiex_get_ba_status(priv, BA_SETUP_INPROGRESS);
137*4882a593Smuzhiyun 
138*4882a593Smuzhiyun 		if (tx_ba_tbl)
139*4882a593Smuzhiyun 			mwifiex_del_ba_tbl(priv, tx_ba_tbl->tid, tx_ba_tbl->ra,
140*4882a593Smuzhiyun 					   TYPE_DELBA_SENT, true);
141*4882a593Smuzhiyun 	}
142*4882a593Smuzhiyun 
143*4882a593Smuzhiyun 	return 0;
144*4882a593Smuzhiyun }
145*4882a593Smuzhiyun 
146*4882a593Smuzhiyun /*
147*4882a593Smuzhiyun  * This function handles the command response of add a block
148*4882a593Smuzhiyun  * ack request.
149*4882a593Smuzhiyun  *
150*4882a593Smuzhiyun  * Handling includes changing the header fields to CPU formats, checking
151*4882a593Smuzhiyun  * the response success status and taking actions accordingly (delete the
152*4882a593Smuzhiyun  * BA stream table in case of failure).
153*4882a593Smuzhiyun  */
mwifiex_ret_11n_addba_req(struct mwifiex_private * priv,struct host_cmd_ds_command * resp)154*4882a593Smuzhiyun int mwifiex_ret_11n_addba_req(struct mwifiex_private *priv,
155*4882a593Smuzhiyun 			      struct host_cmd_ds_command *resp)
156*4882a593Smuzhiyun {
157*4882a593Smuzhiyun 	int tid, tid_down;
158*4882a593Smuzhiyun 	struct host_cmd_ds_11n_addba_rsp *add_ba_rsp = &resp->params.add_ba_rsp;
159*4882a593Smuzhiyun 	struct mwifiex_tx_ba_stream_tbl *tx_ba_tbl;
160*4882a593Smuzhiyun 	struct mwifiex_ra_list_tbl *ra_list;
161*4882a593Smuzhiyun 	u16 block_ack_param_set = le16_to_cpu(add_ba_rsp->block_ack_param_set);
162*4882a593Smuzhiyun 
163*4882a593Smuzhiyun 	add_ba_rsp->ssn = cpu_to_le16((le16_to_cpu(add_ba_rsp->ssn))
164*4882a593Smuzhiyun 			& SSN_MASK);
165*4882a593Smuzhiyun 
166*4882a593Smuzhiyun 	tid = (block_ack_param_set & IEEE80211_ADDBA_PARAM_TID_MASK)
167*4882a593Smuzhiyun 	       >> BLOCKACKPARAM_TID_POS;
168*4882a593Smuzhiyun 
169*4882a593Smuzhiyun 	tid_down = mwifiex_wmm_downgrade_tid(priv, tid);
170*4882a593Smuzhiyun 	ra_list = mwifiex_wmm_get_ralist_node(priv, tid_down, add_ba_rsp->
171*4882a593Smuzhiyun 		peer_mac_addr);
172*4882a593Smuzhiyun 	if (le16_to_cpu(add_ba_rsp->status_code) != BA_RESULT_SUCCESS) {
173*4882a593Smuzhiyun 		if (ra_list) {
174*4882a593Smuzhiyun 			ra_list->ba_status = BA_SETUP_NONE;
175*4882a593Smuzhiyun 			ra_list->amsdu_in_ampdu = false;
176*4882a593Smuzhiyun 		}
177*4882a593Smuzhiyun 		mwifiex_del_ba_tbl(priv, tid, add_ba_rsp->peer_mac_addr,
178*4882a593Smuzhiyun 				   TYPE_DELBA_SENT, true);
179*4882a593Smuzhiyun 		if (add_ba_rsp->add_rsp_result != BA_RESULT_TIMEOUT)
180*4882a593Smuzhiyun 			priv->aggr_prio_tbl[tid].ampdu_ap =
181*4882a593Smuzhiyun 				BA_STREAM_NOT_ALLOWED;
182*4882a593Smuzhiyun 		return 0;
183*4882a593Smuzhiyun 	}
184*4882a593Smuzhiyun 
185*4882a593Smuzhiyun 	tx_ba_tbl = mwifiex_get_ba_tbl(priv, tid, add_ba_rsp->peer_mac_addr);
186*4882a593Smuzhiyun 	if (tx_ba_tbl) {
187*4882a593Smuzhiyun 		mwifiex_dbg(priv->adapter, EVENT, "info: BA stream complete\n");
188*4882a593Smuzhiyun 		tx_ba_tbl->ba_status = BA_SETUP_COMPLETE;
189*4882a593Smuzhiyun 		if ((block_ack_param_set & BLOCKACKPARAM_AMSDU_SUPP_MASK) &&
190*4882a593Smuzhiyun 		    priv->add_ba_param.tx_amsdu &&
191*4882a593Smuzhiyun 		    (priv->aggr_prio_tbl[tid].amsdu != BA_STREAM_NOT_ALLOWED))
192*4882a593Smuzhiyun 			tx_ba_tbl->amsdu = true;
193*4882a593Smuzhiyun 		else
194*4882a593Smuzhiyun 			tx_ba_tbl->amsdu = false;
195*4882a593Smuzhiyun 		if (ra_list) {
196*4882a593Smuzhiyun 			ra_list->amsdu_in_ampdu = tx_ba_tbl->amsdu;
197*4882a593Smuzhiyun 			ra_list->ba_status = BA_SETUP_COMPLETE;
198*4882a593Smuzhiyun 		}
199*4882a593Smuzhiyun 	} else {
200*4882a593Smuzhiyun 		mwifiex_dbg(priv->adapter, ERROR, "BA stream not created\n");
201*4882a593Smuzhiyun 	}
202*4882a593Smuzhiyun 
203*4882a593Smuzhiyun 	return 0;
204*4882a593Smuzhiyun }
205*4882a593Smuzhiyun 
206*4882a593Smuzhiyun /*
207*4882a593Smuzhiyun  * This function prepares command of reconfigure Tx buffer.
208*4882a593Smuzhiyun  *
209*4882a593Smuzhiyun  * Preparation includes -
210*4882a593Smuzhiyun  *      - Setting command ID, action and proper size
211*4882a593Smuzhiyun  *      - Setting Tx buffer size (for SET only)
212*4882a593Smuzhiyun  *      - Ensuring correct endian-ness
213*4882a593Smuzhiyun  */
mwifiex_cmd_recfg_tx_buf(struct mwifiex_private * priv,struct host_cmd_ds_command * cmd,int cmd_action,u16 * buf_size)214*4882a593Smuzhiyun int mwifiex_cmd_recfg_tx_buf(struct mwifiex_private *priv,
215*4882a593Smuzhiyun 			     struct host_cmd_ds_command *cmd, int cmd_action,
216*4882a593Smuzhiyun 			     u16 *buf_size)
217*4882a593Smuzhiyun {
218*4882a593Smuzhiyun 	struct host_cmd_ds_txbuf_cfg *tx_buf = &cmd->params.tx_buf;
219*4882a593Smuzhiyun 	u16 action = (u16) cmd_action;
220*4882a593Smuzhiyun 
221*4882a593Smuzhiyun 	cmd->command = cpu_to_le16(HostCmd_CMD_RECONFIGURE_TX_BUFF);
222*4882a593Smuzhiyun 	cmd->size =
223*4882a593Smuzhiyun 		cpu_to_le16(sizeof(struct host_cmd_ds_txbuf_cfg) + S_DS_GEN);
224*4882a593Smuzhiyun 	tx_buf->action = cpu_to_le16(action);
225*4882a593Smuzhiyun 	switch (action) {
226*4882a593Smuzhiyun 	case HostCmd_ACT_GEN_SET:
227*4882a593Smuzhiyun 		mwifiex_dbg(priv->adapter, CMD,
228*4882a593Smuzhiyun 			    "cmd: set tx_buf=%d\n", *buf_size);
229*4882a593Smuzhiyun 		tx_buf->buff_size = cpu_to_le16(*buf_size);
230*4882a593Smuzhiyun 		break;
231*4882a593Smuzhiyun 	case HostCmd_ACT_GEN_GET:
232*4882a593Smuzhiyun 	default:
233*4882a593Smuzhiyun 		tx_buf->buff_size = 0;
234*4882a593Smuzhiyun 		break;
235*4882a593Smuzhiyun 	}
236*4882a593Smuzhiyun 	return 0;
237*4882a593Smuzhiyun }
238*4882a593Smuzhiyun 
239*4882a593Smuzhiyun /*
240*4882a593Smuzhiyun  * This function prepares command of AMSDU aggregation control.
241*4882a593Smuzhiyun  *
242*4882a593Smuzhiyun  * Preparation includes -
243*4882a593Smuzhiyun  *      - Setting command ID, action and proper size
244*4882a593Smuzhiyun  *      - Setting AMSDU control parameters (for SET only)
245*4882a593Smuzhiyun  *      - Ensuring correct endian-ness
246*4882a593Smuzhiyun  */
mwifiex_cmd_amsdu_aggr_ctrl(struct host_cmd_ds_command * cmd,int cmd_action,struct mwifiex_ds_11n_amsdu_aggr_ctrl * aa_ctrl)247*4882a593Smuzhiyun int mwifiex_cmd_amsdu_aggr_ctrl(struct host_cmd_ds_command *cmd,
248*4882a593Smuzhiyun 				int cmd_action,
249*4882a593Smuzhiyun 				struct mwifiex_ds_11n_amsdu_aggr_ctrl *aa_ctrl)
250*4882a593Smuzhiyun {
251*4882a593Smuzhiyun 	struct host_cmd_ds_amsdu_aggr_ctrl *amsdu_ctrl =
252*4882a593Smuzhiyun 		&cmd->params.amsdu_aggr_ctrl;
253*4882a593Smuzhiyun 	u16 action = (u16) cmd_action;
254*4882a593Smuzhiyun 
255*4882a593Smuzhiyun 	cmd->command = cpu_to_le16(HostCmd_CMD_AMSDU_AGGR_CTRL);
256*4882a593Smuzhiyun 	cmd->size = cpu_to_le16(sizeof(struct host_cmd_ds_amsdu_aggr_ctrl)
257*4882a593Smuzhiyun 				+ S_DS_GEN);
258*4882a593Smuzhiyun 	amsdu_ctrl->action = cpu_to_le16(action);
259*4882a593Smuzhiyun 	switch (action) {
260*4882a593Smuzhiyun 	case HostCmd_ACT_GEN_SET:
261*4882a593Smuzhiyun 		amsdu_ctrl->enable = cpu_to_le16(aa_ctrl->enable);
262*4882a593Smuzhiyun 		amsdu_ctrl->curr_buf_size = 0;
263*4882a593Smuzhiyun 		break;
264*4882a593Smuzhiyun 	case HostCmd_ACT_GEN_GET:
265*4882a593Smuzhiyun 	default:
266*4882a593Smuzhiyun 		amsdu_ctrl->curr_buf_size = 0;
267*4882a593Smuzhiyun 		break;
268*4882a593Smuzhiyun 	}
269*4882a593Smuzhiyun 	return 0;
270*4882a593Smuzhiyun }
271*4882a593Smuzhiyun 
272*4882a593Smuzhiyun /*
273*4882a593Smuzhiyun  * This function prepares 11n configuration command.
274*4882a593Smuzhiyun  *
275*4882a593Smuzhiyun  * Preparation includes -
276*4882a593Smuzhiyun  *      - Setting command ID, action and proper size
277*4882a593Smuzhiyun  *      - Setting HT Tx capability and HT Tx information fields
278*4882a593Smuzhiyun  *      - Ensuring correct endian-ness
279*4882a593Smuzhiyun  */
mwifiex_cmd_11n_cfg(struct mwifiex_private * priv,struct host_cmd_ds_command * cmd,u16 cmd_action,struct mwifiex_ds_11n_tx_cfg * txcfg)280*4882a593Smuzhiyun int mwifiex_cmd_11n_cfg(struct mwifiex_private *priv,
281*4882a593Smuzhiyun 			struct host_cmd_ds_command *cmd, u16 cmd_action,
282*4882a593Smuzhiyun 			struct mwifiex_ds_11n_tx_cfg *txcfg)
283*4882a593Smuzhiyun {
284*4882a593Smuzhiyun 	struct host_cmd_ds_11n_cfg *htcfg = &cmd->params.htcfg;
285*4882a593Smuzhiyun 
286*4882a593Smuzhiyun 	cmd->command = cpu_to_le16(HostCmd_CMD_11N_CFG);
287*4882a593Smuzhiyun 	cmd->size = cpu_to_le16(sizeof(struct host_cmd_ds_11n_cfg) + S_DS_GEN);
288*4882a593Smuzhiyun 	htcfg->action = cpu_to_le16(cmd_action);
289*4882a593Smuzhiyun 	htcfg->ht_tx_cap = cpu_to_le16(txcfg->tx_htcap);
290*4882a593Smuzhiyun 	htcfg->ht_tx_info = cpu_to_le16(txcfg->tx_htinfo);
291*4882a593Smuzhiyun 
292*4882a593Smuzhiyun 	if (priv->adapter->is_hw_11ac_capable)
293*4882a593Smuzhiyun 		htcfg->misc_config = cpu_to_le16(txcfg->misc_config);
294*4882a593Smuzhiyun 
295*4882a593Smuzhiyun 	return 0;
296*4882a593Smuzhiyun }
297*4882a593Smuzhiyun 
298*4882a593Smuzhiyun /*
299*4882a593Smuzhiyun  * This function appends an 11n TLV to a buffer.
300*4882a593Smuzhiyun  *
301*4882a593Smuzhiyun  * Buffer allocation is responsibility of the calling
302*4882a593Smuzhiyun  * function. No size validation is made here.
303*4882a593Smuzhiyun  *
304*4882a593Smuzhiyun  * The function fills up the following sections, if applicable -
305*4882a593Smuzhiyun  *      - HT capability IE
306*4882a593Smuzhiyun  *      - HT information IE (with channel list)
307*4882a593Smuzhiyun  *      - 20/40 BSS Coexistence IE
308*4882a593Smuzhiyun  *      - HT Extended Capabilities IE
309*4882a593Smuzhiyun  */
310*4882a593Smuzhiyun int
mwifiex_cmd_append_11n_tlv(struct mwifiex_private * priv,struct mwifiex_bssdescriptor * bss_desc,u8 ** buffer)311*4882a593Smuzhiyun mwifiex_cmd_append_11n_tlv(struct mwifiex_private *priv,
312*4882a593Smuzhiyun 			   struct mwifiex_bssdescriptor *bss_desc,
313*4882a593Smuzhiyun 			   u8 **buffer)
314*4882a593Smuzhiyun {
315*4882a593Smuzhiyun 	struct mwifiex_ie_types_htcap *ht_cap;
316*4882a593Smuzhiyun 	struct mwifiex_ie_types_htinfo *ht_info;
317*4882a593Smuzhiyun 	struct mwifiex_ie_types_chan_list_param_set *chan_list;
318*4882a593Smuzhiyun 	struct mwifiex_ie_types_2040bssco *bss_co_2040;
319*4882a593Smuzhiyun 	struct mwifiex_ie_types_extcap *ext_cap;
320*4882a593Smuzhiyun 	int ret_len = 0;
321*4882a593Smuzhiyun 	struct ieee80211_supported_band *sband;
322*4882a593Smuzhiyun 	struct ieee_types_header *hdr;
323*4882a593Smuzhiyun 	u8 radio_type;
324*4882a593Smuzhiyun 
325*4882a593Smuzhiyun 	if (!buffer || !*buffer)
326*4882a593Smuzhiyun 		return ret_len;
327*4882a593Smuzhiyun 
328*4882a593Smuzhiyun 	radio_type = mwifiex_band_to_radio_type((u8) bss_desc->bss_band);
329*4882a593Smuzhiyun 	sband = priv->wdev.wiphy->bands[radio_type];
330*4882a593Smuzhiyun 
331*4882a593Smuzhiyun 	if (bss_desc->bcn_ht_cap) {
332*4882a593Smuzhiyun 		ht_cap = (struct mwifiex_ie_types_htcap *) *buffer;
333*4882a593Smuzhiyun 		memset(ht_cap, 0, sizeof(struct mwifiex_ie_types_htcap));
334*4882a593Smuzhiyun 		ht_cap->header.type = cpu_to_le16(WLAN_EID_HT_CAPABILITY);
335*4882a593Smuzhiyun 		ht_cap->header.len =
336*4882a593Smuzhiyun 				cpu_to_le16(sizeof(struct ieee80211_ht_cap));
337*4882a593Smuzhiyun 		memcpy((u8 *) ht_cap + sizeof(struct mwifiex_ie_types_header),
338*4882a593Smuzhiyun 		       (u8 *)bss_desc->bcn_ht_cap,
339*4882a593Smuzhiyun 		       le16_to_cpu(ht_cap->header.len));
340*4882a593Smuzhiyun 
341*4882a593Smuzhiyun 		mwifiex_fill_cap_info(priv, radio_type, &ht_cap->ht_cap);
342*4882a593Smuzhiyun 		/* Update HT40 capability from current channel information */
343*4882a593Smuzhiyun 		if (bss_desc->bcn_ht_oper) {
344*4882a593Smuzhiyun 			u8 ht_param = bss_desc->bcn_ht_oper->ht_param;
345*4882a593Smuzhiyun 			u8 radio =
346*4882a593Smuzhiyun 			mwifiex_band_to_radio_type(bss_desc->bss_band);
347*4882a593Smuzhiyun 			int freq =
348*4882a593Smuzhiyun 			ieee80211_channel_to_frequency(bss_desc->channel,
349*4882a593Smuzhiyun 						       radio);
350*4882a593Smuzhiyun 			struct ieee80211_channel *chan =
351*4882a593Smuzhiyun 			ieee80211_get_channel(priv->adapter->wiphy, freq);
352*4882a593Smuzhiyun 
353*4882a593Smuzhiyun 			switch (ht_param & IEEE80211_HT_PARAM_CHA_SEC_OFFSET) {
354*4882a593Smuzhiyun 			case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
355*4882a593Smuzhiyun 				if (chan->flags & IEEE80211_CHAN_NO_HT40PLUS) {
356*4882a593Smuzhiyun 					ht_cap->ht_cap.cap_info &=
357*4882a593Smuzhiyun 					cpu_to_le16
358*4882a593Smuzhiyun 					(~IEEE80211_HT_CAP_SUP_WIDTH_20_40);
359*4882a593Smuzhiyun 					ht_cap->ht_cap.cap_info &=
360*4882a593Smuzhiyun 					cpu_to_le16(~IEEE80211_HT_CAP_SGI_40);
361*4882a593Smuzhiyun 				}
362*4882a593Smuzhiyun 				break;
363*4882a593Smuzhiyun 			case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
364*4882a593Smuzhiyun 				if (chan->flags & IEEE80211_CHAN_NO_HT40MINUS) {
365*4882a593Smuzhiyun 					ht_cap->ht_cap.cap_info &=
366*4882a593Smuzhiyun 					cpu_to_le16
367*4882a593Smuzhiyun 					(~IEEE80211_HT_CAP_SUP_WIDTH_20_40);
368*4882a593Smuzhiyun 					ht_cap->ht_cap.cap_info &=
369*4882a593Smuzhiyun 					cpu_to_le16(~IEEE80211_HT_CAP_SGI_40);
370*4882a593Smuzhiyun 				}
371*4882a593Smuzhiyun 				break;
372*4882a593Smuzhiyun 			}
373*4882a593Smuzhiyun 		}
374*4882a593Smuzhiyun 
375*4882a593Smuzhiyun 		*buffer += sizeof(struct mwifiex_ie_types_htcap);
376*4882a593Smuzhiyun 		ret_len += sizeof(struct mwifiex_ie_types_htcap);
377*4882a593Smuzhiyun 	}
378*4882a593Smuzhiyun 
379*4882a593Smuzhiyun 	if (bss_desc->bcn_ht_oper) {
380*4882a593Smuzhiyun 		if (priv->bss_mode == NL80211_IFTYPE_ADHOC) {
381*4882a593Smuzhiyun 			ht_info = (struct mwifiex_ie_types_htinfo *) *buffer;
382*4882a593Smuzhiyun 			memset(ht_info, 0,
383*4882a593Smuzhiyun 			       sizeof(struct mwifiex_ie_types_htinfo));
384*4882a593Smuzhiyun 			ht_info->header.type =
385*4882a593Smuzhiyun 					cpu_to_le16(WLAN_EID_HT_OPERATION);
386*4882a593Smuzhiyun 			ht_info->header.len =
387*4882a593Smuzhiyun 				cpu_to_le16(
388*4882a593Smuzhiyun 					sizeof(struct ieee80211_ht_operation));
389*4882a593Smuzhiyun 
390*4882a593Smuzhiyun 			memcpy((u8 *) ht_info +
391*4882a593Smuzhiyun 			       sizeof(struct mwifiex_ie_types_header),
392*4882a593Smuzhiyun 			       (u8 *)bss_desc->bcn_ht_oper,
393*4882a593Smuzhiyun 			       le16_to_cpu(ht_info->header.len));
394*4882a593Smuzhiyun 
395*4882a593Smuzhiyun 			if (!(sband->ht_cap.cap &
396*4882a593Smuzhiyun 					IEEE80211_HT_CAP_SUP_WIDTH_20_40))
397*4882a593Smuzhiyun 				ht_info->ht_oper.ht_param &=
398*4882a593Smuzhiyun 					~(IEEE80211_HT_PARAM_CHAN_WIDTH_ANY |
399*4882a593Smuzhiyun 					IEEE80211_HT_PARAM_CHA_SEC_OFFSET);
400*4882a593Smuzhiyun 
401*4882a593Smuzhiyun 			*buffer += sizeof(struct mwifiex_ie_types_htinfo);
402*4882a593Smuzhiyun 			ret_len += sizeof(struct mwifiex_ie_types_htinfo);
403*4882a593Smuzhiyun 		}
404*4882a593Smuzhiyun 
405*4882a593Smuzhiyun 		chan_list =
406*4882a593Smuzhiyun 			(struct mwifiex_ie_types_chan_list_param_set *) *buffer;
407*4882a593Smuzhiyun 		memset(chan_list, 0,
408*4882a593Smuzhiyun 		       sizeof(struct mwifiex_ie_types_chan_list_param_set));
409*4882a593Smuzhiyun 		chan_list->header.type = cpu_to_le16(TLV_TYPE_CHANLIST);
410*4882a593Smuzhiyun 		chan_list->header.len = cpu_to_le16(
411*4882a593Smuzhiyun 			sizeof(struct mwifiex_ie_types_chan_list_param_set) -
412*4882a593Smuzhiyun 			sizeof(struct mwifiex_ie_types_header));
413*4882a593Smuzhiyun 		chan_list->chan_scan_param[0].chan_number =
414*4882a593Smuzhiyun 			bss_desc->bcn_ht_oper->primary_chan;
415*4882a593Smuzhiyun 		chan_list->chan_scan_param[0].radio_type =
416*4882a593Smuzhiyun 			mwifiex_band_to_radio_type((u8) bss_desc->bss_band);
417*4882a593Smuzhiyun 
418*4882a593Smuzhiyun 		if (sband->ht_cap.cap & IEEE80211_HT_CAP_SUP_WIDTH_20_40 &&
419*4882a593Smuzhiyun 		    bss_desc->bcn_ht_oper->ht_param &
420*4882a593Smuzhiyun 		    IEEE80211_HT_PARAM_CHAN_WIDTH_ANY)
421*4882a593Smuzhiyun 			SET_SECONDARYCHAN(chan_list->chan_scan_param[0].
422*4882a593Smuzhiyun 					  radio_type,
423*4882a593Smuzhiyun 					  (bss_desc->bcn_ht_oper->ht_param &
424*4882a593Smuzhiyun 					  IEEE80211_HT_PARAM_CHA_SEC_OFFSET));
425*4882a593Smuzhiyun 
426*4882a593Smuzhiyun 		*buffer += sizeof(struct mwifiex_ie_types_chan_list_param_set);
427*4882a593Smuzhiyun 		ret_len += sizeof(struct mwifiex_ie_types_chan_list_param_set);
428*4882a593Smuzhiyun 	}
429*4882a593Smuzhiyun 
430*4882a593Smuzhiyun 	if (bss_desc->bcn_bss_co_2040) {
431*4882a593Smuzhiyun 		bss_co_2040 = (struct mwifiex_ie_types_2040bssco *) *buffer;
432*4882a593Smuzhiyun 		memset(bss_co_2040, 0,
433*4882a593Smuzhiyun 		       sizeof(struct mwifiex_ie_types_2040bssco));
434*4882a593Smuzhiyun 		bss_co_2040->header.type = cpu_to_le16(WLAN_EID_BSS_COEX_2040);
435*4882a593Smuzhiyun 		bss_co_2040->header.len =
436*4882a593Smuzhiyun 		       cpu_to_le16(sizeof(bss_co_2040->bss_co_2040));
437*4882a593Smuzhiyun 
438*4882a593Smuzhiyun 		memcpy((u8 *) bss_co_2040 +
439*4882a593Smuzhiyun 		       sizeof(struct mwifiex_ie_types_header),
440*4882a593Smuzhiyun 		       bss_desc->bcn_bss_co_2040 +
441*4882a593Smuzhiyun 		       sizeof(struct ieee_types_header),
442*4882a593Smuzhiyun 		       le16_to_cpu(bss_co_2040->header.len));
443*4882a593Smuzhiyun 
444*4882a593Smuzhiyun 		*buffer += sizeof(struct mwifiex_ie_types_2040bssco);
445*4882a593Smuzhiyun 		ret_len += sizeof(struct mwifiex_ie_types_2040bssco);
446*4882a593Smuzhiyun 	}
447*4882a593Smuzhiyun 
448*4882a593Smuzhiyun 	if (bss_desc->bcn_ext_cap) {
449*4882a593Smuzhiyun 		hdr = (void *)bss_desc->bcn_ext_cap;
450*4882a593Smuzhiyun 		ext_cap = (struct mwifiex_ie_types_extcap *) *buffer;
451*4882a593Smuzhiyun 		memset(ext_cap, 0, sizeof(struct mwifiex_ie_types_extcap));
452*4882a593Smuzhiyun 		ext_cap->header.type = cpu_to_le16(WLAN_EID_EXT_CAPABILITY);
453*4882a593Smuzhiyun 		ext_cap->header.len = cpu_to_le16(hdr->len);
454*4882a593Smuzhiyun 
455*4882a593Smuzhiyun 		memcpy((u8 *)ext_cap->ext_capab,
456*4882a593Smuzhiyun 		       bss_desc->bcn_ext_cap + sizeof(struct ieee_types_header),
457*4882a593Smuzhiyun 		       le16_to_cpu(ext_cap->header.len));
458*4882a593Smuzhiyun 
459*4882a593Smuzhiyun 		if (hdr->len > 3 &&
460*4882a593Smuzhiyun 		    ext_cap->ext_capab[3] & WLAN_EXT_CAPA4_INTERWORKING_ENABLED)
461*4882a593Smuzhiyun 			priv->hs2_enabled = true;
462*4882a593Smuzhiyun 		else
463*4882a593Smuzhiyun 			priv->hs2_enabled = false;
464*4882a593Smuzhiyun 
465*4882a593Smuzhiyun 		*buffer += sizeof(struct mwifiex_ie_types_extcap) + hdr->len;
466*4882a593Smuzhiyun 		ret_len += sizeof(struct mwifiex_ie_types_extcap) + hdr->len;
467*4882a593Smuzhiyun 	}
468*4882a593Smuzhiyun 
469*4882a593Smuzhiyun 	return ret_len;
470*4882a593Smuzhiyun }
471*4882a593Smuzhiyun 
472*4882a593Smuzhiyun /*
473*4882a593Smuzhiyun  * This function checks if the given pointer is valid entry of
474*4882a593Smuzhiyun  * Tx BA Stream table.
475*4882a593Smuzhiyun  */
mwifiex_is_tx_ba_stream_ptr_valid(struct mwifiex_private * priv,struct mwifiex_tx_ba_stream_tbl * tx_tbl_ptr)476*4882a593Smuzhiyun static int mwifiex_is_tx_ba_stream_ptr_valid(struct mwifiex_private *priv,
477*4882a593Smuzhiyun 				struct mwifiex_tx_ba_stream_tbl *tx_tbl_ptr)
478*4882a593Smuzhiyun {
479*4882a593Smuzhiyun 	struct mwifiex_tx_ba_stream_tbl *tx_ba_tsr_tbl;
480*4882a593Smuzhiyun 
481*4882a593Smuzhiyun 	list_for_each_entry(tx_ba_tsr_tbl, &priv->tx_ba_stream_tbl_ptr, list) {
482*4882a593Smuzhiyun 		if (tx_ba_tsr_tbl == tx_tbl_ptr)
483*4882a593Smuzhiyun 			return true;
484*4882a593Smuzhiyun 	}
485*4882a593Smuzhiyun 
486*4882a593Smuzhiyun 	return false;
487*4882a593Smuzhiyun }
488*4882a593Smuzhiyun 
489*4882a593Smuzhiyun /*
490*4882a593Smuzhiyun  * This function deletes the given entry in Tx BA Stream table.
491*4882a593Smuzhiyun  *
492*4882a593Smuzhiyun  * The function also performs a validity check on the supplied
493*4882a593Smuzhiyun  * pointer before trying to delete.
494*4882a593Smuzhiyun  */
mwifiex_11n_delete_tx_ba_stream_tbl_entry(struct mwifiex_private * priv,struct mwifiex_tx_ba_stream_tbl * tx_ba_tsr_tbl)495*4882a593Smuzhiyun void mwifiex_11n_delete_tx_ba_stream_tbl_entry(struct mwifiex_private *priv,
496*4882a593Smuzhiyun 				struct mwifiex_tx_ba_stream_tbl *tx_ba_tsr_tbl)
497*4882a593Smuzhiyun {
498*4882a593Smuzhiyun 	if (!tx_ba_tsr_tbl &&
499*4882a593Smuzhiyun 	    mwifiex_is_tx_ba_stream_ptr_valid(priv, tx_ba_tsr_tbl))
500*4882a593Smuzhiyun 		return;
501*4882a593Smuzhiyun 
502*4882a593Smuzhiyun 	mwifiex_dbg(priv->adapter, INFO,
503*4882a593Smuzhiyun 		    "info: tx_ba_tsr_tbl %p\n", tx_ba_tsr_tbl);
504*4882a593Smuzhiyun 
505*4882a593Smuzhiyun 	list_del(&tx_ba_tsr_tbl->list);
506*4882a593Smuzhiyun 
507*4882a593Smuzhiyun 	kfree(tx_ba_tsr_tbl);
508*4882a593Smuzhiyun }
509*4882a593Smuzhiyun 
510*4882a593Smuzhiyun /*
511*4882a593Smuzhiyun  * This function deletes all the entries in Tx BA Stream table.
512*4882a593Smuzhiyun  */
mwifiex_11n_delete_all_tx_ba_stream_tbl(struct mwifiex_private * priv)513*4882a593Smuzhiyun void mwifiex_11n_delete_all_tx_ba_stream_tbl(struct mwifiex_private *priv)
514*4882a593Smuzhiyun {
515*4882a593Smuzhiyun 	int i;
516*4882a593Smuzhiyun 	struct mwifiex_tx_ba_stream_tbl *del_tbl_ptr, *tmp_node;
517*4882a593Smuzhiyun 
518*4882a593Smuzhiyun 	spin_lock_bh(&priv->tx_ba_stream_tbl_lock);
519*4882a593Smuzhiyun 	list_for_each_entry_safe(del_tbl_ptr, tmp_node,
520*4882a593Smuzhiyun 				 &priv->tx_ba_stream_tbl_ptr, list)
521*4882a593Smuzhiyun 		mwifiex_11n_delete_tx_ba_stream_tbl_entry(priv, del_tbl_ptr);
522*4882a593Smuzhiyun 	spin_unlock_bh(&priv->tx_ba_stream_tbl_lock);
523*4882a593Smuzhiyun 
524*4882a593Smuzhiyun 	INIT_LIST_HEAD(&priv->tx_ba_stream_tbl_ptr);
525*4882a593Smuzhiyun 
526*4882a593Smuzhiyun 	for (i = 0; i < MAX_NUM_TID; ++i)
527*4882a593Smuzhiyun 		priv->aggr_prio_tbl[i].ampdu_ap =
528*4882a593Smuzhiyun 			priv->aggr_prio_tbl[i].ampdu_user;
529*4882a593Smuzhiyun }
530*4882a593Smuzhiyun 
531*4882a593Smuzhiyun /*
532*4882a593Smuzhiyun  * This function returns the pointer to an entry in BA Stream
533*4882a593Smuzhiyun  * table which matches the given RA/TID pair.
534*4882a593Smuzhiyun  */
535*4882a593Smuzhiyun struct mwifiex_tx_ba_stream_tbl *
mwifiex_get_ba_tbl(struct mwifiex_private * priv,int tid,u8 * ra)536*4882a593Smuzhiyun mwifiex_get_ba_tbl(struct mwifiex_private *priv, int tid, u8 *ra)
537*4882a593Smuzhiyun {
538*4882a593Smuzhiyun 	struct mwifiex_tx_ba_stream_tbl *tx_ba_tsr_tbl;
539*4882a593Smuzhiyun 
540*4882a593Smuzhiyun 	spin_lock_bh(&priv->tx_ba_stream_tbl_lock);
541*4882a593Smuzhiyun 	list_for_each_entry(tx_ba_tsr_tbl, &priv->tx_ba_stream_tbl_ptr, list) {
542*4882a593Smuzhiyun 		if (ether_addr_equal_unaligned(tx_ba_tsr_tbl->ra, ra) &&
543*4882a593Smuzhiyun 		    tx_ba_tsr_tbl->tid == tid) {
544*4882a593Smuzhiyun 			spin_unlock_bh(&priv->tx_ba_stream_tbl_lock);
545*4882a593Smuzhiyun 			return tx_ba_tsr_tbl;
546*4882a593Smuzhiyun 		}
547*4882a593Smuzhiyun 	}
548*4882a593Smuzhiyun 	spin_unlock_bh(&priv->tx_ba_stream_tbl_lock);
549*4882a593Smuzhiyun 	return NULL;
550*4882a593Smuzhiyun }
551*4882a593Smuzhiyun 
552*4882a593Smuzhiyun /*
553*4882a593Smuzhiyun  * This function creates an entry in Tx BA stream table for the
554*4882a593Smuzhiyun  * given RA/TID pair.
555*4882a593Smuzhiyun  */
mwifiex_create_ba_tbl(struct mwifiex_private * priv,u8 * ra,int tid,enum mwifiex_ba_status ba_status)556*4882a593Smuzhiyun void mwifiex_create_ba_tbl(struct mwifiex_private *priv, u8 *ra, int tid,
557*4882a593Smuzhiyun 			   enum mwifiex_ba_status ba_status)
558*4882a593Smuzhiyun {
559*4882a593Smuzhiyun 	struct mwifiex_tx_ba_stream_tbl *new_node;
560*4882a593Smuzhiyun 	struct mwifiex_ra_list_tbl *ra_list;
561*4882a593Smuzhiyun 	int tid_down;
562*4882a593Smuzhiyun 
563*4882a593Smuzhiyun 	if (!mwifiex_get_ba_tbl(priv, tid, ra)) {
564*4882a593Smuzhiyun 		new_node = kzalloc(sizeof(struct mwifiex_tx_ba_stream_tbl),
565*4882a593Smuzhiyun 				   GFP_ATOMIC);
566*4882a593Smuzhiyun 		if (!new_node)
567*4882a593Smuzhiyun 			return;
568*4882a593Smuzhiyun 
569*4882a593Smuzhiyun 		tid_down = mwifiex_wmm_downgrade_tid(priv, tid);
570*4882a593Smuzhiyun 		ra_list = mwifiex_wmm_get_ralist_node(priv, tid_down, ra);
571*4882a593Smuzhiyun 		if (ra_list) {
572*4882a593Smuzhiyun 			ra_list->ba_status = ba_status;
573*4882a593Smuzhiyun 			ra_list->amsdu_in_ampdu = false;
574*4882a593Smuzhiyun 		}
575*4882a593Smuzhiyun 		INIT_LIST_HEAD(&new_node->list);
576*4882a593Smuzhiyun 
577*4882a593Smuzhiyun 		new_node->tid = tid;
578*4882a593Smuzhiyun 		new_node->ba_status = ba_status;
579*4882a593Smuzhiyun 		memcpy(new_node->ra, ra, ETH_ALEN);
580*4882a593Smuzhiyun 
581*4882a593Smuzhiyun 		spin_lock_bh(&priv->tx_ba_stream_tbl_lock);
582*4882a593Smuzhiyun 		list_add_tail(&new_node->list, &priv->tx_ba_stream_tbl_ptr);
583*4882a593Smuzhiyun 		spin_unlock_bh(&priv->tx_ba_stream_tbl_lock);
584*4882a593Smuzhiyun 	}
585*4882a593Smuzhiyun }
586*4882a593Smuzhiyun 
587*4882a593Smuzhiyun /*
588*4882a593Smuzhiyun  * This function sends an add BA request to the given TID/RA pair.
589*4882a593Smuzhiyun  */
mwifiex_send_addba(struct mwifiex_private * priv,int tid,u8 * peer_mac)590*4882a593Smuzhiyun int mwifiex_send_addba(struct mwifiex_private *priv, int tid, u8 *peer_mac)
591*4882a593Smuzhiyun {
592*4882a593Smuzhiyun 	struct host_cmd_ds_11n_addba_req add_ba_req;
593*4882a593Smuzhiyun 	u32 tx_win_size = priv->add_ba_param.tx_win_size;
594*4882a593Smuzhiyun 	static u8 dialog_tok;
595*4882a593Smuzhiyun 	int ret;
596*4882a593Smuzhiyun 	u16 block_ack_param_set;
597*4882a593Smuzhiyun 
598*4882a593Smuzhiyun 	mwifiex_dbg(priv->adapter, CMD, "cmd: %s: tid %d\n", __func__, tid);
599*4882a593Smuzhiyun 
600*4882a593Smuzhiyun 	memset(&add_ba_req, 0, sizeof(add_ba_req));
601*4882a593Smuzhiyun 
602*4882a593Smuzhiyun 	if ((GET_BSS_ROLE(priv) == MWIFIEX_BSS_ROLE_STA) &&
603*4882a593Smuzhiyun 	    ISSUPP_TDLS_ENABLED(priv->adapter->fw_cap_info) &&
604*4882a593Smuzhiyun 	    priv->adapter->is_hw_11ac_capable &&
605*4882a593Smuzhiyun 	    memcmp(priv->cfg_bssid, peer_mac, ETH_ALEN)) {
606*4882a593Smuzhiyun 		struct mwifiex_sta_node *sta_ptr;
607*4882a593Smuzhiyun 
608*4882a593Smuzhiyun 		spin_lock_bh(&priv->sta_list_spinlock);
609*4882a593Smuzhiyun 		sta_ptr = mwifiex_get_sta_entry(priv, peer_mac);
610*4882a593Smuzhiyun 		if (!sta_ptr) {
611*4882a593Smuzhiyun 			spin_unlock_bh(&priv->sta_list_spinlock);
612*4882a593Smuzhiyun 			mwifiex_dbg(priv->adapter, ERROR,
613*4882a593Smuzhiyun 				    "BA setup with unknown TDLS peer %pM!\n",
614*4882a593Smuzhiyun 				    peer_mac);
615*4882a593Smuzhiyun 			return -1;
616*4882a593Smuzhiyun 		}
617*4882a593Smuzhiyun 		if (sta_ptr->is_11ac_enabled)
618*4882a593Smuzhiyun 			tx_win_size = MWIFIEX_11AC_STA_AMPDU_DEF_TXWINSIZE;
619*4882a593Smuzhiyun 		spin_unlock_bh(&priv->sta_list_spinlock);
620*4882a593Smuzhiyun 	}
621*4882a593Smuzhiyun 
622*4882a593Smuzhiyun 	block_ack_param_set = (u16)((tid << BLOCKACKPARAM_TID_POS) |
623*4882a593Smuzhiyun 				    tx_win_size << BLOCKACKPARAM_WINSIZE_POS |
624*4882a593Smuzhiyun 				    IMMEDIATE_BLOCK_ACK);
625*4882a593Smuzhiyun 
626*4882a593Smuzhiyun 	/* enable AMSDU inside AMPDU */
627*4882a593Smuzhiyun 	if (priv->add_ba_param.tx_amsdu &&
628*4882a593Smuzhiyun 	    (priv->aggr_prio_tbl[tid].amsdu != BA_STREAM_NOT_ALLOWED))
629*4882a593Smuzhiyun 		block_ack_param_set |= BLOCKACKPARAM_AMSDU_SUPP_MASK;
630*4882a593Smuzhiyun 
631*4882a593Smuzhiyun 	add_ba_req.block_ack_param_set = cpu_to_le16(block_ack_param_set);
632*4882a593Smuzhiyun 	add_ba_req.block_ack_tmo = cpu_to_le16((u16)priv->add_ba_param.timeout);
633*4882a593Smuzhiyun 
634*4882a593Smuzhiyun 	++dialog_tok;
635*4882a593Smuzhiyun 
636*4882a593Smuzhiyun 	if (dialog_tok == 0)
637*4882a593Smuzhiyun 		dialog_tok = 1;
638*4882a593Smuzhiyun 
639*4882a593Smuzhiyun 	add_ba_req.dialog_token = dialog_tok;
640*4882a593Smuzhiyun 	memcpy(&add_ba_req.peer_mac_addr, peer_mac, ETH_ALEN);
641*4882a593Smuzhiyun 
642*4882a593Smuzhiyun 	/* We don't wait for the response of this command */
643*4882a593Smuzhiyun 	ret = mwifiex_send_cmd(priv, HostCmd_CMD_11N_ADDBA_REQ,
644*4882a593Smuzhiyun 			       0, 0, &add_ba_req, false);
645*4882a593Smuzhiyun 
646*4882a593Smuzhiyun 	return ret;
647*4882a593Smuzhiyun }
648*4882a593Smuzhiyun 
649*4882a593Smuzhiyun /*
650*4882a593Smuzhiyun  * This function sends a delete BA request to the given TID/RA pair.
651*4882a593Smuzhiyun  */
mwifiex_send_delba(struct mwifiex_private * priv,int tid,u8 * peer_mac,int initiator)652*4882a593Smuzhiyun int mwifiex_send_delba(struct mwifiex_private *priv, int tid, u8 *peer_mac,
653*4882a593Smuzhiyun 		       int initiator)
654*4882a593Smuzhiyun {
655*4882a593Smuzhiyun 	struct host_cmd_ds_11n_delba delba;
656*4882a593Smuzhiyun 	int ret;
657*4882a593Smuzhiyun 	uint16_t del_ba_param_set;
658*4882a593Smuzhiyun 
659*4882a593Smuzhiyun 	memset(&delba, 0, sizeof(delba));
660*4882a593Smuzhiyun 
661*4882a593Smuzhiyun 	del_ba_param_set = tid << DELBA_TID_POS;
662*4882a593Smuzhiyun 
663*4882a593Smuzhiyun 	if (initiator)
664*4882a593Smuzhiyun 		del_ba_param_set |= IEEE80211_DELBA_PARAM_INITIATOR_MASK;
665*4882a593Smuzhiyun 	else
666*4882a593Smuzhiyun 		del_ba_param_set &= ~IEEE80211_DELBA_PARAM_INITIATOR_MASK;
667*4882a593Smuzhiyun 
668*4882a593Smuzhiyun 	delba.del_ba_param_set = cpu_to_le16(del_ba_param_set);
669*4882a593Smuzhiyun 	memcpy(&delba.peer_mac_addr, peer_mac, ETH_ALEN);
670*4882a593Smuzhiyun 
671*4882a593Smuzhiyun 	/* We don't wait for the response of this command */
672*4882a593Smuzhiyun 	ret = mwifiex_send_cmd(priv, HostCmd_CMD_11N_DELBA,
673*4882a593Smuzhiyun 			       HostCmd_ACT_GEN_SET, 0, &delba, false);
674*4882a593Smuzhiyun 
675*4882a593Smuzhiyun 	return ret;
676*4882a593Smuzhiyun }
677*4882a593Smuzhiyun 
678*4882a593Smuzhiyun /*
679*4882a593Smuzhiyun  * This function sends delba to specific tid
680*4882a593Smuzhiyun  */
mwifiex_11n_delba(struct mwifiex_private * priv,int tid)681*4882a593Smuzhiyun void mwifiex_11n_delba(struct mwifiex_private *priv, int tid)
682*4882a593Smuzhiyun {
683*4882a593Smuzhiyun 	struct mwifiex_rx_reorder_tbl *rx_reor_tbl_ptr;
684*4882a593Smuzhiyun 
685*4882a593Smuzhiyun 	spin_lock_bh(&priv->rx_reorder_tbl_lock);
686*4882a593Smuzhiyun 	list_for_each_entry(rx_reor_tbl_ptr, &priv->rx_reorder_tbl_ptr, list) {
687*4882a593Smuzhiyun 		if (rx_reor_tbl_ptr->tid == tid) {
688*4882a593Smuzhiyun 			dev_dbg(priv->adapter->dev,
689*4882a593Smuzhiyun 				"Send delba to tid=%d, %pM\n",
690*4882a593Smuzhiyun 				tid, rx_reor_tbl_ptr->ta);
691*4882a593Smuzhiyun 			mwifiex_send_delba(priv, tid, rx_reor_tbl_ptr->ta, 0);
692*4882a593Smuzhiyun 			goto exit;
693*4882a593Smuzhiyun 		}
694*4882a593Smuzhiyun 	}
695*4882a593Smuzhiyun exit:
696*4882a593Smuzhiyun 	spin_unlock_bh(&priv->rx_reorder_tbl_lock);
697*4882a593Smuzhiyun }
698*4882a593Smuzhiyun 
699*4882a593Smuzhiyun /*
700*4882a593Smuzhiyun  * This function handles the command response of a delete BA request.
701*4882a593Smuzhiyun  */
mwifiex_11n_delete_ba_stream(struct mwifiex_private * priv,u8 * del_ba)702*4882a593Smuzhiyun void mwifiex_11n_delete_ba_stream(struct mwifiex_private *priv, u8 *del_ba)
703*4882a593Smuzhiyun {
704*4882a593Smuzhiyun 	struct host_cmd_ds_11n_delba *cmd_del_ba =
705*4882a593Smuzhiyun 		(struct host_cmd_ds_11n_delba *) del_ba;
706*4882a593Smuzhiyun 	uint16_t del_ba_param_set = le16_to_cpu(cmd_del_ba->del_ba_param_set);
707*4882a593Smuzhiyun 	int tid;
708*4882a593Smuzhiyun 
709*4882a593Smuzhiyun 	tid = del_ba_param_set >> DELBA_TID_POS;
710*4882a593Smuzhiyun 
711*4882a593Smuzhiyun 	mwifiex_del_ba_tbl(priv, tid, cmd_del_ba->peer_mac_addr,
712*4882a593Smuzhiyun 			   TYPE_DELBA_RECEIVE, INITIATOR_BIT(del_ba_param_set));
713*4882a593Smuzhiyun }
714*4882a593Smuzhiyun 
715*4882a593Smuzhiyun /*
716*4882a593Smuzhiyun  * This function retrieves the Rx reordering table.
717*4882a593Smuzhiyun  */
mwifiex_get_rx_reorder_tbl(struct mwifiex_private * priv,struct mwifiex_ds_rx_reorder_tbl * buf)718*4882a593Smuzhiyun int mwifiex_get_rx_reorder_tbl(struct mwifiex_private *priv,
719*4882a593Smuzhiyun 			       struct mwifiex_ds_rx_reorder_tbl *buf)
720*4882a593Smuzhiyun {
721*4882a593Smuzhiyun 	int i;
722*4882a593Smuzhiyun 	struct mwifiex_ds_rx_reorder_tbl *rx_reo_tbl = buf;
723*4882a593Smuzhiyun 	struct mwifiex_rx_reorder_tbl *rx_reorder_tbl_ptr;
724*4882a593Smuzhiyun 	int count = 0;
725*4882a593Smuzhiyun 
726*4882a593Smuzhiyun 	spin_lock_bh(&priv->rx_reorder_tbl_lock);
727*4882a593Smuzhiyun 	list_for_each_entry(rx_reorder_tbl_ptr, &priv->rx_reorder_tbl_ptr,
728*4882a593Smuzhiyun 			    list) {
729*4882a593Smuzhiyun 		rx_reo_tbl->tid = (u16) rx_reorder_tbl_ptr->tid;
730*4882a593Smuzhiyun 		memcpy(rx_reo_tbl->ta, rx_reorder_tbl_ptr->ta, ETH_ALEN);
731*4882a593Smuzhiyun 		rx_reo_tbl->start_win = rx_reorder_tbl_ptr->start_win;
732*4882a593Smuzhiyun 		rx_reo_tbl->win_size = rx_reorder_tbl_ptr->win_size;
733*4882a593Smuzhiyun 		for (i = 0; i < rx_reorder_tbl_ptr->win_size; ++i) {
734*4882a593Smuzhiyun 			if (rx_reorder_tbl_ptr->rx_reorder_ptr[i])
735*4882a593Smuzhiyun 				rx_reo_tbl->buffer[i] = true;
736*4882a593Smuzhiyun 			else
737*4882a593Smuzhiyun 				rx_reo_tbl->buffer[i] = false;
738*4882a593Smuzhiyun 		}
739*4882a593Smuzhiyun 		rx_reo_tbl++;
740*4882a593Smuzhiyun 		count++;
741*4882a593Smuzhiyun 
742*4882a593Smuzhiyun 		if (count >= MWIFIEX_MAX_RX_BASTREAM_SUPPORTED)
743*4882a593Smuzhiyun 			break;
744*4882a593Smuzhiyun 	}
745*4882a593Smuzhiyun 	spin_unlock_bh(&priv->rx_reorder_tbl_lock);
746*4882a593Smuzhiyun 
747*4882a593Smuzhiyun 	return count;
748*4882a593Smuzhiyun }
749*4882a593Smuzhiyun 
750*4882a593Smuzhiyun /*
751*4882a593Smuzhiyun  * This function retrieves the Tx BA stream table.
752*4882a593Smuzhiyun  */
mwifiex_get_tx_ba_stream_tbl(struct mwifiex_private * priv,struct mwifiex_ds_tx_ba_stream_tbl * buf)753*4882a593Smuzhiyun int mwifiex_get_tx_ba_stream_tbl(struct mwifiex_private *priv,
754*4882a593Smuzhiyun 				 struct mwifiex_ds_tx_ba_stream_tbl *buf)
755*4882a593Smuzhiyun {
756*4882a593Smuzhiyun 	struct mwifiex_tx_ba_stream_tbl *tx_ba_tsr_tbl;
757*4882a593Smuzhiyun 	struct mwifiex_ds_tx_ba_stream_tbl *rx_reo_tbl = buf;
758*4882a593Smuzhiyun 	int count = 0;
759*4882a593Smuzhiyun 
760*4882a593Smuzhiyun 	spin_lock_bh(&priv->tx_ba_stream_tbl_lock);
761*4882a593Smuzhiyun 	list_for_each_entry(tx_ba_tsr_tbl, &priv->tx_ba_stream_tbl_ptr, list) {
762*4882a593Smuzhiyun 		rx_reo_tbl->tid = (u16) tx_ba_tsr_tbl->tid;
763*4882a593Smuzhiyun 		mwifiex_dbg(priv->adapter, DATA, "data: %s tid=%d\n",
764*4882a593Smuzhiyun 			    __func__, rx_reo_tbl->tid);
765*4882a593Smuzhiyun 		memcpy(rx_reo_tbl->ra, tx_ba_tsr_tbl->ra, ETH_ALEN);
766*4882a593Smuzhiyun 		rx_reo_tbl->amsdu = tx_ba_tsr_tbl->amsdu;
767*4882a593Smuzhiyun 		rx_reo_tbl++;
768*4882a593Smuzhiyun 		count++;
769*4882a593Smuzhiyun 		if (count >= MWIFIEX_MAX_TX_BASTREAM_SUPPORTED)
770*4882a593Smuzhiyun 			break;
771*4882a593Smuzhiyun 	}
772*4882a593Smuzhiyun 	spin_unlock_bh(&priv->tx_ba_stream_tbl_lock);
773*4882a593Smuzhiyun 
774*4882a593Smuzhiyun 	return count;
775*4882a593Smuzhiyun }
776*4882a593Smuzhiyun 
777*4882a593Smuzhiyun /*
778*4882a593Smuzhiyun  * This function retrieves the entry for specific tx BA stream table by RA and
779*4882a593Smuzhiyun  * deletes it.
780*4882a593Smuzhiyun  */
mwifiex_del_tx_ba_stream_tbl_by_ra(struct mwifiex_private * priv,u8 * ra)781*4882a593Smuzhiyun void mwifiex_del_tx_ba_stream_tbl_by_ra(struct mwifiex_private *priv, u8 *ra)
782*4882a593Smuzhiyun {
783*4882a593Smuzhiyun 	struct mwifiex_tx_ba_stream_tbl *tbl, *tmp;
784*4882a593Smuzhiyun 
785*4882a593Smuzhiyun 	if (!ra)
786*4882a593Smuzhiyun 		return;
787*4882a593Smuzhiyun 
788*4882a593Smuzhiyun 	spin_lock_bh(&priv->tx_ba_stream_tbl_lock);
789*4882a593Smuzhiyun 	list_for_each_entry_safe(tbl, tmp, &priv->tx_ba_stream_tbl_ptr, list)
790*4882a593Smuzhiyun 		if (!memcmp(tbl->ra, ra, ETH_ALEN))
791*4882a593Smuzhiyun 			mwifiex_11n_delete_tx_ba_stream_tbl_entry(priv, tbl);
792*4882a593Smuzhiyun 	spin_unlock_bh(&priv->tx_ba_stream_tbl_lock);
793*4882a593Smuzhiyun 
794*4882a593Smuzhiyun 	return;
795*4882a593Smuzhiyun }
796*4882a593Smuzhiyun 
797*4882a593Smuzhiyun /* This function initializes the BlockACK setup information for given
798*4882a593Smuzhiyun  * mwifiex_private structure.
799*4882a593Smuzhiyun  */
mwifiex_set_ba_params(struct mwifiex_private * priv)800*4882a593Smuzhiyun void mwifiex_set_ba_params(struct mwifiex_private *priv)
801*4882a593Smuzhiyun {
802*4882a593Smuzhiyun 	priv->add_ba_param.timeout = MWIFIEX_DEFAULT_BLOCK_ACK_TIMEOUT;
803*4882a593Smuzhiyun 
804*4882a593Smuzhiyun 	if (GET_BSS_ROLE(priv) == MWIFIEX_BSS_ROLE_UAP) {
805*4882a593Smuzhiyun 		priv->add_ba_param.tx_win_size =
806*4882a593Smuzhiyun 						MWIFIEX_UAP_AMPDU_DEF_TXWINSIZE;
807*4882a593Smuzhiyun 		priv->add_ba_param.rx_win_size =
808*4882a593Smuzhiyun 						MWIFIEX_UAP_AMPDU_DEF_RXWINSIZE;
809*4882a593Smuzhiyun 	} else {
810*4882a593Smuzhiyun 		priv->add_ba_param.tx_win_size =
811*4882a593Smuzhiyun 						MWIFIEX_STA_AMPDU_DEF_TXWINSIZE;
812*4882a593Smuzhiyun 		priv->add_ba_param.rx_win_size =
813*4882a593Smuzhiyun 						MWIFIEX_STA_AMPDU_DEF_RXWINSIZE;
814*4882a593Smuzhiyun 	}
815*4882a593Smuzhiyun 
816*4882a593Smuzhiyun 	priv->add_ba_param.tx_amsdu = true;
817*4882a593Smuzhiyun 	priv->add_ba_param.rx_amsdu = true;
818*4882a593Smuzhiyun 
819*4882a593Smuzhiyun 	return;
820*4882a593Smuzhiyun }
821*4882a593Smuzhiyun 
mwifiex_get_sec_chan_offset(int chan)822*4882a593Smuzhiyun u8 mwifiex_get_sec_chan_offset(int chan)
823*4882a593Smuzhiyun {
824*4882a593Smuzhiyun 	u8 sec_offset;
825*4882a593Smuzhiyun 
826*4882a593Smuzhiyun 	switch (chan) {
827*4882a593Smuzhiyun 	case 36:
828*4882a593Smuzhiyun 	case 44:
829*4882a593Smuzhiyun 	case 52:
830*4882a593Smuzhiyun 	case 60:
831*4882a593Smuzhiyun 	case 100:
832*4882a593Smuzhiyun 	case 108:
833*4882a593Smuzhiyun 	case 116:
834*4882a593Smuzhiyun 	case 124:
835*4882a593Smuzhiyun 	case 132:
836*4882a593Smuzhiyun 	case 140:
837*4882a593Smuzhiyun 	case 149:
838*4882a593Smuzhiyun 	case 157:
839*4882a593Smuzhiyun 		sec_offset = IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
840*4882a593Smuzhiyun 		break;
841*4882a593Smuzhiyun 	case 40:
842*4882a593Smuzhiyun 	case 48:
843*4882a593Smuzhiyun 	case 56:
844*4882a593Smuzhiyun 	case 64:
845*4882a593Smuzhiyun 	case 104:
846*4882a593Smuzhiyun 	case 112:
847*4882a593Smuzhiyun 	case 120:
848*4882a593Smuzhiyun 	case 128:
849*4882a593Smuzhiyun 	case 136:
850*4882a593Smuzhiyun 	case 144:
851*4882a593Smuzhiyun 	case 153:
852*4882a593Smuzhiyun 	case 161:
853*4882a593Smuzhiyun 		sec_offset = IEEE80211_HT_PARAM_CHA_SEC_BELOW;
854*4882a593Smuzhiyun 		break;
855*4882a593Smuzhiyun 	case 165:
856*4882a593Smuzhiyun 	default:
857*4882a593Smuzhiyun 		sec_offset = IEEE80211_HT_PARAM_CHA_SEC_NONE;
858*4882a593Smuzhiyun 		break;
859*4882a593Smuzhiyun 	}
860*4882a593Smuzhiyun 
861*4882a593Smuzhiyun 	return sec_offset;
862*4882a593Smuzhiyun }
863*4882a593Smuzhiyun 
864*4882a593Smuzhiyun /* This function will send DELBA to entries in the priv's
865*4882a593Smuzhiyun  * Tx BA stream table
866*4882a593Smuzhiyun  */
867*4882a593Smuzhiyun static void
mwifiex_send_delba_txbastream_tbl(struct mwifiex_private * priv,u8 tid)868*4882a593Smuzhiyun mwifiex_send_delba_txbastream_tbl(struct mwifiex_private *priv, u8 tid)
869*4882a593Smuzhiyun {
870*4882a593Smuzhiyun 	struct mwifiex_adapter *adapter = priv->adapter;
871*4882a593Smuzhiyun 	struct mwifiex_tx_ba_stream_tbl *tx_ba_stream_tbl_ptr;
872*4882a593Smuzhiyun 
873*4882a593Smuzhiyun 	list_for_each_entry(tx_ba_stream_tbl_ptr,
874*4882a593Smuzhiyun 			    &priv->tx_ba_stream_tbl_ptr, list) {
875*4882a593Smuzhiyun 		if (tx_ba_stream_tbl_ptr->ba_status == BA_SETUP_COMPLETE) {
876*4882a593Smuzhiyun 			if (tid == tx_ba_stream_tbl_ptr->tid) {
877*4882a593Smuzhiyun 				dev_dbg(adapter->dev,
878*4882a593Smuzhiyun 					"Tx:Send delba to tid=%d, %pM\n", tid,
879*4882a593Smuzhiyun 					tx_ba_stream_tbl_ptr->ra);
880*4882a593Smuzhiyun 				mwifiex_send_delba(priv,
881*4882a593Smuzhiyun 						   tx_ba_stream_tbl_ptr->tid,
882*4882a593Smuzhiyun 						   tx_ba_stream_tbl_ptr->ra, 1);
883*4882a593Smuzhiyun 				return;
884*4882a593Smuzhiyun 			}
885*4882a593Smuzhiyun 		}
886*4882a593Smuzhiyun 	}
887*4882a593Smuzhiyun }
888*4882a593Smuzhiyun 
889*4882a593Smuzhiyun /* This function updates all the tx_win_size
890*4882a593Smuzhiyun  */
mwifiex_update_ampdu_txwinsize(struct mwifiex_adapter * adapter)891*4882a593Smuzhiyun void mwifiex_update_ampdu_txwinsize(struct mwifiex_adapter *adapter)
892*4882a593Smuzhiyun {
893*4882a593Smuzhiyun 	u8 i;
894*4882a593Smuzhiyun 	u32 tx_win_size;
895*4882a593Smuzhiyun 	struct mwifiex_private *priv;
896*4882a593Smuzhiyun 
897*4882a593Smuzhiyun 	for (i = 0; i < adapter->priv_num; i++) {
898*4882a593Smuzhiyun 		if (!adapter->priv[i])
899*4882a593Smuzhiyun 			continue;
900*4882a593Smuzhiyun 		priv = adapter->priv[i];
901*4882a593Smuzhiyun 		tx_win_size = priv->add_ba_param.tx_win_size;
902*4882a593Smuzhiyun 
903*4882a593Smuzhiyun 		if (priv->bss_type == MWIFIEX_BSS_TYPE_STA)
904*4882a593Smuzhiyun 			priv->add_ba_param.tx_win_size =
905*4882a593Smuzhiyun 				MWIFIEX_STA_AMPDU_DEF_TXWINSIZE;
906*4882a593Smuzhiyun 
907*4882a593Smuzhiyun 		if (priv->bss_type == MWIFIEX_BSS_TYPE_P2P)
908*4882a593Smuzhiyun 			priv->add_ba_param.tx_win_size =
909*4882a593Smuzhiyun 				MWIFIEX_STA_AMPDU_DEF_TXWINSIZE;
910*4882a593Smuzhiyun 
911*4882a593Smuzhiyun 		if (priv->bss_type == MWIFIEX_BSS_TYPE_UAP)
912*4882a593Smuzhiyun 			priv->add_ba_param.tx_win_size =
913*4882a593Smuzhiyun 				MWIFIEX_UAP_AMPDU_DEF_TXWINSIZE;
914*4882a593Smuzhiyun 
915*4882a593Smuzhiyun 		if (adapter->coex_win_size) {
916*4882a593Smuzhiyun 			if (adapter->coex_tx_win_size)
917*4882a593Smuzhiyun 				priv->add_ba_param.tx_win_size =
918*4882a593Smuzhiyun 					adapter->coex_tx_win_size;
919*4882a593Smuzhiyun 		}
920*4882a593Smuzhiyun 
921*4882a593Smuzhiyun 		if (tx_win_size != priv->add_ba_param.tx_win_size) {
922*4882a593Smuzhiyun 			if (!priv->media_connected)
923*4882a593Smuzhiyun 				continue;
924*4882a593Smuzhiyun 			for (i = 0; i < MAX_NUM_TID; i++)
925*4882a593Smuzhiyun 				mwifiex_send_delba_txbastream_tbl(priv, i);
926*4882a593Smuzhiyun 		}
927*4882a593Smuzhiyun 	}
928*4882a593Smuzhiyun }
929