xref: /OK3568_Linux_fs/kernel/drivers/net/wireless/intersil/p54/txrx.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Common code for mac80211 Prism54 drivers
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
6*4882a593Smuzhiyun  * Copyright (c) 2007-2009, Christian Lamparter <chunkeey@web.de>
7*4882a593Smuzhiyun  * Copyright 2008, Johannes Berg <johannes@sipsolutions.net>
8*4882a593Smuzhiyun  *
9*4882a593Smuzhiyun  * Based on:
10*4882a593Smuzhiyun  * - the islsm (softmac prism54) driver, which is:
11*4882a593Smuzhiyun  *   Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al.
12*4882a593Smuzhiyun  * - stlc45xx driver
13*4882a593Smuzhiyun  *   Copyright (C) 2008 Nokia Corporation and/or its subsidiary(-ies).
14*4882a593Smuzhiyun  */
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun #include <linux/export.h>
17*4882a593Smuzhiyun #include <linux/firmware.h>
18*4882a593Smuzhiyun #include <linux/etherdevice.h>
19*4882a593Smuzhiyun #include <asm/div64.h>
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun #include <net/mac80211.h>
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun #include "p54.h"
24*4882a593Smuzhiyun #include "lmac.h"
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun #ifdef P54_MM_DEBUG
p54_dump_tx_queue(struct p54_common * priv)27*4882a593Smuzhiyun static void p54_dump_tx_queue(struct p54_common *priv)
28*4882a593Smuzhiyun {
29*4882a593Smuzhiyun 	unsigned long flags;
30*4882a593Smuzhiyun 	struct ieee80211_tx_info *info;
31*4882a593Smuzhiyun 	struct p54_tx_info *range;
32*4882a593Smuzhiyun 	struct sk_buff *skb;
33*4882a593Smuzhiyun 	struct p54_hdr *hdr;
34*4882a593Smuzhiyun 	unsigned int i = 0;
35*4882a593Smuzhiyun 	u32 prev_addr;
36*4882a593Smuzhiyun 	u32 largest_hole = 0, free;
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun 	spin_lock_irqsave(&priv->tx_queue.lock, flags);
39*4882a593Smuzhiyun 	wiphy_debug(priv->hw->wiphy, "/ --- tx queue dump (%d entries) ---\n",
40*4882a593Smuzhiyun 		    skb_queue_len(&priv->tx_queue));
41*4882a593Smuzhiyun 
42*4882a593Smuzhiyun 	prev_addr = priv->rx_start;
43*4882a593Smuzhiyun 	skb_queue_walk(&priv->tx_queue, skb) {
44*4882a593Smuzhiyun 		info = IEEE80211_SKB_CB(skb);
45*4882a593Smuzhiyun 		range = (void *) info->rate_driver_data;
46*4882a593Smuzhiyun 		hdr = (void *) skb->data;
47*4882a593Smuzhiyun 
48*4882a593Smuzhiyun 		free = range->start_addr - prev_addr;
49*4882a593Smuzhiyun 		wiphy_debug(priv->hw->wiphy,
50*4882a593Smuzhiyun 			    "| [%02d] => [skb:%p skb_len:0x%04x "
51*4882a593Smuzhiyun 			    "hdr:{flags:%02x len:%04x req_id:%04x type:%02x} "
52*4882a593Smuzhiyun 			    "mem:{start:%04x end:%04x, free:%d}]\n",
53*4882a593Smuzhiyun 			    i++, skb, skb->len,
54*4882a593Smuzhiyun 			    le16_to_cpu(hdr->flags), le16_to_cpu(hdr->len),
55*4882a593Smuzhiyun 			    le32_to_cpu(hdr->req_id), le16_to_cpu(hdr->type),
56*4882a593Smuzhiyun 			    range->start_addr, range->end_addr, free);
57*4882a593Smuzhiyun 
58*4882a593Smuzhiyun 		prev_addr = range->end_addr;
59*4882a593Smuzhiyun 		largest_hole = max(largest_hole, free);
60*4882a593Smuzhiyun 	}
61*4882a593Smuzhiyun 	free = priv->rx_end - prev_addr;
62*4882a593Smuzhiyun 	largest_hole = max(largest_hole, free);
63*4882a593Smuzhiyun 	wiphy_debug(priv->hw->wiphy,
64*4882a593Smuzhiyun 		    "\\ --- [free: %d], largest free block: %d ---\n",
65*4882a593Smuzhiyun 		    free, largest_hole);
66*4882a593Smuzhiyun 	spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
67*4882a593Smuzhiyun }
68*4882a593Smuzhiyun #endif /* P54_MM_DEBUG */
69*4882a593Smuzhiyun 
70*4882a593Smuzhiyun /*
71*4882a593Smuzhiyun  * So, the firmware is somewhat stupid and doesn't know what places in its
72*4882a593Smuzhiyun  * memory incoming data should go to. By poking around in the firmware, we
73*4882a593Smuzhiyun  * can find some unused memory to upload our packets to. However, data that we
74*4882a593Smuzhiyun  * want the card to TX needs to stay intact until the card has told us that
75*4882a593Smuzhiyun  * it is done with it. This function finds empty places we can upload to and
76*4882a593Smuzhiyun  * marks allocated areas as reserved if necessary. p54_find_and_unlink_skb or
77*4882a593Smuzhiyun  * p54_free_skb frees allocated areas.
78*4882a593Smuzhiyun  */
p54_assign_address(struct p54_common * priv,struct sk_buff * skb)79*4882a593Smuzhiyun static int p54_assign_address(struct p54_common *priv, struct sk_buff *skb)
80*4882a593Smuzhiyun {
81*4882a593Smuzhiyun 	struct sk_buff *entry, *target_skb = NULL;
82*4882a593Smuzhiyun 	struct ieee80211_tx_info *info;
83*4882a593Smuzhiyun 	struct p54_tx_info *range;
84*4882a593Smuzhiyun 	struct p54_hdr *data = (void *) skb->data;
85*4882a593Smuzhiyun 	unsigned long flags;
86*4882a593Smuzhiyun 	u32 last_addr = priv->rx_start;
87*4882a593Smuzhiyun 	u32 target_addr = priv->rx_start;
88*4882a593Smuzhiyun 	u16 len = priv->headroom + skb->len + priv->tailroom + 3;
89*4882a593Smuzhiyun 
90*4882a593Smuzhiyun 	info = IEEE80211_SKB_CB(skb);
91*4882a593Smuzhiyun 	range = (void *) info->rate_driver_data;
92*4882a593Smuzhiyun 	len = (range->extra_len + len) & ~0x3;
93*4882a593Smuzhiyun 
94*4882a593Smuzhiyun 	spin_lock_irqsave(&priv->tx_queue.lock, flags);
95*4882a593Smuzhiyun 	if (unlikely(skb_queue_len(&priv->tx_queue) == 32)) {
96*4882a593Smuzhiyun 		/*
97*4882a593Smuzhiyun 		 * The tx_queue is now really full.
98*4882a593Smuzhiyun 		 *
99*4882a593Smuzhiyun 		 * TODO: check if the device has crashed and reset it.
100*4882a593Smuzhiyun 		 */
101*4882a593Smuzhiyun 		spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
102*4882a593Smuzhiyun 		return -EBUSY;
103*4882a593Smuzhiyun 	}
104*4882a593Smuzhiyun 
105*4882a593Smuzhiyun 	skb_queue_walk(&priv->tx_queue, entry) {
106*4882a593Smuzhiyun 		u32 hole_size;
107*4882a593Smuzhiyun 		info = IEEE80211_SKB_CB(entry);
108*4882a593Smuzhiyun 		range = (void *) info->rate_driver_data;
109*4882a593Smuzhiyun 		hole_size = range->start_addr - last_addr;
110*4882a593Smuzhiyun 
111*4882a593Smuzhiyun 		if (!target_skb && hole_size >= len) {
112*4882a593Smuzhiyun 			target_skb = entry->prev;
113*4882a593Smuzhiyun 			hole_size -= len;
114*4882a593Smuzhiyun 			target_addr = last_addr;
115*4882a593Smuzhiyun 			break;
116*4882a593Smuzhiyun 		}
117*4882a593Smuzhiyun 		last_addr = range->end_addr;
118*4882a593Smuzhiyun 	}
119*4882a593Smuzhiyun 	if (unlikely(!target_skb)) {
120*4882a593Smuzhiyun 		if (priv->rx_end - last_addr >= len) {
121*4882a593Smuzhiyun 			target_skb = skb_peek_tail(&priv->tx_queue);
122*4882a593Smuzhiyun 			if (target_skb) {
123*4882a593Smuzhiyun 				info = IEEE80211_SKB_CB(target_skb);
124*4882a593Smuzhiyun 				range = (void *)info->rate_driver_data;
125*4882a593Smuzhiyun 				target_addr = range->end_addr;
126*4882a593Smuzhiyun 			}
127*4882a593Smuzhiyun 		} else {
128*4882a593Smuzhiyun 			spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
129*4882a593Smuzhiyun 			return -ENOSPC;
130*4882a593Smuzhiyun 		}
131*4882a593Smuzhiyun 	}
132*4882a593Smuzhiyun 
133*4882a593Smuzhiyun 	info = IEEE80211_SKB_CB(skb);
134*4882a593Smuzhiyun 	range = (void *) info->rate_driver_data;
135*4882a593Smuzhiyun 	range->start_addr = target_addr;
136*4882a593Smuzhiyun 	range->end_addr = target_addr + len;
137*4882a593Smuzhiyun 	data->req_id = cpu_to_le32(target_addr + priv->headroom);
138*4882a593Smuzhiyun 	if (IS_DATA_FRAME(skb) &&
139*4882a593Smuzhiyun 	    unlikely(GET_HW_QUEUE(skb) == P54_QUEUE_BEACON))
140*4882a593Smuzhiyun 		priv->beacon_req_id = data->req_id;
141*4882a593Smuzhiyun 
142*4882a593Smuzhiyun 	if (target_skb)
143*4882a593Smuzhiyun 		__skb_queue_after(&priv->tx_queue, target_skb, skb);
144*4882a593Smuzhiyun 	else
145*4882a593Smuzhiyun 		__skb_queue_head(&priv->tx_queue, skb);
146*4882a593Smuzhiyun 	spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
147*4882a593Smuzhiyun 	return 0;
148*4882a593Smuzhiyun }
149*4882a593Smuzhiyun 
p54_tx_pending(struct p54_common * priv)150*4882a593Smuzhiyun static void p54_tx_pending(struct p54_common *priv)
151*4882a593Smuzhiyun {
152*4882a593Smuzhiyun 	struct sk_buff *skb;
153*4882a593Smuzhiyun 	int ret;
154*4882a593Smuzhiyun 
155*4882a593Smuzhiyun 	skb = skb_dequeue(&priv->tx_pending);
156*4882a593Smuzhiyun 	if (unlikely(!skb))
157*4882a593Smuzhiyun 		return ;
158*4882a593Smuzhiyun 
159*4882a593Smuzhiyun 	ret = p54_assign_address(priv, skb);
160*4882a593Smuzhiyun 	if (unlikely(ret))
161*4882a593Smuzhiyun 		skb_queue_head(&priv->tx_pending, skb);
162*4882a593Smuzhiyun 	else
163*4882a593Smuzhiyun 		priv->tx(priv->hw, skb);
164*4882a593Smuzhiyun }
165*4882a593Smuzhiyun 
p54_wake_queues(struct p54_common * priv)166*4882a593Smuzhiyun static void p54_wake_queues(struct p54_common *priv)
167*4882a593Smuzhiyun {
168*4882a593Smuzhiyun 	unsigned long flags;
169*4882a593Smuzhiyun 	unsigned int i;
170*4882a593Smuzhiyun 
171*4882a593Smuzhiyun 	if (unlikely(priv->mode == NL80211_IFTYPE_UNSPECIFIED))
172*4882a593Smuzhiyun 		return ;
173*4882a593Smuzhiyun 
174*4882a593Smuzhiyun 	p54_tx_pending(priv);
175*4882a593Smuzhiyun 
176*4882a593Smuzhiyun 	spin_lock_irqsave(&priv->tx_stats_lock, flags);
177*4882a593Smuzhiyun 	for (i = 0; i < priv->hw->queues; i++) {
178*4882a593Smuzhiyun 		if (priv->tx_stats[i + P54_QUEUE_DATA].len <
179*4882a593Smuzhiyun 		    priv->tx_stats[i + P54_QUEUE_DATA].limit)
180*4882a593Smuzhiyun 			ieee80211_wake_queue(priv->hw, i);
181*4882a593Smuzhiyun 	}
182*4882a593Smuzhiyun 	spin_unlock_irqrestore(&priv->tx_stats_lock, flags);
183*4882a593Smuzhiyun }
184*4882a593Smuzhiyun 
p54_tx_qos_accounting_alloc(struct p54_common * priv,struct sk_buff * skb,const u16 p54_queue)185*4882a593Smuzhiyun static int p54_tx_qos_accounting_alloc(struct p54_common *priv,
186*4882a593Smuzhiyun 				       struct sk_buff *skb,
187*4882a593Smuzhiyun 				       const u16 p54_queue)
188*4882a593Smuzhiyun {
189*4882a593Smuzhiyun 	struct p54_tx_queue_stats *queue;
190*4882a593Smuzhiyun 	unsigned long flags;
191*4882a593Smuzhiyun 
192*4882a593Smuzhiyun 	if (WARN_ON(p54_queue >= P54_QUEUE_NUM))
193*4882a593Smuzhiyun 		return -EINVAL;
194*4882a593Smuzhiyun 
195*4882a593Smuzhiyun 	queue = &priv->tx_stats[p54_queue];
196*4882a593Smuzhiyun 
197*4882a593Smuzhiyun 	spin_lock_irqsave(&priv->tx_stats_lock, flags);
198*4882a593Smuzhiyun 	if (unlikely(queue->len >= queue->limit && IS_QOS_QUEUE(p54_queue))) {
199*4882a593Smuzhiyun 		spin_unlock_irqrestore(&priv->tx_stats_lock, flags);
200*4882a593Smuzhiyun 		return -ENOSPC;
201*4882a593Smuzhiyun 	}
202*4882a593Smuzhiyun 
203*4882a593Smuzhiyun 	queue->len++;
204*4882a593Smuzhiyun 	queue->count++;
205*4882a593Smuzhiyun 
206*4882a593Smuzhiyun 	if (unlikely(queue->len == queue->limit && IS_QOS_QUEUE(p54_queue))) {
207*4882a593Smuzhiyun 		u16 ac_queue = p54_queue - P54_QUEUE_DATA;
208*4882a593Smuzhiyun 		ieee80211_stop_queue(priv->hw, ac_queue);
209*4882a593Smuzhiyun 	}
210*4882a593Smuzhiyun 
211*4882a593Smuzhiyun 	spin_unlock_irqrestore(&priv->tx_stats_lock, flags);
212*4882a593Smuzhiyun 	return 0;
213*4882a593Smuzhiyun }
214*4882a593Smuzhiyun 
p54_tx_qos_accounting_free(struct p54_common * priv,struct sk_buff * skb)215*4882a593Smuzhiyun static void p54_tx_qos_accounting_free(struct p54_common *priv,
216*4882a593Smuzhiyun 				       struct sk_buff *skb)
217*4882a593Smuzhiyun {
218*4882a593Smuzhiyun 	if (IS_DATA_FRAME(skb)) {
219*4882a593Smuzhiyun 		unsigned long flags;
220*4882a593Smuzhiyun 
221*4882a593Smuzhiyun 		spin_lock_irqsave(&priv->tx_stats_lock, flags);
222*4882a593Smuzhiyun 		priv->tx_stats[GET_HW_QUEUE(skb)].len--;
223*4882a593Smuzhiyun 		spin_unlock_irqrestore(&priv->tx_stats_lock, flags);
224*4882a593Smuzhiyun 
225*4882a593Smuzhiyun 		if (unlikely(GET_HW_QUEUE(skb) == P54_QUEUE_BEACON)) {
226*4882a593Smuzhiyun 			if (priv->beacon_req_id == GET_REQ_ID(skb)) {
227*4882a593Smuzhiyun 				/* this is the  active beacon set anymore */
228*4882a593Smuzhiyun 				priv->beacon_req_id = 0;
229*4882a593Smuzhiyun 			}
230*4882a593Smuzhiyun 			complete(&priv->beacon_comp);
231*4882a593Smuzhiyun 		}
232*4882a593Smuzhiyun 	}
233*4882a593Smuzhiyun 	p54_wake_queues(priv);
234*4882a593Smuzhiyun }
235*4882a593Smuzhiyun 
p54_free_skb(struct ieee80211_hw * dev,struct sk_buff * skb)236*4882a593Smuzhiyun void p54_free_skb(struct ieee80211_hw *dev, struct sk_buff *skb)
237*4882a593Smuzhiyun {
238*4882a593Smuzhiyun 	struct p54_common *priv = dev->priv;
239*4882a593Smuzhiyun 	if (unlikely(!skb))
240*4882a593Smuzhiyun 		return ;
241*4882a593Smuzhiyun 
242*4882a593Smuzhiyun 	skb_unlink(skb, &priv->tx_queue);
243*4882a593Smuzhiyun 	p54_tx_qos_accounting_free(priv, skb);
244*4882a593Smuzhiyun 	ieee80211_free_txskb(dev, skb);
245*4882a593Smuzhiyun }
246*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(p54_free_skb);
247*4882a593Smuzhiyun 
p54_find_and_unlink_skb(struct p54_common * priv,const __le32 req_id)248*4882a593Smuzhiyun static struct sk_buff *p54_find_and_unlink_skb(struct p54_common *priv,
249*4882a593Smuzhiyun 					       const __le32 req_id)
250*4882a593Smuzhiyun {
251*4882a593Smuzhiyun 	struct sk_buff *entry;
252*4882a593Smuzhiyun 	unsigned long flags;
253*4882a593Smuzhiyun 
254*4882a593Smuzhiyun 	spin_lock_irqsave(&priv->tx_queue.lock, flags);
255*4882a593Smuzhiyun 	skb_queue_walk(&priv->tx_queue, entry) {
256*4882a593Smuzhiyun 		struct p54_hdr *hdr = (struct p54_hdr *) entry->data;
257*4882a593Smuzhiyun 
258*4882a593Smuzhiyun 		if (hdr->req_id == req_id) {
259*4882a593Smuzhiyun 			__skb_unlink(entry, &priv->tx_queue);
260*4882a593Smuzhiyun 			spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
261*4882a593Smuzhiyun 			p54_tx_qos_accounting_free(priv, entry);
262*4882a593Smuzhiyun 			return entry;
263*4882a593Smuzhiyun 		}
264*4882a593Smuzhiyun 	}
265*4882a593Smuzhiyun 	spin_unlock_irqrestore(&priv->tx_queue.lock, flags);
266*4882a593Smuzhiyun 	return NULL;
267*4882a593Smuzhiyun }
268*4882a593Smuzhiyun 
p54_tx(struct p54_common * priv,struct sk_buff * skb)269*4882a593Smuzhiyun void p54_tx(struct p54_common *priv, struct sk_buff *skb)
270*4882a593Smuzhiyun {
271*4882a593Smuzhiyun 	skb_queue_tail(&priv->tx_pending, skb);
272*4882a593Smuzhiyun 	p54_tx_pending(priv);
273*4882a593Smuzhiyun }
274*4882a593Smuzhiyun 
p54_rssi_to_dbm(struct p54_common * priv,int rssi)275*4882a593Smuzhiyun static int p54_rssi_to_dbm(struct p54_common *priv, int rssi)
276*4882a593Smuzhiyun {
277*4882a593Smuzhiyun 	if (priv->rxhw != 5) {
278*4882a593Smuzhiyun 		return ((rssi * priv->cur_rssi->mul) / 64 +
279*4882a593Smuzhiyun 			 priv->cur_rssi->add) / 4;
280*4882a593Smuzhiyun 	} else {
281*4882a593Smuzhiyun 		/*
282*4882a593Smuzhiyun 		 * TODO: find the correct formula
283*4882a593Smuzhiyun 		 */
284*4882a593Smuzhiyun 		return rssi / 2 - 110;
285*4882a593Smuzhiyun 	}
286*4882a593Smuzhiyun }
287*4882a593Smuzhiyun 
288*4882a593Smuzhiyun /*
289*4882a593Smuzhiyun  * Even if the firmware is capable of dealing with incoming traffic,
290*4882a593Smuzhiyun  * while dozing, we have to prepared in case mac80211 uses PS-POLL
291*4882a593Smuzhiyun  * to retrieve outstanding frames from our AP.
292*4882a593Smuzhiyun  * (see comment in net/mac80211/mlme.c @ line 1993)
293*4882a593Smuzhiyun  */
p54_pspoll_workaround(struct p54_common * priv,struct sk_buff * skb)294*4882a593Smuzhiyun static void p54_pspoll_workaround(struct p54_common *priv, struct sk_buff *skb)
295*4882a593Smuzhiyun {
296*4882a593Smuzhiyun 	struct ieee80211_hdr *hdr = (void *) skb->data;
297*4882a593Smuzhiyun 	struct ieee80211_tim_ie *tim_ie;
298*4882a593Smuzhiyun 	u8 *tim;
299*4882a593Smuzhiyun 	u8 tim_len;
300*4882a593Smuzhiyun 	bool new_psm;
301*4882a593Smuzhiyun 
302*4882a593Smuzhiyun 	/* only beacons have a TIM IE */
303*4882a593Smuzhiyun 	if (!ieee80211_is_beacon(hdr->frame_control))
304*4882a593Smuzhiyun 		return;
305*4882a593Smuzhiyun 
306*4882a593Smuzhiyun 	if (!priv->aid)
307*4882a593Smuzhiyun 		return;
308*4882a593Smuzhiyun 
309*4882a593Smuzhiyun 	/* only consider beacons from the associated BSSID */
310*4882a593Smuzhiyun 	if (!ether_addr_equal_64bits(hdr->addr3, priv->bssid))
311*4882a593Smuzhiyun 		return;
312*4882a593Smuzhiyun 
313*4882a593Smuzhiyun 	tim = p54_find_ie(skb, WLAN_EID_TIM);
314*4882a593Smuzhiyun 	if (!tim)
315*4882a593Smuzhiyun 		return;
316*4882a593Smuzhiyun 
317*4882a593Smuzhiyun 	tim_len = tim[1];
318*4882a593Smuzhiyun 	tim_ie = (struct ieee80211_tim_ie *) &tim[2];
319*4882a593Smuzhiyun 
320*4882a593Smuzhiyun 	new_psm = ieee80211_check_tim(tim_ie, tim_len, priv->aid);
321*4882a593Smuzhiyun 	if (new_psm != priv->powersave_override) {
322*4882a593Smuzhiyun 		priv->powersave_override = new_psm;
323*4882a593Smuzhiyun 		p54_set_ps(priv);
324*4882a593Smuzhiyun 	}
325*4882a593Smuzhiyun }
326*4882a593Smuzhiyun 
p54_rx_data(struct p54_common * priv,struct sk_buff * skb)327*4882a593Smuzhiyun static int p54_rx_data(struct p54_common *priv, struct sk_buff *skb)
328*4882a593Smuzhiyun {
329*4882a593Smuzhiyun 	struct p54_rx_data *hdr = (struct p54_rx_data *) skb->data;
330*4882a593Smuzhiyun 	struct ieee80211_rx_status *rx_status = IEEE80211_SKB_RXCB(skb);
331*4882a593Smuzhiyun 	u16 freq = le16_to_cpu(hdr->freq);
332*4882a593Smuzhiyun 	size_t header_len = sizeof(*hdr);
333*4882a593Smuzhiyun 	u32 tsf32;
334*4882a593Smuzhiyun 	__le16 fc;
335*4882a593Smuzhiyun 	u8 rate = hdr->rate & 0xf;
336*4882a593Smuzhiyun 
337*4882a593Smuzhiyun 	/*
338*4882a593Smuzhiyun 	 * If the device is in a unspecified state we have to
339*4882a593Smuzhiyun 	 * ignore all data frames. Else we could end up with a
340*4882a593Smuzhiyun 	 * nasty crash.
341*4882a593Smuzhiyun 	 */
342*4882a593Smuzhiyun 	if (unlikely(priv->mode == NL80211_IFTYPE_UNSPECIFIED))
343*4882a593Smuzhiyun 		return 0;
344*4882a593Smuzhiyun 
345*4882a593Smuzhiyun 	if (!(hdr->flags & cpu_to_le16(P54_HDR_FLAG_DATA_IN_FCS_GOOD)))
346*4882a593Smuzhiyun 		return 0;
347*4882a593Smuzhiyun 
348*4882a593Smuzhiyun 	if (hdr->decrypt_status == P54_DECRYPT_OK)
349*4882a593Smuzhiyun 		rx_status->flag |= RX_FLAG_DECRYPTED;
350*4882a593Smuzhiyun 	if ((hdr->decrypt_status == P54_DECRYPT_FAIL_MICHAEL) ||
351*4882a593Smuzhiyun 	    (hdr->decrypt_status == P54_DECRYPT_FAIL_TKIP))
352*4882a593Smuzhiyun 		rx_status->flag |= RX_FLAG_MMIC_ERROR;
353*4882a593Smuzhiyun 
354*4882a593Smuzhiyun 	rx_status->signal = p54_rssi_to_dbm(priv, hdr->rssi);
355*4882a593Smuzhiyun 	if (hdr->rate & 0x10)
356*4882a593Smuzhiyun 		rx_status->enc_flags |= RX_ENC_FLAG_SHORTPRE;
357*4882a593Smuzhiyun 	if (priv->hw->conf.chandef.chan->band == NL80211_BAND_5GHZ)
358*4882a593Smuzhiyun 		rx_status->rate_idx = (rate < 4) ? 0 : rate - 4;
359*4882a593Smuzhiyun 	else
360*4882a593Smuzhiyun 		rx_status->rate_idx = rate;
361*4882a593Smuzhiyun 
362*4882a593Smuzhiyun 	rx_status->freq = freq;
363*4882a593Smuzhiyun 	rx_status->band =  priv->hw->conf.chandef.chan->band;
364*4882a593Smuzhiyun 	rx_status->antenna = hdr->antenna;
365*4882a593Smuzhiyun 
366*4882a593Smuzhiyun 	tsf32 = le32_to_cpu(hdr->tsf32);
367*4882a593Smuzhiyun 	if (tsf32 < priv->tsf_low32)
368*4882a593Smuzhiyun 		priv->tsf_high32++;
369*4882a593Smuzhiyun 	rx_status->mactime = ((u64)priv->tsf_high32) << 32 | tsf32;
370*4882a593Smuzhiyun 	priv->tsf_low32 = tsf32;
371*4882a593Smuzhiyun 
372*4882a593Smuzhiyun 	/* LMAC API Page 10/29 - s_lm_data_in - clock
373*4882a593Smuzhiyun 	 * "usec accurate timestamp of hardware clock
374*4882a593Smuzhiyun 	 * at end of frame (before OFDM SIFS EOF padding"
375*4882a593Smuzhiyun 	 */
376*4882a593Smuzhiyun 	rx_status->flag |= RX_FLAG_MACTIME_END;
377*4882a593Smuzhiyun 
378*4882a593Smuzhiyun 	if (hdr->flags & cpu_to_le16(P54_HDR_FLAG_DATA_ALIGN))
379*4882a593Smuzhiyun 		header_len += hdr->align[0];
380*4882a593Smuzhiyun 
381*4882a593Smuzhiyun 	skb_pull(skb, header_len);
382*4882a593Smuzhiyun 	skb_trim(skb, le16_to_cpu(hdr->len));
383*4882a593Smuzhiyun 
384*4882a593Smuzhiyun 	fc = ((struct ieee80211_hdr *)skb->data)->frame_control;
385*4882a593Smuzhiyun 	if (ieee80211_is_probe_resp(fc) || ieee80211_is_beacon(fc))
386*4882a593Smuzhiyun 		rx_status->boottime_ns = ktime_get_boottime_ns();
387*4882a593Smuzhiyun 
388*4882a593Smuzhiyun 	if (unlikely(priv->hw->conf.flags & IEEE80211_CONF_PS))
389*4882a593Smuzhiyun 		p54_pspoll_workaround(priv, skb);
390*4882a593Smuzhiyun 
391*4882a593Smuzhiyun 	ieee80211_rx_irqsafe(priv->hw, skb);
392*4882a593Smuzhiyun 
393*4882a593Smuzhiyun 	ieee80211_queue_delayed_work(priv->hw, &priv->work,
394*4882a593Smuzhiyun 			   msecs_to_jiffies(P54_STATISTICS_UPDATE));
395*4882a593Smuzhiyun 
396*4882a593Smuzhiyun 	return -1;
397*4882a593Smuzhiyun }
398*4882a593Smuzhiyun 
p54_rx_frame_sent(struct p54_common * priv,struct sk_buff * skb)399*4882a593Smuzhiyun static void p54_rx_frame_sent(struct p54_common *priv, struct sk_buff *skb)
400*4882a593Smuzhiyun {
401*4882a593Smuzhiyun 	struct p54_hdr *hdr = (struct p54_hdr *) skb->data;
402*4882a593Smuzhiyun 	struct p54_frame_sent *payload = (struct p54_frame_sent *) hdr->data;
403*4882a593Smuzhiyun 	struct ieee80211_tx_info *info;
404*4882a593Smuzhiyun 	struct p54_hdr *entry_hdr;
405*4882a593Smuzhiyun 	struct p54_tx_data *entry_data;
406*4882a593Smuzhiyun 	struct sk_buff *entry;
407*4882a593Smuzhiyun 	unsigned int pad = 0, frame_len;
408*4882a593Smuzhiyun 	int count, idx;
409*4882a593Smuzhiyun 
410*4882a593Smuzhiyun 	entry = p54_find_and_unlink_skb(priv, hdr->req_id);
411*4882a593Smuzhiyun 	if (unlikely(!entry))
412*4882a593Smuzhiyun 		return ;
413*4882a593Smuzhiyun 
414*4882a593Smuzhiyun 	frame_len = entry->len;
415*4882a593Smuzhiyun 	info = IEEE80211_SKB_CB(entry);
416*4882a593Smuzhiyun 	entry_hdr = (struct p54_hdr *) entry->data;
417*4882a593Smuzhiyun 	entry_data = (struct p54_tx_data *) entry_hdr->data;
418*4882a593Smuzhiyun 	priv->stats.dot11ACKFailureCount += payload->tries - 1;
419*4882a593Smuzhiyun 
420*4882a593Smuzhiyun 	/*
421*4882a593Smuzhiyun 	 * Frames in P54_QUEUE_FWSCAN and P54_QUEUE_BEACON are
422*4882a593Smuzhiyun 	 * generated by the driver. Therefore tx_status is bogus
423*4882a593Smuzhiyun 	 * and we don't want to confuse the mac80211 stack.
424*4882a593Smuzhiyun 	 */
425*4882a593Smuzhiyun 	if (unlikely(entry_data->hw_queue < P54_QUEUE_FWSCAN)) {
426*4882a593Smuzhiyun 		dev_kfree_skb_any(entry);
427*4882a593Smuzhiyun 		return ;
428*4882a593Smuzhiyun 	}
429*4882a593Smuzhiyun 
430*4882a593Smuzhiyun 	/*
431*4882a593Smuzhiyun 	 * Clear manually, ieee80211_tx_info_clear_status would
432*4882a593Smuzhiyun 	 * clear the counts too and we need them.
433*4882a593Smuzhiyun 	 */
434*4882a593Smuzhiyun 	memset(&info->status.ack_signal, 0,
435*4882a593Smuzhiyun 	       sizeof(struct ieee80211_tx_info) -
436*4882a593Smuzhiyun 	       offsetof(struct ieee80211_tx_info, status.ack_signal));
437*4882a593Smuzhiyun 	BUILD_BUG_ON(offsetof(struct ieee80211_tx_info,
438*4882a593Smuzhiyun 			      status.ack_signal) != 20);
439*4882a593Smuzhiyun 
440*4882a593Smuzhiyun 	if (entry_hdr->flags & cpu_to_le16(P54_HDR_FLAG_DATA_ALIGN))
441*4882a593Smuzhiyun 		pad = entry_data->align[0];
442*4882a593Smuzhiyun 
443*4882a593Smuzhiyun 	/* walk through the rates array and adjust the counts */
444*4882a593Smuzhiyun 	count = payload->tries;
445*4882a593Smuzhiyun 	for (idx = 0; idx < 4; idx++) {
446*4882a593Smuzhiyun 		if (count >= info->status.rates[idx].count) {
447*4882a593Smuzhiyun 			count -= info->status.rates[idx].count;
448*4882a593Smuzhiyun 		} else if (count > 0) {
449*4882a593Smuzhiyun 			info->status.rates[idx].count = count;
450*4882a593Smuzhiyun 			count = 0;
451*4882a593Smuzhiyun 		} else {
452*4882a593Smuzhiyun 			info->status.rates[idx].idx = -1;
453*4882a593Smuzhiyun 			info->status.rates[idx].count = 0;
454*4882a593Smuzhiyun 		}
455*4882a593Smuzhiyun 	}
456*4882a593Smuzhiyun 
457*4882a593Smuzhiyun 	if (!(info->flags & IEEE80211_TX_CTL_NO_ACK) &&
458*4882a593Smuzhiyun 	     !(payload->status & P54_TX_FAILED))
459*4882a593Smuzhiyun 		info->flags |= IEEE80211_TX_STAT_ACK;
460*4882a593Smuzhiyun 	if (payload->status & P54_TX_PSM_CANCELLED)
461*4882a593Smuzhiyun 		info->flags |= IEEE80211_TX_STAT_TX_FILTERED;
462*4882a593Smuzhiyun 	info->status.ack_signal = p54_rssi_to_dbm(priv,
463*4882a593Smuzhiyun 						  (int)payload->ack_rssi);
464*4882a593Smuzhiyun 
465*4882a593Smuzhiyun 	/* Undo all changes to the frame. */
466*4882a593Smuzhiyun 	switch (entry_data->key_type) {
467*4882a593Smuzhiyun 	case P54_CRYPTO_TKIPMICHAEL: {
468*4882a593Smuzhiyun 		u8 *iv = (u8 *)(entry_data->align + pad +
469*4882a593Smuzhiyun 				entry_data->crypt_offset);
470*4882a593Smuzhiyun 
471*4882a593Smuzhiyun 		/* Restore the original TKIP IV. */
472*4882a593Smuzhiyun 		iv[2] = iv[0];
473*4882a593Smuzhiyun 		iv[0] = iv[1];
474*4882a593Smuzhiyun 		iv[1] = (iv[0] | 0x20) & 0x7f;	/* WEPSeed - 8.3.2.2 */
475*4882a593Smuzhiyun 
476*4882a593Smuzhiyun 		frame_len -= 12; /* remove TKIP_MMIC + TKIP_ICV */
477*4882a593Smuzhiyun 		break;
478*4882a593Smuzhiyun 		}
479*4882a593Smuzhiyun 	case P54_CRYPTO_AESCCMP:
480*4882a593Smuzhiyun 		frame_len -= 8; /* remove CCMP_MIC */
481*4882a593Smuzhiyun 		break;
482*4882a593Smuzhiyun 	case P54_CRYPTO_WEP:
483*4882a593Smuzhiyun 		frame_len -= 4; /* remove WEP_ICV */
484*4882a593Smuzhiyun 		break;
485*4882a593Smuzhiyun 	}
486*4882a593Smuzhiyun 
487*4882a593Smuzhiyun 	skb_trim(entry, frame_len);
488*4882a593Smuzhiyun 	skb_pull(entry, sizeof(*hdr) + pad + sizeof(*entry_data));
489*4882a593Smuzhiyun 	ieee80211_tx_status_irqsafe(priv->hw, entry);
490*4882a593Smuzhiyun }
491*4882a593Smuzhiyun 
p54_rx_eeprom_readback(struct p54_common * priv,struct sk_buff * skb)492*4882a593Smuzhiyun static void p54_rx_eeprom_readback(struct p54_common *priv,
493*4882a593Smuzhiyun 				   struct sk_buff *skb)
494*4882a593Smuzhiyun {
495*4882a593Smuzhiyun 	struct p54_hdr *hdr = (struct p54_hdr *) skb->data;
496*4882a593Smuzhiyun 	struct p54_eeprom_lm86 *eeprom = (struct p54_eeprom_lm86 *) hdr->data;
497*4882a593Smuzhiyun 	struct sk_buff *tmp;
498*4882a593Smuzhiyun 
499*4882a593Smuzhiyun 	if (!priv->eeprom)
500*4882a593Smuzhiyun 		return ;
501*4882a593Smuzhiyun 
502*4882a593Smuzhiyun 	if (priv->fw_var >= 0x509) {
503*4882a593Smuzhiyun 		memcpy(priv->eeprom, eeprom->v2.data,
504*4882a593Smuzhiyun 		       le16_to_cpu(eeprom->v2.len));
505*4882a593Smuzhiyun 	} else {
506*4882a593Smuzhiyun 		memcpy(priv->eeprom, eeprom->v1.data,
507*4882a593Smuzhiyun 		       le16_to_cpu(eeprom->v1.len));
508*4882a593Smuzhiyun 	}
509*4882a593Smuzhiyun 
510*4882a593Smuzhiyun 	priv->eeprom = NULL;
511*4882a593Smuzhiyun 	tmp = p54_find_and_unlink_skb(priv, hdr->req_id);
512*4882a593Smuzhiyun 	dev_kfree_skb_any(tmp);
513*4882a593Smuzhiyun 	complete(&priv->eeprom_comp);
514*4882a593Smuzhiyun }
515*4882a593Smuzhiyun 
p54_rx_stats(struct p54_common * priv,struct sk_buff * skb)516*4882a593Smuzhiyun static void p54_rx_stats(struct p54_common *priv, struct sk_buff *skb)
517*4882a593Smuzhiyun {
518*4882a593Smuzhiyun 	struct p54_hdr *hdr = (struct p54_hdr *) skb->data;
519*4882a593Smuzhiyun 	struct p54_statistics *stats = (struct p54_statistics *) hdr->data;
520*4882a593Smuzhiyun 	struct sk_buff *tmp;
521*4882a593Smuzhiyun 	struct ieee80211_channel *chan;
522*4882a593Smuzhiyun 	unsigned int i, rssi, tx, cca, dtime, dtotal, dcca, dtx, drssi, unit;
523*4882a593Smuzhiyun 	u32 tsf32;
524*4882a593Smuzhiyun 
525*4882a593Smuzhiyun 	if (unlikely(priv->mode == NL80211_IFTYPE_UNSPECIFIED))
526*4882a593Smuzhiyun 		return ;
527*4882a593Smuzhiyun 
528*4882a593Smuzhiyun 	tsf32 = le32_to_cpu(stats->tsf32);
529*4882a593Smuzhiyun 	if (tsf32 < priv->tsf_low32)
530*4882a593Smuzhiyun 		priv->tsf_high32++;
531*4882a593Smuzhiyun 	priv->tsf_low32 = tsf32;
532*4882a593Smuzhiyun 
533*4882a593Smuzhiyun 	priv->stats.dot11RTSFailureCount = le32_to_cpu(stats->rts_fail);
534*4882a593Smuzhiyun 	priv->stats.dot11RTSSuccessCount = le32_to_cpu(stats->rts_success);
535*4882a593Smuzhiyun 	priv->stats.dot11FCSErrorCount = le32_to_cpu(stats->rx_bad_fcs);
536*4882a593Smuzhiyun 
537*4882a593Smuzhiyun 	priv->noise = p54_rssi_to_dbm(priv, le32_to_cpu(stats->noise));
538*4882a593Smuzhiyun 
539*4882a593Smuzhiyun 	/*
540*4882a593Smuzhiyun 	 * STSW450X LMAC API page 26 - 3.8 Statistics
541*4882a593Smuzhiyun 	 * "The exact measurement period can be derived from the
542*4882a593Smuzhiyun 	 * timestamp member".
543*4882a593Smuzhiyun 	 */
544*4882a593Smuzhiyun 	dtime = tsf32 - priv->survey_raw.timestamp;
545*4882a593Smuzhiyun 
546*4882a593Smuzhiyun 	/*
547*4882a593Smuzhiyun 	 * STSW450X LMAC API page 26 - 3.8.1 Noise histogram
548*4882a593Smuzhiyun 	 * The LMAC samples RSSI, CCA and transmit state at regular
549*4882a593Smuzhiyun 	 * periods (typically 8 times per 1k [as in 1024] usec).
550*4882a593Smuzhiyun 	 */
551*4882a593Smuzhiyun 	cca = le32_to_cpu(stats->sample_cca);
552*4882a593Smuzhiyun 	tx = le32_to_cpu(stats->sample_tx);
553*4882a593Smuzhiyun 	rssi = 0;
554*4882a593Smuzhiyun 	for (i = 0; i < ARRAY_SIZE(stats->sample_noise); i++)
555*4882a593Smuzhiyun 		rssi += le32_to_cpu(stats->sample_noise[i]);
556*4882a593Smuzhiyun 
557*4882a593Smuzhiyun 	dcca = cca - priv->survey_raw.cached_cca;
558*4882a593Smuzhiyun 	drssi = rssi - priv->survey_raw.cached_rssi;
559*4882a593Smuzhiyun 	dtx = tx - priv->survey_raw.cached_tx;
560*4882a593Smuzhiyun 	dtotal = dcca + drssi + dtx;
561*4882a593Smuzhiyun 
562*4882a593Smuzhiyun 	/*
563*4882a593Smuzhiyun 	 * update statistics when more than a second is over since the
564*4882a593Smuzhiyun 	 * last call, or when a update is badly needed.
565*4882a593Smuzhiyun 	 */
566*4882a593Smuzhiyun 	if (dtotal && (priv->update_stats || dtime >= USEC_PER_SEC) &&
567*4882a593Smuzhiyun 	    dtime >= dtotal) {
568*4882a593Smuzhiyun 		priv->survey_raw.timestamp = tsf32;
569*4882a593Smuzhiyun 		priv->update_stats = false;
570*4882a593Smuzhiyun 		unit = dtime / dtotal;
571*4882a593Smuzhiyun 
572*4882a593Smuzhiyun 		if (dcca) {
573*4882a593Smuzhiyun 			priv->survey_raw.cca += dcca * unit;
574*4882a593Smuzhiyun 			priv->survey_raw.cached_cca = cca;
575*4882a593Smuzhiyun 		}
576*4882a593Smuzhiyun 		if (dtx) {
577*4882a593Smuzhiyun 			priv->survey_raw.tx += dtx * unit;
578*4882a593Smuzhiyun 			priv->survey_raw.cached_tx = tx;
579*4882a593Smuzhiyun 		}
580*4882a593Smuzhiyun 		if (drssi) {
581*4882a593Smuzhiyun 			priv->survey_raw.rssi += drssi * unit;
582*4882a593Smuzhiyun 			priv->survey_raw.cached_rssi = rssi;
583*4882a593Smuzhiyun 		}
584*4882a593Smuzhiyun 
585*4882a593Smuzhiyun 		/* 1024 usec / 8 times = 128 usec / time */
586*4882a593Smuzhiyun 		if (!(priv->phy_ps || priv->phy_idle))
587*4882a593Smuzhiyun 			priv->survey_raw.active += dtotal * unit;
588*4882a593Smuzhiyun 		else
589*4882a593Smuzhiyun 			priv->survey_raw.active += (dcca + dtx) * unit;
590*4882a593Smuzhiyun 	}
591*4882a593Smuzhiyun 
592*4882a593Smuzhiyun 	chan = priv->curchan;
593*4882a593Smuzhiyun 	if (chan) {
594*4882a593Smuzhiyun 		struct survey_info *survey = &priv->survey[chan->hw_value];
595*4882a593Smuzhiyun 		survey->noise = clamp(priv->noise, -128, 127);
596*4882a593Smuzhiyun 		survey->time = priv->survey_raw.active;
597*4882a593Smuzhiyun 		survey->time_tx = priv->survey_raw.tx;
598*4882a593Smuzhiyun 		survey->time_busy = priv->survey_raw.tx +
599*4882a593Smuzhiyun 			priv->survey_raw.cca;
600*4882a593Smuzhiyun 		do_div(survey->time, 1024);
601*4882a593Smuzhiyun 		do_div(survey->time_tx, 1024);
602*4882a593Smuzhiyun 		do_div(survey->time_busy, 1024);
603*4882a593Smuzhiyun 	}
604*4882a593Smuzhiyun 
605*4882a593Smuzhiyun 	tmp = p54_find_and_unlink_skb(priv, hdr->req_id);
606*4882a593Smuzhiyun 	dev_kfree_skb_any(tmp);
607*4882a593Smuzhiyun 	complete(&priv->stat_comp);
608*4882a593Smuzhiyun }
609*4882a593Smuzhiyun 
p54_rx_trap(struct p54_common * priv,struct sk_buff * skb)610*4882a593Smuzhiyun static void p54_rx_trap(struct p54_common *priv, struct sk_buff *skb)
611*4882a593Smuzhiyun {
612*4882a593Smuzhiyun 	struct p54_hdr *hdr = (struct p54_hdr *) skb->data;
613*4882a593Smuzhiyun 	struct p54_trap *trap = (struct p54_trap *) hdr->data;
614*4882a593Smuzhiyun 	u16 event = le16_to_cpu(trap->event);
615*4882a593Smuzhiyun 	u16 freq = le16_to_cpu(trap->frequency);
616*4882a593Smuzhiyun 
617*4882a593Smuzhiyun 	switch (event) {
618*4882a593Smuzhiyun 	case P54_TRAP_BEACON_TX:
619*4882a593Smuzhiyun 		break;
620*4882a593Smuzhiyun 	case P54_TRAP_RADAR:
621*4882a593Smuzhiyun 		wiphy_info(priv->hw->wiphy, "radar (freq:%d MHz)\n", freq);
622*4882a593Smuzhiyun 		break;
623*4882a593Smuzhiyun 	case P54_TRAP_NO_BEACON:
624*4882a593Smuzhiyun 		if (priv->vif)
625*4882a593Smuzhiyun 			ieee80211_beacon_loss(priv->vif);
626*4882a593Smuzhiyun 		break;
627*4882a593Smuzhiyun 	case P54_TRAP_SCAN:
628*4882a593Smuzhiyun 		break;
629*4882a593Smuzhiyun 	case P54_TRAP_TBTT:
630*4882a593Smuzhiyun 		break;
631*4882a593Smuzhiyun 	case P54_TRAP_TIMER:
632*4882a593Smuzhiyun 		break;
633*4882a593Smuzhiyun 	case P54_TRAP_FAA_RADIO_OFF:
634*4882a593Smuzhiyun 		wiphy_rfkill_set_hw_state(priv->hw->wiphy, true);
635*4882a593Smuzhiyun 		break;
636*4882a593Smuzhiyun 	case P54_TRAP_FAA_RADIO_ON:
637*4882a593Smuzhiyun 		wiphy_rfkill_set_hw_state(priv->hw->wiphy, false);
638*4882a593Smuzhiyun 		break;
639*4882a593Smuzhiyun 	default:
640*4882a593Smuzhiyun 		wiphy_info(priv->hw->wiphy, "received event:%x freq:%d\n",
641*4882a593Smuzhiyun 			   event, freq);
642*4882a593Smuzhiyun 		break;
643*4882a593Smuzhiyun 	}
644*4882a593Smuzhiyun }
645*4882a593Smuzhiyun 
p54_rx_control(struct p54_common * priv,struct sk_buff * skb)646*4882a593Smuzhiyun static int p54_rx_control(struct p54_common *priv, struct sk_buff *skb)
647*4882a593Smuzhiyun {
648*4882a593Smuzhiyun 	struct p54_hdr *hdr = (struct p54_hdr *) skb->data;
649*4882a593Smuzhiyun 
650*4882a593Smuzhiyun 	switch (le16_to_cpu(hdr->type)) {
651*4882a593Smuzhiyun 	case P54_CONTROL_TYPE_TXDONE:
652*4882a593Smuzhiyun 		p54_rx_frame_sent(priv, skb);
653*4882a593Smuzhiyun 		break;
654*4882a593Smuzhiyun 	case P54_CONTROL_TYPE_TRAP:
655*4882a593Smuzhiyun 		p54_rx_trap(priv, skb);
656*4882a593Smuzhiyun 		break;
657*4882a593Smuzhiyun 	case P54_CONTROL_TYPE_BBP:
658*4882a593Smuzhiyun 		break;
659*4882a593Smuzhiyun 	case P54_CONTROL_TYPE_STAT_READBACK:
660*4882a593Smuzhiyun 		p54_rx_stats(priv, skb);
661*4882a593Smuzhiyun 		break;
662*4882a593Smuzhiyun 	case P54_CONTROL_TYPE_EEPROM_READBACK:
663*4882a593Smuzhiyun 		p54_rx_eeprom_readback(priv, skb);
664*4882a593Smuzhiyun 		break;
665*4882a593Smuzhiyun 	default:
666*4882a593Smuzhiyun 		wiphy_debug(priv->hw->wiphy,
667*4882a593Smuzhiyun 			    "not handling 0x%02x type control frame\n",
668*4882a593Smuzhiyun 			    le16_to_cpu(hdr->type));
669*4882a593Smuzhiyun 		break;
670*4882a593Smuzhiyun 	}
671*4882a593Smuzhiyun 	return 0;
672*4882a593Smuzhiyun }
673*4882a593Smuzhiyun 
674*4882a593Smuzhiyun /* returns zero if skb can be reused */
p54_rx(struct ieee80211_hw * dev,struct sk_buff * skb)675*4882a593Smuzhiyun int p54_rx(struct ieee80211_hw *dev, struct sk_buff *skb)
676*4882a593Smuzhiyun {
677*4882a593Smuzhiyun 	struct p54_common *priv = dev->priv;
678*4882a593Smuzhiyun 	u16 type = le16_to_cpu(*((__le16 *)skb->data));
679*4882a593Smuzhiyun 
680*4882a593Smuzhiyun 	if (type & P54_HDR_FLAG_CONTROL)
681*4882a593Smuzhiyun 		return p54_rx_control(priv, skb);
682*4882a593Smuzhiyun 	else
683*4882a593Smuzhiyun 		return p54_rx_data(priv, skb);
684*4882a593Smuzhiyun }
685*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(p54_rx);
686*4882a593Smuzhiyun 
p54_tx_80211_header(struct p54_common * priv,struct sk_buff * skb,struct ieee80211_tx_info * info,struct ieee80211_sta * sta,u8 * queue,u32 * extra_len,u16 * flags,u16 * aid,bool * burst_possible)687*4882a593Smuzhiyun static void p54_tx_80211_header(struct p54_common *priv, struct sk_buff *skb,
688*4882a593Smuzhiyun 				struct ieee80211_tx_info *info,
689*4882a593Smuzhiyun 				struct ieee80211_sta *sta,
690*4882a593Smuzhiyun 				u8 *queue, u32 *extra_len, u16 *flags, u16 *aid,
691*4882a593Smuzhiyun 				bool *burst_possible)
692*4882a593Smuzhiyun {
693*4882a593Smuzhiyun 	struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
694*4882a593Smuzhiyun 
695*4882a593Smuzhiyun 	if (ieee80211_is_data_qos(hdr->frame_control))
696*4882a593Smuzhiyun 		*burst_possible = true;
697*4882a593Smuzhiyun 	else
698*4882a593Smuzhiyun 		*burst_possible = false;
699*4882a593Smuzhiyun 
700*4882a593Smuzhiyun 	if (!(info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ))
701*4882a593Smuzhiyun 		*flags |= P54_HDR_FLAG_DATA_OUT_SEQNR;
702*4882a593Smuzhiyun 
703*4882a593Smuzhiyun 	if (info->flags & IEEE80211_TX_CTL_NO_PS_BUFFER)
704*4882a593Smuzhiyun 		*flags |= P54_HDR_FLAG_DATA_OUT_NOCANCEL;
705*4882a593Smuzhiyun 
706*4882a593Smuzhiyun 	if (info->flags & IEEE80211_TX_CTL_CLEAR_PS_FILT)
707*4882a593Smuzhiyun 		*flags |= P54_HDR_FLAG_DATA_OUT_NOCANCEL;
708*4882a593Smuzhiyun 
709*4882a593Smuzhiyun 	*queue = skb_get_queue_mapping(skb) + P54_QUEUE_DATA;
710*4882a593Smuzhiyun 
711*4882a593Smuzhiyun 	switch (priv->mode) {
712*4882a593Smuzhiyun 	case NL80211_IFTYPE_MONITOR:
713*4882a593Smuzhiyun 		/*
714*4882a593Smuzhiyun 		 * We have to set P54_HDR_FLAG_DATA_OUT_PROMISC for
715*4882a593Smuzhiyun 		 * every frame in promiscuous/monitor mode.
716*4882a593Smuzhiyun 		 * see STSW45x0C LMAC API - page 12.
717*4882a593Smuzhiyun 		 */
718*4882a593Smuzhiyun 		*aid = 0;
719*4882a593Smuzhiyun 		*flags |= P54_HDR_FLAG_DATA_OUT_PROMISC;
720*4882a593Smuzhiyun 		break;
721*4882a593Smuzhiyun 	case NL80211_IFTYPE_STATION:
722*4882a593Smuzhiyun 		*aid = 1;
723*4882a593Smuzhiyun 		break;
724*4882a593Smuzhiyun 	case NL80211_IFTYPE_AP:
725*4882a593Smuzhiyun 	case NL80211_IFTYPE_ADHOC:
726*4882a593Smuzhiyun 	case NL80211_IFTYPE_MESH_POINT:
727*4882a593Smuzhiyun 		if (info->flags & IEEE80211_TX_CTL_SEND_AFTER_DTIM) {
728*4882a593Smuzhiyun 			*aid = 0;
729*4882a593Smuzhiyun 			*queue = P54_QUEUE_CAB;
730*4882a593Smuzhiyun 			return;
731*4882a593Smuzhiyun 		}
732*4882a593Smuzhiyun 
733*4882a593Smuzhiyun 		if (unlikely(ieee80211_is_mgmt(hdr->frame_control))) {
734*4882a593Smuzhiyun 			if (ieee80211_is_probe_resp(hdr->frame_control)) {
735*4882a593Smuzhiyun 				*aid = 0;
736*4882a593Smuzhiyun 				*flags |= P54_HDR_FLAG_DATA_OUT_TIMESTAMP |
737*4882a593Smuzhiyun 					  P54_HDR_FLAG_DATA_OUT_NOCANCEL;
738*4882a593Smuzhiyun 				return;
739*4882a593Smuzhiyun 			} else if (ieee80211_is_beacon(hdr->frame_control)) {
740*4882a593Smuzhiyun 				*aid = 0;
741*4882a593Smuzhiyun 
742*4882a593Smuzhiyun 				if (info->flags & IEEE80211_TX_CTL_INJECTED) {
743*4882a593Smuzhiyun 					/*
744*4882a593Smuzhiyun 					 * Injecting beacons on top of a AP is
745*4882a593Smuzhiyun 					 * not a good idea... nevertheless,
746*4882a593Smuzhiyun 					 * it should be doable.
747*4882a593Smuzhiyun 					 */
748*4882a593Smuzhiyun 
749*4882a593Smuzhiyun 					return;
750*4882a593Smuzhiyun 				}
751*4882a593Smuzhiyun 
752*4882a593Smuzhiyun 				*flags |= P54_HDR_FLAG_DATA_OUT_TIMESTAMP;
753*4882a593Smuzhiyun 				*queue = P54_QUEUE_BEACON;
754*4882a593Smuzhiyun 				*extra_len = IEEE80211_MAX_TIM_LEN;
755*4882a593Smuzhiyun 				return;
756*4882a593Smuzhiyun 			}
757*4882a593Smuzhiyun 		}
758*4882a593Smuzhiyun 
759*4882a593Smuzhiyun 		if (sta)
760*4882a593Smuzhiyun 			*aid = sta->aid;
761*4882a593Smuzhiyun 		break;
762*4882a593Smuzhiyun 	}
763*4882a593Smuzhiyun }
764*4882a593Smuzhiyun 
p54_convert_algo(u32 cipher)765*4882a593Smuzhiyun static u8 p54_convert_algo(u32 cipher)
766*4882a593Smuzhiyun {
767*4882a593Smuzhiyun 	switch (cipher) {
768*4882a593Smuzhiyun 	case WLAN_CIPHER_SUITE_WEP40:
769*4882a593Smuzhiyun 	case WLAN_CIPHER_SUITE_WEP104:
770*4882a593Smuzhiyun 		return P54_CRYPTO_WEP;
771*4882a593Smuzhiyun 	case WLAN_CIPHER_SUITE_TKIP:
772*4882a593Smuzhiyun 		return P54_CRYPTO_TKIPMICHAEL;
773*4882a593Smuzhiyun 	case WLAN_CIPHER_SUITE_CCMP:
774*4882a593Smuzhiyun 		return P54_CRYPTO_AESCCMP;
775*4882a593Smuzhiyun 	default:
776*4882a593Smuzhiyun 		return 0;
777*4882a593Smuzhiyun 	}
778*4882a593Smuzhiyun }
779*4882a593Smuzhiyun 
p54_tx_80211(struct ieee80211_hw * dev,struct ieee80211_tx_control * control,struct sk_buff * skb)780*4882a593Smuzhiyun void p54_tx_80211(struct ieee80211_hw *dev,
781*4882a593Smuzhiyun 		  struct ieee80211_tx_control *control,
782*4882a593Smuzhiyun 		  struct sk_buff *skb)
783*4882a593Smuzhiyun {
784*4882a593Smuzhiyun 	struct p54_common *priv = dev->priv;
785*4882a593Smuzhiyun 	struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
786*4882a593Smuzhiyun 	struct p54_tx_info *p54info;
787*4882a593Smuzhiyun 	struct p54_hdr *hdr;
788*4882a593Smuzhiyun 	struct p54_tx_data *txhdr;
789*4882a593Smuzhiyun 	unsigned int padding, len, extra_len = 0;
790*4882a593Smuzhiyun 	int i, j, ridx;
791*4882a593Smuzhiyun 	u16 hdr_flags = 0, aid = 0;
792*4882a593Smuzhiyun 	u8 rate, queue = 0, crypt_offset = 0;
793*4882a593Smuzhiyun 	u8 cts_rate = 0x20;
794*4882a593Smuzhiyun 	u8 rc_flags;
795*4882a593Smuzhiyun 	u8 calculated_tries[4];
796*4882a593Smuzhiyun 	u8 nrates = 0, nremaining = 8;
797*4882a593Smuzhiyun 	bool burst_allowed = false;
798*4882a593Smuzhiyun 
799*4882a593Smuzhiyun 	p54_tx_80211_header(priv, skb, info, control->sta, &queue, &extra_len,
800*4882a593Smuzhiyun 			    &hdr_flags, &aid, &burst_allowed);
801*4882a593Smuzhiyun 
802*4882a593Smuzhiyun 	if (p54_tx_qos_accounting_alloc(priv, skb, queue)) {
803*4882a593Smuzhiyun 		ieee80211_free_txskb(dev, skb);
804*4882a593Smuzhiyun 		return;
805*4882a593Smuzhiyun 	}
806*4882a593Smuzhiyun 
807*4882a593Smuzhiyun 	padding = (unsigned long)(skb->data - (sizeof(*hdr) + sizeof(*txhdr))) & 3;
808*4882a593Smuzhiyun 	len = skb->len;
809*4882a593Smuzhiyun 
810*4882a593Smuzhiyun 	if (info->control.hw_key) {
811*4882a593Smuzhiyun 		crypt_offset = ieee80211_get_hdrlen_from_skb(skb);
812*4882a593Smuzhiyun 		if (info->control.hw_key->cipher == WLAN_CIPHER_SUITE_TKIP) {
813*4882a593Smuzhiyun 			u8 *iv = (u8 *)(skb->data + crypt_offset);
814*4882a593Smuzhiyun 			/*
815*4882a593Smuzhiyun 			 * The firmware excepts that the IV has to have
816*4882a593Smuzhiyun 			 * this special format
817*4882a593Smuzhiyun 			 */
818*4882a593Smuzhiyun 			iv[1] = iv[0];
819*4882a593Smuzhiyun 			iv[0] = iv[2];
820*4882a593Smuzhiyun 			iv[2] = 0;
821*4882a593Smuzhiyun 		}
822*4882a593Smuzhiyun 	}
823*4882a593Smuzhiyun 
824*4882a593Smuzhiyun 	txhdr = skb_push(skb, sizeof(*txhdr) + padding);
825*4882a593Smuzhiyun 	hdr = skb_push(skb, sizeof(*hdr));
826*4882a593Smuzhiyun 
827*4882a593Smuzhiyun 	if (padding)
828*4882a593Smuzhiyun 		hdr_flags |= P54_HDR_FLAG_DATA_ALIGN;
829*4882a593Smuzhiyun 	hdr->type = cpu_to_le16(aid);
830*4882a593Smuzhiyun 	hdr->rts_tries = info->control.rates[0].count;
831*4882a593Smuzhiyun 
832*4882a593Smuzhiyun 	/*
833*4882a593Smuzhiyun 	 * we register the rates in perfect order, and
834*4882a593Smuzhiyun 	 * RTS/CTS won't happen on 5 GHz
835*4882a593Smuzhiyun 	 */
836*4882a593Smuzhiyun 	cts_rate = info->control.rts_cts_rate_idx;
837*4882a593Smuzhiyun 
838*4882a593Smuzhiyun 	memset(&txhdr->rateset, 0, sizeof(txhdr->rateset));
839*4882a593Smuzhiyun 
840*4882a593Smuzhiyun 	/* see how many rates got used */
841*4882a593Smuzhiyun 	for (i = 0; i < dev->max_rates; i++) {
842*4882a593Smuzhiyun 		if (info->control.rates[i].idx < 0)
843*4882a593Smuzhiyun 			break;
844*4882a593Smuzhiyun 		nrates++;
845*4882a593Smuzhiyun 	}
846*4882a593Smuzhiyun 
847*4882a593Smuzhiyun 	/* limit tries to 8/nrates per rate */
848*4882a593Smuzhiyun 	for (i = 0; i < nrates; i++) {
849*4882a593Smuzhiyun 		/*
850*4882a593Smuzhiyun 		 * The magic expression here is equivalent to 8/nrates for
851*4882a593Smuzhiyun 		 * all values that matter, but avoids division and jumps.
852*4882a593Smuzhiyun 		 * Note that nrates can only take the values 1 through 4.
853*4882a593Smuzhiyun 		 */
854*4882a593Smuzhiyun 		calculated_tries[i] = min_t(int, ((15 >> nrates) | 1) + 1,
855*4882a593Smuzhiyun 						 info->control.rates[i].count);
856*4882a593Smuzhiyun 		nremaining -= calculated_tries[i];
857*4882a593Smuzhiyun 	}
858*4882a593Smuzhiyun 
859*4882a593Smuzhiyun 	/* if there are tries left, distribute from back to front */
860*4882a593Smuzhiyun 	for (i = nrates - 1; nremaining > 0 && i >= 0; i--) {
861*4882a593Smuzhiyun 		int tmp = info->control.rates[i].count - calculated_tries[i];
862*4882a593Smuzhiyun 
863*4882a593Smuzhiyun 		if (tmp <= 0)
864*4882a593Smuzhiyun 			continue;
865*4882a593Smuzhiyun 		/* RC requested more tries at this rate */
866*4882a593Smuzhiyun 
867*4882a593Smuzhiyun 		tmp = min_t(int, tmp, nremaining);
868*4882a593Smuzhiyun 		calculated_tries[i] += tmp;
869*4882a593Smuzhiyun 		nremaining -= tmp;
870*4882a593Smuzhiyun 	}
871*4882a593Smuzhiyun 
872*4882a593Smuzhiyun 	ridx = 0;
873*4882a593Smuzhiyun 	for (i = 0; i < nrates && ridx < 8; i++) {
874*4882a593Smuzhiyun 		/* we register the rates in perfect order */
875*4882a593Smuzhiyun 		rate = info->control.rates[i].idx;
876*4882a593Smuzhiyun 		if (info->band == NL80211_BAND_5GHZ)
877*4882a593Smuzhiyun 			rate += 4;
878*4882a593Smuzhiyun 
879*4882a593Smuzhiyun 		/* store the count we actually calculated for TX status */
880*4882a593Smuzhiyun 		info->control.rates[i].count = calculated_tries[i];
881*4882a593Smuzhiyun 
882*4882a593Smuzhiyun 		rc_flags = info->control.rates[i].flags;
883*4882a593Smuzhiyun 		if (rc_flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE) {
884*4882a593Smuzhiyun 			rate |= 0x10;
885*4882a593Smuzhiyun 			cts_rate |= 0x10;
886*4882a593Smuzhiyun 		}
887*4882a593Smuzhiyun 		if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) {
888*4882a593Smuzhiyun 			burst_allowed = false;
889*4882a593Smuzhiyun 			rate |= 0x40;
890*4882a593Smuzhiyun 		} else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
891*4882a593Smuzhiyun 			rate |= 0x20;
892*4882a593Smuzhiyun 			burst_allowed = false;
893*4882a593Smuzhiyun 		}
894*4882a593Smuzhiyun 		for (j = 0; j < calculated_tries[i] && ridx < 8; j++) {
895*4882a593Smuzhiyun 			txhdr->rateset[ridx] = rate;
896*4882a593Smuzhiyun 			ridx++;
897*4882a593Smuzhiyun 		}
898*4882a593Smuzhiyun 	}
899*4882a593Smuzhiyun 
900*4882a593Smuzhiyun 	if (burst_allowed)
901*4882a593Smuzhiyun 		hdr_flags |= P54_HDR_FLAG_DATA_OUT_BURST;
902*4882a593Smuzhiyun 
903*4882a593Smuzhiyun 	/* TODO: enable bursting */
904*4882a593Smuzhiyun 	hdr->flags = cpu_to_le16(hdr_flags);
905*4882a593Smuzhiyun 	hdr->tries = ridx;
906*4882a593Smuzhiyun 	txhdr->rts_rate_idx = 0;
907*4882a593Smuzhiyun 	if (info->control.hw_key) {
908*4882a593Smuzhiyun 		txhdr->key_type = p54_convert_algo(info->control.hw_key->cipher);
909*4882a593Smuzhiyun 		txhdr->key_len = min((u8)16, info->control.hw_key->keylen);
910*4882a593Smuzhiyun 		memcpy(txhdr->key, info->control.hw_key->key, txhdr->key_len);
911*4882a593Smuzhiyun 		if (info->control.hw_key->cipher == WLAN_CIPHER_SUITE_TKIP) {
912*4882a593Smuzhiyun 			/* reserve space for the MIC key */
913*4882a593Smuzhiyun 			len += 8;
914*4882a593Smuzhiyun 			skb_put_data(skb,
915*4882a593Smuzhiyun 				     &(info->control.hw_key->key[NL80211_TKIP_DATA_OFFSET_TX_MIC_KEY]),
916*4882a593Smuzhiyun 				     8);
917*4882a593Smuzhiyun 		}
918*4882a593Smuzhiyun 		/* reserve some space for ICV */
919*4882a593Smuzhiyun 		len += info->control.hw_key->icv_len;
920*4882a593Smuzhiyun 		skb_put_zero(skb, info->control.hw_key->icv_len);
921*4882a593Smuzhiyun 	} else {
922*4882a593Smuzhiyun 		txhdr->key_type = 0;
923*4882a593Smuzhiyun 		txhdr->key_len = 0;
924*4882a593Smuzhiyun 	}
925*4882a593Smuzhiyun 	txhdr->crypt_offset = crypt_offset;
926*4882a593Smuzhiyun 	txhdr->hw_queue = queue;
927*4882a593Smuzhiyun 	txhdr->backlog = priv->tx_stats[queue].len - 1;
928*4882a593Smuzhiyun 	memset(txhdr->durations, 0, sizeof(txhdr->durations));
929*4882a593Smuzhiyun 	txhdr->tx_antenna = 2 & priv->tx_diversity_mask;
930*4882a593Smuzhiyun 	if (priv->rxhw == 5) {
931*4882a593Smuzhiyun 		txhdr->longbow.cts_rate = cts_rate;
932*4882a593Smuzhiyun 		txhdr->longbow.output_power = cpu_to_le16(priv->output_power);
933*4882a593Smuzhiyun 	} else {
934*4882a593Smuzhiyun 		txhdr->normal.output_power = priv->output_power;
935*4882a593Smuzhiyun 		txhdr->normal.cts_rate = cts_rate;
936*4882a593Smuzhiyun 	}
937*4882a593Smuzhiyun 	if (padding)
938*4882a593Smuzhiyun 		txhdr->align[0] = padding;
939*4882a593Smuzhiyun 
940*4882a593Smuzhiyun 	hdr->len = cpu_to_le16(len);
941*4882a593Smuzhiyun 	/* modifies skb->cb and with it info, so must be last! */
942*4882a593Smuzhiyun 	p54info = (void *) info->rate_driver_data;
943*4882a593Smuzhiyun 	p54info->extra_len = extra_len;
944*4882a593Smuzhiyun 
945*4882a593Smuzhiyun 	p54_tx(priv, skb);
946*4882a593Smuzhiyun }
947