xref: /OK3568_Linux_fs/kernel/drivers/net/wireless/intersil/p54/p54.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Shared defines for all mac80211 Prism54 code
4*4882a593Smuzhiyun  *
5*4882a593Smuzhiyun  * Copyright (c) 2006, Michael Wu <flamingice@sourmilk.net>
6*4882a593Smuzhiyun  *
7*4882a593Smuzhiyun  * Based on the islsm (softmac prism54) driver, which is:
8*4882a593Smuzhiyun  * Copyright 2004-2006 Jean-Baptiste Note <jbnote@gmail.com>, et al.
9*4882a593Smuzhiyun  */
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun #ifndef P54_H
12*4882a593Smuzhiyun #define P54_H
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun #ifdef CONFIG_P54_LEDS
15*4882a593Smuzhiyun #include <linux/leds.h>
16*4882a593Smuzhiyun #endif /* CONFIG_P54_LEDS */
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun #define ISL38XX_DEV_FIRMWARE_ADDR 0x20000
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun #define BR_CODE_MIN			0x80000000
21*4882a593Smuzhiyun #define BR_CODE_COMPONENT_ID		0x80000001
22*4882a593Smuzhiyun #define BR_CODE_COMPONENT_VERSION	0x80000002
23*4882a593Smuzhiyun #define BR_CODE_DEPENDENT_IF		0x80000003
24*4882a593Smuzhiyun #define BR_CODE_EXPOSED_IF		0x80000004
25*4882a593Smuzhiyun #define BR_CODE_DESCR			0x80000101
26*4882a593Smuzhiyun #define BR_CODE_MAX			0x8FFFFFFF
27*4882a593Smuzhiyun #define BR_CODE_END_OF_BRA		0xFF0000FF
28*4882a593Smuzhiyun #define LEGACY_BR_CODE_END_OF_BRA	0xFFFFFFFF
29*4882a593Smuzhiyun 
30*4882a593Smuzhiyun struct bootrec {
31*4882a593Smuzhiyun 	__le32 code;
32*4882a593Smuzhiyun 	__le32 len;
33*4882a593Smuzhiyun 	u32 data[10];
34*4882a593Smuzhiyun } __packed;
35*4882a593Smuzhiyun 
36*4882a593Smuzhiyun /* Interface role definitions */
37*4882a593Smuzhiyun #define BR_INTERFACE_ROLE_SERVER	0x0000
38*4882a593Smuzhiyun #define BR_INTERFACE_ROLE_CLIENT	0x8000
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun #define BR_DESC_PRIV_CAP_WEP		BIT(0)
41*4882a593Smuzhiyun #define BR_DESC_PRIV_CAP_TKIP		BIT(1)
42*4882a593Smuzhiyun #define BR_DESC_PRIV_CAP_MICHAEL	BIT(2)
43*4882a593Smuzhiyun #define BR_DESC_PRIV_CAP_CCX_CP		BIT(3)
44*4882a593Smuzhiyun #define BR_DESC_PRIV_CAP_CCX_MIC	BIT(4)
45*4882a593Smuzhiyun #define BR_DESC_PRIV_CAP_AESCCMP	BIT(5)
46*4882a593Smuzhiyun 
47*4882a593Smuzhiyun struct bootrec_desc {
48*4882a593Smuzhiyun 	__le16 modes;
49*4882a593Smuzhiyun 	__le16 flags;
50*4882a593Smuzhiyun 	__le32 rx_start;
51*4882a593Smuzhiyun 	__le32 rx_end;
52*4882a593Smuzhiyun 	u8 headroom;
53*4882a593Smuzhiyun 	u8 tailroom;
54*4882a593Smuzhiyun 	u8 tx_queues;
55*4882a593Smuzhiyun 	u8 tx_depth;
56*4882a593Smuzhiyun 	u8 privacy_caps;
57*4882a593Smuzhiyun 	u8 rx_keycache_size;
58*4882a593Smuzhiyun 	u8 time_size;
59*4882a593Smuzhiyun 	u8 padding;
60*4882a593Smuzhiyun 	u8 rates[16];
61*4882a593Smuzhiyun 	u8 padding2[4];
62*4882a593Smuzhiyun 	__le16 rx_mtu;
63*4882a593Smuzhiyun } __packed;
64*4882a593Smuzhiyun 
65*4882a593Smuzhiyun #define FW_FMAC 0x464d4143
66*4882a593Smuzhiyun #define FW_LM86 0x4c4d3836
67*4882a593Smuzhiyun #define FW_LM87 0x4c4d3837
68*4882a593Smuzhiyun #define FW_LM20 0x4c4d3230
69*4882a593Smuzhiyun 
70*4882a593Smuzhiyun struct bootrec_comp_id {
71*4882a593Smuzhiyun 	__le32 fw_variant;
72*4882a593Smuzhiyun } __packed;
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun struct bootrec_comp_ver {
75*4882a593Smuzhiyun 	char fw_version[24];
76*4882a593Smuzhiyun } __packed;
77*4882a593Smuzhiyun 
78*4882a593Smuzhiyun struct bootrec_end {
79*4882a593Smuzhiyun 	__le16 crc;
80*4882a593Smuzhiyun 	u8 padding[2];
81*4882a593Smuzhiyun 	u8 md5[16];
82*4882a593Smuzhiyun } __packed;
83*4882a593Smuzhiyun 
84*4882a593Smuzhiyun /* provide 16 bytes for the transport back-end */
85*4882a593Smuzhiyun #define P54_TX_INFO_DATA_SIZE		16
86*4882a593Smuzhiyun 
87*4882a593Smuzhiyun /* stored in ieee80211_tx_info's rate_driver_data */
88*4882a593Smuzhiyun struct p54_tx_info {
89*4882a593Smuzhiyun 	u32 start_addr;
90*4882a593Smuzhiyun 	u32 end_addr;
91*4882a593Smuzhiyun 	union {
92*4882a593Smuzhiyun 		void *data[P54_TX_INFO_DATA_SIZE / sizeof(void *)];
93*4882a593Smuzhiyun 		struct {
94*4882a593Smuzhiyun 			u32 extra_len;
95*4882a593Smuzhiyun 		};
96*4882a593Smuzhiyun 	};
97*4882a593Smuzhiyun };
98*4882a593Smuzhiyun 
99*4882a593Smuzhiyun #define P54_MAX_CTRL_FRAME_LEN		0x1000
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun #define P54_SET_QUEUE(queue, ai_fs, cw_min, cw_max, _txop)	\
102*4882a593Smuzhiyun do {								\
103*4882a593Smuzhiyun 	queue.aifs = cpu_to_le16(ai_fs);			\
104*4882a593Smuzhiyun 	queue.cwmin = cpu_to_le16(cw_min);			\
105*4882a593Smuzhiyun 	queue.cwmax = cpu_to_le16(cw_max);			\
106*4882a593Smuzhiyun 	queue.txop = cpu_to_le16(_txop);			\
107*4882a593Smuzhiyun } while (0)
108*4882a593Smuzhiyun 
109*4882a593Smuzhiyun struct p54_edcf_queue_param {
110*4882a593Smuzhiyun 	__le16 aifs;
111*4882a593Smuzhiyun 	__le16 cwmin;
112*4882a593Smuzhiyun 	__le16 cwmax;
113*4882a593Smuzhiyun 	__le16 txop;
114*4882a593Smuzhiyun } __packed;
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun struct p54_rssi_db_entry {
117*4882a593Smuzhiyun 	u16 freq;
118*4882a593Smuzhiyun 	s16 mul;
119*4882a593Smuzhiyun 	s16 add;
120*4882a593Smuzhiyun 	s16 longbow_unkn;
121*4882a593Smuzhiyun 	s16 longbow_unk2;
122*4882a593Smuzhiyun };
123*4882a593Smuzhiyun 
124*4882a593Smuzhiyun struct p54_cal_database {
125*4882a593Smuzhiyun 	size_t entries;
126*4882a593Smuzhiyun 	size_t entry_size;
127*4882a593Smuzhiyun 	size_t offset;
128*4882a593Smuzhiyun 	size_t len;
129*4882a593Smuzhiyun 	u8 data[];
130*4882a593Smuzhiyun };
131*4882a593Smuzhiyun 
132*4882a593Smuzhiyun #define EEPROM_READBACK_LEN 0x3fc
133*4882a593Smuzhiyun 
134*4882a593Smuzhiyun enum fw_state {
135*4882a593Smuzhiyun 	FW_STATE_OFF,
136*4882a593Smuzhiyun 	FW_STATE_BOOTING,
137*4882a593Smuzhiyun 	FW_STATE_READY,
138*4882a593Smuzhiyun 	FW_STATE_RESET,
139*4882a593Smuzhiyun 	FW_STATE_RESETTING,
140*4882a593Smuzhiyun };
141*4882a593Smuzhiyun 
142*4882a593Smuzhiyun #ifdef CONFIG_P54_LEDS
143*4882a593Smuzhiyun 
144*4882a593Smuzhiyun #define P54_LED_MAX_NAME_LEN 31
145*4882a593Smuzhiyun 
146*4882a593Smuzhiyun struct p54_led_dev {
147*4882a593Smuzhiyun 	struct ieee80211_hw *hw_dev;
148*4882a593Smuzhiyun 	struct led_classdev led_dev;
149*4882a593Smuzhiyun 	char name[P54_LED_MAX_NAME_LEN + 1];
150*4882a593Smuzhiyun 
151*4882a593Smuzhiyun 	unsigned int toggled;
152*4882a593Smuzhiyun 	unsigned int index;
153*4882a593Smuzhiyun 	unsigned int registered;
154*4882a593Smuzhiyun };
155*4882a593Smuzhiyun 
156*4882a593Smuzhiyun #endif /* CONFIG_P54_LEDS */
157*4882a593Smuzhiyun 
158*4882a593Smuzhiyun struct p54_tx_queue_stats {
159*4882a593Smuzhiyun 	unsigned int len;
160*4882a593Smuzhiyun 	unsigned int limit;
161*4882a593Smuzhiyun 	unsigned int count;
162*4882a593Smuzhiyun };
163*4882a593Smuzhiyun 
164*4882a593Smuzhiyun struct p54_common {
165*4882a593Smuzhiyun 	struct ieee80211_hw *hw;
166*4882a593Smuzhiyun 	struct ieee80211_vif *vif;
167*4882a593Smuzhiyun 	void (*tx)(struct ieee80211_hw *dev, struct sk_buff *skb);
168*4882a593Smuzhiyun 	int (*open)(struct ieee80211_hw *dev);
169*4882a593Smuzhiyun 	void (*stop)(struct ieee80211_hw *dev);
170*4882a593Smuzhiyun 	struct sk_buff_head tx_pending;
171*4882a593Smuzhiyun 	struct sk_buff_head tx_queue;
172*4882a593Smuzhiyun 	struct mutex conf_mutex;
173*4882a593Smuzhiyun 	bool registered;
174*4882a593Smuzhiyun 
175*4882a593Smuzhiyun 	/* memory management (as seen by the firmware) */
176*4882a593Smuzhiyun 	u32 rx_start;
177*4882a593Smuzhiyun 	u32 rx_end;
178*4882a593Smuzhiyun 	u16 rx_mtu;
179*4882a593Smuzhiyun 	u8 headroom;
180*4882a593Smuzhiyun 	u8 tailroom;
181*4882a593Smuzhiyun 
182*4882a593Smuzhiyun 	/* firmware/hardware info */
183*4882a593Smuzhiyun 	unsigned int tx_hdr_len;
184*4882a593Smuzhiyun 	unsigned int fw_var;
185*4882a593Smuzhiyun 	unsigned int fw_interface;
186*4882a593Smuzhiyun 	u8 version;
187*4882a593Smuzhiyun 
188*4882a593Smuzhiyun 	/* (e)DCF / QOS state */
189*4882a593Smuzhiyun 	bool use_short_slot;
190*4882a593Smuzhiyun 	spinlock_t tx_stats_lock;
191*4882a593Smuzhiyun 	struct p54_tx_queue_stats tx_stats[8];
192*4882a593Smuzhiyun 	struct p54_edcf_queue_param qos_params[8];
193*4882a593Smuzhiyun 
194*4882a593Smuzhiyun 	/* Radio data */
195*4882a593Smuzhiyun 	u16 rxhw;
196*4882a593Smuzhiyun 	u8 rx_diversity_mask;
197*4882a593Smuzhiyun 	u8 tx_diversity_mask;
198*4882a593Smuzhiyun 	unsigned int output_power;
199*4882a593Smuzhiyun 	struct p54_rssi_db_entry *cur_rssi;
200*4882a593Smuzhiyun 	struct ieee80211_channel *curchan;
201*4882a593Smuzhiyun 	struct survey_info *survey;
202*4882a593Smuzhiyun 	unsigned int chan_num;
203*4882a593Smuzhiyun 	struct completion stat_comp;
204*4882a593Smuzhiyun 	bool update_stats;
205*4882a593Smuzhiyun 	struct {
206*4882a593Smuzhiyun 		unsigned int timestamp;
207*4882a593Smuzhiyun 		unsigned int cached_cca;
208*4882a593Smuzhiyun 		unsigned int cached_tx;
209*4882a593Smuzhiyun 		unsigned int cached_rssi;
210*4882a593Smuzhiyun 		u64 active;
211*4882a593Smuzhiyun 		u64 cca;
212*4882a593Smuzhiyun 		u64 tx;
213*4882a593Smuzhiyun 		u64 rssi;
214*4882a593Smuzhiyun 	} survey_raw;
215*4882a593Smuzhiyun 
216*4882a593Smuzhiyun 	int noise;
217*4882a593Smuzhiyun 	/* calibration, output power limit and rssi<->dBm conversation data */
218*4882a593Smuzhiyun 	struct pda_iq_autocal_entry *iq_autocal;
219*4882a593Smuzhiyun 	unsigned int iq_autocal_len;
220*4882a593Smuzhiyun 	struct p54_cal_database *curve_data;
221*4882a593Smuzhiyun 	struct p54_cal_database *output_limit;
222*4882a593Smuzhiyun 	struct p54_cal_database *rssi_db;
223*4882a593Smuzhiyun 	struct ieee80211_supported_band *band_table[NUM_NL80211_BANDS];
224*4882a593Smuzhiyun 
225*4882a593Smuzhiyun 	/* BBP/MAC state */
226*4882a593Smuzhiyun 	u8 mac_addr[ETH_ALEN];
227*4882a593Smuzhiyun 	u8 bssid[ETH_ALEN];
228*4882a593Smuzhiyun 	u8 mc_maclist[4][ETH_ALEN];
229*4882a593Smuzhiyun 	u16 wakeup_timer;
230*4882a593Smuzhiyun 	unsigned int filter_flags;
231*4882a593Smuzhiyun 	int mc_maclist_num;
232*4882a593Smuzhiyun 	int mode;
233*4882a593Smuzhiyun 	u32 tsf_low32, tsf_high32;
234*4882a593Smuzhiyun 	u32 basic_rate_mask;
235*4882a593Smuzhiyun 	u16 aid;
236*4882a593Smuzhiyun 	u8 coverage_class;
237*4882a593Smuzhiyun 	bool phy_idle;
238*4882a593Smuzhiyun 	bool phy_ps;
239*4882a593Smuzhiyun 	bool powersave_override;
240*4882a593Smuzhiyun 	__le32 beacon_req_id;
241*4882a593Smuzhiyun 	struct completion beacon_comp;
242*4882a593Smuzhiyun 
243*4882a593Smuzhiyun 	/* cryptographic engine information */
244*4882a593Smuzhiyun 	u8 privacy_caps;
245*4882a593Smuzhiyun 	u8 rx_keycache_size;
246*4882a593Smuzhiyun 	unsigned long *used_rxkeys;
247*4882a593Smuzhiyun 
248*4882a593Smuzhiyun 	/* LED management */
249*4882a593Smuzhiyun #ifdef CONFIG_P54_LEDS
250*4882a593Smuzhiyun 	struct p54_led_dev leds[4];
251*4882a593Smuzhiyun 	struct delayed_work led_work;
252*4882a593Smuzhiyun #endif /* CONFIG_P54_LEDS */
253*4882a593Smuzhiyun 	u16 softled_state;		/* bit field of glowing LEDs */
254*4882a593Smuzhiyun 
255*4882a593Smuzhiyun 	/* statistics */
256*4882a593Smuzhiyun 	struct ieee80211_low_level_stats stats;
257*4882a593Smuzhiyun 	struct delayed_work work;
258*4882a593Smuzhiyun 
259*4882a593Smuzhiyun 	/* eeprom handling */
260*4882a593Smuzhiyun 	void *eeprom;
261*4882a593Smuzhiyun 	struct completion eeprom_comp;
262*4882a593Smuzhiyun 	struct mutex eeprom_mutex;
263*4882a593Smuzhiyun };
264*4882a593Smuzhiyun 
265*4882a593Smuzhiyun /* interfaces for the drivers */
266*4882a593Smuzhiyun int p54_rx(struct ieee80211_hw *dev, struct sk_buff *skb);
267*4882a593Smuzhiyun void p54_free_skb(struct ieee80211_hw *dev, struct sk_buff *skb);
268*4882a593Smuzhiyun int p54_parse_firmware(struct ieee80211_hw *dev, const struct firmware *fw);
269*4882a593Smuzhiyun int p54_parse_eeprom(struct ieee80211_hw *dev, void *eeprom, int len);
270*4882a593Smuzhiyun int p54_read_eeprom(struct ieee80211_hw *dev);
271*4882a593Smuzhiyun 
272*4882a593Smuzhiyun struct ieee80211_hw *p54_init_common(size_t priv_data_len);
273*4882a593Smuzhiyun int p54_register_common(struct ieee80211_hw *dev, struct device *pdev);
274*4882a593Smuzhiyun void p54_free_common(struct ieee80211_hw *dev);
275*4882a593Smuzhiyun 
276*4882a593Smuzhiyun void p54_unregister_common(struct ieee80211_hw *dev);
277*4882a593Smuzhiyun 
278*4882a593Smuzhiyun #endif /* P54_H */
279