xref: /OK3568_Linux_fs/kernel/drivers/net/wireless/intersil/orinoco/hermes.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */
2*4882a593Smuzhiyun /* hermes.h
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * Driver core for the "Hermes" wireless MAC controller, as used in
5*4882a593Smuzhiyun  * the Lucent Orinoco and Cabletron RoamAbout cards. It should also
6*4882a593Smuzhiyun  * work on the hfa3841 and hfa3842 MAC controller chips used in the
7*4882a593Smuzhiyun  * Prism I & II chipsets.
8*4882a593Smuzhiyun  *
9*4882a593Smuzhiyun  * This is not a complete driver, just low-level access routines for
10*4882a593Smuzhiyun  * the MAC controller itself.
11*4882a593Smuzhiyun  *
12*4882a593Smuzhiyun  * Based on the prism2 driver from Absolute Value Systems' linux-wlan
13*4882a593Smuzhiyun  * project, the Linux wvlan_cs driver, Lucent's HCF-Light
14*4882a593Smuzhiyun  * (wvlan_hcf.c) library, and the NetBSD wireless driver.
15*4882a593Smuzhiyun  *
16*4882a593Smuzhiyun  * Copyright (C) 2000, David Gibson, Linuxcare Australia.
17*4882a593Smuzhiyun  * (C) Copyright David Gibson, IBM Corp. 2001-2003.
18*4882a593Smuzhiyun  *
19*4882a593Smuzhiyun  * Portions taken from hfa384x.h.
20*4882a593Smuzhiyun  * Copyright (C) 1999 AbsoluteValue Systems, Inc. All Rights Reserved.
21*4882a593Smuzhiyun  */
22*4882a593Smuzhiyun 
23*4882a593Smuzhiyun #ifndef _HERMES_H
24*4882a593Smuzhiyun #define _HERMES_H
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun /* Notes on locking:
27*4882a593Smuzhiyun  *
28*4882a593Smuzhiyun  * As a module of low level hardware access routines, there is no
29*4882a593Smuzhiyun  * locking. Users of this module should ensure that they serialize
30*4882a593Smuzhiyun  * access to the hermes structure, and to the hardware
31*4882a593Smuzhiyun */
32*4882a593Smuzhiyun 
33*4882a593Smuzhiyun #include <linux/if_ether.h>
34*4882a593Smuzhiyun #include <linux/io.h>
35*4882a593Smuzhiyun 
36*4882a593Smuzhiyun /*
37*4882a593Smuzhiyun  * Limits and constants
38*4882a593Smuzhiyun  */
39*4882a593Smuzhiyun #define		HERMES_ALLOC_LEN_MIN		(4)
40*4882a593Smuzhiyun #define		HERMES_ALLOC_LEN_MAX		(2400)
41*4882a593Smuzhiyun #define		HERMES_LTV_LEN_MAX		(34)
42*4882a593Smuzhiyun #define		HERMES_BAP_DATALEN_MAX		(4096)
43*4882a593Smuzhiyun #define		HERMES_BAP_OFFSET_MAX		(4096)
44*4882a593Smuzhiyun #define		HERMES_PORTID_MAX		(7)
45*4882a593Smuzhiyun #define		HERMES_NUMPORTS_MAX		(HERMES_PORTID_MAX + 1)
46*4882a593Smuzhiyun #define		HERMES_PDR_LEN_MAX		(260)	/* in bytes, from EK */
47*4882a593Smuzhiyun #define		HERMES_PDA_RECS_MAX		(200)	/* a guess */
48*4882a593Smuzhiyun #define		HERMES_PDA_LEN_MAX		(1024)	/* in bytes, from EK */
49*4882a593Smuzhiyun #define		HERMES_SCANRESULT_MAX		(35)
50*4882a593Smuzhiyun #define		HERMES_CHINFORESULT_MAX		(8)
51*4882a593Smuzhiyun #define		HERMES_MAX_MULTICAST		(16)
52*4882a593Smuzhiyun #define		HERMES_MAGIC			(0x7d1f)
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun /*
55*4882a593Smuzhiyun  * Hermes register offsets
56*4882a593Smuzhiyun  */
57*4882a593Smuzhiyun #define		HERMES_CMD			(0x00)
58*4882a593Smuzhiyun #define		HERMES_PARAM0			(0x02)
59*4882a593Smuzhiyun #define		HERMES_PARAM1			(0x04)
60*4882a593Smuzhiyun #define		HERMES_PARAM2			(0x06)
61*4882a593Smuzhiyun #define		HERMES_STATUS			(0x08)
62*4882a593Smuzhiyun #define		HERMES_RESP0			(0x0A)
63*4882a593Smuzhiyun #define		HERMES_RESP1			(0x0C)
64*4882a593Smuzhiyun #define		HERMES_RESP2			(0x0E)
65*4882a593Smuzhiyun #define		HERMES_INFOFID			(0x10)
66*4882a593Smuzhiyun #define		HERMES_RXFID			(0x20)
67*4882a593Smuzhiyun #define		HERMES_ALLOCFID			(0x22)
68*4882a593Smuzhiyun #define		HERMES_TXCOMPLFID		(0x24)
69*4882a593Smuzhiyun #define		HERMES_SELECT0			(0x18)
70*4882a593Smuzhiyun #define		HERMES_OFFSET0			(0x1C)
71*4882a593Smuzhiyun #define		HERMES_DATA0			(0x36)
72*4882a593Smuzhiyun #define		HERMES_SELECT1			(0x1A)
73*4882a593Smuzhiyun #define		HERMES_OFFSET1			(0x1E)
74*4882a593Smuzhiyun #define		HERMES_DATA1			(0x38)
75*4882a593Smuzhiyun #define		HERMES_EVSTAT			(0x30)
76*4882a593Smuzhiyun #define		HERMES_INTEN			(0x32)
77*4882a593Smuzhiyun #define		HERMES_EVACK			(0x34)
78*4882a593Smuzhiyun #define		HERMES_CONTROL			(0x14)
79*4882a593Smuzhiyun #define		HERMES_SWSUPPORT0		(0x28)
80*4882a593Smuzhiyun #define		HERMES_SWSUPPORT1		(0x2A)
81*4882a593Smuzhiyun #define		HERMES_SWSUPPORT2		(0x2C)
82*4882a593Smuzhiyun #define		HERMES_AUXPAGE			(0x3A)
83*4882a593Smuzhiyun #define		HERMES_AUXOFFSET		(0x3C)
84*4882a593Smuzhiyun #define		HERMES_AUXDATA			(0x3E)
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun /*
87*4882a593Smuzhiyun  * CMD register bitmasks
88*4882a593Smuzhiyun  */
89*4882a593Smuzhiyun #define		HERMES_CMD_BUSY			(0x8000)
90*4882a593Smuzhiyun #define		HERMES_CMD_AINFO		(0x7f00)
91*4882a593Smuzhiyun #define		HERMES_CMD_MACPORT		(0x0700)
92*4882a593Smuzhiyun #define		HERMES_CMD_RECL			(0x0100)
93*4882a593Smuzhiyun #define		HERMES_CMD_WRITE		(0x0100)
94*4882a593Smuzhiyun #define		HERMES_CMD_PROGMODE		(0x0300)
95*4882a593Smuzhiyun #define		HERMES_CMD_CMDCODE		(0x003f)
96*4882a593Smuzhiyun 
97*4882a593Smuzhiyun /*
98*4882a593Smuzhiyun  * STATUS register bitmasks
99*4882a593Smuzhiyun  */
100*4882a593Smuzhiyun #define		HERMES_STATUS_RESULT		(0x7f00)
101*4882a593Smuzhiyun #define		HERMES_STATUS_CMDCODE		(0x003f)
102*4882a593Smuzhiyun 
103*4882a593Smuzhiyun /*
104*4882a593Smuzhiyun  * OFFSET register bitmasks
105*4882a593Smuzhiyun  */
106*4882a593Smuzhiyun #define		HERMES_OFFSET_BUSY		(0x8000)
107*4882a593Smuzhiyun #define		HERMES_OFFSET_ERR		(0x4000)
108*4882a593Smuzhiyun #define		HERMES_OFFSET_DATAOFF		(0x0ffe)
109*4882a593Smuzhiyun 
110*4882a593Smuzhiyun /*
111*4882a593Smuzhiyun  * Event register bitmasks (INTEN, EVSTAT, EVACK)
112*4882a593Smuzhiyun  */
113*4882a593Smuzhiyun #define		HERMES_EV_TICK			(0x8000)
114*4882a593Smuzhiyun #define		HERMES_EV_WTERR			(0x4000)
115*4882a593Smuzhiyun #define		HERMES_EV_INFDROP		(0x2000)
116*4882a593Smuzhiyun #define		HERMES_EV_INFO			(0x0080)
117*4882a593Smuzhiyun #define		HERMES_EV_DTIM			(0x0020)
118*4882a593Smuzhiyun #define		HERMES_EV_CMD			(0x0010)
119*4882a593Smuzhiyun #define		HERMES_EV_ALLOC			(0x0008)
120*4882a593Smuzhiyun #define		HERMES_EV_TXEXC			(0x0004)
121*4882a593Smuzhiyun #define		HERMES_EV_TX			(0x0002)
122*4882a593Smuzhiyun #define		HERMES_EV_RX			(0x0001)
123*4882a593Smuzhiyun 
124*4882a593Smuzhiyun /*
125*4882a593Smuzhiyun  * Command codes
126*4882a593Smuzhiyun  */
127*4882a593Smuzhiyun /*--- Controller Commands ----------------------------*/
128*4882a593Smuzhiyun #define		HERMES_CMD_INIT			(0x0000)
129*4882a593Smuzhiyun #define		HERMES_CMD_ENABLE		(0x0001)
130*4882a593Smuzhiyun #define		HERMES_CMD_DISABLE		(0x0002)
131*4882a593Smuzhiyun #define		HERMES_CMD_DIAG			(0x0003)
132*4882a593Smuzhiyun 
133*4882a593Smuzhiyun /*--- Buffer Mgmt Commands ---------------------------*/
134*4882a593Smuzhiyun #define		HERMES_CMD_ALLOC		(0x000A)
135*4882a593Smuzhiyun #define		HERMES_CMD_TX			(0x000B)
136*4882a593Smuzhiyun 
137*4882a593Smuzhiyun /*--- Regulate Commands ------------------------------*/
138*4882a593Smuzhiyun #define		HERMES_CMD_NOTIFY		(0x0010)
139*4882a593Smuzhiyun #define		HERMES_CMD_INQUIRE		(0x0011)
140*4882a593Smuzhiyun 
141*4882a593Smuzhiyun /*--- Configure Commands -----------------------------*/
142*4882a593Smuzhiyun #define		HERMES_CMD_ACCESS		(0x0021)
143*4882a593Smuzhiyun #define		HERMES_CMD_DOWNLD		(0x0022)
144*4882a593Smuzhiyun 
145*4882a593Smuzhiyun /*--- Serial I/O Commands ----------------------------*/
146*4882a593Smuzhiyun #define		HERMES_CMD_READMIF		(0x0030)
147*4882a593Smuzhiyun #define		HERMES_CMD_WRITEMIF		(0x0031)
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun /*--- Debugging Commands -----------------------------*/
150*4882a593Smuzhiyun #define		HERMES_CMD_TEST			(0x0038)
151*4882a593Smuzhiyun 
152*4882a593Smuzhiyun 
153*4882a593Smuzhiyun /* Test command arguments */
154*4882a593Smuzhiyun #define		HERMES_TEST_SET_CHANNEL		0x0800
155*4882a593Smuzhiyun #define		HERMES_TEST_MONITOR		0x0b00
156*4882a593Smuzhiyun #define		HERMES_TEST_STOP		0x0f00
157*4882a593Smuzhiyun 
158*4882a593Smuzhiyun /* Authentication algorithms */
159*4882a593Smuzhiyun #define		HERMES_AUTH_OPEN		1
160*4882a593Smuzhiyun #define		HERMES_AUTH_SHARED_KEY		2
161*4882a593Smuzhiyun 
162*4882a593Smuzhiyun /* WEP settings */
163*4882a593Smuzhiyun #define		HERMES_WEP_PRIVACY_INVOKED	0x0001
164*4882a593Smuzhiyun #define		HERMES_WEP_EXCL_UNENCRYPTED	0x0002
165*4882a593Smuzhiyun #define		HERMES_WEP_HOST_ENCRYPT		0x0010
166*4882a593Smuzhiyun #define		HERMES_WEP_HOST_DECRYPT		0x0080
167*4882a593Smuzhiyun 
168*4882a593Smuzhiyun /* Symbol hostscan options */
169*4882a593Smuzhiyun #define		HERMES_HOSTSCAN_SYMBOL_5SEC	0x0001
170*4882a593Smuzhiyun #define		HERMES_HOSTSCAN_SYMBOL_ONCE	0x0002
171*4882a593Smuzhiyun #define		HERMES_HOSTSCAN_SYMBOL_PASSIVE	0x0040
172*4882a593Smuzhiyun #define		HERMES_HOSTSCAN_SYMBOL_BCAST	0x0080
173*4882a593Smuzhiyun 
174*4882a593Smuzhiyun /*
175*4882a593Smuzhiyun  * Frame structures and constants
176*4882a593Smuzhiyun  */
177*4882a593Smuzhiyun 
178*4882a593Smuzhiyun #define HERMES_DESCRIPTOR_OFFSET	0
179*4882a593Smuzhiyun #define HERMES_802_11_OFFSET		(14)
180*4882a593Smuzhiyun #define HERMES_802_3_OFFSET		(14 + 32)
181*4882a593Smuzhiyun #define HERMES_802_2_OFFSET		(14 + 32 + 14)
182*4882a593Smuzhiyun #define HERMES_TXCNTL2_OFFSET		(HERMES_802_3_OFFSET - 2)
183*4882a593Smuzhiyun 
184*4882a593Smuzhiyun #define HERMES_RXSTAT_ERR		(0x0003)
185*4882a593Smuzhiyun #define	HERMES_RXSTAT_BADCRC		(0x0001)
186*4882a593Smuzhiyun #define	HERMES_RXSTAT_UNDECRYPTABLE	(0x0002)
187*4882a593Smuzhiyun #define	HERMES_RXSTAT_MIC		(0x0010)	/* Frame contains MIC */
188*4882a593Smuzhiyun #define	HERMES_RXSTAT_MACPORT		(0x0700)
189*4882a593Smuzhiyun #define HERMES_RXSTAT_PCF		(0x1000)	/* Frame was received in CF period */
190*4882a593Smuzhiyun #define	HERMES_RXSTAT_MIC_KEY_ID	(0x1800)	/* MIC key used */
191*4882a593Smuzhiyun #define	HERMES_RXSTAT_MSGTYPE		(0xE000)
192*4882a593Smuzhiyun #define	HERMES_RXSTAT_1042		(0x2000)	/* RFC-1042 frame */
193*4882a593Smuzhiyun #define	HERMES_RXSTAT_TUNNEL		(0x4000)	/* bridge-tunnel encoded frame */
194*4882a593Smuzhiyun #define	HERMES_RXSTAT_WMP		(0x6000)	/* Wavelan-II Management Protocol frame */
195*4882a593Smuzhiyun 
196*4882a593Smuzhiyun /* Shift amount for key ID in RXSTAT and TXCTRL */
197*4882a593Smuzhiyun #define	HERMES_MIC_KEY_ID_SHIFT		11
198*4882a593Smuzhiyun 
199*4882a593Smuzhiyun struct hermes_tx_descriptor {
200*4882a593Smuzhiyun 	__le16 status;
201*4882a593Smuzhiyun 	__le16 reserved1;
202*4882a593Smuzhiyun 	__le16 reserved2;
203*4882a593Smuzhiyun 	__le32 sw_support;
204*4882a593Smuzhiyun 	u8 retry_count;
205*4882a593Smuzhiyun 	u8 tx_rate;
206*4882a593Smuzhiyun 	__le16 tx_control;
207*4882a593Smuzhiyun } __packed;
208*4882a593Smuzhiyun 
209*4882a593Smuzhiyun #define HERMES_TXSTAT_RETRYERR		(0x0001)
210*4882a593Smuzhiyun #define HERMES_TXSTAT_AGEDERR		(0x0002)
211*4882a593Smuzhiyun #define HERMES_TXSTAT_DISCON		(0x0004)
212*4882a593Smuzhiyun #define HERMES_TXSTAT_FORMERR		(0x0008)
213*4882a593Smuzhiyun 
214*4882a593Smuzhiyun #define HERMES_TXCTRL_TX_OK		(0x0002)	/* ?? interrupt on Tx complete */
215*4882a593Smuzhiyun #define HERMES_TXCTRL_TX_EX		(0x0004)	/* ?? interrupt on Tx exception */
216*4882a593Smuzhiyun #define HERMES_TXCTRL_802_11		(0x0008)	/* We supply 802.11 header */
217*4882a593Smuzhiyun #define HERMES_TXCTRL_MIC		(0x0010)	/* 802.3 + TKIP */
218*4882a593Smuzhiyun #define HERMES_TXCTRL_MIC_KEY_ID	(0x1800)	/* MIC Key ID mask */
219*4882a593Smuzhiyun #define HERMES_TXCTRL_ALT_RTRY		(0x0020)
220*4882a593Smuzhiyun 
221*4882a593Smuzhiyun /* Inquiry constants and data types */
222*4882a593Smuzhiyun 
223*4882a593Smuzhiyun #define HERMES_INQ_TALLIES		(0xF100)
224*4882a593Smuzhiyun #define HERMES_INQ_SCAN			(0xF101)
225*4882a593Smuzhiyun #define HERMES_INQ_CHANNELINFO		(0xF102)
226*4882a593Smuzhiyun #define HERMES_INQ_HOSTSCAN		(0xF103)
227*4882a593Smuzhiyun #define HERMES_INQ_HOSTSCAN_SYMBOL	(0xF104)
228*4882a593Smuzhiyun #define HERMES_INQ_LINKSTATUS		(0xF200)
229*4882a593Smuzhiyun #define HERMES_INQ_SEC_STAT_AGERE	(0xF202)
230*4882a593Smuzhiyun 
231*4882a593Smuzhiyun struct hermes_tallies_frame {
232*4882a593Smuzhiyun 	__le16 TxUnicastFrames;
233*4882a593Smuzhiyun 	__le16 TxMulticastFrames;
234*4882a593Smuzhiyun 	__le16 TxFragments;
235*4882a593Smuzhiyun 	__le16 TxUnicastOctets;
236*4882a593Smuzhiyun 	__le16 TxMulticastOctets;
237*4882a593Smuzhiyun 	__le16 TxDeferredTransmissions;
238*4882a593Smuzhiyun 	__le16 TxSingleRetryFrames;
239*4882a593Smuzhiyun 	__le16 TxMultipleRetryFrames;
240*4882a593Smuzhiyun 	__le16 TxRetryLimitExceeded;
241*4882a593Smuzhiyun 	__le16 TxDiscards;
242*4882a593Smuzhiyun 	__le16 RxUnicastFrames;
243*4882a593Smuzhiyun 	__le16 RxMulticastFrames;
244*4882a593Smuzhiyun 	__le16 RxFragments;
245*4882a593Smuzhiyun 	__le16 RxUnicastOctets;
246*4882a593Smuzhiyun 	__le16 RxMulticastOctets;
247*4882a593Smuzhiyun 	__le16 RxFCSErrors;
248*4882a593Smuzhiyun 	__le16 RxDiscards_NoBuffer;
249*4882a593Smuzhiyun 	__le16 TxDiscardsWrongSA;
250*4882a593Smuzhiyun 	__le16 RxWEPUndecryptable;
251*4882a593Smuzhiyun 	__le16 RxMsgInMsgFragments;
252*4882a593Smuzhiyun 	__le16 RxMsgInBadMsgFragments;
253*4882a593Smuzhiyun 	/* Those last are probably not available in very old firmwares */
254*4882a593Smuzhiyun 	__le16 RxDiscards_WEPICVError;
255*4882a593Smuzhiyun 	__le16 RxDiscards_WEPExcluded;
256*4882a593Smuzhiyun } __packed;
257*4882a593Smuzhiyun 
258*4882a593Smuzhiyun /* Grabbed from wlan-ng - Thanks Mark... - Jean II
259*4882a593Smuzhiyun  * This is the result of a scan inquiry command */
260*4882a593Smuzhiyun /* Structure describing info about an Access Point */
261*4882a593Smuzhiyun struct prism2_scan_apinfo {
262*4882a593Smuzhiyun 	__le16 channel;		/* Channel where the AP sits */
263*4882a593Smuzhiyun 	__le16 noise;		/* Noise level */
264*4882a593Smuzhiyun 	__le16 level;		/* Signal level */
265*4882a593Smuzhiyun 	u8 bssid[ETH_ALEN];	/* MAC address of the Access Point */
266*4882a593Smuzhiyun 	__le16 beacon_interv;	/* Beacon interval */
267*4882a593Smuzhiyun 	__le16 capabilities;	/* Capabilities */
268*4882a593Smuzhiyun 	__le16 essid_len;	/* ESSID length */
269*4882a593Smuzhiyun 	u8 essid[32];		/* ESSID of the network */
270*4882a593Smuzhiyun 	u8 rates[10];		/* Bit rate supported */
271*4882a593Smuzhiyun 	__le16 proberesp_rate;	/* Data rate of the response frame */
272*4882a593Smuzhiyun 	__le16 atim;		/* ATIM window time, Kus (hostscan only) */
273*4882a593Smuzhiyun } __packed;
274*4882a593Smuzhiyun 
275*4882a593Smuzhiyun /* Same stuff for the Lucent/Agere card.
276*4882a593Smuzhiyun  * Thanks to h1kari <h1kari AT dachb0den.com> - Jean II */
277*4882a593Smuzhiyun struct agere_scan_apinfo {
278*4882a593Smuzhiyun 	__le16 channel;		/* Channel where the AP sits */
279*4882a593Smuzhiyun 	__le16 noise;		/* Noise level */
280*4882a593Smuzhiyun 	__le16 level;		/* Signal level */
281*4882a593Smuzhiyun 	u8 bssid[ETH_ALEN];	/* MAC address of the Access Point */
282*4882a593Smuzhiyun 	__le16 beacon_interv;	/* Beacon interval */
283*4882a593Smuzhiyun 	__le16 capabilities;	/* Capabilities */
284*4882a593Smuzhiyun 	/* bits: 0-ess, 1-ibss, 4-privacy [wep] */
285*4882a593Smuzhiyun 	__le16 essid_len;	/* ESSID length */
286*4882a593Smuzhiyun 	u8 essid[32];		/* ESSID of the network */
287*4882a593Smuzhiyun } __packed;
288*4882a593Smuzhiyun 
289*4882a593Smuzhiyun /* Moustafa: Scan structure for Symbol cards */
290*4882a593Smuzhiyun struct symbol_scan_apinfo {
291*4882a593Smuzhiyun 	u8 channel;		/* Channel where the AP sits */
292*4882a593Smuzhiyun 	u8 unknown1;		/* 8 in 2.9x and 3.9x f/w, 0 otherwise */
293*4882a593Smuzhiyun 	__le16 noise;		/* Noise level */
294*4882a593Smuzhiyun 	__le16 level;		/* Signal level */
295*4882a593Smuzhiyun 	u8 bssid[ETH_ALEN];	/* MAC address of the Access Point */
296*4882a593Smuzhiyun 	__le16 beacon_interv;	/* Beacon interval */
297*4882a593Smuzhiyun 	__le16 capabilities;	/* Capabilities */
298*4882a593Smuzhiyun 	/* bits: 0-ess, 1-ibss, 4-privacy [wep] */
299*4882a593Smuzhiyun 	__le16 essid_len;	/* ESSID length */
300*4882a593Smuzhiyun 	u8 essid[32];		/* ESSID of the network */
301*4882a593Smuzhiyun 	__le16 rates[5];	/* Bit rate supported */
302*4882a593Smuzhiyun 	__le16 basic_rates;	/* Basic rates bitmask */
303*4882a593Smuzhiyun 	u8 unknown2[6];		/* Always FF:FF:FF:FF:00:00 */
304*4882a593Smuzhiyun 	u8 unknown3[8];		/* Always 0, appeared in f/w 3.91-68 */
305*4882a593Smuzhiyun } __packed;
306*4882a593Smuzhiyun 
307*4882a593Smuzhiyun union hermes_scan_info {
308*4882a593Smuzhiyun 	struct agere_scan_apinfo	a;
309*4882a593Smuzhiyun 	struct prism2_scan_apinfo	p;
310*4882a593Smuzhiyun 	struct symbol_scan_apinfo	s;
311*4882a593Smuzhiyun };
312*4882a593Smuzhiyun 
313*4882a593Smuzhiyun /* Extended scan struct for HERMES_INQ_CHANNELINFO.
314*4882a593Smuzhiyun  * wl_lkm calls this an ACS scan (Automatic Channel Select).
315*4882a593Smuzhiyun  * Keep out of union hermes_scan_info because it is much bigger than
316*4882a593Smuzhiyun  * the older scan structures. */
317*4882a593Smuzhiyun struct agere_ext_scan_info {
318*4882a593Smuzhiyun 	__le16	reserved0;
319*4882a593Smuzhiyun 
320*4882a593Smuzhiyun 	u8	noise;
321*4882a593Smuzhiyun 	u8	level;
322*4882a593Smuzhiyun 	u8	rx_flow;
323*4882a593Smuzhiyun 	u8	rate;
324*4882a593Smuzhiyun 	__le16	reserved1[2];
325*4882a593Smuzhiyun 
326*4882a593Smuzhiyun 	__le16	frame_control;
327*4882a593Smuzhiyun 	__le16	dur_id;
328*4882a593Smuzhiyun 	u8	addr1[ETH_ALEN];
329*4882a593Smuzhiyun 	u8	addr2[ETH_ALEN];
330*4882a593Smuzhiyun 	u8	bssid[ETH_ALEN];
331*4882a593Smuzhiyun 	__le16	sequence;
332*4882a593Smuzhiyun 	u8	addr4[ETH_ALEN];
333*4882a593Smuzhiyun 
334*4882a593Smuzhiyun 	__le16	data_length;
335*4882a593Smuzhiyun 
336*4882a593Smuzhiyun 	/* Next 3 fields do not get filled in. */
337*4882a593Smuzhiyun 	u8	daddr[ETH_ALEN];
338*4882a593Smuzhiyun 	u8	saddr[ETH_ALEN];
339*4882a593Smuzhiyun 	__le16	len_type;
340*4882a593Smuzhiyun 
341*4882a593Smuzhiyun 	__le64	timestamp;
342*4882a593Smuzhiyun 	__le16	beacon_interval;
343*4882a593Smuzhiyun 	__le16	capabilities;
344*4882a593Smuzhiyun 	u8	data[];
345*4882a593Smuzhiyun } __packed;
346*4882a593Smuzhiyun 
347*4882a593Smuzhiyun #define HERMES_LINKSTATUS_NOT_CONNECTED   (0x0000)
348*4882a593Smuzhiyun #define HERMES_LINKSTATUS_CONNECTED       (0x0001)
349*4882a593Smuzhiyun #define HERMES_LINKSTATUS_DISCONNECTED    (0x0002)
350*4882a593Smuzhiyun #define HERMES_LINKSTATUS_AP_CHANGE       (0x0003)
351*4882a593Smuzhiyun #define HERMES_LINKSTATUS_AP_OUT_OF_RANGE (0x0004)
352*4882a593Smuzhiyun #define HERMES_LINKSTATUS_AP_IN_RANGE     (0x0005)
353*4882a593Smuzhiyun #define HERMES_LINKSTATUS_ASSOC_FAILED    (0x0006)
354*4882a593Smuzhiyun 
355*4882a593Smuzhiyun struct hermes_linkstatus {
356*4882a593Smuzhiyun 	__le16 linkstatus;         /* Link status */
357*4882a593Smuzhiyun } __packed;
358*4882a593Smuzhiyun 
359*4882a593Smuzhiyun struct hermes_response {
360*4882a593Smuzhiyun 	u16 status, resp0, resp1, resp2;
361*4882a593Smuzhiyun };
362*4882a593Smuzhiyun 
363*4882a593Smuzhiyun /* "ID" structure - used for ESSID and station nickname */
364*4882a593Smuzhiyun struct hermes_idstring {
365*4882a593Smuzhiyun 	__le16 len;
366*4882a593Smuzhiyun 	__le16 val[16];
367*4882a593Smuzhiyun } __packed;
368*4882a593Smuzhiyun 
369*4882a593Smuzhiyun struct hermes_multicast {
370*4882a593Smuzhiyun 	u8 addr[HERMES_MAX_MULTICAST][ETH_ALEN];
371*4882a593Smuzhiyun } __packed;
372*4882a593Smuzhiyun 
373*4882a593Smuzhiyun /* Timeouts */
374*4882a593Smuzhiyun #define HERMES_BAP_BUSY_TIMEOUT (10000) /* In iterations of ~1us */
375*4882a593Smuzhiyun 
376*4882a593Smuzhiyun struct hermes;
377*4882a593Smuzhiyun 
378*4882a593Smuzhiyun /* Functions to access hardware */
379*4882a593Smuzhiyun struct hermes_ops {
380*4882a593Smuzhiyun 	int (*init)(struct hermes *hw);
381*4882a593Smuzhiyun 	int (*cmd_wait)(struct hermes *hw, u16 cmd, u16 parm0,
382*4882a593Smuzhiyun 			struct hermes_response *resp);
383*4882a593Smuzhiyun 	int (*init_cmd_wait)(struct hermes *hw, u16 cmd,
384*4882a593Smuzhiyun 			     u16 parm0, u16 parm1, u16 parm2,
385*4882a593Smuzhiyun 			     struct hermes_response *resp);
386*4882a593Smuzhiyun 	int (*allocate)(struct hermes *hw, u16 size, u16 *fid);
387*4882a593Smuzhiyun 	int (*read_ltv)(struct hermes *hw, int bap, u16 rid, unsigned buflen,
388*4882a593Smuzhiyun 			u16 *length, void *buf);
389*4882a593Smuzhiyun 	int (*write_ltv)(struct hermes *hw, int bap, u16 rid,
390*4882a593Smuzhiyun 			 u16 length, const void *value);
391*4882a593Smuzhiyun 	int (*bap_pread)(struct hermes *hw, int bap, void *buf, int len,
392*4882a593Smuzhiyun 			 u16 id, u16 offset);
393*4882a593Smuzhiyun 	int (*bap_pwrite)(struct hermes *hw, int bap, const void *buf,
394*4882a593Smuzhiyun 			  int len, u16 id, u16 offset);
395*4882a593Smuzhiyun 	int (*read_pda)(struct hermes *hw, __le16 *pda,
396*4882a593Smuzhiyun 			u32 pda_addr, u16 pda_len);
397*4882a593Smuzhiyun 	int (*program_init)(struct hermes *hw, u32 entry_point);
398*4882a593Smuzhiyun 	int (*program_end)(struct hermes *hw);
399*4882a593Smuzhiyun 	int (*program)(struct hermes *hw, const char *buf,
400*4882a593Smuzhiyun 		       u32 addr, u32 len);
401*4882a593Smuzhiyun 	void (*lock_irqsave)(spinlock_t *lock, unsigned long *flags);
402*4882a593Smuzhiyun 	void (*unlock_irqrestore)(spinlock_t *lock, unsigned long *flags);
403*4882a593Smuzhiyun 	void (*lock_irq)(spinlock_t *lock);
404*4882a593Smuzhiyun 	void (*unlock_irq)(spinlock_t *lock);
405*4882a593Smuzhiyun };
406*4882a593Smuzhiyun 
407*4882a593Smuzhiyun /* Basic control structure */
408*4882a593Smuzhiyun struct hermes {
409*4882a593Smuzhiyun 	void __iomem *iobase;
410*4882a593Smuzhiyun 	int reg_spacing;
411*4882a593Smuzhiyun #define HERMES_16BIT_REGSPACING	0
412*4882a593Smuzhiyun #define HERMES_32BIT_REGSPACING	1
413*4882a593Smuzhiyun 	u16 inten; /* Which interrupts should be enabled? */
414*4882a593Smuzhiyun 	bool eeprom_pda;
415*4882a593Smuzhiyun 	const struct hermes_ops *ops;
416*4882a593Smuzhiyun 	void *priv;
417*4882a593Smuzhiyun };
418*4882a593Smuzhiyun 
419*4882a593Smuzhiyun /* Register access convenience macros */
420*4882a593Smuzhiyun #define hermes_read_reg(hw, off) \
421*4882a593Smuzhiyun 	(ioread16((hw)->iobase + ((off) << (hw)->reg_spacing)))
422*4882a593Smuzhiyun #define hermes_write_reg(hw, off, val) \
423*4882a593Smuzhiyun 	(iowrite16((val), (hw)->iobase + ((off) << (hw)->reg_spacing)))
424*4882a593Smuzhiyun #define hermes_read_regn(hw, name) hermes_read_reg((hw), HERMES_##name)
425*4882a593Smuzhiyun #define hermes_write_regn(hw, name, val) \
426*4882a593Smuzhiyun 	hermes_write_reg((hw), HERMES_##name, (val))
427*4882a593Smuzhiyun 
428*4882a593Smuzhiyun /* Function prototypes */
429*4882a593Smuzhiyun void hermes_struct_init(struct hermes *hw, void __iomem *address,
430*4882a593Smuzhiyun 			int reg_spacing);
431*4882a593Smuzhiyun 
432*4882a593Smuzhiyun /* Inline functions */
433*4882a593Smuzhiyun 
hermes_present(struct hermes * hw)434*4882a593Smuzhiyun static inline int hermes_present(struct hermes *hw)
435*4882a593Smuzhiyun {
436*4882a593Smuzhiyun 	return hermes_read_regn(hw, SWSUPPORT0) == HERMES_MAGIC;
437*4882a593Smuzhiyun }
438*4882a593Smuzhiyun 
hermes_set_irqmask(struct hermes * hw,u16 events)439*4882a593Smuzhiyun static inline void hermes_set_irqmask(struct hermes *hw, u16 events)
440*4882a593Smuzhiyun {
441*4882a593Smuzhiyun 	hw->inten = events;
442*4882a593Smuzhiyun 	hermes_write_regn(hw, INTEN, events);
443*4882a593Smuzhiyun }
444*4882a593Smuzhiyun 
hermes_enable_port(struct hermes * hw,int port)445*4882a593Smuzhiyun static inline int hermes_enable_port(struct hermes *hw, int port)
446*4882a593Smuzhiyun {
447*4882a593Smuzhiyun 	return hw->ops->cmd_wait(hw, HERMES_CMD_ENABLE | (port << 8),
448*4882a593Smuzhiyun 				 0, NULL);
449*4882a593Smuzhiyun }
450*4882a593Smuzhiyun 
hermes_disable_port(struct hermes * hw,int port)451*4882a593Smuzhiyun static inline int hermes_disable_port(struct hermes *hw, int port)
452*4882a593Smuzhiyun {
453*4882a593Smuzhiyun 	return hw->ops->cmd_wait(hw, HERMES_CMD_DISABLE | (port << 8),
454*4882a593Smuzhiyun 				 0, NULL);
455*4882a593Smuzhiyun }
456*4882a593Smuzhiyun 
457*4882a593Smuzhiyun /* Initiate an INQUIRE command (tallies or scan).  The result will come as an
458*4882a593Smuzhiyun  * information frame in __orinoco_ev_info() */
hermes_inquire(struct hermes * hw,u16 rid)459*4882a593Smuzhiyun static inline int hermes_inquire(struct hermes *hw, u16 rid)
460*4882a593Smuzhiyun {
461*4882a593Smuzhiyun 	return hw->ops->cmd_wait(hw, HERMES_CMD_INQUIRE, rid, NULL);
462*4882a593Smuzhiyun }
463*4882a593Smuzhiyun 
464*4882a593Smuzhiyun #define HERMES_BYTES_TO_RECLEN(n) ((((n) + 1) / 2) + 1)
465*4882a593Smuzhiyun #define HERMES_RECLEN_TO_BYTES(n) (((n) - 1) * 2)
466*4882a593Smuzhiyun 
467*4882a593Smuzhiyun /* Note that for the next two, the count is in 16-bit words, not bytes */
hermes_read_words(struct hermes * hw,int off,void * buf,unsigned count)468*4882a593Smuzhiyun static inline void hermes_read_words(struct hermes *hw, int off,
469*4882a593Smuzhiyun 				     void *buf, unsigned count)
470*4882a593Smuzhiyun {
471*4882a593Smuzhiyun 	off = off << hw->reg_spacing;
472*4882a593Smuzhiyun 	ioread16_rep(hw->iobase + off, buf, count);
473*4882a593Smuzhiyun }
474*4882a593Smuzhiyun 
hermes_write_bytes(struct hermes * hw,int off,const char * buf,unsigned count)475*4882a593Smuzhiyun static inline void hermes_write_bytes(struct hermes *hw, int off,
476*4882a593Smuzhiyun 				      const char *buf, unsigned count)
477*4882a593Smuzhiyun {
478*4882a593Smuzhiyun 	off = off << hw->reg_spacing;
479*4882a593Smuzhiyun 	iowrite16_rep(hw->iobase + off, buf, count >> 1);
480*4882a593Smuzhiyun 	if (unlikely(count & 1))
481*4882a593Smuzhiyun 		iowrite8(buf[count - 1], hw->iobase + off);
482*4882a593Smuzhiyun }
483*4882a593Smuzhiyun 
hermes_clear_words(struct hermes * hw,int off,unsigned count)484*4882a593Smuzhiyun static inline void hermes_clear_words(struct hermes *hw, int off,
485*4882a593Smuzhiyun 				      unsigned count)
486*4882a593Smuzhiyun {
487*4882a593Smuzhiyun 	unsigned i;
488*4882a593Smuzhiyun 
489*4882a593Smuzhiyun 	off = off << hw->reg_spacing;
490*4882a593Smuzhiyun 
491*4882a593Smuzhiyun 	for (i = 0; i < count; i++)
492*4882a593Smuzhiyun 		iowrite16(0, hw->iobase + off);
493*4882a593Smuzhiyun }
494*4882a593Smuzhiyun 
495*4882a593Smuzhiyun #define HERMES_READ_RECORD(hw, bap, rid, buf) \
496*4882a593Smuzhiyun 	(hw->ops->read_ltv((hw), (bap), (rid), sizeof(*buf), NULL, (buf)))
497*4882a593Smuzhiyun #define HERMES_WRITE_RECORD(hw, bap, rid, buf) \
498*4882a593Smuzhiyun 	(hw->ops->write_ltv((hw), (bap), (rid), \
499*4882a593Smuzhiyun 			    HERMES_BYTES_TO_RECLEN(sizeof(*buf)), (buf)))
500*4882a593Smuzhiyun 
hermes_read_wordrec(struct hermes * hw,int bap,u16 rid,u16 * word)501*4882a593Smuzhiyun static inline int hermes_read_wordrec(struct hermes *hw, int bap, u16 rid,
502*4882a593Smuzhiyun 				      u16 *word)
503*4882a593Smuzhiyun {
504*4882a593Smuzhiyun 	__le16 rec;
505*4882a593Smuzhiyun 	int err;
506*4882a593Smuzhiyun 
507*4882a593Smuzhiyun 	err = HERMES_READ_RECORD(hw, bap, rid, &rec);
508*4882a593Smuzhiyun 	*word = le16_to_cpu(rec);
509*4882a593Smuzhiyun 	return err;
510*4882a593Smuzhiyun }
511*4882a593Smuzhiyun 
hermes_write_wordrec(struct hermes * hw,int bap,u16 rid,u16 word)512*4882a593Smuzhiyun static inline int hermes_write_wordrec(struct hermes *hw, int bap, u16 rid,
513*4882a593Smuzhiyun 				       u16 word)
514*4882a593Smuzhiyun {
515*4882a593Smuzhiyun 	__le16 rec = cpu_to_le16(word);
516*4882a593Smuzhiyun 	return HERMES_WRITE_RECORD(hw, bap, rid, &rec);
517*4882a593Smuzhiyun }
518*4882a593Smuzhiyun 
519*4882a593Smuzhiyun #endif  /* _HERMES_H */
520