1*4882a593Smuzhiyun /******************************************************************************
2*4882a593Smuzhiyun *
3*4882a593Smuzhiyun * This file is provided under a dual BSD/GPLv2 license. When using or
4*4882a593Smuzhiyun * redistributing this file, you may do so under either license.
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * GPL LICENSE SUMMARY
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
9*4882a593Smuzhiyun * Copyright(c) 2016-2017 Intel Deutschland GmbH
10*4882a593Smuzhiyun * Copyright(c) 2007 - 2014, 2018 - 2020 Intel Corporation
11*4882a593Smuzhiyun *
12*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or modify
13*4882a593Smuzhiyun * it under the terms of version 2 of the GNU General Public License as
14*4882a593Smuzhiyun * published by the Free Software Foundation.
15*4882a593Smuzhiyun *
16*4882a593Smuzhiyun * This program is distributed in the hope that it will be useful, but
17*4882a593Smuzhiyun * WITHOUT ANY WARRANTY; without even the implied warranty of
18*4882a593Smuzhiyun * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19*4882a593Smuzhiyun * General Public License for more details.
20*4882a593Smuzhiyun *
21*4882a593Smuzhiyun * The full GNU General Public License is included in this distribution
22*4882a593Smuzhiyun * in the file called COPYING.
23*4882a593Smuzhiyun *
24*4882a593Smuzhiyun * Contact Information:
25*4882a593Smuzhiyun * Intel Linux Wireless <linuxwifi@intel.com>
26*4882a593Smuzhiyun * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27*4882a593Smuzhiyun *
28*4882a593Smuzhiyun * BSD LICENSE
29*4882a593Smuzhiyun *
30*4882a593Smuzhiyun * Copyright(c) 2013 - 2015 Intel Mobile Communications GmbH
31*4882a593Smuzhiyun * All rights reserved.
32*4882a593Smuzhiyun * Copyright(c) 2017 Intel Deutschland GmbH
33*4882a593Smuzhiyun * Copyright(c) 2005 - 2014, 2018 - 2020 Intel Corporation
34*4882a593Smuzhiyun *
35*4882a593Smuzhiyun * Redistribution and use in source and binary forms, with or without
36*4882a593Smuzhiyun * modification, are permitted provided that the following conditions
37*4882a593Smuzhiyun * are met:
38*4882a593Smuzhiyun *
39*4882a593Smuzhiyun * * Redistributions of source code must retain the above copyright
40*4882a593Smuzhiyun * notice, this list of conditions and the following disclaimer.
41*4882a593Smuzhiyun * * Redistributions in binary form must reproduce the above copyright
42*4882a593Smuzhiyun * notice, this list of conditions and the following disclaimer in
43*4882a593Smuzhiyun * the documentation and/or other materials provided with the
44*4882a593Smuzhiyun * distribution.
45*4882a593Smuzhiyun * * Neither the name Intel Corporation nor the names of its
46*4882a593Smuzhiyun * contributors may be used to endorse or promote products derived
47*4882a593Smuzhiyun * from this software without specific prior written permission.
48*4882a593Smuzhiyun *
49*4882a593Smuzhiyun * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
50*4882a593Smuzhiyun * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
51*4882a593Smuzhiyun * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
52*4882a593Smuzhiyun * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
53*4882a593Smuzhiyun * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
54*4882a593Smuzhiyun * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
55*4882a593Smuzhiyun * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
56*4882a593Smuzhiyun * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
57*4882a593Smuzhiyun * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
58*4882a593Smuzhiyun * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
59*4882a593Smuzhiyun * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
60*4882a593Smuzhiyun *
61*4882a593Smuzhiyun *****************************************************************************/
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
64*4882a593Smuzhiyun
65*4882a593Smuzhiyun #include <linux/module.h>
66*4882a593Smuzhiyun #include <linux/pci.h>
67*4882a593Smuzhiyun #include <linux/acpi.h>
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun #include "fw/acpi.h"
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun #include "iwl-trans.h"
72*4882a593Smuzhiyun #include "iwl-drv.h"
73*4882a593Smuzhiyun #include "iwl-prph.h"
74*4882a593Smuzhiyun #include "internal.h"
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun #define TRANS_CFG_MARKER BIT(0)
77*4882a593Smuzhiyun #define _IS_A(cfg, _struct) __builtin_types_compatible_p(typeof(cfg), \
78*4882a593Smuzhiyun struct _struct)
79*4882a593Smuzhiyun extern int _invalid_type;
80*4882a593Smuzhiyun #define _TRANS_CFG_MARKER(cfg) \
81*4882a593Smuzhiyun (__builtin_choose_expr(_IS_A(cfg, iwl_cfg_trans_params), \
82*4882a593Smuzhiyun TRANS_CFG_MARKER, \
83*4882a593Smuzhiyun __builtin_choose_expr(_IS_A(cfg, iwl_cfg), 0, _invalid_type)))
84*4882a593Smuzhiyun #define _ASSIGN_CFG(cfg) (_TRANS_CFG_MARKER(cfg) + (kernel_ulong_t)&(cfg))
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun #define IWL_PCI_DEVICE(dev, subdev, cfg) \
87*4882a593Smuzhiyun .vendor = PCI_VENDOR_ID_INTEL, .device = (dev), \
88*4882a593Smuzhiyun .subvendor = PCI_ANY_ID, .subdevice = (subdev), \
89*4882a593Smuzhiyun .driver_data = _ASSIGN_CFG(cfg)
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun /* Hardware specific file defines the PCI IDs table for that hardware module */
92*4882a593Smuzhiyun static const struct pci_device_id iwl_hw_card_ids[] = {
93*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_IWLDVM)
94*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x4232, 0x1201, iwl5100_agn_cfg)}, /* Mini Card */
95*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x4232, 0x1301, iwl5100_agn_cfg)}, /* Half Mini Card */
96*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x4232, 0x1204, iwl5100_agn_cfg)}, /* Mini Card */
97*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x4232, 0x1304, iwl5100_agn_cfg)}, /* Half Mini Card */
98*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x4232, 0x1205, iwl5100_bgn_cfg)}, /* Mini Card */
99*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x4232, 0x1305, iwl5100_bgn_cfg)}, /* Half Mini Card */
100*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x4232, 0x1206, iwl5100_abg_cfg)}, /* Mini Card */
101*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x4232, 0x1306, iwl5100_abg_cfg)}, /* Half Mini Card */
102*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x4232, 0x1221, iwl5100_agn_cfg)}, /* Mini Card */
103*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x4232, 0x1321, iwl5100_agn_cfg)}, /* Half Mini Card */
104*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x4232, 0x1224, iwl5100_agn_cfg)}, /* Mini Card */
105*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x4232, 0x1324, iwl5100_agn_cfg)}, /* Half Mini Card */
106*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x4232, 0x1225, iwl5100_bgn_cfg)}, /* Mini Card */
107*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x4232, 0x1325, iwl5100_bgn_cfg)}, /* Half Mini Card */
108*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x4232, 0x1226, iwl5100_abg_cfg)}, /* Mini Card */
109*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x4232, 0x1326, iwl5100_abg_cfg)}, /* Half Mini Card */
110*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x4237, 0x1211, iwl5100_agn_cfg)}, /* Mini Card */
111*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x4237, 0x1311, iwl5100_agn_cfg)}, /* Half Mini Card */
112*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x4237, 0x1214, iwl5100_agn_cfg)}, /* Mini Card */
113*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x4237, 0x1314, iwl5100_agn_cfg)}, /* Half Mini Card */
114*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x4237, 0x1215, iwl5100_bgn_cfg)}, /* Mini Card */
115*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x4237, 0x1315, iwl5100_bgn_cfg)}, /* Half Mini Card */
116*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x4237, 0x1216, iwl5100_abg_cfg)}, /* Mini Card */
117*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x4237, 0x1316, iwl5100_abg_cfg)}, /* Half Mini Card */
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun /* 5300 Series WiFi */
120*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x4235, 0x1021, iwl5300_agn_cfg)}, /* Mini Card */
121*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x4235, 0x1121, iwl5300_agn_cfg)}, /* Half Mini Card */
122*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x4235, 0x1024, iwl5300_agn_cfg)}, /* Mini Card */
123*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x4235, 0x1124, iwl5300_agn_cfg)}, /* Half Mini Card */
124*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x4235, 0x1001, iwl5300_agn_cfg)}, /* Mini Card */
125*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x4235, 0x1101, iwl5300_agn_cfg)}, /* Half Mini Card */
126*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x4235, 0x1004, iwl5300_agn_cfg)}, /* Mini Card */
127*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x4235, 0x1104, iwl5300_agn_cfg)}, /* Half Mini Card */
128*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x4236, 0x1011, iwl5300_agn_cfg)}, /* Mini Card */
129*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x4236, 0x1111, iwl5300_agn_cfg)}, /* Half Mini Card */
130*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x4236, 0x1014, iwl5300_agn_cfg)}, /* Mini Card */
131*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x4236, 0x1114, iwl5300_agn_cfg)}, /* Half Mini Card */
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun /* 5350 Series WiFi/WiMax */
134*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x423A, 0x1001, iwl5350_agn_cfg)}, /* Mini Card */
135*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x423A, 0x1021, iwl5350_agn_cfg)}, /* Mini Card */
136*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x423B, 0x1011, iwl5350_agn_cfg)}, /* Mini Card */
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun /* 5150 Series Wifi/WiMax */
139*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x423C, 0x1201, iwl5150_agn_cfg)}, /* Mini Card */
140*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x423C, 0x1301, iwl5150_agn_cfg)}, /* Half Mini Card */
141*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x423C, 0x1206, iwl5150_abg_cfg)}, /* Mini Card */
142*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x423C, 0x1306, iwl5150_abg_cfg)}, /* Half Mini Card */
143*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x423C, 0x1221, iwl5150_agn_cfg)}, /* Mini Card */
144*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x423C, 0x1321, iwl5150_agn_cfg)}, /* Half Mini Card */
145*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x423C, 0x1326, iwl5150_abg_cfg)}, /* Half Mini Card */
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x423D, 0x1211, iwl5150_agn_cfg)}, /* Mini Card */
148*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x423D, 0x1311, iwl5150_agn_cfg)}, /* Half Mini Card */
149*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x423D, 0x1216, iwl5150_abg_cfg)}, /* Mini Card */
150*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x423D, 0x1316, iwl5150_abg_cfg)}, /* Half Mini Card */
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun /* 6x00 Series */
153*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x422B, 0x1101, iwl6000_3agn_cfg)},
154*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x422B, 0x1108, iwl6000_3agn_cfg)},
155*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x422B, 0x1121, iwl6000_3agn_cfg)},
156*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x422B, 0x1128, iwl6000_3agn_cfg)},
157*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x422C, 0x1301, iwl6000i_2agn_cfg)},
158*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x422C, 0x1306, iwl6000i_2abg_cfg)},
159*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x422C, 0x1307, iwl6000i_2bg_cfg)},
160*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x422C, 0x1321, iwl6000i_2agn_cfg)},
161*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x422C, 0x1326, iwl6000i_2abg_cfg)},
162*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x4238, 0x1111, iwl6000_3agn_cfg)},
163*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x4238, 0x1118, iwl6000_3agn_cfg)},
164*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x4239, 0x1311, iwl6000i_2agn_cfg)},
165*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x4239, 0x1316, iwl6000i_2abg_cfg)},
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun /* 6x05 Series */
168*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0082, 0x1301, iwl6005_2agn_cfg)},
169*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0082, 0x1306, iwl6005_2abg_cfg)},
170*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0082, 0x1307, iwl6005_2bg_cfg)},
171*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0082, 0x1308, iwl6005_2agn_cfg)},
172*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0082, 0x1321, iwl6005_2agn_cfg)},
173*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0082, 0x1326, iwl6005_2abg_cfg)},
174*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0082, 0x1328, iwl6005_2agn_cfg)},
175*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0085, 0x1311, iwl6005_2agn_cfg)},
176*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0085, 0x1318, iwl6005_2agn_cfg)},
177*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0085, 0x1316, iwl6005_2abg_cfg)},
178*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0082, 0xC020, iwl6005_2agn_sff_cfg)},
179*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0085, 0xC220, iwl6005_2agn_sff_cfg)},
180*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0085, 0xC228, iwl6005_2agn_sff_cfg)},
181*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0082, 0x4820, iwl6005_2agn_d_cfg)},
182*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0082, 0x1304, iwl6005_2agn_mow1_cfg)},/* low 5GHz active */
183*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0082, 0x1305, iwl6005_2agn_mow2_cfg)},/* high 5GHz active */
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun /* 6x30 Series */
186*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x008A, 0x5305, iwl1030_bgn_cfg)},
187*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x008A, 0x5307, iwl1030_bg_cfg)},
188*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x008A, 0x5325, iwl1030_bgn_cfg)},
189*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x008A, 0x5327, iwl1030_bg_cfg)},
190*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x008B, 0x5315, iwl1030_bgn_cfg)},
191*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x008B, 0x5317, iwl1030_bg_cfg)},
192*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0090, 0x5211, iwl6030_2agn_cfg)},
193*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0090, 0x5215, iwl6030_2bgn_cfg)},
194*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0090, 0x5216, iwl6030_2abg_cfg)},
195*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0091, 0x5201, iwl6030_2agn_cfg)},
196*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0091, 0x5205, iwl6030_2bgn_cfg)},
197*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0091, 0x5206, iwl6030_2abg_cfg)},
198*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0091, 0x5207, iwl6030_2bg_cfg)},
199*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0091, 0x5221, iwl6030_2agn_cfg)},
200*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0091, 0x5225, iwl6030_2bgn_cfg)},
201*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0091, 0x5226, iwl6030_2abg_cfg)},
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun /* 6x50 WiFi/WiMax Series */
204*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0087, 0x1301, iwl6050_2agn_cfg)},
205*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0087, 0x1306, iwl6050_2abg_cfg)},
206*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0087, 0x1321, iwl6050_2agn_cfg)},
207*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0087, 0x1326, iwl6050_2abg_cfg)},
208*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0089, 0x1311, iwl6050_2agn_cfg)},
209*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0089, 0x1316, iwl6050_2abg_cfg)},
210*4882a593Smuzhiyun
211*4882a593Smuzhiyun /* 6150 WiFi/WiMax Series */
212*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0885, 0x1305, iwl6150_bgn_cfg)},
213*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0885, 0x1307, iwl6150_bg_cfg)},
214*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0885, 0x1325, iwl6150_bgn_cfg)},
215*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0885, 0x1327, iwl6150_bg_cfg)},
216*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0886, 0x1315, iwl6150_bgn_cfg)},
217*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0886, 0x1317, iwl6150_bg_cfg)},
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun /* 1000 Series WiFi */
220*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0083, 0x1205, iwl1000_bgn_cfg)},
221*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0083, 0x1305, iwl1000_bgn_cfg)},
222*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0083, 0x1225, iwl1000_bgn_cfg)},
223*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0083, 0x1325, iwl1000_bgn_cfg)},
224*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0084, 0x1215, iwl1000_bgn_cfg)},
225*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0084, 0x1315, iwl1000_bgn_cfg)},
226*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0083, 0x1206, iwl1000_bg_cfg)},
227*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0083, 0x1306, iwl1000_bg_cfg)},
228*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0083, 0x1226, iwl1000_bg_cfg)},
229*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0083, 0x1326, iwl1000_bg_cfg)},
230*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0084, 0x1216, iwl1000_bg_cfg)},
231*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0084, 0x1316, iwl1000_bg_cfg)},
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun /* 100 Series WiFi */
234*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08AE, 0x1005, iwl100_bgn_cfg)},
235*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08AE, 0x1007, iwl100_bg_cfg)},
236*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08AF, 0x1015, iwl100_bgn_cfg)},
237*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08AF, 0x1017, iwl100_bg_cfg)},
238*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08AE, 0x1025, iwl100_bgn_cfg)},
239*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08AE, 0x1027, iwl100_bg_cfg)},
240*4882a593Smuzhiyun
241*4882a593Smuzhiyun /* 130 Series WiFi */
242*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0896, 0x5005, iwl130_bgn_cfg)},
243*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0896, 0x5007, iwl130_bg_cfg)},
244*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0897, 0x5015, iwl130_bgn_cfg)},
245*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0897, 0x5017, iwl130_bg_cfg)},
246*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0896, 0x5025, iwl130_bgn_cfg)},
247*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0896, 0x5027, iwl130_bg_cfg)},
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun /* 2x00 Series */
250*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0890, 0x4022, iwl2000_2bgn_cfg)},
251*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0891, 0x4222, iwl2000_2bgn_cfg)},
252*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0890, 0x4422, iwl2000_2bgn_cfg)},
253*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0890, 0x4822, iwl2000_2bgn_d_cfg)},
254*4882a593Smuzhiyun
255*4882a593Smuzhiyun /* 2x30 Series */
256*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0887, 0x4062, iwl2030_2bgn_cfg)},
257*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0888, 0x4262, iwl2030_2bgn_cfg)},
258*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0887, 0x4462, iwl2030_2bgn_cfg)},
259*4882a593Smuzhiyun
260*4882a593Smuzhiyun /* 6x35 Series */
261*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x088E, 0x4060, iwl6035_2agn_cfg)},
262*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x088E, 0x406A, iwl6035_2agn_sff_cfg)},
263*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x088F, 0x4260, iwl6035_2agn_cfg)},
264*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x088F, 0x426A, iwl6035_2agn_sff_cfg)},
265*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x088E, 0x4460, iwl6035_2agn_cfg)},
266*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x088E, 0x446A, iwl6035_2agn_sff_cfg)},
267*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x088E, 0x4860, iwl6035_2agn_cfg)},
268*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x088F, 0x5260, iwl6035_2agn_cfg)},
269*4882a593Smuzhiyun
270*4882a593Smuzhiyun /* 105 Series */
271*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0894, 0x0022, iwl105_bgn_cfg)},
272*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0895, 0x0222, iwl105_bgn_cfg)},
273*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0894, 0x0422, iwl105_bgn_cfg)},
274*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0894, 0x0822, iwl105_bgn_d_cfg)},
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun /* 135 Series */
277*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0892, 0x0062, iwl135_bgn_cfg)},
278*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0893, 0x0262, iwl135_bgn_cfg)},
279*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x0892, 0x0462, iwl135_bgn_cfg)},
280*4882a593Smuzhiyun #endif /* CONFIG_IWLDVM */
281*4882a593Smuzhiyun
282*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_IWLMVM)
283*4882a593Smuzhiyun /* 7260 Series */
284*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B1, 0x4070, iwl7260_2ac_cfg)},
285*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B1, 0x4072, iwl7260_2ac_cfg)},
286*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B1, 0x4170, iwl7260_2ac_cfg)},
287*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B1, 0x4C60, iwl7260_2ac_cfg)},
288*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B1, 0x4C70, iwl7260_2ac_cfg)},
289*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B1, 0x4060, iwl7260_2n_cfg)},
290*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B1, 0x406A, iwl7260_2n_cfg)},
291*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B1, 0x4160, iwl7260_2n_cfg)},
292*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B1, 0x4062, iwl7260_n_cfg)},
293*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B1, 0x4162, iwl7260_n_cfg)},
294*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B2, 0x4270, iwl7260_2ac_cfg)},
295*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B2, 0x4272, iwl7260_2ac_cfg)},
296*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B2, 0x4260, iwl7260_2n_cfg)},
297*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B2, 0x426A, iwl7260_2n_cfg)},
298*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B2, 0x4262, iwl7260_n_cfg)},
299*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B1, 0x4470, iwl7260_2ac_cfg)},
300*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B1, 0x4472, iwl7260_2ac_cfg)},
301*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B1, 0x4460, iwl7260_2n_cfg)},
302*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B1, 0x446A, iwl7260_2n_cfg)},
303*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B1, 0x4462, iwl7260_n_cfg)},
304*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B1, 0x4870, iwl7260_2ac_cfg)},
305*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B1, 0x486E, iwl7260_2ac_cfg)},
306*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B1, 0x4A70, iwl7260_2ac_cfg_high_temp)},
307*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B1, 0x4A6E, iwl7260_2ac_cfg_high_temp)},
308*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B1, 0x4A6C, iwl7260_2ac_cfg_high_temp)},
309*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B1, 0x4570, iwl7260_2ac_cfg)},
310*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B1, 0x4560, iwl7260_2n_cfg)},
311*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B2, 0x4370, iwl7260_2ac_cfg)},
312*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B2, 0x4360, iwl7260_2n_cfg)},
313*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B1, 0x5070, iwl7260_2ac_cfg)},
314*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B1, 0x5072, iwl7260_2ac_cfg)},
315*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B1, 0x5170, iwl7260_2ac_cfg)},
316*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B1, 0x5770, iwl7260_2ac_cfg)},
317*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B1, 0x4020, iwl7260_2n_cfg)},
318*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B1, 0x402A, iwl7260_2n_cfg)},
319*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B2, 0x4220, iwl7260_2n_cfg)},
320*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B1, 0x4420, iwl7260_2n_cfg)},
321*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B1, 0xC070, iwl7260_2ac_cfg)},
322*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B1, 0xC072, iwl7260_2ac_cfg)},
323*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B1, 0xC170, iwl7260_2ac_cfg)},
324*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B1, 0xC060, iwl7260_2n_cfg)},
325*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B1, 0xC06A, iwl7260_2n_cfg)},
326*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B1, 0xC160, iwl7260_2n_cfg)},
327*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B1, 0xC062, iwl7260_n_cfg)},
328*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B1, 0xC162, iwl7260_n_cfg)},
329*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B1, 0xC770, iwl7260_2ac_cfg)},
330*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B1, 0xC760, iwl7260_2n_cfg)},
331*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B2, 0xC270, iwl7260_2ac_cfg)},
332*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B1, 0xCC70, iwl7260_2ac_cfg)},
333*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B1, 0xCC60, iwl7260_2ac_cfg)},
334*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B2, 0xC272, iwl7260_2ac_cfg)},
335*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B2, 0xC260, iwl7260_2n_cfg)},
336*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B2, 0xC26A, iwl7260_n_cfg)},
337*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B2, 0xC262, iwl7260_n_cfg)},
338*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B1, 0xC470, iwl7260_2ac_cfg)},
339*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B1, 0xC472, iwl7260_2ac_cfg)},
340*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B1, 0xC460, iwl7260_2n_cfg)},
341*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B1, 0xC462, iwl7260_n_cfg)},
342*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B1, 0xC570, iwl7260_2ac_cfg)},
343*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B1, 0xC560, iwl7260_2n_cfg)},
344*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B2, 0xC370, iwl7260_2ac_cfg)},
345*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B1, 0xC360, iwl7260_2n_cfg)},
346*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B1, 0xC020, iwl7260_2n_cfg)},
347*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B1, 0xC02A, iwl7260_2n_cfg)},
348*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B2, 0xC220, iwl7260_2n_cfg)},
349*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B1, 0xC420, iwl7260_2n_cfg)},
350*4882a593Smuzhiyun
351*4882a593Smuzhiyun /* 3160 Series */
352*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B3, 0x0070, iwl3160_2ac_cfg)},
353*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B3, 0x0072, iwl3160_2ac_cfg)},
354*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B3, 0x0170, iwl3160_2ac_cfg)},
355*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B3, 0x0172, iwl3160_2ac_cfg)},
356*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B3, 0x0060, iwl3160_2n_cfg)},
357*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B3, 0x0062, iwl3160_n_cfg)},
358*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B4, 0x0270, iwl3160_2ac_cfg)},
359*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B4, 0x0272, iwl3160_2ac_cfg)},
360*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B3, 0x0470, iwl3160_2ac_cfg)},
361*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B3, 0x0472, iwl3160_2ac_cfg)},
362*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B4, 0x0370, iwl3160_2ac_cfg)},
363*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B3, 0x8070, iwl3160_2ac_cfg)},
364*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B3, 0x8072, iwl3160_2ac_cfg)},
365*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B3, 0x8170, iwl3160_2ac_cfg)},
366*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B3, 0x8172, iwl3160_2ac_cfg)},
367*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B3, 0x8060, iwl3160_2n_cfg)},
368*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B3, 0x8062, iwl3160_n_cfg)},
369*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B4, 0x8270, iwl3160_2ac_cfg)},
370*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B4, 0x8370, iwl3160_2ac_cfg)},
371*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B4, 0x8272, iwl3160_2ac_cfg)},
372*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B3, 0x8470, iwl3160_2ac_cfg)},
373*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B3, 0x8570, iwl3160_2ac_cfg)},
374*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B3, 0x1070, iwl3160_2ac_cfg)},
375*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x08B3, 0x1170, iwl3160_2ac_cfg)},
376*4882a593Smuzhiyun
377*4882a593Smuzhiyun /* 3165 Series */
378*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x3165, 0x4010, iwl3165_2ac_cfg)},
379*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x3165, 0x4012, iwl3165_2ac_cfg)},
380*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x3166, 0x4212, iwl3165_2ac_cfg)},
381*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x3165, 0x4410, iwl3165_2ac_cfg)},
382*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x3165, 0x4510, iwl3165_2ac_cfg)},
383*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x3165, 0x4110, iwl3165_2ac_cfg)},
384*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x3166, 0x4310, iwl3165_2ac_cfg)},
385*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x3166, 0x4210, iwl3165_2ac_cfg)},
386*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x3165, 0x8010, iwl3165_2ac_cfg)},
387*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x3165, 0x8110, iwl3165_2ac_cfg)},
388*4882a593Smuzhiyun
389*4882a593Smuzhiyun /* 3168 Series */
390*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24FB, 0x2010, iwl3168_2ac_cfg)},
391*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24FB, 0x2110, iwl3168_2ac_cfg)},
392*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24FB, 0x2050, iwl3168_2ac_cfg)},
393*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24FB, 0x2150, iwl3168_2ac_cfg)},
394*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24FB, 0x0000, iwl3168_2ac_cfg)},
395*4882a593Smuzhiyun
396*4882a593Smuzhiyun /* 7265 Series */
397*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x095A, 0x5010, iwl7265_2ac_cfg)},
398*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x095A, 0x5110, iwl7265_2ac_cfg)},
399*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x095A, 0x5100, iwl7265_2ac_cfg)},
400*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x095B, 0x5310, iwl7265_2ac_cfg)},
401*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x095B, 0x5302, iwl7265_n_cfg)},
402*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x095B, 0x5210, iwl7265_2ac_cfg)},
403*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x095A, 0x5C10, iwl7265_2ac_cfg)},
404*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x095A, 0x5012, iwl7265_2ac_cfg)},
405*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x095A, 0x5412, iwl7265_2ac_cfg)},
406*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x095A, 0x5410, iwl7265_2ac_cfg)},
407*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x095A, 0x5510, iwl7265_2ac_cfg)},
408*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x095A, 0x5400, iwl7265_2ac_cfg)},
409*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x095A, 0x1010, iwl7265_2ac_cfg)},
410*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x095A, 0x5000, iwl7265_2n_cfg)},
411*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x095A, 0x500A, iwl7265_2n_cfg)},
412*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x095B, 0x5200, iwl7265_2n_cfg)},
413*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x095A, 0x5002, iwl7265_n_cfg)},
414*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x095A, 0x5102, iwl7265_n_cfg)},
415*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x095B, 0x5202, iwl7265_n_cfg)},
416*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x095A, 0x9010, iwl7265_2ac_cfg)},
417*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x095A, 0x9012, iwl7265_2ac_cfg)},
418*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x095A, 0x900A, iwl7265_2ac_cfg)},
419*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x095A, 0x9110, iwl7265_2ac_cfg)},
420*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x095A, 0x9112, iwl7265_2ac_cfg)},
421*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x095B, 0x9210, iwl7265_2ac_cfg)},
422*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x095B, 0x9200, iwl7265_2ac_cfg)},
423*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x095A, 0x9510, iwl7265_2ac_cfg)},
424*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x095B, 0x9310, iwl7265_2ac_cfg)},
425*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x095A, 0x9410, iwl7265_2ac_cfg)},
426*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x095A, 0x5020, iwl7265_2n_cfg)},
427*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x095A, 0x502A, iwl7265_2n_cfg)},
428*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x095A, 0x5420, iwl7265_2n_cfg)},
429*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x095A, 0x5090, iwl7265_2ac_cfg)},
430*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x095A, 0x5190, iwl7265_2ac_cfg)},
431*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x095A, 0x5590, iwl7265_2ac_cfg)},
432*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x095B, 0x5290, iwl7265_2ac_cfg)},
433*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x095A, 0x5490, iwl7265_2ac_cfg)},
434*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x095A, 0x5F10, iwl7265_2ac_cfg)},
435*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x095B, 0x5212, iwl7265_2ac_cfg)},
436*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x095B, 0x520A, iwl7265_2ac_cfg)},
437*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x095A, 0x9000, iwl7265_2ac_cfg)},
438*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x095A, 0x9400, iwl7265_2ac_cfg)},
439*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x095A, 0x9E10, iwl7265_2ac_cfg)},
440*4882a593Smuzhiyun
441*4882a593Smuzhiyun /* 8000 Series */
442*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24F3, 0x0010, iwl8260_2ac_cfg)},
443*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24F3, 0x1010, iwl8260_2ac_cfg)},
444*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24F3, 0x10B0, iwl8260_2ac_cfg)},
445*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24F3, 0x0130, iwl8260_2ac_cfg)},
446*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24F3, 0x1130, iwl8260_2ac_cfg)},
447*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24F3, 0x0132, iwl8260_2ac_cfg)},
448*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24F3, 0x1132, iwl8260_2ac_cfg)},
449*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24F3, 0x0110, iwl8260_2ac_cfg)},
450*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24F3, 0x01F0, iwl8260_2ac_cfg)},
451*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24F3, 0x0012, iwl8260_2ac_cfg)},
452*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24F3, 0x1012, iwl8260_2ac_cfg)},
453*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24F3, 0x1110, iwl8260_2ac_cfg)},
454*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24F3, 0x0050, iwl8260_2ac_cfg)},
455*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24F3, 0x0250, iwl8260_2ac_cfg)},
456*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24F3, 0x1050, iwl8260_2ac_cfg)},
457*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24F3, 0x0150, iwl8260_2ac_cfg)},
458*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24F3, 0x1150, iwl8260_2ac_cfg)},
459*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24F4, 0x0030, iwl8260_2ac_cfg)},
460*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24F4, 0x1030, iwl8260_2ac_cfg)},
461*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24F3, 0xC010, iwl8260_2ac_cfg)},
462*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24F3, 0xC110, iwl8260_2ac_cfg)},
463*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24F3, 0xD010, iwl8260_2ac_cfg)},
464*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24F3, 0xC050, iwl8260_2ac_cfg)},
465*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24F3, 0xD050, iwl8260_2ac_cfg)},
466*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24F3, 0xD0B0, iwl8260_2ac_cfg)},
467*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24F3, 0xB0B0, iwl8260_2ac_cfg)},
468*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24F3, 0x8010, iwl8260_2ac_cfg)},
469*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24F3, 0x8110, iwl8260_2ac_cfg)},
470*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24F3, 0x9010, iwl8260_2ac_cfg)},
471*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24F3, 0x9110, iwl8260_2ac_cfg)},
472*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24F4, 0x8030, iwl8260_2ac_cfg)},
473*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24F4, 0x9030, iwl8260_2ac_cfg)},
474*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24F4, 0xC030, iwl8260_2ac_cfg)},
475*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24F4, 0xD030, iwl8260_2ac_cfg)},
476*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24F3, 0x8130, iwl8260_2ac_cfg)},
477*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24F3, 0x9130, iwl8260_2ac_cfg)},
478*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24F3, 0x8132, iwl8260_2ac_cfg)},
479*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24F3, 0x9132, iwl8260_2ac_cfg)},
480*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24F3, 0x8050, iwl8260_2ac_cfg)},
481*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24F3, 0x8150, iwl8260_2ac_cfg)},
482*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24F3, 0x9050, iwl8260_2ac_cfg)},
483*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24F3, 0x9150, iwl8260_2ac_cfg)},
484*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24F3, 0x0004, iwl8260_2n_cfg)},
485*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24F3, 0x0044, iwl8260_2n_cfg)},
486*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24F5, 0x0010, iwl4165_2ac_cfg)},
487*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24F6, 0x0030, iwl4165_2ac_cfg)},
488*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24F3, 0x0810, iwl8260_2ac_cfg)},
489*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24F3, 0x0910, iwl8260_2ac_cfg)},
490*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24F3, 0x0850, iwl8260_2ac_cfg)},
491*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24F3, 0x0950, iwl8260_2ac_cfg)},
492*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24F3, 0x0930, iwl8260_2ac_cfg)},
493*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24F3, 0x0000, iwl8265_2ac_cfg)},
494*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24F3, 0x4010, iwl8260_2ac_cfg)},
495*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24FD, 0x0010, iwl8265_2ac_cfg)},
496*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24FD, 0x0110, iwl8265_2ac_cfg)},
497*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24FD, 0x1110, iwl8265_2ac_cfg)},
498*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24FD, 0x1130, iwl8265_2ac_cfg)},
499*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24FD, 0x0130, iwl8265_2ac_cfg)},
500*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24FD, 0x1010, iwl8265_2ac_cfg)},
501*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24FD, 0x10D0, iwl8265_2ac_cfg)},
502*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24FD, 0x0050, iwl8265_2ac_cfg)},
503*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24FD, 0x0150, iwl8265_2ac_cfg)},
504*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24FD, 0x9010, iwl8265_2ac_cfg)},
505*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24FD, 0x8110, iwl8265_2ac_cfg)},
506*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24FD, 0x8050, iwl8265_2ac_cfg)},
507*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24FD, 0x8010, iwl8265_2ac_cfg)},
508*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24FD, 0x0810, iwl8265_2ac_cfg)},
509*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24FD, 0x9110, iwl8265_2ac_cfg)},
510*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24FD, 0x8130, iwl8265_2ac_cfg)},
511*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24FD, 0x0910, iwl8265_2ac_cfg)},
512*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24FD, 0x0930, iwl8265_2ac_cfg)},
513*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24FD, 0x0950, iwl8265_2ac_cfg)},
514*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24FD, 0x0850, iwl8265_2ac_cfg)},
515*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24FD, 0x1014, iwl8265_2ac_cfg)},
516*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24FD, 0x3E02, iwl8275_2ac_cfg)},
517*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24FD, 0x3E01, iwl8275_2ac_cfg)},
518*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24FD, 0x1012, iwl8275_2ac_cfg)},
519*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24FD, 0x0012, iwl8275_2ac_cfg)},
520*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24FD, 0x0014, iwl8265_2ac_cfg)},
521*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x24FD, 0x9074, iwl8265_2ac_cfg)},
522*4882a593Smuzhiyun
523*4882a593Smuzhiyun /* 9000 Series */
524*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x2526, PCI_ANY_ID, iwl9000_trans_cfg)},
525*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x271B, PCI_ANY_ID, iwl9000_trans_cfg)},
526*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x271C, PCI_ANY_ID, iwl9000_trans_cfg)},
527*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x30DC, PCI_ANY_ID, iwl9560_long_latency_trans_cfg)},
528*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x31DC, PCI_ANY_ID, iwl9560_shared_clk_trans_cfg)},
529*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x9DF0, PCI_ANY_ID, iwl9560_trans_cfg)},
530*4882a593Smuzhiyun {IWL_PCI_DEVICE(0xA370, PCI_ANY_ID, iwl9560_trans_cfg)},
531*4882a593Smuzhiyun
532*4882a593Smuzhiyun /* Qu devices */
533*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x02F0, PCI_ANY_ID, iwl_qu_trans_cfg)},
534*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x06F0, PCI_ANY_ID, iwl_qu_trans_cfg)},
535*4882a593Smuzhiyun
536*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x34F0, PCI_ANY_ID, iwl_qu_medium_latency_trans_cfg)},
537*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x3DF0, PCI_ANY_ID, iwl_qu_medium_latency_trans_cfg)},
538*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x4DF0, PCI_ANY_ID, iwl_qu_medium_latency_trans_cfg)},
539*4882a593Smuzhiyun
540*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x43F0, PCI_ANY_ID, iwl_qu_long_latency_trans_cfg)},
541*4882a593Smuzhiyun {IWL_PCI_DEVICE(0xA0F0, PCI_ANY_ID, iwl_qu_long_latency_trans_cfg)},
542*4882a593Smuzhiyun
543*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x2720, PCI_ANY_ID, iwl_qnj_trans_cfg)},
544*4882a593Smuzhiyun
545*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x2723, PCI_ANY_ID, iwl_ax200_trans_cfg)},
546*4882a593Smuzhiyun
547*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x2725, 0x0090, iwlax211_2ax_cfg_so_gf_a0)},
548*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x2725, 0x0020, iwlax210_2ax_cfg_ty_gf_a0)},
549*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x2725, 0x0024, iwlax210_2ax_cfg_ty_gf_a0)},
550*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x2725, 0x0310, iwlax210_2ax_cfg_ty_gf_a0)},
551*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x2725, 0x0510, iwlax210_2ax_cfg_ty_gf_a0)},
552*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x2725, 0x0A10, iwlax210_2ax_cfg_ty_gf_a0)},
553*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x2725, 0xE020, iwlax210_2ax_cfg_ty_gf_a0)},
554*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x2725, 0xE024, iwlax210_2ax_cfg_ty_gf_a0)},
555*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x2725, 0x4020, iwlax210_2ax_cfg_ty_gf_a0)},
556*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x2725, 0x6020, iwlax210_2ax_cfg_ty_gf_a0)},
557*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x2725, 0x6024, iwlax210_2ax_cfg_ty_gf_a0)},
558*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x2725, 0x00B0, iwlax411_2ax_cfg_sosnj_gf4_a0)},
559*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x2726, 0x0070, iwlax201_cfg_snj_hr_b0)},
560*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x2726, 0x0074, iwlax201_cfg_snj_hr_b0)},
561*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x2726, 0x0078, iwlax201_cfg_snj_hr_b0)},
562*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x2726, 0x007C, iwlax201_cfg_snj_hr_b0)},
563*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x2726, 0x0090, iwlax211_cfg_snj_gf_a0)},
564*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x2726, 0x0098, iwlax211_cfg_snj_gf_a0)},
565*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x2726, 0x00B0, iwlax411_2ax_cfg_sosnj_gf4_a0)},
566*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x2726, 0x0510, iwlax211_cfg_snj_gf_a0)},
567*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x2726, 0x2074, iwlax201_cfg_snj_hr_b0)},
568*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x2726, 0x4070, iwlax201_cfg_snj_hr_b0)},
569*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x7A70, 0x0090, iwlax211_2ax_cfg_so_gf_a0_long)},
570*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x7A70, 0x0098, iwlax211_2ax_cfg_so_gf_a0_long)},
571*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x7A70, 0x00B0, iwlax411_2ax_cfg_so_gf4_a0_long)},
572*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x7A70, 0x0310, iwlax211_2ax_cfg_so_gf_a0_long)},
573*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x7A70, 0x0510, iwlax211_2ax_cfg_so_gf_a0_long)},
574*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x7A70, 0x0A10, iwlax211_2ax_cfg_so_gf_a0_long)},
575*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x7AF0, 0x0090, iwlax211_2ax_cfg_so_gf_a0)},
576*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x7AF0, 0x0098, iwlax211_2ax_cfg_so_gf_a0)},
577*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x7AF0, 0x00B0, iwlax411_2ax_cfg_so_gf4_a0)},
578*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x7AF0, 0x0310, iwlax211_2ax_cfg_so_gf_a0)},
579*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x7AF0, 0x0510, iwlax211_2ax_cfg_so_gf_a0)},
580*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x7AF0, 0x0A10, iwlax211_2ax_cfg_so_gf_a0)},
581*4882a593Smuzhiyun
582*4882a593Smuzhiyun /* Ma devices */
583*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x2729, PCI_ANY_ID, iwl_ma_trans_cfg)},
584*4882a593Smuzhiyun {IWL_PCI_DEVICE(0x7E80, PCI_ANY_ID, iwl_ma_trans_cfg)},
585*4882a593Smuzhiyun
586*4882a593Smuzhiyun #endif /* CONFIG_IWLMVM */
587*4882a593Smuzhiyun
588*4882a593Smuzhiyun {0}
589*4882a593Smuzhiyun };
590*4882a593Smuzhiyun MODULE_DEVICE_TABLE(pci, iwl_hw_card_ids);
591*4882a593Smuzhiyun
592*4882a593Smuzhiyun #define _IWL_DEV_INFO(_device, _subdevice, _mac_type, _mac_step, _rf_type, \
593*4882a593Smuzhiyun _rf_id, _no_160, _cores, _cfg, _name) \
594*4882a593Smuzhiyun { .device = (_device), .subdevice = (_subdevice), .cfg = &(_cfg), \
595*4882a593Smuzhiyun .name = _name, .mac_type = _mac_type, .rf_type = _rf_type, \
596*4882a593Smuzhiyun .no_160 = _no_160, .cores = _cores, .rf_id = _rf_id, \
597*4882a593Smuzhiyun .mac_step = _mac_step }
598*4882a593Smuzhiyun
599*4882a593Smuzhiyun #define IWL_DEV_INFO(_device, _subdevice, _cfg, _name) \
600*4882a593Smuzhiyun _IWL_DEV_INFO(_device, _subdevice, IWL_CFG_ANY, IWL_CFG_ANY, \
601*4882a593Smuzhiyun IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_ANY, IWL_CFG_ANY, \
602*4882a593Smuzhiyun _cfg, _name)
603*4882a593Smuzhiyun
604*4882a593Smuzhiyun static const struct iwl_dev_info iwl_dev_info_table[] = {
605*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_IWLMVM)
606*4882a593Smuzhiyun /* 9000 */
607*4882a593Smuzhiyun IWL_DEV_INFO(0x2526, 0x1550, iwl9260_2ac_cfg, iwl9260_killer_1550_name),
608*4882a593Smuzhiyun IWL_DEV_INFO(0x2526, 0x1551, iwl9560_2ac_cfg_soc, iwl9560_killer_1550s_name),
609*4882a593Smuzhiyun IWL_DEV_INFO(0x2526, 0x1552, iwl9560_2ac_cfg_soc, iwl9560_killer_1550i_name),
610*4882a593Smuzhiyun IWL_DEV_INFO(0x30DC, 0x1551, iwl9560_2ac_cfg_soc, iwl9560_killer_1550s_name),
611*4882a593Smuzhiyun IWL_DEV_INFO(0x30DC, 0x1552, iwl9560_2ac_cfg_soc, iwl9560_killer_1550i_name),
612*4882a593Smuzhiyun IWL_DEV_INFO(0x31DC, 0x1551, iwl9560_2ac_cfg_soc, iwl9560_killer_1550s_name),
613*4882a593Smuzhiyun IWL_DEV_INFO(0x31DC, 0x1552, iwl9560_2ac_cfg_soc, iwl9560_killer_1550i_name),
614*4882a593Smuzhiyun IWL_DEV_INFO(0xA370, 0x1551, iwl9560_2ac_cfg_soc, iwl9560_killer_1550s_name),
615*4882a593Smuzhiyun IWL_DEV_INFO(0xA370, 0x1552, iwl9560_2ac_cfg_soc, iwl9560_killer_1550i_name),
616*4882a593Smuzhiyun
617*4882a593Smuzhiyun IWL_DEV_INFO(0x271C, 0x0214, iwl9260_2ac_cfg, iwl9260_1_name),
618*4882a593Smuzhiyun
619*4882a593Smuzhiyun /* AX200 */
620*4882a593Smuzhiyun IWL_DEV_INFO(0x2723, 0x1653, iwl_ax200_cfg_cc, iwl_ax200_killer_1650w_name),
621*4882a593Smuzhiyun IWL_DEV_INFO(0x2723, 0x1654, iwl_ax200_cfg_cc, iwl_ax200_killer_1650x_name),
622*4882a593Smuzhiyun IWL_DEV_INFO(0x2723, IWL_CFG_ANY, iwl_ax200_cfg_cc, iwl_ax200_name),
623*4882a593Smuzhiyun
624*4882a593Smuzhiyun /* QnJ with Hr */
625*4882a593Smuzhiyun IWL_DEV_INFO(0x2720, IWL_CFG_ANY, iwl_qnj_b0_hr_b0_cfg, iwl_ax201_name),
626*4882a593Smuzhiyun
627*4882a593Smuzhiyun /* SnJ with HR*/
628*4882a593Smuzhiyun IWL_DEV_INFO(0x2726, 0x0244, iwlax201_cfg_snj_hr_b0, iwl_ax101_name),
629*4882a593Smuzhiyun IWL_DEV_INFO(0x2726, 0x1651, iwlax201_cfg_snj_hr_b0, iwl_ax201_killer_1650s_name),
630*4882a593Smuzhiyun IWL_DEV_INFO(0x2726, 0x1652, iwlax201_cfg_snj_hr_b0, iwl_ax201_killer_1650i_name),
631*4882a593Smuzhiyun IWL_DEV_INFO(0x2726, 0x4244, iwlax201_cfg_snj_hr_b0, iwl_ax101_name),
632*4882a593Smuzhiyun
633*4882a593Smuzhiyun /* Qu with Hr */
634*4882a593Smuzhiyun IWL_DEV_INFO(0x43F0, 0x0070, iwl_ax201_cfg_qu_hr, NULL),
635*4882a593Smuzhiyun IWL_DEV_INFO(0x43F0, 0x0074, iwl_ax201_cfg_qu_hr, NULL),
636*4882a593Smuzhiyun IWL_DEV_INFO(0x43F0, 0x0078, iwl_ax201_cfg_qu_hr, NULL),
637*4882a593Smuzhiyun IWL_DEV_INFO(0x43F0, 0x007C, iwl_ax201_cfg_qu_hr, NULL),
638*4882a593Smuzhiyun IWL_DEV_INFO(0x43F0, 0x1651, killer1650s_2ax_cfg_qu_b0_hr_b0, iwl_ax201_killer_1650s_name),
639*4882a593Smuzhiyun IWL_DEV_INFO(0x43F0, 0x1652, killer1650i_2ax_cfg_qu_b0_hr_b0, iwl_ax201_killer_1650i_name),
640*4882a593Smuzhiyun IWL_DEV_INFO(0x43F0, 0x2074, iwl_ax201_cfg_qu_hr, NULL),
641*4882a593Smuzhiyun IWL_DEV_INFO(0x43F0, 0x4070, iwl_ax201_cfg_qu_hr, NULL),
642*4882a593Smuzhiyun IWL_DEV_INFO(0xA0F0, 0x0070, iwl_ax201_cfg_qu_hr, NULL),
643*4882a593Smuzhiyun IWL_DEV_INFO(0xA0F0, 0x0074, iwl_ax201_cfg_qu_hr, NULL),
644*4882a593Smuzhiyun IWL_DEV_INFO(0xA0F0, 0x0078, iwl_ax201_cfg_qu_hr, NULL),
645*4882a593Smuzhiyun IWL_DEV_INFO(0xA0F0, 0x007C, iwl_ax201_cfg_qu_hr, NULL),
646*4882a593Smuzhiyun IWL_DEV_INFO(0xA0F0, 0x0A10, iwl_ax201_cfg_qu_hr, NULL),
647*4882a593Smuzhiyun IWL_DEV_INFO(0xA0F0, 0x1651, killer1650s_2ax_cfg_qu_b0_hr_b0, NULL),
648*4882a593Smuzhiyun IWL_DEV_INFO(0xA0F0, 0x1652, killer1650i_2ax_cfg_qu_b0_hr_b0, NULL),
649*4882a593Smuzhiyun IWL_DEV_INFO(0xA0F0, 0x2074, iwl_ax201_cfg_qu_hr, NULL),
650*4882a593Smuzhiyun IWL_DEV_INFO(0xA0F0, 0x4070, iwl_ax201_cfg_qu_hr, NULL),
651*4882a593Smuzhiyun IWL_DEV_INFO(0xA0F0, 0x6074, iwl_ax201_cfg_qu_hr, NULL),
652*4882a593Smuzhiyun IWL_DEV_INFO(0x02F0, 0x0070, iwl_ax201_cfg_quz_hr, NULL),
653*4882a593Smuzhiyun IWL_DEV_INFO(0x02F0, 0x0074, iwl_ax201_cfg_quz_hr, NULL),
654*4882a593Smuzhiyun IWL_DEV_INFO(0x02F0, 0x6074, iwl_ax201_cfg_quz_hr, NULL),
655*4882a593Smuzhiyun IWL_DEV_INFO(0x02F0, 0x0078, iwl_ax201_cfg_quz_hr, NULL),
656*4882a593Smuzhiyun IWL_DEV_INFO(0x02F0, 0x007C, iwl_ax201_cfg_quz_hr, NULL),
657*4882a593Smuzhiyun IWL_DEV_INFO(0x02F0, 0x0310, iwl_ax201_cfg_quz_hr, NULL),
658*4882a593Smuzhiyun IWL_DEV_INFO(0x02F0, 0x1651, iwl_ax1650s_cfg_quz_hr, NULL),
659*4882a593Smuzhiyun IWL_DEV_INFO(0x02F0, 0x1652, iwl_ax1650i_cfg_quz_hr, NULL),
660*4882a593Smuzhiyun IWL_DEV_INFO(0x02F0, 0x2074, iwl_ax201_cfg_quz_hr, NULL),
661*4882a593Smuzhiyun IWL_DEV_INFO(0x02F0, 0x4070, iwl_ax201_cfg_quz_hr, NULL),
662*4882a593Smuzhiyun IWL_DEV_INFO(0x06F0, 0x0070, iwl_ax201_cfg_quz_hr, NULL),
663*4882a593Smuzhiyun IWL_DEV_INFO(0x06F0, 0x0074, iwl_ax201_cfg_quz_hr, NULL),
664*4882a593Smuzhiyun IWL_DEV_INFO(0x06F0, 0x0078, iwl_ax201_cfg_quz_hr, NULL),
665*4882a593Smuzhiyun IWL_DEV_INFO(0x06F0, 0x007C, iwl_ax201_cfg_quz_hr, NULL),
666*4882a593Smuzhiyun IWL_DEV_INFO(0x06F0, 0x0310, iwl_ax201_cfg_quz_hr, NULL),
667*4882a593Smuzhiyun IWL_DEV_INFO(0x06F0, 0x1651, iwl_ax1650s_cfg_quz_hr, NULL),
668*4882a593Smuzhiyun IWL_DEV_INFO(0x06F0, 0x1652, iwl_ax1650i_cfg_quz_hr, NULL),
669*4882a593Smuzhiyun IWL_DEV_INFO(0x06F0, 0x2074, iwl_ax201_cfg_quz_hr, NULL),
670*4882a593Smuzhiyun IWL_DEV_INFO(0x06F0, 0x4070, iwl_ax201_cfg_quz_hr, NULL),
671*4882a593Smuzhiyun IWL_DEV_INFO(0x34F0, 0x0070, iwl_ax201_cfg_qu_hr, NULL),
672*4882a593Smuzhiyun IWL_DEV_INFO(0x34F0, 0x0074, iwl_ax201_cfg_qu_hr, NULL),
673*4882a593Smuzhiyun IWL_DEV_INFO(0x34F0, 0x0078, iwl_ax201_cfg_qu_hr, NULL),
674*4882a593Smuzhiyun IWL_DEV_INFO(0x34F0, 0x007C, iwl_ax201_cfg_qu_hr, NULL),
675*4882a593Smuzhiyun IWL_DEV_INFO(0x34F0, 0x0310, iwl_ax201_cfg_qu_hr, NULL),
676*4882a593Smuzhiyun IWL_DEV_INFO(0x34F0, 0x1651, killer1650s_2ax_cfg_qu_b0_hr_b0, NULL),
677*4882a593Smuzhiyun IWL_DEV_INFO(0x34F0, 0x1652, killer1650i_2ax_cfg_qu_b0_hr_b0, NULL),
678*4882a593Smuzhiyun IWL_DEV_INFO(0x34F0, 0x2074, iwl_ax201_cfg_qu_hr, NULL),
679*4882a593Smuzhiyun IWL_DEV_INFO(0x34F0, 0x4070, iwl_ax201_cfg_qu_hr, NULL),
680*4882a593Smuzhiyun
681*4882a593Smuzhiyun IWL_DEV_INFO(0x3DF0, 0x0070, iwl_ax201_cfg_qu_hr, NULL),
682*4882a593Smuzhiyun IWL_DEV_INFO(0x3DF0, 0x0074, iwl_ax201_cfg_qu_hr, NULL),
683*4882a593Smuzhiyun IWL_DEV_INFO(0x3DF0, 0x0078, iwl_ax201_cfg_qu_hr, NULL),
684*4882a593Smuzhiyun IWL_DEV_INFO(0x3DF0, 0x007C, iwl_ax201_cfg_qu_hr, NULL),
685*4882a593Smuzhiyun IWL_DEV_INFO(0x3DF0, 0x0310, iwl_ax201_cfg_qu_hr, NULL),
686*4882a593Smuzhiyun IWL_DEV_INFO(0x3DF0, 0x1651, killer1650s_2ax_cfg_qu_b0_hr_b0, NULL),
687*4882a593Smuzhiyun IWL_DEV_INFO(0x3DF0, 0x1652, killer1650i_2ax_cfg_qu_b0_hr_b0, NULL),
688*4882a593Smuzhiyun IWL_DEV_INFO(0x3DF0, 0x2074, iwl_ax201_cfg_qu_hr, NULL),
689*4882a593Smuzhiyun IWL_DEV_INFO(0x3DF0, 0x4070, iwl_ax201_cfg_qu_hr, NULL),
690*4882a593Smuzhiyun
691*4882a593Smuzhiyun IWL_DEV_INFO(0x4DF0, 0x0070, iwl_ax201_cfg_qu_hr, NULL),
692*4882a593Smuzhiyun IWL_DEV_INFO(0x4DF0, 0x0074, iwl_ax201_cfg_qu_hr, NULL),
693*4882a593Smuzhiyun IWL_DEV_INFO(0x4DF0, 0x0078, iwl_ax201_cfg_qu_hr, NULL),
694*4882a593Smuzhiyun IWL_DEV_INFO(0x4DF0, 0x007C, iwl_ax201_cfg_qu_hr, NULL),
695*4882a593Smuzhiyun IWL_DEV_INFO(0x4DF0, 0x0310, iwl_ax201_cfg_qu_hr, NULL),
696*4882a593Smuzhiyun IWL_DEV_INFO(0x4DF0, 0x1651, killer1650s_2ax_cfg_qu_b0_hr_b0, NULL),
697*4882a593Smuzhiyun IWL_DEV_INFO(0x4DF0, 0x1652, killer1650i_2ax_cfg_qu_b0_hr_b0, NULL),
698*4882a593Smuzhiyun IWL_DEV_INFO(0x4DF0, 0x2074, iwl_ax201_cfg_qu_hr, NULL),
699*4882a593Smuzhiyun IWL_DEV_INFO(0x4DF0, 0x4070, iwl_ax201_cfg_qu_hr, NULL),
700*4882a593Smuzhiyun IWL_DEV_INFO(0x4DF0, 0x6074, iwl_ax201_cfg_qu_hr, NULL),
701*4882a593Smuzhiyun
702*4882a593Smuzhiyun _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
703*4882a593Smuzhiyun IWL_CFG_MAC_TYPE_PU, IWL_CFG_ANY,
704*4882a593Smuzhiyun IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1,
705*4882a593Smuzhiyun IWL_CFG_160, IWL_CFG_CORES_BT,
706*4882a593Smuzhiyun iwl9560_2ac_cfg_soc, iwl9461_160_name),
707*4882a593Smuzhiyun _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
708*4882a593Smuzhiyun IWL_CFG_MAC_TYPE_PU, IWL_CFG_ANY,
709*4882a593Smuzhiyun IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1,
710*4882a593Smuzhiyun IWL_CFG_NO_160, IWL_CFG_CORES_BT,
711*4882a593Smuzhiyun iwl9560_2ac_cfg_soc, iwl9461_name),
712*4882a593Smuzhiyun _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
713*4882a593Smuzhiyun IWL_CFG_MAC_TYPE_PU, IWL_CFG_ANY,
714*4882a593Smuzhiyun IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV,
715*4882a593Smuzhiyun IWL_CFG_160, IWL_CFG_CORES_BT,
716*4882a593Smuzhiyun iwl9560_2ac_cfg_soc, iwl9462_160_name),
717*4882a593Smuzhiyun _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
718*4882a593Smuzhiyun IWL_CFG_MAC_TYPE_PU, IWL_CFG_ANY,
719*4882a593Smuzhiyun IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV,
720*4882a593Smuzhiyun IWL_CFG_NO_160, IWL_CFG_CORES_BT,
721*4882a593Smuzhiyun iwl9560_2ac_cfg_soc, iwl9462_name),
722*4882a593Smuzhiyun
723*4882a593Smuzhiyun _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
724*4882a593Smuzhiyun IWL_CFG_MAC_TYPE_PU, IWL_CFG_ANY,
725*4882a593Smuzhiyun IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
726*4882a593Smuzhiyun IWL_CFG_160, IWL_CFG_CORES_BT,
727*4882a593Smuzhiyun iwl9560_2ac_cfg_soc, iwl9560_160_name),
728*4882a593Smuzhiyun _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
729*4882a593Smuzhiyun IWL_CFG_MAC_TYPE_PU, IWL_CFG_ANY,
730*4882a593Smuzhiyun IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
731*4882a593Smuzhiyun IWL_CFG_NO_160, IWL_CFG_CORES_BT,
732*4882a593Smuzhiyun iwl9560_2ac_cfg_soc, iwl9560_name),
733*4882a593Smuzhiyun
734*4882a593Smuzhiyun _IWL_DEV_INFO(0x2526, IWL_CFG_ANY,
735*4882a593Smuzhiyun IWL_CFG_MAC_TYPE_PNJ, IWL_CFG_ANY,
736*4882a593Smuzhiyun IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1,
737*4882a593Smuzhiyun IWL_CFG_160, IWL_CFG_CORES_BT,
738*4882a593Smuzhiyun iwl9260_2ac_cfg, iwl9461_160_name),
739*4882a593Smuzhiyun _IWL_DEV_INFO(0x2526, IWL_CFG_ANY,
740*4882a593Smuzhiyun IWL_CFG_MAC_TYPE_PNJ, IWL_CFG_ANY,
741*4882a593Smuzhiyun IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1,
742*4882a593Smuzhiyun IWL_CFG_NO_160, IWL_CFG_CORES_BT,
743*4882a593Smuzhiyun iwl9260_2ac_cfg, iwl9461_name),
744*4882a593Smuzhiyun _IWL_DEV_INFO(0x2526, IWL_CFG_ANY,
745*4882a593Smuzhiyun IWL_CFG_MAC_TYPE_PNJ, IWL_CFG_ANY,
746*4882a593Smuzhiyun IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV,
747*4882a593Smuzhiyun IWL_CFG_160, IWL_CFG_CORES_BT,
748*4882a593Smuzhiyun iwl9260_2ac_cfg, iwl9462_160_name),
749*4882a593Smuzhiyun _IWL_DEV_INFO(0x2526, IWL_CFG_ANY,
750*4882a593Smuzhiyun IWL_CFG_MAC_TYPE_PNJ, IWL_CFG_ANY,
751*4882a593Smuzhiyun IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV,
752*4882a593Smuzhiyun IWL_CFG_NO_160, IWL_CFG_CORES_BT,
753*4882a593Smuzhiyun iwl9260_2ac_cfg, iwl9462_name),
754*4882a593Smuzhiyun
755*4882a593Smuzhiyun _IWL_DEV_INFO(0x2526, IWL_CFG_ANY,
756*4882a593Smuzhiyun IWL_CFG_MAC_TYPE_PNJ, IWL_CFG_ANY,
757*4882a593Smuzhiyun IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
758*4882a593Smuzhiyun IWL_CFG_160, IWL_CFG_CORES_BT,
759*4882a593Smuzhiyun iwl9260_2ac_cfg, iwl9560_160_name),
760*4882a593Smuzhiyun _IWL_DEV_INFO(0x2526, IWL_CFG_ANY,
761*4882a593Smuzhiyun IWL_CFG_MAC_TYPE_PNJ, IWL_CFG_ANY,
762*4882a593Smuzhiyun IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
763*4882a593Smuzhiyun IWL_CFG_NO_160, IWL_CFG_CORES_BT,
764*4882a593Smuzhiyun iwl9260_2ac_cfg, iwl9560_name),
765*4882a593Smuzhiyun
766*4882a593Smuzhiyun _IWL_DEV_INFO(0x2526, IWL_CFG_ANY,
767*4882a593Smuzhiyun IWL_CFG_MAC_TYPE_TH, IWL_CFG_ANY,
768*4882a593Smuzhiyun IWL_CFG_RF_TYPE_TH, IWL_CFG_ANY,
769*4882a593Smuzhiyun IWL_CFG_160, IWL_CFG_CORES_BT_GNSS,
770*4882a593Smuzhiyun iwl9260_2ac_cfg, iwl9270_160_name),
771*4882a593Smuzhiyun _IWL_DEV_INFO(0x2526, IWL_CFG_ANY,
772*4882a593Smuzhiyun IWL_CFG_MAC_TYPE_TH, IWL_CFG_ANY,
773*4882a593Smuzhiyun IWL_CFG_RF_TYPE_TH, IWL_CFG_ANY,
774*4882a593Smuzhiyun IWL_CFG_NO_160, IWL_CFG_CORES_BT_GNSS,
775*4882a593Smuzhiyun iwl9260_2ac_cfg, iwl9270_name),
776*4882a593Smuzhiyun
777*4882a593Smuzhiyun _IWL_DEV_INFO(0x271B, IWL_CFG_ANY,
778*4882a593Smuzhiyun IWL_CFG_MAC_TYPE_TH, IWL_CFG_ANY,
779*4882a593Smuzhiyun IWL_CFG_RF_TYPE_TH1, IWL_CFG_ANY,
780*4882a593Smuzhiyun IWL_CFG_160, IWL_CFG_CORES_BT,
781*4882a593Smuzhiyun iwl9260_2ac_cfg, iwl9162_160_name),
782*4882a593Smuzhiyun _IWL_DEV_INFO(0x271B, IWL_CFG_ANY,
783*4882a593Smuzhiyun IWL_CFG_MAC_TYPE_TH, IWL_CFG_ANY,
784*4882a593Smuzhiyun IWL_CFG_RF_TYPE_TH1, IWL_CFG_ANY,
785*4882a593Smuzhiyun IWL_CFG_NO_160, IWL_CFG_CORES_BT,
786*4882a593Smuzhiyun iwl9260_2ac_cfg, iwl9162_name),
787*4882a593Smuzhiyun
788*4882a593Smuzhiyun _IWL_DEV_INFO(0x2526, IWL_CFG_ANY,
789*4882a593Smuzhiyun IWL_CFG_MAC_TYPE_TH, IWL_CFG_ANY,
790*4882a593Smuzhiyun IWL_CFG_RF_TYPE_TH, IWL_CFG_ANY,
791*4882a593Smuzhiyun IWL_CFG_160, IWL_CFG_CORES_BT,
792*4882a593Smuzhiyun iwl9260_2ac_cfg, iwl9260_160_name),
793*4882a593Smuzhiyun _IWL_DEV_INFO(0x2526, IWL_CFG_ANY,
794*4882a593Smuzhiyun IWL_CFG_MAC_TYPE_TH, IWL_CFG_ANY,
795*4882a593Smuzhiyun IWL_CFG_RF_TYPE_TH, IWL_CFG_ANY,
796*4882a593Smuzhiyun IWL_CFG_NO_160, IWL_CFG_CORES_BT,
797*4882a593Smuzhiyun iwl9260_2ac_cfg, iwl9260_name),
798*4882a593Smuzhiyun
799*4882a593Smuzhiyun /* Qu with Jf */
800*4882a593Smuzhiyun /* Qu B step */
801*4882a593Smuzhiyun _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
802*4882a593Smuzhiyun IWL_CFG_MAC_TYPE_QU, SILICON_B_STEP,
803*4882a593Smuzhiyun IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1,
804*4882a593Smuzhiyun IWL_CFG_160, IWL_CFG_CORES_BT,
805*4882a593Smuzhiyun iwl9560_qu_b0_jf_b0_cfg, iwl9461_160_name),
806*4882a593Smuzhiyun _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
807*4882a593Smuzhiyun IWL_CFG_MAC_TYPE_QU, SILICON_B_STEP,
808*4882a593Smuzhiyun IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1,
809*4882a593Smuzhiyun IWL_CFG_NO_160, IWL_CFG_CORES_BT,
810*4882a593Smuzhiyun iwl9560_qu_b0_jf_b0_cfg, iwl9461_name),
811*4882a593Smuzhiyun _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
812*4882a593Smuzhiyun IWL_CFG_MAC_TYPE_QU, SILICON_B_STEP,
813*4882a593Smuzhiyun IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV,
814*4882a593Smuzhiyun IWL_CFG_160, IWL_CFG_CORES_BT,
815*4882a593Smuzhiyun iwl9560_qu_b0_jf_b0_cfg, iwl9462_160_name),
816*4882a593Smuzhiyun _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
817*4882a593Smuzhiyun IWL_CFG_MAC_TYPE_QU, SILICON_B_STEP,
818*4882a593Smuzhiyun IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV,
819*4882a593Smuzhiyun IWL_CFG_NO_160, IWL_CFG_CORES_BT,
820*4882a593Smuzhiyun iwl9560_qu_b0_jf_b0_cfg, iwl9462_name),
821*4882a593Smuzhiyun
822*4882a593Smuzhiyun _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
823*4882a593Smuzhiyun IWL_CFG_MAC_TYPE_QU, SILICON_B_STEP,
824*4882a593Smuzhiyun IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
825*4882a593Smuzhiyun IWL_CFG_160, IWL_CFG_CORES_BT,
826*4882a593Smuzhiyun iwl9560_qu_b0_jf_b0_cfg, iwl9560_160_name),
827*4882a593Smuzhiyun _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
828*4882a593Smuzhiyun IWL_CFG_MAC_TYPE_QU, SILICON_B_STEP,
829*4882a593Smuzhiyun IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
830*4882a593Smuzhiyun IWL_CFG_NO_160, IWL_CFG_CORES_BT,
831*4882a593Smuzhiyun iwl9560_qu_b0_jf_b0_cfg, iwl9560_name),
832*4882a593Smuzhiyun
833*4882a593Smuzhiyun _IWL_DEV_INFO(IWL_CFG_ANY, 0x1551,
834*4882a593Smuzhiyun IWL_CFG_MAC_TYPE_QU, SILICON_B_STEP,
835*4882a593Smuzhiyun IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
836*4882a593Smuzhiyun IWL_CFG_NO_160, IWL_CFG_CORES_BT,
837*4882a593Smuzhiyun iwl9560_qu_b0_jf_b0_cfg, iwl9560_killer_1550s_name),
838*4882a593Smuzhiyun _IWL_DEV_INFO(IWL_CFG_ANY, 0x1552,
839*4882a593Smuzhiyun IWL_CFG_MAC_TYPE_QU, SILICON_B_STEP,
840*4882a593Smuzhiyun IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
841*4882a593Smuzhiyun IWL_CFG_NO_160, IWL_CFG_CORES_BT,
842*4882a593Smuzhiyun iwl9560_qu_b0_jf_b0_cfg, iwl9560_killer_1550i_name),
843*4882a593Smuzhiyun
844*4882a593Smuzhiyun /* Qu C step */
845*4882a593Smuzhiyun _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
846*4882a593Smuzhiyun IWL_CFG_MAC_TYPE_QU, SILICON_C_STEP,
847*4882a593Smuzhiyun IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1,
848*4882a593Smuzhiyun IWL_CFG_160, IWL_CFG_CORES_BT,
849*4882a593Smuzhiyun iwl9560_qu_c0_jf_b0_cfg, iwl9461_160_name),
850*4882a593Smuzhiyun _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
851*4882a593Smuzhiyun IWL_CFG_MAC_TYPE_QU, SILICON_C_STEP,
852*4882a593Smuzhiyun IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1,
853*4882a593Smuzhiyun IWL_CFG_NO_160, IWL_CFG_CORES_BT,
854*4882a593Smuzhiyun iwl9560_qu_c0_jf_b0_cfg, iwl9461_name),
855*4882a593Smuzhiyun _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
856*4882a593Smuzhiyun IWL_CFG_MAC_TYPE_QU, SILICON_C_STEP,
857*4882a593Smuzhiyun IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV,
858*4882a593Smuzhiyun IWL_CFG_160, IWL_CFG_CORES_BT,
859*4882a593Smuzhiyun iwl9560_qu_c0_jf_b0_cfg, iwl9462_160_name),
860*4882a593Smuzhiyun _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
861*4882a593Smuzhiyun IWL_CFG_MAC_TYPE_QU, SILICON_C_STEP,
862*4882a593Smuzhiyun IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV,
863*4882a593Smuzhiyun IWL_CFG_NO_160, IWL_CFG_CORES_BT,
864*4882a593Smuzhiyun iwl9560_qu_c0_jf_b0_cfg, iwl9462_name),
865*4882a593Smuzhiyun
866*4882a593Smuzhiyun _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
867*4882a593Smuzhiyun IWL_CFG_MAC_TYPE_QU, SILICON_C_STEP,
868*4882a593Smuzhiyun IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
869*4882a593Smuzhiyun IWL_CFG_160, IWL_CFG_CORES_BT,
870*4882a593Smuzhiyun iwl9560_qu_c0_jf_b0_cfg, iwl9560_160_name),
871*4882a593Smuzhiyun _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
872*4882a593Smuzhiyun IWL_CFG_MAC_TYPE_QU, SILICON_C_STEP,
873*4882a593Smuzhiyun IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
874*4882a593Smuzhiyun IWL_CFG_NO_160, IWL_CFG_CORES_BT,
875*4882a593Smuzhiyun iwl9560_qu_c0_jf_b0_cfg, iwl9560_name),
876*4882a593Smuzhiyun
877*4882a593Smuzhiyun _IWL_DEV_INFO(IWL_CFG_ANY, 0x1551,
878*4882a593Smuzhiyun IWL_CFG_MAC_TYPE_QU, SILICON_C_STEP,
879*4882a593Smuzhiyun IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
880*4882a593Smuzhiyun IWL_CFG_160, IWL_CFG_CORES_BT,
881*4882a593Smuzhiyun iwl9560_qu_c0_jf_b0_cfg, iwl9560_killer_1550s_name),
882*4882a593Smuzhiyun _IWL_DEV_INFO(IWL_CFG_ANY, 0x1552,
883*4882a593Smuzhiyun IWL_CFG_MAC_TYPE_QU, SILICON_C_STEP,
884*4882a593Smuzhiyun IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
885*4882a593Smuzhiyun IWL_CFG_NO_160, IWL_CFG_CORES_BT,
886*4882a593Smuzhiyun iwl9560_qu_c0_jf_b0_cfg, iwl9560_killer_1550i_name),
887*4882a593Smuzhiyun
888*4882a593Smuzhiyun /* QuZ */
889*4882a593Smuzhiyun _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
890*4882a593Smuzhiyun IWL_CFG_MAC_TYPE_QUZ, IWL_CFG_ANY,
891*4882a593Smuzhiyun IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1,
892*4882a593Smuzhiyun IWL_CFG_160, IWL_CFG_CORES_BT,
893*4882a593Smuzhiyun iwl9560_quz_a0_jf_b0_cfg, iwl9461_160_name),
894*4882a593Smuzhiyun _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
895*4882a593Smuzhiyun IWL_CFG_MAC_TYPE_QUZ, IWL_CFG_ANY,
896*4882a593Smuzhiyun IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1,
897*4882a593Smuzhiyun IWL_CFG_NO_160, IWL_CFG_CORES_BT,
898*4882a593Smuzhiyun iwl9560_quz_a0_jf_b0_cfg, iwl9461_name),
899*4882a593Smuzhiyun _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
900*4882a593Smuzhiyun IWL_CFG_MAC_TYPE_QUZ, IWL_CFG_ANY,
901*4882a593Smuzhiyun IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV,
902*4882a593Smuzhiyun IWL_CFG_160, IWL_CFG_CORES_BT,
903*4882a593Smuzhiyun iwl9560_quz_a0_jf_b0_cfg, iwl9462_160_name),
904*4882a593Smuzhiyun _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
905*4882a593Smuzhiyun IWL_CFG_MAC_TYPE_QUZ, IWL_CFG_ANY,
906*4882a593Smuzhiyun IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV,
907*4882a593Smuzhiyun IWL_CFG_NO_160, IWL_CFG_CORES_BT,
908*4882a593Smuzhiyun iwl9560_quz_a0_jf_b0_cfg, iwl9462_name),
909*4882a593Smuzhiyun
910*4882a593Smuzhiyun _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
911*4882a593Smuzhiyun IWL_CFG_MAC_TYPE_QUZ, IWL_CFG_ANY,
912*4882a593Smuzhiyun IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
913*4882a593Smuzhiyun IWL_CFG_160, IWL_CFG_CORES_BT,
914*4882a593Smuzhiyun iwl9560_quz_a0_jf_b0_cfg, iwl9560_160_name),
915*4882a593Smuzhiyun _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
916*4882a593Smuzhiyun IWL_CFG_MAC_TYPE_QUZ, IWL_CFG_ANY,
917*4882a593Smuzhiyun IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
918*4882a593Smuzhiyun IWL_CFG_NO_160, IWL_CFG_CORES_BT,
919*4882a593Smuzhiyun iwl9560_quz_a0_jf_b0_cfg, iwl9560_name),
920*4882a593Smuzhiyun
921*4882a593Smuzhiyun _IWL_DEV_INFO(IWL_CFG_ANY, 0x1551,
922*4882a593Smuzhiyun IWL_CFG_MAC_TYPE_QUZ, IWL_CFG_ANY,
923*4882a593Smuzhiyun IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
924*4882a593Smuzhiyun IWL_CFG_160, IWL_CFG_CORES_BT,
925*4882a593Smuzhiyun iwl9560_quz_a0_jf_b0_cfg, iwl9560_killer_1550s_name),
926*4882a593Smuzhiyun _IWL_DEV_INFO(IWL_CFG_ANY, 0x1552,
927*4882a593Smuzhiyun IWL_CFG_MAC_TYPE_QUZ, IWL_CFG_ANY,
928*4882a593Smuzhiyun IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
929*4882a593Smuzhiyun IWL_CFG_NO_160, IWL_CFG_CORES_BT,
930*4882a593Smuzhiyun iwl9560_quz_a0_jf_b0_cfg, iwl9560_killer_1550i_name),
931*4882a593Smuzhiyun
932*4882a593Smuzhiyun /* QnJ */
933*4882a593Smuzhiyun _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
934*4882a593Smuzhiyun IWL_CFG_MAC_TYPE_QNJ, IWL_CFG_ANY,
935*4882a593Smuzhiyun IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1,
936*4882a593Smuzhiyun IWL_CFG_160, IWL_CFG_CORES_BT,
937*4882a593Smuzhiyun iwl9560_qnj_b0_jf_b0_cfg, iwl9461_160_name),
938*4882a593Smuzhiyun _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
939*4882a593Smuzhiyun IWL_CFG_MAC_TYPE_QNJ, IWL_CFG_ANY,
940*4882a593Smuzhiyun IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1,
941*4882a593Smuzhiyun IWL_CFG_NO_160, IWL_CFG_CORES_BT,
942*4882a593Smuzhiyun iwl9560_qnj_b0_jf_b0_cfg, iwl9461_name),
943*4882a593Smuzhiyun _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
944*4882a593Smuzhiyun IWL_CFG_MAC_TYPE_QNJ, IWL_CFG_ANY,
945*4882a593Smuzhiyun IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV,
946*4882a593Smuzhiyun IWL_CFG_160, IWL_CFG_CORES_BT,
947*4882a593Smuzhiyun iwl9560_qnj_b0_jf_b0_cfg, iwl9462_160_name),
948*4882a593Smuzhiyun _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
949*4882a593Smuzhiyun IWL_CFG_MAC_TYPE_QNJ, IWL_CFG_ANY,
950*4882a593Smuzhiyun IWL_CFG_RF_TYPE_JF1, IWL_CFG_RF_ID_JF1_DIV,
951*4882a593Smuzhiyun IWL_CFG_NO_160, IWL_CFG_CORES_BT,
952*4882a593Smuzhiyun iwl9560_qnj_b0_jf_b0_cfg, iwl9462_name),
953*4882a593Smuzhiyun
954*4882a593Smuzhiyun _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
955*4882a593Smuzhiyun IWL_CFG_MAC_TYPE_QNJ, IWL_CFG_ANY,
956*4882a593Smuzhiyun IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
957*4882a593Smuzhiyun IWL_CFG_160, IWL_CFG_CORES_BT,
958*4882a593Smuzhiyun iwl9560_qnj_b0_jf_b0_cfg, iwl9560_160_name),
959*4882a593Smuzhiyun _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
960*4882a593Smuzhiyun IWL_CFG_MAC_TYPE_QNJ, IWL_CFG_ANY,
961*4882a593Smuzhiyun IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
962*4882a593Smuzhiyun IWL_CFG_NO_160, IWL_CFG_CORES_BT,
963*4882a593Smuzhiyun iwl9560_qnj_b0_jf_b0_cfg, iwl9560_name),
964*4882a593Smuzhiyun
965*4882a593Smuzhiyun _IWL_DEV_INFO(IWL_CFG_ANY, 0x1551,
966*4882a593Smuzhiyun IWL_CFG_MAC_TYPE_QNJ, IWL_CFG_ANY,
967*4882a593Smuzhiyun IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
968*4882a593Smuzhiyun IWL_CFG_160, IWL_CFG_CORES_BT,
969*4882a593Smuzhiyun iwl9560_qnj_b0_jf_b0_cfg, iwl9560_killer_1550s_name),
970*4882a593Smuzhiyun _IWL_DEV_INFO(IWL_CFG_ANY, 0x1552,
971*4882a593Smuzhiyun IWL_CFG_MAC_TYPE_QNJ, IWL_CFG_ANY,
972*4882a593Smuzhiyun IWL_CFG_RF_TYPE_JF2, IWL_CFG_RF_ID_JF,
973*4882a593Smuzhiyun IWL_CFG_NO_160, IWL_CFG_CORES_BT,
974*4882a593Smuzhiyun iwl9560_qnj_b0_jf_b0_cfg, iwl9560_killer_1550i_name),
975*4882a593Smuzhiyun
976*4882a593Smuzhiyun /* Qu with Hr */
977*4882a593Smuzhiyun /* Qu B step */
978*4882a593Smuzhiyun _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
979*4882a593Smuzhiyun IWL_CFG_MAC_TYPE_QU, SILICON_B_STEP,
980*4882a593Smuzhiyun IWL_CFG_RF_TYPE_HR1, IWL_CFG_ANY,
981*4882a593Smuzhiyun IWL_CFG_ANY, IWL_CFG_ANY,
982*4882a593Smuzhiyun iwl_qu_b0_hr1_b0, iwl_ax101_name),
983*4882a593Smuzhiyun _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
984*4882a593Smuzhiyun IWL_CFG_MAC_TYPE_QU, SILICON_C_STEP,
985*4882a593Smuzhiyun IWL_CFG_RF_TYPE_HR2, IWL_CFG_ANY,
986*4882a593Smuzhiyun IWL_CFG_ANY, IWL_CFG_ANY,
987*4882a593Smuzhiyun iwl_qu_b0_hr_b0, iwl_ax203_name),
988*4882a593Smuzhiyun
989*4882a593Smuzhiyun /* Qu C step */
990*4882a593Smuzhiyun _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
991*4882a593Smuzhiyun IWL_CFG_MAC_TYPE_QU, SILICON_C_STEP,
992*4882a593Smuzhiyun IWL_CFG_RF_TYPE_HR1, IWL_CFG_ANY,
993*4882a593Smuzhiyun IWL_CFG_ANY, IWL_CFG_ANY,
994*4882a593Smuzhiyun iwl_qu_c0_hr1_b0, iwl_ax101_name),
995*4882a593Smuzhiyun _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
996*4882a593Smuzhiyun IWL_CFG_MAC_TYPE_QU, SILICON_C_STEP,
997*4882a593Smuzhiyun IWL_CFG_RF_TYPE_HR2, IWL_CFG_ANY,
998*4882a593Smuzhiyun IWL_CFG_ANY, IWL_CFG_ANY,
999*4882a593Smuzhiyun iwl_qu_c0_hr_b0, iwl_ax203_name),
1000*4882a593Smuzhiyun
1001*4882a593Smuzhiyun /* QuZ */
1002*4882a593Smuzhiyun _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
1003*4882a593Smuzhiyun IWL_CFG_MAC_TYPE_QUZ, IWL_CFG_ANY,
1004*4882a593Smuzhiyun IWL_CFG_RF_TYPE_HR1, IWL_CFG_ANY,
1005*4882a593Smuzhiyun IWL_CFG_ANY, IWL_CFG_ANY,
1006*4882a593Smuzhiyun iwl_quz_a0_hr1_b0, iwl_ax101_name),
1007*4882a593Smuzhiyun
1008*4882a593Smuzhiyun /* Ma */
1009*4882a593Smuzhiyun _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
1010*4882a593Smuzhiyun IWL_CFG_MAC_TYPE_MA, IWL_CFG_ANY,
1011*4882a593Smuzhiyun IWL_CFG_RF_TYPE_GF, IWL_CFG_ANY,
1012*4882a593Smuzhiyun IWL_CFG_ANY, IWL_CFG_ANY,
1013*4882a593Smuzhiyun iwl_cfg_ma_a0_gf_a0, iwl_ax211_name),
1014*4882a593Smuzhiyun _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
1015*4882a593Smuzhiyun IWL_CFG_MAC_TYPE_MA, IWL_CFG_ANY,
1016*4882a593Smuzhiyun IWL_CFG_RF_TYPE_MR, IWL_CFG_ANY,
1017*4882a593Smuzhiyun IWL_CFG_ANY, IWL_CFG_ANY,
1018*4882a593Smuzhiyun iwl_cfg_ma_a0_mr_a0, iwl_ma_name),
1019*4882a593Smuzhiyun _IWL_DEV_INFO(IWL_CFG_ANY, IWL_CFG_ANY,
1020*4882a593Smuzhiyun IWL_CFG_MAC_TYPE_SNJ, IWL_CFG_ANY,
1021*4882a593Smuzhiyun IWL_CFG_RF_TYPE_MR, IWL_CFG_ANY,
1022*4882a593Smuzhiyun IWL_CFG_ANY, IWL_CFG_ANY,
1023*4882a593Smuzhiyun iwl_cfg_snj_a0_mr_a0, iwl_ma_name),
1024*4882a593Smuzhiyun
1025*4882a593Smuzhiyun
1026*4882a593Smuzhiyun #endif /* CONFIG_IWLMVM */
1027*4882a593Smuzhiyun };
1028*4882a593Smuzhiyun
1029*4882a593Smuzhiyun /* PCI registers */
1030*4882a593Smuzhiyun #define PCI_CFG_RETRY_TIMEOUT 0x041
1031*4882a593Smuzhiyun
iwl_pci_probe(struct pci_dev * pdev,const struct pci_device_id * ent)1032*4882a593Smuzhiyun static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1033*4882a593Smuzhiyun {
1034*4882a593Smuzhiyun const struct iwl_cfg_trans_params *trans;
1035*4882a593Smuzhiyun const struct iwl_cfg *cfg_7265d __maybe_unused = NULL;
1036*4882a593Smuzhiyun struct iwl_trans *iwl_trans;
1037*4882a593Smuzhiyun struct iwl_trans_pcie *trans_pcie;
1038*4882a593Smuzhiyun unsigned long flags;
1039*4882a593Smuzhiyun int i, ret;
1040*4882a593Smuzhiyun const struct iwl_cfg *cfg;
1041*4882a593Smuzhiyun
1042*4882a593Smuzhiyun trans = (void *)(ent->driver_data & ~TRANS_CFG_MARKER);
1043*4882a593Smuzhiyun
1044*4882a593Smuzhiyun /*
1045*4882a593Smuzhiyun * This is needed for backwards compatibility with the old
1046*4882a593Smuzhiyun * tables, so we don't need to change all the config structs
1047*4882a593Smuzhiyun * at the same time. The cfg is used to compare with the old
1048*4882a593Smuzhiyun * full cfg structs.
1049*4882a593Smuzhiyun */
1050*4882a593Smuzhiyun cfg = (void *)(ent->driver_data & ~TRANS_CFG_MARKER);
1051*4882a593Smuzhiyun
1052*4882a593Smuzhiyun /* make sure trans is the first element in iwl_cfg */
1053*4882a593Smuzhiyun BUILD_BUG_ON(offsetof(struct iwl_cfg, trans));
1054*4882a593Smuzhiyun
1055*4882a593Smuzhiyun iwl_trans = iwl_trans_pcie_alloc(pdev, ent, trans);
1056*4882a593Smuzhiyun if (IS_ERR(iwl_trans))
1057*4882a593Smuzhiyun return PTR_ERR(iwl_trans);
1058*4882a593Smuzhiyun
1059*4882a593Smuzhiyun trans_pcie = IWL_TRANS_GET_PCIE_TRANS(iwl_trans);
1060*4882a593Smuzhiyun
1061*4882a593Smuzhiyun iwl_trans->hw_rf_id = iwl_read32(iwl_trans, CSR_HW_RF_ID);
1062*4882a593Smuzhiyun
1063*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(iwl_dev_info_table); i++) {
1064*4882a593Smuzhiyun const struct iwl_dev_info *dev_info = &iwl_dev_info_table[i];
1065*4882a593Smuzhiyun if ((dev_info->device == (u16)IWL_CFG_ANY ||
1066*4882a593Smuzhiyun dev_info->device == pdev->device) &&
1067*4882a593Smuzhiyun (dev_info->subdevice == (u16)IWL_CFG_ANY ||
1068*4882a593Smuzhiyun dev_info->subdevice == pdev->subsystem_device) &&
1069*4882a593Smuzhiyun (dev_info->mac_type == (u16)IWL_CFG_ANY ||
1070*4882a593Smuzhiyun dev_info->mac_type ==
1071*4882a593Smuzhiyun CSR_HW_REV_TYPE(iwl_trans->hw_rev)) &&
1072*4882a593Smuzhiyun (dev_info->mac_step == (u8)IWL_CFG_ANY ||
1073*4882a593Smuzhiyun dev_info->mac_step ==
1074*4882a593Smuzhiyun CSR_HW_REV_STEP(iwl_trans->hw_rev)) &&
1075*4882a593Smuzhiyun (dev_info->rf_type == (u16)IWL_CFG_ANY ||
1076*4882a593Smuzhiyun dev_info->rf_type ==
1077*4882a593Smuzhiyun CSR_HW_RFID_TYPE(iwl_trans->hw_rf_id)) &&
1078*4882a593Smuzhiyun (dev_info->rf_id == (u8)IWL_CFG_ANY ||
1079*4882a593Smuzhiyun dev_info->rf_id ==
1080*4882a593Smuzhiyun IWL_SUBDEVICE_RF_ID(pdev->subsystem_device)) &&
1081*4882a593Smuzhiyun (dev_info->no_160 == (u8)IWL_CFG_ANY ||
1082*4882a593Smuzhiyun dev_info->no_160 ==
1083*4882a593Smuzhiyun IWL_SUBDEVICE_NO_160(pdev->subsystem_device)) &&
1084*4882a593Smuzhiyun (dev_info->cores == (u8)IWL_CFG_ANY ||
1085*4882a593Smuzhiyun dev_info->cores ==
1086*4882a593Smuzhiyun IWL_SUBDEVICE_CORES(pdev->subsystem_device))) {
1087*4882a593Smuzhiyun iwl_trans->cfg = dev_info->cfg;
1088*4882a593Smuzhiyun iwl_trans->name = dev_info->name;
1089*4882a593Smuzhiyun }
1090*4882a593Smuzhiyun }
1091*4882a593Smuzhiyun
1092*4882a593Smuzhiyun #if IS_ENABLED(CONFIG_IWLMVM)
1093*4882a593Smuzhiyun /*
1094*4882a593Smuzhiyun * special-case 7265D, it has the same PCI IDs.
1095*4882a593Smuzhiyun *
1096*4882a593Smuzhiyun * Note that because we already pass the cfg to the transport above,
1097*4882a593Smuzhiyun * all the parameters that the transport uses must, until that is
1098*4882a593Smuzhiyun * changed, be identical to the ones in the 7265D configuration.
1099*4882a593Smuzhiyun */
1100*4882a593Smuzhiyun if (cfg == &iwl7265_2ac_cfg)
1101*4882a593Smuzhiyun cfg_7265d = &iwl7265d_2ac_cfg;
1102*4882a593Smuzhiyun else if (cfg == &iwl7265_2n_cfg)
1103*4882a593Smuzhiyun cfg_7265d = &iwl7265d_2n_cfg;
1104*4882a593Smuzhiyun else if (cfg == &iwl7265_n_cfg)
1105*4882a593Smuzhiyun cfg_7265d = &iwl7265d_n_cfg;
1106*4882a593Smuzhiyun if (cfg_7265d &&
1107*4882a593Smuzhiyun (iwl_trans->hw_rev & CSR_HW_REV_TYPE_MSK) == CSR_HW_REV_TYPE_7265D)
1108*4882a593Smuzhiyun iwl_trans->cfg = cfg_7265d;
1109*4882a593Smuzhiyun
1110*4882a593Smuzhiyun if (cfg == &iwlax210_2ax_cfg_so_hr_a0) {
1111*4882a593Smuzhiyun if (iwl_trans->hw_rev == CSR_HW_REV_TYPE_TY) {
1112*4882a593Smuzhiyun iwl_trans->cfg = &iwlax210_2ax_cfg_ty_gf_a0;
1113*4882a593Smuzhiyun } else if (CSR_HW_RF_ID_TYPE_CHIP_ID(iwl_trans->hw_rf_id) ==
1114*4882a593Smuzhiyun CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_JF)) {
1115*4882a593Smuzhiyun iwl_trans->cfg = &iwlax210_2ax_cfg_so_jf_a0;
1116*4882a593Smuzhiyun } else if (CSR_HW_RF_ID_TYPE_CHIP_ID(iwl_trans->hw_rf_id) ==
1117*4882a593Smuzhiyun CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_GF)) {
1118*4882a593Smuzhiyun iwl_trans->cfg = &iwlax211_2ax_cfg_so_gf_a0;
1119*4882a593Smuzhiyun } else if (CSR_HW_RF_ID_TYPE_CHIP_ID(iwl_trans->hw_rf_id) ==
1120*4882a593Smuzhiyun CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_GF4)) {
1121*4882a593Smuzhiyun iwl_trans->cfg = &iwlax411_2ax_cfg_so_gf4_a0;
1122*4882a593Smuzhiyun }
1123*4882a593Smuzhiyun }
1124*4882a593Smuzhiyun
1125*4882a593Smuzhiyun /*
1126*4882a593Smuzhiyun * This is a hack to switch from Qu B0 to Qu C0. We need to
1127*4882a593Smuzhiyun * do this for all cfgs that use Qu B0, except for those using
1128*4882a593Smuzhiyun * Jf, which have already been moved to the new table. The
1129*4882a593Smuzhiyun * rest must be removed once we convert Qu with Hr as well.
1130*4882a593Smuzhiyun */
1131*4882a593Smuzhiyun if (iwl_trans->hw_rev == CSR_HW_REV_TYPE_QU_C0) {
1132*4882a593Smuzhiyun if (iwl_trans->cfg == &iwl_ax201_cfg_qu_hr)
1133*4882a593Smuzhiyun iwl_trans->cfg = &iwl_ax201_cfg_qu_c0_hr_b0;
1134*4882a593Smuzhiyun else if (iwl_trans->cfg == &killer1650s_2ax_cfg_qu_b0_hr_b0)
1135*4882a593Smuzhiyun iwl_trans->cfg = &killer1650s_2ax_cfg_qu_c0_hr_b0;
1136*4882a593Smuzhiyun else if (iwl_trans->cfg == &killer1650i_2ax_cfg_qu_b0_hr_b0)
1137*4882a593Smuzhiyun iwl_trans->cfg = &killer1650i_2ax_cfg_qu_c0_hr_b0;
1138*4882a593Smuzhiyun }
1139*4882a593Smuzhiyun
1140*4882a593Smuzhiyun /* same thing for QuZ... */
1141*4882a593Smuzhiyun if (iwl_trans->hw_rev == CSR_HW_REV_TYPE_QUZ) {
1142*4882a593Smuzhiyun if (iwl_trans->cfg == &iwl_ax201_cfg_qu_hr)
1143*4882a593Smuzhiyun iwl_trans->cfg = &iwl_ax201_cfg_quz_hr;
1144*4882a593Smuzhiyun else if (iwl_trans->cfg == &killer1650s_2ax_cfg_qu_b0_hr_b0)
1145*4882a593Smuzhiyun iwl_trans->cfg = &iwl_ax1650s_cfg_quz_hr;
1146*4882a593Smuzhiyun else if (iwl_trans->cfg == &killer1650i_2ax_cfg_qu_b0_hr_b0)
1147*4882a593Smuzhiyun iwl_trans->cfg = &iwl_ax1650i_cfg_quz_hr;
1148*4882a593Smuzhiyun }
1149*4882a593Smuzhiyun
1150*4882a593Smuzhiyun #endif
1151*4882a593Smuzhiyun /*
1152*4882a593Smuzhiyun * If we didn't set the cfg yet, the PCI ID table entry should have
1153*4882a593Smuzhiyun * been a full config - if yes, use it, otherwise fail.
1154*4882a593Smuzhiyun */
1155*4882a593Smuzhiyun if (!iwl_trans->cfg) {
1156*4882a593Smuzhiyun if (ent->driver_data & TRANS_CFG_MARKER) {
1157*4882a593Smuzhiyun pr_err("No config found for PCI dev %04x/%04x, rev=0x%x, rfid=0x%x\n",
1158*4882a593Smuzhiyun pdev->device, pdev->subsystem_device,
1159*4882a593Smuzhiyun iwl_trans->hw_rev, iwl_trans->hw_rf_id);
1160*4882a593Smuzhiyun ret = -EINVAL;
1161*4882a593Smuzhiyun goto out_free_trans;
1162*4882a593Smuzhiyun }
1163*4882a593Smuzhiyun iwl_trans->cfg = cfg;
1164*4882a593Smuzhiyun }
1165*4882a593Smuzhiyun
1166*4882a593Smuzhiyun /* if we don't have a name yet, copy name from the old cfg */
1167*4882a593Smuzhiyun if (!iwl_trans->name)
1168*4882a593Smuzhiyun iwl_trans->name = iwl_trans->cfg->name;
1169*4882a593Smuzhiyun
1170*4882a593Smuzhiyun if (iwl_trans->trans_cfg->mq_rx_supported) {
1171*4882a593Smuzhiyun if (WARN_ON(!iwl_trans->cfg->num_rbds)) {
1172*4882a593Smuzhiyun ret = -EINVAL;
1173*4882a593Smuzhiyun goto out_free_trans;
1174*4882a593Smuzhiyun }
1175*4882a593Smuzhiyun trans_pcie->num_rx_bufs = iwl_trans->cfg->num_rbds;
1176*4882a593Smuzhiyun } else {
1177*4882a593Smuzhiyun trans_pcie->num_rx_bufs = RX_QUEUE_SIZE;
1178*4882a593Smuzhiyun }
1179*4882a593Smuzhiyun
1180*4882a593Smuzhiyun if (iwl_trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_8000 &&
1181*4882a593Smuzhiyun iwl_trans_grab_nic_access(iwl_trans, &flags)) {
1182*4882a593Smuzhiyun u32 hw_step;
1183*4882a593Smuzhiyun
1184*4882a593Smuzhiyun hw_step = iwl_read_umac_prph_no_grab(iwl_trans, WFPM_CTRL_REG);
1185*4882a593Smuzhiyun hw_step |= ENABLE_WFPM;
1186*4882a593Smuzhiyun iwl_write_umac_prph_no_grab(iwl_trans, WFPM_CTRL_REG, hw_step);
1187*4882a593Smuzhiyun hw_step = iwl_read_prph_no_grab(iwl_trans, CNVI_AUX_MISC_CHIP);
1188*4882a593Smuzhiyun hw_step = (hw_step >> HW_STEP_LOCATION_BITS) & 0xF;
1189*4882a593Smuzhiyun if (hw_step == 0x3)
1190*4882a593Smuzhiyun iwl_trans->hw_rev = (iwl_trans->hw_rev & 0xFFFFFFF3) |
1191*4882a593Smuzhiyun (SILICON_C_STEP << 2);
1192*4882a593Smuzhiyun iwl_trans_release_nic_access(iwl_trans, &flags);
1193*4882a593Smuzhiyun }
1194*4882a593Smuzhiyun
1195*4882a593Smuzhiyun pci_set_drvdata(pdev, iwl_trans);
1196*4882a593Smuzhiyun iwl_trans->drv = iwl_drv_start(iwl_trans);
1197*4882a593Smuzhiyun
1198*4882a593Smuzhiyun if (IS_ERR(iwl_trans->drv)) {
1199*4882a593Smuzhiyun ret = PTR_ERR(iwl_trans->drv);
1200*4882a593Smuzhiyun goto out_free_trans;
1201*4882a593Smuzhiyun }
1202*4882a593Smuzhiyun
1203*4882a593Smuzhiyun /* register transport layer debugfs here */
1204*4882a593Smuzhiyun iwl_trans_pcie_dbgfs_register(iwl_trans);
1205*4882a593Smuzhiyun
1206*4882a593Smuzhiyun return 0;
1207*4882a593Smuzhiyun
1208*4882a593Smuzhiyun out_free_trans:
1209*4882a593Smuzhiyun iwl_trans_pcie_free(iwl_trans);
1210*4882a593Smuzhiyun return ret;
1211*4882a593Smuzhiyun }
1212*4882a593Smuzhiyun
iwl_pci_remove(struct pci_dev * pdev)1213*4882a593Smuzhiyun static void iwl_pci_remove(struct pci_dev *pdev)
1214*4882a593Smuzhiyun {
1215*4882a593Smuzhiyun struct iwl_trans *trans = pci_get_drvdata(pdev);
1216*4882a593Smuzhiyun
1217*4882a593Smuzhiyun iwl_drv_stop(trans->drv);
1218*4882a593Smuzhiyun
1219*4882a593Smuzhiyun iwl_trans_pcie_free(trans);
1220*4882a593Smuzhiyun }
1221*4882a593Smuzhiyun
1222*4882a593Smuzhiyun #ifdef CONFIG_PM_SLEEP
1223*4882a593Smuzhiyun
iwl_pci_suspend(struct device * device)1224*4882a593Smuzhiyun static int iwl_pci_suspend(struct device *device)
1225*4882a593Smuzhiyun {
1226*4882a593Smuzhiyun /* Before you put code here, think about WoWLAN. You cannot check here
1227*4882a593Smuzhiyun * whether WoWLAN is enabled or not, and your code will run even if
1228*4882a593Smuzhiyun * WoWLAN is enabled - don't kill the NIC, someone may need it in Sx.
1229*4882a593Smuzhiyun */
1230*4882a593Smuzhiyun
1231*4882a593Smuzhiyun return 0;
1232*4882a593Smuzhiyun }
1233*4882a593Smuzhiyun
iwl_pci_resume(struct device * device)1234*4882a593Smuzhiyun static int iwl_pci_resume(struct device *device)
1235*4882a593Smuzhiyun {
1236*4882a593Smuzhiyun struct pci_dev *pdev = to_pci_dev(device);
1237*4882a593Smuzhiyun struct iwl_trans *trans = pci_get_drvdata(pdev);
1238*4882a593Smuzhiyun struct iwl_trans_pcie *trans_pcie = IWL_TRANS_GET_PCIE_TRANS(trans);
1239*4882a593Smuzhiyun
1240*4882a593Smuzhiyun /* Before you put code here, think about WoWLAN. You cannot check here
1241*4882a593Smuzhiyun * whether WoWLAN is enabled or not, and your code will run even if
1242*4882a593Smuzhiyun * WoWLAN is enabled - the NIC may be alive.
1243*4882a593Smuzhiyun */
1244*4882a593Smuzhiyun
1245*4882a593Smuzhiyun /*
1246*4882a593Smuzhiyun * We disable the RETRY_TIMEOUT register (0x41) to keep
1247*4882a593Smuzhiyun * PCI Tx retries from interfering with C3 CPU state.
1248*4882a593Smuzhiyun */
1249*4882a593Smuzhiyun pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
1250*4882a593Smuzhiyun
1251*4882a593Smuzhiyun if (!trans->op_mode)
1252*4882a593Smuzhiyun return 0;
1253*4882a593Smuzhiyun
1254*4882a593Smuzhiyun /* In WOWLAN, let iwl_trans_pcie_d3_resume do the rest of the work */
1255*4882a593Smuzhiyun if (test_bit(STATUS_DEVICE_ENABLED, &trans->status))
1256*4882a593Smuzhiyun return 0;
1257*4882a593Smuzhiyun
1258*4882a593Smuzhiyun /* reconfigure the MSI-X mapping to get the correct IRQ for rfkill */
1259*4882a593Smuzhiyun iwl_pcie_conf_msix_hw(trans_pcie);
1260*4882a593Smuzhiyun
1261*4882a593Smuzhiyun /*
1262*4882a593Smuzhiyun * Enable rfkill interrupt (in order to keep track of the rfkill
1263*4882a593Smuzhiyun * status). Must be locked to avoid processing a possible rfkill
1264*4882a593Smuzhiyun * interrupt while in iwl_pcie_check_hw_rf_kill().
1265*4882a593Smuzhiyun */
1266*4882a593Smuzhiyun mutex_lock(&trans_pcie->mutex);
1267*4882a593Smuzhiyun iwl_enable_rfkill_int(trans);
1268*4882a593Smuzhiyun iwl_pcie_check_hw_rf_kill(trans);
1269*4882a593Smuzhiyun mutex_unlock(&trans_pcie->mutex);
1270*4882a593Smuzhiyun
1271*4882a593Smuzhiyun return 0;
1272*4882a593Smuzhiyun }
1273*4882a593Smuzhiyun
1274*4882a593Smuzhiyun static const struct dev_pm_ops iwl_dev_pm_ops = {
1275*4882a593Smuzhiyun SET_SYSTEM_SLEEP_PM_OPS(iwl_pci_suspend,
1276*4882a593Smuzhiyun iwl_pci_resume)
1277*4882a593Smuzhiyun };
1278*4882a593Smuzhiyun
1279*4882a593Smuzhiyun #define IWL_PM_OPS (&iwl_dev_pm_ops)
1280*4882a593Smuzhiyun
1281*4882a593Smuzhiyun #else /* CONFIG_PM_SLEEP */
1282*4882a593Smuzhiyun
1283*4882a593Smuzhiyun #define IWL_PM_OPS NULL
1284*4882a593Smuzhiyun
1285*4882a593Smuzhiyun #endif /* CONFIG_PM_SLEEP */
1286*4882a593Smuzhiyun
1287*4882a593Smuzhiyun static struct pci_driver iwl_pci_driver = {
1288*4882a593Smuzhiyun .name = DRV_NAME,
1289*4882a593Smuzhiyun .id_table = iwl_hw_card_ids,
1290*4882a593Smuzhiyun .probe = iwl_pci_probe,
1291*4882a593Smuzhiyun .remove = iwl_pci_remove,
1292*4882a593Smuzhiyun .driver.pm = IWL_PM_OPS,
1293*4882a593Smuzhiyun };
1294*4882a593Smuzhiyun
iwl_pci_register_driver(void)1295*4882a593Smuzhiyun int __must_check iwl_pci_register_driver(void)
1296*4882a593Smuzhiyun {
1297*4882a593Smuzhiyun int ret;
1298*4882a593Smuzhiyun ret = pci_register_driver(&iwl_pci_driver);
1299*4882a593Smuzhiyun if (ret)
1300*4882a593Smuzhiyun pr_err("Unable to initialize PCI module\n");
1301*4882a593Smuzhiyun
1302*4882a593Smuzhiyun return ret;
1303*4882a593Smuzhiyun }
1304*4882a593Smuzhiyun
iwl_pci_unregister_driver(void)1305*4882a593Smuzhiyun void iwl_pci_unregister_driver(void)
1306*4882a593Smuzhiyun {
1307*4882a593Smuzhiyun pci_unregister_driver(&iwl_pci_driver);
1308*4882a593Smuzhiyun }
1309