1*4882a593Smuzhiyun /******************************************************************************
2*4882a593Smuzhiyun *
3*4882a593Smuzhiyun * This file is provided under a dual BSD/GPLv2 license. When using or
4*4882a593Smuzhiyun * redistributing this file, you may do so under either license.
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * GPL LICENSE SUMMARY
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * Copyright(c) 2012 - 2014, 2018 - 2020 Intel Corporation. All rights reserved.
9*4882a593Smuzhiyun * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
10*4882a593Smuzhiyun * Copyright (C) 2015 - 2017 Intel Deutschland GmbH
11*4882a593Smuzhiyun *
12*4882a593Smuzhiyun * This program is free software; you can redistribute it and/or modify
13*4882a593Smuzhiyun * it under the terms of version 2 of the GNU General Public License as
14*4882a593Smuzhiyun * published by the Free Software Foundation.
15*4882a593Smuzhiyun *
16*4882a593Smuzhiyun * This program is distributed in the hope that it will be useful, but
17*4882a593Smuzhiyun * WITHOUT ANY WARRANTY; without even the implied warranty of
18*4882a593Smuzhiyun * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19*4882a593Smuzhiyun * General Public License for more details.
20*4882a593Smuzhiyun *
21*4882a593Smuzhiyun * The full GNU General Public License is included in this distribution
22*4882a593Smuzhiyun * in the file called COPYING.
23*4882a593Smuzhiyun *
24*4882a593Smuzhiyun * Contact Information:
25*4882a593Smuzhiyun * Intel Linux Wireless <linuxwifi@intel.com>
26*4882a593Smuzhiyun * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27*4882a593Smuzhiyun *
28*4882a593Smuzhiyun * BSD LICENSE
29*4882a593Smuzhiyun *
30*4882a593Smuzhiyun * Copyright(c) 2012 - 2014, 2018 - 2020 Intel Corporation. All rights reserved.
31*4882a593Smuzhiyun * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
32*4882a593Smuzhiyun * Copyright (C) 2015 - 2017 Intel Deutschland GmbH
33*4882a593Smuzhiyun * All rights reserved.
34*4882a593Smuzhiyun *
35*4882a593Smuzhiyun * Redistribution and use in source and binary forms, with or without
36*4882a593Smuzhiyun * modification, are permitted provided that the following conditions
37*4882a593Smuzhiyun * are met:
38*4882a593Smuzhiyun *
39*4882a593Smuzhiyun * * Redistributions of source code must retain the above copyright
40*4882a593Smuzhiyun * notice, this list of conditions and the following disclaimer.
41*4882a593Smuzhiyun * * Redistributions in binary form must reproduce the above copyright
42*4882a593Smuzhiyun * notice, this list of conditions and the following disclaimer in
43*4882a593Smuzhiyun * the documentation and/or other materials provided with the
44*4882a593Smuzhiyun * distribution.
45*4882a593Smuzhiyun * * Neither the name Intel Corporation nor the names of its
46*4882a593Smuzhiyun * contributors may be used to endorse or promote products derived
47*4882a593Smuzhiyun * from this software without specific prior written permission.
48*4882a593Smuzhiyun *
49*4882a593Smuzhiyun * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
50*4882a593Smuzhiyun * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
51*4882a593Smuzhiyun * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
52*4882a593Smuzhiyun * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
53*4882a593Smuzhiyun * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
54*4882a593Smuzhiyun * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
55*4882a593Smuzhiyun * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
56*4882a593Smuzhiyun * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
57*4882a593Smuzhiyun * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
58*4882a593Smuzhiyun * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
59*4882a593Smuzhiyun * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
60*4882a593Smuzhiyun *
61*4882a593Smuzhiyun *****************************************************************************/
62*4882a593Smuzhiyun #include <net/mac80211.h>
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun #include "iwl-debug.h"
65*4882a593Smuzhiyun #include "iwl-io.h"
66*4882a593Smuzhiyun #include "iwl-prph.h"
67*4882a593Smuzhiyun #include "iwl-csr.h"
68*4882a593Smuzhiyun #include "mvm.h"
69*4882a593Smuzhiyun #include "fw/api/rs.h"
70*4882a593Smuzhiyun #include "fw/img.h"
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun /*
73*4882a593Smuzhiyun * Will return 0 even if the cmd failed when RFKILL is asserted unless
74*4882a593Smuzhiyun * CMD_WANT_SKB is set in cmd->flags.
75*4882a593Smuzhiyun */
iwl_mvm_send_cmd(struct iwl_mvm * mvm,struct iwl_host_cmd * cmd)76*4882a593Smuzhiyun int iwl_mvm_send_cmd(struct iwl_mvm *mvm, struct iwl_host_cmd *cmd)
77*4882a593Smuzhiyun {
78*4882a593Smuzhiyun int ret;
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun #if defined(CONFIG_IWLWIFI_DEBUGFS) && defined(CONFIG_PM_SLEEP)
81*4882a593Smuzhiyun if (WARN_ON(mvm->d3_test_active))
82*4882a593Smuzhiyun return -EIO;
83*4882a593Smuzhiyun #endif
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun /*
86*4882a593Smuzhiyun * Synchronous commands from this op-mode must hold
87*4882a593Smuzhiyun * the mutex, this ensures we don't try to send two
88*4882a593Smuzhiyun * (or more) synchronous commands at a time.
89*4882a593Smuzhiyun */
90*4882a593Smuzhiyun if (!(cmd->flags & CMD_ASYNC))
91*4882a593Smuzhiyun lockdep_assert_held(&mvm->mutex);
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun ret = iwl_trans_send_cmd(mvm->trans, cmd);
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun /*
96*4882a593Smuzhiyun * If the caller wants the SKB, then don't hide any problems, the
97*4882a593Smuzhiyun * caller might access the response buffer which will be NULL if
98*4882a593Smuzhiyun * the command failed.
99*4882a593Smuzhiyun */
100*4882a593Smuzhiyun if (cmd->flags & CMD_WANT_SKB)
101*4882a593Smuzhiyun return ret;
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun /* Silently ignore failures if RFKILL is asserted */
104*4882a593Smuzhiyun if (!ret || ret == -ERFKILL)
105*4882a593Smuzhiyun return 0;
106*4882a593Smuzhiyun return ret;
107*4882a593Smuzhiyun }
108*4882a593Smuzhiyun
iwl_mvm_send_cmd_pdu(struct iwl_mvm * mvm,u32 id,u32 flags,u16 len,const void * data)109*4882a593Smuzhiyun int iwl_mvm_send_cmd_pdu(struct iwl_mvm *mvm, u32 id,
110*4882a593Smuzhiyun u32 flags, u16 len, const void *data)
111*4882a593Smuzhiyun {
112*4882a593Smuzhiyun struct iwl_host_cmd cmd = {
113*4882a593Smuzhiyun .id = id,
114*4882a593Smuzhiyun .len = { len, },
115*4882a593Smuzhiyun .data = { data, },
116*4882a593Smuzhiyun .flags = flags,
117*4882a593Smuzhiyun };
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun return iwl_mvm_send_cmd(mvm, &cmd);
120*4882a593Smuzhiyun }
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun /*
123*4882a593Smuzhiyun * We assume that the caller set the status to the success value
124*4882a593Smuzhiyun */
iwl_mvm_send_cmd_status(struct iwl_mvm * mvm,struct iwl_host_cmd * cmd,u32 * status)125*4882a593Smuzhiyun int iwl_mvm_send_cmd_status(struct iwl_mvm *mvm, struct iwl_host_cmd *cmd,
126*4882a593Smuzhiyun u32 *status)
127*4882a593Smuzhiyun {
128*4882a593Smuzhiyun struct iwl_rx_packet *pkt;
129*4882a593Smuzhiyun struct iwl_cmd_response *resp;
130*4882a593Smuzhiyun int ret, resp_len;
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun lockdep_assert_held(&mvm->mutex);
133*4882a593Smuzhiyun
134*4882a593Smuzhiyun #if defined(CONFIG_IWLWIFI_DEBUGFS) && defined(CONFIG_PM_SLEEP)
135*4882a593Smuzhiyun if (WARN_ON(mvm->d3_test_active))
136*4882a593Smuzhiyun return -EIO;
137*4882a593Smuzhiyun #endif
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun /*
140*4882a593Smuzhiyun * Only synchronous commands can wait for status,
141*4882a593Smuzhiyun * we use WANT_SKB so the caller can't.
142*4882a593Smuzhiyun */
143*4882a593Smuzhiyun if (WARN_ONCE(cmd->flags & (CMD_ASYNC | CMD_WANT_SKB),
144*4882a593Smuzhiyun "cmd flags %x", cmd->flags))
145*4882a593Smuzhiyun return -EINVAL;
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun cmd->flags |= CMD_WANT_SKB;
148*4882a593Smuzhiyun
149*4882a593Smuzhiyun ret = iwl_trans_send_cmd(mvm->trans, cmd);
150*4882a593Smuzhiyun if (ret == -ERFKILL) {
151*4882a593Smuzhiyun /*
152*4882a593Smuzhiyun * The command failed because of RFKILL, don't update
153*4882a593Smuzhiyun * the status, leave it as success and return 0.
154*4882a593Smuzhiyun */
155*4882a593Smuzhiyun return 0;
156*4882a593Smuzhiyun } else if (ret) {
157*4882a593Smuzhiyun return ret;
158*4882a593Smuzhiyun }
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun pkt = cmd->resp_pkt;
161*4882a593Smuzhiyun
162*4882a593Smuzhiyun resp_len = iwl_rx_packet_payload_len(pkt);
163*4882a593Smuzhiyun if (WARN_ON_ONCE(resp_len != sizeof(*resp))) {
164*4882a593Smuzhiyun ret = -EIO;
165*4882a593Smuzhiyun goto out_free_resp;
166*4882a593Smuzhiyun }
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun resp = (void *)pkt->data;
169*4882a593Smuzhiyun *status = le32_to_cpu(resp->status);
170*4882a593Smuzhiyun out_free_resp:
171*4882a593Smuzhiyun iwl_free_resp(cmd);
172*4882a593Smuzhiyun return ret;
173*4882a593Smuzhiyun }
174*4882a593Smuzhiyun
175*4882a593Smuzhiyun /*
176*4882a593Smuzhiyun * We assume that the caller set the status to the sucess value
177*4882a593Smuzhiyun */
iwl_mvm_send_cmd_pdu_status(struct iwl_mvm * mvm,u32 id,u16 len,const void * data,u32 * status)178*4882a593Smuzhiyun int iwl_mvm_send_cmd_pdu_status(struct iwl_mvm *mvm, u32 id, u16 len,
179*4882a593Smuzhiyun const void *data, u32 *status)
180*4882a593Smuzhiyun {
181*4882a593Smuzhiyun struct iwl_host_cmd cmd = {
182*4882a593Smuzhiyun .id = id,
183*4882a593Smuzhiyun .len = { len, },
184*4882a593Smuzhiyun .data = { data, },
185*4882a593Smuzhiyun };
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun return iwl_mvm_send_cmd_status(mvm, &cmd, status);
188*4882a593Smuzhiyun }
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun #define IWL_DECLARE_RATE_INFO(r) \
191*4882a593Smuzhiyun [IWL_RATE_##r##M_INDEX] = IWL_RATE_##r##M_PLCP
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun /*
194*4882a593Smuzhiyun * Translate from fw_rate_index (IWL_RATE_XXM_INDEX) to PLCP
195*4882a593Smuzhiyun */
196*4882a593Smuzhiyun static const u8 fw_rate_idx_to_plcp[IWL_RATE_COUNT] = {
197*4882a593Smuzhiyun IWL_DECLARE_RATE_INFO(1),
198*4882a593Smuzhiyun IWL_DECLARE_RATE_INFO(2),
199*4882a593Smuzhiyun IWL_DECLARE_RATE_INFO(5),
200*4882a593Smuzhiyun IWL_DECLARE_RATE_INFO(11),
201*4882a593Smuzhiyun IWL_DECLARE_RATE_INFO(6),
202*4882a593Smuzhiyun IWL_DECLARE_RATE_INFO(9),
203*4882a593Smuzhiyun IWL_DECLARE_RATE_INFO(12),
204*4882a593Smuzhiyun IWL_DECLARE_RATE_INFO(18),
205*4882a593Smuzhiyun IWL_DECLARE_RATE_INFO(24),
206*4882a593Smuzhiyun IWL_DECLARE_RATE_INFO(36),
207*4882a593Smuzhiyun IWL_DECLARE_RATE_INFO(48),
208*4882a593Smuzhiyun IWL_DECLARE_RATE_INFO(54),
209*4882a593Smuzhiyun };
210*4882a593Smuzhiyun
iwl_mvm_legacy_rate_to_mac80211_idx(u32 rate_n_flags,enum nl80211_band band)211*4882a593Smuzhiyun int iwl_mvm_legacy_rate_to_mac80211_idx(u32 rate_n_flags,
212*4882a593Smuzhiyun enum nl80211_band band)
213*4882a593Smuzhiyun {
214*4882a593Smuzhiyun int rate = rate_n_flags & RATE_LEGACY_RATE_MSK;
215*4882a593Smuzhiyun int idx;
216*4882a593Smuzhiyun int band_offset = 0;
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun /* Legacy rate format, search for match in table */
219*4882a593Smuzhiyun if (band != NL80211_BAND_2GHZ)
220*4882a593Smuzhiyun band_offset = IWL_FIRST_OFDM_RATE;
221*4882a593Smuzhiyun for (idx = band_offset; idx < IWL_RATE_COUNT_LEGACY; idx++)
222*4882a593Smuzhiyun if (fw_rate_idx_to_plcp[idx] == rate)
223*4882a593Smuzhiyun return idx - band_offset;
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun return -1;
226*4882a593Smuzhiyun }
227*4882a593Smuzhiyun
iwl_mvm_mac80211_idx_to_hwrate(int rate_idx)228*4882a593Smuzhiyun u8 iwl_mvm_mac80211_idx_to_hwrate(int rate_idx)
229*4882a593Smuzhiyun {
230*4882a593Smuzhiyun /* Get PLCP rate for tx_cmd->rate_n_flags */
231*4882a593Smuzhiyun return fw_rate_idx_to_plcp[rate_idx];
232*4882a593Smuzhiyun }
233*4882a593Smuzhiyun
iwl_mvm_mac80211_ac_to_ucode_ac(enum ieee80211_ac_numbers ac)234*4882a593Smuzhiyun u8 iwl_mvm_mac80211_ac_to_ucode_ac(enum ieee80211_ac_numbers ac)
235*4882a593Smuzhiyun {
236*4882a593Smuzhiyun static const u8 mac80211_ac_to_ucode_ac[] = {
237*4882a593Smuzhiyun AC_VO,
238*4882a593Smuzhiyun AC_VI,
239*4882a593Smuzhiyun AC_BE,
240*4882a593Smuzhiyun AC_BK
241*4882a593Smuzhiyun };
242*4882a593Smuzhiyun
243*4882a593Smuzhiyun return mac80211_ac_to_ucode_ac[ac];
244*4882a593Smuzhiyun }
245*4882a593Smuzhiyun
iwl_mvm_rx_fw_error(struct iwl_mvm * mvm,struct iwl_rx_cmd_buffer * rxb)246*4882a593Smuzhiyun void iwl_mvm_rx_fw_error(struct iwl_mvm *mvm, struct iwl_rx_cmd_buffer *rxb)
247*4882a593Smuzhiyun {
248*4882a593Smuzhiyun struct iwl_rx_packet *pkt = rxb_addr(rxb);
249*4882a593Smuzhiyun struct iwl_error_resp *err_resp = (void *)pkt->data;
250*4882a593Smuzhiyun
251*4882a593Smuzhiyun IWL_ERR(mvm, "FW Error notification: type 0x%08X cmd_id 0x%02X\n",
252*4882a593Smuzhiyun le32_to_cpu(err_resp->error_type), err_resp->cmd_id);
253*4882a593Smuzhiyun IWL_ERR(mvm, "FW Error notification: seq 0x%04X service 0x%08X\n",
254*4882a593Smuzhiyun le16_to_cpu(err_resp->bad_cmd_seq_num),
255*4882a593Smuzhiyun le32_to_cpu(err_resp->error_service));
256*4882a593Smuzhiyun IWL_ERR(mvm, "FW Error notification: timestamp 0x%016llX\n",
257*4882a593Smuzhiyun le64_to_cpu(err_resp->timestamp));
258*4882a593Smuzhiyun }
259*4882a593Smuzhiyun
260*4882a593Smuzhiyun /*
261*4882a593Smuzhiyun * Returns the first antenna as ANT_[ABC], as defined in iwl-config.h.
262*4882a593Smuzhiyun * The parameter should also be a combination of ANT_[ABC].
263*4882a593Smuzhiyun */
first_antenna(u8 mask)264*4882a593Smuzhiyun u8 first_antenna(u8 mask)
265*4882a593Smuzhiyun {
266*4882a593Smuzhiyun BUILD_BUG_ON(ANT_A != BIT(0)); /* using ffs is wrong if not */
267*4882a593Smuzhiyun if (WARN_ON_ONCE(!mask)) /* ffs will return 0 if mask is zeroed */
268*4882a593Smuzhiyun return BIT(0);
269*4882a593Smuzhiyun return BIT(ffs(mask) - 1);
270*4882a593Smuzhiyun }
271*4882a593Smuzhiyun
272*4882a593Smuzhiyun /*
273*4882a593Smuzhiyun * Toggles between TX antennas to send the probe request on.
274*4882a593Smuzhiyun * Receives the bitmask of valid TX antennas and the *index* used
275*4882a593Smuzhiyun * for the last TX, and returns the next valid *index* to use.
276*4882a593Smuzhiyun * In order to set it in the tx_cmd, must do BIT(idx).
277*4882a593Smuzhiyun */
iwl_mvm_next_antenna(struct iwl_mvm * mvm,u8 valid,u8 last_idx)278*4882a593Smuzhiyun u8 iwl_mvm_next_antenna(struct iwl_mvm *mvm, u8 valid, u8 last_idx)
279*4882a593Smuzhiyun {
280*4882a593Smuzhiyun u8 ind = last_idx;
281*4882a593Smuzhiyun int i;
282*4882a593Smuzhiyun
283*4882a593Smuzhiyun for (i = 0; i < MAX_ANT_NUM; i++) {
284*4882a593Smuzhiyun ind = (ind + 1) % MAX_ANT_NUM;
285*4882a593Smuzhiyun if (valid & BIT(ind))
286*4882a593Smuzhiyun return ind;
287*4882a593Smuzhiyun }
288*4882a593Smuzhiyun
289*4882a593Smuzhiyun WARN_ONCE(1, "Failed to toggle between antennas 0x%x", valid);
290*4882a593Smuzhiyun return last_idx;
291*4882a593Smuzhiyun }
292*4882a593Smuzhiyun
293*4882a593Smuzhiyun /*
294*4882a593Smuzhiyun * Note: This structure is read from the device with IO accesses,
295*4882a593Smuzhiyun * and the reading already does the endian conversion. As it is
296*4882a593Smuzhiyun * read with u32-sized accesses, any members with a different size
297*4882a593Smuzhiyun * need to be ordered correctly though!
298*4882a593Smuzhiyun */
299*4882a593Smuzhiyun struct iwl_error_event_table_v1 {
300*4882a593Smuzhiyun u32 valid; /* (nonzero) valid, (0) log is empty */
301*4882a593Smuzhiyun u32 error_id; /* type of error */
302*4882a593Smuzhiyun u32 pc; /* program counter */
303*4882a593Smuzhiyun u32 blink1; /* branch link */
304*4882a593Smuzhiyun u32 blink2; /* branch link */
305*4882a593Smuzhiyun u32 ilink1; /* interrupt link */
306*4882a593Smuzhiyun u32 ilink2; /* interrupt link */
307*4882a593Smuzhiyun u32 data1; /* error-specific data */
308*4882a593Smuzhiyun u32 data2; /* error-specific data */
309*4882a593Smuzhiyun u32 data3; /* error-specific data */
310*4882a593Smuzhiyun u32 bcon_time; /* beacon timer */
311*4882a593Smuzhiyun u32 tsf_low; /* network timestamp function timer */
312*4882a593Smuzhiyun u32 tsf_hi; /* network timestamp function timer */
313*4882a593Smuzhiyun u32 gp1; /* GP1 timer register */
314*4882a593Smuzhiyun u32 gp2; /* GP2 timer register */
315*4882a593Smuzhiyun u32 gp3; /* GP3 timer register */
316*4882a593Smuzhiyun u32 ucode_ver; /* uCode version */
317*4882a593Smuzhiyun u32 hw_ver; /* HW Silicon version */
318*4882a593Smuzhiyun u32 brd_ver; /* HW board version */
319*4882a593Smuzhiyun u32 log_pc; /* log program counter */
320*4882a593Smuzhiyun u32 frame_ptr; /* frame pointer */
321*4882a593Smuzhiyun u32 stack_ptr; /* stack pointer */
322*4882a593Smuzhiyun u32 hcmd; /* last host command header */
323*4882a593Smuzhiyun u32 isr0; /* isr status register LMPM_NIC_ISR0:
324*4882a593Smuzhiyun * rxtx_flag */
325*4882a593Smuzhiyun u32 isr1; /* isr status register LMPM_NIC_ISR1:
326*4882a593Smuzhiyun * host_flag */
327*4882a593Smuzhiyun u32 isr2; /* isr status register LMPM_NIC_ISR2:
328*4882a593Smuzhiyun * enc_flag */
329*4882a593Smuzhiyun u32 isr3; /* isr status register LMPM_NIC_ISR3:
330*4882a593Smuzhiyun * time_flag */
331*4882a593Smuzhiyun u32 isr4; /* isr status register LMPM_NIC_ISR4:
332*4882a593Smuzhiyun * wico interrupt */
333*4882a593Smuzhiyun u32 isr_pref; /* isr status register LMPM_NIC_PREF_STAT */
334*4882a593Smuzhiyun u32 wait_event; /* wait event() caller address */
335*4882a593Smuzhiyun u32 l2p_control; /* L2pControlField */
336*4882a593Smuzhiyun u32 l2p_duration; /* L2pDurationField */
337*4882a593Smuzhiyun u32 l2p_mhvalid; /* L2pMhValidBits */
338*4882a593Smuzhiyun u32 l2p_addr_match; /* L2pAddrMatchStat */
339*4882a593Smuzhiyun u32 lmpm_pmg_sel; /* indicate which clocks are turned on
340*4882a593Smuzhiyun * (LMPM_PMG_SEL) */
341*4882a593Smuzhiyun u32 u_timestamp; /* indicate when the date and time of the
342*4882a593Smuzhiyun * compilation */
343*4882a593Smuzhiyun u32 flow_handler; /* FH read/write pointers, RX credit */
344*4882a593Smuzhiyun } __packed /* LOG_ERROR_TABLE_API_S_VER_1 */;
345*4882a593Smuzhiyun
346*4882a593Smuzhiyun struct iwl_error_event_table {
347*4882a593Smuzhiyun u32 valid; /* (nonzero) valid, (0) log is empty */
348*4882a593Smuzhiyun u32 error_id; /* type of error */
349*4882a593Smuzhiyun u32 trm_hw_status0; /* TRM HW status */
350*4882a593Smuzhiyun u32 trm_hw_status1; /* TRM HW status */
351*4882a593Smuzhiyun u32 blink2; /* branch link */
352*4882a593Smuzhiyun u32 ilink1; /* interrupt link */
353*4882a593Smuzhiyun u32 ilink2; /* interrupt link */
354*4882a593Smuzhiyun u32 data1; /* error-specific data */
355*4882a593Smuzhiyun u32 data2; /* error-specific data */
356*4882a593Smuzhiyun u32 data3; /* error-specific data */
357*4882a593Smuzhiyun u32 bcon_time; /* beacon timer */
358*4882a593Smuzhiyun u32 tsf_low; /* network timestamp function timer */
359*4882a593Smuzhiyun u32 tsf_hi; /* network timestamp function timer */
360*4882a593Smuzhiyun u32 gp1; /* GP1 timer register */
361*4882a593Smuzhiyun u32 gp2; /* GP2 timer register */
362*4882a593Smuzhiyun u32 fw_rev_type; /* firmware revision type */
363*4882a593Smuzhiyun u32 major; /* uCode version major */
364*4882a593Smuzhiyun u32 minor; /* uCode version minor */
365*4882a593Smuzhiyun u32 hw_ver; /* HW Silicon version */
366*4882a593Smuzhiyun u32 brd_ver; /* HW board version */
367*4882a593Smuzhiyun u32 log_pc; /* log program counter */
368*4882a593Smuzhiyun u32 frame_ptr; /* frame pointer */
369*4882a593Smuzhiyun u32 stack_ptr; /* stack pointer */
370*4882a593Smuzhiyun u32 hcmd; /* last host command header */
371*4882a593Smuzhiyun u32 isr0; /* isr status register LMPM_NIC_ISR0:
372*4882a593Smuzhiyun * rxtx_flag */
373*4882a593Smuzhiyun u32 isr1; /* isr status register LMPM_NIC_ISR1:
374*4882a593Smuzhiyun * host_flag */
375*4882a593Smuzhiyun u32 isr2; /* isr status register LMPM_NIC_ISR2:
376*4882a593Smuzhiyun * enc_flag */
377*4882a593Smuzhiyun u32 isr3; /* isr status register LMPM_NIC_ISR3:
378*4882a593Smuzhiyun * time_flag */
379*4882a593Smuzhiyun u32 isr4; /* isr status register LMPM_NIC_ISR4:
380*4882a593Smuzhiyun * wico interrupt */
381*4882a593Smuzhiyun u32 last_cmd_id; /* last HCMD id handled by the firmware */
382*4882a593Smuzhiyun u32 wait_event; /* wait event() caller address */
383*4882a593Smuzhiyun u32 l2p_control; /* L2pControlField */
384*4882a593Smuzhiyun u32 l2p_duration; /* L2pDurationField */
385*4882a593Smuzhiyun u32 l2p_mhvalid; /* L2pMhValidBits */
386*4882a593Smuzhiyun u32 l2p_addr_match; /* L2pAddrMatchStat */
387*4882a593Smuzhiyun u32 lmpm_pmg_sel; /* indicate which clocks are turned on
388*4882a593Smuzhiyun * (LMPM_PMG_SEL) */
389*4882a593Smuzhiyun u32 u_timestamp; /* indicate when the date and time of the
390*4882a593Smuzhiyun * compilation */
391*4882a593Smuzhiyun u32 flow_handler; /* FH read/write pointers, RX credit */
392*4882a593Smuzhiyun } __packed /* LOG_ERROR_TABLE_API_S_VER_3 */;
393*4882a593Smuzhiyun
394*4882a593Smuzhiyun /*
395*4882a593Smuzhiyun * UMAC error struct - relevant starting from family 8000 chip.
396*4882a593Smuzhiyun * Note: This structure is read from the device with IO accesses,
397*4882a593Smuzhiyun * and the reading already does the endian conversion. As it is
398*4882a593Smuzhiyun * read with u32-sized accesses, any members with a different size
399*4882a593Smuzhiyun * need to be ordered correctly though!
400*4882a593Smuzhiyun */
401*4882a593Smuzhiyun struct iwl_umac_error_event_table {
402*4882a593Smuzhiyun u32 valid; /* (nonzero) valid, (0) log is empty */
403*4882a593Smuzhiyun u32 error_id; /* type of error */
404*4882a593Smuzhiyun u32 blink1; /* branch link */
405*4882a593Smuzhiyun u32 blink2; /* branch link */
406*4882a593Smuzhiyun u32 ilink1; /* interrupt link */
407*4882a593Smuzhiyun u32 ilink2; /* interrupt link */
408*4882a593Smuzhiyun u32 data1; /* error-specific data */
409*4882a593Smuzhiyun u32 data2; /* error-specific data */
410*4882a593Smuzhiyun u32 data3; /* error-specific data */
411*4882a593Smuzhiyun u32 umac_major;
412*4882a593Smuzhiyun u32 umac_minor;
413*4882a593Smuzhiyun u32 frame_pointer; /* core register 27*/
414*4882a593Smuzhiyun u32 stack_pointer; /* core register 28 */
415*4882a593Smuzhiyun u32 cmd_header; /* latest host cmd sent to UMAC */
416*4882a593Smuzhiyun u32 nic_isr_pref; /* ISR status register */
417*4882a593Smuzhiyun } __packed;
418*4882a593Smuzhiyun
419*4882a593Smuzhiyun #define ERROR_START_OFFSET (1 * sizeof(u32))
420*4882a593Smuzhiyun #define ERROR_ELEM_SIZE (7 * sizeof(u32))
421*4882a593Smuzhiyun
iwl_mvm_dump_umac_error_log(struct iwl_mvm * mvm)422*4882a593Smuzhiyun static void iwl_mvm_dump_umac_error_log(struct iwl_mvm *mvm)
423*4882a593Smuzhiyun {
424*4882a593Smuzhiyun struct iwl_trans *trans = mvm->trans;
425*4882a593Smuzhiyun struct iwl_umac_error_event_table table;
426*4882a593Smuzhiyun u32 base = mvm->trans->dbg.umac_error_event_table;
427*4882a593Smuzhiyun
428*4882a593Smuzhiyun if (!base &&
429*4882a593Smuzhiyun !(mvm->trans->dbg.error_event_table_tlv_status &
430*4882a593Smuzhiyun IWL_ERROR_EVENT_TABLE_UMAC))
431*4882a593Smuzhiyun return;
432*4882a593Smuzhiyun
433*4882a593Smuzhiyun iwl_trans_read_mem_bytes(trans, base, &table, sizeof(table));
434*4882a593Smuzhiyun
435*4882a593Smuzhiyun if (table.valid)
436*4882a593Smuzhiyun mvm->fwrt.dump.umac_err_id = table.error_id;
437*4882a593Smuzhiyun
438*4882a593Smuzhiyun if (ERROR_START_OFFSET <= table.valid * ERROR_ELEM_SIZE) {
439*4882a593Smuzhiyun IWL_ERR(trans, "Start IWL Error Log Dump:\n");
440*4882a593Smuzhiyun IWL_ERR(trans, "Status: 0x%08lX, count: %d\n",
441*4882a593Smuzhiyun mvm->status, table.valid);
442*4882a593Smuzhiyun }
443*4882a593Smuzhiyun
444*4882a593Smuzhiyun IWL_ERR(mvm, "0x%08X | %s\n", table.error_id,
445*4882a593Smuzhiyun iwl_fw_lookup_assert_desc(table.error_id));
446*4882a593Smuzhiyun IWL_ERR(mvm, "0x%08X | umac branchlink1\n", table.blink1);
447*4882a593Smuzhiyun IWL_ERR(mvm, "0x%08X | umac branchlink2\n", table.blink2);
448*4882a593Smuzhiyun IWL_ERR(mvm, "0x%08X | umac interruptlink1\n", table.ilink1);
449*4882a593Smuzhiyun IWL_ERR(mvm, "0x%08X | umac interruptlink2\n", table.ilink2);
450*4882a593Smuzhiyun IWL_ERR(mvm, "0x%08X | umac data1\n", table.data1);
451*4882a593Smuzhiyun IWL_ERR(mvm, "0x%08X | umac data2\n", table.data2);
452*4882a593Smuzhiyun IWL_ERR(mvm, "0x%08X | umac data3\n", table.data3);
453*4882a593Smuzhiyun IWL_ERR(mvm, "0x%08X | umac major\n", table.umac_major);
454*4882a593Smuzhiyun IWL_ERR(mvm, "0x%08X | umac minor\n", table.umac_minor);
455*4882a593Smuzhiyun IWL_ERR(mvm, "0x%08X | frame pointer\n", table.frame_pointer);
456*4882a593Smuzhiyun IWL_ERR(mvm, "0x%08X | stack pointer\n", table.stack_pointer);
457*4882a593Smuzhiyun IWL_ERR(mvm, "0x%08X | last host cmd\n", table.cmd_header);
458*4882a593Smuzhiyun IWL_ERR(mvm, "0x%08X | isr status reg\n", table.nic_isr_pref);
459*4882a593Smuzhiyun }
460*4882a593Smuzhiyun
iwl_mvm_dump_lmac_error_log(struct iwl_mvm * mvm,u8 lmac_num)461*4882a593Smuzhiyun static void iwl_mvm_dump_lmac_error_log(struct iwl_mvm *mvm, u8 lmac_num)
462*4882a593Smuzhiyun {
463*4882a593Smuzhiyun struct iwl_trans *trans = mvm->trans;
464*4882a593Smuzhiyun struct iwl_error_event_table table;
465*4882a593Smuzhiyun u32 val, base = mvm->trans->dbg.lmac_error_event_table[lmac_num];
466*4882a593Smuzhiyun
467*4882a593Smuzhiyun if (mvm->fwrt.cur_fw_img == IWL_UCODE_INIT) {
468*4882a593Smuzhiyun if (!base)
469*4882a593Smuzhiyun base = mvm->fw->init_errlog_ptr;
470*4882a593Smuzhiyun } else {
471*4882a593Smuzhiyun if (!base)
472*4882a593Smuzhiyun base = mvm->fw->inst_errlog_ptr;
473*4882a593Smuzhiyun }
474*4882a593Smuzhiyun
475*4882a593Smuzhiyun if (base < 0x400000) {
476*4882a593Smuzhiyun IWL_ERR(mvm,
477*4882a593Smuzhiyun "Not valid error log pointer 0x%08X for %s uCode\n",
478*4882a593Smuzhiyun base,
479*4882a593Smuzhiyun (mvm->fwrt.cur_fw_img == IWL_UCODE_INIT)
480*4882a593Smuzhiyun ? "Init" : "RT");
481*4882a593Smuzhiyun return;
482*4882a593Smuzhiyun }
483*4882a593Smuzhiyun
484*4882a593Smuzhiyun /* check if there is a HW error */
485*4882a593Smuzhiyun val = iwl_trans_read_mem32(trans, base);
486*4882a593Smuzhiyun if (((val & ~0xf) == 0xa5a5a5a0) || ((val & ~0xf) == 0x5a5a5a50)) {
487*4882a593Smuzhiyun int err;
488*4882a593Smuzhiyun
489*4882a593Smuzhiyun IWL_ERR(trans, "HW error, resetting before reading\n");
490*4882a593Smuzhiyun
491*4882a593Smuzhiyun /* reset the device */
492*4882a593Smuzhiyun iwl_trans_sw_reset(trans);
493*4882a593Smuzhiyun
494*4882a593Smuzhiyun err = iwl_finish_nic_init(trans, trans->trans_cfg);
495*4882a593Smuzhiyun if (err)
496*4882a593Smuzhiyun return;
497*4882a593Smuzhiyun }
498*4882a593Smuzhiyun
499*4882a593Smuzhiyun iwl_trans_read_mem_bytes(trans, base, &table, sizeof(table));
500*4882a593Smuzhiyun
501*4882a593Smuzhiyun if (table.valid)
502*4882a593Smuzhiyun mvm->fwrt.dump.lmac_err_id[lmac_num] = table.error_id;
503*4882a593Smuzhiyun
504*4882a593Smuzhiyun if (ERROR_START_OFFSET <= table.valid * ERROR_ELEM_SIZE) {
505*4882a593Smuzhiyun IWL_ERR(trans, "Start IWL Error Log Dump:\n");
506*4882a593Smuzhiyun IWL_ERR(trans, "Status: 0x%08lX, count: %d\n",
507*4882a593Smuzhiyun mvm->status, table.valid);
508*4882a593Smuzhiyun }
509*4882a593Smuzhiyun
510*4882a593Smuzhiyun /* Do not change this output - scripts rely on it */
511*4882a593Smuzhiyun
512*4882a593Smuzhiyun IWL_ERR(mvm, "Loaded firmware version: %s\n", mvm->fw->fw_version);
513*4882a593Smuzhiyun
514*4882a593Smuzhiyun IWL_ERR(mvm, "0x%08X | %-28s\n", table.error_id,
515*4882a593Smuzhiyun iwl_fw_lookup_assert_desc(table.error_id));
516*4882a593Smuzhiyun IWL_ERR(mvm, "0x%08X | trm_hw_status0\n", table.trm_hw_status0);
517*4882a593Smuzhiyun IWL_ERR(mvm, "0x%08X | trm_hw_status1\n", table.trm_hw_status1);
518*4882a593Smuzhiyun IWL_ERR(mvm, "0x%08X | branchlink2\n", table.blink2);
519*4882a593Smuzhiyun IWL_ERR(mvm, "0x%08X | interruptlink1\n", table.ilink1);
520*4882a593Smuzhiyun IWL_ERR(mvm, "0x%08X | interruptlink2\n", table.ilink2);
521*4882a593Smuzhiyun IWL_ERR(mvm, "0x%08X | data1\n", table.data1);
522*4882a593Smuzhiyun IWL_ERR(mvm, "0x%08X | data2\n", table.data2);
523*4882a593Smuzhiyun IWL_ERR(mvm, "0x%08X | data3\n", table.data3);
524*4882a593Smuzhiyun IWL_ERR(mvm, "0x%08X | beacon time\n", table.bcon_time);
525*4882a593Smuzhiyun IWL_ERR(mvm, "0x%08X | tsf low\n", table.tsf_low);
526*4882a593Smuzhiyun IWL_ERR(mvm, "0x%08X | tsf hi\n", table.tsf_hi);
527*4882a593Smuzhiyun IWL_ERR(mvm, "0x%08X | time gp1\n", table.gp1);
528*4882a593Smuzhiyun IWL_ERR(mvm, "0x%08X | time gp2\n", table.gp2);
529*4882a593Smuzhiyun IWL_ERR(mvm, "0x%08X | uCode revision type\n", table.fw_rev_type);
530*4882a593Smuzhiyun IWL_ERR(mvm, "0x%08X | uCode version major\n", table.major);
531*4882a593Smuzhiyun IWL_ERR(mvm, "0x%08X | uCode version minor\n", table.minor);
532*4882a593Smuzhiyun IWL_ERR(mvm, "0x%08X | hw version\n", table.hw_ver);
533*4882a593Smuzhiyun IWL_ERR(mvm, "0x%08X | board version\n", table.brd_ver);
534*4882a593Smuzhiyun IWL_ERR(mvm, "0x%08X | hcmd\n", table.hcmd);
535*4882a593Smuzhiyun IWL_ERR(mvm, "0x%08X | isr0\n", table.isr0);
536*4882a593Smuzhiyun IWL_ERR(mvm, "0x%08X | isr1\n", table.isr1);
537*4882a593Smuzhiyun IWL_ERR(mvm, "0x%08X | isr2\n", table.isr2);
538*4882a593Smuzhiyun IWL_ERR(mvm, "0x%08X | isr3\n", table.isr3);
539*4882a593Smuzhiyun IWL_ERR(mvm, "0x%08X | isr4\n", table.isr4);
540*4882a593Smuzhiyun IWL_ERR(mvm, "0x%08X | last cmd Id\n", table.last_cmd_id);
541*4882a593Smuzhiyun IWL_ERR(mvm, "0x%08X | wait_event\n", table.wait_event);
542*4882a593Smuzhiyun IWL_ERR(mvm, "0x%08X | l2p_control\n", table.l2p_control);
543*4882a593Smuzhiyun IWL_ERR(mvm, "0x%08X | l2p_duration\n", table.l2p_duration);
544*4882a593Smuzhiyun IWL_ERR(mvm, "0x%08X | l2p_mhvalid\n", table.l2p_mhvalid);
545*4882a593Smuzhiyun IWL_ERR(mvm, "0x%08X | l2p_addr_match\n", table.l2p_addr_match);
546*4882a593Smuzhiyun IWL_ERR(mvm, "0x%08X | lmpm_pmg_sel\n", table.lmpm_pmg_sel);
547*4882a593Smuzhiyun IWL_ERR(mvm, "0x%08X | timestamp\n", table.u_timestamp);
548*4882a593Smuzhiyun IWL_ERR(mvm, "0x%08X | flow_handler\n", table.flow_handler);
549*4882a593Smuzhiyun }
550*4882a593Smuzhiyun
iwl_mvm_dump_iml_error_log(struct iwl_mvm * mvm)551*4882a593Smuzhiyun static void iwl_mvm_dump_iml_error_log(struct iwl_mvm *mvm)
552*4882a593Smuzhiyun {
553*4882a593Smuzhiyun struct iwl_trans *trans = mvm->trans;
554*4882a593Smuzhiyun u32 error;
555*4882a593Smuzhiyun
556*4882a593Smuzhiyun error = iwl_read_umac_prph(trans, UMAG_SB_CPU_2_STATUS);
557*4882a593Smuzhiyun
558*4882a593Smuzhiyun IWL_ERR(trans, "IML/ROM dump:\n");
559*4882a593Smuzhiyun
560*4882a593Smuzhiyun if (error & 0xFFFF0000)
561*4882a593Smuzhiyun IWL_ERR(trans, "IML/ROM SYSASSERT:\n");
562*4882a593Smuzhiyun
563*4882a593Smuzhiyun IWL_ERR(mvm, "0x%08X | IML/ROM error/state\n", error);
564*4882a593Smuzhiyun IWL_ERR(mvm, "0x%08X | IML/ROM data1\n",
565*4882a593Smuzhiyun iwl_read_umac_prph(trans, UMAG_SB_CPU_1_STATUS));
566*4882a593Smuzhiyun }
567*4882a593Smuzhiyun
iwl_mvm_dump_nic_error_log(struct iwl_mvm * mvm)568*4882a593Smuzhiyun void iwl_mvm_dump_nic_error_log(struct iwl_mvm *mvm)
569*4882a593Smuzhiyun {
570*4882a593Smuzhiyun if (!test_bit(STATUS_DEVICE_ENABLED, &mvm->trans->status)) {
571*4882a593Smuzhiyun IWL_ERR(mvm,
572*4882a593Smuzhiyun "DEVICE_ENABLED bit is not set. Aborting dump.\n");
573*4882a593Smuzhiyun return;
574*4882a593Smuzhiyun }
575*4882a593Smuzhiyun
576*4882a593Smuzhiyun iwl_mvm_dump_lmac_error_log(mvm, 0);
577*4882a593Smuzhiyun
578*4882a593Smuzhiyun if (mvm->trans->dbg.lmac_error_event_table[1])
579*4882a593Smuzhiyun iwl_mvm_dump_lmac_error_log(mvm, 1);
580*4882a593Smuzhiyun
581*4882a593Smuzhiyun iwl_mvm_dump_umac_error_log(mvm);
582*4882a593Smuzhiyun
583*4882a593Smuzhiyun if (mvm->trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_AX210)
584*4882a593Smuzhiyun iwl_mvm_dump_iml_error_log(mvm);
585*4882a593Smuzhiyun
586*4882a593Smuzhiyun iwl_fw_error_print_fseq_regs(&mvm->fwrt);
587*4882a593Smuzhiyun }
588*4882a593Smuzhiyun
iwl_mvm_reconfig_scd(struct iwl_mvm * mvm,int queue,int fifo,int sta_id,int tid,int frame_limit,u16 ssn)589*4882a593Smuzhiyun int iwl_mvm_reconfig_scd(struct iwl_mvm *mvm, int queue, int fifo, int sta_id,
590*4882a593Smuzhiyun int tid, int frame_limit, u16 ssn)
591*4882a593Smuzhiyun {
592*4882a593Smuzhiyun struct iwl_scd_txq_cfg_cmd cmd = {
593*4882a593Smuzhiyun .scd_queue = queue,
594*4882a593Smuzhiyun .action = SCD_CFG_ENABLE_QUEUE,
595*4882a593Smuzhiyun .window = frame_limit,
596*4882a593Smuzhiyun .sta_id = sta_id,
597*4882a593Smuzhiyun .ssn = cpu_to_le16(ssn),
598*4882a593Smuzhiyun .tx_fifo = fifo,
599*4882a593Smuzhiyun .aggregate = (queue >= IWL_MVM_DQA_MIN_DATA_QUEUE ||
600*4882a593Smuzhiyun queue == IWL_MVM_DQA_BSS_CLIENT_QUEUE),
601*4882a593Smuzhiyun .tid = tid,
602*4882a593Smuzhiyun };
603*4882a593Smuzhiyun int ret;
604*4882a593Smuzhiyun
605*4882a593Smuzhiyun if (WARN_ON(iwl_mvm_has_new_tx_api(mvm)))
606*4882a593Smuzhiyun return -EINVAL;
607*4882a593Smuzhiyun
608*4882a593Smuzhiyun if (WARN(mvm->queue_info[queue].tid_bitmap == 0,
609*4882a593Smuzhiyun "Trying to reconfig unallocated queue %d\n", queue))
610*4882a593Smuzhiyun return -ENXIO;
611*4882a593Smuzhiyun
612*4882a593Smuzhiyun IWL_DEBUG_TX_QUEUES(mvm, "Reconfig SCD for TXQ #%d\n", queue);
613*4882a593Smuzhiyun
614*4882a593Smuzhiyun ret = iwl_mvm_send_cmd_pdu(mvm, SCD_QUEUE_CFG, 0, sizeof(cmd), &cmd);
615*4882a593Smuzhiyun WARN_ONCE(ret, "Failed to re-configure queue %d on FIFO %d, ret=%d\n",
616*4882a593Smuzhiyun queue, fifo, ret);
617*4882a593Smuzhiyun
618*4882a593Smuzhiyun return ret;
619*4882a593Smuzhiyun }
620*4882a593Smuzhiyun
621*4882a593Smuzhiyun /**
622*4882a593Smuzhiyun * iwl_mvm_send_lq_cmd() - Send link quality command
623*4882a593Smuzhiyun * @mvm: Driver data.
624*4882a593Smuzhiyun * @lq: Link quality command to send.
625*4882a593Smuzhiyun *
626*4882a593Smuzhiyun * The link quality command is sent as the last step of station creation.
627*4882a593Smuzhiyun * This is the special case in which init is set and we call a callback in
628*4882a593Smuzhiyun * this case to clear the state indicating that station creation is in
629*4882a593Smuzhiyun * progress.
630*4882a593Smuzhiyun */
iwl_mvm_send_lq_cmd(struct iwl_mvm * mvm,struct iwl_lq_cmd * lq)631*4882a593Smuzhiyun int iwl_mvm_send_lq_cmd(struct iwl_mvm *mvm, struct iwl_lq_cmd *lq)
632*4882a593Smuzhiyun {
633*4882a593Smuzhiyun struct iwl_host_cmd cmd = {
634*4882a593Smuzhiyun .id = LQ_CMD,
635*4882a593Smuzhiyun .len = { sizeof(struct iwl_lq_cmd), },
636*4882a593Smuzhiyun .flags = CMD_ASYNC,
637*4882a593Smuzhiyun .data = { lq, },
638*4882a593Smuzhiyun };
639*4882a593Smuzhiyun
640*4882a593Smuzhiyun if (WARN_ON(lq->sta_id == IWL_MVM_INVALID_STA ||
641*4882a593Smuzhiyun iwl_mvm_has_tlc_offload(mvm)))
642*4882a593Smuzhiyun return -EINVAL;
643*4882a593Smuzhiyun
644*4882a593Smuzhiyun return iwl_mvm_send_cmd(mvm, &cmd);
645*4882a593Smuzhiyun }
646*4882a593Smuzhiyun
647*4882a593Smuzhiyun /**
648*4882a593Smuzhiyun * iwl_mvm_update_smps - Get a request to change the SMPS mode
649*4882a593Smuzhiyun * @mvm: Driver data.
650*4882a593Smuzhiyun * @vif: Pointer to the ieee80211_vif structure
651*4882a593Smuzhiyun * @req_type: The part of the driver who call for a change.
652*4882a593Smuzhiyun * @smps_request: The request to change the SMPS mode.
653*4882a593Smuzhiyun *
654*4882a593Smuzhiyun * Get a requst to change the SMPS mode,
655*4882a593Smuzhiyun * and change it according to all other requests in the driver.
656*4882a593Smuzhiyun */
iwl_mvm_update_smps(struct iwl_mvm * mvm,struct ieee80211_vif * vif,enum iwl_mvm_smps_type_request req_type,enum ieee80211_smps_mode smps_request)657*4882a593Smuzhiyun void iwl_mvm_update_smps(struct iwl_mvm *mvm, struct ieee80211_vif *vif,
658*4882a593Smuzhiyun enum iwl_mvm_smps_type_request req_type,
659*4882a593Smuzhiyun enum ieee80211_smps_mode smps_request)
660*4882a593Smuzhiyun {
661*4882a593Smuzhiyun struct iwl_mvm_vif *mvmvif;
662*4882a593Smuzhiyun enum ieee80211_smps_mode smps_mode;
663*4882a593Smuzhiyun int i;
664*4882a593Smuzhiyun
665*4882a593Smuzhiyun lockdep_assert_held(&mvm->mutex);
666*4882a593Smuzhiyun
667*4882a593Smuzhiyun /* SMPS is irrelevant for NICs that don't have at least 2 RX antenna */
668*4882a593Smuzhiyun if (num_of_ant(iwl_mvm_get_valid_rx_ant(mvm)) == 1)
669*4882a593Smuzhiyun return;
670*4882a593Smuzhiyun
671*4882a593Smuzhiyun if (vif->type == NL80211_IFTYPE_AP)
672*4882a593Smuzhiyun smps_mode = IEEE80211_SMPS_OFF;
673*4882a593Smuzhiyun else
674*4882a593Smuzhiyun smps_mode = IEEE80211_SMPS_AUTOMATIC;
675*4882a593Smuzhiyun
676*4882a593Smuzhiyun mvmvif = iwl_mvm_vif_from_mac80211(vif);
677*4882a593Smuzhiyun mvmvif->smps_requests[req_type] = smps_request;
678*4882a593Smuzhiyun for (i = 0; i < NUM_IWL_MVM_SMPS_REQ; i++) {
679*4882a593Smuzhiyun if (mvmvif->smps_requests[i] == IEEE80211_SMPS_STATIC) {
680*4882a593Smuzhiyun smps_mode = IEEE80211_SMPS_STATIC;
681*4882a593Smuzhiyun break;
682*4882a593Smuzhiyun }
683*4882a593Smuzhiyun if (mvmvif->smps_requests[i] == IEEE80211_SMPS_DYNAMIC)
684*4882a593Smuzhiyun smps_mode = IEEE80211_SMPS_DYNAMIC;
685*4882a593Smuzhiyun }
686*4882a593Smuzhiyun
687*4882a593Smuzhiyun ieee80211_request_smps(vif, smps_mode);
688*4882a593Smuzhiyun }
689*4882a593Smuzhiyun
iwl_mvm_request_statistics(struct iwl_mvm * mvm,bool clear)690*4882a593Smuzhiyun int iwl_mvm_request_statistics(struct iwl_mvm *mvm, bool clear)
691*4882a593Smuzhiyun {
692*4882a593Smuzhiyun struct iwl_statistics_cmd scmd = {
693*4882a593Smuzhiyun .flags = clear ? cpu_to_le32(IWL_STATISTICS_FLG_CLEAR) : 0,
694*4882a593Smuzhiyun };
695*4882a593Smuzhiyun struct iwl_host_cmd cmd = {
696*4882a593Smuzhiyun .id = STATISTICS_CMD,
697*4882a593Smuzhiyun .len[0] = sizeof(scmd),
698*4882a593Smuzhiyun .data[0] = &scmd,
699*4882a593Smuzhiyun .flags = CMD_WANT_SKB,
700*4882a593Smuzhiyun };
701*4882a593Smuzhiyun int ret;
702*4882a593Smuzhiyun
703*4882a593Smuzhiyun ret = iwl_mvm_send_cmd(mvm, &cmd);
704*4882a593Smuzhiyun if (ret)
705*4882a593Smuzhiyun return ret;
706*4882a593Smuzhiyun
707*4882a593Smuzhiyun iwl_mvm_handle_rx_statistics(mvm, cmd.resp_pkt);
708*4882a593Smuzhiyun iwl_free_resp(&cmd);
709*4882a593Smuzhiyun
710*4882a593Smuzhiyun if (clear)
711*4882a593Smuzhiyun iwl_mvm_accu_radio_stats(mvm);
712*4882a593Smuzhiyun
713*4882a593Smuzhiyun return 0;
714*4882a593Smuzhiyun }
715*4882a593Smuzhiyun
iwl_mvm_accu_radio_stats(struct iwl_mvm * mvm)716*4882a593Smuzhiyun void iwl_mvm_accu_radio_stats(struct iwl_mvm *mvm)
717*4882a593Smuzhiyun {
718*4882a593Smuzhiyun mvm->accu_radio_stats.rx_time += mvm->radio_stats.rx_time;
719*4882a593Smuzhiyun mvm->accu_radio_stats.tx_time += mvm->radio_stats.tx_time;
720*4882a593Smuzhiyun mvm->accu_radio_stats.on_time_rf += mvm->radio_stats.on_time_rf;
721*4882a593Smuzhiyun mvm->accu_radio_stats.on_time_scan += mvm->radio_stats.on_time_scan;
722*4882a593Smuzhiyun }
723*4882a593Smuzhiyun
iwl_mvm_diversity_iter(void * _data,u8 * mac,struct ieee80211_vif * vif)724*4882a593Smuzhiyun static void iwl_mvm_diversity_iter(void *_data, u8 *mac,
725*4882a593Smuzhiyun struct ieee80211_vif *vif)
726*4882a593Smuzhiyun {
727*4882a593Smuzhiyun struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif);
728*4882a593Smuzhiyun bool *result = _data;
729*4882a593Smuzhiyun int i;
730*4882a593Smuzhiyun
731*4882a593Smuzhiyun for (i = 0; i < NUM_IWL_MVM_SMPS_REQ; i++) {
732*4882a593Smuzhiyun if (mvmvif->smps_requests[i] == IEEE80211_SMPS_STATIC ||
733*4882a593Smuzhiyun mvmvif->smps_requests[i] == IEEE80211_SMPS_DYNAMIC)
734*4882a593Smuzhiyun *result = false;
735*4882a593Smuzhiyun }
736*4882a593Smuzhiyun }
737*4882a593Smuzhiyun
iwl_mvm_rx_diversity_allowed(struct iwl_mvm * mvm)738*4882a593Smuzhiyun bool iwl_mvm_rx_diversity_allowed(struct iwl_mvm *mvm)
739*4882a593Smuzhiyun {
740*4882a593Smuzhiyun bool result = true;
741*4882a593Smuzhiyun
742*4882a593Smuzhiyun lockdep_assert_held(&mvm->mutex);
743*4882a593Smuzhiyun
744*4882a593Smuzhiyun if (iwlmvm_mod_params.power_scheme != IWL_POWER_SCHEME_CAM)
745*4882a593Smuzhiyun return false;
746*4882a593Smuzhiyun
747*4882a593Smuzhiyun if (num_of_ant(iwl_mvm_get_valid_rx_ant(mvm)) == 1)
748*4882a593Smuzhiyun return false;
749*4882a593Smuzhiyun
750*4882a593Smuzhiyun if (mvm->cfg->rx_with_siso_diversity)
751*4882a593Smuzhiyun return false;
752*4882a593Smuzhiyun
753*4882a593Smuzhiyun ieee80211_iterate_active_interfaces_atomic(
754*4882a593Smuzhiyun mvm->hw, IEEE80211_IFACE_ITER_NORMAL,
755*4882a593Smuzhiyun iwl_mvm_diversity_iter, &result);
756*4882a593Smuzhiyun
757*4882a593Smuzhiyun return result;
758*4882a593Smuzhiyun }
759*4882a593Smuzhiyun
iwl_mvm_send_low_latency_cmd(struct iwl_mvm * mvm,bool low_latency,u16 mac_id)760*4882a593Smuzhiyun void iwl_mvm_send_low_latency_cmd(struct iwl_mvm *mvm,
761*4882a593Smuzhiyun bool low_latency, u16 mac_id)
762*4882a593Smuzhiyun {
763*4882a593Smuzhiyun struct iwl_mac_low_latency_cmd cmd = {
764*4882a593Smuzhiyun .mac_id = cpu_to_le32(mac_id)
765*4882a593Smuzhiyun };
766*4882a593Smuzhiyun
767*4882a593Smuzhiyun if (!fw_has_capa(&mvm->fw->ucode_capa,
768*4882a593Smuzhiyun IWL_UCODE_TLV_CAPA_DYNAMIC_QUOTA))
769*4882a593Smuzhiyun return;
770*4882a593Smuzhiyun
771*4882a593Smuzhiyun if (low_latency) {
772*4882a593Smuzhiyun /* currently we don't care about the direction */
773*4882a593Smuzhiyun cmd.low_latency_rx = 1;
774*4882a593Smuzhiyun cmd.low_latency_tx = 1;
775*4882a593Smuzhiyun }
776*4882a593Smuzhiyun
777*4882a593Smuzhiyun if (iwl_mvm_send_cmd_pdu(mvm, iwl_cmd_id(LOW_LATENCY_CMD,
778*4882a593Smuzhiyun MAC_CONF_GROUP, 0),
779*4882a593Smuzhiyun 0, sizeof(cmd), &cmd))
780*4882a593Smuzhiyun IWL_ERR(mvm, "Failed to send low latency command\n");
781*4882a593Smuzhiyun }
782*4882a593Smuzhiyun
iwl_mvm_update_low_latency(struct iwl_mvm * mvm,struct ieee80211_vif * vif,bool low_latency,enum iwl_mvm_low_latency_cause cause)783*4882a593Smuzhiyun int iwl_mvm_update_low_latency(struct iwl_mvm *mvm, struct ieee80211_vif *vif,
784*4882a593Smuzhiyun bool low_latency,
785*4882a593Smuzhiyun enum iwl_mvm_low_latency_cause cause)
786*4882a593Smuzhiyun {
787*4882a593Smuzhiyun struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif);
788*4882a593Smuzhiyun int res;
789*4882a593Smuzhiyun bool prev;
790*4882a593Smuzhiyun
791*4882a593Smuzhiyun lockdep_assert_held(&mvm->mutex);
792*4882a593Smuzhiyun
793*4882a593Smuzhiyun prev = iwl_mvm_vif_low_latency(mvmvif);
794*4882a593Smuzhiyun iwl_mvm_vif_set_low_latency(mvmvif, low_latency, cause);
795*4882a593Smuzhiyun
796*4882a593Smuzhiyun low_latency = iwl_mvm_vif_low_latency(mvmvif);
797*4882a593Smuzhiyun
798*4882a593Smuzhiyun if (low_latency == prev)
799*4882a593Smuzhiyun return 0;
800*4882a593Smuzhiyun
801*4882a593Smuzhiyun iwl_mvm_send_low_latency_cmd(mvm, low_latency, mvmvif->id);
802*4882a593Smuzhiyun
803*4882a593Smuzhiyun res = iwl_mvm_update_quotas(mvm, false, NULL);
804*4882a593Smuzhiyun if (res)
805*4882a593Smuzhiyun return res;
806*4882a593Smuzhiyun
807*4882a593Smuzhiyun iwl_mvm_bt_coex_vif_change(mvm);
808*4882a593Smuzhiyun
809*4882a593Smuzhiyun return iwl_mvm_power_update_mac(mvm);
810*4882a593Smuzhiyun }
811*4882a593Smuzhiyun
812*4882a593Smuzhiyun struct iwl_mvm_low_latency_iter {
813*4882a593Smuzhiyun bool result;
814*4882a593Smuzhiyun bool result_per_band[NUM_NL80211_BANDS];
815*4882a593Smuzhiyun };
816*4882a593Smuzhiyun
iwl_mvm_ll_iter(void * _data,u8 * mac,struct ieee80211_vif * vif)817*4882a593Smuzhiyun static void iwl_mvm_ll_iter(void *_data, u8 *mac, struct ieee80211_vif *vif)
818*4882a593Smuzhiyun {
819*4882a593Smuzhiyun struct iwl_mvm_low_latency_iter *result = _data;
820*4882a593Smuzhiyun struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif);
821*4882a593Smuzhiyun enum nl80211_band band;
822*4882a593Smuzhiyun
823*4882a593Smuzhiyun if (iwl_mvm_vif_low_latency(mvmvif)) {
824*4882a593Smuzhiyun result->result = true;
825*4882a593Smuzhiyun
826*4882a593Smuzhiyun if (!mvmvif->phy_ctxt)
827*4882a593Smuzhiyun return;
828*4882a593Smuzhiyun
829*4882a593Smuzhiyun band = mvmvif->phy_ctxt->channel->band;
830*4882a593Smuzhiyun result->result_per_band[band] = true;
831*4882a593Smuzhiyun }
832*4882a593Smuzhiyun }
833*4882a593Smuzhiyun
iwl_mvm_low_latency(struct iwl_mvm * mvm)834*4882a593Smuzhiyun bool iwl_mvm_low_latency(struct iwl_mvm *mvm)
835*4882a593Smuzhiyun {
836*4882a593Smuzhiyun struct iwl_mvm_low_latency_iter data = {};
837*4882a593Smuzhiyun
838*4882a593Smuzhiyun ieee80211_iterate_active_interfaces_atomic(
839*4882a593Smuzhiyun mvm->hw, IEEE80211_IFACE_ITER_NORMAL,
840*4882a593Smuzhiyun iwl_mvm_ll_iter, &data);
841*4882a593Smuzhiyun
842*4882a593Smuzhiyun return data.result;
843*4882a593Smuzhiyun }
844*4882a593Smuzhiyun
iwl_mvm_low_latency_band(struct iwl_mvm * mvm,enum nl80211_band band)845*4882a593Smuzhiyun bool iwl_mvm_low_latency_band(struct iwl_mvm *mvm, enum nl80211_band band)
846*4882a593Smuzhiyun {
847*4882a593Smuzhiyun struct iwl_mvm_low_latency_iter data = {};
848*4882a593Smuzhiyun
849*4882a593Smuzhiyun ieee80211_iterate_active_interfaces_atomic(
850*4882a593Smuzhiyun mvm->hw, IEEE80211_IFACE_ITER_NORMAL,
851*4882a593Smuzhiyun iwl_mvm_ll_iter, &data);
852*4882a593Smuzhiyun
853*4882a593Smuzhiyun return data.result_per_band[band];
854*4882a593Smuzhiyun }
855*4882a593Smuzhiyun
856*4882a593Smuzhiyun struct iwl_bss_iter_data {
857*4882a593Smuzhiyun struct ieee80211_vif *vif;
858*4882a593Smuzhiyun bool error;
859*4882a593Smuzhiyun };
860*4882a593Smuzhiyun
iwl_mvm_bss_iface_iterator(void * _data,u8 * mac,struct ieee80211_vif * vif)861*4882a593Smuzhiyun static void iwl_mvm_bss_iface_iterator(void *_data, u8 *mac,
862*4882a593Smuzhiyun struct ieee80211_vif *vif)
863*4882a593Smuzhiyun {
864*4882a593Smuzhiyun struct iwl_bss_iter_data *data = _data;
865*4882a593Smuzhiyun
866*4882a593Smuzhiyun if (vif->type != NL80211_IFTYPE_STATION || vif->p2p)
867*4882a593Smuzhiyun return;
868*4882a593Smuzhiyun
869*4882a593Smuzhiyun if (data->vif) {
870*4882a593Smuzhiyun data->error = true;
871*4882a593Smuzhiyun return;
872*4882a593Smuzhiyun }
873*4882a593Smuzhiyun
874*4882a593Smuzhiyun data->vif = vif;
875*4882a593Smuzhiyun }
876*4882a593Smuzhiyun
iwl_mvm_get_bss_vif(struct iwl_mvm * mvm)877*4882a593Smuzhiyun struct ieee80211_vif *iwl_mvm_get_bss_vif(struct iwl_mvm *mvm)
878*4882a593Smuzhiyun {
879*4882a593Smuzhiyun struct iwl_bss_iter_data bss_iter_data = {};
880*4882a593Smuzhiyun
881*4882a593Smuzhiyun ieee80211_iterate_active_interfaces_atomic(
882*4882a593Smuzhiyun mvm->hw, IEEE80211_IFACE_ITER_NORMAL,
883*4882a593Smuzhiyun iwl_mvm_bss_iface_iterator, &bss_iter_data);
884*4882a593Smuzhiyun
885*4882a593Smuzhiyun if (bss_iter_data.error) {
886*4882a593Smuzhiyun IWL_ERR(mvm, "More than one managed interface active!\n");
887*4882a593Smuzhiyun return ERR_PTR(-EINVAL);
888*4882a593Smuzhiyun }
889*4882a593Smuzhiyun
890*4882a593Smuzhiyun return bss_iter_data.vif;
891*4882a593Smuzhiyun }
892*4882a593Smuzhiyun
893*4882a593Smuzhiyun struct iwl_sta_iter_data {
894*4882a593Smuzhiyun bool assoc;
895*4882a593Smuzhiyun };
896*4882a593Smuzhiyun
iwl_mvm_sta_iface_iterator(void * _data,u8 * mac,struct ieee80211_vif * vif)897*4882a593Smuzhiyun static void iwl_mvm_sta_iface_iterator(void *_data, u8 *mac,
898*4882a593Smuzhiyun struct ieee80211_vif *vif)
899*4882a593Smuzhiyun {
900*4882a593Smuzhiyun struct iwl_sta_iter_data *data = _data;
901*4882a593Smuzhiyun
902*4882a593Smuzhiyun if (vif->type != NL80211_IFTYPE_STATION)
903*4882a593Smuzhiyun return;
904*4882a593Smuzhiyun
905*4882a593Smuzhiyun if (vif->bss_conf.assoc)
906*4882a593Smuzhiyun data->assoc = true;
907*4882a593Smuzhiyun }
908*4882a593Smuzhiyun
iwl_mvm_is_vif_assoc(struct iwl_mvm * mvm)909*4882a593Smuzhiyun bool iwl_mvm_is_vif_assoc(struct iwl_mvm *mvm)
910*4882a593Smuzhiyun {
911*4882a593Smuzhiyun struct iwl_sta_iter_data data = {
912*4882a593Smuzhiyun .assoc = false,
913*4882a593Smuzhiyun };
914*4882a593Smuzhiyun
915*4882a593Smuzhiyun ieee80211_iterate_active_interfaces_atomic(mvm->hw,
916*4882a593Smuzhiyun IEEE80211_IFACE_ITER_NORMAL,
917*4882a593Smuzhiyun iwl_mvm_sta_iface_iterator,
918*4882a593Smuzhiyun &data);
919*4882a593Smuzhiyun return data.assoc;
920*4882a593Smuzhiyun }
921*4882a593Smuzhiyun
iwl_mvm_get_wd_timeout(struct iwl_mvm * mvm,struct ieee80211_vif * vif,bool tdls,bool cmd_q)922*4882a593Smuzhiyun unsigned int iwl_mvm_get_wd_timeout(struct iwl_mvm *mvm,
923*4882a593Smuzhiyun struct ieee80211_vif *vif,
924*4882a593Smuzhiyun bool tdls, bool cmd_q)
925*4882a593Smuzhiyun {
926*4882a593Smuzhiyun struct iwl_fw_dbg_trigger_tlv *trigger;
927*4882a593Smuzhiyun struct iwl_fw_dbg_trigger_txq_timer *txq_timer;
928*4882a593Smuzhiyun unsigned int default_timeout = cmd_q ?
929*4882a593Smuzhiyun IWL_DEF_WD_TIMEOUT :
930*4882a593Smuzhiyun mvm->trans->trans_cfg->base_params->wd_timeout;
931*4882a593Smuzhiyun
932*4882a593Smuzhiyun if (!iwl_fw_dbg_trigger_enabled(mvm->fw, FW_DBG_TRIGGER_TXQ_TIMERS)) {
933*4882a593Smuzhiyun /*
934*4882a593Smuzhiyun * We can't know when the station is asleep or awake, so we
935*4882a593Smuzhiyun * must disable the queue hang detection.
936*4882a593Smuzhiyun */
937*4882a593Smuzhiyun if (fw_has_capa(&mvm->fw->ucode_capa,
938*4882a593Smuzhiyun IWL_UCODE_TLV_CAPA_STA_PM_NOTIF) &&
939*4882a593Smuzhiyun vif && vif->type == NL80211_IFTYPE_AP)
940*4882a593Smuzhiyun return IWL_WATCHDOG_DISABLED;
941*4882a593Smuzhiyun return default_timeout;
942*4882a593Smuzhiyun }
943*4882a593Smuzhiyun
944*4882a593Smuzhiyun trigger = iwl_fw_dbg_get_trigger(mvm->fw, FW_DBG_TRIGGER_TXQ_TIMERS);
945*4882a593Smuzhiyun txq_timer = (void *)trigger->data;
946*4882a593Smuzhiyun
947*4882a593Smuzhiyun if (tdls)
948*4882a593Smuzhiyun return le32_to_cpu(txq_timer->tdls);
949*4882a593Smuzhiyun
950*4882a593Smuzhiyun if (cmd_q)
951*4882a593Smuzhiyun return le32_to_cpu(txq_timer->command_queue);
952*4882a593Smuzhiyun
953*4882a593Smuzhiyun if (WARN_ON(!vif))
954*4882a593Smuzhiyun return default_timeout;
955*4882a593Smuzhiyun
956*4882a593Smuzhiyun switch (ieee80211_vif_type_p2p(vif)) {
957*4882a593Smuzhiyun case NL80211_IFTYPE_ADHOC:
958*4882a593Smuzhiyun return le32_to_cpu(txq_timer->ibss);
959*4882a593Smuzhiyun case NL80211_IFTYPE_STATION:
960*4882a593Smuzhiyun return le32_to_cpu(txq_timer->bss);
961*4882a593Smuzhiyun case NL80211_IFTYPE_AP:
962*4882a593Smuzhiyun return le32_to_cpu(txq_timer->softap);
963*4882a593Smuzhiyun case NL80211_IFTYPE_P2P_CLIENT:
964*4882a593Smuzhiyun return le32_to_cpu(txq_timer->p2p_client);
965*4882a593Smuzhiyun case NL80211_IFTYPE_P2P_GO:
966*4882a593Smuzhiyun return le32_to_cpu(txq_timer->p2p_go);
967*4882a593Smuzhiyun case NL80211_IFTYPE_P2P_DEVICE:
968*4882a593Smuzhiyun return le32_to_cpu(txq_timer->p2p_device);
969*4882a593Smuzhiyun case NL80211_IFTYPE_MONITOR:
970*4882a593Smuzhiyun return default_timeout;
971*4882a593Smuzhiyun default:
972*4882a593Smuzhiyun WARN_ON(1);
973*4882a593Smuzhiyun return mvm->trans->trans_cfg->base_params->wd_timeout;
974*4882a593Smuzhiyun }
975*4882a593Smuzhiyun }
976*4882a593Smuzhiyun
iwl_mvm_connection_loss(struct iwl_mvm * mvm,struct ieee80211_vif * vif,const char * errmsg)977*4882a593Smuzhiyun void iwl_mvm_connection_loss(struct iwl_mvm *mvm, struct ieee80211_vif *vif,
978*4882a593Smuzhiyun const char *errmsg)
979*4882a593Smuzhiyun {
980*4882a593Smuzhiyun struct iwl_fw_dbg_trigger_tlv *trig;
981*4882a593Smuzhiyun struct iwl_fw_dbg_trigger_mlme *trig_mlme;
982*4882a593Smuzhiyun
983*4882a593Smuzhiyun trig = iwl_fw_dbg_trigger_on(&mvm->fwrt, ieee80211_vif_to_wdev(vif),
984*4882a593Smuzhiyun FW_DBG_TRIGGER_MLME);
985*4882a593Smuzhiyun if (!trig)
986*4882a593Smuzhiyun goto out;
987*4882a593Smuzhiyun
988*4882a593Smuzhiyun trig_mlme = (void *)trig->data;
989*4882a593Smuzhiyun
990*4882a593Smuzhiyun if (trig_mlme->stop_connection_loss &&
991*4882a593Smuzhiyun --trig_mlme->stop_connection_loss)
992*4882a593Smuzhiyun goto out;
993*4882a593Smuzhiyun
994*4882a593Smuzhiyun iwl_fw_dbg_collect_trig(&mvm->fwrt, trig, "%s", errmsg);
995*4882a593Smuzhiyun
996*4882a593Smuzhiyun out:
997*4882a593Smuzhiyun ieee80211_connection_loss(vif);
998*4882a593Smuzhiyun }
999*4882a593Smuzhiyun
iwl_mvm_event_frame_timeout_callback(struct iwl_mvm * mvm,struct ieee80211_vif * vif,const struct ieee80211_sta * sta,u16 tid)1000*4882a593Smuzhiyun void iwl_mvm_event_frame_timeout_callback(struct iwl_mvm *mvm,
1001*4882a593Smuzhiyun struct ieee80211_vif *vif,
1002*4882a593Smuzhiyun const struct ieee80211_sta *sta,
1003*4882a593Smuzhiyun u16 tid)
1004*4882a593Smuzhiyun {
1005*4882a593Smuzhiyun struct iwl_fw_dbg_trigger_tlv *trig;
1006*4882a593Smuzhiyun struct iwl_fw_dbg_trigger_ba *ba_trig;
1007*4882a593Smuzhiyun
1008*4882a593Smuzhiyun trig = iwl_fw_dbg_trigger_on(&mvm->fwrt, ieee80211_vif_to_wdev(vif),
1009*4882a593Smuzhiyun FW_DBG_TRIGGER_BA);
1010*4882a593Smuzhiyun if (!trig)
1011*4882a593Smuzhiyun return;
1012*4882a593Smuzhiyun
1013*4882a593Smuzhiyun ba_trig = (void *)trig->data;
1014*4882a593Smuzhiyun
1015*4882a593Smuzhiyun if (!(le16_to_cpu(ba_trig->frame_timeout) & BIT(tid)))
1016*4882a593Smuzhiyun return;
1017*4882a593Smuzhiyun
1018*4882a593Smuzhiyun iwl_fw_dbg_collect_trig(&mvm->fwrt, trig,
1019*4882a593Smuzhiyun "Frame from %pM timed out, tid %d",
1020*4882a593Smuzhiyun sta->addr, tid);
1021*4882a593Smuzhiyun }
1022*4882a593Smuzhiyun
iwl_mvm_tcm_load_percentage(u32 airtime,u32 elapsed)1023*4882a593Smuzhiyun u8 iwl_mvm_tcm_load_percentage(u32 airtime, u32 elapsed)
1024*4882a593Smuzhiyun {
1025*4882a593Smuzhiyun if (!elapsed)
1026*4882a593Smuzhiyun return 0;
1027*4882a593Smuzhiyun
1028*4882a593Smuzhiyun return (100 * airtime / elapsed) / USEC_PER_MSEC;
1029*4882a593Smuzhiyun }
1030*4882a593Smuzhiyun
1031*4882a593Smuzhiyun static enum iwl_mvm_traffic_load
iwl_mvm_tcm_load(struct iwl_mvm * mvm,u32 airtime,unsigned long elapsed)1032*4882a593Smuzhiyun iwl_mvm_tcm_load(struct iwl_mvm *mvm, u32 airtime, unsigned long elapsed)
1033*4882a593Smuzhiyun {
1034*4882a593Smuzhiyun u8 load = iwl_mvm_tcm_load_percentage(airtime, elapsed);
1035*4882a593Smuzhiyun
1036*4882a593Smuzhiyun if (load > IWL_MVM_TCM_LOAD_HIGH_THRESH)
1037*4882a593Smuzhiyun return IWL_MVM_TRAFFIC_HIGH;
1038*4882a593Smuzhiyun if (load > IWL_MVM_TCM_LOAD_MEDIUM_THRESH)
1039*4882a593Smuzhiyun return IWL_MVM_TRAFFIC_MEDIUM;
1040*4882a593Smuzhiyun
1041*4882a593Smuzhiyun return IWL_MVM_TRAFFIC_LOW;
1042*4882a593Smuzhiyun }
1043*4882a593Smuzhiyun
1044*4882a593Smuzhiyun struct iwl_mvm_tcm_iter_data {
1045*4882a593Smuzhiyun struct iwl_mvm *mvm;
1046*4882a593Smuzhiyun bool any_sent;
1047*4882a593Smuzhiyun };
1048*4882a593Smuzhiyun
iwl_mvm_tcm_iter(void * _data,u8 * mac,struct ieee80211_vif * vif)1049*4882a593Smuzhiyun static void iwl_mvm_tcm_iter(void *_data, u8 *mac, struct ieee80211_vif *vif)
1050*4882a593Smuzhiyun {
1051*4882a593Smuzhiyun struct iwl_mvm_tcm_iter_data *data = _data;
1052*4882a593Smuzhiyun struct iwl_mvm *mvm = data->mvm;
1053*4882a593Smuzhiyun struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif);
1054*4882a593Smuzhiyun bool low_latency, prev = mvmvif->low_latency & LOW_LATENCY_TRAFFIC;
1055*4882a593Smuzhiyun
1056*4882a593Smuzhiyun if (mvmvif->id >= NUM_MAC_INDEX_DRIVER)
1057*4882a593Smuzhiyun return;
1058*4882a593Smuzhiyun
1059*4882a593Smuzhiyun low_latency = mvm->tcm.result.low_latency[mvmvif->id];
1060*4882a593Smuzhiyun
1061*4882a593Smuzhiyun if (!mvm->tcm.result.change[mvmvif->id] &&
1062*4882a593Smuzhiyun prev == low_latency) {
1063*4882a593Smuzhiyun iwl_mvm_update_quotas(mvm, false, NULL);
1064*4882a593Smuzhiyun return;
1065*4882a593Smuzhiyun }
1066*4882a593Smuzhiyun
1067*4882a593Smuzhiyun if (prev != low_latency) {
1068*4882a593Smuzhiyun /* this sends traffic load and updates quota as well */
1069*4882a593Smuzhiyun iwl_mvm_update_low_latency(mvm, vif, low_latency,
1070*4882a593Smuzhiyun LOW_LATENCY_TRAFFIC);
1071*4882a593Smuzhiyun } else {
1072*4882a593Smuzhiyun iwl_mvm_update_quotas(mvm, false, NULL);
1073*4882a593Smuzhiyun }
1074*4882a593Smuzhiyun
1075*4882a593Smuzhiyun data->any_sent = true;
1076*4882a593Smuzhiyun }
1077*4882a593Smuzhiyun
iwl_mvm_tcm_results(struct iwl_mvm * mvm)1078*4882a593Smuzhiyun static void iwl_mvm_tcm_results(struct iwl_mvm *mvm)
1079*4882a593Smuzhiyun {
1080*4882a593Smuzhiyun struct iwl_mvm_tcm_iter_data data = {
1081*4882a593Smuzhiyun .mvm = mvm,
1082*4882a593Smuzhiyun .any_sent = false,
1083*4882a593Smuzhiyun };
1084*4882a593Smuzhiyun
1085*4882a593Smuzhiyun mutex_lock(&mvm->mutex);
1086*4882a593Smuzhiyun
1087*4882a593Smuzhiyun ieee80211_iterate_active_interfaces(
1088*4882a593Smuzhiyun mvm->hw, IEEE80211_IFACE_ITER_NORMAL,
1089*4882a593Smuzhiyun iwl_mvm_tcm_iter, &data);
1090*4882a593Smuzhiyun
1091*4882a593Smuzhiyun if (fw_has_capa(&mvm->fw->ucode_capa, IWL_UCODE_TLV_CAPA_UMAC_SCAN))
1092*4882a593Smuzhiyun iwl_mvm_config_scan(mvm);
1093*4882a593Smuzhiyun
1094*4882a593Smuzhiyun mutex_unlock(&mvm->mutex);
1095*4882a593Smuzhiyun }
1096*4882a593Smuzhiyun
iwl_mvm_tcm_uapsd_nonagg_detected_wk(struct work_struct * wk)1097*4882a593Smuzhiyun static void iwl_mvm_tcm_uapsd_nonagg_detected_wk(struct work_struct *wk)
1098*4882a593Smuzhiyun {
1099*4882a593Smuzhiyun struct iwl_mvm *mvm;
1100*4882a593Smuzhiyun struct iwl_mvm_vif *mvmvif;
1101*4882a593Smuzhiyun struct ieee80211_vif *vif;
1102*4882a593Smuzhiyun
1103*4882a593Smuzhiyun mvmvif = container_of(wk, struct iwl_mvm_vif,
1104*4882a593Smuzhiyun uapsd_nonagg_detected_wk.work);
1105*4882a593Smuzhiyun vif = container_of((void *)mvmvif, struct ieee80211_vif, drv_priv);
1106*4882a593Smuzhiyun mvm = mvmvif->mvm;
1107*4882a593Smuzhiyun
1108*4882a593Smuzhiyun if (mvm->tcm.data[mvmvif->id].opened_rx_ba_sessions)
1109*4882a593Smuzhiyun return;
1110*4882a593Smuzhiyun
1111*4882a593Smuzhiyun /* remember that this AP is broken */
1112*4882a593Smuzhiyun memcpy(mvm->uapsd_noagg_bssids[mvm->uapsd_noagg_bssid_write_idx].addr,
1113*4882a593Smuzhiyun vif->bss_conf.bssid, ETH_ALEN);
1114*4882a593Smuzhiyun mvm->uapsd_noagg_bssid_write_idx++;
1115*4882a593Smuzhiyun if (mvm->uapsd_noagg_bssid_write_idx >= IWL_MVM_UAPSD_NOAGG_LIST_LEN)
1116*4882a593Smuzhiyun mvm->uapsd_noagg_bssid_write_idx = 0;
1117*4882a593Smuzhiyun
1118*4882a593Smuzhiyun iwl_mvm_connection_loss(mvm, vif,
1119*4882a593Smuzhiyun "AP isn't using AMPDU with uAPSD enabled");
1120*4882a593Smuzhiyun }
1121*4882a593Smuzhiyun
iwl_mvm_uapsd_agg_disconnect(struct iwl_mvm * mvm,struct ieee80211_vif * vif)1122*4882a593Smuzhiyun static void iwl_mvm_uapsd_agg_disconnect(struct iwl_mvm *mvm,
1123*4882a593Smuzhiyun struct ieee80211_vif *vif)
1124*4882a593Smuzhiyun {
1125*4882a593Smuzhiyun struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif);
1126*4882a593Smuzhiyun
1127*4882a593Smuzhiyun if (vif->type != NL80211_IFTYPE_STATION)
1128*4882a593Smuzhiyun return;
1129*4882a593Smuzhiyun
1130*4882a593Smuzhiyun if (!vif->bss_conf.assoc)
1131*4882a593Smuzhiyun return;
1132*4882a593Smuzhiyun
1133*4882a593Smuzhiyun if (!mvmvif->queue_params[IEEE80211_AC_VO].uapsd &&
1134*4882a593Smuzhiyun !mvmvif->queue_params[IEEE80211_AC_VI].uapsd &&
1135*4882a593Smuzhiyun !mvmvif->queue_params[IEEE80211_AC_BE].uapsd &&
1136*4882a593Smuzhiyun !mvmvif->queue_params[IEEE80211_AC_BK].uapsd)
1137*4882a593Smuzhiyun return;
1138*4882a593Smuzhiyun
1139*4882a593Smuzhiyun if (mvm->tcm.data[mvmvif->id].uapsd_nonagg_detect.detected)
1140*4882a593Smuzhiyun return;
1141*4882a593Smuzhiyun
1142*4882a593Smuzhiyun mvm->tcm.data[mvmvif->id].uapsd_nonagg_detect.detected = true;
1143*4882a593Smuzhiyun IWL_INFO(mvm,
1144*4882a593Smuzhiyun "detected AP should do aggregation but isn't, likely due to U-APSD\n");
1145*4882a593Smuzhiyun schedule_delayed_work(&mvmvif->uapsd_nonagg_detected_wk, 15 * HZ);
1146*4882a593Smuzhiyun }
1147*4882a593Smuzhiyun
iwl_mvm_check_uapsd_agg_expected_tpt(struct iwl_mvm * mvm,unsigned int elapsed,int mac)1148*4882a593Smuzhiyun static void iwl_mvm_check_uapsd_agg_expected_tpt(struct iwl_mvm *mvm,
1149*4882a593Smuzhiyun unsigned int elapsed,
1150*4882a593Smuzhiyun int mac)
1151*4882a593Smuzhiyun {
1152*4882a593Smuzhiyun u64 bytes = mvm->tcm.data[mac].uapsd_nonagg_detect.rx_bytes;
1153*4882a593Smuzhiyun u64 tpt;
1154*4882a593Smuzhiyun unsigned long rate;
1155*4882a593Smuzhiyun struct ieee80211_vif *vif;
1156*4882a593Smuzhiyun
1157*4882a593Smuzhiyun rate = ewma_rate_read(&mvm->tcm.data[mac].uapsd_nonagg_detect.rate);
1158*4882a593Smuzhiyun
1159*4882a593Smuzhiyun if (!rate || mvm->tcm.data[mac].opened_rx_ba_sessions ||
1160*4882a593Smuzhiyun mvm->tcm.data[mac].uapsd_nonagg_detect.detected)
1161*4882a593Smuzhiyun return;
1162*4882a593Smuzhiyun
1163*4882a593Smuzhiyun if (iwl_mvm_has_new_rx_api(mvm)) {
1164*4882a593Smuzhiyun tpt = 8 * bytes; /* kbps */
1165*4882a593Smuzhiyun do_div(tpt, elapsed);
1166*4882a593Smuzhiyun rate *= 1000; /* kbps */
1167*4882a593Smuzhiyun if (tpt < 22 * rate / 100)
1168*4882a593Smuzhiyun return;
1169*4882a593Smuzhiyun } else {
1170*4882a593Smuzhiyun /*
1171*4882a593Smuzhiyun * the rate here is actually the threshold, in 100Kbps units,
1172*4882a593Smuzhiyun * so do the needed conversion from bytes to 100Kbps:
1173*4882a593Smuzhiyun * 100kb = bits / (100 * 1000),
1174*4882a593Smuzhiyun * 100kbps = 100kb / (msecs / 1000) ==
1175*4882a593Smuzhiyun * (bits / (100 * 1000)) / (msecs / 1000) ==
1176*4882a593Smuzhiyun * bits / (100 * msecs)
1177*4882a593Smuzhiyun */
1178*4882a593Smuzhiyun tpt = (8 * bytes);
1179*4882a593Smuzhiyun do_div(tpt, elapsed * 100);
1180*4882a593Smuzhiyun if (tpt < rate)
1181*4882a593Smuzhiyun return;
1182*4882a593Smuzhiyun }
1183*4882a593Smuzhiyun
1184*4882a593Smuzhiyun rcu_read_lock();
1185*4882a593Smuzhiyun vif = rcu_dereference(mvm->vif_id_to_mac[mac]);
1186*4882a593Smuzhiyun if (vif)
1187*4882a593Smuzhiyun iwl_mvm_uapsd_agg_disconnect(mvm, vif);
1188*4882a593Smuzhiyun rcu_read_unlock();
1189*4882a593Smuzhiyun }
1190*4882a593Smuzhiyun
iwl_mvm_tcm_iterator(void * _data,u8 * mac,struct ieee80211_vif * vif)1191*4882a593Smuzhiyun static void iwl_mvm_tcm_iterator(void *_data, u8 *mac,
1192*4882a593Smuzhiyun struct ieee80211_vif *vif)
1193*4882a593Smuzhiyun {
1194*4882a593Smuzhiyun struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif);
1195*4882a593Smuzhiyun u32 *band = _data;
1196*4882a593Smuzhiyun
1197*4882a593Smuzhiyun if (!mvmvif->phy_ctxt)
1198*4882a593Smuzhiyun return;
1199*4882a593Smuzhiyun
1200*4882a593Smuzhiyun band[mvmvif->id] = mvmvif->phy_ctxt->channel->band;
1201*4882a593Smuzhiyun }
1202*4882a593Smuzhiyun
iwl_mvm_calc_tcm_stats(struct iwl_mvm * mvm,unsigned long ts,bool handle_uapsd)1203*4882a593Smuzhiyun static unsigned long iwl_mvm_calc_tcm_stats(struct iwl_mvm *mvm,
1204*4882a593Smuzhiyun unsigned long ts,
1205*4882a593Smuzhiyun bool handle_uapsd)
1206*4882a593Smuzhiyun {
1207*4882a593Smuzhiyun unsigned int elapsed = jiffies_to_msecs(ts - mvm->tcm.ts);
1208*4882a593Smuzhiyun unsigned int uapsd_elapsed =
1209*4882a593Smuzhiyun jiffies_to_msecs(ts - mvm->tcm.uapsd_nonagg_ts);
1210*4882a593Smuzhiyun u32 total_airtime = 0;
1211*4882a593Smuzhiyun u32 band_airtime[NUM_NL80211_BANDS] = {0};
1212*4882a593Smuzhiyun u32 band[NUM_MAC_INDEX_DRIVER] = {0};
1213*4882a593Smuzhiyun int ac, mac, i;
1214*4882a593Smuzhiyun bool low_latency = false;
1215*4882a593Smuzhiyun enum iwl_mvm_traffic_load load, band_load;
1216*4882a593Smuzhiyun bool handle_ll = time_after(ts, mvm->tcm.ll_ts + MVM_LL_PERIOD);
1217*4882a593Smuzhiyun
1218*4882a593Smuzhiyun if (handle_ll)
1219*4882a593Smuzhiyun mvm->tcm.ll_ts = ts;
1220*4882a593Smuzhiyun if (handle_uapsd)
1221*4882a593Smuzhiyun mvm->tcm.uapsd_nonagg_ts = ts;
1222*4882a593Smuzhiyun
1223*4882a593Smuzhiyun mvm->tcm.result.elapsed = elapsed;
1224*4882a593Smuzhiyun
1225*4882a593Smuzhiyun ieee80211_iterate_active_interfaces_atomic(mvm->hw,
1226*4882a593Smuzhiyun IEEE80211_IFACE_ITER_NORMAL,
1227*4882a593Smuzhiyun iwl_mvm_tcm_iterator,
1228*4882a593Smuzhiyun &band);
1229*4882a593Smuzhiyun
1230*4882a593Smuzhiyun for (mac = 0; mac < NUM_MAC_INDEX_DRIVER; mac++) {
1231*4882a593Smuzhiyun struct iwl_mvm_tcm_mac *mdata = &mvm->tcm.data[mac];
1232*4882a593Smuzhiyun u32 vo_vi_pkts = 0;
1233*4882a593Smuzhiyun u32 airtime = mdata->rx.airtime + mdata->tx.airtime;
1234*4882a593Smuzhiyun
1235*4882a593Smuzhiyun total_airtime += airtime;
1236*4882a593Smuzhiyun band_airtime[band[mac]] += airtime;
1237*4882a593Smuzhiyun
1238*4882a593Smuzhiyun load = iwl_mvm_tcm_load(mvm, airtime, elapsed);
1239*4882a593Smuzhiyun mvm->tcm.result.change[mac] = load != mvm->tcm.result.load[mac];
1240*4882a593Smuzhiyun mvm->tcm.result.load[mac] = load;
1241*4882a593Smuzhiyun mvm->tcm.result.airtime[mac] = airtime;
1242*4882a593Smuzhiyun
1243*4882a593Smuzhiyun for (ac = IEEE80211_AC_VO; ac <= IEEE80211_AC_VI; ac++)
1244*4882a593Smuzhiyun vo_vi_pkts += mdata->rx.pkts[ac] +
1245*4882a593Smuzhiyun mdata->tx.pkts[ac];
1246*4882a593Smuzhiyun
1247*4882a593Smuzhiyun /* enable immediately with enough packets but defer disabling */
1248*4882a593Smuzhiyun if (vo_vi_pkts > IWL_MVM_TCM_LOWLAT_ENABLE_THRESH)
1249*4882a593Smuzhiyun mvm->tcm.result.low_latency[mac] = true;
1250*4882a593Smuzhiyun else if (handle_ll)
1251*4882a593Smuzhiyun mvm->tcm.result.low_latency[mac] = false;
1252*4882a593Smuzhiyun
1253*4882a593Smuzhiyun if (handle_ll) {
1254*4882a593Smuzhiyun /* clear old data */
1255*4882a593Smuzhiyun memset(&mdata->rx.pkts, 0, sizeof(mdata->rx.pkts));
1256*4882a593Smuzhiyun memset(&mdata->tx.pkts, 0, sizeof(mdata->tx.pkts));
1257*4882a593Smuzhiyun }
1258*4882a593Smuzhiyun low_latency |= mvm->tcm.result.low_latency[mac];
1259*4882a593Smuzhiyun
1260*4882a593Smuzhiyun if (!mvm->tcm.result.low_latency[mac] && handle_uapsd)
1261*4882a593Smuzhiyun iwl_mvm_check_uapsd_agg_expected_tpt(mvm, uapsd_elapsed,
1262*4882a593Smuzhiyun mac);
1263*4882a593Smuzhiyun /* clear old data */
1264*4882a593Smuzhiyun if (handle_uapsd)
1265*4882a593Smuzhiyun mdata->uapsd_nonagg_detect.rx_bytes = 0;
1266*4882a593Smuzhiyun memset(&mdata->rx.airtime, 0, sizeof(mdata->rx.airtime));
1267*4882a593Smuzhiyun memset(&mdata->tx.airtime, 0, sizeof(mdata->tx.airtime));
1268*4882a593Smuzhiyun }
1269*4882a593Smuzhiyun
1270*4882a593Smuzhiyun load = iwl_mvm_tcm_load(mvm, total_airtime, elapsed);
1271*4882a593Smuzhiyun mvm->tcm.result.global_change = load != mvm->tcm.result.global_load;
1272*4882a593Smuzhiyun mvm->tcm.result.global_load = load;
1273*4882a593Smuzhiyun
1274*4882a593Smuzhiyun for (i = 0; i < NUM_NL80211_BANDS; i++) {
1275*4882a593Smuzhiyun band_load = iwl_mvm_tcm_load(mvm, band_airtime[i], elapsed);
1276*4882a593Smuzhiyun mvm->tcm.result.band_load[i] = band_load;
1277*4882a593Smuzhiyun }
1278*4882a593Smuzhiyun
1279*4882a593Smuzhiyun /*
1280*4882a593Smuzhiyun * If the current load isn't low we need to force re-evaluation
1281*4882a593Smuzhiyun * in the TCM period, so that we can return to low load if there
1282*4882a593Smuzhiyun * was no traffic at all (and thus iwl_mvm_recalc_tcm didn't get
1283*4882a593Smuzhiyun * triggered by traffic).
1284*4882a593Smuzhiyun */
1285*4882a593Smuzhiyun if (load != IWL_MVM_TRAFFIC_LOW)
1286*4882a593Smuzhiyun return MVM_TCM_PERIOD;
1287*4882a593Smuzhiyun /*
1288*4882a593Smuzhiyun * If low-latency is active we need to force re-evaluation after
1289*4882a593Smuzhiyun * (the longer) MVM_LL_PERIOD, so that we can disable low-latency
1290*4882a593Smuzhiyun * when there's no traffic at all.
1291*4882a593Smuzhiyun */
1292*4882a593Smuzhiyun if (low_latency)
1293*4882a593Smuzhiyun return MVM_LL_PERIOD;
1294*4882a593Smuzhiyun /*
1295*4882a593Smuzhiyun * Otherwise, we don't need to run the work struct because we're
1296*4882a593Smuzhiyun * in the default "idle" state - traffic indication is low (which
1297*4882a593Smuzhiyun * also covers the "no traffic" case) and low-latency is disabled
1298*4882a593Smuzhiyun * so there's no state that may need to be disabled when there's
1299*4882a593Smuzhiyun * no traffic at all.
1300*4882a593Smuzhiyun *
1301*4882a593Smuzhiyun * Note that this has no impact on the regular scheduling of the
1302*4882a593Smuzhiyun * updates triggered by traffic - those happen whenever one of the
1303*4882a593Smuzhiyun * two timeouts expire (if there's traffic at all.)
1304*4882a593Smuzhiyun */
1305*4882a593Smuzhiyun return 0;
1306*4882a593Smuzhiyun }
1307*4882a593Smuzhiyun
iwl_mvm_recalc_tcm(struct iwl_mvm * mvm)1308*4882a593Smuzhiyun void iwl_mvm_recalc_tcm(struct iwl_mvm *mvm)
1309*4882a593Smuzhiyun {
1310*4882a593Smuzhiyun unsigned long ts = jiffies;
1311*4882a593Smuzhiyun bool handle_uapsd =
1312*4882a593Smuzhiyun time_after(ts, mvm->tcm.uapsd_nonagg_ts +
1313*4882a593Smuzhiyun msecs_to_jiffies(IWL_MVM_UAPSD_NONAGG_PERIOD));
1314*4882a593Smuzhiyun
1315*4882a593Smuzhiyun spin_lock(&mvm->tcm.lock);
1316*4882a593Smuzhiyun if (mvm->tcm.paused || !time_after(ts, mvm->tcm.ts + MVM_TCM_PERIOD)) {
1317*4882a593Smuzhiyun spin_unlock(&mvm->tcm.lock);
1318*4882a593Smuzhiyun return;
1319*4882a593Smuzhiyun }
1320*4882a593Smuzhiyun spin_unlock(&mvm->tcm.lock);
1321*4882a593Smuzhiyun
1322*4882a593Smuzhiyun if (handle_uapsd && iwl_mvm_has_new_rx_api(mvm)) {
1323*4882a593Smuzhiyun mutex_lock(&mvm->mutex);
1324*4882a593Smuzhiyun if (iwl_mvm_request_statistics(mvm, true))
1325*4882a593Smuzhiyun handle_uapsd = false;
1326*4882a593Smuzhiyun mutex_unlock(&mvm->mutex);
1327*4882a593Smuzhiyun }
1328*4882a593Smuzhiyun
1329*4882a593Smuzhiyun spin_lock(&mvm->tcm.lock);
1330*4882a593Smuzhiyun /* re-check if somebody else won the recheck race */
1331*4882a593Smuzhiyun if (!mvm->tcm.paused && time_after(ts, mvm->tcm.ts + MVM_TCM_PERIOD)) {
1332*4882a593Smuzhiyun /* calculate statistics */
1333*4882a593Smuzhiyun unsigned long work_delay = iwl_mvm_calc_tcm_stats(mvm, ts,
1334*4882a593Smuzhiyun handle_uapsd);
1335*4882a593Smuzhiyun
1336*4882a593Smuzhiyun /* the memset needs to be visible before the timestamp */
1337*4882a593Smuzhiyun smp_mb();
1338*4882a593Smuzhiyun mvm->tcm.ts = ts;
1339*4882a593Smuzhiyun if (work_delay)
1340*4882a593Smuzhiyun schedule_delayed_work(&mvm->tcm.work, work_delay);
1341*4882a593Smuzhiyun }
1342*4882a593Smuzhiyun spin_unlock(&mvm->tcm.lock);
1343*4882a593Smuzhiyun
1344*4882a593Smuzhiyun iwl_mvm_tcm_results(mvm);
1345*4882a593Smuzhiyun }
1346*4882a593Smuzhiyun
iwl_mvm_tcm_work(struct work_struct * work)1347*4882a593Smuzhiyun void iwl_mvm_tcm_work(struct work_struct *work)
1348*4882a593Smuzhiyun {
1349*4882a593Smuzhiyun struct delayed_work *delayed_work = to_delayed_work(work);
1350*4882a593Smuzhiyun struct iwl_mvm *mvm = container_of(delayed_work, struct iwl_mvm,
1351*4882a593Smuzhiyun tcm.work);
1352*4882a593Smuzhiyun
1353*4882a593Smuzhiyun iwl_mvm_recalc_tcm(mvm);
1354*4882a593Smuzhiyun }
1355*4882a593Smuzhiyun
iwl_mvm_pause_tcm(struct iwl_mvm * mvm,bool with_cancel)1356*4882a593Smuzhiyun void iwl_mvm_pause_tcm(struct iwl_mvm *mvm, bool with_cancel)
1357*4882a593Smuzhiyun {
1358*4882a593Smuzhiyun spin_lock_bh(&mvm->tcm.lock);
1359*4882a593Smuzhiyun mvm->tcm.paused = true;
1360*4882a593Smuzhiyun spin_unlock_bh(&mvm->tcm.lock);
1361*4882a593Smuzhiyun if (with_cancel)
1362*4882a593Smuzhiyun cancel_delayed_work_sync(&mvm->tcm.work);
1363*4882a593Smuzhiyun }
1364*4882a593Smuzhiyun
iwl_mvm_resume_tcm(struct iwl_mvm * mvm)1365*4882a593Smuzhiyun void iwl_mvm_resume_tcm(struct iwl_mvm *mvm)
1366*4882a593Smuzhiyun {
1367*4882a593Smuzhiyun int mac;
1368*4882a593Smuzhiyun bool low_latency = false;
1369*4882a593Smuzhiyun
1370*4882a593Smuzhiyun spin_lock_bh(&mvm->tcm.lock);
1371*4882a593Smuzhiyun mvm->tcm.ts = jiffies;
1372*4882a593Smuzhiyun mvm->tcm.ll_ts = jiffies;
1373*4882a593Smuzhiyun for (mac = 0; mac < NUM_MAC_INDEX_DRIVER; mac++) {
1374*4882a593Smuzhiyun struct iwl_mvm_tcm_mac *mdata = &mvm->tcm.data[mac];
1375*4882a593Smuzhiyun
1376*4882a593Smuzhiyun memset(&mdata->rx.pkts, 0, sizeof(mdata->rx.pkts));
1377*4882a593Smuzhiyun memset(&mdata->tx.pkts, 0, sizeof(mdata->tx.pkts));
1378*4882a593Smuzhiyun memset(&mdata->rx.airtime, 0, sizeof(mdata->rx.airtime));
1379*4882a593Smuzhiyun memset(&mdata->tx.airtime, 0, sizeof(mdata->tx.airtime));
1380*4882a593Smuzhiyun
1381*4882a593Smuzhiyun if (mvm->tcm.result.low_latency[mac])
1382*4882a593Smuzhiyun low_latency = true;
1383*4882a593Smuzhiyun }
1384*4882a593Smuzhiyun /* The TCM data needs to be reset before "paused" flag changes */
1385*4882a593Smuzhiyun smp_mb();
1386*4882a593Smuzhiyun mvm->tcm.paused = false;
1387*4882a593Smuzhiyun
1388*4882a593Smuzhiyun /*
1389*4882a593Smuzhiyun * if the current load is not low or low latency is active, force
1390*4882a593Smuzhiyun * re-evaluation to cover the case of no traffic.
1391*4882a593Smuzhiyun */
1392*4882a593Smuzhiyun if (mvm->tcm.result.global_load > IWL_MVM_TRAFFIC_LOW)
1393*4882a593Smuzhiyun schedule_delayed_work(&mvm->tcm.work, MVM_TCM_PERIOD);
1394*4882a593Smuzhiyun else if (low_latency)
1395*4882a593Smuzhiyun schedule_delayed_work(&mvm->tcm.work, MVM_LL_PERIOD);
1396*4882a593Smuzhiyun
1397*4882a593Smuzhiyun spin_unlock_bh(&mvm->tcm.lock);
1398*4882a593Smuzhiyun }
1399*4882a593Smuzhiyun
iwl_mvm_tcm_add_vif(struct iwl_mvm * mvm,struct ieee80211_vif * vif)1400*4882a593Smuzhiyun void iwl_mvm_tcm_add_vif(struct iwl_mvm *mvm, struct ieee80211_vif *vif)
1401*4882a593Smuzhiyun {
1402*4882a593Smuzhiyun struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif);
1403*4882a593Smuzhiyun
1404*4882a593Smuzhiyun INIT_DELAYED_WORK(&mvmvif->uapsd_nonagg_detected_wk,
1405*4882a593Smuzhiyun iwl_mvm_tcm_uapsd_nonagg_detected_wk);
1406*4882a593Smuzhiyun }
1407*4882a593Smuzhiyun
iwl_mvm_tcm_rm_vif(struct iwl_mvm * mvm,struct ieee80211_vif * vif)1408*4882a593Smuzhiyun void iwl_mvm_tcm_rm_vif(struct iwl_mvm *mvm, struct ieee80211_vif *vif)
1409*4882a593Smuzhiyun {
1410*4882a593Smuzhiyun struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif);
1411*4882a593Smuzhiyun
1412*4882a593Smuzhiyun cancel_delayed_work_sync(&mvmvif->uapsd_nonagg_detected_wk);
1413*4882a593Smuzhiyun }
1414*4882a593Smuzhiyun
iwl_mvm_get_systime(struct iwl_mvm * mvm)1415*4882a593Smuzhiyun u32 iwl_mvm_get_systime(struct iwl_mvm *mvm)
1416*4882a593Smuzhiyun {
1417*4882a593Smuzhiyun u32 reg_addr = DEVICE_SYSTEM_TIME_REG;
1418*4882a593Smuzhiyun
1419*4882a593Smuzhiyun if (mvm->trans->trans_cfg->device_family >= IWL_DEVICE_FAMILY_22000 &&
1420*4882a593Smuzhiyun mvm->trans->cfg->gp2_reg_addr)
1421*4882a593Smuzhiyun reg_addr = mvm->trans->cfg->gp2_reg_addr;
1422*4882a593Smuzhiyun
1423*4882a593Smuzhiyun return iwl_read_prph(mvm->trans, reg_addr);
1424*4882a593Smuzhiyun }
1425*4882a593Smuzhiyun
iwl_mvm_get_sync_time(struct iwl_mvm * mvm,u32 * gp2,u64 * boottime)1426*4882a593Smuzhiyun void iwl_mvm_get_sync_time(struct iwl_mvm *mvm, u32 *gp2, u64 *boottime)
1427*4882a593Smuzhiyun {
1428*4882a593Smuzhiyun bool ps_disabled;
1429*4882a593Smuzhiyun
1430*4882a593Smuzhiyun lockdep_assert_held(&mvm->mutex);
1431*4882a593Smuzhiyun
1432*4882a593Smuzhiyun /* Disable power save when reading GP2 */
1433*4882a593Smuzhiyun ps_disabled = mvm->ps_disabled;
1434*4882a593Smuzhiyun if (!ps_disabled) {
1435*4882a593Smuzhiyun mvm->ps_disabled = true;
1436*4882a593Smuzhiyun iwl_mvm_power_update_device(mvm);
1437*4882a593Smuzhiyun }
1438*4882a593Smuzhiyun
1439*4882a593Smuzhiyun *gp2 = iwl_mvm_get_systime(mvm);
1440*4882a593Smuzhiyun *boottime = ktime_get_boottime_ns();
1441*4882a593Smuzhiyun
1442*4882a593Smuzhiyun if (!ps_disabled) {
1443*4882a593Smuzhiyun mvm->ps_disabled = ps_disabled;
1444*4882a593Smuzhiyun iwl_mvm_power_update_device(mvm);
1445*4882a593Smuzhiyun }
1446*4882a593Smuzhiyun }
1447