1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /****************************************************************************** 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Copyright(c) 2003 - 2014 Intel Corporation. All rights reserved. 5*4882a593Smuzhiyun * Copyright(c) 2015 Intel Mobile Communications GmbH 6*4882a593Smuzhiyun * Copyright(c) 2017 Intel Deutschland GmbH 7*4882a593Smuzhiyun * Copyright(c) 2018 - 2019 Intel Corporation 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * Contact Information: 10*4882a593Smuzhiyun * Intel Linux Wireless <linuxwifi@intel.com> 11*4882a593Smuzhiyun * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 12*4882a593Smuzhiyun * 13*4882a593Smuzhiyun *****************************************************************************/ 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun #ifndef __rs_h__ 16*4882a593Smuzhiyun #define __rs_h__ 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun #include <net/mac80211.h> 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun #include "iwl-config.h" 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun #include "fw-api.h" 23*4882a593Smuzhiyun #include "iwl-trans.h" 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun #define RS_NAME "iwl-mvm-rs" 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun struct iwl_rs_rate_info { 28*4882a593Smuzhiyun u8 plcp; /* uCode API: IWL_RATE_6M_PLCP, etc. */ 29*4882a593Smuzhiyun u8 plcp_ht_siso; /* uCode API: IWL_RATE_SISO_6M_PLCP, etc. */ 30*4882a593Smuzhiyun u8 plcp_ht_mimo2; /* uCode API: IWL_RATE_MIMO2_6M_PLCP, etc. */ 31*4882a593Smuzhiyun u8 plcp_vht_siso; 32*4882a593Smuzhiyun u8 plcp_vht_mimo2; 33*4882a593Smuzhiyun u8 prev_rs; /* previous rate used in rs algo */ 34*4882a593Smuzhiyun u8 next_rs; /* next rate used in rs algo */ 35*4882a593Smuzhiyun }; 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun #define IWL_RATE_60M_PLCP 3 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun enum { 40*4882a593Smuzhiyun IWL_RATE_INVM_INDEX = IWL_RATE_COUNT, 41*4882a593Smuzhiyun IWL_RATE_INVALID = IWL_RATE_COUNT, 42*4882a593Smuzhiyun }; 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun #define LINK_QUAL_MAX_RETRY_NUM 16 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun enum { 47*4882a593Smuzhiyun IWL_RATE_6M_INDEX_TABLE = 0, 48*4882a593Smuzhiyun IWL_RATE_9M_INDEX_TABLE, 49*4882a593Smuzhiyun IWL_RATE_12M_INDEX_TABLE, 50*4882a593Smuzhiyun IWL_RATE_18M_INDEX_TABLE, 51*4882a593Smuzhiyun IWL_RATE_24M_INDEX_TABLE, 52*4882a593Smuzhiyun IWL_RATE_36M_INDEX_TABLE, 53*4882a593Smuzhiyun IWL_RATE_48M_INDEX_TABLE, 54*4882a593Smuzhiyun IWL_RATE_54M_INDEX_TABLE, 55*4882a593Smuzhiyun IWL_RATE_1M_INDEX_TABLE, 56*4882a593Smuzhiyun IWL_RATE_2M_INDEX_TABLE, 57*4882a593Smuzhiyun IWL_RATE_5M_INDEX_TABLE, 58*4882a593Smuzhiyun IWL_RATE_11M_INDEX_TABLE, 59*4882a593Smuzhiyun IWL_RATE_INVM_INDEX_TABLE = IWL_RATE_INVM_INDEX - 1, 60*4882a593Smuzhiyun }; 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun /* #define vs. enum to keep from defaulting to 'large integer' */ 63*4882a593Smuzhiyun #define IWL_RATE_6M_MASK (1 << IWL_RATE_6M_INDEX) 64*4882a593Smuzhiyun #define IWL_RATE_9M_MASK (1 << IWL_RATE_9M_INDEX) 65*4882a593Smuzhiyun #define IWL_RATE_12M_MASK (1 << IWL_RATE_12M_INDEX) 66*4882a593Smuzhiyun #define IWL_RATE_18M_MASK (1 << IWL_RATE_18M_INDEX) 67*4882a593Smuzhiyun #define IWL_RATE_24M_MASK (1 << IWL_RATE_24M_INDEX) 68*4882a593Smuzhiyun #define IWL_RATE_36M_MASK (1 << IWL_RATE_36M_INDEX) 69*4882a593Smuzhiyun #define IWL_RATE_48M_MASK (1 << IWL_RATE_48M_INDEX) 70*4882a593Smuzhiyun #define IWL_RATE_54M_MASK (1 << IWL_RATE_54M_INDEX) 71*4882a593Smuzhiyun #define IWL_RATE_60M_MASK (1 << IWL_RATE_60M_INDEX) 72*4882a593Smuzhiyun #define IWL_RATE_1M_MASK (1 << IWL_RATE_1M_INDEX) 73*4882a593Smuzhiyun #define IWL_RATE_2M_MASK (1 << IWL_RATE_2M_INDEX) 74*4882a593Smuzhiyun #define IWL_RATE_5M_MASK (1 << IWL_RATE_5M_INDEX) 75*4882a593Smuzhiyun #define IWL_RATE_11M_MASK (1 << IWL_RATE_11M_INDEX) 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun 78*4882a593Smuzhiyun /* uCode API values for HT/VHT bit rates */ 79*4882a593Smuzhiyun enum { 80*4882a593Smuzhiyun IWL_RATE_HT_SISO_MCS_0_PLCP = 0, 81*4882a593Smuzhiyun IWL_RATE_HT_SISO_MCS_1_PLCP = 1, 82*4882a593Smuzhiyun IWL_RATE_HT_SISO_MCS_2_PLCP = 2, 83*4882a593Smuzhiyun IWL_RATE_HT_SISO_MCS_3_PLCP = 3, 84*4882a593Smuzhiyun IWL_RATE_HT_SISO_MCS_4_PLCP = 4, 85*4882a593Smuzhiyun IWL_RATE_HT_SISO_MCS_5_PLCP = 5, 86*4882a593Smuzhiyun IWL_RATE_HT_SISO_MCS_6_PLCP = 6, 87*4882a593Smuzhiyun IWL_RATE_HT_SISO_MCS_7_PLCP = 7, 88*4882a593Smuzhiyun IWL_RATE_HT_MIMO2_MCS_0_PLCP = 0x8, 89*4882a593Smuzhiyun IWL_RATE_HT_MIMO2_MCS_1_PLCP = 0x9, 90*4882a593Smuzhiyun IWL_RATE_HT_MIMO2_MCS_2_PLCP = 0xA, 91*4882a593Smuzhiyun IWL_RATE_HT_MIMO2_MCS_3_PLCP = 0xB, 92*4882a593Smuzhiyun IWL_RATE_HT_MIMO2_MCS_4_PLCP = 0xC, 93*4882a593Smuzhiyun IWL_RATE_HT_MIMO2_MCS_5_PLCP = 0xD, 94*4882a593Smuzhiyun IWL_RATE_HT_MIMO2_MCS_6_PLCP = 0xE, 95*4882a593Smuzhiyun IWL_RATE_HT_MIMO2_MCS_7_PLCP = 0xF, 96*4882a593Smuzhiyun IWL_RATE_VHT_SISO_MCS_0_PLCP = 0, 97*4882a593Smuzhiyun IWL_RATE_VHT_SISO_MCS_1_PLCP = 1, 98*4882a593Smuzhiyun IWL_RATE_VHT_SISO_MCS_2_PLCP = 2, 99*4882a593Smuzhiyun IWL_RATE_VHT_SISO_MCS_3_PLCP = 3, 100*4882a593Smuzhiyun IWL_RATE_VHT_SISO_MCS_4_PLCP = 4, 101*4882a593Smuzhiyun IWL_RATE_VHT_SISO_MCS_5_PLCP = 5, 102*4882a593Smuzhiyun IWL_RATE_VHT_SISO_MCS_6_PLCP = 6, 103*4882a593Smuzhiyun IWL_RATE_VHT_SISO_MCS_7_PLCP = 7, 104*4882a593Smuzhiyun IWL_RATE_VHT_SISO_MCS_8_PLCP = 8, 105*4882a593Smuzhiyun IWL_RATE_VHT_SISO_MCS_9_PLCP = 9, 106*4882a593Smuzhiyun IWL_RATE_VHT_MIMO2_MCS_0_PLCP = 0x10, 107*4882a593Smuzhiyun IWL_RATE_VHT_MIMO2_MCS_1_PLCP = 0x11, 108*4882a593Smuzhiyun IWL_RATE_VHT_MIMO2_MCS_2_PLCP = 0x12, 109*4882a593Smuzhiyun IWL_RATE_VHT_MIMO2_MCS_3_PLCP = 0x13, 110*4882a593Smuzhiyun IWL_RATE_VHT_MIMO2_MCS_4_PLCP = 0x14, 111*4882a593Smuzhiyun IWL_RATE_VHT_MIMO2_MCS_5_PLCP = 0x15, 112*4882a593Smuzhiyun IWL_RATE_VHT_MIMO2_MCS_6_PLCP = 0x16, 113*4882a593Smuzhiyun IWL_RATE_VHT_MIMO2_MCS_7_PLCP = 0x17, 114*4882a593Smuzhiyun IWL_RATE_VHT_MIMO2_MCS_8_PLCP = 0x18, 115*4882a593Smuzhiyun IWL_RATE_VHT_MIMO2_MCS_9_PLCP = 0x19, 116*4882a593Smuzhiyun IWL_RATE_HT_SISO_MCS_INV_PLCP, 117*4882a593Smuzhiyun IWL_RATE_HT_MIMO2_MCS_INV_PLCP = IWL_RATE_HT_SISO_MCS_INV_PLCP, 118*4882a593Smuzhiyun IWL_RATE_VHT_SISO_MCS_INV_PLCP = IWL_RATE_HT_SISO_MCS_INV_PLCP, 119*4882a593Smuzhiyun IWL_RATE_VHT_MIMO2_MCS_INV_PLCP = IWL_RATE_HT_SISO_MCS_INV_PLCP, 120*4882a593Smuzhiyun IWL_RATE_HT_SISO_MCS_8_PLCP = IWL_RATE_HT_SISO_MCS_INV_PLCP, 121*4882a593Smuzhiyun IWL_RATE_HT_SISO_MCS_9_PLCP = IWL_RATE_HT_SISO_MCS_INV_PLCP, 122*4882a593Smuzhiyun IWL_RATE_HT_MIMO2_MCS_8_PLCP = IWL_RATE_HT_SISO_MCS_INV_PLCP, 123*4882a593Smuzhiyun IWL_RATE_HT_MIMO2_MCS_9_PLCP = IWL_RATE_HT_SISO_MCS_INV_PLCP, 124*4882a593Smuzhiyun }; 125*4882a593Smuzhiyun 126*4882a593Smuzhiyun #define IWL_RATES_MASK ((1 << IWL_RATE_COUNT) - 1) 127*4882a593Smuzhiyun 128*4882a593Smuzhiyun #define IWL_INVALID_VALUE -1 129*4882a593Smuzhiyun 130*4882a593Smuzhiyun #define TPC_MAX_REDUCTION 15 131*4882a593Smuzhiyun #define TPC_NO_REDUCTION 0 132*4882a593Smuzhiyun #define TPC_INVALID 0xff 133*4882a593Smuzhiyun 134*4882a593Smuzhiyun #define LINK_QUAL_AGG_FRAME_LIMIT_DEF (63) 135*4882a593Smuzhiyun #define LINK_QUAL_AGG_FRAME_LIMIT_MAX (63) 136*4882a593Smuzhiyun /* 137*4882a593Smuzhiyun * FIXME - various places in firmware API still use u8, 138*4882a593Smuzhiyun * e.g. LQ command and SCD config command. 139*4882a593Smuzhiyun * This should be 256 instead. 140*4882a593Smuzhiyun */ 141*4882a593Smuzhiyun #define LINK_QUAL_AGG_FRAME_LIMIT_GEN2_DEF (255) 142*4882a593Smuzhiyun #define LINK_QUAL_AGG_FRAME_LIMIT_GEN2_MAX (255) 143*4882a593Smuzhiyun #define LINK_QUAL_AGG_FRAME_LIMIT_MIN (0) 144*4882a593Smuzhiyun 145*4882a593Smuzhiyun #define LQ_SIZE 2 /* 2 mode tables: "Active" and "Search" */ 146*4882a593Smuzhiyun 147*4882a593Smuzhiyun /* load per tid defines for A-MPDU activation */ 148*4882a593Smuzhiyun #define IWL_AGG_TPT_THREHOLD 0 149*4882a593Smuzhiyun #define IWL_AGG_ALL_TID 0xff 150*4882a593Smuzhiyun 151*4882a593Smuzhiyun enum iwl_table_type { 152*4882a593Smuzhiyun LQ_NONE, 153*4882a593Smuzhiyun LQ_LEGACY_G, /* legacy types */ 154*4882a593Smuzhiyun LQ_LEGACY_A, 155*4882a593Smuzhiyun LQ_HT_SISO, /* HT types */ 156*4882a593Smuzhiyun LQ_HT_MIMO2, 157*4882a593Smuzhiyun LQ_VHT_SISO, /* VHT types */ 158*4882a593Smuzhiyun LQ_VHT_MIMO2, 159*4882a593Smuzhiyun LQ_HE_SISO, /* HE types */ 160*4882a593Smuzhiyun LQ_HE_MIMO2, 161*4882a593Smuzhiyun LQ_MAX, 162*4882a593Smuzhiyun }; 163*4882a593Smuzhiyun 164*4882a593Smuzhiyun struct rs_rate { 165*4882a593Smuzhiyun int index; 166*4882a593Smuzhiyun enum iwl_table_type type; 167*4882a593Smuzhiyun u8 ant; 168*4882a593Smuzhiyun u32 bw; 169*4882a593Smuzhiyun bool sgi; 170*4882a593Smuzhiyun bool ldpc; 171*4882a593Smuzhiyun bool stbc; 172*4882a593Smuzhiyun bool bfer; 173*4882a593Smuzhiyun }; 174*4882a593Smuzhiyun 175*4882a593Smuzhiyun 176*4882a593Smuzhiyun #define is_type_legacy(type) (((type) == LQ_LEGACY_G) || \ 177*4882a593Smuzhiyun ((type) == LQ_LEGACY_A)) 178*4882a593Smuzhiyun #define is_type_ht_siso(type) ((type) == LQ_HT_SISO) 179*4882a593Smuzhiyun #define is_type_ht_mimo2(type) ((type) == LQ_HT_MIMO2) 180*4882a593Smuzhiyun #define is_type_vht_siso(type) ((type) == LQ_VHT_SISO) 181*4882a593Smuzhiyun #define is_type_vht_mimo2(type) ((type) == LQ_VHT_MIMO2) 182*4882a593Smuzhiyun #define is_type_he_siso(type) ((type) == LQ_HE_SISO) 183*4882a593Smuzhiyun #define is_type_he_mimo2(type) ((type) == LQ_HE_MIMO2) 184*4882a593Smuzhiyun #define is_type_siso(type) (is_type_ht_siso(type) || is_type_vht_siso(type) || \ 185*4882a593Smuzhiyun is_type_he_siso(type)) 186*4882a593Smuzhiyun #define is_type_mimo2(type) (is_type_ht_mimo2(type) || \ 187*4882a593Smuzhiyun is_type_vht_mimo2(type) || is_type_he_mimo2(type)) 188*4882a593Smuzhiyun #define is_type_mimo(type) (is_type_mimo2(type)) 189*4882a593Smuzhiyun #define is_type_ht(type) (is_type_ht_siso(type) || is_type_ht_mimo2(type)) 190*4882a593Smuzhiyun #define is_type_vht(type) (is_type_vht_siso(type) || is_type_vht_mimo2(type)) 191*4882a593Smuzhiyun #define is_type_he(type) (is_type_he_siso(type) || is_type_he_mimo2(type)) 192*4882a593Smuzhiyun #define is_type_a_band(type) ((type) == LQ_LEGACY_A) 193*4882a593Smuzhiyun #define is_type_g_band(type) ((type) == LQ_LEGACY_G) 194*4882a593Smuzhiyun 195*4882a593Smuzhiyun #define is_legacy(rate) is_type_legacy((rate)->type) 196*4882a593Smuzhiyun #define is_ht_siso(rate) is_type_ht_siso((rate)->type) 197*4882a593Smuzhiyun #define is_ht_mimo2(rate) is_type_ht_mimo2((rate)->type) 198*4882a593Smuzhiyun #define is_vht_siso(rate) is_type_vht_siso((rate)->type) 199*4882a593Smuzhiyun #define is_vht_mimo2(rate) is_type_vht_mimo2((rate)->type) 200*4882a593Smuzhiyun #define is_siso(rate) is_type_siso((rate)->type) 201*4882a593Smuzhiyun #define is_mimo2(rate) is_type_mimo2((rate)->type) 202*4882a593Smuzhiyun #define is_mimo(rate) is_type_mimo((rate)->type) 203*4882a593Smuzhiyun #define is_ht(rate) is_type_ht((rate)->type) 204*4882a593Smuzhiyun #define is_vht(rate) is_type_vht((rate)->type) 205*4882a593Smuzhiyun #define is_he(rate) is_type_he((rate)->type) 206*4882a593Smuzhiyun #define is_a_band(rate) is_type_a_band((rate)->type) 207*4882a593Smuzhiyun #define is_g_band(rate) is_type_g_band((rate)->type) 208*4882a593Smuzhiyun 209*4882a593Smuzhiyun #define is_ht20(rate) ((rate)->bw == RATE_MCS_CHAN_WIDTH_20) 210*4882a593Smuzhiyun #define is_ht40(rate) ((rate)->bw == RATE_MCS_CHAN_WIDTH_40) 211*4882a593Smuzhiyun #define is_ht80(rate) ((rate)->bw == RATE_MCS_CHAN_WIDTH_80) 212*4882a593Smuzhiyun #define is_ht160(rate) ((rate)->bw == RATE_MCS_CHAN_WIDTH_160) 213*4882a593Smuzhiyun 214*4882a593Smuzhiyun #define IWL_MAX_MCS_DISPLAY_SIZE 12 215*4882a593Smuzhiyun 216*4882a593Smuzhiyun struct iwl_rate_mcs_info { 217*4882a593Smuzhiyun char mbps[IWL_MAX_MCS_DISPLAY_SIZE]; 218*4882a593Smuzhiyun char mcs[IWL_MAX_MCS_DISPLAY_SIZE]; 219*4882a593Smuzhiyun }; 220*4882a593Smuzhiyun 221*4882a593Smuzhiyun /** 222*4882a593Smuzhiyun * struct iwl_lq_sta_rs_fw - rate and related statistics for RS in FW 223*4882a593Smuzhiyun * @last_rate_n_flags: last rate reported by FW 224*4882a593Smuzhiyun * @sta_id: the id of the station 225*4882a593Smuzhiyun #ifdef CONFIG_MAC80211_DEBUGFS 226*4882a593Smuzhiyun * @dbg_fixed_rate: for debug, use fixed rate if not 0 227*4882a593Smuzhiyun * @dbg_agg_frame_count_lim: for debug, max number of frames in A-MPDU 228*4882a593Smuzhiyun #endif 229*4882a593Smuzhiyun * @chains: bitmask of chains reported in %chain_signal 230*4882a593Smuzhiyun * @chain_signal: per chain signal strength 231*4882a593Smuzhiyun * @last_rssi: last rssi reported 232*4882a593Smuzhiyun * @drv: pointer back to the driver data 233*4882a593Smuzhiyun */ 234*4882a593Smuzhiyun 235*4882a593Smuzhiyun struct iwl_lq_sta_rs_fw { 236*4882a593Smuzhiyun /* last tx rate_n_flags */ 237*4882a593Smuzhiyun u32 last_rate_n_flags; 238*4882a593Smuzhiyun 239*4882a593Smuzhiyun /* persistent fields - initialized only once - keep last! */ 240*4882a593Smuzhiyun struct lq_sta_pers_rs_fw { 241*4882a593Smuzhiyun u32 sta_id; 242*4882a593Smuzhiyun #ifdef CONFIG_MAC80211_DEBUGFS 243*4882a593Smuzhiyun u32 dbg_fixed_rate; 244*4882a593Smuzhiyun u16 dbg_agg_frame_count_lim; 245*4882a593Smuzhiyun #endif 246*4882a593Smuzhiyun u8 chains; 247*4882a593Smuzhiyun s8 chain_signal[IEEE80211_MAX_CHAINS]; 248*4882a593Smuzhiyun s8 last_rssi; 249*4882a593Smuzhiyun struct iwl_mvm *drv; 250*4882a593Smuzhiyun } pers; 251*4882a593Smuzhiyun }; 252*4882a593Smuzhiyun 253*4882a593Smuzhiyun /** 254*4882a593Smuzhiyun * struct iwl_rate_scale_data -- tx success history for one rate 255*4882a593Smuzhiyun */ 256*4882a593Smuzhiyun struct iwl_rate_scale_data { 257*4882a593Smuzhiyun u64 data; /* bitmap of successful frames */ 258*4882a593Smuzhiyun s32 success_counter; /* number of frames successful */ 259*4882a593Smuzhiyun s32 success_ratio; /* per-cent * 128 */ 260*4882a593Smuzhiyun s32 counter; /* number of frames attempted */ 261*4882a593Smuzhiyun s32 average_tpt; /* success ratio * expected throughput */ 262*4882a593Smuzhiyun }; 263*4882a593Smuzhiyun 264*4882a593Smuzhiyun /* Possible Tx columns 265*4882a593Smuzhiyun * Tx Column = a combo of legacy/siso/mimo x antenna x SGI 266*4882a593Smuzhiyun */ 267*4882a593Smuzhiyun enum rs_column { 268*4882a593Smuzhiyun RS_COLUMN_LEGACY_ANT_A = 0, 269*4882a593Smuzhiyun RS_COLUMN_LEGACY_ANT_B, 270*4882a593Smuzhiyun RS_COLUMN_SISO_ANT_A, 271*4882a593Smuzhiyun RS_COLUMN_SISO_ANT_B, 272*4882a593Smuzhiyun RS_COLUMN_SISO_ANT_A_SGI, 273*4882a593Smuzhiyun RS_COLUMN_SISO_ANT_B_SGI, 274*4882a593Smuzhiyun RS_COLUMN_MIMO2, 275*4882a593Smuzhiyun RS_COLUMN_MIMO2_SGI, 276*4882a593Smuzhiyun 277*4882a593Smuzhiyun RS_COLUMN_LAST = RS_COLUMN_MIMO2_SGI, 278*4882a593Smuzhiyun RS_COLUMN_COUNT = RS_COLUMN_LAST + 1, 279*4882a593Smuzhiyun RS_COLUMN_INVALID, 280*4882a593Smuzhiyun }; 281*4882a593Smuzhiyun 282*4882a593Smuzhiyun enum rs_ss_force_opt { 283*4882a593Smuzhiyun RS_SS_FORCE_NONE = 0, 284*4882a593Smuzhiyun RS_SS_FORCE_STBC, 285*4882a593Smuzhiyun RS_SS_FORCE_BFER, 286*4882a593Smuzhiyun RS_SS_FORCE_SISO, 287*4882a593Smuzhiyun }; 288*4882a593Smuzhiyun 289*4882a593Smuzhiyun /* Packet stats per rate */ 290*4882a593Smuzhiyun struct rs_rate_stats { 291*4882a593Smuzhiyun u64 success; 292*4882a593Smuzhiyun u64 total; 293*4882a593Smuzhiyun }; 294*4882a593Smuzhiyun 295*4882a593Smuzhiyun /** 296*4882a593Smuzhiyun * struct iwl_scale_tbl_info -- tx params and success history for all rates 297*4882a593Smuzhiyun * 298*4882a593Smuzhiyun * There are two of these in struct iwl_lq_sta, 299*4882a593Smuzhiyun * one for "active", and one for "search". 300*4882a593Smuzhiyun */ 301*4882a593Smuzhiyun struct iwl_scale_tbl_info { 302*4882a593Smuzhiyun struct rs_rate rate; 303*4882a593Smuzhiyun enum rs_column column; 304*4882a593Smuzhiyun const u16 *expected_tpt; /* throughput metrics; expected_tpt_G, etc. */ 305*4882a593Smuzhiyun struct iwl_rate_scale_data win[IWL_RATE_COUNT]; /* rate histories */ 306*4882a593Smuzhiyun /* per txpower-reduction history */ 307*4882a593Smuzhiyun struct iwl_rate_scale_data tpc_win[TPC_MAX_REDUCTION + 1]; 308*4882a593Smuzhiyun }; 309*4882a593Smuzhiyun 310*4882a593Smuzhiyun enum { 311*4882a593Smuzhiyun RS_STATE_SEARCH_CYCLE_STARTED, 312*4882a593Smuzhiyun RS_STATE_SEARCH_CYCLE_ENDED, 313*4882a593Smuzhiyun RS_STATE_STAY_IN_COLUMN, 314*4882a593Smuzhiyun }; 315*4882a593Smuzhiyun 316*4882a593Smuzhiyun /** 317*4882a593Smuzhiyun * struct iwl_lq_sta -- driver's rate scaling private structure 318*4882a593Smuzhiyun * 319*4882a593Smuzhiyun * Pointer to this gets passed back and forth between driver and mac80211. 320*4882a593Smuzhiyun */ 321*4882a593Smuzhiyun struct iwl_lq_sta { 322*4882a593Smuzhiyun u8 active_tbl; /* index of active table, range 0-1 */ 323*4882a593Smuzhiyun u8 rs_state; /* RS_STATE_* */ 324*4882a593Smuzhiyun u8 search_better_tbl; /* 1: currently trying alternate mode */ 325*4882a593Smuzhiyun s32 last_tpt; 326*4882a593Smuzhiyun 327*4882a593Smuzhiyun /* The following determine when to search for a new mode */ 328*4882a593Smuzhiyun u32 table_count_limit; 329*4882a593Smuzhiyun u32 max_failure_limit; /* # failed frames before new search */ 330*4882a593Smuzhiyun u32 max_success_limit; /* # successful frames before new search */ 331*4882a593Smuzhiyun u32 table_count; 332*4882a593Smuzhiyun u32 total_failed; /* total failed frames, any/all rates */ 333*4882a593Smuzhiyun u32 total_success; /* total successful frames, any/all rates */ 334*4882a593Smuzhiyun u64 flush_timer; /* time staying in mode before new search */ 335*4882a593Smuzhiyun 336*4882a593Smuzhiyun u32 visited_columns; /* Bitmask marking which Tx columns were 337*4882a593Smuzhiyun * explored during a search cycle 338*4882a593Smuzhiyun */ 339*4882a593Smuzhiyun u64 last_tx; 340*4882a593Smuzhiyun bool is_vht; 341*4882a593Smuzhiyun bool ldpc; /* LDPC Rx is supported by the STA */ 342*4882a593Smuzhiyun bool stbc_capable; /* Tx STBC is supported by chip and Rx by STA */ 343*4882a593Smuzhiyun bool bfer_capable; /* Remote supports beamformee and we BFer */ 344*4882a593Smuzhiyun 345*4882a593Smuzhiyun enum nl80211_band band; 346*4882a593Smuzhiyun 347*4882a593Smuzhiyun /* The following are bitmaps of rates; IWL_RATE_6M_MASK, etc. */ 348*4882a593Smuzhiyun unsigned long active_legacy_rate; 349*4882a593Smuzhiyun unsigned long active_siso_rate; 350*4882a593Smuzhiyun unsigned long active_mimo2_rate; 351*4882a593Smuzhiyun 352*4882a593Smuzhiyun /* Highest rate per Tx mode */ 353*4882a593Smuzhiyun u8 max_legacy_rate_idx; 354*4882a593Smuzhiyun u8 max_siso_rate_idx; 355*4882a593Smuzhiyun u8 max_mimo2_rate_idx; 356*4882a593Smuzhiyun 357*4882a593Smuzhiyun /* Optimal rate based on RSSI and STA caps. 358*4882a593Smuzhiyun * Used only to reflect link speed to userspace. 359*4882a593Smuzhiyun */ 360*4882a593Smuzhiyun struct rs_rate optimal_rate; 361*4882a593Smuzhiyun unsigned long optimal_rate_mask; 362*4882a593Smuzhiyun const struct rs_init_rate_info *optimal_rates; 363*4882a593Smuzhiyun int optimal_nentries; 364*4882a593Smuzhiyun 365*4882a593Smuzhiyun u8 missed_rate_counter; 366*4882a593Smuzhiyun 367*4882a593Smuzhiyun struct iwl_lq_cmd lq; 368*4882a593Smuzhiyun struct iwl_scale_tbl_info lq_info[LQ_SIZE]; /* "active", "search" */ 369*4882a593Smuzhiyun u8 tx_agg_tid_en; 370*4882a593Smuzhiyun 371*4882a593Smuzhiyun /* last tx rate_n_flags */ 372*4882a593Smuzhiyun u32 last_rate_n_flags; 373*4882a593Smuzhiyun /* packets destined for this STA are aggregated */ 374*4882a593Smuzhiyun u8 is_agg; 375*4882a593Smuzhiyun 376*4882a593Smuzhiyun /* tx power reduce for this sta */ 377*4882a593Smuzhiyun int tpc_reduce; 378*4882a593Smuzhiyun 379*4882a593Smuzhiyun /* persistent fields - initialized only once - keep last! */ 380*4882a593Smuzhiyun struct lq_sta_pers { 381*4882a593Smuzhiyun #ifdef CONFIG_MAC80211_DEBUGFS 382*4882a593Smuzhiyun u32 dbg_fixed_rate; 383*4882a593Smuzhiyun u8 dbg_fixed_txp_reduction; 384*4882a593Smuzhiyun 385*4882a593Smuzhiyun /* force STBC/BFER/SISO for testing */ 386*4882a593Smuzhiyun enum rs_ss_force_opt ss_force; 387*4882a593Smuzhiyun #endif 388*4882a593Smuzhiyun u8 chains; 389*4882a593Smuzhiyun s8 chain_signal[IEEE80211_MAX_CHAINS]; 390*4882a593Smuzhiyun s8 last_rssi; 391*4882a593Smuzhiyun struct rs_rate_stats tx_stats[RS_COLUMN_COUNT][IWL_RATE_COUNT]; 392*4882a593Smuzhiyun struct iwl_mvm *drv; 393*4882a593Smuzhiyun spinlock_t lock; /* for races in reinit/update table */ 394*4882a593Smuzhiyun } pers; 395*4882a593Smuzhiyun }; 396*4882a593Smuzhiyun 397*4882a593Smuzhiyun /* ieee80211_tx_info's status_driver_data[0] is packed with lq color and txp 398*4882a593Smuzhiyun * Note, it's iwlmvm <-> mac80211 interface. 399*4882a593Smuzhiyun * bits 0-7: reduced tx power 400*4882a593Smuzhiyun * bits 8-10: LQ command's color 401*4882a593Smuzhiyun */ 402*4882a593Smuzhiyun #define RS_DRV_DATA_TXP_MSK 0xff 403*4882a593Smuzhiyun #define RS_DRV_DATA_LQ_COLOR_POS 8 404*4882a593Smuzhiyun #define RS_DRV_DATA_LQ_COLOR_MSK (7 << RS_DRV_DATA_LQ_COLOR_POS) 405*4882a593Smuzhiyun #define RS_DRV_DATA_LQ_COLOR_GET(_f) (((_f) & RS_DRV_DATA_LQ_COLOR_MSK) >>\ 406*4882a593Smuzhiyun RS_DRV_DATA_LQ_COLOR_POS) 407*4882a593Smuzhiyun #define RS_DRV_DATA_PACK(_c, _p) ((void *)(uintptr_t)\ 408*4882a593Smuzhiyun (((uintptr_t)_p) |\ 409*4882a593Smuzhiyun ((_c) << RS_DRV_DATA_LQ_COLOR_POS))) 410*4882a593Smuzhiyun 411*4882a593Smuzhiyun /* Initialize station's rate scaling information after adding station */ 412*4882a593Smuzhiyun void iwl_mvm_rs_rate_init(struct iwl_mvm *mvm, struct ieee80211_sta *sta, 413*4882a593Smuzhiyun enum nl80211_band band, bool init); 414*4882a593Smuzhiyun 415*4882a593Smuzhiyun /* Notify RS about Tx status */ 416*4882a593Smuzhiyun void iwl_mvm_rs_tx_status(struct iwl_mvm *mvm, struct ieee80211_sta *sta, 417*4882a593Smuzhiyun int tid, struct ieee80211_tx_info *info, bool ndp); 418*4882a593Smuzhiyun 419*4882a593Smuzhiyun /** 420*4882a593Smuzhiyun * iwl_rate_control_register - Register the rate control algorithm callbacks 421*4882a593Smuzhiyun * 422*4882a593Smuzhiyun * Since the rate control algorithm is hardware specific, there is no need 423*4882a593Smuzhiyun * or reason to place it as a stand alone module. The driver can call 424*4882a593Smuzhiyun * iwl_rate_control_register in order to register the rate control callbacks 425*4882a593Smuzhiyun * with the mac80211 subsystem. This should be performed prior to calling 426*4882a593Smuzhiyun * ieee80211_register_hw 427*4882a593Smuzhiyun * 428*4882a593Smuzhiyun */ 429*4882a593Smuzhiyun int iwl_mvm_rate_control_register(void); 430*4882a593Smuzhiyun 431*4882a593Smuzhiyun /** 432*4882a593Smuzhiyun * iwl_rate_control_unregister - Unregister the rate control callbacks 433*4882a593Smuzhiyun * 434*4882a593Smuzhiyun * This should be called after calling ieee80211_unregister_hw, but before 435*4882a593Smuzhiyun * the driver is unloaded. 436*4882a593Smuzhiyun */ 437*4882a593Smuzhiyun void iwl_mvm_rate_control_unregister(void); 438*4882a593Smuzhiyun 439*4882a593Smuzhiyun struct iwl_mvm_sta; 440*4882a593Smuzhiyun 441*4882a593Smuzhiyun int iwl_mvm_tx_protection(struct iwl_mvm *mvm, struct iwl_mvm_sta *mvmsta, 442*4882a593Smuzhiyun bool enable); 443*4882a593Smuzhiyun 444*4882a593Smuzhiyun #ifdef CONFIG_IWLWIFI_DEBUGFS 445*4882a593Smuzhiyun void iwl_mvm_reset_frame_stats(struct iwl_mvm *mvm); 446*4882a593Smuzhiyun #endif 447*4882a593Smuzhiyun 448*4882a593Smuzhiyun void iwl_mvm_rs_add_sta(struct iwl_mvm *mvm, struct iwl_mvm_sta *mvmsta); 449*4882a593Smuzhiyun void rs_fw_rate_init(struct iwl_mvm *mvm, struct ieee80211_sta *sta, 450*4882a593Smuzhiyun enum nl80211_band band, bool update); 451*4882a593Smuzhiyun int rs_fw_tx_protection(struct iwl_mvm *mvm, struct iwl_mvm_sta *mvmsta, 452*4882a593Smuzhiyun bool enable); 453*4882a593Smuzhiyun void iwl_mvm_tlc_update_notif(struct iwl_mvm *mvm, 454*4882a593Smuzhiyun struct iwl_rx_cmd_buffer *rxb); 455*4882a593Smuzhiyun 456*4882a593Smuzhiyun u16 rs_fw_get_max_amsdu_len(struct ieee80211_sta *sta); 457*4882a593Smuzhiyun #endif /* __rs__ */ 458