1*4882a593Smuzhiyun // SPDX-License-Identifier: ISC
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (c) 2013 Broadcom Corporation
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun /*********************channel spec common functions*********************/
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #include <linux/module.h>
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun #include <brcmu_utils.h>
10*4882a593Smuzhiyun #include <brcmu_wifi.h>
11*4882a593Smuzhiyun #include <brcmu_d11.h>
12*4882a593Smuzhiyun
d11n_sb(enum brcmu_chan_sb sb)13*4882a593Smuzhiyun static u16 d11n_sb(enum brcmu_chan_sb sb)
14*4882a593Smuzhiyun {
15*4882a593Smuzhiyun switch (sb) {
16*4882a593Smuzhiyun case BRCMU_CHAN_SB_NONE:
17*4882a593Smuzhiyun return BRCMU_CHSPEC_D11N_SB_N;
18*4882a593Smuzhiyun case BRCMU_CHAN_SB_L:
19*4882a593Smuzhiyun return BRCMU_CHSPEC_D11N_SB_L;
20*4882a593Smuzhiyun case BRCMU_CHAN_SB_U:
21*4882a593Smuzhiyun return BRCMU_CHSPEC_D11N_SB_U;
22*4882a593Smuzhiyun default:
23*4882a593Smuzhiyun WARN_ON(1);
24*4882a593Smuzhiyun }
25*4882a593Smuzhiyun return 0;
26*4882a593Smuzhiyun }
27*4882a593Smuzhiyun
d11n_bw(enum brcmu_chan_bw bw)28*4882a593Smuzhiyun static u16 d11n_bw(enum brcmu_chan_bw bw)
29*4882a593Smuzhiyun {
30*4882a593Smuzhiyun switch (bw) {
31*4882a593Smuzhiyun case BRCMU_CHAN_BW_20:
32*4882a593Smuzhiyun return BRCMU_CHSPEC_D11N_BW_20;
33*4882a593Smuzhiyun case BRCMU_CHAN_BW_40:
34*4882a593Smuzhiyun return BRCMU_CHSPEC_D11N_BW_40;
35*4882a593Smuzhiyun default:
36*4882a593Smuzhiyun WARN_ON(1);
37*4882a593Smuzhiyun }
38*4882a593Smuzhiyun return 0;
39*4882a593Smuzhiyun }
40*4882a593Smuzhiyun
brcmu_d11n_encchspec(struct brcmu_chan * ch)41*4882a593Smuzhiyun static void brcmu_d11n_encchspec(struct brcmu_chan *ch)
42*4882a593Smuzhiyun {
43*4882a593Smuzhiyun if (ch->bw == BRCMU_CHAN_BW_20)
44*4882a593Smuzhiyun ch->sb = BRCMU_CHAN_SB_NONE;
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun ch->chspec = 0;
47*4882a593Smuzhiyun brcmu_maskset16(&ch->chspec, BRCMU_CHSPEC_CH_MASK,
48*4882a593Smuzhiyun BRCMU_CHSPEC_CH_SHIFT, ch->chnum);
49*4882a593Smuzhiyun brcmu_maskset16(&ch->chspec, BRCMU_CHSPEC_D11N_SB_MASK,
50*4882a593Smuzhiyun 0, d11n_sb(ch->sb));
51*4882a593Smuzhiyun brcmu_maskset16(&ch->chspec, BRCMU_CHSPEC_D11N_BW_MASK,
52*4882a593Smuzhiyun 0, d11n_bw(ch->bw));
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun if (ch->chnum <= CH_MAX_2G_CHANNEL)
55*4882a593Smuzhiyun ch->chspec |= BRCMU_CHSPEC_D11N_BND_2G;
56*4882a593Smuzhiyun else
57*4882a593Smuzhiyun ch->chspec |= BRCMU_CHSPEC_D11N_BND_5G;
58*4882a593Smuzhiyun }
59*4882a593Smuzhiyun
d11ac_bw(enum brcmu_chan_bw bw)60*4882a593Smuzhiyun static u16 d11ac_bw(enum brcmu_chan_bw bw)
61*4882a593Smuzhiyun {
62*4882a593Smuzhiyun switch (bw) {
63*4882a593Smuzhiyun case BRCMU_CHAN_BW_20:
64*4882a593Smuzhiyun return BRCMU_CHSPEC_D11AC_BW_20;
65*4882a593Smuzhiyun case BRCMU_CHAN_BW_40:
66*4882a593Smuzhiyun return BRCMU_CHSPEC_D11AC_BW_40;
67*4882a593Smuzhiyun case BRCMU_CHAN_BW_80:
68*4882a593Smuzhiyun return BRCMU_CHSPEC_D11AC_BW_80;
69*4882a593Smuzhiyun case BRCMU_CHAN_BW_160:
70*4882a593Smuzhiyun return BRCMU_CHSPEC_D11AC_BW_160;
71*4882a593Smuzhiyun default:
72*4882a593Smuzhiyun WARN_ON(1);
73*4882a593Smuzhiyun }
74*4882a593Smuzhiyun return 0;
75*4882a593Smuzhiyun }
76*4882a593Smuzhiyun
brcmu_d11ac_encchspec(struct brcmu_chan * ch)77*4882a593Smuzhiyun static void brcmu_d11ac_encchspec(struct brcmu_chan *ch)
78*4882a593Smuzhiyun {
79*4882a593Smuzhiyun if (ch->bw == BRCMU_CHAN_BW_20 || ch->sb == BRCMU_CHAN_SB_NONE)
80*4882a593Smuzhiyun ch->sb = BRCMU_CHAN_SB_L;
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun brcmu_maskset16(&ch->chspec, BRCMU_CHSPEC_CH_MASK,
83*4882a593Smuzhiyun BRCMU_CHSPEC_CH_SHIFT, ch->chnum);
84*4882a593Smuzhiyun brcmu_maskset16(&ch->chspec, BRCMU_CHSPEC_D11AC_SB_MASK,
85*4882a593Smuzhiyun BRCMU_CHSPEC_D11AC_SB_SHIFT, ch->sb);
86*4882a593Smuzhiyun brcmu_maskset16(&ch->chspec, BRCMU_CHSPEC_D11AC_BW_MASK,
87*4882a593Smuzhiyun 0, d11ac_bw(ch->bw));
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun ch->chspec &= ~BRCMU_CHSPEC_D11AC_BND_MASK;
90*4882a593Smuzhiyun if (ch->chnum <= CH_MAX_2G_CHANNEL)
91*4882a593Smuzhiyun ch->chspec |= BRCMU_CHSPEC_D11AC_BND_2G;
92*4882a593Smuzhiyun else
93*4882a593Smuzhiyun ch->chspec |= BRCMU_CHSPEC_D11AC_BND_5G;
94*4882a593Smuzhiyun }
95*4882a593Smuzhiyun
brcmu_d11n_decchspec(struct brcmu_chan * ch)96*4882a593Smuzhiyun static void brcmu_d11n_decchspec(struct brcmu_chan *ch)
97*4882a593Smuzhiyun {
98*4882a593Smuzhiyun u16 val;
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun ch->chnum = (u8)(ch->chspec & BRCMU_CHSPEC_CH_MASK);
101*4882a593Smuzhiyun ch->control_ch_num = ch->chnum;
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun switch (ch->chspec & BRCMU_CHSPEC_D11N_BW_MASK) {
104*4882a593Smuzhiyun case BRCMU_CHSPEC_D11N_BW_20:
105*4882a593Smuzhiyun ch->bw = BRCMU_CHAN_BW_20;
106*4882a593Smuzhiyun ch->sb = BRCMU_CHAN_SB_NONE;
107*4882a593Smuzhiyun break;
108*4882a593Smuzhiyun case BRCMU_CHSPEC_D11N_BW_40:
109*4882a593Smuzhiyun ch->bw = BRCMU_CHAN_BW_40;
110*4882a593Smuzhiyun val = ch->chspec & BRCMU_CHSPEC_D11N_SB_MASK;
111*4882a593Smuzhiyun if (val == BRCMU_CHSPEC_D11N_SB_L) {
112*4882a593Smuzhiyun ch->sb = BRCMU_CHAN_SB_L;
113*4882a593Smuzhiyun ch->control_ch_num -= CH_10MHZ_APART;
114*4882a593Smuzhiyun } else {
115*4882a593Smuzhiyun ch->sb = BRCMU_CHAN_SB_U;
116*4882a593Smuzhiyun ch->control_ch_num += CH_10MHZ_APART;
117*4882a593Smuzhiyun }
118*4882a593Smuzhiyun break;
119*4882a593Smuzhiyun default:
120*4882a593Smuzhiyun WARN_ONCE(1, "Invalid chanspec 0x%04x\n", ch->chspec);
121*4882a593Smuzhiyun break;
122*4882a593Smuzhiyun }
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun switch (ch->chspec & BRCMU_CHSPEC_D11N_BND_MASK) {
125*4882a593Smuzhiyun case BRCMU_CHSPEC_D11N_BND_5G:
126*4882a593Smuzhiyun ch->band = BRCMU_CHAN_BAND_5G;
127*4882a593Smuzhiyun break;
128*4882a593Smuzhiyun case BRCMU_CHSPEC_D11N_BND_2G:
129*4882a593Smuzhiyun ch->band = BRCMU_CHAN_BAND_2G;
130*4882a593Smuzhiyun break;
131*4882a593Smuzhiyun default:
132*4882a593Smuzhiyun WARN_ONCE(1, "Invalid chanspec 0x%04x\n", ch->chspec);
133*4882a593Smuzhiyun break;
134*4882a593Smuzhiyun }
135*4882a593Smuzhiyun }
136*4882a593Smuzhiyun
brcmu_d11ac_decchspec(struct brcmu_chan * ch)137*4882a593Smuzhiyun static void brcmu_d11ac_decchspec(struct brcmu_chan *ch)
138*4882a593Smuzhiyun {
139*4882a593Smuzhiyun u16 val;
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun ch->chnum = (u8)(ch->chspec & BRCMU_CHSPEC_CH_MASK);
142*4882a593Smuzhiyun ch->control_ch_num = ch->chnum;
143*4882a593Smuzhiyun
144*4882a593Smuzhiyun switch (ch->chspec & BRCMU_CHSPEC_D11AC_BW_MASK) {
145*4882a593Smuzhiyun case BRCMU_CHSPEC_D11AC_BW_20:
146*4882a593Smuzhiyun ch->bw = BRCMU_CHAN_BW_20;
147*4882a593Smuzhiyun ch->sb = BRCMU_CHAN_SB_NONE;
148*4882a593Smuzhiyun break;
149*4882a593Smuzhiyun case BRCMU_CHSPEC_D11AC_BW_40:
150*4882a593Smuzhiyun ch->bw = BRCMU_CHAN_BW_40;
151*4882a593Smuzhiyun val = ch->chspec & BRCMU_CHSPEC_D11AC_SB_MASK;
152*4882a593Smuzhiyun if (val == BRCMU_CHSPEC_D11AC_SB_L) {
153*4882a593Smuzhiyun ch->sb = BRCMU_CHAN_SB_L;
154*4882a593Smuzhiyun ch->control_ch_num -= CH_10MHZ_APART;
155*4882a593Smuzhiyun } else if (val == BRCMU_CHSPEC_D11AC_SB_U) {
156*4882a593Smuzhiyun ch->sb = BRCMU_CHAN_SB_U;
157*4882a593Smuzhiyun ch->control_ch_num += CH_10MHZ_APART;
158*4882a593Smuzhiyun } else {
159*4882a593Smuzhiyun WARN_ONCE(1, "Invalid chanspec 0x%04x\n", ch->chspec);
160*4882a593Smuzhiyun }
161*4882a593Smuzhiyun break;
162*4882a593Smuzhiyun case BRCMU_CHSPEC_D11AC_BW_80:
163*4882a593Smuzhiyun ch->bw = BRCMU_CHAN_BW_80;
164*4882a593Smuzhiyun ch->sb = brcmu_maskget16(ch->chspec, BRCMU_CHSPEC_D11AC_SB_MASK,
165*4882a593Smuzhiyun BRCMU_CHSPEC_D11AC_SB_SHIFT);
166*4882a593Smuzhiyun switch (ch->sb) {
167*4882a593Smuzhiyun case BRCMU_CHAN_SB_LL:
168*4882a593Smuzhiyun ch->control_ch_num -= CH_30MHZ_APART;
169*4882a593Smuzhiyun break;
170*4882a593Smuzhiyun case BRCMU_CHAN_SB_LU:
171*4882a593Smuzhiyun ch->control_ch_num -= CH_10MHZ_APART;
172*4882a593Smuzhiyun break;
173*4882a593Smuzhiyun case BRCMU_CHAN_SB_UL:
174*4882a593Smuzhiyun ch->control_ch_num += CH_10MHZ_APART;
175*4882a593Smuzhiyun break;
176*4882a593Smuzhiyun case BRCMU_CHAN_SB_UU:
177*4882a593Smuzhiyun ch->control_ch_num += CH_30MHZ_APART;
178*4882a593Smuzhiyun break;
179*4882a593Smuzhiyun default:
180*4882a593Smuzhiyun WARN_ONCE(1, "Invalid chanspec 0x%04x\n", ch->chspec);
181*4882a593Smuzhiyun break;
182*4882a593Smuzhiyun }
183*4882a593Smuzhiyun break;
184*4882a593Smuzhiyun case BRCMU_CHSPEC_D11AC_BW_160:
185*4882a593Smuzhiyun ch->bw = BRCMU_CHAN_BW_160;
186*4882a593Smuzhiyun ch->sb = brcmu_maskget16(ch->chspec, BRCMU_CHSPEC_D11AC_SB_MASK,
187*4882a593Smuzhiyun BRCMU_CHSPEC_D11AC_SB_SHIFT);
188*4882a593Smuzhiyun switch (ch->sb) {
189*4882a593Smuzhiyun case BRCMU_CHAN_SB_LLL:
190*4882a593Smuzhiyun ch->control_ch_num -= CH_70MHZ_APART;
191*4882a593Smuzhiyun break;
192*4882a593Smuzhiyun case BRCMU_CHAN_SB_LLU:
193*4882a593Smuzhiyun ch->control_ch_num -= CH_50MHZ_APART;
194*4882a593Smuzhiyun break;
195*4882a593Smuzhiyun case BRCMU_CHAN_SB_LUL:
196*4882a593Smuzhiyun ch->control_ch_num -= CH_30MHZ_APART;
197*4882a593Smuzhiyun break;
198*4882a593Smuzhiyun case BRCMU_CHAN_SB_LUU:
199*4882a593Smuzhiyun ch->control_ch_num -= CH_10MHZ_APART;
200*4882a593Smuzhiyun break;
201*4882a593Smuzhiyun case BRCMU_CHAN_SB_ULL:
202*4882a593Smuzhiyun ch->control_ch_num += CH_10MHZ_APART;
203*4882a593Smuzhiyun break;
204*4882a593Smuzhiyun case BRCMU_CHAN_SB_ULU:
205*4882a593Smuzhiyun ch->control_ch_num += CH_30MHZ_APART;
206*4882a593Smuzhiyun break;
207*4882a593Smuzhiyun case BRCMU_CHAN_SB_UUL:
208*4882a593Smuzhiyun ch->control_ch_num += CH_50MHZ_APART;
209*4882a593Smuzhiyun break;
210*4882a593Smuzhiyun case BRCMU_CHAN_SB_UUU:
211*4882a593Smuzhiyun ch->control_ch_num += CH_70MHZ_APART;
212*4882a593Smuzhiyun break;
213*4882a593Smuzhiyun default:
214*4882a593Smuzhiyun WARN_ONCE(1, "Invalid chanspec 0x%04x\n", ch->chspec);
215*4882a593Smuzhiyun break;
216*4882a593Smuzhiyun }
217*4882a593Smuzhiyun break;
218*4882a593Smuzhiyun case BRCMU_CHSPEC_D11AC_BW_8080:
219*4882a593Smuzhiyun default:
220*4882a593Smuzhiyun WARN_ONCE(1, "Invalid chanspec 0x%04x\n", ch->chspec);
221*4882a593Smuzhiyun break;
222*4882a593Smuzhiyun }
223*4882a593Smuzhiyun
224*4882a593Smuzhiyun switch (ch->chspec & BRCMU_CHSPEC_D11AC_BND_MASK) {
225*4882a593Smuzhiyun case BRCMU_CHSPEC_D11AC_BND_5G:
226*4882a593Smuzhiyun ch->band = BRCMU_CHAN_BAND_5G;
227*4882a593Smuzhiyun break;
228*4882a593Smuzhiyun case BRCMU_CHSPEC_D11AC_BND_2G:
229*4882a593Smuzhiyun ch->band = BRCMU_CHAN_BAND_2G;
230*4882a593Smuzhiyun break;
231*4882a593Smuzhiyun default:
232*4882a593Smuzhiyun WARN_ONCE(1, "Invalid chanspec 0x%04x\n", ch->chspec);
233*4882a593Smuzhiyun break;
234*4882a593Smuzhiyun }
235*4882a593Smuzhiyun }
236*4882a593Smuzhiyun
brcmu_d11_attach(struct brcmu_d11inf * d11inf)237*4882a593Smuzhiyun void brcmu_d11_attach(struct brcmu_d11inf *d11inf)
238*4882a593Smuzhiyun {
239*4882a593Smuzhiyun if (d11inf->io_type == BRCMU_D11N_IOTYPE) {
240*4882a593Smuzhiyun d11inf->encchspec = brcmu_d11n_encchspec;
241*4882a593Smuzhiyun d11inf->decchspec = brcmu_d11n_decchspec;
242*4882a593Smuzhiyun } else {
243*4882a593Smuzhiyun d11inf->encchspec = brcmu_d11ac_encchspec;
244*4882a593Smuzhiyun d11inf->decchspec = brcmu_d11ac_decchspec;
245*4882a593Smuzhiyun }
246*4882a593Smuzhiyun }
247*4882a593Smuzhiyun EXPORT_SYMBOL(brcmu_d11_attach);
248