xref: /OK3568_Linux_fs/kernel/drivers/net/wireless/broadcom/brcm80211/brcmsmac/rate.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright (c) 2010 Broadcom Corporation
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * Permission to use, copy, modify, and/or distribute this software for any
5*4882a593Smuzhiyun  * purpose with or without fee is hereby granted, provided that the above
6*4882a593Smuzhiyun  * copyright notice and this permission notice appear in all copies.
7*4882a593Smuzhiyun  *
8*4882a593Smuzhiyun  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9*4882a593Smuzhiyun  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10*4882a593Smuzhiyun  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11*4882a593Smuzhiyun  * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12*4882a593Smuzhiyun  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13*4882a593Smuzhiyun  * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14*4882a593Smuzhiyun  * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15*4882a593Smuzhiyun  */
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun #ifndef _BRCM_RATE_H_
18*4882a593Smuzhiyun #define _BRCM_RATE_H_
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun #include "types.h"
21*4882a593Smuzhiyun #include "d11.h"
22*4882a593Smuzhiyun #include "phy_hal.h"
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun extern const u8 rate_info[];
25*4882a593Smuzhiyun extern const struct brcms_c_rateset cck_ofdm_mimo_rates;
26*4882a593Smuzhiyun extern const struct brcms_c_rateset ofdm_mimo_rates;
27*4882a593Smuzhiyun extern const struct brcms_c_rateset cck_ofdm_rates;
28*4882a593Smuzhiyun extern const struct brcms_c_rateset ofdm_rates;
29*4882a593Smuzhiyun extern const struct brcms_c_rateset cck_rates;
30*4882a593Smuzhiyun extern const struct brcms_c_rateset gphy_legacy_rates;
31*4882a593Smuzhiyun extern const struct brcms_c_rateset rate_limit_1_2;
32*4882a593Smuzhiyun 
33*4882a593Smuzhiyun struct brcms_mcs_info {
34*4882a593Smuzhiyun 	/* phy rate in kbps [20Mhz] */
35*4882a593Smuzhiyun 	u32 phy_rate_20;
36*4882a593Smuzhiyun 	/* phy rate in kbps [40Mhz] */
37*4882a593Smuzhiyun 	u32 phy_rate_40;
38*4882a593Smuzhiyun 	/* phy rate in kbps [20Mhz] with SGI */
39*4882a593Smuzhiyun 	u32 phy_rate_20_sgi;
40*4882a593Smuzhiyun 	/* phy rate in kbps [40Mhz] with SGI */
41*4882a593Smuzhiyun 	u32 phy_rate_40_sgi;
42*4882a593Smuzhiyun 	/* phy ctl byte 3, code rate, modulation type, # of streams */
43*4882a593Smuzhiyun 	u8 tx_phy_ctl3;
44*4882a593Smuzhiyun 	/* matching legacy ofdm rate in 500bkps */
45*4882a593Smuzhiyun 	u8 leg_ofdm;
46*4882a593Smuzhiyun };
47*4882a593Smuzhiyun 
48*4882a593Smuzhiyun #define BRCMS_MAXMCS	32	/* max valid mcs index */
49*4882a593Smuzhiyun #define MCS_TABLE_SIZE	33	/* Number of mcs entries in the table */
50*4882a593Smuzhiyun extern const struct brcms_mcs_info mcs_table[];
51*4882a593Smuzhiyun 
52*4882a593Smuzhiyun #define MCS_TXS_MASK	0xc0	/* num tx streams - 1 bit mask */
53*4882a593Smuzhiyun #define MCS_TXS_SHIFT	6	/* num tx streams - 1 bit shift */
54*4882a593Smuzhiyun 
55*4882a593Smuzhiyun /* returns num tx streams - 1 */
mcs_2_txstreams(u8 mcs)56*4882a593Smuzhiyun static inline u8 mcs_2_txstreams(u8 mcs)
57*4882a593Smuzhiyun {
58*4882a593Smuzhiyun 	return (mcs_table[mcs].tx_phy_ctl3 & MCS_TXS_MASK) >> MCS_TXS_SHIFT;
59*4882a593Smuzhiyun }
60*4882a593Smuzhiyun 
mcs_2_rate(u8 mcs,bool is40,bool sgi)61*4882a593Smuzhiyun static inline uint mcs_2_rate(u8 mcs, bool is40, bool sgi)
62*4882a593Smuzhiyun {
63*4882a593Smuzhiyun 	if (sgi) {
64*4882a593Smuzhiyun 		if (is40)
65*4882a593Smuzhiyun 			return mcs_table[mcs].phy_rate_40_sgi;
66*4882a593Smuzhiyun 		return mcs_table[mcs].phy_rate_20_sgi;
67*4882a593Smuzhiyun 	}
68*4882a593Smuzhiyun 	if (is40)
69*4882a593Smuzhiyun 		return mcs_table[mcs].phy_rate_40;
70*4882a593Smuzhiyun 
71*4882a593Smuzhiyun 	return mcs_table[mcs].phy_rate_20;
72*4882a593Smuzhiyun }
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun /* Macro to use the rate_info table */
75*4882a593Smuzhiyun #define	BRCMS_RATE_MASK_FULL 0xff /* Rate value mask with basic rate flag */
76*4882a593Smuzhiyun 
77*4882a593Smuzhiyun /*
78*4882a593Smuzhiyun  * rate spec : holds rate and mode specific information required to generate a
79*4882a593Smuzhiyun  * tx frame. Legacy CCK and OFDM information is held in the same manner as was
80*4882a593Smuzhiyun  * done in the past (in the lower byte) the upper 3 bytes primarily hold MIMO
81*4882a593Smuzhiyun  * specific information
82*4882a593Smuzhiyun  */
83*4882a593Smuzhiyun 
84*4882a593Smuzhiyun /* rate spec bit fields */
85*4882a593Smuzhiyun 
86*4882a593Smuzhiyun /* Either 500Kbps units or MIMO MCS idx */
87*4882a593Smuzhiyun #define RSPEC_RATE_MASK		0x0000007F
88*4882a593Smuzhiyun /* mimo MCS is stored in RSPEC_RATE_MASK */
89*4882a593Smuzhiyun #define RSPEC_MIMORATE		0x08000000
90*4882a593Smuzhiyun /* mimo bw mask */
91*4882a593Smuzhiyun #define RSPEC_BW_MASK		0x00000700
92*4882a593Smuzhiyun /* mimo bw shift */
93*4882a593Smuzhiyun #define RSPEC_BW_SHIFT		8
94*4882a593Smuzhiyun /* mimo Space/Time/Frequency mode mask */
95*4882a593Smuzhiyun #define RSPEC_STF_MASK		0x00003800
96*4882a593Smuzhiyun /* mimo Space/Time/Frequency mode shift */
97*4882a593Smuzhiyun #define RSPEC_STF_SHIFT		11
98*4882a593Smuzhiyun /* mimo coding type mask */
99*4882a593Smuzhiyun #define RSPEC_CT_MASK		0x0000C000
100*4882a593Smuzhiyun /* mimo coding type shift */
101*4882a593Smuzhiyun #define RSPEC_CT_SHIFT		14
102*4882a593Smuzhiyun /* mimo num STC streams per PLCP defn. */
103*4882a593Smuzhiyun #define RSPEC_STC_MASK		0x00300000
104*4882a593Smuzhiyun /* mimo num STC streams per PLCP defn. */
105*4882a593Smuzhiyun #define RSPEC_STC_SHIFT		20
106*4882a593Smuzhiyun /* mimo bit indicates adv coding in use */
107*4882a593Smuzhiyun #define RSPEC_LDPC_CODING	0x00400000
108*4882a593Smuzhiyun /* mimo bit indicates short GI in use */
109*4882a593Smuzhiyun #define RSPEC_SHORT_GI		0x00800000
110*4882a593Smuzhiyun /* bit indicates override both rate & mode */
111*4882a593Smuzhiyun #define RSPEC_OVERRIDE		0x80000000
112*4882a593Smuzhiyun /* bit indicates override rate only */
113*4882a593Smuzhiyun #define RSPEC_OVERRIDE_MCS_ONLY 0x40000000
114*4882a593Smuzhiyun 
rspec_active(u32 rspec)115*4882a593Smuzhiyun static inline bool rspec_active(u32 rspec)
116*4882a593Smuzhiyun {
117*4882a593Smuzhiyun 	return rspec & (RSPEC_RATE_MASK | RSPEC_MIMORATE);
118*4882a593Smuzhiyun }
119*4882a593Smuzhiyun 
rspec_phytxbyte2(u32 rspec)120*4882a593Smuzhiyun static inline u8 rspec_phytxbyte2(u32 rspec)
121*4882a593Smuzhiyun {
122*4882a593Smuzhiyun 	return (rspec & 0xff00) >> 8;
123*4882a593Smuzhiyun }
124*4882a593Smuzhiyun 
rspec_get_bw(u32 rspec)125*4882a593Smuzhiyun static inline u32 rspec_get_bw(u32 rspec)
126*4882a593Smuzhiyun {
127*4882a593Smuzhiyun 	return (rspec & RSPEC_BW_MASK) >> RSPEC_BW_SHIFT;
128*4882a593Smuzhiyun }
129*4882a593Smuzhiyun 
rspec_issgi(u32 rspec)130*4882a593Smuzhiyun static inline bool rspec_issgi(u32 rspec)
131*4882a593Smuzhiyun {
132*4882a593Smuzhiyun 	return (rspec & RSPEC_SHORT_GI) == RSPEC_SHORT_GI;
133*4882a593Smuzhiyun }
134*4882a593Smuzhiyun 
rspec_is40mhz(u32 rspec)135*4882a593Smuzhiyun static inline bool rspec_is40mhz(u32 rspec)
136*4882a593Smuzhiyun {
137*4882a593Smuzhiyun 	u32 bw = rspec_get_bw(rspec);
138*4882a593Smuzhiyun 
139*4882a593Smuzhiyun 	return bw == PHY_TXC1_BW_40MHZ || bw == PHY_TXC1_BW_40MHZ_DUP;
140*4882a593Smuzhiyun }
141*4882a593Smuzhiyun 
rspec2rate(u32 rspec)142*4882a593Smuzhiyun static inline uint rspec2rate(u32 rspec)
143*4882a593Smuzhiyun {
144*4882a593Smuzhiyun 	if (rspec & RSPEC_MIMORATE)
145*4882a593Smuzhiyun 		return mcs_2_rate(rspec & RSPEC_RATE_MASK, rspec_is40mhz(rspec),
146*4882a593Smuzhiyun 				  rspec_issgi(rspec));
147*4882a593Smuzhiyun 	return rspec & RSPEC_RATE_MASK;
148*4882a593Smuzhiyun }
149*4882a593Smuzhiyun 
rspec_mimoplcp3(u32 rspec)150*4882a593Smuzhiyun static inline u8 rspec_mimoplcp3(u32 rspec)
151*4882a593Smuzhiyun {
152*4882a593Smuzhiyun 	return (rspec & 0xf00000) >> 16;
153*4882a593Smuzhiyun }
154*4882a593Smuzhiyun 
plcp3_issgi(u8 plcp)155*4882a593Smuzhiyun static inline bool plcp3_issgi(u8 plcp)
156*4882a593Smuzhiyun {
157*4882a593Smuzhiyun 	return (plcp & (RSPEC_SHORT_GI >> 16)) != 0;
158*4882a593Smuzhiyun }
159*4882a593Smuzhiyun 
rspec_stc(u32 rspec)160*4882a593Smuzhiyun static inline uint rspec_stc(u32 rspec)
161*4882a593Smuzhiyun {
162*4882a593Smuzhiyun 	return (rspec & RSPEC_STC_MASK) >> RSPEC_STC_SHIFT;
163*4882a593Smuzhiyun }
164*4882a593Smuzhiyun 
rspec_stf(u32 rspec)165*4882a593Smuzhiyun static inline uint rspec_stf(u32 rspec)
166*4882a593Smuzhiyun {
167*4882a593Smuzhiyun 	return (rspec & RSPEC_STF_MASK) >> RSPEC_STF_SHIFT;
168*4882a593Smuzhiyun }
169*4882a593Smuzhiyun 
is_mcs_rate(u32 ratespec)170*4882a593Smuzhiyun static inline bool is_mcs_rate(u32 ratespec)
171*4882a593Smuzhiyun {
172*4882a593Smuzhiyun 	return (ratespec & RSPEC_MIMORATE) != 0;
173*4882a593Smuzhiyun }
174*4882a593Smuzhiyun 
is_ofdm_rate(u32 ratespec)175*4882a593Smuzhiyun static inline bool is_ofdm_rate(u32 ratespec)
176*4882a593Smuzhiyun {
177*4882a593Smuzhiyun 	return !is_mcs_rate(ratespec) &&
178*4882a593Smuzhiyun 	       (rate_info[ratespec & RSPEC_RATE_MASK] & BRCMS_RATE_FLAG);
179*4882a593Smuzhiyun }
180*4882a593Smuzhiyun 
is_cck_rate(u32 ratespec)181*4882a593Smuzhiyun static inline bool is_cck_rate(u32 ratespec)
182*4882a593Smuzhiyun {
183*4882a593Smuzhiyun 	u32 rate = (ratespec & BRCMS_RATE_MASK);
184*4882a593Smuzhiyun 
185*4882a593Smuzhiyun 	return !is_mcs_rate(ratespec) && (
186*4882a593Smuzhiyun 			rate == BRCM_RATE_1M || rate == BRCM_RATE_2M ||
187*4882a593Smuzhiyun 			rate == BRCM_RATE_5M5 || rate == BRCM_RATE_11M);
188*4882a593Smuzhiyun }
189*4882a593Smuzhiyun 
is_single_stream(u8 mcs)190*4882a593Smuzhiyun static inline bool is_single_stream(u8 mcs)
191*4882a593Smuzhiyun {
192*4882a593Smuzhiyun 	return mcs <= HIGHEST_SINGLE_STREAM_MCS || mcs == 32;
193*4882a593Smuzhiyun }
194*4882a593Smuzhiyun 
cck_rspec(u8 cck)195*4882a593Smuzhiyun static inline u8 cck_rspec(u8 cck)
196*4882a593Smuzhiyun {
197*4882a593Smuzhiyun 	return cck & RSPEC_RATE_MASK;
198*4882a593Smuzhiyun }
199*4882a593Smuzhiyun 
200*4882a593Smuzhiyun /* Convert encoded rate value in plcp header to numerical rates in 500 KHz
201*4882a593Smuzhiyun  * increments */
ofdm_phy2mac_rate(u8 rlpt)202*4882a593Smuzhiyun static inline u8 ofdm_phy2mac_rate(u8 rlpt)
203*4882a593Smuzhiyun {
204*4882a593Smuzhiyun 	return wlc_phy_get_ofdm_rate_lookup()[rlpt & 0x7];
205*4882a593Smuzhiyun }
206*4882a593Smuzhiyun 
cck_phy2mac_rate(u8 signal)207*4882a593Smuzhiyun static inline u8 cck_phy2mac_rate(u8 signal)
208*4882a593Smuzhiyun {
209*4882a593Smuzhiyun 	return signal/5;
210*4882a593Smuzhiyun }
211*4882a593Smuzhiyun 
212*4882a593Smuzhiyun /* Rates specified in brcms_c_rateset_filter() */
213*4882a593Smuzhiyun #define BRCMS_RATES_CCK_OFDM	0
214*4882a593Smuzhiyun #define BRCMS_RATES_CCK		1
215*4882a593Smuzhiyun #define BRCMS_RATES_OFDM		2
216*4882a593Smuzhiyun 
217*4882a593Smuzhiyun /* sanitize, and sort a rateset with the basic bit(s) preserved, validate
218*4882a593Smuzhiyun  * rateset */
219*4882a593Smuzhiyun bool brcms_c_rate_hwrs_filter_sort_validate(struct brcms_c_rateset *rs,
220*4882a593Smuzhiyun 					    const struct brcms_c_rateset *hw_rs,
221*4882a593Smuzhiyun 					    bool check_brate, u8 txstreams);
222*4882a593Smuzhiyun /* copy rateset src to dst as-is (no masking or sorting) */
223*4882a593Smuzhiyun void brcms_c_rateset_copy(const struct brcms_c_rateset *src,
224*4882a593Smuzhiyun 			  struct brcms_c_rateset *dst);
225*4882a593Smuzhiyun 
226*4882a593Smuzhiyun /* would be nice to have these documented ... */
227*4882a593Smuzhiyun u32 brcms_c_compute_rspec(struct d11rxhdr *rxh, u8 *plcp);
228*4882a593Smuzhiyun 
229*4882a593Smuzhiyun void brcms_c_rateset_filter(struct brcms_c_rateset *src,
230*4882a593Smuzhiyun 			    struct brcms_c_rateset *dst, bool basic_only,
231*4882a593Smuzhiyun 			    u8 rates, uint xmask, bool mcsallow);
232*4882a593Smuzhiyun 
233*4882a593Smuzhiyun void brcms_c_rateset_default(struct brcms_c_rateset *rs_tgt,
234*4882a593Smuzhiyun 			     const struct brcms_c_rateset *rs_hw, uint phy_type,
235*4882a593Smuzhiyun 			     int bandtype, bool cck_only, uint rate_mask,
236*4882a593Smuzhiyun 			     bool mcsallow, u8 bw, u8 txstreams);
237*4882a593Smuzhiyun 
238*4882a593Smuzhiyun s16 brcms_c_rate_legacy_phyctl(uint rate);
239*4882a593Smuzhiyun 
240*4882a593Smuzhiyun void brcms_c_rateset_mcs_upd(struct brcms_c_rateset *rs, u8 txstreams);
241*4882a593Smuzhiyun void brcms_c_rateset_mcs_clear(struct brcms_c_rateset *rateset);
242*4882a593Smuzhiyun void brcms_c_rateset_mcs_build(struct brcms_c_rateset *rateset, u8 txstreams);
243*4882a593Smuzhiyun void brcms_c_rateset_bw_mcs_filter(struct brcms_c_rateset *rateset, u8 bw);
244*4882a593Smuzhiyun 
245*4882a593Smuzhiyun #endif				/* _BRCM_RATE_H_ */
246