1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright (c) 2010 Broadcom Corporation
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Permission to use, copy, modify, and/or distribute this software for any
5*4882a593Smuzhiyun * purpose with or without fee is hereby granted, provided that the above
6*4882a593Smuzhiyun * copyright notice and this permission notice appear in all copies.
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9*4882a593Smuzhiyun * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10*4882a593Smuzhiyun * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11*4882a593Smuzhiyun * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12*4882a593Smuzhiyun * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13*4882a593Smuzhiyun * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14*4882a593Smuzhiyun * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15*4882a593Smuzhiyun */
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun #include <brcmu_wifi.h>
18*4882a593Smuzhiyun #include <brcmu_utils.h>
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun #include "d11.h"
21*4882a593Smuzhiyun #include "pub.h"
22*4882a593Smuzhiyun #include "rate.h"
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun /*
25*4882a593Smuzhiyun * Rate info per rate: It tells whether a rate is ofdm or not and its phy_rate
26*4882a593Smuzhiyun * value
27*4882a593Smuzhiyun */
28*4882a593Smuzhiyun const u8 rate_info[BRCM_MAXRATE + 1] = {
29*4882a593Smuzhiyun /* 0 1 2 3 4 5 6 7 8 9 */
30*4882a593Smuzhiyun /* 0 */ 0x00, 0x00, 0x0a, 0x00, 0x14, 0x00, 0x00, 0x00, 0x00, 0x00,
31*4882a593Smuzhiyun /* 10 */ 0x00, 0x37, 0x8b, 0x00, 0x00, 0x00, 0x00, 0x00, 0x8f, 0x00,
32*4882a593Smuzhiyun /* 20 */ 0x00, 0x00, 0x6e, 0x00, 0x8a, 0x00, 0x00, 0x00, 0x00, 0x00,
33*4882a593Smuzhiyun /* 30 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x8e, 0x00, 0x00, 0x00,
34*4882a593Smuzhiyun /* 40 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x89, 0x00,
35*4882a593Smuzhiyun /* 50 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
36*4882a593Smuzhiyun /* 60 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
37*4882a593Smuzhiyun /* 70 */ 0x00, 0x00, 0x8d, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
38*4882a593Smuzhiyun /* 80 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
39*4882a593Smuzhiyun /* 90 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x88, 0x00, 0x00, 0x00,
40*4882a593Smuzhiyun /* 100 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x8c
41*4882a593Smuzhiyun };
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun /* rates are in units of Kbps */
44*4882a593Smuzhiyun const struct brcms_mcs_info mcs_table[MCS_TABLE_SIZE] = {
45*4882a593Smuzhiyun /* MCS 0: SS 1, MOD: BPSK, CR 1/2 */
46*4882a593Smuzhiyun {6500, 13500, CEIL(6500 * 10, 9), CEIL(13500 * 10, 9), 0x00,
47*4882a593Smuzhiyun BRCM_RATE_6M},
48*4882a593Smuzhiyun /* MCS 1: SS 1, MOD: QPSK, CR 1/2 */
49*4882a593Smuzhiyun {13000, 27000, CEIL(13000 * 10, 9), CEIL(27000 * 10, 9), 0x08,
50*4882a593Smuzhiyun BRCM_RATE_12M},
51*4882a593Smuzhiyun /* MCS 2: SS 1, MOD: QPSK, CR 3/4 */
52*4882a593Smuzhiyun {19500, 40500, CEIL(19500 * 10, 9), CEIL(40500 * 10, 9), 0x0A,
53*4882a593Smuzhiyun BRCM_RATE_18M},
54*4882a593Smuzhiyun /* MCS 3: SS 1, MOD: 16QAM, CR 1/2 */
55*4882a593Smuzhiyun {26000, 54000, CEIL(26000 * 10, 9), CEIL(54000 * 10, 9), 0x10,
56*4882a593Smuzhiyun BRCM_RATE_24M},
57*4882a593Smuzhiyun /* MCS 4: SS 1, MOD: 16QAM, CR 3/4 */
58*4882a593Smuzhiyun {39000, 81000, CEIL(39000 * 10, 9), CEIL(81000 * 10, 9), 0x12,
59*4882a593Smuzhiyun BRCM_RATE_36M},
60*4882a593Smuzhiyun /* MCS 5: SS 1, MOD: 64QAM, CR 2/3 */
61*4882a593Smuzhiyun {52000, 108000, CEIL(52000 * 10, 9), CEIL(108000 * 10, 9), 0x19,
62*4882a593Smuzhiyun BRCM_RATE_48M},
63*4882a593Smuzhiyun /* MCS 6: SS 1, MOD: 64QAM, CR 3/4 */
64*4882a593Smuzhiyun {58500, 121500, CEIL(58500 * 10, 9), CEIL(121500 * 10, 9), 0x1A,
65*4882a593Smuzhiyun BRCM_RATE_54M},
66*4882a593Smuzhiyun /* MCS 7: SS 1, MOD: 64QAM, CR 5/6 */
67*4882a593Smuzhiyun {65000, 135000, CEIL(65000 * 10, 9), CEIL(135000 * 10, 9), 0x1C,
68*4882a593Smuzhiyun BRCM_RATE_54M},
69*4882a593Smuzhiyun /* MCS 8: SS 2, MOD: BPSK, CR 1/2 */
70*4882a593Smuzhiyun {13000, 27000, CEIL(13000 * 10, 9), CEIL(27000 * 10, 9), 0x40,
71*4882a593Smuzhiyun BRCM_RATE_6M},
72*4882a593Smuzhiyun /* MCS 9: SS 2, MOD: QPSK, CR 1/2 */
73*4882a593Smuzhiyun {26000, 54000, CEIL(26000 * 10, 9), CEIL(54000 * 10, 9), 0x48,
74*4882a593Smuzhiyun BRCM_RATE_12M},
75*4882a593Smuzhiyun /* MCS 10: SS 2, MOD: QPSK, CR 3/4 */
76*4882a593Smuzhiyun {39000, 81000, CEIL(39000 * 10, 9), CEIL(81000 * 10, 9), 0x4A,
77*4882a593Smuzhiyun BRCM_RATE_18M},
78*4882a593Smuzhiyun /* MCS 11: SS 2, MOD: 16QAM, CR 1/2 */
79*4882a593Smuzhiyun {52000, 108000, CEIL(52000 * 10, 9), CEIL(108000 * 10, 9), 0x50,
80*4882a593Smuzhiyun BRCM_RATE_24M},
81*4882a593Smuzhiyun /* MCS 12: SS 2, MOD: 16QAM, CR 3/4 */
82*4882a593Smuzhiyun {78000, 162000, CEIL(78000 * 10, 9), CEIL(162000 * 10, 9), 0x52,
83*4882a593Smuzhiyun BRCM_RATE_36M},
84*4882a593Smuzhiyun /* MCS 13: SS 2, MOD: 64QAM, CR 2/3 */
85*4882a593Smuzhiyun {104000, 216000, CEIL(104000 * 10, 9), CEIL(216000 * 10, 9), 0x59,
86*4882a593Smuzhiyun BRCM_RATE_48M},
87*4882a593Smuzhiyun /* MCS 14: SS 2, MOD: 64QAM, CR 3/4 */
88*4882a593Smuzhiyun {117000, 243000, CEIL(117000 * 10, 9), CEIL(243000 * 10, 9), 0x5A,
89*4882a593Smuzhiyun BRCM_RATE_54M},
90*4882a593Smuzhiyun /* MCS 15: SS 2, MOD: 64QAM, CR 5/6 */
91*4882a593Smuzhiyun {130000, 270000, CEIL(130000 * 10, 9), CEIL(270000 * 10, 9), 0x5C,
92*4882a593Smuzhiyun BRCM_RATE_54M},
93*4882a593Smuzhiyun /* MCS 16: SS 3, MOD: BPSK, CR 1/2 */
94*4882a593Smuzhiyun {19500, 40500, CEIL(19500 * 10, 9), CEIL(40500 * 10, 9), 0x80,
95*4882a593Smuzhiyun BRCM_RATE_6M},
96*4882a593Smuzhiyun /* MCS 17: SS 3, MOD: QPSK, CR 1/2 */
97*4882a593Smuzhiyun {39000, 81000, CEIL(39000 * 10, 9), CEIL(81000 * 10, 9), 0x88,
98*4882a593Smuzhiyun BRCM_RATE_12M},
99*4882a593Smuzhiyun /* MCS 18: SS 3, MOD: QPSK, CR 3/4 */
100*4882a593Smuzhiyun {58500, 121500, CEIL(58500 * 10, 9), CEIL(121500 * 10, 9), 0x8A,
101*4882a593Smuzhiyun BRCM_RATE_18M},
102*4882a593Smuzhiyun /* MCS 19: SS 3, MOD: 16QAM, CR 1/2 */
103*4882a593Smuzhiyun {78000, 162000, CEIL(78000 * 10, 9), CEIL(162000 * 10, 9), 0x90,
104*4882a593Smuzhiyun BRCM_RATE_24M},
105*4882a593Smuzhiyun /* MCS 20: SS 3, MOD: 16QAM, CR 3/4 */
106*4882a593Smuzhiyun {117000, 243000, CEIL(117000 * 10, 9), CEIL(243000 * 10, 9), 0x92,
107*4882a593Smuzhiyun BRCM_RATE_36M},
108*4882a593Smuzhiyun /* MCS 21: SS 3, MOD: 64QAM, CR 2/3 */
109*4882a593Smuzhiyun {156000, 324000, CEIL(156000 * 10, 9), CEIL(324000 * 10, 9), 0x99,
110*4882a593Smuzhiyun BRCM_RATE_48M},
111*4882a593Smuzhiyun /* MCS 22: SS 3, MOD: 64QAM, CR 3/4 */
112*4882a593Smuzhiyun {175500, 364500, CEIL(175500 * 10, 9), CEIL(364500 * 10, 9), 0x9A,
113*4882a593Smuzhiyun BRCM_RATE_54M},
114*4882a593Smuzhiyun /* MCS 23: SS 3, MOD: 64QAM, CR 5/6 */
115*4882a593Smuzhiyun {195000, 405000, CEIL(195000 * 10, 9), CEIL(405000 * 10, 9), 0x9B,
116*4882a593Smuzhiyun BRCM_RATE_54M},
117*4882a593Smuzhiyun /* MCS 24: SS 4, MOD: BPSK, CR 1/2 */
118*4882a593Smuzhiyun {26000, 54000, CEIL(26000 * 10, 9), CEIL(54000 * 10, 9), 0xC0,
119*4882a593Smuzhiyun BRCM_RATE_6M},
120*4882a593Smuzhiyun /* MCS 25: SS 4, MOD: QPSK, CR 1/2 */
121*4882a593Smuzhiyun {52000, 108000, CEIL(52000 * 10, 9), CEIL(108000 * 10, 9), 0xC8,
122*4882a593Smuzhiyun BRCM_RATE_12M},
123*4882a593Smuzhiyun /* MCS 26: SS 4, MOD: QPSK, CR 3/4 */
124*4882a593Smuzhiyun {78000, 162000, CEIL(78000 * 10, 9), CEIL(162000 * 10, 9), 0xCA,
125*4882a593Smuzhiyun BRCM_RATE_18M},
126*4882a593Smuzhiyun /* MCS 27: SS 4, MOD: 16QAM, CR 1/2 */
127*4882a593Smuzhiyun {104000, 216000, CEIL(104000 * 10, 9), CEIL(216000 * 10, 9), 0xD0,
128*4882a593Smuzhiyun BRCM_RATE_24M},
129*4882a593Smuzhiyun /* MCS 28: SS 4, MOD: 16QAM, CR 3/4 */
130*4882a593Smuzhiyun {156000, 324000, CEIL(156000 * 10, 9), CEIL(324000 * 10, 9), 0xD2,
131*4882a593Smuzhiyun BRCM_RATE_36M},
132*4882a593Smuzhiyun /* MCS 29: SS 4, MOD: 64QAM, CR 2/3 */
133*4882a593Smuzhiyun {208000, 432000, CEIL(208000 * 10, 9), CEIL(432000 * 10, 9), 0xD9,
134*4882a593Smuzhiyun BRCM_RATE_48M},
135*4882a593Smuzhiyun /* MCS 30: SS 4, MOD: 64QAM, CR 3/4 */
136*4882a593Smuzhiyun {234000, 486000, CEIL(234000 * 10, 9), CEIL(486000 * 10, 9), 0xDA,
137*4882a593Smuzhiyun BRCM_RATE_54M},
138*4882a593Smuzhiyun /* MCS 31: SS 4, MOD: 64QAM, CR 5/6 */
139*4882a593Smuzhiyun {260000, 540000, CEIL(260000 * 10, 9), CEIL(540000 * 10, 9), 0xDB,
140*4882a593Smuzhiyun BRCM_RATE_54M},
141*4882a593Smuzhiyun /* MCS 32: SS 1, MOD: BPSK, CR 1/2 */
142*4882a593Smuzhiyun {0, 6000, 0, CEIL(6000 * 10, 9), 0x00, BRCM_RATE_6M},
143*4882a593Smuzhiyun };
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun /*
146*4882a593Smuzhiyun * phycfg for legacy OFDM frames: code rate, modulation scheme, spatial streams
147*4882a593Smuzhiyun * Number of spatial streams: always 1 other fields: refer to table 78 of
148*4882a593Smuzhiyun * section 17.3.2.2 of the original .11a standard
149*4882a593Smuzhiyun */
150*4882a593Smuzhiyun struct legacy_phycfg {
151*4882a593Smuzhiyun u32 rate_ofdm; /* ofdm mac rate */
152*4882a593Smuzhiyun /* phy ctl byte 3, code rate, modulation type, # of streams */
153*4882a593Smuzhiyun u8 tx_phy_ctl3;
154*4882a593Smuzhiyun };
155*4882a593Smuzhiyun
156*4882a593Smuzhiyun /* Number of legacy_rate_cfg entries in the table */
157*4882a593Smuzhiyun #define LEGACY_PHYCFG_TABLE_SIZE 12
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun /*
160*4882a593Smuzhiyun * In CCK mode LPPHY overloads OFDM Modulation bits with CCK Data Rate
161*4882a593Smuzhiyun * Eventually MIMOPHY would also be converted to this format
162*4882a593Smuzhiyun * 0 = 1Mbps; 1 = 2Mbps; 2 = 5.5Mbps; 3 = 11Mbps
163*4882a593Smuzhiyun */
164*4882a593Smuzhiyun static const struct
165*4882a593Smuzhiyun legacy_phycfg legacy_phycfg_table[LEGACY_PHYCFG_TABLE_SIZE] = {
166*4882a593Smuzhiyun {BRCM_RATE_1M, 0x00}, /* CCK 1Mbps, data rate 0 */
167*4882a593Smuzhiyun {BRCM_RATE_2M, 0x08}, /* CCK 2Mbps, data rate 1 */
168*4882a593Smuzhiyun {BRCM_RATE_5M5, 0x10}, /* CCK 5.5Mbps, data rate 2 */
169*4882a593Smuzhiyun {BRCM_RATE_11M, 0x18}, /* CCK 11Mbps, data rate 3 */
170*4882a593Smuzhiyun /* OFDM 6Mbps, code rate 1/2, BPSK, 1 spatial stream */
171*4882a593Smuzhiyun {BRCM_RATE_6M, 0x00},
172*4882a593Smuzhiyun /* OFDM 9Mbps, code rate 3/4, BPSK, 1 spatial stream */
173*4882a593Smuzhiyun {BRCM_RATE_9M, 0x02},
174*4882a593Smuzhiyun /* OFDM 12Mbps, code rate 1/2, QPSK, 1 spatial stream */
175*4882a593Smuzhiyun {BRCM_RATE_12M, 0x08},
176*4882a593Smuzhiyun /* OFDM 18Mbps, code rate 3/4, QPSK, 1 spatial stream */
177*4882a593Smuzhiyun {BRCM_RATE_18M, 0x0A},
178*4882a593Smuzhiyun /* OFDM 24Mbps, code rate 1/2, 16-QAM, 1 spatial stream */
179*4882a593Smuzhiyun {BRCM_RATE_24M, 0x10},
180*4882a593Smuzhiyun /* OFDM 36Mbps, code rate 3/4, 16-QAM, 1 spatial stream */
181*4882a593Smuzhiyun {BRCM_RATE_36M, 0x12},
182*4882a593Smuzhiyun /* OFDM 48Mbps, code rate 2/3, 64-QAM, 1 spatial stream */
183*4882a593Smuzhiyun {BRCM_RATE_48M, 0x19},
184*4882a593Smuzhiyun /* OFDM 54Mbps, code rate 3/4, 64-QAM, 1 spatial stream */
185*4882a593Smuzhiyun {BRCM_RATE_54M, 0x1A},
186*4882a593Smuzhiyun };
187*4882a593Smuzhiyun
188*4882a593Smuzhiyun /* Hardware rates (also encodes default basic rates) */
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun const struct brcms_c_rateset cck_ofdm_mimo_rates = {
191*4882a593Smuzhiyun 12,
192*4882a593Smuzhiyun /* 1b, 2b, 5.5b, 6, 9, 11b, 12, 18, 24, 36, 48, */
193*4882a593Smuzhiyun { 0x82, 0x84, 0x8b, 0x0c, 0x12, 0x96, 0x18, 0x24, 0x30, 0x48, 0x60,
194*4882a593Smuzhiyun /* 54 Mbps */
195*4882a593Smuzhiyun 0x6c},
196*4882a593Smuzhiyun 0x00,
197*4882a593Smuzhiyun { 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
198*4882a593Smuzhiyun 0x00, 0x00, 0x00, 0x00, 0x00}
199*4882a593Smuzhiyun };
200*4882a593Smuzhiyun
201*4882a593Smuzhiyun const struct brcms_c_rateset ofdm_mimo_rates = {
202*4882a593Smuzhiyun 8,
203*4882a593Smuzhiyun /* 6b, 9, 12b, 18, 24b, 36, 48, 54 Mbps */
204*4882a593Smuzhiyun { 0x8c, 0x12, 0x98, 0x24, 0xb0, 0x48, 0x60, 0x6c},
205*4882a593Smuzhiyun 0x00,
206*4882a593Smuzhiyun { 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
207*4882a593Smuzhiyun 0x00, 0x00, 0x00, 0x00, 0x00}
208*4882a593Smuzhiyun };
209*4882a593Smuzhiyun
210*4882a593Smuzhiyun /* Default ratesets that include MCS32 for 40BW channels */
211*4882a593Smuzhiyun static const struct brcms_c_rateset cck_ofdm_40bw_mimo_rates = {
212*4882a593Smuzhiyun 12,
213*4882a593Smuzhiyun /* 1b, 2b, 5.5b, 6, 9, 11b, 12, 18, 24, 36, 48 */
214*4882a593Smuzhiyun { 0x82, 0x84, 0x8b, 0x0c, 0x12, 0x96, 0x18, 0x24, 0x30, 0x48, 0x60,
215*4882a593Smuzhiyun /* 54 Mbps */
216*4882a593Smuzhiyun 0x6c},
217*4882a593Smuzhiyun 0x00,
218*4882a593Smuzhiyun { 0xff, 0xff, 0xff, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
219*4882a593Smuzhiyun 0x00, 0x00, 0x00, 0x00, 0x00}
220*4882a593Smuzhiyun };
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun static const struct brcms_c_rateset ofdm_40bw_mimo_rates = {
223*4882a593Smuzhiyun 8,
224*4882a593Smuzhiyun /* 6b, 9, 12b, 18, 24b, 36, 48, 54 Mbps */
225*4882a593Smuzhiyun { 0x8c, 0x12, 0x98, 0x24, 0xb0, 0x48, 0x60, 0x6c},
226*4882a593Smuzhiyun 0x00,
227*4882a593Smuzhiyun { 0xff, 0xff, 0xff, 0xff, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
228*4882a593Smuzhiyun 0x00, 0x00, 0x00, 0x00, 0x00}
229*4882a593Smuzhiyun };
230*4882a593Smuzhiyun
231*4882a593Smuzhiyun const struct brcms_c_rateset cck_ofdm_rates = {
232*4882a593Smuzhiyun 12,
233*4882a593Smuzhiyun /* 1b, 2b, 5.5b, 6, 9, 11b, 12, 18, 24, 36, 48,*/
234*4882a593Smuzhiyun { 0x82, 0x84, 0x8b, 0x0c, 0x12, 0x96, 0x18, 0x24, 0x30, 0x48, 0x60,
235*4882a593Smuzhiyun /*54 Mbps */
236*4882a593Smuzhiyun 0x6c},
237*4882a593Smuzhiyun 0x00,
238*4882a593Smuzhiyun { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
239*4882a593Smuzhiyun 0x00, 0x00, 0x00, 0x00, 0x00}
240*4882a593Smuzhiyun };
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun const struct brcms_c_rateset gphy_legacy_rates = {
243*4882a593Smuzhiyun 4,
244*4882a593Smuzhiyun /* 1b, 2b, 5.5b, 11b Mbps */
245*4882a593Smuzhiyun { 0x82, 0x84, 0x8b, 0x96},
246*4882a593Smuzhiyun 0x00,
247*4882a593Smuzhiyun { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
248*4882a593Smuzhiyun 0x00, 0x00, 0x00, 0x00, 0x00}
249*4882a593Smuzhiyun };
250*4882a593Smuzhiyun
251*4882a593Smuzhiyun const struct brcms_c_rateset ofdm_rates = {
252*4882a593Smuzhiyun 8,
253*4882a593Smuzhiyun /* 6b, 9, 12b, 18, 24b, 36, 48, 54 Mbps */
254*4882a593Smuzhiyun { 0x8c, 0x12, 0x98, 0x24, 0xb0, 0x48, 0x60, 0x6c},
255*4882a593Smuzhiyun 0x00,
256*4882a593Smuzhiyun { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
257*4882a593Smuzhiyun 0x00, 0x00, 0x00, 0x00, 0x00}
258*4882a593Smuzhiyun };
259*4882a593Smuzhiyun
260*4882a593Smuzhiyun const struct brcms_c_rateset cck_rates = {
261*4882a593Smuzhiyun 4,
262*4882a593Smuzhiyun /* 1b, 2b, 5.5, 11 Mbps */
263*4882a593Smuzhiyun { 0x82, 0x84, 0x0b, 0x16},
264*4882a593Smuzhiyun 0x00,
265*4882a593Smuzhiyun { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
266*4882a593Smuzhiyun 0x00, 0x00, 0x00, 0x00, 0x00}
267*4882a593Smuzhiyun };
268*4882a593Smuzhiyun
269*4882a593Smuzhiyun /* check if rateset is valid.
270*4882a593Smuzhiyun * if check_brate is true, rateset without a basic rate is considered NOT valid.
271*4882a593Smuzhiyun */
brcms_c_rateset_valid(struct brcms_c_rateset * rs,bool check_brate)272*4882a593Smuzhiyun static bool brcms_c_rateset_valid(struct brcms_c_rateset *rs, bool check_brate)
273*4882a593Smuzhiyun {
274*4882a593Smuzhiyun uint idx;
275*4882a593Smuzhiyun
276*4882a593Smuzhiyun if (!rs->count)
277*4882a593Smuzhiyun return false;
278*4882a593Smuzhiyun
279*4882a593Smuzhiyun if (!check_brate)
280*4882a593Smuzhiyun return true;
281*4882a593Smuzhiyun
282*4882a593Smuzhiyun /* error if no basic rates */
283*4882a593Smuzhiyun for (idx = 0; idx < rs->count; idx++) {
284*4882a593Smuzhiyun if (rs->rates[idx] & BRCMS_RATE_FLAG)
285*4882a593Smuzhiyun return true;
286*4882a593Smuzhiyun }
287*4882a593Smuzhiyun return false;
288*4882a593Smuzhiyun }
289*4882a593Smuzhiyun
brcms_c_rateset_mcs_upd(struct brcms_c_rateset * rs,u8 txstreams)290*4882a593Smuzhiyun void brcms_c_rateset_mcs_upd(struct brcms_c_rateset *rs, u8 txstreams)
291*4882a593Smuzhiyun {
292*4882a593Smuzhiyun int i;
293*4882a593Smuzhiyun for (i = txstreams; i < MAX_STREAMS_SUPPORTED; i++)
294*4882a593Smuzhiyun rs->mcs[i] = 0;
295*4882a593Smuzhiyun }
296*4882a593Smuzhiyun
297*4882a593Smuzhiyun /*
298*4882a593Smuzhiyun * filter based on hardware rateset, and sort filtered rateset with basic
299*4882a593Smuzhiyun * bit(s) preserved, and check if resulting rateset is valid.
300*4882a593Smuzhiyun */
301*4882a593Smuzhiyun bool
brcms_c_rate_hwrs_filter_sort_validate(struct brcms_c_rateset * rs,const struct brcms_c_rateset * hw_rs,bool check_brate,u8 txstreams)302*4882a593Smuzhiyun brcms_c_rate_hwrs_filter_sort_validate(struct brcms_c_rateset *rs,
303*4882a593Smuzhiyun const struct brcms_c_rateset *hw_rs,
304*4882a593Smuzhiyun bool check_brate, u8 txstreams)
305*4882a593Smuzhiyun {
306*4882a593Smuzhiyun u8 rateset[BRCM_MAXRATE + 1];
307*4882a593Smuzhiyun u8 r;
308*4882a593Smuzhiyun uint count;
309*4882a593Smuzhiyun uint i;
310*4882a593Smuzhiyun
311*4882a593Smuzhiyun memset(rateset, 0, sizeof(rateset));
312*4882a593Smuzhiyun count = rs->count;
313*4882a593Smuzhiyun
314*4882a593Smuzhiyun for (i = 0; i < count; i++) {
315*4882a593Smuzhiyun /* mask off "basic rate" bit, BRCMS_RATE_FLAG */
316*4882a593Smuzhiyun r = (int)rs->rates[i] & BRCMS_RATE_MASK;
317*4882a593Smuzhiyun if ((r > BRCM_MAXRATE) || (rate_info[r] == 0))
318*4882a593Smuzhiyun continue;
319*4882a593Smuzhiyun rateset[r] = rs->rates[i]; /* preserve basic bit! */
320*4882a593Smuzhiyun }
321*4882a593Smuzhiyun
322*4882a593Smuzhiyun /* fill out the rates in order, looking at only supported rates */
323*4882a593Smuzhiyun count = 0;
324*4882a593Smuzhiyun for (i = 0; i < hw_rs->count; i++) {
325*4882a593Smuzhiyun r = hw_rs->rates[i] & BRCMS_RATE_MASK;
326*4882a593Smuzhiyun if (rateset[r])
327*4882a593Smuzhiyun rs->rates[count++] = rateset[r];
328*4882a593Smuzhiyun }
329*4882a593Smuzhiyun
330*4882a593Smuzhiyun rs->count = count;
331*4882a593Smuzhiyun
332*4882a593Smuzhiyun /* only set the mcs rate bit if the equivalent hw mcs bit is set */
333*4882a593Smuzhiyun for (i = 0; i < MCSSET_LEN; i++)
334*4882a593Smuzhiyun rs->mcs[i] = (rs->mcs[i] & hw_rs->mcs[i]);
335*4882a593Smuzhiyun
336*4882a593Smuzhiyun if (brcms_c_rateset_valid(rs, check_brate))
337*4882a593Smuzhiyun return true;
338*4882a593Smuzhiyun else
339*4882a593Smuzhiyun return false;
340*4882a593Smuzhiyun }
341*4882a593Smuzhiyun
342*4882a593Smuzhiyun /* calculate the rate of a rx'd frame and return it as a ratespec */
brcms_c_compute_rspec(struct d11rxhdr * rxh,u8 * plcp)343*4882a593Smuzhiyun u32 brcms_c_compute_rspec(struct d11rxhdr *rxh, u8 *plcp)
344*4882a593Smuzhiyun {
345*4882a593Smuzhiyun int phy_type;
346*4882a593Smuzhiyun u32 rspec = PHY_TXC1_BW_20MHZ << RSPEC_BW_SHIFT;
347*4882a593Smuzhiyun
348*4882a593Smuzhiyun phy_type =
349*4882a593Smuzhiyun ((rxh->RxChan & RXS_CHAN_PHYTYPE_MASK) >> RXS_CHAN_PHYTYPE_SHIFT);
350*4882a593Smuzhiyun
351*4882a593Smuzhiyun if ((phy_type == PHY_TYPE_N) || (phy_type == PHY_TYPE_SSN) ||
352*4882a593Smuzhiyun (phy_type == PHY_TYPE_LCN) || (phy_type == PHY_TYPE_HT)) {
353*4882a593Smuzhiyun switch (rxh->PhyRxStatus_0 & PRXS0_FT_MASK) {
354*4882a593Smuzhiyun case PRXS0_CCK:
355*4882a593Smuzhiyun rspec =
356*4882a593Smuzhiyun cck_phy2mac_rate(
357*4882a593Smuzhiyun ((struct cck_phy_hdr *) plcp)->signal);
358*4882a593Smuzhiyun break;
359*4882a593Smuzhiyun case PRXS0_OFDM:
360*4882a593Smuzhiyun rspec =
361*4882a593Smuzhiyun ofdm_phy2mac_rate(
362*4882a593Smuzhiyun ((struct ofdm_phy_hdr *) plcp)->rlpt[0]);
363*4882a593Smuzhiyun break;
364*4882a593Smuzhiyun case PRXS0_PREN:
365*4882a593Smuzhiyun rspec = (plcp[0] & MIMO_PLCP_MCS_MASK) | RSPEC_MIMORATE;
366*4882a593Smuzhiyun if (plcp[0] & MIMO_PLCP_40MHZ) {
367*4882a593Smuzhiyun /* indicate rspec is for 40 MHz mode */
368*4882a593Smuzhiyun rspec &= ~RSPEC_BW_MASK;
369*4882a593Smuzhiyun rspec |= (PHY_TXC1_BW_40MHZ << RSPEC_BW_SHIFT);
370*4882a593Smuzhiyun }
371*4882a593Smuzhiyun break;
372*4882a593Smuzhiyun case PRXS0_STDN:
373*4882a593Smuzhiyun /* fallthru */
374*4882a593Smuzhiyun default:
375*4882a593Smuzhiyun /* not supported, error condition */
376*4882a593Smuzhiyun break;
377*4882a593Smuzhiyun }
378*4882a593Smuzhiyun if (plcp3_issgi(plcp[3]))
379*4882a593Smuzhiyun rspec |= RSPEC_SHORT_GI;
380*4882a593Smuzhiyun } else
381*4882a593Smuzhiyun if ((phy_type == PHY_TYPE_A) || (rxh->PhyRxStatus_0 & PRXS0_OFDM))
382*4882a593Smuzhiyun rspec = ofdm_phy2mac_rate(
383*4882a593Smuzhiyun ((struct ofdm_phy_hdr *) plcp)->rlpt[0]);
384*4882a593Smuzhiyun else
385*4882a593Smuzhiyun rspec = cck_phy2mac_rate(
386*4882a593Smuzhiyun ((struct cck_phy_hdr *) plcp)->signal);
387*4882a593Smuzhiyun
388*4882a593Smuzhiyun return rspec;
389*4882a593Smuzhiyun }
390*4882a593Smuzhiyun
391*4882a593Smuzhiyun /* copy rateset src to dst as-is (no masking or sorting) */
brcms_c_rateset_copy(const struct brcms_c_rateset * src,struct brcms_c_rateset * dst)392*4882a593Smuzhiyun void brcms_c_rateset_copy(const struct brcms_c_rateset *src,
393*4882a593Smuzhiyun struct brcms_c_rateset *dst)
394*4882a593Smuzhiyun {
395*4882a593Smuzhiyun memcpy(dst, src, sizeof(struct brcms_c_rateset));
396*4882a593Smuzhiyun }
397*4882a593Smuzhiyun
398*4882a593Smuzhiyun /*
399*4882a593Smuzhiyun * Copy and selectively filter one rateset to another.
400*4882a593Smuzhiyun * 'basic_only' means only copy basic rates.
401*4882a593Smuzhiyun * 'rates' indicates cck (11b) and ofdm rates combinations.
402*4882a593Smuzhiyun * - 0: cck and ofdm
403*4882a593Smuzhiyun * - 1: cck only
404*4882a593Smuzhiyun * - 2: ofdm only
405*4882a593Smuzhiyun * 'xmask' is the copy mask (typically 0x7f or 0xff).
406*4882a593Smuzhiyun */
407*4882a593Smuzhiyun void
brcms_c_rateset_filter(struct brcms_c_rateset * src,struct brcms_c_rateset * dst,bool basic_only,u8 rates,uint xmask,bool mcsallow)408*4882a593Smuzhiyun brcms_c_rateset_filter(struct brcms_c_rateset *src, struct brcms_c_rateset *dst,
409*4882a593Smuzhiyun bool basic_only, u8 rates, uint xmask, bool mcsallow)
410*4882a593Smuzhiyun {
411*4882a593Smuzhiyun uint i;
412*4882a593Smuzhiyun uint r;
413*4882a593Smuzhiyun uint count;
414*4882a593Smuzhiyun
415*4882a593Smuzhiyun count = 0;
416*4882a593Smuzhiyun for (i = 0; i < src->count; i++) {
417*4882a593Smuzhiyun r = src->rates[i];
418*4882a593Smuzhiyun if (basic_only && !(r & BRCMS_RATE_FLAG))
419*4882a593Smuzhiyun continue;
420*4882a593Smuzhiyun if (rates == BRCMS_RATES_CCK &&
421*4882a593Smuzhiyun is_ofdm_rate((r & BRCMS_RATE_MASK)))
422*4882a593Smuzhiyun continue;
423*4882a593Smuzhiyun if (rates == BRCMS_RATES_OFDM &&
424*4882a593Smuzhiyun is_cck_rate((r & BRCMS_RATE_MASK)))
425*4882a593Smuzhiyun continue;
426*4882a593Smuzhiyun dst->rates[count++] = r & xmask;
427*4882a593Smuzhiyun }
428*4882a593Smuzhiyun dst->count = count;
429*4882a593Smuzhiyun dst->htphy_membership = src->htphy_membership;
430*4882a593Smuzhiyun
431*4882a593Smuzhiyun if (mcsallow && rates != BRCMS_RATES_CCK)
432*4882a593Smuzhiyun memcpy(&dst->mcs[0], &src->mcs[0], MCSSET_LEN);
433*4882a593Smuzhiyun else
434*4882a593Smuzhiyun brcms_c_rateset_mcs_clear(dst);
435*4882a593Smuzhiyun }
436*4882a593Smuzhiyun
437*4882a593Smuzhiyun /* select rateset for a given phy_type and bandtype and filter it, sort it
438*4882a593Smuzhiyun * and fill rs_tgt with result
439*4882a593Smuzhiyun */
440*4882a593Smuzhiyun void
brcms_c_rateset_default(struct brcms_c_rateset * rs_tgt,const struct brcms_c_rateset * rs_hw,uint phy_type,int bandtype,bool cck_only,uint rate_mask,bool mcsallow,u8 bw,u8 txstreams)441*4882a593Smuzhiyun brcms_c_rateset_default(struct brcms_c_rateset *rs_tgt,
442*4882a593Smuzhiyun const struct brcms_c_rateset *rs_hw,
443*4882a593Smuzhiyun uint phy_type, int bandtype, bool cck_only,
444*4882a593Smuzhiyun uint rate_mask, bool mcsallow, u8 bw, u8 txstreams)
445*4882a593Smuzhiyun {
446*4882a593Smuzhiyun const struct brcms_c_rateset *rs_dflt;
447*4882a593Smuzhiyun struct brcms_c_rateset rs_sel;
448*4882a593Smuzhiyun if ((PHYTYPE_IS(phy_type, PHY_TYPE_HT)) ||
449*4882a593Smuzhiyun (PHYTYPE_IS(phy_type, PHY_TYPE_N)) ||
450*4882a593Smuzhiyun (PHYTYPE_IS(phy_type, PHY_TYPE_LCN)) ||
451*4882a593Smuzhiyun (PHYTYPE_IS(phy_type, PHY_TYPE_SSN))) {
452*4882a593Smuzhiyun if (bandtype == BRCM_BAND_5G)
453*4882a593Smuzhiyun rs_dflt = (bw == BRCMS_20_MHZ ?
454*4882a593Smuzhiyun &ofdm_mimo_rates : &ofdm_40bw_mimo_rates);
455*4882a593Smuzhiyun else
456*4882a593Smuzhiyun rs_dflt = (bw == BRCMS_20_MHZ ?
457*4882a593Smuzhiyun &cck_ofdm_mimo_rates :
458*4882a593Smuzhiyun &cck_ofdm_40bw_mimo_rates);
459*4882a593Smuzhiyun } else if (PHYTYPE_IS(phy_type, PHY_TYPE_LP)) {
460*4882a593Smuzhiyun rs_dflt = (bandtype == BRCM_BAND_5G) ?
461*4882a593Smuzhiyun &ofdm_rates : &cck_ofdm_rates;
462*4882a593Smuzhiyun } else if (PHYTYPE_IS(phy_type, PHY_TYPE_A)) {
463*4882a593Smuzhiyun rs_dflt = &ofdm_rates;
464*4882a593Smuzhiyun } else if (PHYTYPE_IS(phy_type, PHY_TYPE_G)) {
465*4882a593Smuzhiyun rs_dflt = &cck_ofdm_rates;
466*4882a593Smuzhiyun } else {
467*4882a593Smuzhiyun /* should not happen, error condition */
468*4882a593Smuzhiyun rs_dflt = &cck_rates; /* force cck */
469*4882a593Smuzhiyun }
470*4882a593Smuzhiyun
471*4882a593Smuzhiyun /* if hw rateset is not supplied, assign selected rateset to it */
472*4882a593Smuzhiyun if (!rs_hw)
473*4882a593Smuzhiyun rs_hw = rs_dflt;
474*4882a593Smuzhiyun
475*4882a593Smuzhiyun brcms_c_rateset_copy(rs_dflt, &rs_sel);
476*4882a593Smuzhiyun brcms_c_rateset_mcs_upd(&rs_sel, txstreams);
477*4882a593Smuzhiyun brcms_c_rateset_filter(&rs_sel, rs_tgt, false,
478*4882a593Smuzhiyun cck_only ? BRCMS_RATES_CCK : BRCMS_RATES_CCK_OFDM,
479*4882a593Smuzhiyun rate_mask, mcsallow);
480*4882a593Smuzhiyun brcms_c_rate_hwrs_filter_sort_validate(rs_tgt, rs_hw, false,
481*4882a593Smuzhiyun mcsallow ? txstreams : 1);
482*4882a593Smuzhiyun }
483*4882a593Smuzhiyun
brcms_c_rate_legacy_phyctl(uint rate)484*4882a593Smuzhiyun s16 brcms_c_rate_legacy_phyctl(uint rate)
485*4882a593Smuzhiyun {
486*4882a593Smuzhiyun uint i;
487*4882a593Smuzhiyun for (i = 0; i < LEGACY_PHYCFG_TABLE_SIZE; i++)
488*4882a593Smuzhiyun if (rate == legacy_phycfg_table[i].rate_ofdm)
489*4882a593Smuzhiyun return legacy_phycfg_table[i].tx_phy_ctl3;
490*4882a593Smuzhiyun
491*4882a593Smuzhiyun return -1;
492*4882a593Smuzhiyun }
493*4882a593Smuzhiyun
brcms_c_rateset_mcs_clear(struct brcms_c_rateset * rateset)494*4882a593Smuzhiyun void brcms_c_rateset_mcs_clear(struct brcms_c_rateset *rateset)
495*4882a593Smuzhiyun {
496*4882a593Smuzhiyun uint i;
497*4882a593Smuzhiyun for (i = 0; i < MCSSET_LEN; i++)
498*4882a593Smuzhiyun rateset->mcs[i] = 0;
499*4882a593Smuzhiyun }
500*4882a593Smuzhiyun
brcms_c_rateset_mcs_build(struct brcms_c_rateset * rateset,u8 txstreams)501*4882a593Smuzhiyun void brcms_c_rateset_mcs_build(struct brcms_c_rateset *rateset, u8 txstreams)
502*4882a593Smuzhiyun {
503*4882a593Smuzhiyun memcpy(&rateset->mcs[0], &cck_ofdm_mimo_rates.mcs[0], MCSSET_LEN);
504*4882a593Smuzhiyun brcms_c_rateset_mcs_upd(rateset, txstreams);
505*4882a593Smuzhiyun }
506*4882a593Smuzhiyun
507*4882a593Smuzhiyun /* Based on bandwidth passed, allow/disallow MCS 32 in the rateset */
brcms_c_rateset_bw_mcs_filter(struct brcms_c_rateset * rateset,u8 bw)508*4882a593Smuzhiyun void brcms_c_rateset_bw_mcs_filter(struct brcms_c_rateset *rateset, u8 bw)
509*4882a593Smuzhiyun {
510*4882a593Smuzhiyun if (bw == BRCMS_40_MHZ)
511*4882a593Smuzhiyun setbit(rateset->mcs, 32);
512*4882a593Smuzhiyun else
513*4882a593Smuzhiyun clrbit(rateset->mcs, 32);
514*4882a593Smuzhiyun }
515