xref: /OK3568_Linux_fs/kernel/drivers/net/wireless/broadcom/brcm80211/brcmsmac/antsel.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright (c) 2010 Broadcom Corporation
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * Permission to use, copy, modify, and/or distribute this software for any
5*4882a593Smuzhiyun  * purpose with or without fee is hereby granted, provided that the above
6*4882a593Smuzhiyun  * copyright notice and this permission notice appear in all copies.
7*4882a593Smuzhiyun  *
8*4882a593Smuzhiyun  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9*4882a593Smuzhiyun  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10*4882a593Smuzhiyun  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11*4882a593Smuzhiyun  * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12*4882a593Smuzhiyun  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13*4882a593Smuzhiyun  * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14*4882a593Smuzhiyun  * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15*4882a593Smuzhiyun  */
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun #include <linux/slab.h>
18*4882a593Smuzhiyun #include <net/mac80211.h>
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun #include "types.h"
21*4882a593Smuzhiyun #include "main.h"
22*4882a593Smuzhiyun #include "phy_shim.h"
23*4882a593Smuzhiyun #include "antsel.h"
24*4882a593Smuzhiyun #include "debug.h"
25*4882a593Smuzhiyun 
26*4882a593Smuzhiyun #define ANT_SELCFG_AUTO		0x80	/* bit indicates antenna sel AUTO */
27*4882a593Smuzhiyun #define ANT_SELCFG_MASK		0x33	/* antenna configuration mask */
28*4882a593Smuzhiyun #define ANT_SELCFG_TX_UNICAST	0	/* unicast tx antenna configuration */
29*4882a593Smuzhiyun #define ANT_SELCFG_RX_UNICAST	1	/* unicast rx antenna configuration */
30*4882a593Smuzhiyun #define ANT_SELCFG_TX_DEF	2	/* default tx antenna configuration */
31*4882a593Smuzhiyun #define ANT_SELCFG_RX_DEF	3	/* default rx antenna configuration */
32*4882a593Smuzhiyun 
33*4882a593Smuzhiyun /* useful macros */
34*4882a593Smuzhiyun #define BRCMS_ANTSEL_11N_0(ant)	((((ant) & ANT_SELCFG_MASK) >> 4) & 0xf)
35*4882a593Smuzhiyun #define BRCMS_ANTSEL_11N_1(ant)	(((ant) & ANT_SELCFG_MASK) & 0xf)
36*4882a593Smuzhiyun #define BRCMS_ANTIDX_11N(ant)	(((BRCMS_ANTSEL_11N_0(ant)) << 2) +\
37*4882a593Smuzhiyun 				(BRCMS_ANTSEL_11N_1(ant)))
38*4882a593Smuzhiyun #define BRCMS_ANT_ISAUTO_11N(ant) (((ant) & ANT_SELCFG_AUTO) == ANT_SELCFG_AUTO)
39*4882a593Smuzhiyun #define BRCMS_ANTSEL_11N(ant)	((ant) & ANT_SELCFG_MASK)
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun /* antenna switch */
42*4882a593Smuzhiyun /* defines for no boardlevel antenna diversity */
43*4882a593Smuzhiyun #define ANT_SELCFG_DEF_2x2	0x01	/* default antenna configuration */
44*4882a593Smuzhiyun 
45*4882a593Smuzhiyun /* 2x3 antdiv defines and tables for GPIO communication */
46*4882a593Smuzhiyun #define ANT_SELCFG_NUM_2x3	3
47*4882a593Smuzhiyun #define ANT_SELCFG_DEF_2x3	0x01	/* default antenna configuration */
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun /* 2x4 antdiv rev4 defines and tables for GPIO communication */
50*4882a593Smuzhiyun #define ANT_SELCFG_NUM_2x4	4
51*4882a593Smuzhiyun #define ANT_SELCFG_DEF_2x4	0x02	/* default antenna configuration */
52*4882a593Smuzhiyun 
53*4882a593Smuzhiyun static const u16 mimo_2x4_div_antselpat_tbl[] = {
54*4882a593Smuzhiyun 	0, 0, 0x9, 0xa,		/* ant0: 0 ant1: 2,3 */
55*4882a593Smuzhiyun 	0, 0, 0x5, 0x6,		/* ant0: 1 ant1: 2,3 */
56*4882a593Smuzhiyun 	0, 0, 0, 0,		/* n.a.              */
57*4882a593Smuzhiyun 	0, 0, 0, 0		/* n.a.              */
58*4882a593Smuzhiyun };
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun static const u8 mimo_2x4_div_antselid_tbl[16] = {
61*4882a593Smuzhiyun 	0, 0, 0, 0, 0, 2, 3, 0,
62*4882a593Smuzhiyun 	0, 0, 1, 0, 0, 0, 0, 0	/* pat to antselid */
63*4882a593Smuzhiyun };
64*4882a593Smuzhiyun 
65*4882a593Smuzhiyun static const u16 mimo_2x3_div_antselpat_tbl[] = {
66*4882a593Smuzhiyun 	16, 0, 1, 16,		/* ant0: 0 ant1: 1,2 */
67*4882a593Smuzhiyun 	16, 16, 16, 16,		/* n.a.              */
68*4882a593Smuzhiyun 	16, 2, 16, 16,		/* ant0: 2 ant1: 1   */
69*4882a593Smuzhiyun 	16, 16, 16, 16		/* n.a.              */
70*4882a593Smuzhiyun };
71*4882a593Smuzhiyun 
72*4882a593Smuzhiyun static const u8 mimo_2x3_div_antselid_tbl[16] = {
73*4882a593Smuzhiyun 	0, 1, 2, 0, 0, 0, 0, 0,
74*4882a593Smuzhiyun 	0, 0, 0, 0, 0, 0, 0, 0	/* pat to antselid */
75*4882a593Smuzhiyun };
76*4882a593Smuzhiyun 
77*4882a593Smuzhiyun /* boardlevel antenna selection: init antenna selection structure */
78*4882a593Smuzhiyun static void
brcms_c_antsel_init_cfg(struct antsel_info * asi,struct brcms_antselcfg * antsel,bool auto_sel)79*4882a593Smuzhiyun brcms_c_antsel_init_cfg(struct antsel_info *asi, struct brcms_antselcfg *antsel,
80*4882a593Smuzhiyun 		    bool auto_sel)
81*4882a593Smuzhiyun {
82*4882a593Smuzhiyun 	if (asi->antsel_type == ANTSEL_2x3) {
83*4882a593Smuzhiyun 		u8 antcfg_def = ANT_SELCFG_DEF_2x3 |
84*4882a593Smuzhiyun 		    ((asi->antsel_avail && auto_sel) ? ANT_SELCFG_AUTO : 0);
85*4882a593Smuzhiyun 		antsel->ant_config[ANT_SELCFG_TX_DEF] = antcfg_def;
86*4882a593Smuzhiyun 		antsel->ant_config[ANT_SELCFG_TX_UNICAST] = antcfg_def;
87*4882a593Smuzhiyun 		antsel->ant_config[ANT_SELCFG_RX_DEF] = antcfg_def;
88*4882a593Smuzhiyun 		antsel->ant_config[ANT_SELCFG_RX_UNICAST] = antcfg_def;
89*4882a593Smuzhiyun 		antsel->num_antcfg = ANT_SELCFG_NUM_2x3;
90*4882a593Smuzhiyun 
91*4882a593Smuzhiyun 	} else if (asi->antsel_type == ANTSEL_2x4) {
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun 		antsel->ant_config[ANT_SELCFG_TX_DEF] = ANT_SELCFG_DEF_2x4;
94*4882a593Smuzhiyun 		antsel->ant_config[ANT_SELCFG_TX_UNICAST] = ANT_SELCFG_DEF_2x4;
95*4882a593Smuzhiyun 		antsel->ant_config[ANT_SELCFG_RX_DEF] = ANT_SELCFG_DEF_2x4;
96*4882a593Smuzhiyun 		antsel->ant_config[ANT_SELCFG_RX_UNICAST] = ANT_SELCFG_DEF_2x4;
97*4882a593Smuzhiyun 		antsel->num_antcfg = ANT_SELCFG_NUM_2x4;
98*4882a593Smuzhiyun 
99*4882a593Smuzhiyun 	} else {		/* no antenna selection available */
100*4882a593Smuzhiyun 
101*4882a593Smuzhiyun 		antsel->ant_config[ANT_SELCFG_TX_DEF] = ANT_SELCFG_DEF_2x2;
102*4882a593Smuzhiyun 		antsel->ant_config[ANT_SELCFG_TX_UNICAST] = ANT_SELCFG_DEF_2x2;
103*4882a593Smuzhiyun 		antsel->ant_config[ANT_SELCFG_RX_DEF] = ANT_SELCFG_DEF_2x2;
104*4882a593Smuzhiyun 		antsel->ant_config[ANT_SELCFG_RX_UNICAST] = ANT_SELCFG_DEF_2x2;
105*4882a593Smuzhiyun 		antsel->num_antcfg = 0;
106*4882a593Smuzhiyun 	}
107*4882a593Smuzhiyun }
108*4882a593Smuzhiyun 
brcms_c_antsel_attach(struct brcms_c_info * wlc)109*4882a593Smuzhiyun struct antsel_info *brcms_c_antsel_attach(struct brcms_c_info *wlc)
110*4882a593Smuzhiyun {
111*4882a593Smuzhiyun 	struct antsel_info *asi;
112*4882a593Smuzhiyun 	struct ssb_sprom *sprom = &wlc->hw->d11core->bus->sprom;
113*4882a593Smuzhiyun 
114*4882a593Smuzhiyun 	asi = kzalloc(sizeof(struct antsel_info), GFP_ATOMIC);
115*4882a593Smuzhiyun 	if (!asi)
116*4882a593Smuzhiyun 		return NULL;
117*4882a593Smuzhiyun 
118*4882a593Smuzhiyun 	asi->wlc = wlc;
119*4882a593Smuzhiyun 	asi->pub = wlc->pub;
120*4882a593Smuzhiyun 	asi->antsel_type = ANTSEL_NA;
121*4882a593Smuzhiyun 	asi->antsel_avail = false;
122*4882a593Smuzhiyun 	asi->antsel_antswitch = sprom->antswitch;
123*4882a593Smuzhiyun 
124*4882a593Smuzhiyun 	if ((asi->pub->sromrev >= 4) && (asi->antsel_antswitch != 0)) {
125*4882a593Smuzhiyun 		switch (asi->antsel_antswitch) {
126*4882a593Smuzhiyun 		case ANTSWITCH_TYPE_1:
127*4882a593Smuzhiyun 		case ANTSWITCH_TYPE_2:
128*4882a593Smuzhiyun 		case ANTSWITCH_TYPE_3:
129*4882a593Smuzhiyun 			/* 4321/2 board with 2x3 switch logic */
130*4882a593Smuzhiyun 			asi->antsel_type = ANTSEL_2x3;
131*4882a593Smuzhiyun 			/* Antenna selection availability */
132*4882a593Smuzhiyun 			if ((sprom->ant_available_bg == 7) ||
133*4882a593Smuzhiyun 			    (sprom->ant_available_a == 7)) {
134*4882a593Smuzhiyun 				asi->antsel_avail = true;
135*4882a593Smuzhiyun 			} else if (
136*4882a593Smuzhiyun 				sprom->ant_available_bg == 3 ||
137*4882a593Smuzhiyun 				sprom->ant_available_a == 3) {
138*4882a593Smuzhiyun 				asi->antsel_avail = false;
139*4882a593Smuzhiyun 			} else {
140*4882a593Smuzhiyun 				asi->antsel_avail = false;
141*4882a593Smuzhiyun 				brcms_err(wlc->hw->d11core,
142*4882a593Smuzhiyun 					  "antsel_attach: 2o3 "
143*4882a593Smuzhiyun 					  "board cfg invalid\n");
144*4882a593Smuzhiyun 			}
145*4882a593Smuzhiyun 
146*4882a593Smuzhiyun 			break;
147*4882a593Smuzhiyun 		default:
148*4882a593Smuzhiyun 			break;
149*4882a593Smuzhiyun 		}
150*4882a593Smuzhiyun 	} else if ((asi->pub->sromrev == 4) &&
151*4882a593Smuzhiyun 		   (sprom->ant_available_bg == 7) &&
152*4882a593Smuzhiyun 		   (sprom->ant_available_a == 0)) {
153*4882a593Smuzhiyun 		/* hack to match old 4321CB2 cards with 2of3 antenna switch */
154*4882a593Smuzhiyun 		asi->antsel_type = ANTSEL_2x3;
155*4882a593Smuzhiyun 		asi->antsel_avail = true;
156*4882a593Smuzhiyun 	} else if (asi->pub->boardflags2 & BFL2_2X4_DIV) {
157*4882a593Smuzhiyun 		asi->antsel_type = ANTSEL_2x4;
158*4882a593Smuzhiyun 		asi->antsel_avail = true;
159*4882a593Smuzhiyun 	}
160*4882a593Smuzhiyun 
161*4882a593Smuzhiyun 	/* Set the antenna selection type for the low driver */
162*4882a593Smuzhiyun 	brcms_b_antsel_type_set(wlc->hw, asi->antsel_type);
163*4882a593Smuzhiyun 
164*4882a593Smuzhiyun 	/* Init (auto/manual) antenna selection */
165*4882a593Smuzhiyun 	brcms_c_antsel_init_cfg(asi, &asi->antcfg_11n, true);
166*4882a593Smuzhiyun 	brcms_c_antsel_init_cfg(asi, &asi->antcfg_cur, true);
167*4882a593Smuzhiyun 
168*4882a593Smuzhiyun 	return asi;
169*4882a593Smuzhiyun }
170*4882a593Smuzhiyun 
brcms_c_antsel_detach(struct antsel_info * asi)171*4882a593Smuzhiyun void brcms_c_antsel_detach(struct antsel_info *asi)
172*4882a593Smuzhiyun {
173*4882a593Smuzhiyun 	kfree(asi);
174*4882a593Smuzhiyun }
175*4882a593Smuzhiyun 
176*4882a593Smuzhiyun /*
177*4882a593Smuzhiyun  * boardlevel antenna selection:
178*4882a593Smuzhiyun  *   convert ant_cfg to mimo_antsel (ucode interface)
179*4882a593Smuzhiyun  */
brcms_c_antsel_antcfg2antsel(struct antsel_info * asi,u8 ant_cfg)180*4882a593Smuzhiyun static u16 brcms_c_antsel_antcfg2antsel(struct antsel_info *asi, u8 ant_cfg)
181*4882a593Smuzhiyun {
182*4882a593Smuzhiyun 	u8 idx = BRCMS_ANTIDX_11N(BRCMS_ANTSEL_11N(ant_cfg));
183*4882a593Smuzhiyun 	u16 mimo_antsel = 0;
184*4882a593Smuzhiyun 
185*4882a593Smuzhiyun 	if (asi->antsel_type == ANTSEL_2x4) {
186*4882a593Smuzhiyun 		/* 2x4 antenna diversity board, 4 cfgs: 0-2 0-3 1-2 1-3 */
187*4882a593Smuzhiyun 		mimo_antsel = (mimo_2x4_div_antselpat_tbl[idx] & 0xf);
188*4882a593Smuzhiyun 		return mimo_antsel;
189*4882a593Smuzhiyun 
190*4882a593Smuzhiyun 	} else if (asi->antsel_type == ANTSEL_2x3) {
191*4882a593Smuzhiyun 		/* 2x3 antenna selection, 3 cfgs: 0-1 0-2 2-1 */
192*4882a593Smuzhiyun 		mimo_antsel = (mimo_2x3_div_antselpat_tbl[idx] & 0xf);
193*4882a593Smuzhiyun 		return mimo_antsel;
194*4882a593Smuzhiyun 	}
195*4882a593Smuzhiyun 
196*4882a593Smuzhiyun 	return mimo_antsel;
197*4882a593Smuzhiyun }
198*4882a593Smuzhiyun 
199*4882a593Smuzhiyun /* boardlevel antenna selection: ucode interface control */
brcms_c_antsel_cfgupd(struct antsel_info * asi,struct brcms_antselcfg * antsel)200*4882a593Smuzhiyun static int brcms_c_antsel_cfgupd(struct antsel_info *asi,
201*4882a593Smuzhiyun 				 struct brcms_antselcfg *antsel)
202*4882a593Smuzhiyun {
203*4882a593Smuzhiyun 	struct brcms_c_info *wlc = asi->wlc;
204*4882a593Smuzhiyun 	u8 ant_cfg;
205*4882a593Smuzhiyun 	u16 mimo_antsel;
206*4882a593Smuzhiyun 
207*4882a593Smuzhiyun 	/* 1) Update TX antconfig for all frames that are not unicast data
208*4882a593Smuzhiyun 	 *    (aka default TX)
209*4882a593Smuzhiyun 	 */
210*4882a593Smuzhiyun 	ant_cfg = antsel->ant_config[ANT_SELCFG_TX_DEF];
211*4882a593Smuzhiyun 	mimo_antsel = brcms_c_antsel_antcfg2antsel(asi, ant_cfg);
212*4882a593Smuzhiyun 	brcms_b_write_shm(wlc->hw, M_MIMO_ANTSEL_TXDFLT, mimo_antsel);
213*4882a593Smuzhiyun 	/*
214*4882a593Smuzhiyun 	 * Update driver stats for currently selected
215*4882a593Smuzhiyun 	 * default tx/rx antenna config
216*4882a593Smuzhiyun 	 */
217*4882a593Smuzhiyun 	asi->antcfg_cur.ant_config[ANT_SELCFG_TX_DEF] = ant_cfg;
218*4882a593Smuzhiyun 
219*4882a593Smuzhiyun 	/* 2) Update RX antconfig for all frames that are not unicast data
220*4882a593Smuzhiyun 	 *    (aka default RX)
221*4882a593Smuzhiyun 	 */
222*4882a593Smuzhiyun 	ant_cfg = antsel->ant_config[ANT_SELCFG_RX_DEF];
223*4882a593Smuzhiyun 	mimo_antsel = brcms_c_antsel_antcfg2antsel(asi, ant_cfg);
224*4882a593Smuzhiyun 	brcms_b_write_shm(wlc->hw, M_MIMO_ANTSEL_RXDFLT, mimo_antsel);
225*4882a593Smuzhiyun 	/*
226*4882a593Smuzhiyun 	 * Update driver stats for currently selected
227*4882a593Smuzhiyun 	 * default tx/rx antenna config
228*4882a593Smuzhiyun 	 */
229*4882a593Smuzhiyun 	asi->antcfg_cur.ant_config[ANT_SELCFG_RX_DEF] = ant_cfg;
230*4882a593Smuzhiyun 
231*4882a593Smuzhiyun 	return 0;
232*4882a593Smuzhiyun }
233*4882a593Smuzhiyun 
brcms_c_antsel_init(struct antsel_info * asi)234*4882a593Smuzhiyun void brcms_c_antsel_init(struct antsel_info *asi)
235*4882a593Smuzhiyun {
236*4882a593Smuzhiyun 	if ((asi->antsel_type == ANTSEL_2x3) ||
237*4882a593Smuzhiyun 	    (asi->antsel_type == ANTSEL_2x4))
238*4882a593Smuzhiyun 		brcms_c_antsel_cfgupd(asi, &asi->antcfg_11n);
239*4882a593Smuzhiyun }
240*4882a593Smuzhiyun 
241*4882a593Smuzhiyun /* boardlevel antenna selection: convert id to ant_cfg */
brcms_c_antsel_id2antcfg(struct antsel_info * asi,u8 id)242*4882a593Smuzhiyun static u8 brcms_c_antsel_id2antcfg(struct antsel_info *asi, u8 id)
243*4882a593Smuzhiyun {
244*4882a593Smuzhiyun 	u8 antcfg = ANT_SELCFG_DEF_2x2;
245*4882a593Smuzhiyun 
246*4882a593Smuzhiyun 	if (asi->antsel_type == ANTSEL_2x4) {
247*4882a593Smuzhiyun 		/* 2x4 antenna diversity board, 4 cfgs: 0-2 0-3 1-2 1-3 */
248*4882a593Smuzhiyun 		antcfg = (((id & 0x2) << 3) | ((id & 0x1) + 2));
249*4882a593Smuzhiyun 		return antcfg;
250*4882a593Smuzhiyun 
251*4882a593Smuzhiyun 	} else if (asi->antsel_type == ANTSEL_2x3) {
252*4882a593Smuzhiyun 		/* 2x3 antenna selection, 3 cfgs: 0-1 0-2 2-1 */
253*4882a593Smuzhiyun 		antcfg = (((id & 0x02) << 4) | ((id & 0x1) + 1));
254*4882a593Smuzhiyun 		return antcfg;
255*4882a593Smuzhiyun 	}
256*4882a593Smuzhiyun 
257*4882a593Smuzhiyun 	return antcfg;
258*4882a593Smuzhiyun }
259*4882a593Smuzhiyun 
260*4882a593Smuzhiyun void
brcms_c_antsel_antcfg_get(struct antsel_info * asi,bool usedef,bool sel,u8 antselid,u8 fbantselid,u8 * antcfg,u8 * fbantcfg)261*4882a593Smuzhiyun brcms_c_antsel_antcfg_get(struct antsel_info *asi, bool usedef, bool sel,
262*4882a593Smuzhiyun 		      u8 antselid, u8 fbantselid, u8 *antcfg,
263*4882a593Smuzhiyun 		      u8 *fbantcfg)
264*4882a593Smuzhiyun {
265*4882a593Smuzhiyun 	u8 ant;
266*4882a593Smuzhiyun 
267*4882a593Smuzhiyun 	/* if use default, assign it and return */
268*4882a593Smuzhiyun 	if (usedef) {
269*4882a593Smuzhiyun 		*antcfg = asi->antcfg_11n.ant_config[ANT_SELCFG_TX_DEF];
270*4882a593Smuzhiyun 		*fbantcfg = *antcfg;
271*4882a593Smuzhiyun 		return;
272*4882a593Smuzhiyun 	}
273*4882a593Smuzhiyun 
274*4882a593Smuzhiyun 	if (!sel) {
275*4882a593Smuzhiyun 		*antcfg = asi->antcfg_11n.ant_config[ANT_SELCFG_TX_UNICAST];
276*4882a593Smuzhiyun 		*fbantcfg = *antcfg;
277*4882a593Smuzhiyun 
278*4882a593Smuzhiyun 	} else {
279*4882a593Smuzhiyun 		ant = asi->antcfg_11n.ant_config[ANT_SELCFG_TX_UNICAST];
280*4882a593Smuzhiyun 		if ((ant & ANT_SELCFG_AUTO) == ANT_SELCFG_AUTO) {
281*4882a593Smuzhiyun 			*antcfg = brcms_c_antsel_id2antcfg(asi, antselid);
282*4882a593Smuzhiyun 			*fbantcfg = brcms_c_antsel_id2antcfg(asi, fbantselid);
283*4882a593Smuzhiyun 		} else {
284*4882a593Smuzhiyun 			*antcfg =
285*4882a593Smuzhiyun 			    asi->antcfg_11n.ant_config[ANT_SELCFG_TX_UNICAST];
286*4882a593Smuzhiyun 			*fbantcfg = *antcfg;
287*4882a593Smuzhiyun 		}
288*4882a593Smuzhiyun 	}
289*4882a593Smuzhiyun 	return;
290*4882a593Smuzhiyun }
291*4882a593Smuzhiyun 
292*4882a593Smuzhiyun /* boardlevel antenna selection: convert mimo_antsel (ucode interface) to id */
brcms_c_antsel_antsel2id(struct antsel_info * asi,u16 antsel)293*4882a593Smuzhiyun u8 brcms_c_antsel_antsel2id(struct antsel_info *asi, u16 antsel)
294*4882a593Smuzhiyun {
295*4882a593Smuzhiyun 	u8 antselid = 0;
296*4882a593Smuzhiyun 
297*4882a593Smuzhiyun 	if (asi->antsel_type == ANTSEL_2x4) {
298*4882a593Smuzhiyun 		/* 2x4 antenna diversity board, 4 cfgs: 0-2 0-3 1-2 1-3 */
299*4882a593Smuzhiyun 		antselid = mimo_2x4_div_antselid_tbl[(antsel & 0xf)];
300*4882a593Smuzhiyun 		return antselid;
301*4882a593Smuzhiyun 
302*4882a593Smuzhiyun 	} else if (asi->antsel_type == ANTSEL_2x3) {
303*4882a593Smuzhiyun 		/* 2x3 antenna selection, 3 cfgs: 0-1 0-2 2-1 */
304*4882a593Smuzhiyun 		antselid = mimo_2x3_div_antselid_tbl[(antsel & 0xf)];
305*4882a593Smuzhiyun 		return antselid;
306*4882a593Smuzhiyun 	}
307*4882a593Smuzhiyun 
308*4882a593Smuzhiyun 	return antselid;
309*4882a593Smuzhiyun }
310