xref: /OK3568_Linux_fs/kernel/drivers/net/wireless/broadcom/b43legacy/phy.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun 
4*4882a593Smuzhiyun   Broadcom B43legacy wireless driver
5*4882a593Smuzhiyun 
6*4882a593Smuzhiyun   Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>,
7*4882a593Smuzhiyun 		     Stefano Brivio <stefano.brivio@polimi.it>
8*4882a593Smuzhiyun 		     Michael Buesch <m@bues.ch>
9*4882a593Smuzhiyun 		     Danny van Dyk <kugelfang@gentoo.org>
10*4882a593Smuzhiyun      Andreas Jaggi <andreas.jaggi@waterwave.ch>
11*4882a593Smuzhiyun   Copyright (c) 2007 Larry Finger <Larry.Finger@lwfinger.net>
12*4882a593Smuzhiyun 
13*4882a593Smuzhiyun   Some parts of the code in this file are derived from the ipw2200
14*4882a593Smuzhiyun   driver  Copyright(c) 2003 - 2004 Intel Corporation.
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun 
17*4882a593Smuzhiyun */
18*4882a593Smuzhiyun 
19*4882a593Smuzhiyun #include <linux/delay.h>
20*4882a593Smuzhiyun #include <linux/pci.h>
21*4882a593Smuzhiyun #include <linux/sched.h>
22*4882a593Smuzhiyun #include <linux/slab.h>
23*4882a593Smuzhiyun #include <linux/types.h>
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun #include "b43legacy.h"
26*4882a593Smuzhiyun #include "phy.h"
27*4882a593Smuzhiyun #include "main.h"
28*4882a593Smuzhiyun #include "radio.h"
29*4882a593Smuzhiyun #include "ilt.h"
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun static const s8 b43legacy_tssi2dbm_b_table[] = {
33*4882a593Smuzhiyun 	0x4D, 0x4C, 0x4B, 0x4A,
34*4882a593Smuzhiyun 	0x4A, 0x49, 0x48, 0x47,
35*4882a593Smuzhiyun 	0x47, 0x46, 0x45, 0x45,
36*4882a593Smuzhiyun 	0x44, 0x43, 0x42, 0x42,
37*4882a593Smuzhiyun 	0x41, 0x40, 0x3F, 0x3E,
38*4882a593Smuzhiyun 	0x3D, 0x3C, 0x3B, 0x3A,
39*4882a593Smuzhiyun 	0x39, 0x38, 0x37, 0x36,
40*4882a593Smuzhiyun 	0x35, 0x34, 0x32, 0x31,
41*4882a593Smuzhiyun 	0x30, 0x2F, 0x2D, 0x2C,
42*4882a593Smuzhiyun 	0x2B, 0x29, 0x28, 0x26,
43*4882a593Smuzhiyun 	0x25, 0x23, 0x21, 0x1F,
44*4882a593Smuzhiyun 	0x1D, 0x1A, 0x17, 0x14,
45*4882a593Smuzhiyun 	0x10, 0x0C, 0x06, 0x00,
46*4882a593Smuzhiyun 	  -7,   -7,   -7,   -7,
47*4882a593Smuzhiyun 	  -7,   -7,   -7,   -7,
48*4882a593Smuzhiyun 	  -7,   -7,   -7,   -7,
49*4882a593Smuzhiyun };
50*4882a593Smuzhiyun 
51*4882a593Smuzhiyun static const s8 b43legacy_tssi2dbm_g_table[] = {
52*4882a593Smuzhiyun 	 77,  77,  77,  76,
53*4882a593Smuzhiyun 	 76,  76,  75,  75,
54*4882a593Smuzhiyun 	 74,  74,  73,  73,
55*4882a593Smuzhiyun 	 73,  72,  72,  71,
56*4882a593Smuzhiyun 	 71,  70,  70,  69,
57*4882a593Smuzhiyun 	 68,  68,  67,  67,
58*4882a593Smuzhiyun 	 66,  65,  65,  64,
59*4882a593Smuzhiyun 	 63,  63,  62,  61,
60*4882a593Smuzhiyun 	 60,  59,  58,  57,
61*4882a593Smuzhiyun 	 56,  55,  54,  53,
62*4882a593Smuzhiyun 	 52,  50,  49,  47,
63*4882a593Smuzhiyun 	 45,  43,  40,  37,
64*4882a593Smuzhiyun 	 33,  28,  22,  14,
65*4882a593Smuzhiyun 	  5,  -7, -20, -20,
66*4882a593Smuzhiyun 	-20, -20, -20, -20,
67*4882a593Smuzhiyun 	-20, -20, -20, -20,
68*4882a593Smuzhiyun };
69*4882a593Smuzhiyun 
70*4882a593Smuzhiyun static void b43legacy_phy_initg(struct b43legacy_wldev *dev);
71*4882a593Smuzhiyun 
72*4882a593Smuzhiyun /* Lock the PHY registers against concurrent access from the microcode.
73*4882a593Smuzhiyun  * This lock is nonrecursive. */
b43legacy_phy_lock(struct b43legacy_wldev * dev)74*4882a593Smuzhiyun void b43legacy_phy_lock(struct b43legacy_wldev *dev)
75*4882a593Smuzhiyun {
76*4882a593Smuzhiyun #if B43legacy_DEBUG
77*4882a593Smuzhiyun 	B43legacy_WARN_ON(dev->phy.phy_locked);
78*4882a593Smuzhiyun 	dev->phy.phy_locked = 1;
79*4882a593Smuzhiyun #endif
80*4882a593Smuzhiyun 
81*4882a593Smuzhiyun 	if (dev->dev->id.revision < 3) {
82*4882a593Smuzhiyun 		b43legacy_mac_suspend(dev);
83*4882a593Smuzhiyun 	} else {
84*4882a593Smuzhiyun 		if (!b43legacy_is_mode(dev->wl, NL80211_IFTYPE_AP))
85*4882a593Smuzhiyun 			b43legacy_power_saving_ctl_bits(dev, -1, 1);
86*4882a593Smuzhiyun 	}
87*4882a593Smuzhiyun }
88*4882a593Smuzhiyun 
b43legacy_phy_unlock(struct b43legacy_wldev * dev)89*4882a593Smuzhiyun void b43legacy_phy_unlock(struct b43legacy_wldev *dev)
90*4882a593Smuzhiyun {
91*4882a593Smuzhiyun #if B43legacy_DEBUG
92*4882a593Smuzhiyun 	B43legacy_WARN_ON(!dev->phy.phy_locked);
93*4882a593Smuzhiyun 	dev->phy.phy_locked = 0;
94*4882a593Smuzhiyun #endif
95*4882a593Smuzhiyun 
96*4882a593Smuzhiyun 	if (dev->dev->id.revision < 3) {
97*4882a593Smuzhiyun 		b43legacy_mac_enable(dev);
98*4882a593Smuzhiyun 	} else {
99*4882a593Smuzhiyun 		if (!b43legacy_is_mode(dev->wl, NL80211_IFTYPE_AP))
100*4882a593Smuzhiyun 			b43legacy_power_saving_ctl_bits(dev, -1, -1);
101*4882a593Smuzhiyun 	}
102*4882a593Smuzhiyun }
103*4882a593Smuzhiyun 
b43legacy_phy_read(struct b43legacy_wldev * dev,u16 offset)104*4882a593Smuzhiyun u16 b43legacy_phy_read(struct b43legacy_wldev *dev, u16 offset)
105*4882a593Smuzhiyun {
106*4882a593Smuzhiyun 	b43legacy_write16(dev, B43legacy_MMIO_PHY_CONTROL, offset);
107*4882a593Smuzhiyun 	return b43legacy_read16(dev, B43legacy_MMIO_PHY_DATA);
108*4882a593Smuzhiyun }
109*4882a593Smuzhiyun 
b43legacy_phy_write(struct b43legacy_wldev * dev,u16 offset,u16 val)110*4882a593Smuzhiyun void b43legacy_phy_write(struct b43legacy_wldev *dev, u16 offset, u16 val)
111*4882a593Smuzhiyun {
112*4882a593Smuzhiyun 	b43legacy_write16(dev, B43legacy_MMIO_PHY_CONTROL, offset);
113*4882a593Smuzhiyun 	b43legacy_write16(dev, B43legacy_MMIO_PHY_DATA, val);
114*4882a593Smuzhiyun }
115*4882a593Smuzhiyun 
b43legacy_phy_calibrate(struct b43legacy_wldev * dev)116*4882a593Smuzhiyun void b43legacy_phy_calibrate(struct b43legacy_wldev *dev)
117*4882a593Smuzhiyun {
118*4882a593Smuzhiyun 	struct b43legacy_phy *phy = &dev->phy;
119*4882a593Smuzhiyun 
120*4882a593Smuzhiyun 	b43legacy_read32(dev, B43legacy_MMIO_MACCTL); /* Dummy read. */
121*4882a593Smuzhiyun 	if (phy->calibrated)
122*4882a593Smuzhiyun 		return;
123*4882a593Smuzhiyun 	if (phy->type == B43legacy_PHYTYPE_G && phy->rev == 1) {
124*4882a593Smuzhiyun 		b43legacy_wireless_core_reset(dev, 0);
125*4882a593Smuzhiyun 		b43legacy_phy_initg(dev);
126*4882a593Smuzhiyun 		b43legacy_wireless_core_reset(dev, B43legacy_TMSLOW_GMODE);
127*4882a593Smuzhiyun 	}
128*4882a593Smuzhiyun 	phy->calibrated = 1;
129*4882a593Smuzhiyun }
130*4882a593Smuzhiyun 
131*4882a593Smuzhiyun /* initialize B PHY power control
132*4882a593Smuzhiyun  * as described in https://bcm-specs.sipsolutions.net/InitPowerControl
133*4882a593Smuzhiyun  */
b43legacy_phy_init_pctl(struct b43legacy_wldev * dev)134*4882a593Smuzhiyun static void b43legacy_phy_init_pctl(struct b43legacy_wldev *dev)
135*4882a593Smuzhiyun {
136*4882a593Smuzhiyun 	struct b43legacy_phy *phy = &dev->phy;
137*4882a593Smuzhiyun 	u16 saved_batt = 0;
138*4882a593Smuzhiyun 	u16 saved_ratt = 0;
139*4882a593Smuzhiyun 	u16 saved_txctl1 = 0;
140*4882a593Smuzhiyun 	int must_reset_txpower = 0;
141*4882a593Smuzhiyun 
142*4882a593Smuzhiyun 	B43legacy_BUG_ON(!(phy->type == B43legacy_PHYTYPE_B ||
143*4882a593Smuzhiyun 			  phy->type == B43legacy_PHYTYPE_G));
144*4882a593Smuzhiyun 	if (is_bcm_board_vendor(dev) &&
145*4882a593Smuzhiyun 	    (dev->dev->bus->boardinfo.type == 0x0416))
146*4882a593Smuzhiyun 		return;
147*4882a593Smuzhiyun 
148*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x0028, 0x8018);
149*4882a593Smuzhiyun 	b43legacy_write16(dev, 0x03E6, b43legacy_read16(dev, 0x03E6) & 0xFFDF);
150*4882a593Smuzhiyun 
151*4882a593Smuzhiyun 	if (phy->type == B43legacy_PHYTYPE_G) {
152*4882a593Smuzhiyun 		if (!phy->gmode)
153*4882a593Smuzhiyun 			return;
154*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x047A, 0xC111);
155*4882a593Smuzhiyun 	}
156*4882a593Smuzhiyun 	if (phy->savedpctlreg != 0xFFFF)
157*4882a593Smuzhiyun 		return;
158*4882a593Smuzhiyun #ifdef CONFIG_B43LEGACY_DEBUG
159*4882a593Smuzhiyun 	if (phy->manual_txpower_control)
160*4882a593Smuzhiyun 		return;
161*4882a593Smuzhiyun #endif
162*4882a593Smuzhiyun 
163*4882a593Smuzhiyun 	if (phy->type == B43legacy_PHYTYPE_B &&
164*4882a593Smuzhiyun 	    phy->rev >= 2 &&
165*4882a593Smuzhiyun 	    phy->radio_ver == 0x2050)
166*4882a593Smuzhiyun 		b43legacy_radio_write16(dev, 0x0076,
167*4882a593Smuzhiyun 					b43legacy_radio_read16(dev, 0x0076)
168*4882a593Smuzhiyun 					| 0x0084);
169*4882a593Smuzhiyun 	else {
170*4882a593Smuzhiyun 		saved_batt = phy->bbatt;
171*4882a593Smuzhiyun 		saved_ratt = phy->rfatt;
172*4882a593Smuzhiyun 		saved_txctl1 = phy->txctl1;
173*4882a593Smuzhiyun 		if ((phy->radio_rev >= 6) && (phy->radio_rev <= 8)
174*4882a593Smuzhiyun 		    && /*FIXME: incomplete specs for 5 < revision < 9 */ 0)
175*4882a593Smuzhiyun 			b43legacy_radio_set_txpower_bg(dev, 0xB, 0x1F, 0);
176*4882a593Smuzhiyun 		else
177*4882a593Smuzhiyun 			b43legacy_radio_set_txpower_bg(dev, 0xB, 9, 0);
178*4882a593Smuzhiyun 		must_reset_txpower = 1;
179*4882a593Smuzhiyun 	}
180*4882a593Smuzhiyun 	b43legacy_dummy_transmission(dev);
181*4882a593Smuzhiyun 
182*4882a593Smuzhiyun 	phy->savedpctlreg = b43legacy_phy_read(dev, B43legacy_PHY_G_PCTL);
183*4882a593Smuzhiyun 
184*4882a593Smuzhiyun 	if (must_reset_txpower)
185*4882a593Smuzhiyun 		b43legacy_radio_set_txpower_bg(dev, saved_batt, saved_ratt,
186*4882a593Smuzhiyun 					       saved_txctl1);
187*4882a593Smuzhiyun 	else
188*4882a593Smuzhiyun 		b43legacy_radio_write16(dev, 0x0076, b43legacy_radio_read16(dev,
189*4882a593Smuzhiyun 					0x0076) & 0xFF7B);
190*4882a593Smuzhiyun 	b43legacy_radio_clear_tssi(dev);
191*4882a593Smuzhiyun }
192*4882a593Smuzhiyun 
b43legacy_phy_agcsetup(struct b43legacy_wldev * dev)193*4882a593Smuzhiyun static void b43legacy_phy_agcsetup(struct b43legacy_wldev *dev)
194*4882a593Smuzhiyun {
195*4882a593Smuzhiyun 	struct b43legacy_phy *phy = &dev->phy;
196*4882a593Smuzhiyun 	u16 offset = 0x0000;
197*4882a593Smuzhiyun 
198*4882a593Smuzhiyun 	if (phy->rev == 1)
199*4882a593Smuzhiyun 		offset = 0x4C00;
200*4882a593Smuzhiyun 
201*4882a593Smuzhiyun 	b43legacy_ilt_write(dev, offset, 0x00FE);
202*4882a593Smuzhiyun 	b43legacy_ilt_write(dev, offset + 1, 0x000D);
203*4882a593Smuzhiyun 	b43legacy_ilt_write(dev, offset + 2, 0x0013);
204*4882a593Smuzhiyun 	b43legacy_ilt_write(dev, offset + 3, 0x0019);
205*4882a593Smuzhiyun 
206*4882a593Smuzhiyun 	if (phy->rev == 1) {
207*4882a593Smuzhiyun 		b43legacy_ilt_write(dev, 0x1800, 0x2710);
208*4882a593Smuzhiyun 		b43legacy_ilt_write(dev, 0x1801, 0x9B83);
209*4882a593Smuzhiyun 		b43legacy_ilt_write(dev, 0x1802, 0x9B83);
210*4882a593Smuzhiyun 		b43legacy_ilt_write(dev, 0x1803, 0x0F8D);
211*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0455, 0x0004);
212*4882a593Smuzhiyun 	}
213*4882a593Smuzhiyun 
214*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x04A5, (b43legacy_phy_read(dev, 0x04A5)
215*4882a593Smuzhiyun 					  & 0x00FF) | 0x5700);
216*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x041A, (b43legacy_phy_read(dev, 0x041A)
217*4882a593Smuzhiyun 					  & 0xFF80) | 0x000F);
218*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x041A, (b43legacy_phy_read(dev, 0x041A)
219*4882a593Smuzhiyun 					  & 0xC07F) | 0x2B80);
220*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x048C, (b43legacy_phy_read(dev, 0x048C)
221*4882a593Smuzhiyun 					  & 0xF0FF) | 0x0300);
222*4882a593Smuzhiyun 
223*4882a593Smuzhiyun 	b43legacy_radio_write16(dev, 0x007A,
224*4882a593Smuzhiyun 				b43legacy_radio_read16(dev, 0x007A)
225*4882a593Smuzhiyun 				| 0x0008);
226*4882a593Smuzhiyun 
227*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x04A0, (b43legacy_phy_read(dev, 0x04A0)
228*4882a593Smuzhiyun 			    & 0xFFF0) | 0x0008);
229*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x04A1, (b43legacy_phy_read(dev, 0x04A1)
230*4882a593Smuzhiyun 			    & 0xF0FF) | 0x0600);
231*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x04A2, (b43legacy_phy_read(dev, 0x04A2)
232*4882a593Smuzhiyun 			    & 0xF0FF) | 0x0700);
233*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x04A0, (b43legacy_phy_read(dev, 0x04A0)
234*4882a593Smuzhiyun 			    & 0xF0FF) | 0x0100);
235*4882a593Smuzhiyun 
236*4882a593Smuzhiyun 	if (phy->rev == 1)
237*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x04A2,
238*4882a593Smuzhiyun 				    (b43legacy_phy_read(dev, 0x04A2)
239*4882a593Smuzhiyun 				    & 0xFFF0) | 0x0007);
240*4882a593Smuzhiyun 
241*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x0488, (b43legacy_phy_read(dev, 0x0488)
242*4882a593Smuzhiyun 			    & 0xFF00) | 0x001C);
243*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x0488, (b43legacy_phy_read(dev, 0x0488)
244*4882a593Smuzhiyun 			    & 0xC0FF) | 0x0200);
245*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x0496, (b43legacy_phy_read(dev, 0x0496)
246*4882a593Smuzhiyun 			    & 0xFF00) | 0x001C);
247*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x0489, (b43legacy_phy_read(dev, 0x0489)
248*4882a593Smuzhiyun 			    & 0xFF00) | 0x0020);
249*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x0489, (b43legacy_phy_read(dev, 0x0489)
250*4882a593Smuzhiyun 			    & 0xC0FF) | 0x0200);
251*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x0482, (b43legacy_phy_read(dev, 0x0482)
252*4882a593Smuzhiyun 			    & 0xFF00) | 0x002E);
253*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x0496, (b43legacy_phy_read(dev, 0x0496)
254*4882a593Smuzhiyun 			    & 0x00FF) | 0x1A00);
255*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x0481, (b43legacy_phy_read(dev, 0x0481)
256*4882a593Smuzhiyun 			    & 0xFF00) | 0x0028);
257*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x0481, (b43legacy_phy_read(dev, 0x0481)
258*4882a593Smuzhiyun 			    & 0x00FF) | 0x2C00);
259*4882a593Smuzhiyun 
260*4882a593Smuzhiyun 	if (phy->rev == 1) {
261*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0430, 0x092B);
262*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x041B,
263*4882a593Smuzhiyun 				    (b43legacy_phy_read(dev, 0x041B)
264*4882a593Smuzhiyun 				    & 0xFFE1) | 0x0002);
265*4882a593Smuzhiyun 	} else {
266*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x041B,
267*4882a593Smuzhiyun 				    b43legacy_phy_read(dev, 0x041B) & 0xFFE1);
268*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x041F, 0x287A);
269*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0420,
270*4882a593Smuzhiyun 				    (b43legacy_phy_read(dev, 0x0420)
271*4882a593Smuzhiyun 				    & 0xFFF0) | 0x0004);
272*4882a593Smuzhiyun 	}
273*4882a593Smuzhiyun 
274*4882a593Smuzhiyun 	if (phy->rev > 2) {
275*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0422, 0x287A);
276*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0420,
277*4882a593Smuzhiyun 				    (b43legacy_phy_read(dev, 0x0420)
278*4882a593Smuzhiyun 				    & 0x0FFF) | 0x3000);
279*4882a593Smuzhiyun 	}
280*4882a593Smuzhiyun 
281*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x04A8, (b43legacy_phy_read(dev, 0x04A8)
282*4882a593Smuzhiyun 			    & 0x8080) | 0x7874);
283*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x048E, 0x1C00);
284*4882a593Smuzhiyun 
285*4882a593Smuzhiyun 	if (phy->rev == 1) {
286*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x04AB,
287*4882a593Smuzhiyun 				    (b43legacy_phy_read(dev, 0x04AB)
288*4882a593Smuzhiyun 				    & 0xF0FF) | 0x0600);
289*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x048B, 0x005E);
290*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x048C,
291*4882a593Smuzhiyun 				    (b43legacy_phy_read(dev, 0x048C) & 0xFF00)
292*4882a593Smuzhiyun 				    | 0x001E);
293*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x048D, 0x0002);
294*4882a593Smuzhiyun 	}
295*4882a593Smuzhiyun 
296*4882a593Smuzhiyun 	b43legacy_ilt_write(dev, offset + 0x0800, 0);
297*4882a593Smuzhiyun 	b43legacy_ilt_write(dev, offset + 0x0801, 7);
298*4882a593Smuzhiyun 	b43legacy_ilt_write(dev, offset + 0x0802, 16);
299*4882a593Smuzhiyun 	b43legacy_ilt_write(dev, offset + 0x0803, 28);
300*4882a593Smuzhiyun 
301*4882a593Smuzhiyun 	if (phy->rev >= 6) {
302*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0426,
303*4882a593Smuzhiyun 				    (b43legacy_phy_read(dev, 0x0426) & 0xFFFC));
304*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0426,
305*4882a593Smuzhiyun 				    (b43legacy_phy_read(dev, 0x0426) & 0xEFFF));
306*4882a593Smuzhiyun 	}
307*4882a593Smuzhiyun }
308*4882a593Smuzhiyun 
b43legacy_phy_setupg(struct b43legacy_wldev * dev)309*4882a593Smuzhiyun static void b43legacy_phy_setupg(struct b43legacy_wldev *dev)
310*4882a593Smuzhiyun {
311*4882a593Smuzhiyun 	struct b43legacy_phy *phy = &dev->phy;
312*4882a593Smuzhiyun 	u16 i;
313*4882a593Smuzhiyun 
314*4882a593Smuzhiyun 	B43legacy_BUG_ON(phy->type != B43legacy_PHYTYPE_G);
315*4882a593Smuzhiyun 	if (phy->rev == 1) {
316*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0406, 0x4F19);
317*4882a593Smuzhiyun 		b43legacy_phy_write(dev, B43legacy_PHY_G_CRS,
318*4882a593Smuzhiyun 				    (b43legacy_phy_read(dev,
319*4882a593Smuzhiyun 				    B43legacy_PHY_G_CRS) & 0xFC3F) | 0x0340);
320*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x042C, 0x005A);
321*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0427, 0x001A);
322*4882a593Smuzhiyun 
323*4882a593Smuzhiyun 		for (i = 0; i < B43legacy_ILT_FINEFREQG_SIZE; i++)
324*4882a593Smuzhiyun 			b43legacy_ilt_write(dev, 0x5800 + i,
325*4882a593Smuzhiyun 					    b43legacy_ilt_finefreqg[i]);
326*4882a593Smuzhiyun 		for (i = 0; i < B43legacy_ILT_NOISEG1_SIZE; i++)
327*4882a593Smuzhiyun 			b43legacy_ilt_write(dev, 0x1800 + i,
328*4882a593Smuzhiyun 					    b43legacy_ilt_noiseg1[i]);
329*4882a593Smuzhiyun 		for (i = 0; i < B43legacy_ILT_ROTOR_SIZE; i++)
330*4882a593Smuzhiyun 			b43legacy_ilt_write32(dev, 0x2000 + i,
331*4882a593Smuzhiyun 					      b43legacy_ilt_rotor[i]);
332*4882a593Smuzhiyun 	} else {
333*4882a593Smuzhiyun 		/* nrssi values are signed 6-bit values. Why 0x7654 here? */
334*4882a593Smuzhiyun 		b43legacy_nrssi_hw_write(dev, 0xBA98, (s16)0x7654);
335*4882a593Smuzhiyun 
336*4882a593Smuzhiyun 		if (phy->rev == 2) {
337*4882a593Smuzhiyun 			b43legacy_phy_write(dev, 0x04C0, 0x1861);
338*4882a593Smuzhiyun 			b43legacy_phy_write(dev, 0x04C1, 0x0271);
339*4882a593Smuzhiyun 		} else if (phy->rev > 2) {
340*4882a593Smuzhiyun 			b43legacy_phy_write(dev, 0x04C0, 0x0098);
341*4882a593Smuzhiyun 			b43legacy_phy_write(dev, 0x04C1, 0x0070);
342*4882a593Smuzhiyun 			b43legacy_phy_write(dev, 0x04C9, 0x0080);
343*4882a593Smuzhiyun 		}
344*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x042B, b43legacy_phy_read(dev,
345*4882a593Smuzhiyun 				    0x042B) | 0x800);
346*4882a593Smuzhiyun 
347*4882a593Smuzhiyun 		for (i = 0; i < 64; i++)
348*4882a593Smuzhiyun 			b43legacy_ilt_write(dev, 0x4000 + i, i);
349*4882a593Smuzhiyun 		for (i = 0; i < B43legacy_ILT_NOISEG2_SIZE; i++)
350*4882a593Smuzhiyun 			b43legacy_ilt_write(dev, 0x1800 + i,
351*4882a593Smuzhiyun 					    b43legacy_ilt_noiseg2[i]);
352*4882a593Smuzhiyun 	}
353*4882a593Smuzhiyun 
354*4882a593Smuzhiyun 	if (phy->rev <= 2)
355*4882a593Smuzhiyun 		for (i = 0; i < B43legacy_ILT_NOISESCALEG_SIZE; i++)
356*4882a593Smuzhiyun 			b43legacy_ilt_write(dev, 0x1400 + i,
357*4882a593Smuzhiyun 					    b43legacy_ilt_noisescaleg1[i]);
358*4882a593Smuzhiyun 	else if ((phy->rev >= 7) && (b43legacy_phy_read(dev, 0x0449) & 0x0200))
359*4882a593Smuzhiyun 		for (i = 0; i < B43legacy_ILT_NOISESCALEG_SIZE; i++)
360*4882a593Smuzhiyun 			b43legacy_ilt_write(dev, 0x1400 + i,
361*4882a593Smuzhiyun 					    b43legacy_ilt_noisescaleg3[i]);
362*4882a593Smuzhiyun 	else
363*4882a593Smuzhiyun 		for (i = 0; i < B43legacy_ILT_NOISESCALEG_SIZE; i++)
364*4882a593Smuzhiyun 			b43legacy_ilt_write(dev, 0x1400 + i,
365*4882a593Smuzhiyun 					    b43legacy_ilt_noisescaleg2[i]);
366*4882a593Smuzhiyun 
367*4882a593Smuzhiyun 	if (phy->rev == 2)
368*4882a593Smuzhiyun 		for (i = 0; i < B43legacy_ILT_SIGMASQR_SIZE; i++)
369*4882a593Smuzhiyun 			b43legacy_ilt_write(dev, 0x5000 + i,
370*4882a593Smuzhiyun 					    b43legacy_ilt_sigmasqr1[i]);
371*4882a593Smuzhiyun 	else if ((phy->rev > 2) && (phy->rev <= 8))
372*4882a593Smuzhiyun 		for (i = 0; i < B43legacy_ILT_SIGMASQR_SIZE; i++)
373*4882a593Smuzhiyun 			b43legacy_ilt_write(dev, 0x5000 + i,
374*4882a593Smuzhiyun 					    b43legacy_ilt_sigmasqr2[i]);
375*4882a593Smuzhiyun 
376*4882a593Smuzhiyun 	if (phy->rev == 1) {
377*4882a593Smuzhiyun 		for (i = 0; i < B43legacy_ILT_RETARD_SIZE; i++)
378*4882a593Smuzhiyun 			b43legacy_ilt_write32(dev, 0x2400 + i,
379*4882a593Smuzhiyun 					      b43legacy_ilt_retard[i]);
380*4882a593Smuzhiyun 		for (i = 4; i < 20; i++)
381*4882a593Smuzhiyun 			b43legacy_ilt_write(dev, 0x5400 + i, 0x0020);
382*4882a593Smuzhiyun 		b43legacy_phy_agcsetup(dev);
383*4882a593Smuzhiyun 
384*4882a593Smuzhiyun 		if (is_bcm_board_vendor(dev) &&
385*4882a593Smuzhiyun 		    (dev->dev->bus->boardinfo.type == 0x0416) &&
386*4882a593Smuzhiyun 		    (dev->dev->bus->sprom.board_rev == 0x0017))
387*4882a593Smuzhiyun 			return;
388*4882a593Smuzhiyun 
389*4882a593Smuzhiyun 		b43legacy_ilt_write(dev, 0x5001, 0x0002);
390*4882a593Smuzhiyun 		b43legacy_ilt_write(dev, 0x5002, 0x0001);
391*4882a593Smuzhiyun 	} else {
392*4882a593Smuzhiyun 		for (i = 0; i <= 0x20; i++)
393*4882a593Smuzhiyun 			b43legacy_ilt_write(dev, 0x1000 + i, 0x0820);
394*4882a593Smuzhiyun 		b43legacy_phy_agcsetup(dev);
395*4882a593Smuzhiyun 		b43legacy_phy_read(dev, 0x0400); /* dummy read */
396*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0403, 0x1000);
397*4882a593Smuzhiyun 		b43legacy_ilt_write(dev, 0x3C02, 0x000F);
398*4882a593Smuzhiyun 		b43legacy_ilt_write(dev, 0x3C03, 0x0014);
399*4882a593Smuzhiyun 
400*4882a593Smuzhiyun 		if (is_bcm_board_vendor(dev) &&
401*4882a593Smuzhiyun 		    (dev->dev->bus->boardinfo.type == 0x0416) &&
402*4882a593Smuzhiyun 		    (dev->dev->bus->sprom.board_rev == 0x0017))
403*4882a593Smuzhiyun 			return;
404*4882a593Smuzhiyun 
405*4882a593Smuzhiyun 		b43legacy_ilt_write(dev, 0x0401, 0x0002);
406*4882a593Smuzhiyun 		b43legacy_ilt_write(dev, 0x0402, 0x0001);
407*4882a593Smuzhiyun 	}
408*4882a593Smuzhiyun }
409*4882a593Smuzhiyun 
410*4882a593Smuzhiyun /* Initialize the APHY portion of a GPHY. */
b43legacy_phy_inita(struct b43legacy_wldev * dev)411*4882a593Smuzhiyun static void b43legacy_phy_inita(struct b43legacy_wldev *dev)
412*4882a593Smuzhiyun {
413*4882a593Smuzhiyun 
414*4882a593Smuzhiyun 	might_sleep();
415*4882a593Smuzhiyun 
416*4882a593Smuzhiyun 	b43legacy_phy_setupg(dev);
417*4882a593Smuzhiyun 	if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_PACTRL)
418*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x046E, 0x03CF);
419*4882a593Smuzhiyun }
420*4882a593Smuzhiyun 
b43legacy_phy_initb2(struct b43legacy_wldev * dev)421*4882a593Smuzhiyun static void b43legacy_phy_initb2(struct b43legacy_wldev *dev)
422*4882a593Smuzhiyun {
423*4882a593Smuzhiyun 	struct b43legacy_phy *phy = &dev->phy;
424*4882a593Smuzhiyun 	u16 offset;
425*4882a593Smuzhiyun 	int val;
426*4882a593Smuzhiyun 
427*4882a593Smuzhiyun 	b43legacy_write16(dev, 0x03EC, 0x3F22);
428*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x0020, 0x301C);
429*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x0026, 0x0000);
430*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x0030, 0x00C6);
431*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x0088, 0x3E00);
432*4882a593Smuzhiyun 	val = 0x3C3D;
433*4882a593Smuzhiyun 	for (offset = 0x0089; offset < 0x00A7; offset++) {
434*4882a593Smuzhiyun 		b43legacy_phy_write(dev, offset, val);
435*4882a593Smuzhiyun 		val -= 0x0202;
436*4882a593Smuzhiyun 	}
437*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x03E4, 0x3000);
438*4882a593Smuzhiyun 	b43legacy_radio_selectchannel(dev, phy->channel, 0);
439*4882a593Smuzhiyun 	if (phy->radio_ver != 0x2050) {
440*4882a593Smuzhiyun 		b43legacy_radio_write16(dev, 0x0075, 0x0080);
441*4882a593Smuzhiyun 		b43legacy_radio_write16(dev, 0x0079, 0x0081);
442*4882a593Smuzhiyun 	}
443*4882a593Smuzhiyun 	b43legacy_radio_write16(dev, 0x0050, 0x0020);
444*4882a593Smuzhiyun 	b43legacy_radio_write16(dev, 0x0050, 0x0023);
445*4882a593Smuzhiyun 	if (phy->radio_ver == 0x2050) {
446*4882a593Smuzhiyun 		b43legacy_radio_write16(dev, 0x0050, 0x0020);
447*4882a593Smuzhiyun 		b43legacy_radio_write16(dev, 0x005A, 0x0070);
448*4882a593Smuzhiyun 		b43legacy_radio_write16(dev, 0x005B, 0x007B);
449*4882a593Smuzhiyun 		b43legacy_radio_write16(dev, 0x005C, 0x00B0);
450*4882a593Smuzhiyun 		b43legacy_radio_write16(dev, 0x007A, 0x000F);
451*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0038, 0x0677);
452*4882a593Smuzhiyun 		b43legacy_radio_init2050(dev);
453*4882a593Smuzhiyun 	}
454*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x0014, 0x0080);
455*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x0032, 0x00CA);
456*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x0032, 0x00CC);
457*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x0035, 0x07C2);
458*4882a593Smuzhiyun 	b43legacy_phy_lo_b_measure(dev);
459*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x0026, 0xCC00);
460*4882a593Smuzhiyun 	if (phy->radio_ver != 0x2050)
461*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0026, 0xCE00);
462*4882a593Smuzhiyun 	b43legacy_write16(dev, B43legacy_MMIO_CHANNEL_EXT, 0x1000);
463*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x002A, 0x88A3);
464*4882a593Smuzhiyun 	if (phy->radio_ver != 0x2050)
465*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x002A, 0x88C2);
466*4882a593Smuzhiyun 	b43legacy_radio_set_txpower_bg(dev, 0xFFFF, 0xFFFF, 0xFFFF);
467*4882a593Smuzhiyun 	b43legacy_phy_init_pctl(dev);
468*4882a593Smuzhiyun }
469*4882a593Smuzhiyun 
b43legacy_phy_initb4(struct b43legacy_wldev * dev)470*4882a593Smuzhiyun static void b43legacy_phy_initb4(struct b43legacy_wldev *dev)
471*4882a593Smuzhiyun {
472*4882a593Smuzhiyun 	struct b43legacy_phy *phy = &dev->phy;
473*4882a593Smuzhiyun 	u16 offset;
474*4882a593Smuzhiyun 	u16 val;
475*4882a593Smuzhiyun 
476*4882a593Smuzhiyun 	b43legacy_write16(dev, 0x03EC, 0x3F22);
477*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x0020, 0x301C);
478*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x0026, 0x0000);
479*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x0030, 0x00C6);
480*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x0088, 0x3E00);
481*4882a593Smuzhiyun 	val = 0x3C3D;
482*4882a593Smuzhiyun 	for (offset = 0x0089; offset < 0x00A7; offset++) {
483*4882a593Smuzhiyun 		b43legacy_phy_write(dev, offset, val);
484*4882a593Smuzhiyun 		val -= 0x0202;
485*4882a593Smuzhiyun 	}
486*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x03E4, 0x3000);
487*4882a593Smuzhiyun 	b43legacy_radio_selectchannel(dev, phy->channel, 0);
488*4882a593Smuzhiyun 	if (phy->radio_ver != 0x2050) {
489*4882a593Smuzhiyun 		b43legacy_radio_write16(dev, 0x0075, 0x0080);
490*4882a593Smuzhiyun 		b43legacy_radio_write16(dev, 0x0079, 0x0081);
491*4882a593Smuzhiyun 	}
492*4882a593Smuzhiyun 	b43legacy_radio_write16(dev, 0x0050, 0x0020);
493*4882a593Smuzhiyun 	b43legacy_radio_write16(dev, 0x0050, 0x0023);
494*4882a593Smuzhiyun 	if (phy->radio_ver == 0x2050) {
495*4882a593Smuzhiyun 		b43legacy_radio_write16(dev, 0x0050, 0x0020);
496*4882a593Smuzhiyun 		b43legacy_radio_write16(dev, 0x005A, 0x0070);
497*4882a593Smuzhiyun 		b43legacy_radio_write16(dev, 0x005B, 0x007B);
498*4882a593Smuzhiyun 		b43legacy_radio_write16(dev, 0x005C, 0x00B0);
499*4882a593Smuzhiyun 		b43legacy_radio_write16(dev, 0x007A, 0x000F);
500*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0038, 0x0677);
501*4882a593Smuzhiyun 		b43legacy_radio_init2050(dev);
502*4882a593Smuzhiyun 	}
503*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x0014, 0x0080);
504*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x0032, 0x00CA);
505*4882a593Smuzhiyun 	if (phy->radio_ver == 0x2050)
506*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0032, 0x00E0);
507*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x0035, 0x07C2);
508*4882a593Smuzhiyun 
509*4882a593Smuzhiyun 	b43legacy_phy_lo_b_measure(dev);
510*4882a593Smuzhiyun 
511*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x0026, 0xCC00);
512*4882a593Smuzhiyun 	if (phy->radio_ver == 0x2050)
513*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0026, 0xCE00);
514*4882a593Smuzhiyun 	b43legacy_write16(dev, B43legacy_MMIO_CHANNEL_EXT, 0x1100);
515*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x002A, 0x88A3);
516*4882a593Smuzhiyun 	if (phy->radio_ver == 0x2050)
517*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x002A, 0x88C2);
518*4882a593Smuzhiyun 	b43legacy_radio_set_txpower_bg(dev, 0xFFFF, 0xFFFF, 0xFFFF);
519*4882a593Smuzhiyun 	if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_RSSI) {
520*4882a593Smuzhiyun 		b43legacy_calc_nrssi_slope(dev);
521*4882a593Smuzhiyun 		b43legacy_calc_nrssi_threshold(dev);
522*4882a593Smuzhiyun 	}
523*4882a593Smuzhiyun 	b43legacy_phy_init_pctl(dev);
524*4882a593Smuzhiyun }
525*4882a593Smuzhiyun 
b43legacy_phy_initb5(struct b43legacy_wldev * dev)526*4882a593Smuzhiyun static void b43legacy_phy_initb5(struct b43legacy_wldev *dev)
527*4882a593Smuzhiyun {
528*4882a593Smuzhiyun 	struct b43legacy_phy *phy = &dev->phy;
529*4882a593Smuzhiyun 	u16 offset;
530*4882a593Smuzhiyun 	u16 value;
531*4882a593Smuzhiyun 	u8 old_channel;
532*4882a593Smuzhiyun 
533*4882a593Smuzhiyun 	if (phy->analog == 1)
534*4882a593Smuzhiyun 		b43legacy_radio_write16(dev, 0x007A,
535*4882a593Smuzhiyun 					b43legacy_radio_read16(dev, 0x007A)
536*4882a593Smuzhiyun 					| 0x0050);
537*4882a593Smuzhiyun 	if (!is_bcm_board_vendor(dev) &&
538*4882a593Smuzhiyun 	    (dev->dev->bus->boardinfo.type != 0x0416)) {
539*4882a593Smuzhiyun 		value = 0x2120;
540*4882a593Smuzhiyun 		for (offset = 0x00A8 ; offset < 0x00C7; offset++) {
541*4882a593Smuzhiyun 			b43legacy_phy_write(dev, offset, value);
542*4882a593Smuzhiyun 			value += 0x0202;
543*4882a593Smuzhiyun 		}
544*4882a593Smuzhiyun 	}
545*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x0035,
546*4882a593Smuzhiyun 			    (b43legacy_phy_read(dev, 0x0035) & 0xF0FF)
547*4882a593Smuzhiyun 			    | 0x0700);
548*4882a593Smuzhiyun 	if (phy->radio_ver == 0x2050)
549*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0038, 0x0667);
550*4882a593Smuzhiyun 
551*4882a593Smuzhiyun 	if (phy->gmode) {
552*4882a593Smuzhiyun 		if (phy->radio_ver == 0x2050) {
553*4882a593Smuzhiyun 			b43legacy_radio_write16(dev, 0x007A,
554*4882a593Smuzhiyun 					b43legacy_radio_read16(dev, 0x007A)
555*4882a593Smuzhiyun 					| 0x0020);
556*4882a593Smuzhiyun 			b43legacy_radio_write16(dev, 0x0051,
557*4882a593Smuzhiyun 					b43legacy_radio_read16(dev, 0x0051)
558*4882a593Smuzhiyun 					| 0x0004);
559*4882a593Smuzhiyun 		}
560*4882a593Smuzhiyun 		b43legacy_write16(dev, B43legacy_MMIO_PHY_RADIO, 0x0000);
561*4882a593Smuzhiyun 
562*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0802, b43legacy_phy_read(dev, 0x0802)
563*4882a593Smuzhiyun 				    | 0x0100);
564*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x042B, b43legacy_phy_read(dev, 0x042B)
565*4882a593Smuzhiyun 				    | 0x2000);
566*4882a593Smuzhiyun 
567*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x001C, 0x186A);
568*4882a593Smuzhiyun 
569*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0013, (b43legacy_phy_read(dev,
570*4882a593Smuzhiyun 				    0x0013) & 0x00FF) | 0x1900);
571*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0035, (b43legacy_phy_read(dev,
572*4882a593Smuzhiyun 				    0x0035) & 0xFFC0) | 0x0064);
573*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x005D, (b43legacy_phy_read(dev,
574*4882a593Smuzhiyun 				    0x005D) & 0xFF80) | 0x000A);
575*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x5B, 0x0000);
576*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x5C, 0x0000);
577*4882a593Smuzhiyun 	}
578*4882a593Smuzhiyun 
579*4882a593Smuzhiyun 	if (dev->bad_frames_preempt)
580*4882a593Smuzhiyun 		b43legacy_phy_write(dev, B43legacy_PHY_RADIO_BITFIELD,
581*4882a593Smuzhiyun 				    b43legacy_phy_read(dev,
582*4882a593Smuzhiyun 				    B43legacy_PHY_RADIO_BITFIELD) | (1 << 12));
583*4882a593Smuzhiyun 
584*4882a593Smuzhiyun 	if (phy->analog == 1) {
585*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0026, 0xCE00);
586*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0021, 0x3763);
587*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0022, 0x1BC3);
588*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0023, 0x06F9);
589*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0024, 0x037E);
590*4882a593Smuzhiyun 	} else
591*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0026, 0xCC00);
592*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x0030, 0x00C6);
593*4882a593Smuzhiyun 	b43legacy_write16(dev, 0x03EC, 0x3F22);
594*4882a593Smuzhiyun 
595*4882a593Smuzhiyun 	if (phy->analog == 1)
596*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0020, 0x3E1C);
597*4882a593Smuzhiyun 	else
598*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0020, 0x301C);
599*4882a593Smuzhiyun 
600*4882a593Smuzhiyun 	if (phy->analog == 0)
601*4882a593Smuzhiyun 		b43legacy_write16(dev, 0x03E4, 0x3000);
602*4882a593Smuzhiyun 
603*4882a593Smuzhiyun 	old_channel = (phy->channel == 0xFF) ? 1 : phy->channel;
604*4882a593Smuzhiyun 	/* Force to channel 7, even if not supported. */
605*4882a593Smuzhiyun 	b43legacy_radio_selectchannel(dev, 7, 0);
606*4882a593Smuzhiyun 
607*4882a593Smuzhiyun 	if (phy->radio_ver != 0x2050) {
608*4882a593Smuzhiyun 		b43legacy_radio_write16(dev, 0x0075, 0x0080);
609*4882a593Smuzhiyun 		b43legacy_radio_write16(dev, 0x0079, 0x0081);
610*4882a593Smuzhiyun 	}
611*4882a593Smuzhiyun 
612*4882a593Smuzhiyun 	b43legacy_radio_write16(dev, 0x0050, 0x0020);
613*4882a593Smuzhiyun 	b43legacy_radio_write16(dev, 0x0050, 0x0023);
614*4882a593Smuzhiyun 
615*4882a593Smuzhiyun 	if (phy->radio_ver == 0x2050) {
616*4882a593Smuzhiyun 		b43legacy_radio_write16(dev, 0x0050, 0x0020);
617*4882a593Smuzhiyun 		b43legacy_radio_write16(dev, 0x005A, 0x0070);
618*4882a593Smuzhiyun 	}
619*4882a593Smuzhiyun 
620*4882a593Smuzhiyun 	b43legacy_radio_write16(dev, 0x005B, 0x007B);
621*4882a593Smuzhiyun 	b43legacy_radio_write16(dev, 0x005C, 0x00B0);
622*4882a593Smuzhiyun 
623*4882a593Smuzhiyun 	b43legacy_radio_write16(dev, 0x007A, b43legacy_radio_read16(dev,
624*4882a593Smuzhiyun 				0x007A) | 0x0007);
625*4882a593Smuzhiyun 
626*4882a593Smuzhiyun 	b43legacy_radio_selectchannel(dev, old_channel, 0);
627*4882a593Smuzhiyun 
628*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x0014, 0x0080);
629*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x0032, 0x00CA);
630*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x002A, 0x88A3);
631*4882a593Smuzhiyun 
632*4882a593Smuzhiyun 	b43legacy_radio_set_txpower_bg(dev, 0xFFFF, 0xFFFF, 0xFFFF);
633*4882a593Smuzhiyun 
634*4882a593Smuzhiyun 	if (phy->radio_ver == 0x2050)
635*4882a593Smuzhiyun 		b43legacy_radio_write16(dev, 0x005D, 0x000D);
636*4882a593Smuzhiyun 
637*4882a593Smuzhiyun 	b43legacy_write16(dev, 0x03E4, (b43legacy_read16(dev, 0x03E4) &
638*4882a593Smuzhiyun 			  0xFFC0) | 0x0004);
639*4882a593Smuzhiyun }
640*4882a593Smuzhiyun 
b43legacy_phy_initb6(struct b43legacy_wldev * dev)641*4882a593Smuzhiyun static void b43legacy_phy_initb6(struct b43legacy_wldev *dev)
642*4882a593Smuzhiyun {
643*4882a593Smuzhiyun 	struct b43legacy_phy *phy = &dev->phy;
644*4882a593Smuzhiyun 	u16 offset;
645*4882a593Smuzhiyun 	u16 val;
646*4882a593Smuzhiyun 	u8 old_channel;
647*4882a593Smuzhiyun 
648*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x003E, 0x817A);
649*4882a593Smuzhiyun 	b43legacy_radio_write16(dev, 0x007A,
650*4882a593Smuzhiyun 				(b43legacy_radio_read16(dev, 0x007A) | 0x0058));
651*4882a593Smuzhiyun 	if (phy->radio_rev == 4 ||
652*4882a593Smuzhiyun 	     phy->radio_rev == 5) {
653*4882a593Smuzhiyun 		b43legacy_radio_write16(dev, 0x0051, 0x0037);
654*4882a593Smuzhiyun 		b43legacy_radio_write16(dev, 0x0052, 0x0070);
655*4882a593Smuzhiyun 		b43legacy_radio_write16(dev, 0x0053, 0x00B3);
656*4882a593Smuzhiyun 		b43legacy_radio_write16(dev, 0x0054, 0x009B);
657*4882a593Smuzhiyun 		b43legacy_radio_write16(dev, 0x005A, 0x0088);
658*4882a593Smuzhiyun 		b43legacy_radio_write16(dev, 0x005B, 0x0088);
659*4882a593Smuzhiyun 		b43legacy_radio_write16(dev, 0x005D, 0x0088);
660*4882a593Smuzhiyun 		b43legacy_radio_write16(dev, 0x005E, 0x0088);
661*4882a593Smuzhiyun 		b43legacy_radio_write16(dev, 0x007D, 0x0088);
662*4882a593Smuzhiyun 		b43legacy_shm_write32(dev, B43legacy_SHM_SHARED,
663*4882a593Smuzhiyun 				      B43legacy_UCODEFLAGS_OFFSET,
664*4882a593Smuzhiyun 				      (b43legacy_shm_read32(dev,
665*4882a593Smuzhiyun 				      B43legacy_SHM_SHARED,
666*4882a593Smuzhiyun 				      B43legacy_UCODEFLAGS_OFFSET)
667*4882a593Smuzhiyun 				      | 0x00000200));
668*4882a593Smuzhiyun 	}
669*4882a593Smuzhiyun 	if (phy->radio_rev == 8) {
670*4882a593Smuzhiyun 		b43legacy_radio_write16(dev, 0x0051, 0x0000);
671*4882a593Smuzhiyun 		b43legacy_radio_write16(dev, 0x0052, 0x0040);
672*4882a593Smuzhiyun 		b43legacy_radio_write16(dev, 0x0053, 0x00B7);
673*4882a593Smuzhiyun 		b43legacy_radio_write16(dev, 0x0054, 0x0098);
674*4882a593Smuzhiyun 		b43legacy_radio_write16(dev, 0x005A, 0x0088);
675*4882a593Smuzhiyun 		b43legacy_radio_write16(dev, 0x005B, 0x006B);
676*4882a593Smuzhiyun 		b43legacy_radio_write16(dev, 0x005C, 0x000F);
677*4882a593Smuzhiyun 		if (dev->dev->bus->sprom.boardflags_lo & 0x8000) {
678*4882a593Smuzhiyun 			b43legacy_radio_write16(dev, 0x005D, 0x00FA);
679*4882a593Smuzhiyun 			b43legacy_radio_write16(dev, 0x005E, 0x00D8);
680*4882a593Smuzhiyun 		} else {
681*4882a593Smuzhiyun 			b43legacy_radio_write16(dev, 0x005D, 0x00F5);
682*4882a593Smuzhiyun 			b43legacy_radio_write16(dev, 0x005E, 0x00B8);
683*4882a593Smuzhiyun 		}
684*4882a593Smuzhiyun 		b43legacy_radio_write16(dev, 0x0073, 0x0003);
685*4882a593Smuzhiyun 		b43legacy_radio_write16(dev, 0x007D, 0x00A8);
686*4882a593Smuzhiyun 		b43legacy_radio_write16(dev, 0x007C, 0x0001);
687*4882a593Smuzhiyun 		b43legacy_radio_write16(dev, 0x007E, 0x0008);
688*4882a593Smuzhiyun 	}
689*4882a593Smuzhiyun 	val = 0x1E1F;
690*4882a593Smuzhiyun 	for (offset = 0x0088; offset < 0x0098; offset++) {
691*4882a593Smuzhiyun 		b43legacy_phy_write(dev, offset, val);
692*4882a593Smuzhiyun 		val -= 0x0202;
693*4882a593Smuzhiyun 	}
694*4882a593Smuzhiyun 	val = 0x3E3F;
695*4882a593Smuzhiyun 	for (offset = 0x0098; offset < 0x00A8; offset++) {
696*4882a593Smuzhiyun 		b43legacy_phy_write(dev, offset, val);
697*4882a593Smuzhiyun 		val -= 0x0202;
698*4882a593Smuzhiyun 	}
699*4882a593Smuzhiyun 	val = 0x2120;
700*4882a593Smuzhiyun 	for (offset = 0x00A8; offset < 0x00C8; offset++) {
701*4882a593Smuzhiyun 		b43legacy_phy_write(dev, offset, (val & 0x3F3F));
702*4882a593Smuzhiyun 		val += 0x0202;
703*4882a593Smuzhiyun 	}
704*4882a593Smuzhiyun 	if (phy->type == B43legacy_PHYTYPE_G) {
705*4882a593Smuzhiyun 		b43legacy_radio_write16(dev, 0x007A,
706*4882a593Smuzhiyun 					b43legacy_radio_read16(dev, 0x007A) |
707*4882a593Smuzhiyun 					0x0020);
708*4882a593Smuzhiyun 		b43legacy_radio_write16(dev, 0x0051,
709*4882a593Smuzhiyun 					b43legacy_radio_read16(dev, 0x0051) |
710*4882a593Smuzhiyun 					0x0004);
711*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0802,
712*4882a593Smuzhiyun 				    b43legacy_phy_read(dev, 0x0802) | 0x0100);
713*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x042B,
714*4882a593Smuzhiyun 				    b43legacy_phy_read(dev, 0x042B) | 0x2000);
715*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x5B, 0x0000);
716*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x5C, 0x0000);
717*4882a593Smuzhiyun 	}
718*4882a593Smuzhiyun 
719*4882a593Smuzhiyun 	old_channel = phy->channel;
720*4882a593Smuzhiyun 	if (old_channel >= 8)
721*4882a593Smuzhiyun 		b43legacy_radio_selectchannel(dev, 1, 0);
722*4882a593Smuzhiyun 	else
723*4882a593Smuzhiyun 		b43legacy_radio_selectchannel(dev, 13, 0);
724*4882a593Smuzhiyun 
725*4882a593Smuzhiyun 	b43legacy_radio_write16(dev, 0x0050, 0x0020);
726*4882a593Smuzhiyun 	b43legacy_radio_write16(dev, 0x0050, 0x0023);
727*4882a593Smuzhiyun 	udelay(40);
728*4882a593Smuzhiyun 	if (phy->radio_rev < 6 || phy->radio_rev == 8) {
729*4882a593Smuzhiyun 		b43legacy_radio_write16(dev, 0x007C,
730*4882a593Smuzhiyun 					(b43legacy_radio_read16(dev, 0x007C)
731*4882a593Smuzhiyun 					| 0x0002));
732*4882a593Smuzhiyun 		b43legacy_radio_write16(dev, 0x0050, 0x0020);
733*4882a593Smuzhiyun 	}
734*4882a593Smuzhiyun 	if (phy->radio_rev <= 2) {
735*4882a593Smuzhiyun 		b43legacy_radio_write16(dev, 0x0050, 0x0020);
736*4882a593Smuzhiyun 		b43legacy_radio_write16(dev, 0x005A, 0x0070);
737*4882a593Smuzhiyun 		b43legacy_radio_write16(dev, 0x005B, 0x007B);
738*4882a593Smuzhiyun 		b43legacy_radio_write16(dev, 0x005C, 0x00B0);
739*4882a593Smuzhiyun 	}
740*4882a593Smuzhiyun 	b43legacy_radio_write16(dev, 0x007A,
741*4882a593Smuzhiyun 				(b43legacy_radio_read16(dev,
742*4882a593Smuzhiyun 				0x007A) & 0x00F8) | 0x0007);
743*4882a593Smuzhiyun 
744*4882a593Smuzhiyun 	b43legacy_radio_selectchannel(dev, old_channel, 0);
745*4882a593Smuzhiyun 
746*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x0014, 0x0200);
747*4882a593Smuzhiyun 	if (phy->radio_rev >= 6)
748*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x002A, 0x88C2);
749*4882a593Smuzhiyun 	else
750*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x002A, 0x8AC0);
751*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x0038, 0x0668);
752*4882a593Smuzhiyun 	b43legacy_radio_set_txpower_bg(dev, 0xFFFF, 0xFFFF, 0xFFFF);
753*4882a593Smuzhiyun 	if (phy->radio_rev == 4 || phy->radio_rev == 5)
754*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x005D, (b43legacy_phy_read(dev,
755*4882a593Smuzhiyun 				    0x005D) & 0xFF80) | 0x0003);
756*4882a593Smuzhiyun 	if (phy->radio_rev <= 2)
757*4882a593Smuzhiyun 		b43legacy_radio_write16(dev, 0x005D, 0x000D);
758*4882a593Smuzhiyun 
759*4882a593Smuzhiyun 	if (phy->analog == 4) {
760*4882a593Smuzhiyun 		b43legacy_write16(dev, 0x03E4, 0x0009);
761*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x61, b43legacy_phy_read(dev, 0x61)
762*4882a593Smuzhiyun 				    & 0xFFF);
763*4882a593Smuzhiyun 	} else
764*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0002, (b43legacy_phy_read(dev,
765*4882a593Smuzhiyun 				    0x0002) & 0xFFC0) | 0x0004);
766*4882a593Smuzhiyun 	if (phy->type == B43legacy_PHYTYPE_G)
767*4882a593Smuzhiyun 		b43legacy_write16(dev, 0x03E6, 0x0);
768*4882a593Smuzhiyun 	if (phy->type == B43legacy_PHYTYPE_B) {
769*4882a593Smuzhiyun 		b43legacy_write16(dev, 0x03E6, 0x8140);
770*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0016, 0x0410);
771*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0017, 0x0820);
772*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0062, 0x0007);
773*4882a593Smuzhiyun 		b43legacy_radio_init2050(dev);
774*4882a593Smuzhiyun 		b43legacy_phy_lo_g_measure(dev);
775*4882a593Smuzhiyun 		if (dev->dev->bus->sprom.boardflags_lo &
776*4882a593Smuzhiyun 		    B43legacy_BFL_RSSI) {
777*4882a593Smuzhiyun 			b43legacy_calc_nrssi_slope(dev);
778*4882a593Smuzhiyun 			b43legacy_calc_nrssi_threshold(dev);
779*4882a593Smuzhiyun 		}
780*4882a593Smuzhiyun 		b43legacy_phy_init_pctl(dev);
781*4882a593Smuzhiyun 	}
782*4882a593Smuzhiyun }
783*4882a593Smuzhiyun 
b43legacy_calc_loopback_gain(struct b43legacy_wldev * dev)784*4882a593Smuzhiyun static void b43legacy_calc_loopback_gain(struct b43legacy_wldev *dev)
785*4882a593Smuzhiyun {
786*4882a593Smuzhiyun 	struct b43legacy_phy *phy = &dev->phy;
787*4882a593Smuzhiyun 	u16 backup_phy[15] = {0};
788*4882a593Smuzhiyun 	u16 backup_radio[3];
789*4882a593Smuzhiyun 	u16 backup_bband;
790*4882a593Smuzhiyun 	u16 i;
791*4882a593Smuzhiyun 	u16 loop1_cnt;
792*4882a593Smuzhiyun 	u16 loop1_done;
793*4882a593Smuzhiyun 	u16 loop1_omitted;
794*4882a593Smuzhiyun 	u16 loop2_done;
795*4882a593Smuzhiyun 
796*4882a593Smuzhiyun 	backup_phy[0] = b43legacy_phy_read(dev, 0x0429);
797*4882a593Smuzhiyun 	backup_phy[1] = b43legacy_phy_read(dev, 0x0001);
798*4882a593Smuzhiyun 	backup_phy[2] = b43legacy_phy_read(dev, 0x0811);
799*4882a593Smuzhiyun 	backup_phy[3] = b43legacy_phy_read(dev, 0x0812);
800*4882a593Smuzhiyun 	if (phy->rev != 1) {
801*4882a593Smuzhiyun 		backup_phy[4] = b43legacy_phy_read(dev, 0x0814);
802*4882a593Smuzhiyun 		backup_phy[5] = b43legacy_phy_read(dev, 0x0815);
803*4882a593Smuzhiyun 	}
804*4882a593Smuzhiyun 	backup_phy[6] = b43legacy_phy_read(dev, 0x005A);
805*4882a593Smuzhiyun 	backup_phy[7] = b43legacy_phy_read(dev, 0x0059);
806*4882a593Smuzhiyun 	backup_phy[8] = b43legacy_phy_read(dev, 0x0058);
807*4882a593Smuzhiyun 	backup_phy[9] = b43legacy_phy_read(dev, 0x000A);
808*4882a593Smuzhiyun 	backup_phy[10] = b43legacy_phy_read(dev, 0x0003);
809*4882a593Smuzhiyun 	backup_phy[11] = b43legacy_phy_read(dev, 0x080F);
810*4882a593Smuzhiyun 	backup_phy[12] = b43legacy_phy_read(dev, 0x0810);
811*4882a593Smuzhiyun 	backup_phy[13] = b43legacy_phy_read(dev, 0x002B);
812*4882a593Smuzhiyun 	backup_phy[14] = b43legacy_phy_read(dev, 0x0015);
813*4882a593Smuzhiyun 	b43legacy_phy_read(dev, 0x002D); /* dummy read */
814*4882a593Smuzhiyun 	backup_bband = phy->bbatt;
815*4882a593Smuzhiyun 	backup_radio[0] = b43legacy_radio_read16(dev, 0x0052);
816*4882a593Smuzhiyun 	backup_radio[1] = b43legacy_radio_read16(dev, 0x0043);
817*4882a593Smuzhiyun 	backup_radio[2] = b43legacy_radio_read16(dev, 0x007A);
818*4882a593Smuzhiyun 
819*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x0429,
820*4882a593Smuzhiyun 			    b43legacy_phy_read(dev, 0x0429) & 0x3FFF);
821*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x0001,
822*4882a593Smuzhiyun 			    b43legacy_phy_read(dev, 0x0001) & 0x8000);
823*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x0811,
824*4882a593Smuzhiyun 			    b43legacy_phy_read(dev, 0x0811) | 0x0002);
825*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x0812,
826*4882a593Smuzhiyun 			    b43legacy_phy_read(dev, 0x0812) & 0xFFFD);
827*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x0811,
828*4882a593Smuzhiyun 			    b43legacy_phy_read(dev, 0x0811) | 0x0001);
829*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x0812,
830*4882a593Smuzhiyun 			    b43legacy_phy_read(dev, 0x0812) & 0xFFFE);
831*4882a593Smuzhiyun 	if (phy->rev != 1) {
832*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0814,
833*4882a593Smuzhiyun 				    b43legacy_phy_read(dev, 0x0814) | 0x0001);
834*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0815,
835*4882a593Smuzhiyun 				    b43legacy_phy_read(dev, 0x0815) & 0xFFFE);
836*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0814,
837*4882a593Smuzhiyun 				    b43legacy_phy_read(dev, 0x0814) | 0x0002);
838*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0815,
839*4882a593Smuzhiyun 				    b43legacy_phy_read(dev, 0x0815) & 0xFFFD);
840*4882a593Smuzhiyun 	}
841*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x0811, b43legacy_phy_read(dev, 0x0811) |
842*4882a593Smuzhiyun 			    0x000C);
843*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x0812, b43legacy_phy_read(dev, 0x0812) |
844*4882a593Smuzhiyun 			    0x000C);
845*4882a593Smuzhiyun 
846*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x0811, (b43legacy_phy_read(dev, 0x0811)
847*4882a593Smuzhiyun 			    & 0xFFCF) | 0x0030);
848*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x0812, (b43legacy_phy_read(dev, 0x0812)
849*4882a593Smuzhiyun 			    & 0xFFCF) | 0x0010);
850*4882a593Smuzhiyun 
851*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x005A, 0x0780);
852*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x0059, 0xC810);
853*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x0058, 0x000D);
854*4882a593Smuzhiyun 	if (phy->analog == 0)
855*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0003, 0x0122);
856*4882a593Smuzhiyun 	else
857*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x000A,
858*4882a593Smuzhiyun 				    b43legacy_phy_read(dev, 0x000A)
859*4882a593Smuzhiyun 				    | 0x2000);
860*4882a593Smuzhiyun 	if (phy->rev != 1) {
861*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0814,
862*4882a593Smuzhiyun 				    b43legacy_phy_read(dev, 0x0814) | 0x0004);
863*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0815,
864*4882a593Smuzhiyun 				    b43legacy_phy_read(dev, 0x0815) & 0xFFFB);
865*4882a593Smuzhiyun 	}
866*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x0003,
867*4882a593Smuzhiyun 			    (b43legacy_phy_read(dev, 0x0003)
868*4882a593Smuzhiyun 			     & 0xFF9F) | 0x0040);
869*4882a593Smuzhiyun 	if (phy->radio_ver == 0x2050 && phy->radio_rev == 2) {
870*4882a593Smuzhiyun 		b43legacy_radio_write16(dev, 0x0052, 0x0000);
871*4882a593Smuzhiyun 		b43legacy_radio_write16(dev, 0x0043,
872*4882a593Smuzhiyun 					(b43legacy_radio_read16(dev, 0x0043)
873*4882a593Smuzhiyun 					 & 0xFFF0) | 0x0009);
874*4882a593Smuzhiyun 		loop1_cnt = 9;
875*4882a593Smuzhiyun 	} else if (phy->radio_rev == 8) {
876*4882a593Smuzhiyun 		b43legacy_radio_write16(dev, 0x0043, 0x000F);
877*4882a593Smuzhiyun 		loop1_cnt = 15;
878*4882a593Smuzhiyun 	} else
879*4882a593Smuzhiyun 		loop1_cnt = 0;
880*4882a593Smuzhiyun 
881*4882a593Smuzhiyun 	b43legacy_phy_set_baseband_attenuation(dev, 11);
882*4882a593Smuzhiyun 
883*4882a593Smuzhiyun 	if (phy->rev >= 3)
884*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x080F, 0xC020);
885*4882a593Smuzhiyun 	else
886*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x080F, 0x8020);
887*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x0810, 0x0000);
888*4882a593Smuzhiyun 
889*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x002B,
890*4882a593Smuzhiyun 			    (b43legacy_phy_read(dev, 0x002B)
891*4882a593Smuzhiyun 			     & 0xFFC0) | 0x0001);
892*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x002B,
893*4882a593Smuzhiyun 			    (b43legacy_phy_read(dev, 0x002B)
894*4882a593Smuzhiyun 			     & 0xC0FF) | 0x0800);
895*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x0811,
896*4882a593Smuzhiyun 			    b43legacy_phy_read(dev, 0x0811) | 0x0100);
897*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x0812,
898*4882a593Smuzhiyun 			    b43legacy_phy_read(dev, 0x0812) & 0xCFFF);
899*4882a593Smuzhiyun 	if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_EXTLNA) {
900*4882a593Smuzhiyun 		if (phy->rev >= 7) {
901*4882a593Smuzhiyun 			b43legacy_phy_write(dev, 0x0811,
902*4882a593Smuzhiyun 					    b43legacy_phy_read(dev, 0x0811)
903*4882a593Smuzhiyun 					    | 0x0800);
904*4882a593Smuzhiyun 			b43legacy_phy_write(dev, 0x0812,
905*4882a593Smuzhiyun 					    b43legacy_phy_read(dev, 0x0812)
906*4882a593Smuzhiyun 					    | 0x8000);
907*4882a593Smuzhiyun 		}
908*4882a593Smuzhiyun 	}
909*4882a593Smuzhiyun 	b43legacy_radio_write16(dev, 0x007A,
910*4882a593Smuzhiyun 				b43legacy_radio_read16(dev, 0x007A)
911*4882a593Smuzhiyun 				& 0x00F7);
912*4882a593Smuzhiyun 
913*4882a593Smuzhiyun 	for (i = 0; i < loop1_cnt; i++) {
914*4882a593Smuzhiyun 		b43legacy_radio_write16(dev, 0x0043, loop1_cnt);
915*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0812,
916*4882a593Smuzhiyun 				    (b43legacy_phy_read(dev, 0x0812)
917*4882a593Smuzhiyun 				     & 0xF0FF) | (i << 8));
918*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0015,
919*4882a593Smuzhiyun 				    (b43legacy_phy_read(dev, 0x0015)
920*4882a593Smuzhiyun 				     & 0x0FFF) | 0xA000);
921*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0015,
922*4882a593Smuzhiyun 				    (b43legacy_phy_read(dev, 0x0015)
923*4882a593Smuzhiyun 				     & 0x0FFF) | 0xF000);
924*4882a593Smuzhiyun 		udelay(20);
925*4882a593Smuzhiyun 		if (b43legacy_phy_read(dev, 0x002D) >= 0x0DFC)
926*4882a593Smuzhiyun 			break;
927*4882a593Smuzhiyun 	}
928*4882a593Smuzhiyun 	loop1_done = i;
929*4882a593Smuzhiyun 	loop1_omitted = loop1_cnt - loop1_done;
930*4882a593Smuzhiyun 
931*4882a593Smuzhiyun 	loop2_done = 0;
932*4882a593Smuzhiyun 	if (loop1_done >= 8) {
933*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0812,
934*4882a593Smuzhiyun 				    b43legacy_phy_read(dev, 0x0812)
935*4882a593Smuzhiyun 				    | 0x0030);
936*4882a593Smuzhiyun 		for (i = loop1_done - 8; i < 16; i++) {
937*4882a593Smuzhiyun 			b43legacy_phy_write(dev, 0x0812,
938*4882a593Smuzhiyun 					    (b43legacy_phy_read(dev, 0x0812)
939*4882a593Smuzhiyun 					     & 0xF0FF) | (i << 8));
940*4882a593Smuzhiyun 			b43legacy_phy_write(dev, 0x0015,
941*4882a593Smuzhiyun 					    (b43legacy_phy_read(dev, 0x0015)
942*4882a593Smuzhiyun 					     & 0x0FFF) | 0xA000);
943*4882a593Smuzhiyun 			b43legacy_phy_write(dev, 0x0015,
944*4882a593Smuzhiyun 					    (b43legacy_phy_read(dev, 0x0015)
945*4882a593Smuzhiyun 					     & 0x0FFF) | 0xF000);
946*4882a593Smuzhiyun 			udelay(20);
947*4882a593Smuzhiyun 			if (b43legacy_phy_read(dev, 0x002D) >= 0x0DFC)
948*4882a593Smuzhiyun 				break;
949*4882a593Smuzhiyun 		}
950*4882a593Smuzhiyun 	}
951*4882a593Smuzhiyun 
952*4882a593Smuzhiyun 	if (phy->rev != 1) {
953*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0814, backup_phy[4]);
954*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0815, backup_phy[5]);
955*4882a593Smuzhiyun 	}
956*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x005A, backup_phy[6]);
957*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x0059, backup_phy[7]);
958*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x0058, backup_phy[8]);
959*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x000A, backup_phy[9]);
960*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x0003, backup_phy[10]);
961*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x080F, backup_phy[11]);
962*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x0810, backup_phy[12]);
963*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x002B, backup_phy[13]);
964*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x0015, backup_phy[14]);
965*4882a593Smuzhiyun 
966*4882a593Smuzhiyun 	b43legacy_phy_set_baseband_attenuation(dev, backup_bband);
967*4882a593Smuzhiyun 
968*4882a593Smuzhiyun 	b43legacy_radio_write16(dev, 0x0052, backup_radio[0]);
969*4882a593Smuzhiyun 	b43legacy_radio_write16(dev, 0x0043, backup_radio[1]);
970*4882a593Smuzhiyun 	b43legacy_radio_write16(dev, 0x007A, backup_radio[2]);
971*4882a593Smuzhiyun 
972*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x0811, backup_phy[2] | 0x0003);
973*4882a593Smuzhiyun 	udelay(10);
974*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x0811, backup_phy[2]);
975*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x0812, backup_phy[3]);
976*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x0429, backup_phy[0]);
977*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x0001, backup_phy[1]);
978*4882a593Smuzhiyun 
979*4882a593Smuzhiyun 	phy->loopback_gain[0] = ((loop1_done * 6) - (loop1_omitted * 4)) - 11;
980*4882a593Smuzhiyun 	phy->loopback_gain[1] = (24 - (3 * loop2_done)) * 2;
981*4882a593Smuzhiyun }
982*4882a593Smuzhiyun 
b43legacy_phy_initg(struct b43legacy_wldev * dev)983*4882a593Smuzhiyun static void b43legacy_phy_initg(struct b43legacy_wldev *dev)
984*4882a593Smuzhiyun {
985*4882a593Smuzhiyun 	struct b43legacy_phy *phy = &dev->phy;
986*4882a593Smuzhiyun 	u16 tmp;
987*4882a593Smuzhiyun 
988*4882a593Smuzhiyun 	if (phy->rev == 1)
989*4882a593Smuzhiyun 		b43legacy_phy_initb5(dev);
990*4882a593Smuzhiyun 	else
991*4882a593Smuzhiyun 		b43legacy_phy_initb6(dev);
992*4882a593Smuzhiyun 	if (phy->rev >= 2 && phy->gmode)
993*4882a593Smuzhiyun 		b43legacy_phy_inita(dev);
994*4882a593Smuzhiyun 
995*4882a593Smuzhiyun 	if (phy->rev >= 2) {
996*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0814, 0x0000);
997*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0815, 0x0000);
998*4882a593Smuzhiyun 	}
999*4882a593Smuzhiyun 	if (phy->rev == 2) {
1000*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0811, 0x0000);
1001*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0015, 0x00C0);
1002*4882a593Smuzhiyun 	}
1003*4882a593Smuzhiyun 	if (phy->rev > 5) {
1004*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0811, 0x0400);
1005*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0015, 0x00C0);
1006*4882a593Smuzhiyun 	}
1007*4882a593Smuzhiyun 	if (phy->gmode) {
1008*4882a593Smuzhiyun 		tmp = b43legacy_phy_read(dev, 0x0400) & 0xFF;
1009*4882a593Smuzhiyun 		if (tmp == 3) {
1010*4882a593Smuzhiyun 			b43legacy_phy_write(dev, 0x04C2, 0x1816);
1011*4882a593Smuzhiyun 			b43legacy_phy_write(dev, 0x04C3, 0x8606);
1012*4882a593Smuzhiyun 		}
1013*4882a593Smuzhiyun 		if (tmp == 4 || tmp == 5) {
1014*4882a593Smuzhiyun 			b43legacy_phy_write(dev, 0x04C2, 0x1816);
1015*4882a593Smuzhiyun 			b43legacy_phy_write(dev, 0x04C3, 0x8006);
1016*4882a593Smuzhiyun 			b43legacy_phy_write(dev, 0x04CC,
1017*4882a593Smuzhiyun 					    (b43legacy_phy_read(dev,
1018*4882a593Smuzhiyun 					     0x04CC) & 0x00FF) |
1019*4882a593Smuzhiyun 					     0x1F00);
1020*4882a593Smuzhiyun 		}
1021*4882a593Smuzhiyun 		if (phy->rev >= 2)
1022*4882a593Smuzhiyun 			b43legacy_phy_write(dev, 0x047E, 0x0078);
1023*4882a593Smuzhiyun 	}
1024*4882a593Smuzhiyun 	if (phy->radio_rev == 8) {
1025*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0801, b43legacy_phy_read(dev, 0x0801)
1026*4882a593Smuzhiyun 				    | 0x0080);
1027*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x043E, b43legacy_phy_read(dev, 0x043E)
1028*4882a593Smuzhiyun 				    | 0x0004);
1029*4882a593Smuzhiyun 	}
1030*4882a593Smuzhiyun 	if (phy->rev >= 2 && phy->gmode)
1031*4882a593Smuzhiyun 		b43legacy_calc_loopback_gain(dev);
1032*4882a593Smuzhiyun 	if (phy->radio_rev != 8) {
1033*4882a593Smuzhiyun 		if (phy->initval == 0xFFFF)
1034*4882a593Smuzhiyun 			phy->initval = b43legacy_radio_init2050(dev);
1035*4882a593Smuzhiyun 		else
1036*4882a593Smuzhiyun 			b43legacy_radio_write16(dev, 0x0078, phy->initval);
1037*4882a593Smuzhiyun 	}
1038*4882a593Smuzhiyun 	if (phy->txctl2 == 0xFFFF)
1039*4882a593Smuzhiyun 		b43legacy_phy_lo_g_measure(dev);
1040*4882a593Smuzhiyun 	else {
1041*4882a593Smuzhiyun 		if (phy->radio_ver == 0x2050 && phy->radio_rev == 8)
1042*4882a593Smuzhiyun 			b43legacy_radio_write16(dev, 0x0052,
1043*4882a593Smuzhiyun 						(phy->txctl1 << 4) |
1044*4882a593Smuzhiyun 						phy->txctl2);
1045*4882a593Smuzhiyun 		else
1046*4882a593Smuzhiyun 			b43legacy_radio_write16(dev, 0x0052,
1047*4882a593Smuzhiyun 						(b43legacy_radio_read16(dev,
1048*4882a593Smuzhiyun 						 0x0052) & 0xFFF0) |
1049*4882a593Smuzhiyun 						 phy->txctl1);
1050*4882a593Smuzhiyun 		if (phy->rev >= 6)
1051*4882a593Smuzhiyun 			b43legacy_phy_write(dev, 0x0036,
1052*4882a593Smuzhiyun 					    (b43legacy_phy_read(dev, 0x0036)
1053*4882a593Smuzhiyun 					     & 0x0FFF) | (phy->txctl2 << 12));
1054*4882a593Smuzhiyun 		if (dev->dev->bus->sprom.boardflags_lo &
1055*4882a593Smuzhiyun 		    B43legacy_BFL_PACTRL)
1056*4882a593Smuzhiyun 			b43legacy_phy_write(dev, 0x002E, 0x8075);
1057*4882a593Smuzhiyun 		else
1058*4882a593Smuzhiyun 			b43legacy_phy_write(dev, 0x002E, 0x807F);
1059*4882a593Smuzhiyun 		if (phy->rev < 2)
1060*4882a593Smuzhiyun 			b43legacy_phy_write(dev, 0x002F, 0x0101);
1061*4882a593Smuzhiyun 		else
1062*4882a593Smuzhiyun 			b43legacy_phy_write(dev, 0x002F, 0x0202);
1063*4882a593Smuzhiyun 	}
1064*4882a593Smuzhiyun 	if (phy->gmode) {
1065*4882a593Smuzhiyun 		b43legacy_phy_lo_adjust(dev, 0);
1066*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x080F, 0x8078);
1067*4882a593Smuzhiyun 	}
1068*4882a593Smuzhiyun 
1069*4882a593Smuzhiyun 	if (!(dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_RSSI)) {
1070*4882a593Smuzhiyun 		/* The specs state to update the NRSSI LT with
1071*4882a593Smuzhiyun 		 * the value 0x7FFFFFFF here. I think that is some weird
1072*4882a593Smuzhiyun 		 * compiler optimization in the original driver.
1073*4882a593Smuzhiyun 		 * Essentially, what we do here is resetting all NRSSI LT
1074*4882a593Smuzhiyun 		 * entries to -32 (see the clamp_val() in nrssi_hw_update())
1075*4882a593Smuzhiyun 		 */
1076*4882a593Smuzhiyun 		b43legacy_nrssi_hw_update(dev, 0xFFFF);
1077*4882a593Smuzhiyun 		b43legacy_calc_nrssi_threshold(dev);
1078*4882a593Smuzhiyun 	} else if (phy->gmode || phy->rev >= 2) {
1079*4882a593Smuzhiyun 		if (phy->nrssi[0] == -1000) {
1080*4882a593Smuzhiyun 			B43legacy_WARN_ON(phy->nrssi[1] != -1000);
1081*4882a593Smuzhiyun 			b43legacy_calc_nrssi_slope(dev);
1082*4882a593Smuzhiyun 		} else {
1083*4882a593Smuzhiyun 			B43legacy_WARN_ON(phy->nrssi[1] == -1000);
1084*4882a593Smuzhiyun 			b43legacy_calc_nrssi_threshold(dev);
1085*4882a593Smuzhiyun 		}
1086*4882a593Smuzhiyun 	}
1087*4882a593Smuzhiyun 	if (phy->radio_rev == 8)
1088*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0805, 0x3230);
1089*4882a593Smuzhiyun 	b43legacy_phy_init_pctl(dev);
1090*4882a593Smuzhiyun 	if (dev->dev->bus->chip_id == 0x4306
1091*4882a593Smuzhiyun 	    && dev->dev->bus->chip_package == 2) {
1092*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0429,
1093*4882a593Smuzhiyun 				    b43legacy_phy_read(dev, 0x0429) & 0xBFFF);
1094*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x04C3,
1095*4882a593Smuzhiyun 				    b43legacy_phy_read(dev, 0x04C3) & 0x7FFF);
1096*4882a593Smuzhiyun 	}
1097*4882a593Smuzhiyun }
1098*4882a593Smuzhiyun 
b43legacy_phy_lo_b_r15_loop(struct b43legacy_wldev * dev)1099*4882a593Smuzhiyun static u16 b43legacy_phy_lo_b_r15_loop(struct b43legacy_wldev *dev)
1100*4882a593Smuzhiyun {
1101*4882a593Smuzhiyun 	int i;
1102*4882a593Smuzhiyun 	u16 ret = 0;
1103*4882a593Smuzhiyun 	unsigned long flags;
1104*4882a593Smuzhiyun 
1105*4882a593Smuzhiyun 	local_irq_save(flags);
1106*4882a593Smuzhiyun 	for (i = 0; i < 10; i++) {
1107*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0015, 0xAFA0);
1108*4882a593Smuzhiyun 		udelay(1);
1109*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0015, 0xEFA0);
1110*4882a593Smuzhiyun 		udelay(10);
1111*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0015, 0xFFA0);
1112*4882a593Smuzhiyun 		udelay(40);
1113*4882a593Smuzhiyun 		ret += b43legacy_phy_read(dev, 0x002C);
1114*4882a593Smuzhiyun 	}
1115*4882a593Smuzhiyun 	local_irq_restore(flags);
1116*4882a593Smuzhiyun 	cond_resched();
1117*4882a593Smuzhiyun 
1118*4882a593Smuzhiyun 	return ret;
1119*4882a593Smuzhiyun }
1120*4882a593Smuzhiyun 
b43legacy_phy_lo_b_measure(struct b43legacy_wldev * dev)1121*4882a593Smuzhiyun void b43legacy_phy_lo_b_measure(struct b43legacy_wldev *dev)
1122*4882a593Smuzhiyun {
1123*4882a593Smuzhiyun 	struct b43legacy_phy *phy = &dev->phy;
1124*4882a593Smuzhiyun 	u16 regstack[12] = { 0 };
1125*4882a593Smuzhiyun 	u16 mls;
1126*4882a593Smuzhiyun 	s16 fval;
1127*4882a593Smuzhiyun 	int i;
1128*4882a593Smuzhiyun 	int j;
1129*4882a593Smuzhiyun 
1130*4882a593Smuzhiyun 	regstack[0] = b43legacy_phy_read(dev, 0x0015);
1131*4882a593Smuzhiyun 	regstack[1] = b43legacy_radio_read16(dev, 0x0052) & 0xFFF0;
1132*4882a593Smuzhiyun 
1133*4882a593Smuzhiyun 	if (phy->radio_ver == 0x2053) {
1134*4882a593Smuzhiyun 		regstack[2] = b43legacy_phy_read(dev, 0x000A);
1135*4882a593Smuzhiyun 		regstack[3] = b43legacy_phy_read(dev, 0x002A);
1136*4882a593Smuzhiyun 		regstack[4] = b43legacy_phy_read(dev, 0x0035);
1137*4882a593Smuzhiyun 		regstack[5] = b43legacy_phy_read(dev, 0x0003);
1138*4882a593Smuzhiyun 		regstack[6] = b43legacy_phy_read(dev, 0x0001);
1139*4882a593Smuzhiyun 		regstack[7] = b43legacy_phy_read(dev, 0x0030);
1140*4882a593Smuzhiyun 
1141*4882a593Smuzhiyun 		regstack[8] = b43legacy_radio_read16(dev, 0x0043);
1142*4882a593Smuzhiyun 		regstack[9] = b43legacy_radio_read16(dev, 0x007A);
1143*4882a593Smuzhiyun 		regstack[10] = b43legacy_read16(dev, 0x03EC);
1144*4882a593Smuzhiyun 		regstack[11] = b43legacy_radio_read16(dev, 0x0052) & 0x00F0;
1145*4882a593Smuzhiyun 
1146*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0030, 0x00FF);
1147*4882a593Smuzhiyun 		b43legacy_write16(dev, 0x03EC, 0x3F3F);
1148*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0035, regstack[4] & 0xFF7F);
1149*4882a593Smuzhiyun 		b43legacy_radio_write16(dev, 0x007A, regstack[9] & 0xFFF0);
1150*4882a593Smuzhiyun 	}
1151*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x0015, 0xB000);
1152*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x002B, 0x0004);
1153*4882a593Smuzhiyun 
1154*4882a593Smuzhiyun 	if (phy->radio_ver == 0x2053) {
1155*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x002B, 0x0203);
1156*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x002A, 0x08A3);
1157*4882a593Smuzhiyun 	}
1158*4882a593Smuzhiyun 
1159*4882a593Smuzhiyun 	phy->minlowsig[0] = 0xFFFF;
1160*4882a593Smuzhiyun 
1161*4882a593Smuzhiyun 	for (i = 0; i < 4; i++) {
1162*4882a593Smuzhiyun 		b43legacy_radio_write16(dev, 0x0052, regstack[1] | i);
1163*4882a593Smuzhiyun 		b43legacy_phy_lo_b_r15_loop(dev);
1164*4882a593Smuzhiyun 	}
1165*4882a593Smuzhiyun 	for (i = 0; i < 10; i++) {
1166*4882a593Smuzhiyun 		b43legacy_radio_write16(dev, 0x0052, regstack[1] | i);
1167*4882a593Smuzhiyun 		mls = b43legacy_phy_lo_b_r15_loop(dev) / 10;
1168*4882a593Smuzhiyun 		if (mls < phy->minlowsig[0]) {
1169*4882a593Smuzhiyun 			phy->minlowsig[0] = mls;
1170*4882a593Smuzhiyun 			phy->minlowsigpos[0] = i;
1171*4882a593Smuzhiyun 		}
1172*4882a593Smuzhiyun 	}
1173*4882a593Smuzhiyun 	b43legacy_radio_write16(dev, 0x0052, regstack[1]
1174*4882a593Smuzhiyun 				| phy->minlowsigpos[0]);
1175*4882a593Smuzhiyun 
1176*4882a593Smuzhiyun 	phy->minlowsig[1] = 0xFFFF;
1177*4882a593Smuzhiyun 
1178*4882a593Smuzhiyun 	for (i = -4; i < 5; i += 2) {
1179*4882a593Smuzhiyun 		for (j = -4; j < 5; j += 2) {
1180*4882a593Smuzhiyun 			if (j < 0)
1181*4882a593Smuzhiyun 				fval = (0x0100 * i) + j + 0x0100;
1182*4882a593Smuzhiyun 			else
1183*4882a593Smuzhiyun 				fval = (0x0100 * i) + j;
1184*4882a593Smuzhiyun 			b43legacy_phy_write(dev, 0x002F, fval);
1185*4882a593Smuzhiyun 			mls = b43legacy_phy_lo_b_r15_loop(dev) / 10;
1186*4882a593Smuzhiyun 			if (mls < phy->minlowsig[1]) {
1187*4882a593Smuzhiyun 				phy->minlowsig[1] = mls;
1188*4882a593Smuzhiyun 				phy->minlowsigpos[1] = fval;
1189*4882a593Smuzhiyun 			}
1190*4882a593Smuzhiyun 		}
1191*4882a593Smuzhiyun 	}
1192*4882a593Smuzhiyun 	phy->minlowsigpos[1] += 0x0101;
1193*4882a593Smuzhiyun 
1194*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x002F, phy->minlowsigpos[1]);
1195*4882a593Smuzhiyun 	if (phy->radio_ver == 0x2053) {
1196*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x000A, regstack[2]);
1197*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x002A, regstack[3]);
1198*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0035, regstack[4]);
1199*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0003, regstack[5]);
1200*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0001, regstack[6]);
1201*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0030, regstack[7]);
1202*4882a593Smuzhiyun 
1203*4882a593Smuzhiyun 		b43legacy_radio_write16(dev, 0x0043, regstack[8]);
1204*4882a593Smuzhiyun 		b43legacy_radio_write16(dev, 0x007A, regstack[9]);
1205*4882a593Smuzhiyun 
1206*4882a593Smuzhiyun 		b43legacy_radio_write16(dev, 0x0052,
1207*4882a593Smuzhiyun 					(b43legacy_radio_read16(dev, 0x0052)
1208*4882a593Smuzhiyun 					& 0x000F) | regstack[11]);
1209*4882a593Smuzhiyun 
1210*4882a593Smuzhiyun 		b43legacy_write16(dev, 0x03EC, regstack[10]);
1211*4882a593Smuzhiyun 	}
1212*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x0015, regstack[0]);
1213*4882a593Smuzhiyun }
1214*4882a593Smuzhiyun 
1215*4882a593Smuzhiyun static inline
b43legacy_phy_lo_g_deviation_subval(struct b43legacy_wldev * dev,u16 control)1216*4882a593Smuzhiyun u16 b43legacy_phy_lo_g_deviation_subval(struct b43legacy_wldev *dev,
1217*4882a593Smuzhiyun 					u16 control)
1218*4882a593Smuzhiyun {
1219*4882a593Smuzhiyun 	struct b43legacy_phy *phy = &dev->phy;
1220*4882a593Smuzhiyun 	u16 ret;
1221*4882a593Smuzhiyun 	unsigned long flags;
1222*4882a593Smuzhiyun 
1223*4882a593Smuzhiyun 	local_irq_save(flags);
1224*4882a593Smuzhiyun 	if (phy->gmode) {
1225*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x15, 0xE300);
1226*4882a593Smuzhiyun 		control <<= 8;
1227*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0812, control | 0x00B0);
1228*4882a593Smuzhiyun 		udelay(5);
1229*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0812, control | 0x00B2);
1230*4882a593Smuzhiyun 		udelay(2);
1231*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0812, control | 0x00B3);
1232*4882a593Smuzhiyun 		udelay(4);
1233*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0015, 0xF300);
1234*4882a593Smuzhiyun 		udelay(8);
1235*4882a593Smuzhiyun 	} else {
1236*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0015, control | 0xEFA0);
1237*4882a593Smuzhiyun 		udelay(2);
1238*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0015, control | 0xEFE0);
1239*4882a593Smuzhiyun 		udelay(4);
1240*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0015, control | 0xFFE0);
1241*4882a593Smuzhiyun 		udelay(8);
1242*4882a593Smuzhiyun 	}
1243*4882a593Smuzhiyun 	ret = b43legacy_phy_read(dev, 0x002D);
1244*4882a593Smuzhiyun 	local_irq_restore(flags);
1245*4882a593Smuzhiyun 	cond_resched();
1246*4882a593Smuzhiyun 
1247*4882a593Smuzhiyun 	return ret;
1248*4882a593Smuzhiyun }
1249*4882a593Smuzhiyun 
b43legacy_phy_lo_g_singledeviation(struct b43legacy_wldev * dev,u16 control)1250*4882a593Smuzhiyun static u32 b43legacy_phy_lo_g_singledeviation(struct b43legacy_wldev *dev,
1251*4882a593Smuzhiyun 					      u16 control)
1252*4882a593Smuzhiyun {
1253*4882a593Smuzhiyun 	int i;
1254*4882a593Smuzhiyun 	u32 ret = 0;
1255*4882a593Smuzhiyun 
1256*4882a593Smuzhiyun 	for (i = 0; i < 8; i++)
1257*4882a593Smuzhiyun 		ret += b43legacy_phy_lo_g_deviation_subval(dev, control);
1258*4882a593Smuzhiyun 
1259*4882a593Smuzhiyun 	return ret;
1260*4882a593Smuzhiyun }
1261*4882a593Smuzhiyun 
1262*4882a593Smuzhiyun /* Write the LocalOscillator CONTROL */
1263*4882a593Smuzhiyun static inline
b43legacy_lo_write(struct b43legacy_wldev * dev,struct b43legacy_lopair * pair)1264*4882a593Smuzhiyun void b43legacy_lo_write(struct b43legacy_wldev *dev,
1265*4882a593Smuzhiyun 			struct b43legacy_lopair *pair)
1266*4882a593Smuzhiyun {
1267*4882a593Smuzhiyun 	u16 value;
1268*4882a593Smuzhiyun 
1269*4882a593Smuzhiyun 	value = (u8)(pair->low);
1270*4882a593Smuzhiyun 	value |= ((u8)(pair->high)) << 8;
1271*4882a593Smuzhiyun 
1272*4882a593Smuzhiyun #ifdef CONFIG_B43LEGACY_DEBUG
1273*4882a593Smuzhiyun 	/* Sanity check. */
1274*4882a593Smuzhiyun 	if (pair->low < -8 || pair->low > 8 ||
1275*4882a593Smuzhiyun 	    pair->high < -8 || pair->high > 8) {
1276*4882a593Smuzhiyun 		b43legacydbg(dev->wl,
1277*4882a593Smuzhiyun 		       "WARNING: Writing invalid LOpair "
1278*4882a593Smuzhiyun 		       "(low: %d, high: %d)\n",
1279*4882a593Smuzhiyun 		       pair->low, pair->high);
1280*4882a593Smuzhiyun 		dump_stack();
1281*4882a593Smuzhiyun 	}
1282*4882a593Smuzhiyun #endif
1283*4882a593Smuzhiyun 
1284*4882a593Smuzhiyun 	b43legacy_phy_write(dev, B43legacy_PHY_G_LO_CONTROL, value);
1285*4882a593Smuzhiyun }
1286*4882a593Smuzhiyun 
1287*4882a593Smuzhiyun static inline
b43legacy_find_lopair(struct b43legacy_wldev * dev,u16 bbatt,u16 rfatt,u16 tx)1288*4882a593Smuzhiyun struct b43legacy_lopair *b43legacy_find_lopair(struct b43legacy_wldev *dev,
1289*4882a593Smuzhiyun 					       u16 bbatt,
1290*4882a593Smuzhiyun 					       u16 rfatt,
1291*4882a593Smuzhiyun 					       u16 tx)
1292*4882a593Smuzhiyun {
1293*4882a593Smuzhiyun 	static const u8 dict[10] = { 11, 10, 11, 12, 13, 12, 13, 12, 13, 12 };
1294*4882a593Smuzhiyun 	struct b43legacy_phy *phy = &dev->phy;
1295*4882a593Smuzhiyun 
1296*4882a593Smuzhiyun 	if (bbatt > 6)
1297*4882a593Smuzhiyun 		bbatt = 6;
1298*4882a593Smuzhiyun 	B43legacy_WARN_ON(rfatt >= 10);
1299*4882a593Smuzhiyun 
1300*4882a593Smuzhiyun 	if (tx == 3)
1301*4882a593Smuzhiyun 		return b43legacy_get_lopair(phy, rfatt, bbatt);
1302*4882a593Smuzhiyun 	return b43legacy_get_lopair(phy, dict[rfatt], bbatt);
1303*4882a593Smuzhiyun }
1304*4882a593Smuzhiyun 
1305*4882a593Smuzhiyun static inline
b43legacy_current_lopair(struct b43legacy_wldev * dev)1306*4882a593Smuzhiyun struct b43legacy_lopair *b43legacy_current_lopair(struct b43legacy_wldev *dev)
1307*4882a593Smuzhiyun {
1308*4882a593Smuzhiyun 	struct b43legacy_phy *phy = &dev->phy;
1309*4882a593Smuzhiyun 
1310*4882a593Smuzhiyun 	return b43legacy_find_lopair(dev, phy->bbatt,
1311*4882a593Smuzhiyun 				     phy->rfatt, phy->txctl1);
1312*4882a593Smuzhiyun }
1313*4882a593Smuzhiyun 
1314*4882a593Smuzhiyun /* Adjust B/G LO */
b43legacy_phy_lo_adjust(struct b43legacy_wldev * dev,int fixed)1315*4882a593Smuzhiyun void b43legacy_phy_lo_adjust(struct b43legacy_wldev *dev, int fixed)
1316*4882a593Smuzhiyun {
1317*4882a593Smuzhiyun 	struct b43legacy_lopair *pair;
1318*4882a593Smuzhiyun 
1319*4882a593Smuzhiyun 	if (fixed) {
1320*4882a593Smuzhiyun 		/* Use fixed values. Only for initialization. */
1321*4882a593Smuzhiyun 		pair = b43legacy_find_lopair(dev, 2, 3, 0);
1322*4882a593Smuzhiyun 	} else
1323*4882a593Smuzhiyun 		pair = b43legacy_current_lopair(dev);
1324*4882a593Smuzhiyun 	b43legacy_lo_write(dev, pair);
1325*4882a593Smuzhiyun }
1326*4882a593Smuzhiyun 
b43legacy_phy_lo_g_measure_txctl2(struct b43legacy_wldev * dev)1327*4882a593Smuzhiyun static void b43legacy_phy_lo_g_measure_txctl2(struct b43legacy_wldev *dev)
1328*4882a593Smuzhiyun {
1329*4882a593Smuzhiyun 	struct b43legacy_phy *phy = &dev->phy;
1330*4882a593Smuzhiyun 	u16 txctl2 = 0;
1331*4882a593Smuzhiyun 	u16 i;
1332*4882a593Smuzhiyun 	u32 smallest;
1333*4882a593Smuzhiyun 	u32 tmp;
1334*4882a593Smuzhiyun 
1335*4882a593Smuzhiyun 	b43legacy_radio_write16(dev, 0x0052, 0x0000);
1336*4882a593Smuzhiyun 	udelay(10);
1337*4882a593Smuzhiyun 	smallest = b43legacy_phy_lo_g_singledeviation(dev, 0);
1338*4882a593Smuzhiyun 	for (i = 0; i < 16; i++) {
1339*4882a593Smuzhiyun 		b43legacy_radio_write16(dev, 0x0052, i);
1340*4882a593Smuzhiyun 		udelay(10);
1341*4882a593Smuzhiyun 		tmp = b43legacy_phy_lo_g_singledeviation(dev, 0);
1342*4882a593Smuzhiyun 		if (tmp < smallest) {
1343*4882a593Smuzhiyun 			smallest = tmp;
1344*4882a593Smuzhiyun 			txctl2 = i;
1345*4882a593Smuzhiyun 		}
1346*4882a593Smuzhiyun 	}
1347*4882a593Smuzhiyun 	phy->txctl2 = txctl2;
1348*4882a593Smuzhiyun }
1349*4882a593Smuzhiyun 
1350*4882a593Smuzhiyun static
b43legacy_phy_lo_g_state(struct b43legacy_wldev * dev,const struct b43legacy_lopair * in_pair,struct b43legacy_lopair * out_pair,u16 r27)1351*4882a593Smuzhiyun void b43legacy_phy_lo_g_state(struct b43legacy_wldev *dev,
1352*4882a593Smuzhiyun 			      const struct b43legacy_lopair *in_pair,
1353*4882a593Smuzhiyun 			      struct b43legacy_lopair *out_pair,
1354*4882a593Smuzhiyun 			      u16 r27)
1355*4882a593Smuzhiyun {
1356*4882a593Smuzhiyun 	static const struct b43legacy_lopair transitions[8] = {
1357*4882a593Smuzhiyun 		{ .high =  1,  .low =  1, },
1358*4882a593Smuzhiyun 		{ .high =  1,  .low =  0, },
1359*4882a593Smuzhiyun 		{ .high =  1,  .low = -1, },
1360*4882a593Smuzhiyun 		{ .high =  0,  .low = -1, },
1361*4882a593Smuzhiyun 		{ .high = -1,  .low = -1, },
1362*4882a593Smuzhiyun 		{ .high = -1,  .low =  0, },
1363*4882a593Smuzhiyun 		{ .high = -1,  .low =  1, },
1364*4882a593Smuzhiyun 		{ .high =  0,  .low =  1, },
1365*4882a593Smuzhiyun 	};
1366*4882a593Smuzhiyun 	struct b43legacy_lopair lowest_transition = {
1367*4882a593Smuzhiyun 		.high = in_pair->high,
1368*4882a593Smuzhiyun 		.low = in_pair->low,
1369*4882a593Smuzhiyun 	};
1370*4882a593Smuzhiyun 	struct b43legacy_lopair tmp_pair;
1371*4882a593Smuzhiyun 	struct b43legacy_lopair transition;
1372*4882a593Smuzhiyun 	int i = 12;
1373*4882a593Smuzhiyun 	int state = 0;
1374*4882a593Smuzhiyun 	int found_lower;
1375*4882a593Smuzhiyun 	int j;
1376*4882a593Smuzhiyun 	int begin;
1377*4882a593Smuzhiyun 	int end;
1378*4882a593Smuzhiyun 	u32 lowest_deviation;
1379*4882a593Smuzhiyun 	u32 tmp;
1380*4882a593Smuzhiyun 
1381*4882a593Smuzhiyun 	/* Note that in_pair and out_pair can point to the same pair.
1382*4882a593Smuzhiyun 	 * Be careful. */
1383*4882a593Smuzhiyun 
1384*4882a593Smuzhiyun 	b43legacy_lo_write(dev, &lowest_transition);
1385*4882a593Smuzhiyun 	lowest_deviation = b43legacy_phy_lo_g_singledeviation(dev, r27);
1386*4882a593Smuzhiyun 	do {
1387*4882a593Smuzhiyun 		found_lower = 0;
1388*4882a593Smuzhiyun 		B43legacy_WARN_ON(!(state >= 0 && state <= 8));
1389*4882a593Smuzhiyun 		if (state == 0) {
1390*4882a593Smuzhiyun 			begin = 1;
1391*4882a593Smuzhiyun 			end = 8;
1392*4882a593Smuzhiyun 		} else if (state % 2 == 0) {
1393*4882a593Smuzhiyun 			begin = state - 1;
1394*4882a593Smuzhiyun 			end = state + 1;
1395*4882a593Smuzhiyun 		} else {
1396*4882a593Smuzhiyun 			begin = state - 2;
1397*4882a593Smuzhiyun 			end = state + 2;
1398*4882a593Smuzhiyun 		}
1399*4882a593Smuzhiyun 		if (begin < 1)
1400*4882a593Smuzhiyun 			begin += 8;
1401*4882a593Smuzhiyun 		if (end > 8)
1402*4882a593Smuzhiyun 			end -= 8;
1403*4882a593Smuzhiyun 
1404*4882a593Smuzhiyun 		j = begin;
1405*4882a593Smuzhiyun 		tmp_pair.high = lowest_transition.high;
1406*4882a593Smuzhiyun 		tmp_pair.low = lowest_transition.low;
1407*4882a593Smuzhiyun 		while (1) {
1408*4882a593Smuzhiyun 			B43legacy_WARN_ON(!(j >= 1 && j <= 8));
1409*4882a593Smuzhiyun 			transition.high = tmp_pair.high +
1410*4882a593Smuzhiyun 					  transitions[j - 1].high;
1411*4882a593Smuzhiyun 			transition.low = tmp_pair.low + transitions[j - 1].low;
1412*4882a593Smuzhiyun 			if ((abs(transition.low) < 9)
1413*4882a593Smuzhiyun 			     && (abs(transition.high) < 9)) {
1414*4882a593Smuzhiyun 				b43legacy_lo_write(dev, &transition);
1415*4882a593Smuzhiyun 				tmp = b43legacy_phy_lo_g_singledeviation(dev,
1416*4882a593Smuzhiyun 								       r27);
1417*4882a593Smuzhiyun 				if (tmp < lowest_deviation) {
1418*4882a593Smuzhiyun 					lowest_deviation = tmp;
1419*4882a593Smuzhiyun 					state = j;
1420*4882a593Smuzhiyun 					found_lower = 1;
1421*4882a593Smuzhiyun 
1422*4882a593Smuzhiyun 					lowest_transition.high =
1423*4882a593Smuzhiyun 								transition.high;
1424*4882a593Smuzhiyun 					lowest_transition.low = transition.low;
1425*4882a593Smuzhiyun 				}
1426*4882a593Smuzhiyun 			}
1427*4882a593Smuzhiyun 			if (j == end)
1428*4882a593Smuzhiyun 				break;
1429*4882a593Smuzhiyun 			if (j == 8)
1430*4882a593Smuzhiyun 				j = 1;
1431*4882a593Smuzhiyun 			else
1432*4882a593Smuzhiyun 				j++;
1433*4882a593Smuzhiyun 		}
1434*4882a593Smuzhiyun 	} while (i-- && found_lower);
1435*4882a593Smuzhiyun 
1436*4882a593Smuzhiyun 	out_pair->high = lowest_transition.high;
1437*4882a593Smuzhiyun 	out_pair->low = lowest_transition.low;
1438*4882a593Smuzhiyun }
1439*4882a593Smuzhiyun 
1440*4882a593Smuzhiyun /* Set the baseband attenuation value on chip. */
b43legacy_phy_set_baseband_attenuation(struct b43legacy_wldev * dev,u16 bbatt)1441*4882a593Smuzhiyun void b43legacy_phy_set_baseband_attenuation(struct b43legacy_wldev *dev,
1442*4882a593Smuzhiyun 					    u16 bbatt)
1443*4882a593Smuzhiyun {
1444*4882a593Smuzhiyun 	struct b43legacy_phy *phy = &dev->phy;
1445*4882a593Smuzhiyun 	u16 value;
1446*4882a593Smuzhiyun 
1447*4882a593Smuzhiyun 	if (phy->analog == 0) {
1448*4882a593Smuzhiyun 		value = (b43legacy_read16(dev, 0x03E6) & 0xFFF0);
1449*4882a593Smuzhiyun 		value |= (bbatt & 0x000F);
1450*4882a593Smuzhiyun 		b43legacy_write16(dev, 0x03E6, value);
1451*4882a593Smuzhiyun 		return;
1452*4882a593Smuzhiyun 	}
1453*4882a593Smuzhiyun 
1454*4882a593Smuzhiyun 	if (phy->analog > 1) {
1455*4882a593Smuzhiyun 		value = b43legacy_phy_read(dev, 0x0060) & 0xFFC3;
1456*4882a593Smuzhiyun 		value |= (bbatt << 2) & 0x003C;
1457*4882a593Smuzhiyun 	} else {
1458*4882a593Smuzhiyun 		value = b43legacy_phy_read(dev, 0x0060) & 0xFF87;
1459*4882a593Smuzhiyun 		value |= (bbatt << 3) & 0x0078;
1460*4882a593Smuzhiyun 	}
1461*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x0060, value);
1462*4882a593Smuzhiyun }
1463*4882a593Smuzhiyun 
1464*4882a593Smuzhiyun /* https://bcm-specs.sipsolutions.net/LocalOscillator/Measure */
b43legacy_phy_lo_g_measure(struct b43legacy_wldev * dev)1465*4882a593Smuzhiyun void b43legacy_phy_lo_g_measure(struct b43legacy_wldev *dev)
1466*4882a593Smuzhiyun {
1467*4882a593Smuzhiyun 	static const u8 pairorder[10] = { 3, 1, 5, 7, 9, 2, 0, 4, 6, 8 };
1468*4882a593Smuzhiyun 	const int is_initializing = (b43legacy_status(dev)
1469*4882a593Smuzhiyun 				     < B43legacy_STAT_STARTED);
1470*4882a593Smuzhiyun 	struct b43legacy_phy *phy = &dev->phy;
1471*4882a593Smuzhiyun 	u16 h;
1472*4882a593Smuzhiyun 	u16 i;
1473*4882a593Smuzhiyun 	u16 oldi = 0;
1474*4882a593Smuzhiyun 	u16 j;
1475*4882a593Smuzhiyun 	struct b43legacy_lopair control;
1476*4882a593Smuzhiyun 	struct b43legacy_lopair *tmp_control;
1477*4882a593Smuzhiyun 	u16 tmp;
1478*4882a593Smuzhiyun 	u16 regstack[16] = { 0 };
1479*4882a593Smuzhiyun 	u8 oldchannel;
1480*4882a593Smuzhiyun 
1481*4882a593Smuzhiyun 	/* XXX: What are these? */
1482*4882a593Smuzhiyun 	u8 r27 = 0;
1483*4882a593Smuzhiyun 	u16 r31;
1484*4882a593Smuzhiyun 
1485*4882a593Smuzhiyun 	oldchannel = phy->channel;
1486*4882a593Smuzhiyun 	/* Setup */
1487*4882a593Smuzhiyun 	if (phy->gmode) {
1488*4882a593Smuzhiyun 		regstack[0] = b43legacy_phy_read(dev, B43legacy_PHY_G_CRS);
1489*4882a593Smuzhiyun 		regstack[1] = b43legacy_phy_read(dev, 0x0802);
1490*4882a593Smuzhiyun 		b43legacy_phy_write(dev, B43legacy_PHY_G_CRS, regstack[0]
1491*4882a593Smuzhiyun 				    & 0x7FFF);
1492*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0802, regstack[1] & 0xFFFC);
1493*4882a593Smuzhiyun 	}
1494*4882a593Smuzhiyun 	regstack[3] = b43legacy_read16(dev, 0x03E2);
1495*4882a593Smuzhiyun 	b43legacy_write16(dev, 0x03E2, regstack[3] | 0x8000);
1496*4882a593Smuzhiyun 	regstack[4] = b43legacy_read16(dev, B43legacy_MMIO_CHANNEL_EXT);
1497*4882a593Smuzhiyun 	regstack[5] = b43legacy_phy_read(dev, 0x15);
1498*4882a593Smuzhiyun 	regstack[6] = b43legacy_phy_read(dev, 0x2A);
1499*4882a593Smuzhiyun 	regstack[7] = b43legacy_phy_read(dev, 0x35);
1500*4882a593Smuzhiyun 	regstack[8] = b43legacy_phy_read(dev, 0x60);
1501*4882a593Smuzhiyun 	regstack[9] = b43legacy_radio_read16(dev, 0x43);
1502*4882a593Smuzhiyun 	regstack[10] = b43legacy_radio_read16(dev, 0x7A);
1503*4882a593Smuzhiyun 	regstack[11] = b43legacy_radio_read16(dev, 0x52);
1504*4882a593Smuzhiyun 	if (phy->gmode) {
1505*4882a593Smuzhiyun 		regstack[12] = b43legacy_phy_read(dev, 0x0811);
1506*4882a593Smuzhiyun 		regstack[13] = b43legacy_phy_read(dev, 0x0812);
1507*4882a593Smuzhiyun 		regstack[14] = b43legacy_phy_read(dev, 0x0814);
1508*4882a593Smuzhiyun 		regstack[15] = b43legacy_phy_read(dev, 0x0815);
1509*4882a593Smuzhiyun 	}
1510*4882a593Smuzhiyun 	b43legacy_radio_selectchannel(dev, 6, 0);
1511*4882a593Smuzhiyun 	if (phy->gmode) {
1512*4882a593Smuzhiyun 		b43legacy_phy_write(dev, B43legacy_PHY_G_CRS, regstack[0]
1513*4882a593Smuzhiyun 				    & 0x7FFF);
1514*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0802, regstack[1] & 0xFFFC);
1515*4882a593Smuzhiyun 		b43legacy_dummy_transmission(dev);
1516*4882a593Smuzhiyun 	}
1517*4882a593Smuzhiyun 	b43legacy_radio_write16(dev, 0x0043, 0x0006);
1518*4882a593Smuzhiyun 
1519*4882a593Smuzhiyun 	b43legacy_phy_set_baseband_attenuation(dev, 2);
1520*4882a593Smuzhiyun 
1521*4882a593Smuzhiyun 	b43legacy_write16(dev, B43legacy_MMIO_CHANNEL_EXT, 0x0000);
1522*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x002E, 0x007F);
1523*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x080F, 0x0078);
1524*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x0035, regstack[7] & ~(1 << 7));
1525*4882a593Smuzhiyun 	b43legacy_radio_write16(dev, 0x007A, regstack[10] & 0xFFF0);
1526*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x002B, 0x0203);
1527*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x002A, 0x08A3);
1528*4882a593Smuzhiyun 	if (phy->gmode) {
1529*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0814, regstack[14] | 0x0003);
1530*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0815, regstack[15] & 0xFFFC);
1531*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0811, 0x01B3);
1532*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0812, 0x00B2);
1533*4882a593Smuzhiyun 	}
1534*4882a593Smuzhiyun 	if (is_initializing)
1535*4882a593Smuzhiyun 		b43legacy_phy_lo_g_measure_txctl2(dev);
1536*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x080F, 0x8078);
1537*4882a593Smuzhiyun 
1538*4882a593Smuzhiyun 	/* Measure */
1539*4882a593Smuzhiyun 	control.low = 0;
1540*4882a593Smuzhiyun 	control.high = 0;
1541*4882a593Smuzhiyun 	for (h = 0; h < 10; h++) {
1542*4882a593Smuzhiyun 		/* Loop over each possible RadioAttenuation (0-9) */
1543*4882a593Smuzhiyun 		i = pairorder[h];
1544*4882a593Smuzhiyun 		if (is_initializing) {
1545*4882a593Smuzhiyun 			if (i == 3) {
1546*4882a593Smuzhiyun 				control.low = 0;
1547*4882a593Smuzhiyun 				control.high = 0;
1548*4882a593Smuzhiyun 			} else if (((i % 2 == 1) && (oldi % 2 == 1)) ||
1549*4882a593Smuzhiyun 				  ((i % 2 == 0) && (oldi % 2 == 0))) {
1550*4882a593Smuzhiyun 				tmp_control = b43legacy_get_lopair(phy, oldi,
1551*4882a593Smuzhiyun 								   0);
1552*4882a593Smuzhiyun 				memcpy(&control, tmp_control, sizeof(control));
1553*4882a593Smuzhiyun 			} else {
1554*4882a593Smuzhiyun 				tmp_control = b43legacy_get_lopair(phy, 3, 0);
1555*4882a593Smuzhiyun 				memcpy(&control, tmp_control, sizeof(control));
1556*4882a593Smuzhiyun 			}
1557*4882a593Smuzhiyun 		}
1558*4882a593Smuzhiyun 		/* Loop over each possible BasebandAttenuation/2 */
1559*4882a593Smuzhiyun 		for (j = 0; j < 4; j++) {
1560*4882a593Smuzhiyun 			if (is_initializing) {
1561*4882a593Smuzhiyun 				tmp = i * 2 + j;
1562*4882a593Smuzhiyun 				r27 = 0;
1563*4882a593Smuzhiyun 				r31 = 0;
1564*4882a593Smuzhiyun 				if (tmp > 14) {
1565*4882a593Smuzhiyun 					r31 = 1;
1566*4882a593Smuzhiyun 					if (tmp > 17)
1567*4882a593Smuzhiyun 						r27 = 1;
1568*4882a593Smuzhiyun 					if (tmp > 19)
1569*4882a593Smuzhiyun 						r27 = 2;
1570*4882a593Smuzhiyun 				}
1571*4882a593Smuzhiyun 			} else {
1572*4882a593Smuzhiyun 				tmp_control = b43legacy_get_lopair(phy, i,
1573*4882a593Smuzhiyun 								   j * 2);
1574*4882a593Smuzhiyun 				if (!tmp_control->used)
1575*4882a593Smuzhiyun 					continue;
1576*4882a593Smuzhiyun 				memcpy(&control, tmp_control, sizeof(control));
1577*4882a593Smuzhiyun 				r27 = 3;
1578*4882a593Smuzhiyun 				r31 = 0;
1579*4882a593Smuzhiyun 			}
1580*4882a593Smuzhiyun 			b43legacy_radio_write16(dev, 0x43, i);
1581*4882a593Smuzhiyun 			b43legacy_radio_write16(dev, 0x52, phy->txctl2);
1582*4882a593Smuzhiyun 			udelay(10);
1583*4882a593Smuzhiyun 			cond_resched();
1584*4882a593Smuzhiyun 
1585*4882a593Smuzhiyun 			b43legacy_phy_set_baseband_attenuation(dev, j * 2);
1586*4882a593Smuzhiyun 
1587*4882a593Smuzhiyun 			tmp = (regstack[10] & 0xFFF0);
1588*4882a593Smuzhiyun 			if (r31)
1589*4882a593Smuzhiyun 				tmp |= 0x0008;
1590*4882a593Smuzhiyun 			b43legacy_radio_write16(dev, 0x007A, tmp);
1591*4882a593Smuzhiyun 
1592*4882a593Smuzhiyun 			tmp_control = b43legacy_get_lopair(phy, i, j * 2);
1593*4882a593Smuzhiyun 			b43legacy_phy_lo_g_state(dev, &control, tmp_control,
1594*4882a593Smuzhiyun 						 r27);
1595*4882a593Smuzhiyun 		}
1596*4882a593Smuzhiyun 		oldi = i;
1597*4882a593Smuzhiyun 	}
1598*4882a593Smuzhiyun 	/* Loop over each possible RadioAttenuation (10-13) */
1599*4882a593Smuzhiyun 	for (i = 10; i < 14; i++) {
1600*4882a593Smuzhiyun 		/* Loop over each possible BasebandAttenuation/2 */
1601*4882a593Smuzhiyun 		for (j = 0; j < 4; j++) {
1602*4882a593Smuzhiyun 			if (is_initializing) {
1603*4882a593Smuzhiyun 				tmp_control = b43legacy_get_lopair(phy, i - 9,
1604*4882a593Smuzhiyun 								 j * 2);
1605*4882a593Smuzhiyun 				memcpy(&control, tmp_control, sizeof(control));
1606*4882a593Smuzhiyun 				/* FIXME: The next line is wrong, as the
1607*4882a593Smuzhiyun 				 * following if statement can never trigger. */
1608*4882a593Smuzhiyun 				tmp = (i - 9) * 2 + j - 5;
1609*4882a593Smuzhiyun 				r27 = 0;
1610*4882a593Smuzhiyun 				r31 = 0;
1611*4882a593Smuzhiyun 				if (tmp > 14) {
1612*4882a593Smuzhiyun 					r31 = 1;
1613*4882a593Smuzhiyun 					if (tmp > 17)
1614*4882a593Smuzhiyun 						r27 = 1;
1615*4882a593Smuzhiyun 					if (tmp > 19)
1616*4882a593Smuzhiyun 						r27 = 2;
1617*4882a593Smuzhiyun 				}
1618*4882a593Smuzhiyun 			} else {
1619*4882a593Smuzhiyun 				tmp_control = b43legacy_get_lopair(phy, i - 9,
1620*4882a593Smuzhiyun 								   j * 2);
1621*4882a593Smuzhiyun 				if (!tmp_control->used)
1622*4882a593Smuzhiyun 					continue;
1623*4882a593Smuzhiyun 				memcpy(&control, tmp_control, sizeof(control));
1624*4882a593Smuzhiyun 				r27 = 3;
1625*4882a593Smuzhiyun 				r31 = 0;
1626*4882a593Smuzhiyun 			}
1627*4882a593Smuzhiyun 			b43legacy_radio_write16(dev, 0x43, i - 9);
1628*4882a593Smuzhiyun 			/* FIXME: shouldn't txctl1 be zero in the next line
1629*4882a593Smuzhiyun 			 * and 3 in the loop above? */
1630*4882a593Smuzhiyun 			b43legacy_radio_write16(dev, 0x52,
1631*4882a593Smuzhiyun 					      phy->txctl2
1632*4882a593Smuzhiyun 					      | (3/*txctl1*/ << 4));
1633*4882a593Smuzhiyun 			udelay(10);
1634*4882a593Smuzhiyun 			cond_resched();
1635*4882a593Smuzhiyun 
1636*4882a593Smuzhiyun 			b43legacy_phy_set_baseband_attenuation(dev, j * 2);
1637*4882a593Smuzhiyun 
1638*4882a593Smuzhiyun 			tmp = (regstack[10] & 0xFFF0);
1639*4882a593Smuzhiyun 			if (r31)
1640*4882a593Smuzhiyun 				tmp |= 0x0008;
1641*4882a593Smuzhiyun 			b43legacy_radio_write16(dev, 0x7A, tmp);
1642*4882a593Smuzhiyun 
1643*4882a593Smuzhiyun 			tmp_control = b43legacy_get_lopair(phy, i, j * 2);
1644*4882a593Smuzhiyun 			b43legacy_phy_lo_g_state(dev, &control, tmp_control,
1645*4882a593Smuzhiyun 						 r27);
1646*4882a593Smuzhiyun 		}
1647*4882a593Smuzhiyun 	}
1648*4882a593Smuzhiyun 
1649*4882a593Smuzhiyun 	/* Restoration */
1650*4882a593Smuzhiyun 	if (phy->gmode) {
1651*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0015, 0xE300);
1652*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0812, (r27 << 8) | 0xA0);
1653*4882a593Smuzhiyun 		udelay(5);
1654*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0812, (r27 << 8) | 0xA2);
1655*4882a593Smuzhiyun 		udelay(2);
1656*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0812, (r27 << 8) | 0xA3);
1657*4882a593Smuzhiyun 		cond_resched();
1658*4882a593Smuzhiyun 	} else
1659*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0015, r27 | 0xEFA0);
1660*4882a593Smuzhiyun 	b43legacy_phy_lo_adjust(dev, is_initializing);
1661*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x002E, 0x807F);
1662*4882a593Smuzhiyun 	if (phy->gmode)
1663*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x002F, 0x0202);
1664*4882a593Smuzhiyun 	else
1665*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x002F, 0x0101);
1666*4882a593Smuzhiyun 	b43legacy_write16(dev, B43legacy_MMIO_CHANNEL_EXT, regstack[4]);
1667*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x0015, regstack[5]);
1668*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x002A, regstack[6]);
1669*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x0035, regstack[7]);
1670*4882a593Smuzhiyun 	b43legacy_phy_write(dev, 0x0060, regstack[8]);
1671*4882a593Smuzhiyun 	b43legacy_radio_write16(dev, 0x0043, regstack[9]);
1672*4882a593Smuzhiyun 	b43legacy_radio_write16(dev, 0x007A, regstack[10]);
1673*4882a593Smuzhiyun 	regstack[11] &= 0x00F0;
1674*4882a593Smuzhiyun 	regstack[11] |= (b43legacy_radio_read16(dev, 0x52) & 0x000F);
1675*4882a593Smuzhiyun 	b43legacy_radio_write16(dev, 0x52, regstack[11]);
1676*4882a593Smuzhiyun 	b43legacy_write16(dev, 0x03E2, regstack[3]);
1677*4882a593Smuzhiyun 	if (phy->gmode) {
1678*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0811, regstack[12]);
1679*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0812, regstack[13]);
1680*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0814, regstack[14]);
1681*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0815, regstack[15]);
1682*4882a593Smuzhiyun 		b43legacy_phy_write(dev, B43legacy_PHY_G_CRS, regstack[0]);
1683*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x0802, regstack[1]);
1684*4882a593Smuzhiyun 	}
1685*4882a593Smuzhiyun 	b43legacy_radio_selectchannel(dev, oldchannel, 1);
1686*4882a593Smuzhiyun 
1687*4882a593Smuzhiyun #ifdef CONFIG_B43LEGACY_DEBUG
1688*4882a593Smuzhiyun 	{
1689*4882a593Smuzhiyun 		/* Sanity check for all lopairs. */
1690*4882a593Smuzhiyun 		for (i = 0; i < B43legacy_LO_COUNT; i++) {
1691*4882a593Smuzhiyun 			tmp_control = phy->_lo_pairs + i;
1692*4882a593Smuzhiyun 			if (tmp_control->low < -8 || tmp_control->low > 8 ||
1693*4882a593Smuzhiyun 			    tmp_control->high < -8 || tmp_control->high > 8)
1694*4882a593Smuzhiyun 				b43legacywarn(dev->wl,
1695*4882a593Smuzhiyun 				       "WARNING: Invalid LOpair (low: %d, high:"
1696*4882a593Smuzhiyun 				       " %d, index: %d)\n",
1697*4882a593Smuzhiyun 				       tmp_control->low, tmp_control->high, i);
1698*4882a593Smuzhiyun 		}
1699*4882a593Smuzhiyun 	}
1700*4882a593Smuzhiyun #endif /* CONFIG_B43LEGACY_DEBUG */
1701*4882a593Smuzhiyun }
1702*4882a593Smuzhiyun 
1703*4882a593Smuzhiyun static
b43legacy_phy_lo_mark_current_used(struct b43legacy_wldev * dev)1704*4882a593Smuzhiyun void b43legacy_phy_lo_mark_current_used(struct b43legacy_wldev *dev)
1705*4882a593Smuzhiyun {
1706*4882a593Smuzhiyun 	struct b43legacy_lopair *pair;
1707*4882a593Smuzhiyun 
1708*4882a593Smuzhiyun 	pair = b43legacy_current_lopair(dev);
1709*4882a593Smuzhiyun 	pair->used = 1;
1710*4882a593Smuzhiyun }
1711*4882a593Smuzhiyun 
b43legacy_phy_lo_mark_all_unused(struct b43legacy_wldev * dev)1712*4882a593Smuzhiyun void b43legacy_phy_lo_mark_all_unused(struct b43legacy_wldev *dev)
1713*4882a593Smuzhiyun {
1714*4882a593Smuzhiyun 	struct b43legacy_phy *phy = &dev->phy;
1715*4882a593Smuzhiyun 	struct b43legacy_lopair *pair;
1716*4882a593Smuzhiyun 	int i;
1717*4882a593Smuzhiyun 
1718*4882a593Smuzhiyun 	for (i = 0; i < B43legacy_LO_COUNT; i++) {
1719*4882a593Smuzhiyun 		pair = phy->_lo_pairs + i;
1720*4882a593Smuzhiyun 		pair->used = 0;
1721*4882a593Smuzhiyun 	}
1722*4882a593Smuzhiyun }
1723*4882a593Smuzhiyun 
1724*4882a593Smuzhiyun /* https://bcm-specs.sipsolutions.net/EstimatePowerOut
1725*4882a593Smuzhiyun  * This function converts a TSSI value to dBm in Q5.2
1726*4882a593Smuzhiyun  */
b43legacy_phy_estimate_power_out(struct b43legacy_wldev * dev,s8 tssi)1727*4882a593Smuzhiyun static s8 b43legacy_phy_estimate_power_out(struct b43legacy_wldev *dev, s8 tssi)
1728*4882a593Smuzhiyun {
1729*4882a593Smuzhiyun 	struct b43legacy_phy *phy = &dev->phy;
1730*4882a593Smuzhiyun 	s8 dbm = 0;
1731*4882a593Smuzhiyun 	s32 tmp;
1732*4882a593Smuzhiyun 
1733*4882a593Smuzhiyun 	tmp = phy->idle_tssi;
1734*4882a593Smuzhiyun 	tmp += tssi;
1735*4882a593Smuzhiyun 	tmp -= phy->savedpctlreg;
1736*4882a593Smuzhiyun 
1737*4882a593Smuzhiyun 	switch (phy->type) {
1738*4882a593Smuzhiyun 	case B43legacy_PHYTYPE_B:
1739*4882a593Smuzhiyun 	case B43legacy_PHYTYPE_G:
1740*4882a593Smuzhiyun 		tmp = clamp_val(tmp, 0x00, 0x3F);
1741*4882a593Smuzhiyun 		dbm = phy->tssi2dbm[tmp];
1742*4882a593Smuzhiyun 		break;
1743*4882a593Smuzhiyun 	default:
1744*4882a593Smuzhiyun 		B43legacy_BUG_ON(1);
1745*4882a593Smuzhiyun 	}
1746*4882a593Smuzhiyun 
1747*4882a593Smuzhiyun 	return dbm;
1748*4882a593Smuzhiyun }
1749*4882a593Smuzhiyun 
1750*4882a593Smuzhiyun /* https://bcm-specs.sipsolutions.net/RecalculateTransmissionPower */
b43legacy_phy_xmitpower(struct b43legacy_wldev * dev)1751*4882a593Smuzhiyun void b43legacy_phy_xmitpower(struct b43legacy_wldev *dev)
1752*4882a593Smuzhiyun {
1753*4882a593Smuzhiyun 	struct b43legacy_phy *phy = &dev->phy;
1754*4882a593Smuzhiyun 	u16 tmp;
1755*4882a593Smuzhiyun 	u16 txpower;
1756*4882a593Smuzhiyun 	s8 v0;
1757*4882a593Smuzhiyun 	s8 v1;
1758*4882a593Smuzhiyun 	s8 v2;
1759*4882a593Smuzhiyun 	s8 v3;
1760*4882a593Smuzhiyun 	s8 average;
1761*4882a593Smuzhiyun 	int max_pwr;
1762*4882a593Smuzhiyun 	s16 desired_pwr;
1763*4882a593Smuzhiyun 	s16 estimated_pwr;
1764*4882a593Smuzhiyun 	s16 pwr_adjust;
1765*4882a593Smuzhiyun 	s16 radio_att_delta;
1766*4882a593Smuzhiyun 	s16 baseband_att_delta;
1767*4882a593Smuzhiyun 	s16 radio_attenuation;
1768*4882a593Smuzhiyun 	s16 baseband_attenuation;
1769*4882a593Smuzhiyun 
1770*4882a593Smuzhiyun 	if (phy->savedpctlreg == 0xFFFF)
1771*4882a593Smuzhiyun 		return;
1772*4882a593Smuzhiyun 	if ((dev->dev->bus->boardinfo.type == 0x0416) &&
1773*4882a593Smuzhiyun 	    is_bcm_board_vendor(dev))
1774*4882a593Smuzhiyun 		return;
1775*4882a593Smuzhiyun #ifdef CONFIG_B43LEGACY_DEBUG
1776*4882a593Smuzhiyun 	if (phy->manual_txpower_control)
1777*4882a593Smuzhiyun 		return;
1778*4882a593Smuzhiyun #endif
1779*4882a593Smuzhiyun 
1780*4882a593Smuzhiyun 	B43legacy_BUG_ON(!(phy->type == B43legacy_PHYTYPE_B ||
1781*4882a593Smuzhiyun 			 phy->type == B43legacy_PHYTYPE_G));
1782*4882a593Smuzhiyun 	tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x0058);
1783*4882a593Smuzhiyun 	v0 = (s8)(tmp & 0x00FF);
1784*4882a593Smuzhiyun 	v1 = (s8)((tmp & 0xFF00) >> 8);
1785*4882a593Smuzhiyun 	tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x005A);
1786*4882a593Smuzhiyun 	v2 = (s8)(tmp & 0x00FF);
1787*4882a593Smuzhiyun 	v3 = (s8)((tmp & 0xFF00) >> 8);
1788*4882a593Smuzhiyun 	tmp = 0;
1789*4882a593Smuzhiyun 
1790*4882a593Smuzhiyun 	if (v0 == 0x7F || v1 == 0x7F || v2 == 0x7F || v3 == 0x7F) {
1791*4882a593Smuzhiyun 		tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1792*4882a593Smuzhiyun 					 0x0070);
1793*4882a593Smuzhiyun 		v0 = (s8)(tmp & 0x00FF);
1794*4882a593Smuzhiyun 		v1 = (s8)((tmp & 0xFF00) >> 8);
1795*4882a593Smuzhiyun 		tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1796*4882a593Smuzhiyun 					 0x0072);
1797*4882a593Smuzhiyun 		v2 = (s8)(tmp & 0x00FF);
1798*4882a593Smuzhiyun 		v3 = (s8)((tmp & 0xFF00) >> 8);
1799*4882a593Smuzhiyun 		if (v0 == 0x7F || v1 == 0x7F || v2 == 0x7F || v3 == 0x7F)
1800*4882a593Smuzhiyun 			return;
1801*4882a593Smuzhiyun 		v0 = (v0 + 0x20) & 0x3F;
1802*4882a593Smuzhiyun 		v1 = (v1 + 0x20) & 0x3F;
1803*4882a593Smuzhiyun 		v2 = (v2 + 0x20) & 0x3F;
1804*4882a593Smuzhiyun 		v3 = (v3 + 0x20) & 0x3F;
1805*4882a593Smuzhiyun 		tmp = 1;
1806*4882a593Smuzhiyun 	}
1807*4882a593Smuzhiyun 	b43legacy_radio_clear_tssi(dev);
1808*4882a593Smuzhiyun 
1809*4882a593Smuzhiyun 	average = (v0 + v1 + v2 + v3 + 2) / 4;
1810*4882a593Smuzhiyun 
1811*4882a593Smuzhiyun 	if (tmp && (b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x005E)
1812*4882a593Smuzhiyun 	    & 0x8))
1813*4882a593Smuzhiyun 		average -= 13;
1814*4882a593Smuzhiyun 
1815*4882a593Smuzhiyun 	estimated_pwr = b43legacy_phy_estimate_power_out(dev, average);
1816*4882a593Smuzhiyun 
1817*4882a593Smuzhiyun 	max_pwr = dev->dev->bus->sprom.maxpwr_bg;
1818*4882a593Smuzhiyun 
1819*4882a593Smuzhiyun 	if ((dev->dev->bus->sprom.boardflags_lo
1820*4882a593Smuzhiyun 	     & B43legacy_BFL_PACTRL) &&
1821*4882a593Smuzhiyun 	    (phy->type == B43legacy_PHYTYPE_G))
1822*4882a593Smuzhiyun 		max_pwr -= 0x3;
1823*4882a593Smuzhiyun 	if (unlikely(max_pwr <= 0)) {
1824*4882a593Smuzhiyun 		b43legacywarn(dev->wl, "Invalid max-TX-power value in SPROM."
1825*4882a593Smuzhiyun 			"\n");
1826*4882a593Smuzhiyun 		max_pwr = 74; /* fake it */
1827*4882a593Smuzhiyun 		dev->dev->bus->sprom.maxpwr_bg = max_pwr;
1828*4882a593Smuzhiyun 	}
1829*4882a593Smuzhiyun 
1830*4882a593Smuzhiyun 	/* Use regulatory information to get the maximum power.
1831*4882a593Smuzhiyun 	 * In the absence of such data from mac80211, we will use 20 dBm, which
1832*4882a593Smuzhiyun 	 * is the value for the EU, US, Canada, and most of the world.
1833*4882a593Smuzhiyun 	 * The regulatory maximum is reduced by the antenna gain (from sprom)
1834*4882a593Smuzhiyun 	 * and 1.5 dBm (a safety factor??). The result is in Q5.2 format
1835*4882a593Smuzhiyun 	 * which accounts for the factor of 4 */
1836*4882a593Smuzhiyun #define REG_MAX_PWR 20
1837*4882a593Smuzhiyun 	max_pwr = min(REG_MAX_PWR * 4
1838*4882a593Smuzhiyun 		      - dev->dev->bus->sprom.antenna_gain.a0
1839*4882a593Smuzhiyun 		      - 0x6, max_pwr);
1840*4882a593Smuzhiyun 
1841*4882a593Smuzhiyun 	/* find the desired power in Q5.2 - power_level is in dBm
1842*4882a593Smuzhiyun 	 * and limit it - max_pwr is already in Q5.2 */
1843*4882a593Smuzhiyun 	desired_pwr = clamp_val(phy->power_level << 2, 0, max_pwr);
1844*4882a593Smuzhiyun 	if (b43legacy_debug(dev, B43legacy_DBG_XMITPOWER))
1845*4882a593Smuzhiyun 		b43legacydbg(dev->wl, "Current TX power output: " Q52_FMT
1846*4882a593Smuzhiyun 		       " dBm, Desired TX power output: " Q52_FMT
1847*4882a593Smuzhiyun 		       " dBm\n", Q52_ARG(estimated_pwr),
1848*4882a593Smuzhiyun 		       Q52_ARG(desired_pwr));
1849*4882a593Smuzhiyun 	/* Check if we need to adjust the current power. The factor of 2 is
1850*4882a593Smuzhiyun 	 * for damping */
1851*4882a593Smuzhiyun 	pwr_adjust = (desired_pwr - estimated_pwr) / 2;
1852*4882a593Smuzhiyun 	/* RF attenuation delta
1853*4882a593Smuzhiyun 	 * The minus sign is because lower attenuation => more power */
1854*4882a593Smuzhiyun 	radio_att_delta = -(pwr_adjust + 7) >> 3;
1855*4882a593Smuzhiyun 	/* Baseband attenuation delta */
1856*4882a593Smuzhiyun 	baseband_att_delta = -(pwr_adjust >> 1) - (4 * radio_att_delta);
1857*4882a593Smuzhiyun 	/* Do we need to adjust anything? */
1858*4882a593Smuzhiyun 	if ((radio_att_delta == 0) && (baseband_att_delta == 0)) {
1859*4882a593Smuzhiyun 		b43legacy_phy_lo_mark_current_used(dev);
1860*4882a593Smuzhiyun 		return;
1861*4882a593Smuzhiyun 	}
1862*4882a593Smuzhiyun 
1863*4882a593Smuzhiyun 	/* Calculate the new attenuation values. */
1864*4882a593Smuzhiyun 	baseband_attenuation = phy->bbatt;
1865*4882a593Smuzhiyun 	baseband_attenuation += baseband_att_delta;
1866*4882a593Smuzhiyun 	radio_attenuation = phy->rfatt;
1867*4882a593Smuzhiyun 	radio_attenuation += radio_att_delta;
1868*4882a593Smuzhiyun 
1869*4882a593Smuzhiyun 	/* Get baseband and radio attenuation values into permitted ranges.
1870*4882a593Smuzhiyun 	 * baseband 0-11, radio 0-9.
1871*4882a593Smuzhiyun 	 * Radio attenuation affects power level 4 times as much as baseband.
1872*4882a593Smuzhiyun 	 */
1873*4882a593Smuzhiyun 	if (radio_attenuation < 0) {
1874*4882a593Smuzhiyun 		baseband_attenuation -= (4 * -radio_attenuation);
1875*4882a593Smuzhiyun 		radio_attenuation = 0;
1876*4882a593Smuzhiyun 	} else if (radio_attenuation > 9) {
1877*4882a593Smuzhiyun 		baseband_attenuation += (4 * (radio_attenuation - 9));
1878*4882a593Smuzhiyun 		radio_attenuation = 9;
1879*4882a593Smuzhiyun 	} else {
1880*4882a593Smuzhiyun 		while (baseband_attenuation < 0 && radio_attenuation > 0) {
1881*4882a593Smuzhiyun 			baseband_attenuation += 4;
1882*4882a593Smuzhiyun 			radio_attenuation--;
1883*4882a593Smuzhiyun 		}
1884*4882a593Smuzhiyun 		while (baseband_attenuation > 11 && radio_attenuation < 9) {
1885*4882a593Smuzhiyun 			baseband_attenuation -= 4;
1886*4882a593Smuzhiyun 			radio_attenuation++;
1887*4882a593Smuzhiyun 		}
1888*4882a593Smuzhiyun 	}
1889*4882a593Smuzhiyun 	baseband_attenuation = clamp_val(baseband_attenuation, 0, 11);
1890*4882a593Smuzhiyun 
1891*4882a593Smuzhiyun 	txpower = phy->txctl1;
1892*4882a593Smuzhiyun 	if ((phy->radio_ver == 0x2050) && (phy->radio_rev == 2)) {
1893*4882a593Smuzhiyun 		if (radio_attenuation <= 1) {
1894*4882a593Smuzhiyun 			if (txpower == 0) {
1895*4882a593Smuzhiyun 				txpower = 3;
1896*4882a593Smuzhiyun 				radio_attenuation += 2;
1897*4882a593Smuzhiyun 				baseband_attenuation += 2;
1898*4882a593Smuzhiyun 			} else if (dev->dev->bus->sprom.boardflags_lo
1899*4882a593Smuzhiyun 				   & B43legacy_BFL_PACTRL) {
1900*4882a593Smuzhiyun 				baseband_attenuation += 4 *
1901*4882a593Smuzhiyun 						     (radio_attenuation - 2);
1902*4882a593Smuzhiyun 				radio_attenuation = 2;
1903*4882a593Smuzhiyun 			}
1904*4882a593Smuzhiyun 		} else if (radio_attenuation > 4 && txpower != 0) {
1905*4882a593Smuzhiyun 			txpower = 0;
1906*4882a593Smuzhiyun 			if (baseband_attenuation < 3) {
1907*4882a593Smuzhiyun 				radio_attenuation -= 3;
1908*4882a593Smuzhiyun 				baseband_attenuation += 2;
1909*4882a593Smuzhiyun 			} else {
1910*4882a593Smuzhiyun 				radio_attenuation -= 2;
1911*4882a593Smuzhiyun 				baseband_attenuation -= 2;
1912*4882a593Smuzhiyun 			}
1913*4882a593Smuzhiyun 		}
1914*4882a593Smuzhiyun 	}
1915*4882a593Smuzhiyun 	/* Save the control values */
1916*4882a593Smuzhiyun 	phy->txctl1 = txpower;
1917*4882a593Smuzhiyun 	baseband_attenuation = clamp_val(baseband_attenuation, 0, 11);
1918*4882a593Smuzhiyun 	radio_attenuation = clamp_val(radio_attenuation, 0, 9);
1919*4882a593Smuzhiyun 	phy->rfatt = radio_attenuation;
1920*4882a593Smuzhiyun 	phy->bbatt = baseband_attenuation;
1921*4882a593Smuzhiyun 
1922*4882a593Smuzhiyun 	/* Adjust the hardware */
1923*4882a593Smuzhiyun 	b43legacy_phy_lock(dev);
1924*4882a593Smuzhiyun 	b43legacy_radio_lock(dev);
1925*4882a593Smuzhiyun 	b43legacy_radio_set_txpower_bg(dev, baseband_attenuation,
1926*4882a593Smuzhiyun 				       radio_attenuation, txpower);
1927*4882a593Smuzhiyun 	b43legacy_phy_lo_mark_current_used(dev);
1928*4882a593Smuzhiyun 	b43legacy_radio_unlock(dev);
1929*4882a593Smuzhiyun 	b43legacy_phy_unlock(dev);
1930*4882a593Smuzhiyun }
1931*4882a593Smuzhiyun 
1932*4882a593Smuzhiyun static inline
b43legacy_tssi2dbm_ad(s32 num,s32 den)1933*4882a593Smuzhiyun s32 b43legacy_tssi2dbm_ad(s32 num, s32 den)
1934*4882a593Smuzhiyun {
1935*4882a593Smuzhiyun 	if (num < 0)
1936*4882a593Smuzhiyun 		return num/den;
1937*4882a593Smuzhiyun 	else
1938*4882a593Smuzhiyun 		return (num+den/2)/den;
1939*4882a593Smuzhiyun }
1940*4882a593Smuzhiyun 
1941*4882a593Smuzhiyun static inline
b43legacy_tssi2dbm_entry(s8 entry[],u8 index,s16 pab0,s16 pab1,s16 pab2)1942*4882a593Smuzhiyun s8 b43legacy_tssi2dbm_entry(s8 entry [], u8 index, s16 pab0, s16 pab1, s16 pab2)
1943*4882a593Smuzhiyun {
1944*4882a593Smuzhiyun 	s32 m1;
1945*4882a593Smuzhiyun 	s32 m2;
1946*4882a593Smuzhiyun 	s32 f = 256;
1947*4882a593Smuzhiyun 	s32 q;
1948*4882a593Smuzhiyun 	s32 delta;
1949*4882a593Smuzhiyun 	s8 i = 0;
1950*4882a593Smuzhiyun 
1951*4882a593Smuzhiyun 	m1 = b43legacy_tssi2dbm_ad(16 * pab0 + index * pab1, 32);
1952*4882a593Smuzhiyun 	m2 = max(b43legacy_tssi2dbm_ad(32768 + index * pab2, 256), 1);
1953*4882a593Smuzhiyun 	do {
1954*4882a593Smuzhiyun 		if (i > 15)
1955*4882a593Smuzhiyun 			return -EINVAL;
1956*4882a593Smuzhiyun 		q = b43legacy_tssi2dbm_ad(f * 4096 -
1957*4882a593Smuzhiyun 					  b43legacy_tssi2dbm_ad(m2 * f, 16) *
1958*4882a593Smuzhiyun 					  f, 2048);
1959*4882a593Smuzhiyun 		delta = abs(q - f);
1960*4882a593Smuzhiyun 		f = q;
1961*4882a593Smuzhiyun 		i++;
1962*4882a593Smuzhiyun 	} while (delta >= 2);
1963*4882a593Smuzhiyun 	entry[index] = clamp_val(b43legacy_tssi2dbm_ad(m1 * f, 8192),
1964*4882a593Smuzhiyun 				   -127, 128);
1965*4882a593Smuzhiyun 	return 0;
1966*4882a593Smuzhiyun }
1967*4882a593Smuzhiyun 
1968*4882a593Smuzhiyun /* http://bcm-specs.sipsolutions.net/TSSI_to_DBM_Table */
b43legacy_phy_init_tssi2dbm_table(struct b43legacy_wldev * dev)1969*4882a593Smuzhiyun int b43legacy_phy_init_tssi2dbm_table(struct b43legacy_wldev *dev)
1970*4882a593Smuzhiyun {
1971*4882a593Smuzhiyun 	struct b43legacy_phy *phy = &dev->phy;
1972*4882a593Smuzhiyun 	s16 pab0;
1973*4882a593Smuzhiyun 	s16 pab1;
1974*4882a593Smuzhiyun 	s16 pab2;
1975*4882a593Smuzhiyun 	u8 idx;
1976*4882a593Smuzhiyun 	s8 *dyn_tssi2dbm;
1977*4882a593Smuzhiyun 
1978*4882a593Smuzhiyun 	B43legacy_WARN_ON(!(phy->type == B43legacy_PHYTYPE_B ||
1979*4882a593Smuzhiyun 			  phy->type == B43legacy_PHYTYPE_G));
1980*4882a593Smuzhiyun 	pab0 = (s16)(dev->dev->bus->sprom.pa0b0);
1981*4882a593Smuzhiyun 	pab1 = (s16)(dev->dev->bus->sprom.pa0b1);
1982*4882a593Smuzhiyun 	pab2 = (s16)(dev->dev->bus->sprom.pa0b2);
1983*4882a593Smuzhiyun 
1984*4882a593Smuzhiyun 	if ((dev->dev->bus->chip_id == 0x4301) && (phy->radio_ver != 0x2050)) {
1985*4882a593Smuzhiyun 		phy->idle_tssi = 0x34;
1986*4882a593Smuzhiyun 		phy->tssi2dbm = b43legacy_tssi2dbm_b_table;
1987*4882a593Smuzhiyun 		return 0;
1988*4882a593Smuzhiyun 	}
1989*4882a593Smuzhiyun 
1990*4882a593Smuzhiyun 	if (pab0 != 0 && pab1 != 0 && pab2 != 0 &&
1991*4882a593Smuzhiyun 	    pab0 != -1 && pab1 != -1 && pab2 != -1) {
1992*4882a593Smuzhiyun 		/* The pabX values are set in SPROM. Use them. */
1993*4882a593Smuzhiyun 		if ((s8)dev->dev->bus->sprom.itssi_bg != 0 &&
1994*4882a593Smuzhiyun 		    (s8)dev->dev->bus->sprom.itssi_bg != -1)
1995*4882a593Smuzhiyun 			phy->idle_tssi = (s8)(dev->dev->bus->sprom.
1996*4882a593Smuzhiyun 					  itssi_bg);
1997*4882a593Smuzhiyun 		else
1998*4882a593Smuzhiyun 			phy->idle_tssi = 62;
1999*4882a593Smuzhiyun 		dyn_tssi2dbm = kmalloc(64, GFP_KERNEL);
2000*4882a593Smuzhiyun 		if (dyn_tssi2dbm == NULL) {
2001*4882a593Smuzhiyun 			b43legacyerr(dev->wl, "Could not allocate memory "
2002*4882a593Smuzhiyun 			       "for tssi2dbm table\n");
2003*4882a593Smuzhiyun 			return -ENOMEM;
2004*4882a593Smuzhiyun 		}
2005*4882a593Smuzhiyun 		for (idx = 0; idx < 64; idx++)
2006*4882a593Smuzhiyun 			if (b43legacy_tssi2dbm_entry(dyn_tssi2dbm, idx, pab0,
2007*4882a593Smuzhiyun 						     pab1, pab2)) {
2008*4882a593Smuzhiyun 				phy->tssi2dbm = NULL;
2009*4882a593Smuzhiyun 				b43legacyerr(dev->wl, "Could not generate "
2010*4882a593Smuzhiyun 				       "tssi2dBm table\n");
2011*4882a593Smuzhiyun 				kfree(dyn_tssi2dbm);
2012*4882a593Smuzhiyun 				return -ENODEV;
2013*4882a593Smuzhiyun 			}
2014*4882a593Smuzhiyun 		phy->tssi2dbm = dyn_tssi2dbm;
2015*4882a593Smuzhiyun 		phy->dyn_tssi_tbl = 1;
2016*4882a593Smuzhiyun 	} else {
2017*4882a593Smuzhiyun 		/* pabX values not set in SPROM. */
2018*4882a593Smuzhiyun 		switch (phy->type) {
2019*4882a593Smuzhiyun 		case B43legacy_PHYTYPE_B:
2020*4882a593Smuzhiyun 			phy->idle_tssi = 0x34;
2021*4882a593Smuzhiyun 			phy->tssi2dbm = b43legacy_tssi2dbm_b_table;
2022*4882a593Smuzhiyun 			break;
2023*4882a593Smuzhiyun 		case B43legacy_PHYTYPE_G:
2024*4882a593Smuzhiyun 			phy->idle_tssi = 0x34;
2025*4882a593Smuzhiyun 			phy->tssi2dbm = b43legacy_tssi2dbm_g_table;
2026*4882a593Smuzhiyun 			break;
2027*4882a593Smuzhiyun 		}
2028*4882a593Smuzhiyun 	}
2029*4882a593Smuzhiyun 
2030*4882a593Smuzhiyun 	return 0;
2031*4882a593Smuzhiyun }
2032*4882a593Smuzhiyun 
b43legacy_phy_init(struct b43legacy_wldev * dev)2033*4882a593Smuzhiyun int b43legacy_phy_init(struct b43legacy_wldev *dev)
2034*4882a593Smuzhiyun {
2035*4882a593Smuzhiyun 	struct b43legacy_phy *phy = &dev->phy;
2036*4882a593Smuzhiyun 	int err = -ENODEV;
2037*4882a593Smuzhiyun 
2038*4882a593Smuzhiyun 	switch (phy->type) {
2039*4882a593Smuzhiyun 	case B43legacy_PHYTYPE_B:
2040*4882a593Smuzhiyun 		switch (phy->rev) {
2041*4882a593Smuzhiyun 		case 2:
2042*4882a593Smuzhiyun 			b43legacy_phy_initb2(dev);
2043*4882a593Smuzhiyun 			err = 0;
2044*4882a593Smuzhiyun 			break;
2045*4882a593Smuzhiyun 		case 4:
2046*4882a593Smuzhiyun 			b43legacy_phy_initb4(dev);
2047*4882a593Smuzhiyun 			err = 0;
2048*4882a593Smuzhiyun 			break;
2049*4882a593Smuzhiyun 		case 5:
2050*4882a593Smuzhiyun 			b43legacy_phy_initb5(dev);
2051*4882a593Smuzhiyun 			err = 0;
2052*4882a593Smuzhiyun 			break;
2053*4882a593Smuzhiyun 		case 6:
2054*4882a593Smuzhiyun 			b43legacy_phy_initb6(dev);
2055*4882a593Smuzhiyun 			err = 0;
2056*4882a593Smuzhiyun 			break;
2057*4882a593Smuzhiyun 		}
2058*4882a593Smuzhiyun 		break;
2059*4882a593Smuzhiyun 	case B43legacy_PHYTYPE_G:
2060*4882a593Smuzhiyun 		b43legacy_phy_initg(dev);
2061*4882a593Smuzhiyun 		err = 0;
2062*4882a593Smuzhiyun 		break;
2063*4882a593Smuzhiyun 	}
2064*4882a593Smuzhiyun 	if (err)
2065*4882a593Smuzhiyun 		b43legacyerr(dev->wl, "Unknown PHYTYPE found\n");
2066*4882a593Smuzhiyun 
2067*4882a593Smuzhiyun 	return err;
2068*4882a593Smuzhiyun }
2069*4882a593Smuzhiyun 
b43legacy_phy_set_antenna_diversity(struct b43legacy_wldev * dev)2070*4882a593Smuzhiyun void b43legacy_phy_set_antenna_diversity(struct b43legacy_wldev *dev)
2071*4882a593Smuzhiyun {
2072*4882a593Smuzhiyun 	struct b43legacy_phy *phy = &dev->phy;
2073*4882a593Smuzhiyun 	u16 antennadiv;
2074*4882a593Smuzhiyun 	u16 offset;
2075*4882a593Smuzhiyun 	u16 value;
2076*4882a593Smuzhiyun 	u32 ucodeflags;
2077*4882a593Smuzhiyun 
2078*4882a593Smuzhiyun 	antennadiv = phy->antenna_diversity;
2079*4882a593Smuzhiyun 
2080*4882a593Smuzhiyun 	if (antennadiv == 0xFFFF)
2081*4882a593Smuzhiyun 		antennadiv = 3;
2082*4882a593Smuzhiyun 	B43legacy_WARN_ON(antennadiv > 3);
2083*4882a593Smuzhiyun 
2084*4882a593Smuzhiyun 	ucodeflags = b43legacy_shm_read32(dev, B43legacy_SHM_SHARED,
2085*4882a593Smuzhiyun 					  B43legacy_UCODEFLAGS_OFFSET);
2086*4882a593Smuzhiyun 	b43legacy_shm_write32(dev, B43legacy_SHM_SHARED,
2087*4882a593Smuzhiyun 			      B43legacy_UCODEFLAGS_OFFSET,
2088*4882a593Smuzhiyun 			      ucodeflags & ~B43legacy_UCODEFLAG_AUTODIV);
2089*4882a593Smuzhiyun 
2090*4882a593Smuzhiyun 	switch (phy->type) {
2091*4882a593Smuzhiyun 	case B43legacy_PHYTYPE_G:
2092*4882a593Smuzhiyun 		offset = 0x0400;
2093*4882a593Smuzhiyun 
2094*4882a593Smuzhiyun 		if (antennadiv == 2)
2095*4882a593Smuzhiyun 			value = (3/*automatic*/ << 7);
2096*4882a593Smuzhiyun 		else
2097*4882a593Smuzhiyun 			value = (antennadiv << 7);
2098*4882a593Smuzhiyun 		b43legacy_phy_write(dev, offset + 1,
2099*4882a593Smuzhiyun 				    (b43legacy_phy_read(dev, offset + 1)
2100*4882a593Smuzhiyun 				    & 0x7E7F) | value);
2101*4882a593Smuzhiyun 
2102*4882a593Smuzhiyun 		if (antennadiv >= 2) {
2103*4882a593Smuzhiyun 			if (antennadiv == 2)
2104*4882a593Smuzhiyun 				value = (antennadiv << 7);
2105*4882a593Smuzhiyun 			else
2106*4882a593Smuzhiyun 				value = (0/*force0*/ << 7);
2107*4882a593Smuzhiyun 			b43legacy_phy_write(dev, offset + 0x2B,
2108*4882a593Smuzhiyun 					    (b43legacy_phy_read(dev,
2109*4882a593Smuzhiyun 					    offset + 0x2B)
2110*4882a593Smuzhiyun 					    & 0xFEFF) | value);
2111*4882a593Smuzhiyun 		}
2112*4882a593Smuzhiyun 
2113*4882a593Smuzhiyun 		if (phy->type == B43legacy_PHYTYPE_G) {
2114*4882a593Smuzhiyun 			if (antennadiv >= 2)
2115*4882a593Smuzhiyun 				b43legacy_phy_write(dev, 0x048C,
2116*4882a593Smuzhiyun 						    b43legacy_phy_read(dev,
2117*4882a593Smuzhiyun 						    0x048C) | 0x2000);
2118*4882a593Smuzhiyun 			else
2119*4882a593Smuzhiyun 				b43legacy_phy_write(dev, 0x048C,
2120*4882a593Smuzhiyun 						    b43legacy_phy_read(dev,
2121*4882a593Smuzhiyun 						    0x048C) & ~0x2000);
2122*4882a593Smuzhiyun 			if (phy->rev >= 2) {
2123*4882a593Smuzhiyun 				b43legacy_phy_write(dev, 0x0461,
2124*4882a593Smuzhiyun 						    b43legacy_phy_read(dev,
2125*4882a593Smuzhiyun 						    0x0461) | 0x0010);
2126*4882a593Smuzhiyun 				b43legacy_phy_write(dev, 0x04AD,
2127*4882a593Smuzhiyun 						    (b43legacy_phy_read(dev,
2128*4882a593Smuzhiyun 						    0x04AD)
2129*4882a593Smuzhiyun 						    & 0x00FF) | 0x0015);
2130*4882a593Smuzhiyun 				if (phy->rev == 2)
2131*4882a593Smuzhiyun 					b43legacy_phy_write(dev, 0x0427,
2132*4882a593Smuzhiyun 							    0x0008);
2133*4882a593Smuzhiyun 				else
2134*4882a593Smuzhiyun 					b43legacy_phy_write(dev, 0x0427,
2135*4882a593Smuzhiyun 						(b43legacy_phy_read(dev, 0x0427)
2136*4882a593Smuzhiyun 						 & 0x00FF) | 0x0008);
2137*4882a593Smuzhiyun 			} else if (phy->rev >= 6)
2138*4882a593Smuzhiyun 				b43legacy_phy_write(dev, 0x049B, 0x00DC);
2139*4882a593Smuzhiyun 		} else {
2140*4882a593Smuzhiyun 			if (phy->rev < 3)
2141*4882a593Smuzhiyun 				b43legacy_phy_write(dev, 0x002B,
2142*4882a593Smuzhiyun 						    (b43legacy_phy_read(dev,
2143*4882a593Smuzhiyun 						    0x002B) & 0x00FF)
2144*4882a593Smuzhiyun 						    | 0x0024);
2145*4882a593Smuzhiyun 			else {
2146*4882a593Smuzhiyun 				b43legacy_phy_write(dev, 0x0061,
2147*4882a593Smuzhiyun 						    b43legacy_phy_read(dev,
2148*4882a593Smuzhiyun 						    0x0061) | 0x0010);
2149*4882a593Smuzhiyun 				if (phy->rev == 3) {
2150*4882a593Smuzhiyun 					b43legacy_phy_write(dev, 0x0093,
2151*4882a593Smuzhiyun 							    0x001D);
2152*4882a593Smuzhiyun 					b43legacy_phy_write(dev, 0x0027,
2153*4882a593Smuzhiyun 							    0x0008);
2154*4882a593Smuzhiyun 				} else {
2155*4882a593Smuzhiyun 					b43legacy_phy_write(dev, 0x0093,
2156*4882a593Smuzhiyun 							    0x003A);
2157*4882a593Smuzhiyun 					b43legacy_phy_write(dev, 0x0027,
2158*4882a593Smuzhiyun 						(b43legacy_phy_read(dev, 0x0027)
2159*4882a593Smuzhiyun 						 & 0x00FF) | 0x0008);
2160*4882a593Smuzhiyun 				}
2161*4882a593Smuzhiyun 			}
2162*4882a593Smuzhiyun 		}
2163*4882a593Smuzhiyun 		break;
2164*4882a593Smuzhiyun 	case B43legacy_PHYTYPE_B:
2165*4882a593Smuzhiyun 		if (dev->dev->id.revision == 2)
2166*4882a593Smuzhiyun 			value = (3/*automatic*/ << 7);
2167*4882a593Smuzhiyun 		else
2168*4882a593Smuzhiyun 			value = (antennadiv << 7);
2169*4882a593Smuzhiyun 		b43legacy_phy_write(dev, 0x03E2,
2170*4882a593Smuzhiyun 				    (b43legacy_phy_read(dev, 0x03E2)
2171*4882a593Smuzhiyun 				    & 0xFE7F) | value);
2172*4882a593Smuzhiyun 		break;
2173*4882a593Smuzhiyun 	default:
2174*4882a593Smuzhiyun 		B43legacy_WARN_ON(1);
2175*4882a593Smuzhiyun 	}
2176*4882a593Smuzhiyun 
2177*4882a593Smuzhiyun 	if (antennadiv >= 2) {
2178*4882a593Smuzhiyun 		ucodeflags = b43legacy_shm_read32(dev, B43legacy_SHM_SHARED,
2179*4882a593Smuzhiyun 						  B43legacy_UCODEFLAGS_OFFSET);
2180*4882a593Smuzhiyun 		b43legacy_shm_write32(dev, B43legacy_SHM_SHARED,
2181*4882a593Smuzhiyun 				      B43legacy_UCODEFLAGS_OFFSET,
2182*4882a593Smuzhiyun 				      ucodeflags | B43legacy_UCODEFLAG_AUTODIV);
2183*4882a593Smuzhiyun 	}
2184*4882a593Smuzhiyun 
2185*4882a593Smuzhiyun 	phy->antenna_diversity = antennadiv;
2186*4882a593Smuzhiyun }
2187*4882a593Smuzhiyun 
2188*4882a593Smuzhiyun /* Set the PowerSavingControlBits.
2189*4882a593Smuzhiyun  * Bitvalues:
2190*4882a593Smuzhiyun  *   0  => unset the bit
2191*4882a593Smuzhiyun  *   1  => set the bit
2192*4882a593Smuzhiyun  *   -1 => calculate the bit
2193*4882a593Smuzhiyun  */
b43legacy_power_saving_ctl_bits(struct b43legacy_wldev * dev,int bit25,int bit26)2194*4882a593Smuzhiyun void b43legacy_power_saving_ctl_bits(struct b43legacy_wldev *dev,
2195*4882a593Smuzhiyun 				     int bit25, int bit26)
2196*4882a593Smuzhiyun {
2197*4882a593Smuzhiyun 	int i;
2198*4882a593Smuzhiyun 	u32 status;
2199*4882a593Smuzhiyun 
2200*4882a593Smuzhiyun /* FIXME: Force 25 to off and 26 to on for now: */
2201*4882a593Smuzhiyun bit25 = 0;
2202*4882a593Smuzhiyun bit26 = 1;
2203*4882a593Smuzhiyun 
2204*4882a593Smuzhiyun 	if (bit25 == -1) {
2205*4882a593Smuzhiyun 		/* TODO: If powersave is not off and FIXME is not set and we
2206*4882a593Smuzhiyun 		 *	are not in adhoc and thus is not an AP and we arei
2207*4882a593Smuzhiyun 		 *	associated, set bit 25 */
2208*4882a593Smuzhiyun 	}
2209*4882a593Smuzhiyun 	if (bit26 == -1) {
2210*4882a593Smuzhiyun 		/* TODO: If the device is awake or this is an AP, or we are
2211*4882a593Smuzhiyun 		 *	scanning, or FIXME, or we are associated, or FIXME,
2212*4882a593Smuzhiyun 		 *	or the latest PS-Poll packet sent was successful,
2213*4882a593Smuzhiyun 		 *	set bit26  */
2214*4882a593Smuzhiyun 	}
2215*4882a593Smuzhiyun 	status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2216*4882a593Smuzhiyun 	if (bit25)
2217*4882a593Smuzhiyun 		status |= B43legacy_MACCTL_HWPS;
2218*4882a593Smuzhiyun 	else
2219*4882a593Smuzhiyun 		status &= ~B43legacy_MACCTL_HWPS;
2220*4882a593Smuzhiyun 	if (bit26)
2221*4882a593Smuzhiyun 		status |= B43legacy_MACCTL_AWAKE;
2222*4882a593Smuzhiyun 	else
2223*4882a593Smuzhiyun 		status &= ~B43legacy_MACCTL_AWAKE;
2224*4882a593Smuzhiyun 	b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status);
2225*4882a593Smuzhiyun 	if (bit26 && dev->dev->id.revision >= 5) {
2226*4882a593Smuzhiyun 		for (i = 0; i < 100; i++) {
2227*4882a593Smuzhiyun 			if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED,
2228*4882a593Smuzhiyun 						 0x0040) != 4)
2229*4882a593Smuzhiyun 				break;
2230*4882a593Smuzhiyun 			udelay(10);
2231*4882a593Smuzhiyun 		}
2232*4882a593Smuzhiyun 	}
2233*4882a593Smuzhiyun }
2234