xref: /OK3568_Linux_fs/kernel/drivers/net/wireless/broadcom/b43legacy/main.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  *  Broadcom B43legacy wireless driver
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  *  Copyright (c) 2005 Martin Langer <martin-langer@gmx.de>
7*4882a593Smuzhiyun  *  Copyright (c) 2005-2008 Stefano Brivio <stefano.brivio@polimi.it>
8*4882a593Smuzhiyun  *  Copyright (c) 2005, 2006 Michael Buesch <m@bues.ch>
9*4882a593Smuzhiyun  *  Copyright (c) 2005 Danny van Dyk <kugelfang@gentoo.org>
10*4882a593Smuzhiyun  *  Copyright (c) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>
11*4882a593Smuzhiyun  *  Copyright (c) 2007 Larry Finger <Larry.Finger@lwfinger.net>
12*4882a593Smuzhiyun  *
13*4882a593Smuzhiyun  *  Some parts of the code in this file are derived from the ipw2200
14*4882a593Smuzhiyun  *  driver  Copyright(c) 2003 - 2004 Intel Corporation.
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun  */
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun #include <linux/delay.h>
19*4882a593Smuzhiyun #include <linux/init.h>
20*4882a593Smuzhiyun #include <linux/module.h>
21*4882a593Smuzhiyun #include <linux/if_arp.h>
22*4882a593Smuzhiyun #include <linux/etherdevice.h>
23*4882a593Smuzhiyun #include <linux/firmware.h>
24*4882a593Smuzhiyun #include <linux/workqueue.h>
25*4882a593Smuzhiyun #include <linux/sched/signal.h>
26*4882a593Smuzhiyun #include <linux/skbuff.h>
27*4882a593Smuzhiyun #include <linux/dma-mapping.h>
28*4882a593Smuzhiyun #include <linux/slab.h>
29*4882a593Smuzhiyun #include <net/dst.h>
30*4882a593Smuzhiyun #include <asm/unaligned.h>
31*4882a593Smuzhiyun 
32*4882a593Smuzhiyun #include "b43legacy.h"
33*4882a593Smuzhiyun #include "main.h"
34*4882a593Smuzhiyun #include "debugfs.h"
35*4882a593Smuzhiyun #include "phy.h"
36*4882a593Smuzhiyun #include "dma.h"
37*4882a593Smuzhiyun #include "pio.h"
38*4882a593Smuzhiyun #include "sysfs.h"
39*4882a593Smuzhiyun #include "xmit.h"
40*4882a593Smuzhiyun #include "radio.h"
41*4882a593Smuzhiyun 
42*4882a593Smuzhiyun 
43*4882a593Smuzhiyun MODULE_DESCRIPTION("Broadcom B43legacy wireless driver");
44*4882a593Smuzhiyun MODULE_AUTHOR("Martin Langer");
45*4882a593Smuzhiyun MODULE_AUTHOR("Stefano Brivio");
46*4882a593Smuzhiyun MODULE_AUTHOR("Michael Buesch");
47*4882a593Smuzhiyun MODULE_LICENSE("GPL");
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun MODULE_FIRMWARE("b43legacy/ucode2.fw");
50*4882a593Smuzhiyun MODULE_FIRMWARE("b43legacy/ucode4.fw");
51*4882a593Smuzhiyun 
52*4882a593Smuzhiyun #if defined(CONFIG_B43LEGACY_DMA) && defined(CONFIG_B43LEGACY_PIO)
53*4882a593Smuzhiyun static int modparam_pio;
54*4882a593Smuzhiyun module_param_named(pio, modparam_pio, int, 0444);
55*4882a593Smuzhiyun MODULE_PARM_DESC(pio, "enable(1) / disable(0) PIO mode");
56*4882a593Smuzhiyun #elif defined(CONFIG_B43LEGACY_DMA)
57*4882a593Smuzhiyun # define modparam_pio	0
58*4882a593Smuzhiyun #elif defined(CONFIG_B43LEGACY_PIO)
59*4882a593Smuzhiyun # define modparam_pio	1
60*4882a593Smuzhiyun #endif
61*4882a593Smuzhiyun 
62*4882a593Smuzhiyun static int modparam_bad_frames_preempt;
63*4882a593Smuzhiyun module_param_named(bad_frames_preempt, modparam_bad_frames_preempt, int, 0444);
64*4882a593Smuzhiyun MODULE_PARM_DESC(bad_frames_preempt, "enable(1) / disable(0) Bad Frames"
65*4882a593Smuzhiyun 		 " Preemption");
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun static char modparam_fwpostfix[16];
68*4882a593Smuzhiyun module_param_string(fwpostfix, modparam_fwpostfix, 16, 0444);
69*4882a593Smuzhiyun MODULE_PARM_DESC(fwpostfix, "Postfix for the firmware files to load.");
70*4882a593Smuzhiyun 
71*4882a593Smuzhiyun /* The following table supports BCM4301, BCM4303 and BCM4306/2 devices. */
72*4882a593Smuzhiyun static const struct ssb_device_id b43legacy_ssb_tbl[] = {
73*4882a593Smuzhiyun 	SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 2),
74*4882a593Smuzhiyun 	SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_80211, 4),
75*4882a593Smuzhiyun 	{},
76*4882a593Smuzhiyun };
77*4882a593Smuzhiyun MODULE_DEVICE_TABLE(ssb, b43legacy_ssb_tbl);
78*4882a593Smuzhiyun 
79*4882a593Smuzhiyun 
80*4882a593Smuzhiyun /* Channel and ratetables are shared for all devices.
81*4882a593Smuzhiyun  * They can't be const, because ieee80211 puts some precalculated
82*4882a593Smuzhiyun  * data in there. This data is the same for all devices, so we don't
83*4882a593Smuzhiyun  * get concurrency issues */
84*4882a593Smuzhiyun #define RATETAB_ENT(_rateid, _flags) \
85*4882a593Smuzhiyun 	{								\
86*4882a593Smuzhiyun 		.bitrate	= B43legacy_RATE_TO_100KBPS(_rateid),	\
87*4882a593Smuzhiyun 		.hw_value	= (_rateid),				\
88*4882a593Smuzhiyun 		.flags		= (_flags),				\
89*4882a593Smuzhiyun 	}
90*4882a593Smuzhiyun /*
91*4882a593Smuzhiyun  * NOTE: When changing this, sync with xmit.c's
92*4882a593Smuzhiyun  *	 b43legacy_plcp_get_bitrate_idx_* functions!
93*4882a593Smuzhiyun  */
94*4882a593Smuzhiyun static struct ieee80211_rate __b43legacy_ratetable[] = {
95*4882a593Smuzhiyun 	RATETAB_ENT(B43legacy_CCK_RATE_1MB, 0),
96*4882a593Smuzhiyun 	RATETAB_ENT(B43legacy_CCK_RATE_2MB, IEEE80211_RATE_SHORT_PREAMBLE),
97*4882a593Smuzhiyun 	RATETAB_ENT(B43legacy_CCK_RATE_5MB, IEEE80211_RATE_SHORT_PREAMBLE),
98*4882a593Smuzhiyun 	RATETAB_ENT(B43legacy_CCK_RATE_11MB, IEEE80211_RATE_SHORT_PREAMBLE),
99*4882a593Smuzhiyun 	RATETAB_ENT(B43legacy_OFDM_RATE_6MB, 0),
100*4882a593Smuzhiyun 	RATETAB_ENT(B43legacy_OFDM_RATE_9MB, 0),
101*4882a593Smuzhiyun 	RATETAB_ENT(B43legacy_OFDM_RATE_12MB, 0),
102*4882a593Smuzhiyun 	RATETAB_ENT(B43legacy_OFDM_RATE_18MB, 0),
103*4882a593Smuzhiyun 	RATETAB_ENT(B43legacy_OFDM_RATE_24MB, 0),
104*4882a593Smuzhiyun 	RATETAB_ENT(B43legacy_OFDM_RATE_36MB, 0),
105*4882a593Smuzhiyun 	RATETAB_ENT(B43legacy_OFDM_RATE_48MB, 0),
106*4882a593Smuzhiyun 	RATETAB_ENT(B43legacy_OFDM_RATE_54MB, 0),
107*4882a593Smuzhiyun };
108*4882a593Smuzhiyun #define b43legacy_b_ratetable		(__b43legacy_ratetable + 0)
109*4882a593Smuzhiyun #define b43legacy_b_ratetable_size	4
110*4882a593Smuzhiyun #define b43legacy_g_ratetable		(__b43legacy_ratetable + 0)
111*4882a593Smuzhiyun #define b43legacy_g_ratetable_size	12
112*4882a593Smuzhiyun 
113*4882a593Smuzhiyun #define CHANTAB_ENT(_chanid, _freq) \
114*4882a593Smuzhiyun 	{							\
115*4882a593Smuzhiyun 		.center_freq	= (_freq),			\
116*4882a593Smuzhiyun 		.hw_value	= (_chanid),			\
117*4882a593Smuzhiyun 	}
118*4882a593Smuzhiyun static struct ieee80211_channel b43legacy_bg_chantable[] = {
119*4882a593Smuzhiyun 	CHANTAB_ENT(1, 2412),
120*4882a593Smuzhiyun 	CHANTAB_ENT(2, 2417),
121*4882a593Smuzhiyun 	CHANTAB_ENT(3, 2422),
122*4882a593Smuzhiyun 	CHANTAB_ENT(4, 2427),
123*4882a593Smuzhiyun 	CHANTAB_ENT(5, 2432),
124*4882a593Smuzhiyun 	CHANTAB_ENT(6, 2437),
125*4882a593Smuzhiyun 	CHANTAB_ENT(7, 2442),
126*4882a593Smuzhiyun 	CHANTAB_ENT(8, 2447),
127*4882a593Smuzhiyun 	CHANTAB_ENT(9, 2452),
128*4882a593Smuzhiyun 	CHANTAB_ENT(10, 2457),
129*4882a593Smuzhiyun 	CHANTAB_ENT(11, 2462),
130*4882a593Smuzhiyun 	CHANTAB_ENT(12, 2467),
131*4882a593Smuzhiyun 	CHANTAB_ENT(13, 2472),
132*4882a593Smuzhiyun 	CHANTAB_ENT(14, 2484),
133*4882a593Smuzhiyun };
134*4882a593Smuzhiyun 
135*4882a593Smuzhiyun static struct ieee80211_supported_band b43legacy_band_2GHz_BPHY = {
136*4882a593Smuzhiyun 	.channels = b43legacy_bg_chantable,
137*4882a593Smuzhiyun 	.n_channels = ARRAY_SIZE(b43legacy_bg_chantable),
138*4882a593Smuzhiyun 	.bitrates = b43legacy_b_ratetable,
139*4882a593Smuzhiyun 	.n_bitrates = b43legacy_b_ratetable_size,
140*4882a593Smuzhiyun };
141*4882a593Smuzhiyun 
142*4882a593Smuzhiyun static struct ieee80211_supported_band b43legacy_band_2GHz_GPHY = {
143*4882a593Smuzhiyun 	.channels = b43legacy_bg_chantable,
144*4882a593Smuzhiyun 	.n_channels = ARRAY_SIZE(b43legacy_bg_chantable),
145*4882a593Smuzhiyun 	.bitrates = b43legacy_g_ratetable,
146*4882a593Smuzhiyun 	.n_bitrates = b43legacy_g_ratetable_size,
147*4882a593Smuzhiyun };
148*4882a593Smuzhiyun 
149*4882a593Smuzhiyun static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev);
150*4882a593Smuzhiyun static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev);
151*4882a593Smuzhiyun static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev);
152*4882a593Smuzhiyun static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev);
153*4882a593Smuzhiyun 
154*4882a593Smuzhiyun 
b43legacy_ratelimit(struct b43legacy_wl * wl)155*4882a593Smuzhiyun static int b43legacy_ratelimit(struct b43legacy_wl *wl)
156*4882a593Smuzhiyun {
157*4882a593Smuzhiyun 	if (!wl || !wl->current_dev)
158*4882a593Smuzhiyun 		return 1;
159*4882a593Smuzhiyun 	if (b43legacy_status(wl->current_dev) < B43legacy_STAT_STARTED)
160*4882a593Smuzhiyun 		return 1;
161*4882a593Smuzhiyun 	/* We are up and running.
162*4882a593Smuzhiyun 	 * Ratelimit the messages to avoid DoS over the net. */
163*4882a593Smuzhiyun 	return net_ratelimit();
164*4882a593Smuzhiyun }
165*4882a593Smuzhiyun 
b43legacyinfo(struct b43legacy_wl * wl,const char * fmt,...)166*4882a593Smuzhiyun void b43legacyinfo(struct b43legacy_wl *wl, const char *fmt, ...)
167*4882a593Smuzhiyun {
168*4882a593Smuzhiyun 	struct va_format vaf;
169*4882a593Smuzhiyun 	va_list args;
170*4882a593Smuzhiyun 
171*4882a593Smuzhiyun 	if (!b43legacy_ratelimit(wl))
172*4882a593Smuzhiyun 		return;
173*4882a593Smuzhiyun 
174*4882a593Smuzhiyun 	va_start(args, fmt);
175*4882a593Smuzhiyun 
176*4882a593Smuzhiyun 	vaf.fmt = fmt;
177*4882a593Smuzhiyun 	vaf.va = &args;
178*4882a593Smuzhiyun 
179*4882a593Smuzhiyun 	printk(KERN_INFO "b43legacy-%s: %pV",
180*4882a593Smuzhiyun 	       (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
181*4882a593Smuzhiyun 
182*4882a593Smuzhiyun 	va_end(args);
183*4882a593Smuzhiyun }
184*4882a593Smuzhiyun 
b43legacyerr(struct b43legacy_wl * wl,const char * fmt,...)185*4882a593Smuzhiyun void b43legacyerr(struct b43legacy_wl *wl, const char *fmt, ...)
186*4882a593Smuzhiyun {
187*4882a593Smuzhiyun 	struct va_format vaf;
188*4882a593Smuzhiyun 	va_list args;
189*4882a593Smuzhiyun 
190*4882a593Smuzhiyun 	if (!b43legacy_ratelimit(wl))
191*4882a593Smuzhiyun 		return;
192*4882a593Smuzhiyun 
193*4882a593Smuzhiyun 	va_start(args, fmt);
194*4882a593Smuzhiyun 
195*4882a593Smuzhiyun 	vaf.fmt = fmt;
196*4882a593Smuzhiyun 	vaf.va = &args;
197*4882a593Smuzhiyun 
198*4882a593Smuzhiyun 	printk(KERN_ERR "b43legacy-%s ERROR: %pV",
199*4882a593Smuzhiyun 	       (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
200*4882a593Smuzhiyun 
201*4882a593Smuzhiyun 	va_end(args);
202*4882a593Smuzhiyun }
203*4882a593Smuzhiyun 
b43legacywarn(struct b43legacy_wl * wl,const char * fmt,...)204*4882a593Smuzhiyun void b43legacywarn(struct b43legacy_wl *wl, const char *fmt, ...)
205*4882a593Smuzhiyun {
206*4882a593Smuzhiyun 	struct va_format vaf;
207*4882a593Smuzhiyun 	va_list args;
208*4882a593Smuzhiyun 
209*4882a593Smuzhiyun 	if (!b43legacy_ratelimit(wl))
210*4882a593Smuzhiyun 		return;
211*4882a593Smuzhiyun 
212*4882a593Smuzhiyun 	va_start(args, fmt);
213*4882a593Smuzhiyun 
214*4882a593Smuzhiyun 	vaf.fmt = fmt;
215*4882a593Smuzhiyun 	vaf.va = &args;
216*4882a593Smuzhiyun 
217*4882a593Smuzhiyun 	printk(KERN_WARNING "b43legacy-%s warning: %pV",
218*4882a593Smuzhiyun 	       (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
219*4882a593Smuzhiyun 
220*4882a593Smuzhiyun 	va_end(args);
221*4882a593Smuzhiyun }
222*4882a593Smuzhiyun 
223*4882a593Smuzhiyun #if B43legacy_DEBUG
b43legacydbg(struct b43legacy_wl * wl,const char * fmt,...)224*4882a593Smuzhiyun void b43legacydbg(struct b43legacy_wl *wl, const char *fmt, ...)
225*4882a593Smuzhiyun {
226*4882a593Smuzhiyun 	struct va_format vaf;
227*4882a593Smuzhiyun 	va_list args;
228*4882a593Smuzhiyun 
229*4882a593Smuzhiyun 	va_start(args, fmt);
230*4882a593Smuzhiyun 
231*4882a593Smuzhiyun 	vaf.fmt = fmt;
232*4882a593Smuzhiyun 	vaf.va = &args;
233*4882a593Smuzhiyun 
234*4882a593Smuzhiyun 	printk(KERN_DEBUG "b43legacy-%s debug: %pV",
235*4882a593Smuzhiyun 	       (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
236*4882a593Smuzhiyun 
237*4882a593Smuzhiyun 	va_end(args);
238*4882a593Smuzhiyun }
239*4882a593Smuzhiyun #endif /* DEBUG */
240*4882a593Smuzhiyun 
b43legacy_ram_write(struct b43legacy_wldev * dev,u16 offset,u32 val)241*4882a593Smuzhiyun static void b43legacy_ram_write(struct b43legacy_wldev *dev, u16 offset,
242*4882a593Smuzhiyun 				u32 val)
243*4882a593Smuzhiyun {
244*4882a593Smuzhiyun 	u32 status;
245*4882a593Smuzhiyun 
246*4882a593Smuzhiyun 	B43legacy_WARN_ON(offset % 4 != 0);
247*4882a593Smuzhiyun 
248*4882a593Smuzhiyun 	status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
249*4882a593Smuzhiyun 	if (status & B43legacy_MACCTL_BE)
250*4882a593Smuzhiyun 		val = swab32(val);
251*4882a593Smuzhiyun 
252*4882a593Smuzhiyun 	b43legacy_write32(dev, B43legacy_MMIO_RAM_CONTROL, offset);
253*4882a593Smuzhiyun 	b43legacy_write32(dev, B43legacy_MMIO_RAM_DATA, val);
254*4882a593Smuzhiyun }
255*4882a593Smuzhiyun 
256*4882a593Smuzhiyun static inline
b43legacy_shm_control_word(struct b43legacy_wldev * dev,u16 routing,u16 offset)257*4882a593Smuzhiyun void b43legacy_shm_control_word(struct b43legacy_wldev *dev,
258*4882a593Smuzhiyun 				u16 routing, u16 offset)
259*4882a593Smuzhiyun {
260*4882a593Smuzhiyun 	u32 control;
261*4882a593Smuzhiyun 
262*4882a593Smuzhiyun 	/* "offset" is the WORD offset. */
263*4882a593Smuzhiyun 
264*4882a593Smuzhiyun 	control = routing;
265*4882a593Smuzhiyun 	control <<= 16;
266*4882a593Smuzhiyun 	control |= offset;
267*4882a593Smuzhiyun 	b43legacy_write32(dev, B43legacy_MMIO_SHM_CONTROL, control);
268*4882a593Smuzhiyun }
269*4882a593Smuzhiyun 
b43legacy_shm_read32(struct b43legacy_wldev * dev,u16 routing,u16 offset)270*4882a593Smuzhiyun u32 b43legacy_shm_read32(struct b43legacy_wldev *dev,
271*4882a593Smuzhiyun 		       u16 routing, u16 offset)
272*4882a593Smuzhiyun {
273*4882a593Smuzhiyun 	u32 ret;
274*4882a593Smuzhiyun 
275*4882a593Smuzhiyun 	if (routing == B43legacy_SHM_SHARED) {
276*4882a593Smuzhiyun 		B43legacy_WARN_ON((offset & 0x0001) != 0);
277*4882a593Smuzhiyun 		if (offset & 0x0003) {
278*4882a593Smuzhiyun 			/* Unaligned access */
279*4882a593Smuzhiyun 			b43legacy_shm_control_word(dev, routing, offset >> 2);
280*4882a593Smuzhiyun 			ret = b43legacy_read16(dev,
281*4882a593Smuzhiyun 				B43legacy_MMIO_SHM_DATA_UNALIGNED);
282*4882a593Smuzhiyun 			ret <<= 16;
283*4882a593Smuzhiyun 			b43legacy_shm_control_word(dev, routing,
284*4882a593Smuzhiyun 						     (offset >> 2) + 1);
285*4882a593Smuzhiyun 			ret |= b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA);
286*4882a593Smuzhiyun 
287*4882a593Smuzhiyun 			return ret;
288*4882a593Smuzhiyun 		}
289*4882a593Smuzhiyun 		offset >>= 2;
290*4882a593Smuzhiyun 	}
291*4882a593Smuzhiyun 	b43legacy_shm_control_word(dev, routing, offset);
292*4882a593Smuzhiyun 	ret = b43legacy_read32(dev, B43legacy_MMIO_SHM_DATA);
293*4882a593Smuzhiyun 
294*4882a593Smuzhiyun 	return ret;
295*4882a593Smuzhiyun }
296*4882a593Smuzhiyun 
b43legacy_shm_read16(struct b43legacy_wldev * dev,u16 routing,u16 offset)297*4882a593Smuzhiyun u16 b43legacy_shm_read16(struct b43legacy_wldev *dev,
298*4882a593Smuzhiyun 			   u16 routing, u16 offset)
299*4882a593Smuzhiyun {
300*4882a593Smuzhiyun 	u16 ret;
301*4882a593Smuzhiyun 
302*4882a593Smuzhiyun 	if (routing == B43legacy_SHM_SHARED) {
303*4882a593Smuzhiyun 		B43legacy_WARN_ON((offset & 0x0001) != 0);
304*4882a593Smuzhiyun 		if (offset & 0x0003) {
305*4882a593Smuzhiyun 			/* Unaligned access */
306*4882a593Smuzhiyun 			b43legacy_shm_control_word(dev, routing, offset >> 2);
307*4882a593Smuzhiyun 			ret = b43legacy_read16(dev,
308*4882a593Smuzhiyun 					     B43legacy_MMIO_SHM_DATA_UNALIGNED);
309*4882a593Smuzhiyun 
310*4882a593Smuzhiyun 			return ret;
311*4882a593Smuzhiyun 		}
312*4882a593Smuzhiyun 		offset >>= 2;
313*4882a593Smuzhiyun 	}
314*4882a593Smuzhiyun 	b43legacy_shm_control_word(dev, routing, offset);
315*4882a593Smuzhiyun 	ret = b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA);
316*4882a593Smuzhiyun 
317*4882a593Smuzhiyun 	return ret;
318*4882a593Smuzhiyun }
319*4882a593Smuzhiyun 
b43legacy_shm_write32(struct b43legacy_wldev * dev,u16 routing,u16 offset,u32 value)320*4882a593Smuzhiyun void b43legacy_shm_write32(struct b43legacy_wldev *dev,
321*4882a593Smuzhiyun 			   u16 routing, u16 offset,
322*4882a593Smuzhiyun 			   u32 value)
323*4882a593Smuzhiyun {
324*4882a593Smuzhiyun 	if (routing == B43legacy_SHM_SHARED) {
325*4882a593Smuzhiyun 		B43legacy_WARN_ON((offset & 0x0001) != 0);
326*4882a593Smuzhiyun 		if (offset & 0x0003) {
327*4882a593Smuzhiyun 			/* Unaligned access */
328*4882a593Smuzhiyun 			b43legacy_shm_control_word(dev, routing, offset >> 2);
329*4882a593Smuzhiyun 			b43legacy_write16(dev,
330*4882a593Smuzhiyun 					  B43legacy_MMIO_SHM_DATA_UNALIGNED,
331*4882a593Smuzhiyun 					  (value >> 16) & 0xffff);
332*4882a593Smuzhiyun 			b43legacy_shm_control_word(dev, routing,
333*4882a593Smuzhiyun 						   (offset >> 2) + 1);
334*4882a593Smuzhiyun 			b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA,
335*4882a593Smuzhiyun 					  value & 0xffff);
336*4882a593Smuzhiyun 			return;
337*4882a593Smuzhiyun 		}
338*4882a593Smuzhiyun 		offset >>= 2;
339*4882a593Smuzhiyun 	}
340*4882a593Smuzhiyun 	b43legacy_shm_control_word(dev, routing, offset);
341*4882a593Smuzhiyun 	b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, value);
342*4882a593Smuzhiyun }
343*4882a593Smuzhiyun 
b43legacy_shm_write16(struct b43legacy_wldev * dev,u16 routing,u16 offset,u16 value)344*4882a593Smuzhiyun void b43legacy_shm_write16(struct b43legacy_wldev *dev, u16 routing, u16 offset,
345*4882a593Smuzhiyun 			   u16 value)
346*4882a593Smuzhiyun {
347*4882a593Smuzhiyun 	if (routing == B43legacy_SHM_SHARED) {
348*4882a593Smuzhiyun 		B43legacy_WARN_ON((offset & 0x0001) != 0);
349*4882a593Smuzhiyun 		if (offset & 0x0003) {
350*4882a593Smuzhiyun 			/* Unaligned access */
351*4882a593Smuzhiyun 			b43legacy_shm_control_word(dev, routing, offset >> 2);
352*4882a593Smuzhiyun 			b43legacy_write16(dev,
353*4882a593Smuzhiyun 					  B43legacy_MMIO_SHM_DATA_UNALIGNED,
354*4882a593Smuzhiyun 					  value);
355*4882a593Smuzhiyun 			return;
356*4882a593Smuzhiyun 		}
357*4882a593Smuzhiyun 		offset >>= 2;
358*4882a593Smuzhiyun 	}
359*4882a593Smuzhiyun 	b43legacy_shm_control_word(dev, routing, offset);
360*4882a593Smuzhiyun 	b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA, value);
361*4882a593Smuzhiyun }
362*4882a593Smuzhiyun 
363*4882a593Smuzhiyun /* Read HostFlags */
b43legacy_hf_read(struct b43legacy_wldev * dev)364*4882a593Smuzhiyun u32 b43legacy_hf_read(struct b43legacy_wldev *dev)
365*4882a593Smuzhiyun {
366*4882a593Smuzhiyun 	u32 ret;
367*4882a593Smuzhiyun 
368*4882a593Smuzhiyun 	ret = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
369*4882a593Smuzhiyun 				   B43legacy_SHM_SH_HOSTFHI);
370*4882a593Smuzhiyun 	ret <<= 16;
371*4882a593Smuzhiyun 	ret |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
372*4882a593Smuzhiyun 				    B43legacy_SHM_SH_HOSTFLO);
373*4882a593Smuzhiyun 
374*4882a593Smuzhiyun 	return ret;
375*4882a593Smuzhiyun }
376*4882a593Smuzhiyun 
377*4882a593Smuzhiyun /* Write HostFlags */
b43legacy_hf_write(struct b43legacy_wldev * dev,u32 value)378*4882a593Smuzhiyun void b43legacy_hf_write(struct b43legacy_wldev *dev, u32 value)
379*4882a593Smuzhiyun {
380*4882a593Smuzhiyun 	b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
381*4882a593Smuzhiyun 			      B43legacy_SHM_SH_HOSTFLO,
382*4882a593Smuzhiyun 			      (value & 0x0000FFFF));
383*4882a593Smuzhiyun 	b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
384*4882a593Smuzhiyun 			      B43legacy_SHM_SH_HOSTFHI,
385*4882a593Smuzhiyun 			      ((value & 0xFFFF0000) >> 16));
386*4882a593Smuzhiyun }
387*4882a593Smuzhiyun 
b43legacy_tsf_read(struct b43legacy_wldev * dev,u64 * tsf)388*4882a593Smuzhiyun void b43legacy_tsf_read(struct b43legacy_wldev *dev, u64 *tsf)
389*4882a593Smuzhiyun {
390*4882a593Smuzhiyun 	/* We need to be careful. As we read the TSF from multiple
391*4882a593Smuzhiyun 	 * registers, we should take care of register overflows.
392*4882a593Smuzhiyun 	 * In theory, the whole tsf read process should be atomic.
393*4882a593Smuzhiyun 	 * We try to be atomic here, by restaring the read process,
394*4882a593Smuzhiyun 	 * if any of the high registers changed (overflew).
395*4882a593Smuzhiyun 	 */
396*4882a593Smuzhiyun 	if (dev->dev->id.revision >= 3) {
397*4882a593Smuzhiyun 		u32 low;
398*4882a593Smuzhiyun 		u32 high;
399*4882a593Smuzhiyun 		u32 high2;
400*4882a593Smuzhiyun 
401*4882a593Smuzhiyun 		do {
402*4882a593Smuzhiyun 			high = b43legacy_read32(dev,
403*4882a593Smuzhiyun 					B43legacy_MMIO_REV3PLUS_TSF_HIGH);
404*4882a593Smuzhiyun 			low = b43legacy_read32(dev,
405*4882a593Smuzhiyun 					B43legacy_MMIO_REV3PLUS_TSF_LOW);
406*4882a593Smuzhiyun 			high2 = b43legacy_read32(dev,
407*4882a593Smuzhiyun 					B43legacy_MMIO_REV3PLUS_TSF_HIGH);
408*4882a593Smuzhiyun 		} while (unlikely(high != high2));
409*4882a593Smuzhiyun 
410*4882a593Smuzhiyun 		*tsf = high;
411*4882a593Smuzhiyun 		*tsf <<= 32;
412*4882a593Smuzhiyun 		*tsf |= low;
413*4882a593Smuzhiyun 	} else {
414*4882a593Smuzhiyun 		u64 tmp;
415*4882a593Smuzhiyun 		u16 v0;
416*4882a593Smuzhiyun 		u16 v1;
417*4882a593Smuzhiyun 		u16 v2;
418*4882a593Smuzhiyun 		u16 v3;
419*4882a593Smuzhiyun 		u16 test1;
420*4882a593Smuzhiyun 		u16 test2;
421*4882a593Smuzhiyun 		u16 test3;
422*4882a593Smuzhiyun 
423*4882a593Smuzhiyun 		do {
424*4882a593Smuzhiyun 			v3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3);
425*4882a593Smuzhiyun 			v2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2);
426*4882a593Smuzhiyun 			v1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1);
427*4882a593Smuzhiyun 			v0 = b43legacy_read16(dev, B43legacy_MMIO_TSF_0);
428*4882a593Smuzhiyun 
429*4882a593Smuzhiyun 			test3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3);
430*4882a593Smuzhiyun 			test2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2);
431*4882a593Smuzhiyun 			test1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1);
432*4882a593Smuzhiyun 		} while (v3 != test3 || v2 != test2 || v1 != test1);
433*4882a593Smuzhiyun 
434*4882a593Smuzhiyun 		*tsf = v3;
435*4882a593Smuzhiyun 		*tsf <<= 48;
436*4882a593Smuzhiyun 		tmp = v2;
437*4882a593Smuzhiyun 		tmp <<= 32;
438*4882a593Smuzhiyun 		*tsf |= tmp;
439*4882a593Smuzhiyun 		tmp = v1;
440*4882a593Smuzhiyun 		tmp <<= 16;
441*4882a593Smuzhiyun 		*tsf |= tmp;
442*4882a593Smuzhiyun 		*tsf |= v0;
443*4882a593Smuzhiyun 	}
444*4882a593Smuzhiyun }
445*4882a593Smuzhiyun 
b43legacy_time_lock(struct b43legacy_wldev * dev)446*4882a593Smuzhiyun static void b43legacy_time_lock(struct b43legacy_wldev *dev)
447*4882a593Smuzhiyun {
448*4882a593Smuzhiyun 	u32 status;
449*4882a593Smuzhiyun 
450*4882a593Smuzhiyun 	status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
451*4882a593Smuzhiyun 	status |= B43legacy_MACCTL_TBTTHOLD;
452*4882a593Smuzhiyun 	b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status);
453*4882a593Smuzhiyun }
454*4882a593Smuzhiyun 
b43legacy_time_unlock(struct b43legacy_wldev * dev)455*4882a593Smuzhiyun static void b43legacy_time_unlock(struct b43legacy_wldev *dev)
456*4882a593Smuzhiyun {
457*4882a593Smuzhiyun 	u32 status;
458*4882a593Smuzhiyun 
459*4882a593Smuzhiyun 	status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
460*4882a593Smuzhiyun 	status &= ~B43legacy_MACCTL_TBTTHOLD;
461*4882a593Smuzhiyun 	b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status);
462*4882a593Smuzhiyun }
463*4882a593Smuzhiyun 
b43legacy_tsf_write_locked(struct b43legacy_wldev * dev,u64 tsf)464*4882a593Smuzhiyun static void b43legacy_tsf_write_locked(struct b43legacy_wldev *dev, u64 tsf)
465*4882a593Smuzhiyun {
466*4882a593Smuzhiyun 	/* Be careful with the in-progress timer.
467*4882a593Smuzhiyun 	 * First zero out the low register, so we have a full
468*4882a593Smuzhiyun 	 * register-overflow duration to complete the operation.
469*4882a593Smuzhiyun 	 */
470*4882a593Smuzhiyun 	if (dev->dev->id.revision >= 3) {
471*4882a593Smuzhiyun 		u32 lo = (tsf & 0x00000000FFFFFFFFULL);
472*4882a593Smuzhiyun 		u32 hi = (tsf & 0xFFFFFFFF00000000ULL) >> 32;
473*4882a593Smuzhiyun 
474*4882a593Smuzhiyun 		b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW, 0);
475*4882a593Smuzhiyun 		b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_HIGH,
476*4882a593Smuzhiyun 				    hi);
477*4882a593Smuzhiyun 		b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW,
478*4882a593Smuzhiyun 				    lo);
479*4882a593Smuzhiyun 	} else {
480*4882a593Smuzhiyun 		u16 v0 = (tsf & 0x000000000000FFFFULL);
481*4882a593Smuzhiyun 		u16 v1 = (tsf & 0x00000000FFFF0000ULL) >> 16;
482*4882a593Smuzhiyun 		u16 v2 = (tsf & 0x0000FFFF00000000ULL) >> 32;
483*4882a593Smuzhiyun 		u16 v3 = (tsf & 0xFFFF000000000000ULL) >> 48;
484*4882a593Smuzhiyun 
485*4882a593Smuzhiyun 		b43legacy_write16(dev, B43legacy_MMIO_TSF_0, 0);
486*4882a593Smuzhiyun 		b43legacy_write16(dev, B43legacy_MMIO_TSF_3, v3);
487*4882a593Smuzhiyun 		b43legacy_write16(dev, B43legacy_MMIO_TSF_2, v2);
488*4882a593Smuzhiyun 		b43legacy_write16(dev, B43legacy_MMIO_TSF_1, v1);
489*4882a593Smuzhiyun 		b43legacy_write16(dev, B43legacy_MMIO_TSF_0, v0);
490*4882a593Smuzhiyun 	}
491*4882a593Smuzhiyun }
492*4882a593Smuzhiyun 
b43legacy_tsf_write(struct b43legacy_wldev * dev,u64 tsf)493*4882a593Smuzhiyun void b43legacy_tsf_write(struct b43legacy_wldev *dev, u64 tsf)
494*4882a593Smuzhiyun {
495*4882a593Smuzhiyun 	b43legacy_time_lock(dev);
496*4882a593Smuzhiyun 	b43legacy_tsf_write_locked(dev, tsf);
497*4882a593Smuzhiyun 	b43legacy_time_unlock(dev);
498*4882a593Smuzhiyun }
499*4882a593Smuzhiyun 
500*4882a593Smuzhiyun static
b43legacy_macfilter_set(struct b43legacy_wldev * dev,u16 offset,const u8 * mac)501*4882a593Smuzhiyun void b43legacy_macfilter_set(struct b43legacy_wldev *dev,
502*4882a593Smuzhiyun 			     u16 offset, const u8 *mac)
503*4882a593Smuzhiyun {
504*4882a593Smuzhiyun 	static const u8 zero_addr[ETH_ALEN] = { 0 };
505*4882a593Smuzhiyun 	u16 data;
506*4882a593Smuzhiyun 
507*4882a593Smuzhiyun 	if (!mac)
508*4882a593Smuzhiyun 		mac = zero_addr;
509*4882a593Smuzhiyun 
510*4882a593Smuzhiyun 	offset |= 0x0020;
511*4882a593Smuzhiyun 	b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_CONTROL, offset);
512*4882a593Smuzhiyun 
513*4882a593Smuzhiyun 	data = mac[0];
514*4882a593Smuzhiyun 	data |= mac[1] << 8;
515*4882a593Smuzhiyun 	b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
516*4882a593Smuzhiyun 	data = mac[2];
517*4882a593Smuzhiyun 	data |= mac[3] << 8;
518*4882a593Smuzhiyun 	b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
519*4882a593Smuzhiyun 	data = mac[4];
520*4882a593Smuzhiyun 	data |= mac[5] << 8;
521*4882a593Smuzhiyun 	b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data);
522*4882a593Smuzhiyun }
523*4882a593Smuzhiyun 
b43legacy_write_mac_bssid_templates(struct b43legacy_wldev * dev)524*4882a593Smuzhiyun static void b43legacy_write_mac_bssid_templates(struct b43legacy_wldev *dev)
525*4882a593Smuzhiyun {
526*4882a593Smuzhiyun 	static const u8 zero_addr[ETH_ALEN] = { 0 };
527*4882a593Smuzhiyun 	const u8 *mac = dev->wl->mac_addr;
528*4882a593Smuzhiyun 	const u8 *bssid = dev->wl->bssid;
529*4882a593Smuzhiyun 	u8 mac_bssid[ETH_ALEN * 2];
530*4882a593Smuzhiyun 	int i;
531*4882a593Smuzhiyun 	u32 tmp;
532*4882a593Smuzhiyun 
533*4882a593Smuzhiyun 	if (!bssid)
534*4882a593Smuzhiyun 		bssid = zero_addr;
535*4882a593Smuzhiyun 	if (!mac)
536*4882a593Smuzhiyun 		mac = zero_addr;
537*4882a593Smuzhiyun 
538*4882a593Smuzhiyun 	b43legacy_macfilter_set(dev, B43legacy_MACFILTER_BSSID, bssid);
539*4882a593Smuzhiyun 
540*4882a593Smuzhiyun 	memcpy(mac_bssid, mac, ETH_ALEN);
541*4882a593Smuzhiyun 	memcpy(mac_bssid + ETH_ALEN, bssid, ETH_ALEN);
542*4882a593Smuzhiyun 
543*4882a593Smuzhiyun 	/* Write our MAC address and BSSID to template ram */
544*4882a593Smuzhiyun 	for (i = 0; i < ARRAY_SIZE(mac_bssid); i += sizeof(u32)) {
545*4882a593Smuzhiyun 		tmp =  (u32)(mac_bssid[i + 0]);
546*4882a593Smuzhiyun 		tmp |= (u32)(mac_bssid[i + 1]) << 8;
547*4882a593Smuzhiyun 		tmp |= (u32)(mac_bssid[i + 2]) << 16;
548*4882a593Smuzhiyun 		tmp |= (u32)(mac_bssid[i + 3]) << 24;
549*4882a593Smuzhiyun 		b43legacy_ram_write(dev, 0x20 + i, tmp);
550*4882a593Smuzhiyun 		b43legacy_ram_write(dev, 0x78 + i, tmp);
551*4882a593Smuzhiyun 		b43legacy_ram_write(dev, 0x478 + i, tmp);
552*4882a593Smuzhiyun 	}
553*4882a593Smuzhiyun }
554*4882a593Smuzhiyun 
b43legacy_upload_card_macaddress(struct b43legacy_wldev * dev)555*4882a593Smuzhiyun static void b43legacy_upload_card_macaddress(struct b43legacy_wldev *dev)
556*4882a593Smuzhiyun {
557*4882a593Smuzhiyun 	b43legacy_write_mac_bssid_templates(dev);
558*4882a593Smuzhiyun 	b43legacy_macfilter_set(dev, B43legacy_MACFILTER_SELF,
559*4882a593Smuzhiyun 				dev->wl->mac_addr);
560*4882a593Smuzhiyun }
561*4882a593Smuzhiyun 
b43legacy_set_slot_time(struct b43legacy_wldev * dev,u16 slot_time)562*4882a593Smuzhiyun static void b43legacy_set_slot_time(struct b43legacy_wldev *dev,
563*4882a593Smuzhiyun 				    u16 slot_time)
564*4882a593Smuzhiyun {
565*4882a593Smuzhiyun 	/* slot_time is in usec. */
566*4882a593Smuzhiyun 	if (dev->phy.type != B43legacy_PHYTYPE_G)
567*4882a593Smuzhiyun 		return;
568*4882a593Smuzhiyun 	b43legacy_write16(dev, 0x684, 510 + slot_time);
569*4882a593Smuzhiyun 	b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0010,
570*4882a593Smuzhiyun 			      slot_time);
571*4882a593Smuzhiyun }
572*4882a593Smuzhiyun 
b43legacy_short_slot_timing_enable(struct b43legacy_wldev * dev)573*4882a593Smuzhiyun static void b43legacy_short_slot_timing_enable(struct b43legacy_wldev *dev)
574*4882a593Smuzhiyun {
575*4882a593Smuzhiyun 	b43legacy_set_slot_time(dev, 9);
576*4882a593Smuzhiyun }
577*4882a593Smuzhiyun 
b43legacy_short_slot_timing_disable(struct b43legacy_wldev * dev)578*4882a593Smuzhiyun static void b43legacy_short_slot_timing_disable(struct b43legacy_wldev *dev)
579*4882a593Smuzhiyun {
580*4882a593Smuzhiyun 	b43legacy_set_slot_time(dev, 20);
581*4882a593Smuzhiyun }
582*4882a593Smuzhiyun 
583*4882a593Smuzhiyun /* Synchronize IRQ top- and bottom-half.
584*4882a593Smuzhiyun  * IRQs must be masked before calling this.
585*4882a593Smuzhiyun  * This must not be called with the irq_lock held.
586*4882a593Smuzhiyun  */
b43legacy_synchronize_irq(struct b43legacy_wldev * dev)587*4882a593Smuzhiyun static void b43legacy_synchronize_irq(struct b43legacy_wldev *dev)
588*4882a593Smuzhiyun {
589*4882a593Smuzhiyun 	synchronize_irq(dev->dev->irq);
590*4882a593Smuzhiyun 	tasklet_kill(&dev->isr_tasklet);
591*4882a593Smuzhiyun }
592*4882a593Smuzhiyun 
593*4882a593Smuzhiyun /* DummyTransmission function, as documented on
594*4882a593Smuzhiyun  * https://bcm-specs.sipsolutions.net/DummyTransmission
595*4882a593Smuzhiyun  */
b43legacy_dummy_transmission(struct b43legacy_wldev * dev)596*4882a593Smuzhiyun void b43legacy_dummy_transmission(struct b43legacy_wldev *dev)
597*4882a593Smuzhiyun {
598*4882a593Smuzhiyun 	struct b43legacy_phy *phy = &dev->phy;
599*4882a593Smuzhiyun 	unsigned int i;
600*4882a593Smuzhiyun 	unsigned int max_loop;
601*4882a593Smuzhiyun 	u16 value;
602*4882a593Smuzhiyun 	u32 buffer[5] = {
603*4882a593Smuzhiyun 		0x00000000,
604*4882a593Smuzhiyun 		0x00D40000,
605*4882a593Smuzhiyun 		0x00000000,
606*4882a593Smuzhiyun 		0x01000000,
607*4882a593Smuzhiyun 		0x00000000,
608*4882a593Smuzhiyun 	};
609*4882a593Smuzhiyun 
610*4882a593Smuzhiyun 	switch (phy->type) {
611*4882a593Smuzhiyun 	case B43legacy_PHYTYPE_B:
612*4882a593Smuzhiyun 	case B43legacy_PHYTYPE_G:
613*4882a593Smuzhiyun 		max_loop = 0xFA;
614*4882a593Smuzhiyun 		buffer[0] = 0x000B846E;
615*4882a593Smuzhiyun 		break;
616*4882a593Smuzhiyun 	default:
617*4882a593Smuzhiyun 		B43legacy_BUG_ON(1);
618*4882a593Smuzhiyun 		return;
619*4882a593Smuzhiyun 	}
620*4882a593Smuzhiyun 
621*4882a593Smuzhiyun 	for (i = 0; i < 5; i++)
622*4882a593Smuzhiyun 		b43legacy_ram_write(dev, i * 4, buffer[i]);
623*4882a593Smuzhiyun 
624*4882a593Smuzhiyun 	/* dummy read follows */
625*4882a593Smuzhiyun 	b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
626*4882a593Smuzhiyun 
627*4882a593Smuzhiyun 	b43legacy_write16(dev, 0x0568, 0x0000);
628*4882a593Smuzhiyun 	b43legacy_write16(dev, 0x07C0, 0x0000);
629*4882a593Smuzhiyun 	b43legacy_write16(dev, 0x050C, 0x0000);
630*4882a593Smuzhiyun 	b43legacy_write16(dev, 0x0508, 0x0000);
631*4882a593Smuzhiyun 	b43legacy_write16(dev, 0x050A, 0x0000);
632*4882a593Smuzhiyun 	b43legacy_write16(dev, 0x054C, 0x0000);
633*4882a593Smuzhiyun 	b43legacy_write16(dev, 0x056A, 0x0014);
634*4882a593Smuzhiyun 	b43legacy_write16(dev, 0x0568, 0x0826);
635*4882a593Smuzhiyun 	b43legacy_write16(dev, 0x0500, 0x0000);
636*4882a593Smuzhiyun 	b43legacy_write16(dev, 0x0502, 0x0030);
637*4882a593Smuzhiyun 
638*4882a593Smuzhiyun 	if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5)
639*4882a593Smuzhiyun 		b43legacy_radio_write16(dev, 0x0051, 0x0017);
640*4882a593Smuzhiyun 	for (i = 0x00; i < max_loop; i++) {
641*4882a593Smuzhiyun 		value = b43legacy_read16(dev, 0x050E);
642*4882a593Smuzhiyun 		if (value & 0x0080)
643*4882a593Smuzhiyun 			break;
644*4882a593Smuzhiyun 		udelay(10);
645*4882a593Smuzhiyun 	}
646*4882a593Smuzhiyun 	for (i = 0x00; i < 0x0A; i++) {
647*4882a593Smuzhiyun 		value = b43legacy_read16(dev, 0x050E);
648*4882a593Smuzhiyun 		if (value & 0x0400)
649*4882a593Smuzhiyun 			break;
650*4882a593Smuzhiyun 		udelay(10);
651*4882a593Smuzhiyun 	}
652*4882a593Smuzhiyun 	for (i = 0x00; i < 0x0A; i++) {
653*4882a593Smuzhiyun 		value = b43legacy_read16(dev, 0x0690);
654*4882a593Smuzhiyun 		if (!(value & 0x0100))
655*4882a593Smuzhiyun 			break;
656*4882a593Smuzhiyun 		udelay(10);
657*4882a593Smuzhiyun 	}
658*4882a593Smuzhiyun 	if (phy->radio_ver == 0x2050 && phy->radio_rev <= 0x5)
659*4882a593Smuzhiyun 		b43legacy_radio_write16(dev, 0x0051, 0x0037);
660*4882a593Smuzhiyun }
661*4882a593Smuzhiyun 
662*4882a593Smuzhiyun /* Turn the Analog ON/OFF */
b43legacy_switch_analog(struct b43legacy_wldev * dev,int on)663*4882a593Smuzhiyun static void b43legacy_switch_analog(struct b43legacy_wldev *dev, int on)
664*4882a593Smuzhiyun {
665*4882a593Smuzhiyun 	b43legacy_write16(dev, B43legacy_MMIO_PHY0, on ? 0 : 0xF4);
666*4882a593Smuzhiyun }
667*4882a593Smuzhiyun 
b43legacy_wireless_core_reset(struct b43legacy_wldev * dev,u32 flags)668*4882a593Smuzhiyun void b43legacy_wireless_core_reset(struct b43legacy_wldev *dev, u32 flags)
669*4882a593Smuzhiyun {
670*4882a593Smuzhiyun 	u32 tmslow;
671*4882a593Smuzhiyun 	u32 macctl;
672*4882a593Smuzhiyun 
673*4882a593Smuzhiyun 	flags |= B43legacy_TMSLOW_PHYCLKEN;
674*4882a593Smuzhiyun 	flags |= B43legacy_TMSLOW_PHYRESET;
675*4882a593Smuzhiyun 	ssb_device_enable(dev->dev, flags);
676*4882a593Smuzhiyun 	msleep(2); /* Wait for the PLL to turn on. */
677*4882a593Smuzhiyun 
678*4882a593Smuzhiyun 	/* Now take the PHY out of Reset again */
679*4882a593Smuzhiyun 	tmslow = ssb_read32(dev->dev, SSB_TMSLOW);
680*4882a593Smuzhiyun 	tmslow |= SSB_TMSLOW_FGC;
681*4882a593Smuzhiyun 	tmslow &= ~B43legacy_TMSLOW_PHYRESET;
682*4882a593Smuzhiyun 	ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
683*4882a593Smuzhiyun 	ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
684*4882a593Smuzhiyun 	msleep(1);
685*4882a593Smuzhiyun 	tmslow &= ~SSB_TMSLOW_FGC;
686*4882a593Smuzhiyun 	ssb_write32(dev->dev, SSB_TMSLOW, tmslow);
687*4882a593Smuzhiyun 	ssb_read32(dev->dev, SSB_TMSLOW); /* flush */
688*4882a593Smuzhiyun 	msleep(1);
689*4882a593Smuzhiyun 
690*4882a593Smuzhiyun 	/* Turn Analog ON */
691*4882a593Smuzhiyun 	b43legacy_switch_analog(dev, 1);
692*4882a593Smuzhiyun 
693*4882a593Smuzhiyun 	macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
694*4882a593Smuzhiyun 	macctl &= ~B43legacy_MACCTL_GMODE;
695*4882a593Smuzhiyun 	if (flags & B43legacy_TMSLOW_GMODE) {
696*4882a593Smuzhiyun 		macctl |= B43legacy_MACCTL_GMODE;
697*4882a593Smuzhiyun 		dev->phy.gmode = true;
698*4882a593Smuzhiyun 	} else
699*4882a593Smuzhiyun 		dev->phy.gmode = false;
700*4882a593Smuzhiyun 	macctl |= B43legacy_MACCTL_IHR_ENABLED;
701*4882a593Smuzhiyun 	b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
702*4882a593Smuzhiyun }
703*4882a593Smuzhiyun 
handle_irq_transmit_status(struct b43legacy_wldev * dev)704*4882a593Smuzhiyun static void handle_irq_transmit_status(struct b43legacy_wldev *dev)
705*4882a593Smuzhiyun {
706*4882a593Smuzhiyun 	u32 v0;
707*4882a593Smuzhiyun 	u32 v1;
708*4882a593Smuzhiyun 	u16 tmp;
709*4882a593Smuzhiyun 	struct b43legacy_txstatus stat;
710*4882a593Smuzhiyun 
711*4882a593Smuzhiyun 	while (1) {
712*4882a593Smuzhiyun 		v0 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0);
713*4882a593Smuzhiyun 		if (!(v0 & 0x00000001))
714*4882a593Smuzhiyun 			break;
715*4882a593Smuzhiyun 		v1 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1);
716*4882a593Smuzhiyun 
717*4882a593Smuzhiyun 		stat.cookie = (v0 >> 16);
718*4882a593Smuzhiyun 		stat.seq = (v1 & 0x0000FFFF);
719*4882a593Smuzhiyun 		stat.phy_stat = ((v1 & 0x00FF0000) >> 16);
720*4882a593Smuzhiyun 		tmp = (v0 & 0x0000FFFF);
721*4882a593Smuzhiyun 		stat.frame_count = ((tmp & 0xF000) >> 12);
722*4882a593Smuzhiyun 		stat.rts_count = ((tmp & 0x0F00) >> 8);
723*4882a593Smuzhiyun 		stat.supp_reason = ((tmp & 0x001C) >> 2);
724*4882a593Smuzhiyun 		stat.pm_indicated = !!(tmp & 0x0080);
725*4882a593Smuzhiyun 		stat.intermediate = !!(tmp & 0x0040);
726*4882a593Smuzhiyun 		stat.for_ampdu = !!(tmp & 0x0020);
727*4882a593Smuzhiyun 		stat.acked = !!(tmp & 0x0002);
728*4882a593Smuzhiyun 
729*4882a593Smuzhiyun 		b43legacy_handle_txstatus(dev, &stat);
730*4882a593Smuzhiyun 	}
731*4882a593Smuzhiyun }
732*4882a593Smuzhiyun 
drain_txstatus_queue(struct b43legacy_wldev * dev)733*4882a593Smuzhiyun static void drain_txstatus_queue(struct b43legacy_wldev *dev)
734*4882a593Smuzhiyun {
735*4882a593Smuzhiyun 	u32 dummy;
736*4882a593Smuzhiyun 
737*4882a593Smuzhiyun 	if (dev->dev->id.revision < 5)
738*4882a593Smuzhiyun 		return;
739*4882a593Smuzhiyun 	/* Read all entries from the microcode TXstatus FIFO
740*4882a593Smuzhiyun 	 * and throw them away.
741*4882a593Smuzhiyun 	 */
742*4882a593Smuzhiyun 	while (1) {
743*4882a593Smuzhiyun 		dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0);
744*4882a593Smuzhiyun 		if (!(dummy & 0x00000001))
745*4882a593Smuzhiyun 			break;
746*4882a593Smuzhiyun 		dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1);
747*4882a593Smuzhiyun 	}
748*4882a593Smuzhiyun }
749*4882a593Smuzhiyun 
b43legacy_jssi_read(struct b43legacy_wldev * dev)750*4882a593Smuzhiyun static u32 b43legacy_jssi_read(struct b43legacy_wldev *dev)
751*4882a593Smuzhiyun {
752*4882a593Smuzhiyun 	u32 val = 0;
753*4882a593Smuzhiyun 
754*4882a593Smuzhiyun 	val = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x40A);
755*4882a593Smuzhiyun 	val <<= 16;
756*4882a593Smuzhiyun 	val |= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x408);
757*4882a593Smuzhiyun 
758*4882a593Smuzhiyun 	return val;
759*4882a593Smuzhiyun }
760*4882a593Smuzhiyun 
b43legacy_jssi_write(struct b43legacy_wldev * dev,u32 jssi)761*4882a593Smuzhiyun static void b43legacy_jssi_write(struct b43legacy_wldev *dev, u32 jssi)
762*4882a593Smuzhiyun {
763*4882a593Smuzhiyun 	b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x408,
764*4882a593Smuzhiyun 			      (jssi & 0x0000FFFF));
765*4882a593Smuzhiyun 	b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x40A,
766*4882a593Smuzhiyun 			      (jssi & 0xFFFF0000) >> 16);
767*4882a593Smuzhiyun }
768*4882a593Smuzhiyun 
b43legacy_generate_noise_sample(struct b43legacy_wldev * dev)769*4882a593Smuzhiyun static void b43legacy_generate_noise_sample(struct b43legacy_wldev *dev)
770*4882a593Smuzhiyun {
771*4882a593Smuzhiyun 	b43legacy_jssi_write(dev, 0x7F7F7F7F);
772*4882a593Smuzhiyun 	b43legacy_write32(dev, B43legacy_MMIO_MACCMD,
773*4882a593Smuzhiyun 			  b43legacy_read32(dev, B43legacy_MMIO_MACCMD)
774*4882a593Smuzhiyun 			  | B43legacy_MACCMD_BGNOISE);
775*4882a593Smuzhiyun 	B43legacy_WARN_ON(dev->noisecalc.channel_at_start !=
776*4882a593Smuzhiyun 			    dev->phy.channel);
777*4882a593Smuzhiyun }
778*4882a593Smuzhiyun 
b43legacy_calculate_link_quality(struct b43legacy_wldev * dev)779*4882a593Smuzhiyun static void b43legacy_calculate_link_quality(struct b43legacy_wldev *dev)
780*4882a593Smuzhiyun {
781*4882a593Smuzhiyun 	/* Top half of Link Quality calculation. */
782*4882a593Smuzhiyun 
783*4882a593Smuzhiyun 	if (dev->noisecalc.calculation_running)
784*4882a593Smuzhiyun 		return;
785*4882a593Smuzhiyun 	dev->noisecalc.channel_at_start = dev->phy.channel;
786*4882a593Smuzhiyun 	dev->noisecalc.calculation_running = true;
787*4882a593Smuzhiyun 	dev->noisecalc.nr_samples = 0;
788*4882a593Smuzhiyun 
789*4882a593Smuzhiyun 	b43legacy_generate_noise_sample(dev);
790*4882a593Smuzhiyun }
791*4882a593Smuzhiyun 
handle_irq_noise(struct b43legacy_wldev * dev)792*4882a593Smuzhiyun static void handle_irq_noise(struct b43legacy_wldev *dev)
793*4882a593Smuzhiyun {
794*4882a593Smuzhiyun 	struct b43legacy_phy *phy = &dev->phy;
795*4882a593Smuzhiyun 	u16 tmp;
796*4882a593Smuzhiyun 	u8 noise[4];
797*4882a593Smuzhiyun 	u8 i;
798*4882a593Smuzhiyun 	u8 j;
799*4882a593Smuzhiyun 	s32 average;
800*4882a593Smuzhiyun 
801*4882a593Smuzhiyun 	/* Bottom half of Link Quality calculation. */
802*4882a593Smuzhiyun 
803*4882a593Smuzhiyun 	B43legacy_WARN_ON(!dev->noisecalc.calculation_running);
804*4882a593Smuzhiyun 	if (dev->noisecalc.channel_at_start != phy->channel)
805*4882a593Smuzhiyun 		goto drop_calculation;
806*4882a593Smuzhiyun 	*((__le32 *)noise) = cpu_to_le32(b43legacy_jssi_read(dev));
807*4882a593Smuzhiyun 	if (noise[0] == 0x7F || noise[1] == 0x7F ||
808*4882a593Smuzhiyun 	    noise[2] == 0x7F || noise[3] == 0x7F)
809*4882a593Smuzhiyun 		goto generate_new;
810*4882a593Smuzhiyun 
811*4882a593Smuzhiyun 	/* Get the noise samples. */
812*4882a593Smuzhiyun 	B43legacy_WARN_ON(dev->noisecalc.nr_samples >= 8);
813*4882a593Smuzhiyun 	i = dev->noisecalc.nr_samples;
814*4882a593Smuzhiyun 	noise[0] = clamp_val(noise[0], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
815*4882a593Smuzhiyun 	noise[1] = clamp_val(noise[1], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
816*4882a593Smuzhiyun 	noise[2] = clamp_val(noise[2], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
817*4882a593Smuzhiyun 	noise[3] = clamp_val(noise[3], 0, ARRAY_SIZE(phy->nrssi_lt) - 1);
818*4882a593Smuzhiyun 	dev->noisecalc.samples[i][0] = phy->nrssi_lt[noise[0]];
819*4882a593Smuzhiyun 	dev->noisecalc.samples[i][1] = phy->nrssi_lt[noise[1]];
820*4882a593Smuzhiyun 	dev->noisecalc.samples[i][2] = phy->nrssi_lt[noise[2]];
821*4882a593Smuzhiyun 	dev->noisecalc.samples[i][3] = phy->nrssi_lt[noise[3]];
822*4882a593Smuzhiyun 	dev->noisecalc.nr_samples++;
823*4882a593Smuzhiyun 	if (dev->noisecalc.nr_samples == 8) {
824*4882a593Smuzhiyun 		/* Calculate the Link Quality by the noise samples. */
825*4882a593Smuzhiyun 		average = 0;
826*4882a593Smuzhiyun 		for (i = 0; i < 8; i++) {
827*4882a593Smuzhiyun 			for (j = 0; j < 4; j++)
828*4882a593Smuzhiyun 				average += dev->noisecalc.samples[i][j];
829*4882a593Smuzhiyun 		}
830*4882a593Smuzhiyun 		average /= (8 * 4);
831*4882a593Smuzhiyun 		average *= 125;
832*4882a593Smuzhiyun 		average += 64;
833*4882a593Smuzhiyun 		average /= 128;
834*4882a593Smuzhiyun 		tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
835*4882a593Smuzhiyun 					     0x40C);
836*4882a593Smuzhiyun 		tmp = (tmp / 128) & 0x1F;
837*4882a593Smuzhiyun 		if (tmp >= 8)
838*4882a593Smuzhiyun 			average += 2;
839*4882a593Smuzhiyun 		else
840*4882a593Smuzhiyun 			average -= 25;
841*4882a593Smuzhiyun 		if (tmp == 8)
842*4882a593Smuzhiyun 			average -= 72;
843*4882a593Smuzhiyun 		else
844*4882a593Smuzhiyun 			average -= 48;
845*4882a593Smuzhiyun 
846*4882a593Smuzhiyun 		dev->stats.link_noise = average;
847*4882a593Smuzhiyun drop_calculation:
848*4882a593Smuzhiyun 		dev->noisecalc.calculation_running = false;
849*4882a593Smuzhiyun 		return;
850*4882a593Smuzhiyun 	}
851*4882a593Smuzhiyun generate_new:
852*4882a593Smuzhiyun 	b43legacy_generate_noise_sample(dev);
853*4882a593Smuzhiyun }
854*4882a593Smuzhiyun 
handle_irq_tbtt_indication(struct b43legacy_wldev * dev)855*4882a593Smuzhiyun static void handle_irq_tbtt_indication(struct b43legacy_wldev *dev)
856*4882a593Smuzhiyun {
857*4882a593Smuzhiyun 	if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_AP)) {
858*4882a593Smuzhiyun 		/* TODO: PS TBTT */
859*4882a593Smuzhiyun 	} else {
860*4882a593Smuzhiyun 		if (1/*FIXME: the last PSpoll frame was sent successfully */)
861*4882a593Smuzhiyun 			b43legacy_power_saving_ctl_bits(dev, -1, -1);
862*4882a593Smuzhiyun 	}
863*4882a593Smuzhiyun 	if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_ADHOC))
864*4882a593Smuzhiyun 		dev->dfq_valid = true;
865*4882a593Smuzhiyun }
866*4882a593Smuzhiyun 
handle_irq_atim_end(struct b43legacy_wldev * dev)867*4882a593Smuzhiyun static void handle_irq_atim_end(struct b43legacy_wldev *dev)
868*4882a593Smuzhiyun {
869*4882a593Smuzhiyun 	if (dev->dfq_valid) {
870*4882a593Smuzhiyun 		b43legacy_write32(dev, B43legacy_MMIO_MACCMD,
871*4882a593Smuzhiyun 				  b43legacy_read32(dev, B43legacy_MMIO_MACCMD)
872*4882a593Smuzhiyun 				  | B43legacy_MACCMD_DFQ_VALID);
873*4882a593Smuzhiyun 		dev->dfq_valid = false;
874*4882a593Smuzhiyun 	}
875*4882a593Smuzhiyun }
876*4882a593Smuzhiyun 
handle_irq_pmq(struct b43legacy_wldev * dev)877*4882a593Smuzhiyun static void handle_irq_pmq(struct b43legacy_wldev *dev)
878*4882a593Smuzhiyun {
879*4882a593Smuzhiyun 	u32 tmp;
880*4882a593Smuzhiyun 
881*4882a593Smuzhiyun 	/* TODO: AP mode. */
882*4882a593Smuzhiyun 
883*4882a593Smuzhiyun 	while (1) {
884*4882a593Smuzhiyun 		tmp = b43legacy_read32(dev, B43legacy_MMIO_PS_STATUS);
885*4882a593Smuzhiyun 		if (!(tmp & 0x00000008))
886*4882a593Smuzhiyun 			break;
887*4882a593Smuzhiyun 	}
888*4882a593Smuzhiyun 	/* 16bit write is odd, but correct. */
889*4882a593Smuzhiyun 	b43legacy_write16(dev, B43legacy_MMIO_PS_STATUS, 0x0002);
890*4882a593Smuzhiyun }
891*4882a593Smuzhiyun 
b43legacy_write_template_common(struct b43legacy_wldev * dev,const u8 * data,u16 size,u16 ram_offset,u16 shm_size_offset,u8 rate)892*4882a593Smuzhiyun static void b43legacy_write_template_common(struct b43legacy_wldev *dev,
893*4882a593Smuzhiyun 					    const u8 *data, u16 size,
894*4882a593Smuzhiyun 					    u16 ram_offset,
895*4882a593Smuzhiyun 					    u16 shm_size_offset, u8 rate)
896*4882a593Smuzhiyun {
897*4882a593Smuzhiyun 	u32 i;
898*4882a593Smuzhiyun 	u32 tmp;
899*4882a593Smuzhiyun 	struct b43legacy_plcp_hdr4 plcp;
900*4882a593Smuzhiyun 
901*4882a593Smuzhiyun 	plcp.data = 0;
902*4882a593Smuzhiyun 	b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate);
903*4882a593Smuzhiyun 	b43legacy_ram_write(dev, ram_offset, le32_to_cpu(plcp.data));
904*4882a593Smuzhiyun 	ram_offset += sizeof(u32);
905*4882a593Smuzhiyun 	/* The PLCP is 6 bytes long, but we only wrote 4 bytes, yet.
906*4882a593Smuzhiyun 	 * So leave the first two bytes of the next write blank.
907*4882a593Smuzhiyun 	 */
908*4882a593Smuzhiyun 	tmp = (u32)(data[0]) << 16;
909*4882a593Smuzhiyun 	tmp |= (u32)(data[1]) << 24;
910*4882a593Smuzhiyun 	b43legacy_ram_write(dev, ram_offset, tmp);
911*4882a593Smuzhiyun 	ram_offset += sizeof(u32);
912*4882a593Smuzhiyun 	for (i = 2; i < size; i += sizeof(u32)) {
913*4882a593Smuzhiyun 		tmp = (u32)(data[i + 0]);
914*4882a593Smuzhiyun 		if (i + 1 < size)
915*4882a593Smuzhiyun 			tmp |= (u32)(data[i + 1]) << 8;
916*4882a593Smuzhiyun 		if (i + 2 < size)
917*4882a593Smuzhiyun 			tmp |= (u32)(data[i + 2]) << 16;
918*4882a593Smuzhiyun 		if (i + 3 < size)
919*4882a593Smuzhiyun 			tmp |= (u32)(data[i + 3]) << 24;
920*4882a593Smuzhiyun 		b43legacy_ram_write(dev, ram_offset + i - 2, tmp);
921*4882a593Smuzhiyun 	}
922*4882a593Smuzhiyun 	b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_size_offset,
923*4882a593Smuzhiyun 			      size + sizeof(struct b43legacy_plcp_hdr6));
924*4882a593Smuzhiyun }
925*4882a593Smuzhiyun 
926*4882a593Smuzhiyun /* Convert a b43legacy antenna number value to the PHY TX control value. */
b43legacy_antenna_to_phyctl(int antenna)927*4882a593Smuzhiyun static u16 b43legacy_antenna_to_phyctl(int antenna)
928*4882a593Smuzhiyun {
929*4882a593Smuzhiyun 	switch (antenna) {
930*4882a593Smuzhiyun 	case B43legacy_ANTENNA0:
931*4882a593Smuzhiyun 		return B43legacy_TX4_PHY_ANT0;
932*4882a593Smuzhiyun 	case B43legacy_ANTENNA1:
933*4882a593Smuzhiyun 		return B43legacy_TX4_PHY_ANT1;
934*4882a593Smuzhiyun 	}
935*4882a593Smuzhiyun 	return B43legacy_TX4_PHY_ANTLAST;
936*4882a593Smuzhiyun }
937*4882a593Smuzhiyun 
b43legacy_write_beacon_template(struct b43legacy_wldev * dev,u16 ram_offset,u16 shm_size_offset)938*4882a593Smuzhiyun static void b43legacy_write_beacon_template(struct b43legacy_wldev *dev,
939*4882a593Smuzhiyun 					    u16 ram_offset,
940*4882a593Smuzhiyun 					    u16 shm_size_offset)
941*4882a593Smuzhiyun {
942*4882a593Smuzhiyun 
943*4882a593Smuzhiyun 	unsigned int i, len, variable_len;
944*4882a593Smuzhiyun 	const struct ieee80211_mgmt *bcn;
945*4882a593Smuzhiyun 	const u8 *ie;
946*4882a593Smuzhiyun 	bool tim_found = false;
947*4882a593Smuzhiyun 	unsigned int rate;
948*4882a593Smuzhiyun 	u16 ctl;
949*4882a593Smuzhiyun 	int antenna;
950*4882a593Smuzhiyun 	struct ieee80211_tx_info *info = IEEE80211_SKB_CB(dev->wl->current_beacon);
951*4882a593Smuzhiyun 
952*4882a593Smuzhiyun 	bcn = (const struct ieee80211_mgmt *)(dev->wl->current_beacon->data);
953*4882a593Smuzhiyun 	len = min_t(size_t, dev->wl->current_beacon->len,
954*4882a593Smuzhiyun 		  0x200 - sizeof(struct b43legacy_plcp_hdr6));
955*4882a593Smuzhiyun 	rate = ieee80211_get_tx_rate(dev->wl->hw, info)->hw_value;
956*4882a593Smuzhiyun 
957*4882a593Smuzhiyun 	b43legacy_write_template_common(dev, (const u8 *)bcn, len, ram_offset,
958*4882a593Smuzhiyun 					shm_size_offset, rate);
959*4882a593Smuzhiyun 
960*4882a593Smuzhiyun 	/* Write the PHY TX control parameters. */
961*4882a593Smuzhiyun 	antenna = B43legacy_ANTENNA_DEFAULT;
962*4882a593Smuzhiyun 	antenna = b43legacy_antenna_to_phyctl(antenna);
963*4882a593Smuzhiyun 	ctl = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
964*4882a593Smuzhiyun 				   B43legacy_SHM_SH_BEACPHYCTL);
965*4882a593Smuzhiyun 	/* We can't send beacons with short preamble. Would get PHY errors. */
966*4882a593Smuzhiyun 	ctl &= ~B43legacy_TX4_PHY_SHORTPRMBL;
967*4882a593Smuzhiyun 	ctl &= ~B43legacy_TX4_PHY_ANT;
968*4882a593Smuzhiyun 	ctl &= ~B43legacy_TX4_PHY_ENC;
969*4882a593Smuzhiyun 	ctl |= antenna;
970*4882a593Smuzhiyun 	ctl |= B43legacy_TX4_PHY_ENC_CCK;
971*4882a593Smuzhiyun 	b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
972*4882a593Smuzhiyun 			      B43legacy_SHM_SH_BEACPHYCTL, ctl);
973*4882a593Smuzhiyun 
974*4882a593Smuzhiyun 	/* Find the position of the TIM and the DTIM_period value
975*4882a593Smuzhiyun 	 * and write them to SHM. */
976*4882a593Smuzhiyun 	ie = bcn->u.beacon.variable;
977*4882a593Smuzhiyun 	variable_len = len - offsetof(struct ieee80211_mgmt, u.beacon.variable);
978*4882a593Smuzhiyun 	for (i = 0; i < variable_len - 2; ) {
979*4882a593Smuzhiyun 		uint8_t ie_id, ie_len;
980*4882a593Smuzhiyun 
981*4882a593Smuzhiyun 		ie_id = ie[i];
982*4882a593Smuzhiyun 		ie_len = ie[i + 1];
983*4882a593Smuzhiyun 		if (ie_id == 5) {
984*4882a593Smuzhiyun 			u16 tim_position;
985*4882a593Smuzhiyun 			u16 dtim_period;
986*4882a593Smuzhiyun 			/* This is the TIM Information Element */
987*4882a593Smuzhiyun 
988*4882a593Smuzhiyun 			/* Check whether the ie_len is in the beacon data range. */
989*4882a593Smuzhiyun 			if (variable_len < ie_len + 2 + i)
990*4882a593Smuzhiyun 				break;
991*4882a593Smuzhiyun 			/* A valid TIM is at least 4 bytes long. */
992*4882a593Smuzhiyun 			if (ie_len < 4)
993*4882a593Smuzhiyun 				break;
994*4882a593Smuzhiyun 			tim_found = true;
995*4882a593Smuzhiyun 
996*4882a593Smuzhiyun 			tim_position = sizeof(struct b43legacy_plcp_hdr6);
997*4882a593Smuzhiyun 			tim_position += offsetof(struct ieee80211_mgmt,
998*4882a593Smuzhiyun 						 u.beacon.variable);
999*4882a593Smuzhiyun 			tim_position += i;
1000*4882a593Smuzhiyun 
1001*4882a593Smuzhiyun 			dtim_period = ie[i + 3];
1002*4882a593Smuzhiyun 
1003*4882a593Smuzhiyun 			b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1004*4882a593Smuzhiyun 					B43legacy_SHM_SH_TIMPOS, tim_position);
1005*4882a593Smuzhiyun 			b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
1006*4882a593Smuzhiyun 					B43legacy_SHM_SH_DTIMP, dtim_period);
1007*4882a593Smuzhiyun 			break;
1008*4882a593Smuzhiyun 		}
1009*4882a593Smuzhiyun 		i += ie_len + 2;
1010*4882a593Smuzhiyun 	}
1011*4882a593Smuzhiyun 	if (!tim_found) {
1012*4882a593Smuzhiyun 		b43legacywarn(dev->wl, "Did not find a valid TIM IE in the "
1013*4882a593Smuzhiyun 			      "beacon template packet. AP or IBSS operation "
1014*4882a593Smuzhiyun 			      "may be broken.\n");
1015*4882a593Smuzhiyun 	} else
1016*4882a593Smuzhiyun 		b43legacydbg(dev->wl, "Updated beacon template\n");
1017*4882a593Smuzhiyun }
1018*4882a593Smuzhiyun 
b43legacy_write_probe_resp_plcp(struct b43legacy_wldev * dev,u16 shm_offset,u16 size,struct ieee80211_rate * rate)1019*4882a593Smuzhiyun static void b43legacy_write_probe_resp_plcp(struct b43legacy_wldev *dev,
1020*4882a593Smuzhiyun 					    u16 shm_offset, u16 size,
1021*4882a593Smuzhiyun 					    struct ieee80211_rate *rate)
1022*4882a593Smuzhiyun {
1023*4882a593Smuzhiyun 	struct b43legacy_plcp_hdr4 plcp;
1024*4882a593Smuzhiyun 	u32 tmp;
1025*4882a593Smuzhiyun 	__le16 dur;
1026*4882a593Smuzhiyun 
1027*4882a593Smuzhiyun 	plcp.data = 0;
1028*4882a593Smuzhiyun 	b43legacy_generate_plcp_hdr(&plcp, size + FCS_LEN, rate->hw_value);
1029*4882a593Smuzhiyun 	dur = ieee80211_generic_frame_duration(dev->wl->hw,
1030*4882a593Smuzhiyun 					       dev->wl->vif,
1031*4882a593Smuzhiyun 					       NL80211_BAND_2GHZ,
1032*4882a593Smuzhiyun 					       size,
1033*4882a593Smuzhiyun 					       rate);
1034*4882a593Smuzhiyun 	/* Write PLCP in two parts and timing for packet transfer */
1035*4882a593Smuzhiyun 	tmp = le32_to_cpu(plcp.data);
1036*4882a593Smuzhiyun 	b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset,
1037*4882a593Smuzhiyun 			      tmp & 0xFFFF);
1038*4882a593Smuzhiyun 	b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 2,
1039*4882a593Smuzhiyun 			      tmp >> 16);
1040*4882a593Smuzhiyun 	b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 6,
1041*4882a593Smuzhiyun 			      le16_to_cpu(dur));
1042*4882a593Smuzhiyun }
1043*4882a593Smuzhiyun 
1044*4882a593Smuzhiyun /* Instead of using custom probe response template, this function
1045*4882a593Smuzhiyun  * just patches custom beacon template by:
1046*4882a593Smuzhiyun  * 1) Changing packet type
1047*4882a593Smuzhiyun  * 2) Patching duration field
1048*4882a593Smuzhiyun  * 3) Stripping TIM
1049*4882a593Smuzhiyun  */
b43legacy_generate_probe_resp(struct b43legacy_wldev * dev,u16 * dest_size,struct ieee80211_rate * rate)1050*4882a593Smuzhiyun static const u8 *b43legacy_generate_probe_resp(struct b43legacy_wldev *dev,
1051*4882a593Smuzhiyun 					       u16 *dest_size,
1052*4882a593Smuzhiyun 					       struct ieee80211_rate *rate)
1053*4882a593Smuzhiyun {
1054*4882a593Smuzhiyun 	const u8 *src_data;
1055*4882a593Smuzhiyun 	u8 *dest_data;
1056*4882a593Smuzhiyun 	u16 src_size, elem_size, src_pos, dest_pos;
1057*4882a593Smuzhiyun 	__le16 dur;
1058*4882a593Smuzhiyun 	struct ieee80211_hdr *hdr;
1059*4882a593Smuzhiyun 	size_t ie_start;
1060*4882a593Smuzhiyun 
1061*4882a593Smuzhiyun 	src_size = dev->wl->current_beacon->len;
1062*4882a593Smuzhiyun 	src_data = (const u8 *)dev->wl->current_beacon->data;
1063*4882a593Smuzhiyun 
1064*4882a593Smuzhiyun 	/* Get the start offset of the variable IEs in the packet. */
1065*4882a593Smuzhiyun 	ie_start = offsetof(struct ieee80211_mgmt, u.probe_resp.variable);
1066*4882a593Smuzhiyun 	B43legacy_WARN_ON(ie_start != offsetof(struct ieee80211_mgmt,
1067*4882a593Smuzhiyun 					       u.beacon.variable));
1068*4882a593Smuzhiyun 
1069*4882a593Smuzhiyun 	if (B43legacy_WARN_ON(src_size < ie_start))
1070*4882a593Smuzhiyun 		return NULL;
1071*4882a593Smuzhiyun 
1072*4882a593Smuzhiyun 	dest_data = kmalloc(src_size, GFP_ATOMIC);
1073*4882a593Smuzhiyun 	if (unlikely(!dest_data))
1074*4882a593Smuzhiyun 		return NULL;
1075*4882a593Smuzhiyun 
1076*4882a593Smuzhiyun 	/* Copy the static data and all Information Elements, except the TIM. */
1077*4882a593Smuzhiyun 	memcpy(dest_data, src_data, ie_start);
1078*4882a593Smuzhiyun 	src_pos = ie_start;
1079*4882a593Smuzhiyun 	dest_pos = ie_start;
1080*4882a593Smuzhiyun 	for ( ; src_pos < src_size - 2; src_pos += elem_size) {
1081*4882a593Smuzhiyun 		elem_size = src_data[src_pos + 1] + 2;
1082*4882a593Smuzhiyun 		if (src_data[src_pos] == 5) {
1083*4882a593Smuzhiyun 			/* This is the TIM. */
1084*4882a593Smuzhiyun 			continue;
1085*4882a593Smuzhiyun 		}
1086*4882a593Smuzhiyun 		memcpy(dest_data + dest_pos, src_data + src_pos, elem_size);
1087*4882a593Smuzhiyun 		dest_pos += elem_size;
1088*4882a593Smuzhiyun 	}
1089*4882a593Smuzhiyun 	*dest_size = dest_pos;
1090*4882a593Smuzhiyun 	hdr = (struct ieee80211_hdr *)dest_data;
1091*4882a593Smuzhiyun 
1092*4882a593Smuzhiyun 	/* Set the frame control. */
1093*4882a593Smuzhiyun 	hdr->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT |
1094*4882a593Smuzhiyun 					 IEEE80211_STYPE_PROBE_RESP);
1095*4882a593Smuzhiyun 	dur = ieee80211_generic_frame_duration(dev->wl->hw,
1096*4882a593Smuzhiyun 					       dev->wl->vif,
1097*4882a593Smuzhiyun 					       NL80211_BAND_2GHZ,
1098*4882a593Smuzhiyun 					       *dest_size,
1099*4882a593Smuzhiyun 					       rate);
1100*4882a593Smuzhiyun 	hdr->duration_id = dur;
1101*4882a593Smuzhiyun 
1102*4882a593Smuzhiyun 	return dest_data;
1103*4882a593Smuzhiyun }
1104*4882a593Smuzhiyun 
b43legacy_write_probe_resp_template(struct b43legacy_wldev * dev,u16 ram_offset,u16 shm_size_offset,struct ieee80211_rate * rate)1105*4882a593Smuzhiyun static void b43legacy_write_probe_resp_template(struct b43legacy_wldev *dev,
1106*4882a593Smuzhiyun 						u16 ram_offset,
1107*4882a593Smuzhiyun 						u16 shm_size_offset,
1108*4882a593Smuzhiyun 						struct ieee80211_rate *rate)
1109*4882a593Smuzhiyun {
1110*4882a593Smuzhiyun 	const u8 *probe_resp_data;
1111*4882a593Smuzhiyun 	u16 size;
1112*4882a593Smuzhiyun 
1113*4882a593Smuzhiyun 	size = dev->wl->current_beacon->len;
1114*4882a593Smuzhiyun 	probe_resp_data = b43legacy_generate_probe_resp(dev, &size, rate);
1115*4882a593Smuzhiyun 	if (unlikely(!probe_resp_data))
1116*4882a593Smuzhiyun 		return;
1117*4882a593Smuzhiyun 
1118*4882a593Smuzhiyun 	/* Looks like PLCP headers plus packet timings are stored for
1119*4882a593Smuzhiyun 	 * all possible basic rates
1120*4882a593Smuzhiyun 	 */
1121*4882a593Smuzhiyun 	b43legacy_write_probe_resp_plcp(dev, 0x31A, size,
1122*4882a593Smuzhiyun 					&b43legacy_b_ratetable[0]);
1123*4882a593Smuzhiyun 	b43legacy_write_probe_resp_plcp(dev, 0x32C, size,
1124*4882a593Smuzhiyun 					&b43legacy_b_ratetable[1]);
1125*4882a593Smuzhiyun 	b43legacy_write_probe_resp_plcp(dev, 0x33E, size,
1126*4882a593Smuzhiyun 					&b43legacy_b_ratetable[2]);
1127*4882a593Smuzhiyun 	b43legacy_write_probe_resp_plcp(dev, 0x350, size,
1128*4882a593Smuzhiyun 					&b43legacy_b_ratetable[3]);
1129*4882a593Smuzhiyun 
1130*4882a593Smuzhiyun 	size = min_t(size_t, size,
1131*4882a593Smuzhiyun 		   0x200 - sizeof(struct b43legacy_plcp_hdr6));
1132*4882a593Smuzhiyun 	b43legacy_write_template_common(dev, probe_resp_data,
1133*4882a593Smuzhiyun 					size, ram_offset,
1134*4882a593Smuzhiyun 					shm_size_offset, rate->hw_value);
1135*4882a593Smuzhiyun 	kfree(probe_resp_data);
1136*4882a593Smuzhiyun }
1137*4882a593Smuzhiyun 
b43legacy_upload_beacon0(struct b43legacy_wldev * dev)1138*4882a593Smuzhiyun static void b43legacy_upload_beacon0(struct b43legacy_wldev *dev)
1139*4882a593Smuzhiyun {
1140*4882a593Smuzhiyun 	struct b43legacy_wl *wl = dev->wl;
1141*4882a593Smuzhiyun 
1142*4882a593Smuzhiyun 	if (wl->beacon0_uploaded)
1143*4882a593Smuzhiyun 		return;
1144*4882a593Smuzhiyun 	b43legacy_write_beacon_template(dev, 0x68, 0x18);
1145*4882a593Smuzhiyun 	/* FIXME: Probe resp upload doesn't really belong here,
1146*4882a593Smuzhiyun 	 *        but we don't use that feature anyway. */
1147*4882a593Smuzhiyun 	b43legacy_write_probe_resp_template(dev, 0x268, 0x4A,
1148*4882a593Smuzhiyun 				      &__b43legacy_ratetable[3]);
1149*4882a593Smuzhiyun 	wl->beacon0_uploaded = true;
1150*4882a593Smuzhiyun }
1151*4882a593Smuzhiyun 
b43legacy_upload_beacon1(struct b43legacy_wldev * dev)1152*4882a593Smuzhiyun static void b43legacy_upload_beacon1(struct b43legacy_wldev *dev)
1153*4882a593Smuzhiyun {
1154*4882a593Smuzhiyun 	struct b43legacy_wl *wl = dev->wl;
1155*4882a593Smuzhiyun 
1156*4882a593Smuzhiyun 	if (wl->beacon1_uploaded)
1157*4882a593Smuzhiyun 		return;
1158*4882a593Smuzhiyun 	b43legacy_write_beacon_template(dev, 0x468, 0x1A);
1159*4882a593Smuzhiyun 	wl->beacon1_uploaded = true;
1160*4882a593Smuzhiyun }
1161*4882a593Smuzhiyun 
handle_irq_beacon(struct b43legacy_wldev * dev)1162*4882a593Smuzhiyun static void handle_irq_beacon(struct b43legacy_wldev *dev)
1163*4882a593Smuzhiyun {
1164*4882a593Smuzhiyun 	struct b43legacy_wl *wl = dev->wl;
1165*4882a593Smuzhiyun 	u32 cmd, beacon0_valid, beacon1_valid;
1166*4882a593Smuzhiyun 
1167*4882a593Smuzhiyun 	if (!b43legacy_is_mode(wl, NL80211_IFTYPE_AP))
1168*4882a593Smuzhiyun 		return;
1169*4882a593Smuzhiyun 
1170*4882a593Smuzhiyun 	/* This is the bottom half of the asynchronous beacon update. */
1171*4882a593Smuzhiyun 
1172*4882a593Smuzhiyun 	/* Ignore interrupt in the future. */
1173*4882a593Smuzhiyun 	dev->irq_mask &= ~B43legacy_IRQ_BEACON;
1174*4882a593Smuzhiyun 
1175*4882a593Smuzhiyun 	cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1176*4882a593Smuzhiyun 	beacon0_valid = (cmd & B43legacy_MACCMD_BEACON0_VALID);
1177*4882a593Smuzhiyun 	beacon1_valid = (cmd & B43legacy_MACCMD_BEACON1_VALID);
1178*4882a593Smuzhiyun 
1179*4882a593Smuzhiyun 	/* Schedule interrupt manually, if busy. */
1180*4882a593Smuzhiyun 	if (beacon0_valid && beacon1_valid) {
1181*4882a593Smuzhiyun 		b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, B43legacy_IRQ_BEACON);
1182*4882a593Smuzhiyun 		dev->irq_mask |= B43legacy_IRQ_BEACON;
1183*4882a593Smuzhiyun 		return;
1184*4882a593Smuzhiyun 	}
1185*4882a593Smuzhiyun 
1186*4882a593Smuzhiyun 	if (unlikely(wl->beacon_templates_virgin)) {
1187*4882a593Smuzhiyun 		/* We never uploaded a beacon before.
1188*4882a593Smuzhiyun 		 * Upload both templates now, but only mark one valid. */
1189*4882a593Smuzhiyun 		wl->beacon_templates_virgin = false;
1190*4882a593Smuzhiyun 		b43legacy_upload_beacon0(dev);
1191*4882a593Smuzhiyun 		b43legacy_upload_beacon1(dev);
1192*4882a593Smuzhiyun 		cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1193*4882a593Smuzhiyun 		cmd |= B43legacy_MACCMD_BEACON0_VALID;
1194*4882a593Smuzhiyun 		b43legacy_write32(dev, B43legacy_MMIO_MACCMD, cmd);
1195*4882a593Smuzhiyun 	} else {
1196*4882a593Smuzhiyun 		if (!beacon0_valid) {
1197*4882a593Smuzhiyun 			b43legacy_upload_beacon0(dev);
1198*4882a593Smuzhiyun 			cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1199*4882a593Smuzhiyun 			cmd |= B43legacy_MACCMD_BEACON0_VALID;
1200*4882a593Smuzhiyun 			b43legacy_write32(dev, B43legacy_MMIO_MACCMD, cmd);
1201*4882a593Smuzhiyun 		} else if (!beacon1_valid) {
1202*4882a593Smuzhiyun 			b43legacy_upload_beacon1(dev);
1203*4882a593Smuzhiyun 			cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1204*4882a593Smuzhiyun 			cmd |= B43legacy_MACCMD_BEACON1_VALID;
1205*4882a593Smuzhiyun 			b43legacy_write32(dev, B43legacy_MMIO_MACCMD, cmd);
1206*4882a593Smuzhiyun 		}
1207*4882a593Smuzhiyun 	}
1208*4882a593Smuzhiyun }
1209*4882a593Smuzhiyun 
b43legacy_beacon_update_trigger_work(struct work_struct * work)1210*4882a593Smuzhiyun static void b43legacy_beacon_update_trigger_work(struct work_struct *work)
1211*4882a593Smuzhiyun {
1212*4882a593Smuzhiyun 	struct b43legacy_wl *wl = container_of(work, struct b43legacy_wl,
1213*4882a593Smuzhiyun 					 beacon_update_trigger);
1214*4882a593Smuzhiyun 	struct b43legacy_wldev *dev;
1215*4882a593Smuzhiyun 
1216*4882a593Smuzhiyun 	mutex_lock(&wl->mutex);
1217*4882a593Smuzhiyun 	dev = wl->current_dev;
1218*4882a593Smuzhiyun 	if (likely(dev && (b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED))) {
1219*4882a593Smuzhiyun 		spin_lock_irq(&wl->irq_lock);
1220*4882a593Smuzhiyun 		/* Update beacon right away or defer to IRQ. */
1221*4882a593Smuzhiyun 		handle_irq_beacon(dev);
1222*4882a593Smuzhiyun 		/* The handler might have updated the IRQ mask. */
1223*4882a593Smuzhiyun 		b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK,
1224*4882a593Smuzhiyun 				  dev->irq_mask);
1225*4882a593Smuzhiyun 		spin_unlock_irq(&wl->irq_lock);
1226*4882a593Smuzhiyun 	}
1227*4882a593Smuzhiyun 	mutex_unlock(&wl->mutex);
1228*4882a593Smuzhiyun }
1229*4882a593Smuzhiyun 
1230*4882a593Smuzhiyun /* Asynchronously update the packet templates in template RAM.
1231*4882a593Smuzhiyun  * Locking: Requires wl->irq_lock to be locked. */
b43legacy_update_templates(struct b43legacy_wl * wl)1232*4882a593Smuzhiyun static void b43legacy_update_templates(struct b43legacy_wl *wl)
1233*4882a593Smuzhiyun {
1234*4882a593Smuzhiyun 	struct sk_buff *beacon;
1235*4882a593Smuzhiyun 	/* This is the top half of the ansynchronous beacon update. The bottom
1236*4882a593Smuzhiyun 	 * half is the beacon IRQ. Beacon update must be asynchronous to avoid
1237*4882a593Smuzhiyun 	 * sending an invalid beacon. This can happen for example, if the
1238*4882a593Smuzhiyun 	 * firmware transmits a beacon while we are updating it. */
1239*4882a593Smuzhiyun 
1240*4882a593Smuzhiyun 	/* We could modify the existing beacon and set the aid bit in the TIM
1241*4882a593Smuzhiyun 	 * field, but that would probably require resizing and moving of data
1242*4882a593Smuzhiyun 	 * within the beacon template. Simply request a new beacon and let
1243*4882a593Smuzhiyun 	 * mac80211 do the hard work. */
1244*4882a593Smuzhiyun 	beacon = ieee80211_beacon_get(wl->hw, wl->vif);
1245*4882a593Smuzhiyun 	if (unlikely(!beacon))
1246*4882a593Smuzhiyun 		return;
1247*4882a593Smuzhiyun 
1248*4882a593Smuzhiyun 	if (wl->current_beacon)
1249*4882a593Smuzhiyun 		dev_kfree_skb_any(wl->current_beacon);
1250*4882a593Smuzhiyun 	wl->current_beacon = beacon;
1251*4882a593Smuzhiyun 	wl->beacon0_uploaded = false;
1252*4882a593Smuzhiyun 	wl->beacon1_uploaded = false;
1253*4882a593Smuzhiyun 	ieee80211_queue_work(wl->hw, &wl->beacon_update_trigger);
1254*4882a593Smuzhiyun }
1255*4882a593Smuzhiyun 
b43legacy_set_beacon_int(struct b43legacy_wldev * dev,u16 beacon_int)1256*4882a593Smuzhiyun static void b43legacy_set_beacon_int(struct b43legacy_wldev *dev,
1257*4882a593Smuzhiyun 				     u16 beacon_int)
1258*4882a593Smuzhiyun {
1259*4882a593Smuzhiyun 	b43legacy_time_lock(dev);
1260*4882a593Smuzhiyun 	if (dev->dev->id.revision >= 3) {
1261*4882a593Smuzhiyun 		b43legacy_write32(dev, B43legacy_MMIO_TSF_CFP_REP,
1262*4882a593Smuzhiyun 				 (beacon_int << 16));
1263*4882a593Smuzhiyun 		b43legacy_write32(dev, B43legacy_MMIO_TSF_CFP_START,
1264*4882a593Smuzhiyun 				 (beacon_int << 10));
1265*4882a593Smuzhiyun 	} else {
1266*4882a593Smuzhiyun 		b43legacy_write16(dev, 0x606, (beacon_int >> 6));
1267*4882a593Smuzhiyun 		b43legacy_write16(dev, 0x610, beacon_int);
1268*4882a593Smuzhiyun 	}
1269*4882a593Smuzhiyun 	b43legacy_time_unlock(dev);
1270*4882a593Smuzhiyun 	b43legacydbg(dev->wl, "Set beacon interval to %u\n", beacon_int);
1271*4882a593Smuzhiyun }
1272*4882a593Smuzhiyun 
handle_irq_ucode_debug(struct b43legacy_wldev * dev)1273*4882a593Smuzhiyun static void handle_irq_ucode_debug(struct b43legacy_wldev *dev)
1274*4882a593Smuzhiyun {
1275*4882a593Smuzhiyun }
1276*4882a593Smuzhiyun 
1277*4882a593Smuzhiyun /* Interrupt handler bottom-half */
b43legacy_interrupt_tasklet(struct tasklet_struct * t)1278*4882a593Smuzhiyun static void b43legacy_interrupt_tasklet(struct tasklet_struct *t)
1279*4882a593Smuzhiyun {
1280*4882a593Smuzhiyun 	struct b43legacy_wldev *dev = from_tasklet(dev, t, isr_tasklet);
1281*4882a593Smuzhiyun 	u32 reason;
1282*4882a593Smuzhiyun 	u32 dma_reason[ARRAY_SIZE(dev->dma_reason)];
1283*4882a593Smuzhiyun 	u32 merged_dma_reason = 0;
1284*4882a593Smuzhiyun 	int i;
1285*4882a593Smuzhiyun 	unsigned long flags;
1286*4882a593Smuzhiyun 
1287*4882a593Smuzhiyun 	spin_lock_irqsave(&dev->wl->irq_lock, flags);
1288*4882a593Smuzhiyun 
1289*4882a593Smuzhiyun 	B43legacy_WARN_ON(b43legacy_status(dev) <
1290*4882a593Smuzhiyun 			  B43legacy_STAT_INITIALIZED);
1291*4882a593Smuzhiyun 
1292*4882a593Smuzhiyun 	reason = dev->irq_reason;
1293*4882a593Smuzhiyun 	for (i = 0; i < ARRAY_SIZE(dma_reason); i++) {
1294*4882a593Smuzhiyun 		dma_reason[i] = dev->dma_reason[i];
1295*4882a593Smuzhiyun 		merged_dma_reason |= dma_reason[i];
1296*4882a593Smuzhiyun 	}
1297*4882a593Smuzhiyun 
1298*4882a593Smuzhiyun 	if (unlikely(reason & B43legacy_IRQ_MAC_TXERR))
1299*4882a593Smuzhiyun 		b43legacyerr(dev->wl, "MAC transmission error\n");
1300*4882a593Smuzhiyun 
1301*4882a593Smuzhiyun 	if (unlikely(reason & B43legacy_IRQ_PHY_TXERR)) {
1302*4882a593Smuzhiyun 		b43legacyerr(dev->wl, "PHY transmission error\n");
1303*4882a593Smuzhiyun 		rmb();
1304*4882a593Smuzhiyun 		if (unlikely(atomic_dec_and_test(&dev->phy.txerr_cnt))) {
1305*4882a593Smuzhiyun 			b43legacyerr(dev->wl, "Too many PHY TX errors, "
1306*4882a593Smuzhiyun 					      "restarting the controller\n");
1307*4882a593Smuzhiyun 			b43legacy_controller_restart(dev, "PHY TX errors");
1308*4882a593Smuzhiyun 		}
1309*4882a593Smuzhiyun 	}
1310*4882a593Smuzhiyun 
1311*4882a593Smuzhiyun 	if (unlikely(merged_dma_reason & (B43legacy_DMAIRQ_FATALMASK |
1312*4882a593Smuzhiyun 					  B43legacy_DMAIRQ_NONFATALMASK))) {
1313*4882a593Smuzhiyun 		if (merged_dma_reason & B43legacy_DMAIRQ_FATALMASK) {
1314*4882a593Smuzhiyun 			b43legacyerr(dev->wl, "Fatal DMA error: "
1315*4882a593Smuzhiyun 			       "0x%08X, 0x%08X, 0x%08X, "
1316*4882a593Smuzhiyun 			       "0x%08X, 0x%08X, 0x%08X\n",
1317*4882a593Smuzhiyun 			       dma_reason[0], dma_reason[1],
1318*4882a593Smuzhiyun 			       dma_reason[2], dma_reason[3],
1319*4882a593Smuzhiyun 			       dma_reason[4], dma_reason[5]);
1320*4882a593Smuzhiyun 			b43legacy_controller_restart(dev, "DMA error");
1321*4882a593Smuzhiyun 			spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
1322*4882a593Smuzhiyun 			return;
1323*4882a593Smuzhiyun 		}
1324*4882a593Smuzhiyun 		if (merged_dma_reason & B43legacy_DMAIRQ_NONFATALMASK)
1325*4882a593Smuzhiyun 			b43legacyerr(dev->wl, "DMA error: "
1326*4882a593Smuzhiyun 			       "0x%08X, 0x%08X, 0x%08X, "
1327*4882a593Smuzhiyun 			       "0x%08X, 0x%08X, 0x%08X\n",
1328*4882a593Smuzhiyun 			       dma_reason[0], dma_reason[1],
1329*4882a593Smuzhiyun 			       dma_reason[2], dma_reason[3],
1330*4882a593Smuzhiyun 			       dma_reason[4], dma_reason[5]);
1331*4882a593Smuzhiyun 	}
1332*4882a593Smuzhiyun 
1333*4882a593Smuzhiyun 	if (unlikely(reason & B43legacy_IRQ_UCODE_DEBUG))
1334*4882a593Smuzhiyun 		handle_irq_ucode_debug(dev);
1335*4882a593Smuzhiyun 	if (reason & B43legacy_IRQ_TBTT_INDI)
1336*4882a593Smuzhiyun 		handle_irq_tbtt_indication(dev);
1337*4882a593Smuzhiyun 	if (reason & B43legacy_IRQ_ATIM_END)
1338*4882a593Smuzhiyun 		handle_irq_atim_end(dev);
1339*4882a593Smuzhiyun 	if (reason & B43legacy_IRQ_BEACON)
1340*4882a593Smuzhiyun 		handle_irq_beacon(dev);
1341*4882a593Smuzhiyun 	if (reason & B43legacy_IRQ_PMQ)
1342*4882a593Smuzhiyun 		handle_irq_pmq(dev);
1343*4882a593Smuzhiyun 	if (reason & B43legacy_IRQ_TXFIFO_FLUSH_OK) {
1344*4882a593Smuzhiyun 		;/*TODO*/
1345*4882a593Smuzhiyun 	}
1346*4882a593Smuzhiyun 	if (reason & B43legacy_IRQ_NOISESAMPLE_OK)
1347*4882a593Smuzhiyun 		handle_irq_noise(dev);
1348*4882a593Smuzhiyun 
1349*4882a593Smuzhiyun 	/* Check the DMA reason registers for received data. */
1350*4882a593Smuzhiyun 	if (dma_reason[0] & B43legacy_DMAIRQ_RX_DONE) {
1351*4882a593Smuzhiyun 		if (b43legacy_using_pio(dev))
1352*4882a593Smuzhiyun 			b43legacy_pio_rx(dev->pio.queue0);
1353*4882a593Smuzhiyun 		else
1354*4882a593Smuzhiyun 			b43legacy_dma_rx(dev->dma.rx_ring0);
1355*4882a593Smuzhiyun 	}
1356*4882a593Smuzhiyun 	B43legacy_WARN_ON(dma_reason[1] & B43legacy_DMAIRQ_RX_DONE);
1357*4882a593Smuzhiyun 	B43legacy_WARN_ON(dma_reason[2] & B43legacy_DMAIRQ_RX_DONE);
1358*4882a593Smuzhiyun 	if (dma_reason[3] & B43legacy_DMAIRQ_RX_DONE) {
1359*4882a593Smuzhiyun 		if (b43legacy_using_pio(dev))
1360*4882a593Smuzhiyun 			b43legacy_pio_rx(dev->pio.queue3);
1361*4882a593Smuzhiyun 		else
1362*4882a593Smuzhiyun 			b43legacy_dma_rx(dev->dma.rx_ring3);
1363*4882a593Smuzhiyun 	}
1364*4882a593Smuzhiyun 	B43legacy_WARN_ON(dma_reason[4] & B43legacy_DMAIRQ_RX_DONE);
1365*4882a593Smuzhiyun 	B43legacy_WARN_ON(dma_reason[5] & B43legacy_DMAIRQ_RX_DONE);
1366*4882a593Smuzhiyun 
1367*4882a593Smuzhiyun 	if (reason & B43legacy_IRQ_TX_OK)
1368*4882a593Smuzhiyun 		handle_irq_transmit_status(dev);
1369*4882a593Smuzhiyun 
1370*4882a593Smuzhiyun 	b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask);
1371*4882a593Smuzhiyun 	spin_unlock_irqrestore(&dev->wl->irq_lock, flags);
1372*4882a593Smuzhiyun }
1373*4882a593Smuzhiyun 
pio_irq_workaround(struct b43legacy_wldev * dev,u16 base,int queueidx)1374*4882a593Smuzhiyun static void pio_irq_workaround(struct b43legacy_wldev *dev,
1375*4882a593Smuzhiyun 			       u16 base, int queueidx)
1376*4882a593Smuzhiyun {
1377*4882a593Smuzhiyun 	u16 rxctl;
1378*4882a593Smuzhiyun 
1379*4882a593Smuzhiyun 	rxctl = b43legacy_read16(dev, base + B43legacy_PIO_RXCTL);
1380*4882a593Smuzhiyun 	if (rxctl & B43legacy_PIO_RXCTL_DATAAVAILABLE)
1381*4882a593Smuzhiyun 		dev->dma_reason[queueidx] |= B43legacy_DMAIRQ_RX_DONE;
1382*4882a593Smuzhiyun 	else
1383*4882a593Smuzhiyun 		dev->dma_reason[queueidx] &= ~B43legacy_DMAIRQ_RX_DONE;
1384*4882a593Smuzhiyun }
1385*4882a593Smuzhiyun 
b43legacy_interrupt_ack(struct b43legacy_wldev * dev,u32 reason)1386*4882a593Smuzhiyun static void b43legacy_interrupt_ack(struct b43legacy_wldev *dev, u32 reason)
1387*4882a593Smuzhiyun {
1388*4882a593Smuzhiyun 	if (b43legacy_using_pio(dev) &&
1389*4882a593Smuzhiyun 	    (dev->dev->id.revision < 3) &&
1390*4882a593Smuzhiyun 	    (!(reason & B43legacy_IRQ_PIO_WORKAROUND))) {
1391*4882a593Smuzhiyun 		/* Apply a PIO specific workaround to the dma_reasons */
1392*4882a593Smuzhiyun 		pio_irq_workaround(dev, B43legacy_MMIO_PIO1_BASE, 0);
1393*4882a593Smuzhiyun 		pio_irq_workaround(dev, B43legacy_MMIO_PIO2_BASE, 1);
1394*4882a593Smuzhiyun 		pio_irq_workaround(dev, B43legacy_MMIO_PIO3_BASE, 2);
1395*4882a593Smuzhiyun 		pio_irq_workaround(dev, B43legacy_MMIO_PIO4_BASE, 3);
1396*4882a593Smuzhiyun 	}
1397*4882a593Smuzhiyun 
1398*4882a593Smuzhiyun 	b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, reason);
1399*4882a593Smuzhiyun 
1400*4882a593Smuzhiyun 	b43legacy_write32(dev, B43legacy_MMIO_DMA0_REASON,
1401*4882a593Smuzhiyun 			  dev->dma_reason[0]);
1402*4882a593Smuzhiyun 	b43legacy_write32(dev, B43legacy_MMIO_DMA1_REASON,
1403*4882a593Smuzhiyun 			  dev->dma_reason[1]);
1404*4882a593Smuzhiyun 	b43legacy_write32(dev, B43legacy_MMIO_DMA2_REASON,
1405*4882a593Smuzhiyun 			  dev->dma_reason[2]);
1406*4882a593Smuzhiyun 	b43legacy_write32(dev, B43legacy_MMIO_DMA3_REASON,
1407*4882a593Smuzhiyun 			  dev->dma_reason[3]);
1408*4882a593Smuzhiyun 	b43legacy_write32(dev, B43legacy_MMIO_DMA4_REASON,
1409*4882a593Smuzhiyun 			  dev->dma_reason[4]);
1410*4882a593Smuzhiyun 	b43legacy_write32(dev, B43legacy_MMIO_DMA5_REASON,
1411*4882a593Smuzhiyun 			  dev->dma_reason[5]);
1412*4882a593Smuzhiyun }
1413*4882a593Smuzhiyun 
1414*4882a593Smuzhiyun /* Interrupt handler top-half */
b43legacy_interrupt_handler(int irq,void * dev_id)1415*4882a593Smuzhiyun static irqreturn_t b43legacy_interrupt_handler(int irq, void *dev_id)
1416*4882a593Smuzhiyun {
1417*4882a593Smuzhiyun 	irqreturn_t ret = IRQ_NONE;
1418*4882a593Smuzhiyun 	struct b43legacy_wldev *dev = dev_id;
1419*4882a593Smuzhiyun 	u32 reason;
1420*4882a593Smuzhiyun 
1421*4882a593Smuzhiyun 	B43legacy_WARN_ON(!dev);
1422*4882a593Smuzhiyun 
1423*4882a593Smuzhiyun 	spin_lock(&dev->wl->irq_lock);
1424*4882a593Smuzhiyun 
1425*4882a593Smuzhiyun 	if (unlikely(b43legacy_status(dev) < B43legacy_STAT_STARTED))
1426*4882a593Smuzhiyun 		/* This can only happen on shared IRQ lines. */
1427*4882a593Smuzhiyun 		goto out;
1428*4882a593Smuzhiyun 	reason = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1429*4882a593Smuzhiyun 	if (reason == 0xffffffff) /* shared IRQ */
1430*4882a593Smuzhiyun 		goto out;
1431*4882a593Smuzhiyun 	ret = IRQ_HANDLED;
1432*4882a593Smuzhiyun 	reason &= dev->irq_mask;
1433*4882a593Smuzhiyun 	if (!reason)
1434*4882a593Smuzhiyun 		goto out;
1435*4882a593Smuzhiyun 
1436*4882a593Smuzhiyun 	dev->dma_reason[0] = b43legacy_read32(dev,
1437*4882a593Smuzhiyun 					      B43legacy_MMIO_DMA0_REASON)
1438*4882a593Smuzhiyun 					      & 0x0001DC00;
1439*4882a593Smuzhiyun 	dev->dma_reason[1] = b43legacy_read32(dev,
1440*4882a593Smuzhiyun 					      B43legacy_MMIO_DMA1_REASON)
1441*4882a593Smuzhiyun 					      & 0x0000DC00;
1442*4882a593Smuzhiyun 	dev->dma_reason[2] = b43legacy_read32(dev,
1443*4882a593Smuzhiyun 					      B43legacy_MMIO_DMA2_REASON)
1444*4882a593Smuzhiyun 					      & 0x0000DC00;
1445*4882a593Smuzhiyun 	dev->dma_reason[3] = b43legacy_read32(dev,
1446*4882a593Smuzhiyun 					      B43legacy_MMIO_DMA3_REASON)
1447*4882a593Smuzhiyun 					      & 0x0001DC00;
1448*4882a593Smuzhiyun 	dev->dma_reason[4] = b43legacy_read32(dev,
1449*4882a593Smuzhiyun 					      B43legacy_MMIO_DMA4_REASON)
1450*4882a593Smuzhiyun 					      & 0x0000DC00;
1451*4882a593Smuzhiyun 	dev->dma_reason[5] = b43legacy_read32(dev,
1452*4882a593Smuzhiyun 					      B43legacy_MMIO_DMA5_REASON)
1453*4882a593Smuzhiyun 					      & 0x0000DC00;
1454*4882a593Smuzhiyun 
1455*4882a593Smuzhiyun 	b43legacy_interrupt_ack(dev, reason);
1456*4882a593Smuzhiyun 	/* Disable all IRQs. They are enabled again in the bottom half. */
1457*4882a593Smuzhiyun 	b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
1458*4882a593Smuzhiyun 	/* Save the reason code and call our bottom half. */
1459*4882a593Smuzhiyun 	dev->irq_reason = reason;
1460*4882a593Smuzhiyun 	tasklet_schedule(&dev->isr_tasklet);
1461*4882a593Smuzhiyun out:
1462*4882a593Smuzhiyun 	spin_unlock(&dev->wl->irq_lock);
1463*4882a593Smuzhiyun 
1464*4882a593Smuzhiyun 	return ret;
1465*4882a593Smuzhiyun }
1466*4882a593Smuzhiyun 
b43legacy_release_firmware(struct b43legacy_wldev * dev)1467*4882a593Smuzhiyun static void b43legacy_release_firmware(struct b43legacy_wldev *dev)
1468*4882a593Smuzhiyun {
1469*4882a593Smuzhiyun 	release_firmware(dev->fw.ucode);
1470*4882a593Smuzhiyun 	dev->fw.ucode = NULL;
1471*4882a593Smuzhiyun 	release_firmware(dev->fw.pcm);
1472*4882a593Smuzhiyun 	dev->fw.pcm = NULL;
1473*4882a593Smuzhiyun 	release_firmware(dev->fw.initvals);
1474*4882a593Smuzhiyun 	dev->fw.initvals = NULL;
1475*4882a593Smuzhiyun 	release_firmware(dev->fw.initvals_band);
1476*4882a593Smuzhiyun 	dev->fw.initvals_band = NULL;
1477*4882a593Smuzhiyun }
1478*4882a593Smuzhiyun 
b43legacy_print_fw_helptext(struct b43legacy_wl * wl)1479*4882a593Smuzhiyun static void b43legacy_print_fw_helptext(struct b43legacy_wl *wl)
1480*4882a593Smuzhiyun {
1481*4882a593Smuzhiyun 	b43legacyerr(wl, "You must go to https://wireless.wiki.kernel.org/en/"
1482*4882a593Smuzhiyun 		     "users/Drivers/b43#devicefirmware "
1483*4882a593Smuzhiyun 		     "and download the correct firmware (version 3).\n");
1484*4882a593Smuzhiyun }
1485*4882a593Smuzhiyun 
b43legacy_fw_cb(const struct firmware * firmware,void * context)1486*4882a593Smuzhiyun static void b43legacy_fw_cb(const struct firmware *firmware, void *context)
1487*4882a593Smuzhiyun {
1488*4882a593Smuzhiyun 	struct b43legacy_wldev *dev = context;
1489*4882a593Smuzhiyun 
1490*4882a593Smuzhiyun 	dev->fwp = firmware;
1491*4882a593Smuzhiyun 	complete(&dev->fw_load_complete);
1492*4882a593Smuzhiyun }
1493*4882a593Smuzhiyun 
do_request_fw(struct b43legacy_wldev * dev,const char * name,const struct firmware ** fw,bool async)1494*4882a593Smuzhiyun static int do_request_fw(struct b43legacy_wldev *dev,
1495*4882a593Smuzhiyun 			 const char *name,
1496*4882a593Smuzhiyun 			 const struct firmware **fw, bool async)
1497*4882a593Smuzhiyun {
1498*4882a593Smuzhiyun 	char path[sizeof(modparam_fwpostfix) + 32];
1499*4882a593Smuzhiyun 	struct b43legacy_fw_header *hdr;
1500*4882a593Smuzhiyun 	u32 size;
1501*4882a593Smuzhiyun 	int err;
1502*4882a593Smuzhiyun 
1503*4882a593Smuzhiyun 	if (!name)
1504*4882a593Smuzhiyun 		return 0;
1505*4882a593Smuzhiyun 
1506*4882a593Smuzhiyun 	snprintf(path, ARRAY_SIZE(path),
1507*4882a593Smuzhiyun 		 "b43legacy%s/%s.fw",
1508*4882a593Smuzhiyun 		 modparam_fwpostfix, name);
1509*4882a593Smuzhiyun 	b43legacyinfo(dev->wl, "Loading firmware %s\n", path);
1510*4882a593Smuzhiyun 	if (async) {
1511*4882a593Smuzhiyun 		init_completion(&dev->fw_load_complete);
1512*4882a593Smuzhiyun 		err = request_firmware_nowait(THIS_MODULE, 1, path,
1513*4882a593Smuzhiyun 					      dev->dev->dev, GFP_KERNEL,
1514*4882a593Smuzhiyun 					      dev, b43legacy_fw_cb);
1515*4882a593Smuzhiyun 		if (err) {
1516*4882a593Smuzhiyun 			b43legacyerr(dev->wl, "Unable to load firmware\n");
1517*4882a593Smuzhiyun 			return err;
1518*4882a593Smuzhiyun 		}
1519*4882a593Smuzhiyun 		/* stall here until fw ready */
1520*4882a593Smuzhiyun 		wait_for_completion(&dev->fw_load_complete);
1521*4882a593Smuzhiyun 		if (!dev->fwp)
1522*4882a593Smuzhiyun 			err = -EINVAL;
1523*4882a593Smuzhiyun 		*fw = dev->fwp;
1524*4882a593Smuzhiyun 	} else {
1525*4882a593Smuzhiyun 		err = request_firmware(fw, path, dev->dev->dev);
1526*4882a593Smuzhiyun 	}
1527*4882a593Smuzhiyun 	if (err) {
1528*4882a593Smuzhiyun 		b43legacyerr(dev->wl, "Firmware file \"%s\" not found "
1529*4882a593Smuzhiyun 		       "or load failed.\n", path);
1530*4882a593Smuzhiyun 		return err;
1531*4882a593Smuzhiyun 	}
1532*4882a593Smuzhiyun 	if ((*fw)->size < sizeof(struct b43legacy_fw_header))
1533*4882a593Smuzhiyun 		goto err_format;
1534*4882a593Smuzhiyun 	hdr = (struct b43legacy_fw_header *)((*fw)->data);
1535*4882a593Smuzhiyun 	switch (hdr->type) {
1536*4882a593Smuzhiyun 	case B43legacy_FW_TYPE_UCODE:
1537*4882a593Smuzhiyun 	case B43legacy_FW_TYPE_PCM:
1538*4882a593Smuzhiyun 		size = be32_to_cpu(hdr->size);
1539*4882a593Smuzhiyun 		if (size != (*fw)->size - sizeof(struct b43legacy_fw_header))
1540*4882a593Smuzhiyun 			goto err_format;
1541*4882a593Smuzhiyun 		fallthrough;
1542*4882a593Smuzhiyun 	case B43legacy_FW_TYPE_IV:
1543*4882a593Smuzhiyun 		if (hdr->ver != 1)
1544*4882a593Smuzhiyun 			goto err_format;
1545*4882a593Smuzhiyun 		break;
1546*4882a593Smuzhiyun 	default:
1547*4882a593Smuzhiyun 		goto err_format;
1548*4882a593Smuzhiyun 	}
1549*4882a593Smuzhiyun 
1550*4882a593Smuzhiyun 	return err;
1551*4882a593Smuzhiyun 
1552*4882a593Smuzhiyun err_format:
1553*4882a593Smuzhiyun 	b43legacyerr(dev->wl, "Firmware file \"%s\" format error.\n", path);
1554*4882a593Smuzhiyun 	return -EPROTO;
1555*4882a593Smuzhiyun }
1556*4882a593Smuzhiyun 
1557*4882a593Smuzhiyun static int b43legacy_one_core_attach(struct ssb_device *dev,
1558*4882a593Smuzhiyun 				     struct b43legacy_wl *wl);
1559*4882a593Smuzhiyun static void b43legacy_one_core_detach(struct ssb_device *dev);
1560*4882a593Smuzhiyun 
b43legacy_request_firmware(struct work_struct * work)1561*4882a593Smuzhiyun static void b43legacy_request_firmware(struct work_struct *work)
1562*4882a593Smuzhiyun {
1563*4882a593Smuzhiyun 	struct b43legacy_wl *wl = container_of(work,
1564*4882a593Smuzhiyun 				  struct b43legacy_wl, firmware_load);
1565*4882a593Smuzhiyun 	struct b43legacy_wldev *dev = wl->current_dev;
1566*4882a593Smuzhiyun 	struct b43legacy_firmware *fw = &dev->fw;
1567*4882a593Smuzhiyun 	const u8 rev = dev->dev->id.revision;
1568*4882a593Smuzhiyun 	const char *filename;
1569*4882a593Smuzhiyun 	int err;
1570*4882a593Smuzhiyun 
1571*4882a593Smuzhiyun 	if (!fw->ucode) {
1572*4882a593Smuzhiyun 		if (rev == 2)
1573*4882a593Smuzhiyun 			filename = "ucode2";
1574*4882a593Smuzhiyun 		else if (rev == 4)
1575*4882a593Smuzhiyun 			filename = "ucode4";
1576*4882a593Smuzhiyun 		else
1577*4882a593Smuzhiyun 			filename = "ucode5";
1578*4882a593Smuzhiyun 		err = do_request_fw(dev, filename, &fw->ucode, true);
1579*4882a593Smuzhiyun 		if (err)
1580*4882a593Smuzhiyun 			goto err_load;
1581*4882a593Smuzhiyun 	}
1582*4882a593Smuzhiyun 	if (!fw->pcm) {
1583*4882a593Smuzhiyun 		if (rev < 5)
1584*4882a593Smuzhiyun 			filename = "pcm4";
1585*4882a593Smuzhiyun 		else
1586*4882a593Smuzhiyun 			filename = "pcm5";
1587*4882a593Smuzhiyun 		err = do_request_fw(dev, filename, &fw->pcm, false);
1588*4882a593Smuzhiyun 		if (err)
1589*4882a593Smuzhiyun 			goto err_load;
1590*4882a593Smuzhiyun 	}
1591*4882a593Smuzhiyun 	if (!fw->initvals) {
1592*4882a593Smuzhiyun 		switch (dev->phy.type) {
1593*4882a593Smuzhiyun 		case B43legacy_PHYTYPE_B:
1594*4882a593Smuzhiyun 		case B43legacy_PHYTYPE_G:
1595*4882a593Smuzhiyun 			if ((rev >= 5) && (rev <= 10))
1596*4882a593Smuzhiyun 				filename = "b0g0initvals5";
1597*4882a593Smuzhiyun 			else if (rev == 2 || rev == 4)
1598*4882a593Smuzhiyun 				filename = "b0g0initvals2";
1599*4882a593Smuzhiyun 			else
1600*4882a593Smuzhiyun 				goto err_no_initvals;
1601*4882a593Smuzhiyun 			break;
1602*4882a593Smuzhiyun 		default:
1603*4882a593Smuzhiyun 			goto err_no_initvals;
1604*4882a593Smuzhiyun 		}
1605*4882a593Smuzhiyun 		err = do_request_fw(dev, filename, &fw->initvals, false);
1606*4882a593Smuzhiyun 		if (err)
1607*4882a593Smuzhiyun 			goto err_load;
1608*4882a593Smuzhiyun 	}
1609*4882a593Smuzhiyun 	if (!fw->initvals_band) {
1610*4882a593Smuzhiyun 		switch (dev->phy.type) {
1611*4882a593Smuzhiyun 		case B43legacy_PHYTYPE_B:
1612*4882a593Smuzhiyun 		case B43legacy_PHYTYPE_G:
1613*4882a593Smuzhiyun 			if ((rev >= 5) && (rev <= 10))
1614*4882a593Smuzhiyun 				filename = "b0g0bsinitvals5";
1615*4882a593Smuzhiyun 			else if (rev >= 11)
1616*4882a593Smuzhiyun 				filename = NULL;
1617*4882a593Smuzhiyun 			else if (rev == 2 || rev == 4)
1618*4882a593Smuzhiyun 				filename = NULL;
1619*4882a593Smuzhiyun 			else
1620*4882a593Smuzhiyun 				goto err_no_initvals;
1621*4882a593Smuzhiyun 			break;
1622*4882a593Smuzhiyun 		default:
1623*4882a593Smuzhiyun 			goto err_no_initvals;
1624*4882a593Smuzhiyun 		}
1625*4882a593Smuzhiyun 		err = do_request_fw(dev, filename, &fw->initvals_band, false);
1626*4882a593Smuzhiyun 		if (err)
1627*4882a593Smuzhiyun 			goto err_load;
1628*4882a593Smuzhiyun 	}
1629*4882a593Smuzhiyun 	err = ieee80211_register_hw(wl->hw);
1630*4882a593Smuzhiyun 	if (err)
1631*4882a593Smuzhiyun 		goto err_one_core_detach;
1632*4882a593Smuzhiyun 	return;
1633*4882a593Smuzhiyun 
1634*4882a593Smuzhiyun err_one_core_detach:
1635*4882a593Smuzhiyun 	b43legacy_one_core_detach(dev->dev);
1636*4882a593Smuzhiyun 	goto error;
1637*4882a593Smuzhiyun 
1638*4882a593Smuzhiyun err_load:
1639*4882a593Smuzhiyun 	b43legacy_print_fw_helptext(dev->wl);
1640*4882a593Smuzhiyun 	goto error;
1641*4882a593Smuzhiyun 
1642*4882a593Smuzhiyun err_no_initvals:
1643*4882a593Smuzhiyun 	err = -ENODEV;
1644*4882a593Smuzhiyun 	b43legacyerr(dev->wl, "No Initial Values firmware file for PHY %u, "
1645*4882a593Smuzhiyun 	       "core rev %u\n", dev->phy.type, rev);
1646*4882a593Smuzhiyun 	goto error;
1647*4882a593Smuzhiyun 
1648*4882a593Smuzhiyun error:
1649*4882a593Smuzhiyun 	b43legacy_release_firmware(dev);
1650*4882a593Smuzhiyun 	return;
1651*4882a593Smuzhiyun }
1652*4882a593Smuzhiyun 
b43legacy_upload_microcode(struct b43legacy_wldev * dev)1653*4882a593Smuzhiyun static int b43legacy_upload_microcode(struct b43legacy_wldev *dev)
1654*4882a593Smuzhiyun {
1655*4882a593Smuzhiyun 	struct wiphy *wiphy = dev->wl->hw->wiphy;
1656*4882a593Smuzhiyun 	const size_t hdr_len = sizeof(struct b43legacy_fw_header);
1657*4882a593Smuzhiyun 	const __be32 *data;
1658*4882a593Smuzhiyun 	unsigned int i;
1659*4882a593Smuzhiyun 	unsigned int len;
1660*4882a593Smuzhiyun 	u16 fwrev;
1661*4882a593Smuzhiyun 	u16 fwpatch;
1662*4882a593Smuzhiyun 	u16 fwdate;
1663*4882a593Smuzhiyun 	u16 fwtime;
1664*4882a593Smuzhiyun 	u32 tmp, macctl;
1665*4882a593Smuzhiyun 	int err = 0;
1666*4882a593Smuzhiyun 
1667*4882a593Smuzhiyun 	/* Jump the microcode PSM to offset 0 */
1668*4882a593Smuzhiyun 	macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1669*4882a593Smuzhiyun 	B43legacy_WARN_ON(macctl & B43legacy_MACCTL_PSM_RUN);
1670*4882a593Smuzhiyun 	macctl |= B43legacy_MACCTL_PSM_JMP0;
1671*4882a593Smuzhiyun 	b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1672*4882a593Smuzhiyun 	/* Zero out all microcode PSM registers and shared memory. */
1673*4882a593Smuzhiyun 	for (i = 0; i < 64; i++)
1674*4882a593Smuzhiyun 		b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, i, 0);
1675*4882a593Smuzhiyun 	for (i = 0; i < 4096; i += 2)
1676*4882a593Smuzhiyun 		b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, i, 0);
1677*4882a593Smuzhiyun 
1678*4882a593Smuzhiyun 	/* Upload Microcode. */
1679*4882a593Smuzhiyun 	data = (__be32 *) (dev->fw.ucode->data + hdr_len);
1680*4882a593Smuzhiyun 	len = (dev->fw.ucode->size - hdr_len) / sizeof(__be32);
1681*4882a593Smuzhiyun 	b43legacy_shm_control_word(dev,
1682*4882a593Smuzhiyun 				   B43legacy_SHM_UCODE |
1683*4882a593Smuzhiyun 				   B43legacy_SHM_AUTOINC_W,
1684*4882a593Smuzhiyun 				   0x0000);
1685*4882a593Smuzhiyun 	for (i = 0; i < len; i++) {
1686*4882a593Smuzhiyun 		b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA,
1687*4882a593Smuzhiyun 				    be32_to_cpu(data[i]));
1688*4882a593Smuzhiyun 		udelay(10);
1689*4882a593Smuzhiyun 	}
1690*4882a593Smuzhiyun 
1691*4882a593Smuzhiyun 	if (dev->fw.pcm) {
1692*4882a593Smuzhiyun 		/* Upload PCM data. */
1693*4882a593Smuzhiyun 		data = (__be32 *) (dev->fw.pcm->data + hdr_len);
1694*4882a593Smuzhiyun 		len = (dev->fw.pcm->size - hdr_len) / sizeof(__be32);
1695*4882a593Smuzhiyun 		b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EA);
1696*4882a593Smuzhiyun 		b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, 0x00004000);
1697*4882a593Smuzhiyun 		/* No need for autoinc bit in SHM_HW */
1698*4882a593Smuzhiyun 		b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EB);
1699*4882a593Smuzhiyun 		for (i = 0; i < len; i++) {
1700*4882a593Smuzhiyun 			b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA,
1701*4882a593Smuzhiyun 					  be32_to_cpu(data[i]));
1702*4882a593Smuzhiyun 			udelay(10);
1703*4882a593Smuzhiyun 		}
1704*4882a593Smuzhiyun 	}
1705*4882a593Smuzhiyun 
1706*4882a593Smuzhiyun 	b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1707*4882a593Smuzhiyun 			  B43legacy_IRQ_ALL);
1708*4882a593Smuzhiyun 
1709*4882a593Smuzhiyun 	/* Start the microcode PSM */
1710*4882a593Smuzhiyun 	macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1711*4882a593Smuzhiyun 	macctl &= ~B43legacy_MACCTL_PSM_JMP0;
1712*4882a593Smuzhiyun 	macctl |= B43legacy_MACCTL_PSM_RUN;
1713*4882a593Smuzhiyun 	b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1714*4882a593Smuzhiyun 
1715*4882a593Smuzhiyun 	/* Wait for the microcode to load and respond */
1716*4882a593Smuzhiyun 	i = 0;
1717*4882a593Smuzhiyun 	while (1) {
1718*4882a593Smuzhiyun 		tmp = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1719*4882a593Smuzhiyun 		if (tmp == B43legacy_IRQ_MAC_SUSPENDED)
1720*4882a593Smuzhiyun 			break;
1721*4882a593Smuzhiyun 		i++;
1722*4882a593Smuzhiyun 		if (i >= B43legacy_IRQWAIT_MAX_RETRIES) {
1723*4882a593Smuzhiyun 			b43legacyerr(dev->wl, "Microcode not responding\n");
1724*4882a593Smuzhiyun 			b43legacy_print_fw_helptext(dev->wl);
1725*4882a593Smuzhiyun 			err = -ENODEV;
1726*4882a593Smuzhiyun 			goto error;
1727*4882a593Smuzhiyun 		}
1728*4882a593Smuzhiyun 		msleep_interruptible(50);
1729*4882a593Smuzhiyun 		if (signal_pending(current)) {
1730*4882a593Smuzhiyun 			err = -EINTR;
1731*4882a593Smuzhiyun 			goto error;
1732*4882a593Smuzhiyun 		}
1733*4882a593Smuzhiyun 	}
1734*4882a593Smuzhiyun 	/* dummy read follows */
1735*4882a593Smuzhiyun 	b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1736*4882a593Smuzhiyun 
1737*4882a593Smuzhiyun 	/* Get and check the revisions. */
1738*4882a593Smuzhiyun 	fwrev = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1739*4882a593Smuzhiyun 				     B43legacy_SHM_SH_UCODEREV);
1740*4882a593Smuzhiyun 	fwpatch = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1741*4882a593Smuzhiyun 				       B43legacy_SHM_SH_UCODEPATCH);
1742*4882a593Smuzhiyun 	fwdate = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1743*4882a593Smuzhiyun 				      B43legacy_SHM_SH_UCODEDATE);
1744*4882a593Smuzhiyun 	fwtime = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
1745*4882a593Smuzhiyun 				      B43legacy_SHM_SH_UCODETIME);
1746*4882a593Smuzhiyun 
1747*4882a593Smuzhiyun 	if (fwrev > 0x128) {
1748*4882a593Smuzhiyun 		b43legacyerr(dev->wl, "YOU ARE TRYING TO LOAD V4 FIRMWARE."
1749*4882a593Smuzhiyun 			     " Only firmware from binary drivers version 3.x"
1750*4882a593Smuzhiyun 			     " is supported. You must change your firmware"
1751*4882a593Smuzhiyun 			     " files.\n");
1752*4882a593Smuzhiyun 		b43legacy_print_fw_helptext(dev->wl);
1753*4882a593Smuzhiyun 		err = -EOPNOTSUPP;
1754*4882a593Smuzhiyun 		goto error;
1755*4882a593Smuzhiyun 	}
1756*4882a593Smuzhiyun 	b43legacyinfo(dev->wl, "Loading firmware version 0x%X, patch level %u "
1757*4882a593Smuzhiyun 		      "(20%.2i-%.2i-%.2i %.2i:%.2i:%.2i)\n", fwrev, fwpatch,
1758*4882a593Smuzhiyun 		      (fwdate >> 12) & 0xF, (fwdate >> 8) & 0xF, fwdate & 0xFF,
1759*4882a593Smuzhiyun 		      (fwtime >> 11) & 0x1F, (fwtime >> 5) & 0x3F,
1760*4882a593Smuzhiyun 		      fwtime & 0x1F);
1761*4882a593Smuzhiyun 
1762*4882a593Smuzhiyun 	dev->fw.rev = fwrev;
1763*4882a593Smuzhiyun 	dev->fw.patch = fwpatch;
1764*4882a593Smuzhiyun 
1765*4882a593Smuzhiyun 	snprintf(wiphy->fw_version, sizeof(wiphy->fw_version), "%u.%u",
1766*4882a593Smuzhiyun 			dev->fw.rev, dev->fw.patch);
1767*4882a593Smuzhiyun 	wiphy->hw_version = dev->dev->id.coreid;
1768*4882a593Smuzhiyun 
1769*4882a593Smuzhiyun 	return 0;
1770*4882a593Smuzhiyun 
1771*4882a593Smuzhiyun error:
1772*4882a593Smuzhiyun 	macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1773*4882a593Smuzhiyun 	macctl &= ~B43legacy_MACCTL_PSM_RUN;
1774*4882a593Smuzhiyun 	macctl |= B43legacy_MACCTL_PSM_JMP0;
1775*4882a593Smuzhiyun 	b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1776*4882a593Smuzhiyun 
1777*4882a593Smuzhiyun 	return err;
1778*4882a593Smuzhiyun }
1779*4882a593Smuzhiyun 
b43legacy_write_initvals(struct b43legacy_wldev * dev,const struct b43legacy_iv * ivals,size_t count,size_t array_size)1780*4882a593Smuzhiyun static int b43legacy_write_initvals(struct b43legacy_wldev *dev,
1781*4882a593Smuzhiyun 				    const struct b43legacy_iv *ivals,
1782*4882a593Smuzhiyun 				    size_t count,
1783*4882a593Smuzhiyun 				    size_t array_size)
1784*4882a593Smuzhiyun {
1785*4882a593Smuzhiyun 	const struct b43legacy_iv *iv;
1786*4882a593Smuzhiyun 	u16 offset;
1787*4882a593Smuzhiyun 	size_t i;
1788*4882a593Smuzhiyun 	bool bit32;
1789*4882a593Smuzhiyun 
1790*4882a593Smuzhiyun 	BUILD_BUG_ON(sizeof(struct b43legacy_iv) != 6);
1791*4882a593Smuzhiyun 	iv = ivals;
1792*4882a593Smuzhiyun 	for (i = 0; i < count; i++) {
1793*4882a593Smuzhiyun 		if (array_size < sizeof(iv->offset_size))
1794*4882a593Smuzhiyun 			goto err_format;
1795*4882a593Smuzhiyun 		array_size -= sizeof(iv->offset_size);
1796*4882a593Smuzhiyun 		offset = be16_to_cpu(iv->offset_size);
1797*4882a593Smuzhiyun 		bit32 = !!(offset & B43legacy_IV_32BIT);
1798*4882a593Smuzhiyun 		offset &= B43legacy_IV_OFFSET_MASK;
1799*4882a593Smuzhiyun 		if (offset >= 0x1000)
1800*4882a593Smuzhiyun 			goto err_format;
1801*4882a593Smuzhiyun 		if (bit32) {
1802*4882a593Smuzhiyun 			u32 value;
1803*4882a593Smuzhiyun 
1804*4882a593Smuzhiyun 			if (array_size < sizeof(iv->data.d32))
1805*4882a593Smuzhiyun 				goto err_format;
1806*4882a593Smuzhiyun 			array_size -= sizeof(iv->data.d32);
1807*4882a593Smuzhiyun 
1808*4882a593Smuzhiyun 			value = get_unaligned_be32(&iv->data.d32);
1809*4882a593Smuzhiyun 			b43legacy_write32(dev, offset, value);
1810*4882a593Smuzhiyun 
1811*4882a593Smuzhiyun 			iv = (const struct b43legacy_iv *)((const uint8_t *)iv +
1812*4882a593Smuzhiyun 							sizeof(__be16) +
1813*4882a593Smuzhiyun 							sizeof(__be32));
1814*4882a593Smuzhiyun 		} else {
1815*4882a593Smuzhiyun 			u16 value;
1816*4882a593Smuzhiyun 
1817*4882a593Smuzhiyun 			if (array_size < sizeof(iv->data.d16))
1818*4882a593Smuzhiyun 				goto err_format;
1819*4882a593Smuzhiyun 			array_size -= sizeof(iv->data.d16);
1820*4882a593Smuzhiyun 
1821*4882a593Smuzhiyun 			value = be16_to_cpu(iv->data.d16);
1822*4882a593Smuzhiyun 			b43legacy_write16(dev, offset, value);
1823*4882a593Smuzhiyun 
1824*4882a593Smuzhiyun 			iv = (const struct b43legacy_iv *)((const uint8_t *)iv +
1825*4882a593Smuzhiyun 							sizeof(__be16) +
1826*4882a593Smuzhiyun 							sizeof(__be16));
1827*4882a593Smuzhiyun 		}
1828*4882a593Smuzhiyun 	}
1829*4882a593Smuzhiyun 	if (array_size)
1830*4882a593Smuzhiyun 		goto err_format;
1831*4882a593Smuzhiyun 
1832*4882a593Smuzhiyun 	return 0;
1833*4882a593Smuzhiyun 
1834*4882a593Smuzhiyun err_format:
1835*4882a593Smuzhiyun 	b43legacyerr(dev->wl, "Initial Values Firmware file-format error.\n");
1836*4882a593Smuzhiyun 	b43legacy_print_fw_helptext(dev->wl);
1837*4882a593Smuzhiyun 
1838*4882a593Smuzhiyun 	return -EPROTO;
1839*4882a593Smuzhiyun }
1840*4882a593Smuzhiyun 
b43legacy_upload_initvals(struct b43legacy_wldev * dev)1841*4882a593Smuzhiyun static int b43legacy_upload_initvals(struct b43legacy_wldev *dev)
1842*4882a593Smuzhiyun {
1843*4882a593Smuzhiyun 	const size_t hdr_len = sizeof(struct b43legacy_fw_header);
1844*4882a593Smuzhiyun 	const struct b43legacy_fw_header *hdr;
1845*4882a593Smuzhiyun 	struct b43legacy_firmware *fw = &dev->fw;
1846*4882a593Smuzhiyun 	const struct b43legacy_iv *ivals;
1847*4882a593Smuzhiyun 	size_t count;
1848*4882a593Smuzhiyun 	int err;
1849*4882a593Smuzhiyun 
1850*4882a593Smuzhiyun 	hdr = (const struct b43legacy_fw_header *)(fw->initvals->data);
1851*4882a593Smuzhiyun 	ivals = (const struct b43legacy_iv *)(fw->initvals->data + hdr_len);
1852*4882a593Smuzhiyun 	count = be32_to_cpu(hdr->size);
1853*4882a593Smuzhiyun 	err = b43legacy_write_initvals(dev, ivals, count,
1854*4882a593Smuzhiyun 				 fw->initvals->size - hdr_len);
1855*4882a593Smuzhiyun 	if (err)
1856*4882a593Smuzhiyun 		goto out;
1857*4882a593Smuzhiyun 	if (fw->initvals_band) {
1858*4882a593Smuzhiyun 		hdr = (const struct b43legacy_fw_header *)
1859*4882a593Smuzhiyun 		      (fw->initvals_band->data);
1860*4882a593Smuzhiyun 		ivals = (const struct b43legacy_iv *)(fw->initvals_band->data
1861*4882a593Smuzhiyun 			+ hdr_len);
1862*4882a593Smuzhiyun 		count = be32_to_cpu(hdr->size);
1863*4882a593Smuzhiyun 		err = b43legacy_write_initvals(dev, ivals, count,
1864*4882a593Smuzhiyun 					 fw->initvals_band->size - hdr_len);
1865*4882a593Smuzhiyun 		if (err)
1866*4882a593Smuzhiyun 			goto out;
1867*4882a593Smuzhiyun 	}
1868*4882a593Smuzhiyun out:
1869*4882a593Smuzhiyun 
1870*4882a593Smuzhiyun 	return err;
1871*4882a593Smuzhiyun }
1872*4882a593Smuzhiyun 
1873*4882a593Smuzhiyun /* Initialize the GPIOs
1874*4882a593Smuzhiyun  * https://bcm-specs.sipsolutions.net/GPIO
1875*4882a593Smuzhiyun  */
b43legacy_gpio_init(struct b43legacy_wldev * dev)1876*4882a593Smuzhiyun static int b43legacy_gpio_init(struct b43legacy_wldev *dev)
1877*4882a593Smuzhiyun {
1878*4882a593Smuzhiyun 	struct ssb_bus *bus = dev->dev->bus;
1879*4882a593Smuzhiyun 	struct ssb_device *gpiodev, *pcidev = NULL;
1880*4882a593Smuzhiyun 	u32 mask;
1881*4882a593Smuzhiyun 	u32 set;
1882*4882a593Smuzhiyun 
1883*4882a593Smuzhiyun 	b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
1884*4882a593Smuzhiyun 			  b43legacy_read32(dev,
1885*4882a593Smuzhiyun 			  B43legacy_MMIO_MACCTL)
1886*4882a593Smuzhiyun 			  & 0xFFFF3FFF);
1887*4882a593Smuzhiyun 
1888*4882a593Smuzhiyun 	b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK,
1889*4882a593Smuzhiyun 			  b43legacy_read16(dev,
1890*4882a593Smuzhiyun 			  B43legacy_MMIO_GPIO_MASK)
1891*4882a593Smuzhiyun 			  | 0x000F);
1892*4882a593Smuzhiyun 
1893*4882a593Smuzhiyun 	mask = 0x0000001F;
1894*4882a593Smuzhiyun 	set = 0x0000000F;
1895*4882a593Smuzhiyun 	if (dev->dev->bus->chip_id == 0x4301) {
1896*4882a593Smuzhiyun 		mask |= 0x0060;
1897*4882a593Smuzhiyun 		set |= 0x0060;
1898*4882a593Smuzhiyun 	}
1899*4882a593Smuzhiyun 	if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_PACTRL) {
1900*4882a593Smuzhiyun 		b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK,
1901*4882a593Smuzhiyun 				  b43legacy_read16(dev,
1902*4882a593Smuzhiyun 				  B43legacy_MMIO_GPIO_MASK)
1903*4882a593Smuzhiyun 				  | 0x0200);
1904*4882a593Smuzhiyun 		mask |= 0x0200;
1905*4882a593Smuzhiyun 		set |= 0x0200;
1906*4882a593Smuzhiyun 	}
1907*4882a593Smuzhiyun 	if (dev->dev->id.revision >= 2)
1908*4882a593Smuzhiyun 		mask  |= 0x0010; /* FIXME: This is redundant. */
1909*4882a593Smuzhiyun 
1910*4882a593Smuzhiyun #ifdef CONFIG_SSB_DRIVER_PCICORE
1911*4882a593Smuzhiyun 	pcidev = bus->pcicore.dev;
1912*4882a593Smuzhiyun #endif
1913*4882a593Smuzhiyun 	gpiodev = bus->chipco.dev ? : pcidev;
1914*4882a593Smuzhiyun 	if (!gpiodev)
1915*4882a593Smuzhiyun 		return 0;
1916*4882a593Smuzhiyun 	ssb_write32(gpiodev, B43legacy_GPIO_CONTROL,
1917*4882a593Smuzhiyun 		    (ssb_read32(gpiodev, B43legacy_GPIO_CONTROL)
1918*4882a593Smuzhiyun 		     & ~mask) | set);
1919*4882a593Smuzhiyun 
1920*4882a593Smuzhiyun 	return 0;
1921*4882a593Smuzhiyun }
1922*4882a593Smuzhiyun 
1923*4882a593Smuzhiyun /* Turn off all GPIO stuff. Call this on module unload, for example. */
b43legacy_gpio_cleanup(struct b43legacy_wldev * dev)1924*4882a593Smuzhiyun static void b43legacy_gpio_cleanup(struct b43legacy_wldev *dev)
1925*4882a593Smuzhiyun {
1926*4882a593Smuzhiyun 	struct ssb_bus *bus = dev->dev->bus;
1927*4882a593Smuzhiyun 	struct ssb_device *gpiodev, *pcidev = NULL;
1928*4882a593Smuzhiyun 
1929*4882a593Smuzhiyun #ifdef CONFIG_SSB_DRIVER_PCICORE
1930*4882a593Smuzhiyun 	pcidev = bus->pcicore.dev;
1931*4882a593Smuzhiyun #endif
1932*4882a593Smuzhiyun 	gpiodev = bus->chipco.dev ? : pcidev;
1933*4882a593Smuzhiyun 	if (!gpiodev)
1934*4882a593Smuzhiyun 		return;
1935*4882a593Smuzhiyun 	ssb_write32(gpiodev, B43legacy_GPIO_CONTROL, 0);
1936*4882a593Smuzhiyun }
1937*4882a593Smuzhiyun 
1938*4882a593Smuzhiyun /* http://bcm-specs.sipsolutions.net/EnableMac */
b43legacy_mac_enable(struct b43legacy_wldev * dev)1939*4882a593Smuzhiyun void b43legacy_mac_enable(struct b43legacy_wldev *dev)
1940*4882a593Smuzhiyun {
1941*4882a593Smuzhiyun 	dev->mac_suspended--;
1942*4882a593Smuzhiyun 	B43legacy_WARN_ON(dev->mac_suspended < 0);
1943*4882a593Smuzhiyun 	B43legacy_WARN_ON(irqs_disabled());
1944*4882a593Smuzhiyun 	if (dev->mac_suspended == 0) {
1945*4882a593Smuzhiyun 		b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
1946*4882a593Smuzhiyun 				  b43legacy_read32(dev,
1947*4882a593Smuzhiyun 				  B43legacy_MMIO_MACCTL)
1948*4882a593Smuzhiyun 				  | B43legacy_MACCTL_ENABLED);
1949*4882a593Smuzhiyun 		b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1950*4882a593Smuzhiyun 				  B43legacy_IRQ_MAC_SUSPENDED);
1951*4882a593Smuzhiyun 		/* the next two are dummy reads */
1952*4882a593Smuzhiyun 		b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1953*4882a593Smuzhiyun 		b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1954*4882a593Smuzhiyun 		b43legacy_power_saving_ctl_bits(dev, -1, -1);
1955*4882a593Smuzhiyun 
1956*4882a593Smuzhiyun 		/* Re-enable IRQs. */
1957*4882a593Smuzhiyun 		spin_lock_irq(&dev->wl->irq_lock);
1958*4882a593Smuzhiyun 		b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK,
1959*4882a593Smuzhiyun 				  dev->irq_mask);
1960*4882a593Smuzhiyun 		spin_unlock_irq(&dev->wl->irq_lock);
1961*4882a593Smuzhiyun 	}
1962*4882a593Smuzhiyun }
1963*4882a593Smuzhiyun 
1964*4882a593Smuzhiyun /* https://bcm-specs.sipsolutions.net/SuspendMAC */
b43legacy_mac_suspend(struct b43legacy_wldev * dev)1965*4882a593Smuzhiyun void b43legacy_mac_suspend(struct b43legacy_wldev *dev)
1966*4882a593Smuzhiyun {
1967*4882a593Smuzhiyun 	int i;
1968*4882a593Smuzhiyun 	u32 tmp;
1969*4882a593Smuzhiyun 
1970*4882a593Smuzhiyun 	might_sleep();
1971*4882a593Smuzhiyun 	B43legacy_WARN_ON(irqs_disabled());
1972*4882a593Smuzhiyun 	B43legacy_WARN_ON(dev->mac_suspended < 0);
1973*4882a593Smuzhiyun 
1974*4882a593Smuzhiyun 	if (dev->mac_suspended == 0) {
1975*4882a593Smuzhiyun 		/* Mask IRQs before suspending MAC. Otherwise
1976*4882a593Smuzhiyun 		 * the MAC stays busy and won't suspend. */
1977*4882a593Smuzhiyun 		spin_lock_irq(&dev->wl->irq_lock);
1978*4882a593Smuzhiyun 		b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
1979*4882a593Smuzhiyun 		spin_unlock_irq(&dev->wl->irq_lock);
1980*4882a593Smuzhiyun 		b43legacy_synchronize_irq(dev);
1981*4882a593Smuzhiyun 
1982*4882a593Smuzhiyun 		b43legacy_power_saving_ctl_bits(dev, -1, 1);
1983*4882a593Smuzhiyun 		b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
1984*4882a593Smuzhiyun 				  b43legacy_read32(dev,
1985*4882a593Smuzhiyun 				  B43legacy_MMIO_MACCTL)
1986*4882a593Smuzhiyun 				  & ~B43legacy_MACCTL_ENABLED);
1987*4882a593Smuzhiyun 		b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1988*4882a593Smuzhiyun 		for (i = 40; i; i--) {
1989*4882a593Smuzhiyun 			tmp = b43legacy_read32(dev,
1990*4882a593Smuzhiyun 					       B43legacy_MMIO_GEN_IRQ_REASON);
1991*4882a593Smuzhiyun 			if (tmp & B43legacy_IRQ_MAC_SUSPENDED)
1992*4882a593Smuzhiyun 				goto out;
1993*4882a593Smuzhiyun 			msleep(1);
1994*4882a593Smuzhiyun 		}
1995*4882a593Smuzhiyun 		b43legacyerr(dev->wl, "MAC suspend failed\n");
1996*4882a593Smuzhiyun 	}
1997*4882a593Smuzhiyun out:
1998*4882a593Smuzhiyun 	dev->mac_suspended++;
1999*4882a593Smuzhiyun }
2000*4882a593Smuzhiyun 
b43legacy_adjust_opmode(struct b43legacy_wldev * dev)2001*4882a593Smuzhiyun static void b43legacy_adjust_opmode(struct b43legacy_wldev *dev)
2002*4882a593Smuzhiyun {
2003*4882a593Smuzhiyun 	struct b43legacy_wl *wl = dev->wl;
2004*4882a593Smuzhiyun 	u32 ctl;
2005*4882a593Smuzhiyun 	u16 cfp_pretbtt;
2006*4882a593Smuzhiyun 
2007*4882a593Smuzhiyun 	ctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2008*4882a593Smuzhiyun 	/* Reset status to STA infrastructure mode. */
2009*4882a593Smuzhiyun 	ctl &= ~B43legacy_MACCTL_AP;
2010*4882a593Smuzhiyun 	ctl &= ~B43legacy_MACCTL_KEEP_CTL;
2011*4882a593Smuzhiyun 	ctl &= ~B43legacy_MACCTL_KEEP_BADPLCP;
2012*4882a593Smuzhiyun 	ctl &= ~B43legacy_MACCTL_KEEP_BAD;
2013*4882a593Smuzhiyun 	ctl &= ~B43legacy_MACCTL_PROMISC;
2014*4882a593Smuzhiyun 	ctl &= ~B43legacy_MACCTL_BEACPROMISC;
2015*4882a593Smuzhiyun 	ctl |= B43legacy_MACCTL_INFRA;
2016*4882a593Smuzhiyun 
2017*4882a593Smuzhiyun 	if (b43legacy_is_mode(wl, NL80211_IFTYPE_AP))
2018*4882a593Smuzhiyun 		ctl |= B43legacy_MACCTL_AP;
2019*4882a593Smuzhiyun 	else if (b43legacy_is_mode(wl, NL80211_IFTYPE_ADHOC))
2020*4882a593Smuzhiyun 		ctl &= ~B43legacy_MACCTL_INFRA;
2021*4882a593Smuzhiyun 
2022*4882a593Smuzhiyun 	if (wl->filter_flags & FIF_CONTROL)
2023*4882a593Smuzhiyun 		ctl |= B43legacy_MACCTL_KEEP_CTL;
2024*4882a593Smuzhiyun 	if (wl->filter_flags & FIF_FCSFAIL)
2025*4882a593Smuzhiyun 		ctl |= B43legacy_MACCTL_KEEP_BAD;
2026*4882a593Smuzhiyun 	if (wl->filter_flags & FIF_PLCPFAIL)
2027*4882a593Smuzhiyun 		ctl |= B43legacy_MACCTL_KEEP_BADPLCP;
2028*4882a593Smuzhiyun 	if (wl->filter_flags & FIF_BCN_PRBRESP_PROMISC)
2029*4882a593Smuzhiyun 		ctl |= B43legacy_MACCTL_BEACPROMISC;
2030*4882a593Smuzhiyun 
2031*4882a593Smuzhiyun 	/* Workaround: On old hardware the HW-MAC-address-filter
2032*4882a593Smuzhiyun 	 * doesn't work properly, so always run promisc in filter
2033*4882a593Smuzhiyun 	 * it in software. */
2034*4882a593Smuzhiyun 	if (dev->dev->id.revision <= 4)
2035*4882a593Smuzhiyun 		ctl |= B43legacy_MACCTL_PROMISC;
2036*4882a593Smuzhiyun 
2037*4882a593Smuzhiyun 	b43legacy_write32(dev, B43legacy_MMIO_MACCTL, ctl);
2038*4882a593Smuzhiyun 
2039*4882a593Smuzhiyun 	cfp_pretbtt = 2;
2040*4882a593Smuzhiyun 	if ((ctl & B43legacy_MACCTL_INFRA) &&
2041*4882a593Smuzhiyun 	    !(ctl & B43legacy_MACCTL_AP)) {
2042*4882a593Smuzhiyun 		if (dev->dev->bus->chip_id == 0x4306 &&
2043*4882a593Smuzhiyun 		    dev->dev->bus->chip_rev == 3)
2044*4882a593Smuzhiyun 			cfp_pretbtt = 100;
2045*4882a593Smuzhiyun 		else
2046*4882a593Smuzhiyun 			cfp_pretbtt = 50;
2047*4882a593Smuzhiyun 	}
2048*4882a593Smuzhiyun 	b43legacy_write16(dev, 0x612, cfp_pretbtt);
2049*4882a593Smuzhiyun }
2050*4882a593Smuzhiyun 
b43legacy_rate_memory_write(struct b43legacy_wldev * dev,u16 rate,int is_ofdm)2051*4882a593Smuzhiyun static void b43legacy_rate_memory_write(struct b43legacy_wldev *dev,
2052*4882a593Smuzhiyun 					u16 rate,
2053*4882a593Smuzhiyun 					int is_ofdm)
2054*4882a593Smuzhiyun {
2055*4882a593Smuzhiyun 	u16 offset;
2056*4882a593Smuzhiyun 
2057*4882a593Smuzhiyun 	if (is_ofdm) {
2058*4882a593Smuzhiyun 		offset = 0x480;
2059*4882a593Smuzhiyun 		offset += (b43legacy_plcp_get_ratecode_ofdm(rate) & 0x000F) * 2;
2060*4882a593Smuzhiyun 	} else {
2061*4882a593Smuzhiyun 		offset = 0x4C0;
2062*4882a593Smuzhiyun 		offset += (b43legacy_plcp_get_ratecode_cck(rate) & 0x000F) * 2;
2063*4882a593Smuzhiyun 	}
2064*4882a593Smuzhiyun 	b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, offset + 0x20,
2065*4882a593Smuzhiyun 			      b43legacy_shm_read16(dev,
2066*4882a593Smuzhiyun 			      B43legacy_SHM_SHARED, offset));
2067*4882a593Smuzhiyun }
2068*4882a593Smuzhiyun 
b43legacy_rate_memory_init(struct b43legacy_wldev * dev)2069*4882a593Smuzhiyun static void b43legacy_rate_memory_init(struct b43legacy_wldev *dev)
2070*4882a593Smuzhiyun {
2071*4882a593Smuzhiyun 	switch (dev->phy.type) {
2072*4882a593Smuzhiyun 	case B43legacy_PHYTYPE_G:
2073*4882a593Smuzhiyun 		b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_6MB, 1);
2074*4882a593Smuzhiyun 		b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_12MB, 1);
2075*4882a593Smuzhiyun 		b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_18MB, 1);
2076*4882a593Smuzhiyun 		b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_24MB, 1);
2077*4882a593Smuzhiyun 		b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_36MB, 1);
2078*4882a593Smuzhiyun 		b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_48MB, 1);
2079*4882a593Smuzhiyun 		b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_54MB, 1);
2080*4882a593Smuzhiyun 		fallthrough;
2081*4882a593Smuzhiyun 	case B43legacy_PHYTYPE_B:
2082*4882a593Smuzhiyun 		b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_1MB, 0);
2083*4882a593Smuzhiyun 		b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_2MB, 0);
2084*4882a593Smuzhiyun 		b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_5MB, 0);
2085*4882a593Smuzhiyun 		b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_11MB, 0);
2086*4882a593Smuzhiyun 		break;
2087*4882a593Smuzhiyun 	default:
2088*4882a593Smuzhiyun 		B43legacy_BUG_ON(1);
2089*4882a593Smuzhiyun 	}
2090*4882a593Smuzhiyun }
2091*4882a593Smuzhiyun 
2092*4882a593Smuzhiyun /* Set the TX-Antenna for management frames sent by firmware. */
b43legacy_mgmtframe_txantenna(struct b43legacy_wldev * dev,int antenna)2093*4882a593Smuzhiyun static void b43legacy_mgmtframe_txantenna(struct b43legacy_wldev *dev,
2094*4882a593Smuzhiyun 					  int antenna)
2095*4882a593Smuzhiyun {
2096*4882a593Smuzhiyun 	u16 ant = 0;
2097*4882a593Smuzhiyun 	u16 tmp;
2098*4882a593Smuzhiyun 
2099*4882a593Smuzhiyun 	switch (antenna) {
2100*4882a593Smuzhiyun 	case B43legacy_ANTENNA0:
2101*4882a593Smuzhiyun 		ant |= B43legacy_TX4_PHY_ANT0;
2102*4882a593Smuzhiyun 		break;
2103*4882a593Smuzhiyun 	case B43legacy_ANTENNA1:
2104*4882a593Smuzhiyun 		ant |= B43legacy_TX4_PHY_ANT1;
2105*4882a593Smuzhiyun 		break;
2106*4882a593Smuzhiyun 	case B43legacy_ANTENNA_AUTO:
2107*4882a593Smuzhiyun 		ant |= B43legacy_TX4_PHY_ANTLAST;
2108*4882a593Smuzhiyun 		break;
2109*4882a593Smuzhiyun 	default:
2110*4882a593Smuzhiyun 		B43legacy_BUG_ON(1);
2111*4882a593Smuzhiyun 	}
2112*4882a593Smuzhiyun 
2113*4882a593Smuzhiyun 	/* FIXME We also need to set the other flags of the PHY control
2114*4882a593Smuzhiyun 	 * field somewhere. */
2115*4882a593Smuzhiyun 
2116*4882a593Smuzhiyun 	/* For Beacons */
2117*4882a593Smuzhiyun 	tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2118*4882a593Smuzhiyun 				   B43legacy_SHM_SH_BEACPHYCTL);
2119*4882a593Smuzhiyun 	tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2120*4882a593Smuzhiyun 	b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2121*4882a593Smuzhiyun 			      B43legacy_SHM_SH_BEACPHYCTL, tmp);
2122*4882a593Smuzhiyun 	/* For ACK/CTS */
2123*4882a593Smuzhiyun 	tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2124*4882a593Smuzhiyun 				   B43legacy_SHM_SH_ACKCTSPHYCTL);
2125*4882a593Smuzhiyun 	tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2126*4882a593Smuzhiyun 	b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2127*4882a593Smuzhiyun 			      B43legacy_SHM_SH_ACKCTSPHYCTL, tmp);
2128*4882a593Smuzhiyun 	/* For Probe Resposes */
2129*4882a593Smuzhiyun 	tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2130*4882a593Smuzhiyun 				   B43legacy_SHM_SH_PRPHYCTL);
2131*4882a593Smuzhiyun 	tmp = (tmp & ~B43legacy_TX4_PHY_ANT) | ant;
2132*4882a593Smuzhiyun 	b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2133*4882a593Smuzhiyun 			      B43legacy_SHM_SH_PRPHYCTL, tmp);
2134*4882a593Smuzhiyun }
2135*4882a593Smuzhiyun 
2136*4882a593Smuzhiyun /* This is the opposite of b43legacy_chip_init() */
b43legacy_chip_exit(struct b43legacy_wldev * dev)2137*4882a593Smuzhiyun static void b43legacy_chip_exit(struct b43legacy_wldev *dev)
2138*4882a593Smuzhiyun {
2139*4882a593Smuzhiyun 	b43legacy_radio_turn_off(dev, 1);
2140*4882a593Smuzhiyun 	b43legacy_gpio_cleanup(dev);
2141*4882a593Smuzhiyun 	/* firmware is released later */
2142*4882a593Smuzhiyun }
2143*4882a593Smuzhiyun 
2144*4882a593Smuzhiyun /* Initialize the chip
2145*4882a593Smuzhiyun  * https://bcm-specs.sipsolutions.net/ChipInit
2146*4882a593Smuzhiyun  */
b43legacy_chip_init(struct b43legacy_wldev * dev)2147*4882a593Smuzhiyun static int b43legacy_chip_init(struct b43legacy_wldev *dev)
2148*4882a593Smuzhiyun {
2149*4882a593Smuzhiyun 	struct b43legacy_phy *phy = &dev->phy;
2150*4882a593Smuzhiyun 	int err;
2151*4882a593Smuzhiyun 	int tmp;
2152*4882a593Smuzhiyun 	u32 value32, macctl;
2153*4882a593Smuzhiyun 	u16 value16;
2154*4882a593Smuzhiyun 
2155*4882a593Smuzhiyun 	/* Initialize the MAC control */
2156*4882a593Smuzhiyun 	macctl = B43legacy_MACCTL_IHR_ENABLED | B43legacy_MACCTL_SHM_ENABLED;
2157*4882a593Smuzhiyun 	if (dev->phy.gmode)
2158*4882a593Smuzhiyun 		macctl |= B43legacy_MACCTL_GMODE;
2159*4882a593Smuzhiyun 	macctl |= B43legacy_MACCTL_INFRA;
2160*4882a593Smuzhiyun 	b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
2161*4882a593Smuzhiyun 
2162*4882a593Smuzhiyun 	err = b43legacy_upload_microcode(dev);
2163*4882a593Smuzhiyun 	if (err)
2164*4882a593Smuzhiyun 		goto out; /* firmware is released later */
2165*4882a593Smuzhiyun 
2166*4882a593Smuzhiyun 	err = b43legacy_gpio_init(dev);
2167*4882a593Smuzhiyun 	if (err)
2168*4882a593Smuzhiyun 		goto out; /* firmware is released later */
2169*4882a593Smuzhiyun 
2170*4882a593Smuzhiyun 	err = b43legacy_upload_initvals(dev);
2171*4882a593Smuzhiyun 	if (err)
2172*4882a593Smuzhiyun 		goto err_gpio_clean;
2173*4882a593Smuzhiyun 	b43legacy_radio_turn_on(dev);
2174*4882a593Smuzhiyun 
2175*4882a593Smuzhiyun 	b43legacy_write16(dev, 0x03E6, 0x0000);
2176*4882a593Smuzhiyun 	err = b43legacy_phy_init(dev);
2177*4882a593Smuzhiyun 	if (err)
2178*4882a593Smuzhiyun 		goto err_radio_off;
2179*4882a593Smuzhiyun 
2180*4882a593Smuzhiyun 	/* Select initial Interference Mitigation. */
2181*4882a593Smuzhiyun 	tmp = phy->interfmode;
2182*4882a593Smuzhiyun 	phy->interfmode = B43legacy_INTERFMODE_NONE;
2183*4882a593Smuzhiyun 	b43legacy_radio_set_interference_mitigation(dev, tmp);
2184*4882a593Smuzhiyun 
2185*4882a593Smuzhiyun 	b43legacy_phy_set_antenna_diversity(dev);
2186*4882a593Smuzhiyun 	b43legacy_mgmtframe_txantenna(dev, B43legacy_ANTENNA_DEFAULT);
2187*4882a593Smuzhiyun 
2188*4882a593Smuzhiyun 	if (phy->type == B43legacy_PHYTYPE_B) {
2189*4882a593Smuzhiyun 		value16 = b43legacy_read16(dev, 0x005E);
2190*4882a593Smuzhiyun 		value16 |= 0x0004;
2191*4882a593Smuzhiyun 		b43legacy_write16(dev, 0x005E, value16);
2192*4882a593Smuzhiyun 	}
2193*4882a593Smuzhiyun 	b43legacy_write32(dev, 0x0100, 0x01000000);
2194*4882a593Smuzhiyun 	if (dev->dev->id.revision < 5)
2195*4882a593Smuzhiyun 		b43legacy_write32(dev, 0x010C, 0x01000000);
2196*4882a593Smuzhiyun 
2197*4882a593Smuzhiyun 	value32 = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2198*4882a593Smuzhiyun 	value32 &= ~B43legacy_MACCTL_INFRA;
2199*4882a593Smuzhiyun 	b43legacy_write32(dev, B43legacy_MMIO_MACCTL, value32);
2200*4882a593Smuzhiyun 	value32 = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2201*4882a593Smuzhiyun 	value32 |= B43legacy_MACCTL_INFRA;
2202*4882a593Smuzhiyun 	b43legacy_write32(dev, B43legacy_MMIO_MACCTL, value32);
2203*4882a593Smuzhiyun 
2204*4882a593Smuzhiyun 	if (b43legacy_using_pio(dev)) {
2205*4882a593Smuzhiyun 		b43legacy_write32(dev, 0x0210, 0x00000100);
2206*4882a593Smuzhiyun 		b43legacy_write32(dev, 0x0230, 0x00000100);
2207*4882a593Smuzhiyun 		b43legacy_write32(dev, 0x0250, 0x00000100);
2208*4882a593Smuzhiyun 		b43legacy_write32(dev, 0x0270, 0x00000100);
2209*4882a593Smuzhiyun 		b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0034,
2210*4882a593Smuzhiyun 				      0x0000);
2211*4882a593Smuzhiyun 	}
2212*4882a593Smuzhiyun 
2213*4882a593Smuzhiyun 	/* Probe Response Timeout value */
2214*4882a593Smuzhiyun 	/* FIXME: Default to 0, has to be set by ioctl probably... :-/ */
2215*4882a593Smuzhiyun 	b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0074, 0x0000);
2216*4882a593Smuzhiyun 
2217*4882a593Smuzhiyun 	/* Initially set the wireless operation mode. */
2218*4882a593Smuzhiyun 	b43legacy_adjust_opmode(dev);
2219*4882a593Smuzhiyun 
2220*4882a593Smuzhiyun 	if (dev->dev->id.revision < 3) {
2221*4882a593Smuzhiyun 		b43legacy_write16(dev, 0x060E, 0x0000);
2222*4882a593Smuzhiyun 		b43legacy_write16(dev, 0x0610, 0x8000);
2223*4882a593Smuzhiyun 		b43legacy_write16(dev, 0x0604, 0x0000);
2224*4882a593Smuzhiyun 		b43legacy_write16(dev, 0x0606, 0x0200);
2225*4882a593Smuzhiyun 	} else {
2226*4882a593Smuzhiyun 		b43legacy_write32(dev, 0x0188, 0x80000000);
2227*4882a593Smuzhiyun 		b43legacy_write32(dev, 0x018C, 0x02000000);
2228*4882a593Smuzhiyun 	}
2229*4882a593Smuzhiyun 	b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, 0x00004000);
2230*4882a593Smuzhiyun 	b43legacy_write32(dev, B43legacy_MMIO_DMA0_IRQ_MASK, 0x0001DC00);
2231*4882a593Smuzhiyun 	b43legacy_write32(dev, B43legacy_MMIO_DMA1_IRQ_MASK, 0x0000DC00);
2232*4882a593Smuzhiyun 	b43legacy_write32(dev, B43legacy_MMIO_DMA2_IRQ_MASK, 0x0000DC00);
2233*4882a593Smuzhiyun 	b43legacy_write32(dev, B43legacy_MMIO_DMA3_IRQ_MASK, 0x0001DC00);
2234*4882a593Smuzhiyun 	b43legacy_write32(dev, B43legacy_MMIO_DMA4_IRQ_MASK, 0x0000DC00);
2235*4882a593Smuzhiyun 	b43legacy_write32(dev, B43legacy_MMIO_DMA5_IRQ_MASK, 0x0000DC00);
2236*4882a593Smuzhiyun 
2237*4882a593Smuzhiyun 	value32 = ssb_read32(dev->dev, SSB_TMSLOW);
2238*4882a593Smuzhiyun 	value32 |= B43legacy_TMSLOW_MACPHYCLKEN;
2239*4882a593Smuzhiyun 	ssb_write32(dev->dev, SSB_TMSLOW, value32);
2240*4882a593Smuzhiyun 
2241*4882a593Smuzhiyun 	b43legacy_write16(dev, B43legacy_MMIO_POWERUP_DELAY,
2242*4882a593Smuzhiyun 			  dev->dev->bus->chipco.fast_pwrup_delay);
2243*4882a593Smuzhiyun 
2244*4882a593Smuzhiyun 	/* PHY TX errors counter. */
2245*4882a593Smuzhiyun 	atomic_set(&phy->txerr_cnt, B43legacy_PHY_TX_BADNESS_LIMIT);
2246*4882a593Smuzhiyun 
2247*4882a593Smuzhiyun 	B43legacy_WARN_ON(err != 0);
2248*4882a593Smuzhiyun 	b43legacydbg(dev->wl, "Chip initialized\n");
2249*4882a593Smuzhiyun out:
2250*4882a593Smuzhiyun 	return err;
2251*4882a593Smuzhiyun 
2252*4882a593Smuzhiyun err_radio_off:
2253*4882a593Smuzhiyun 	b43legacy_radio_turn_off(dev, 1);
2254*4882a593Smuzhiyun err_gpio_clean:
2255*4882a593Smuzhiyun 	b43legacy_gpio_cleanup(dev);
2256*4882a593Smuzhiyun 	goto out;
2257*4882a593Smuzhiyun }
2258*4882a593Smuzhiyun 
b43legacy_periodic_every120sec(struct b43legacy_wldev * dev)2259*4882a593Smuzhiyun static void b43legacy_periodic_every120sec(struct b43legacy_wldev *dev)
2260*4882a593Smuzhiyun {
2261*4882a593Smuzhiyun 	struct b43legacy_phy *phy = &dev->phy;
2262*4882a593Smuzhiyun 
2263*4882a593Smuzhiyun 	if (phy->type != B43legacy_PHYTYPE_G || phy->rev < 2)
2264*4882a593Smuzhiyun 		return;
2265*4882a593Smuzhiyun 
2266*4882a593Smuzhiyun 	b43legacy_mac_suspend(dev);
2267*4882a593Smuzhiyun 	b43legacy_phy_lo_g_measure(dev);
2268*4882a593Smuzhiyun 	b43legacy_mac_enable(dev);
2269*4882a593Smuzhiyun }
2270*4882a593Smuzhiyun 
b43legacy_periodic_every60sec(struct b43legacy_wldev * dev)2271*4882a593Smuzhiyun static void b43legacy_periodic_every60sec(struct b43legacy_wldev *dev)
2272*4882a593Smuzhiyun {
2273*4882a593Smuzhiyun 	b43legacy_phy_lo_mark_all_unused(dev);
2274*4882a593Smuzhiyun 	if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_RSSI) {
2275*4882a593Smuzhiyun 		b43legacy_mac_suspend(dev);
2276*4882a593Smuzhiyun 		b43legacy_calc_nrssi_slope(dev);
2277*4882a593Smuzhiyun 		b43legacy_mac_enable(dev);
2278*4882a593Smuzhiyun 	}
2279*4882a593Smuzhiyun }
2280*4882a593Smuzhiyun 
b43legacy_periodic_every30sec(struct b43legacy_wldev * dev)2281*4882a593Smuzhiyun static void b43legacy_periodic_every30sec(struct b43legacy_wldev *dev)
2282*4882a593Smuzhiyun {
2283*4882a593Smuzhiyun 	/* Update device statistics. */
2284*4882a593Smuzhiyun 	b43legacy_calculate_link_quality(dev);
2285*4882a593Smuzhiyun }
2286*4882a593Smuzhiyun 
b43legacy_periodic_every15sec(struct b43legacy_wldev * dev)2287*4882a593Smuzhiyun static void b43legacy_periodic_every15sec(struct b43legacy_wldev *dev)
2288*4882a593Smuzhiyun {
2289*4882a593Smuzhiyun 	b43legacy_phy_xmitpower(dev); /* FIXME: unless scanning? */
2290*4882a593Smuzhiyun 
2291*4882a593Smuzhiyun 	atomic_set(&dev->phy.txerr_cnt, B43legacy_PHY_TX_BADNESS_LIMIT);
2292*4882a593Smuzhiyun 	wmb();
2293*4882a593Smuzhiyun }
2294*4882a593Smuzhiyun 
do_periodic_work(struct b43legacy_wldev * dev)2295*4882a593Smuzhiyun static void do_periodic_work(struct b43legacy_wldev *dev)
2296*4882a593Smuzhiyun {
2297*4882a593Smuzhiyun 	unsigned int state;
2298*4882a593Smuzhiyun 
2299*4882a593Smuzhiyun 	state = dev->periodic_state;
2300*4882a593Smuzhiyun 	if (state % 8 == 0)
2301*4882a593Smuzhiyun 		b43legacy_periodic_every120sec(dev);
2302*4882a593Smuzhiyun 	if (state % 4 == 0)
2303*4882a593Smuzhiyun 		b43legacy_periodic_every60sec(dev);
2304*4882a593Smuzhiyun 	if (state % 2 == 0)
2305*4882a593Smuzhiyun 		b43legacy_periodic_every30sec(dev);
2306*4882a593Smuzhiyun 	b43legacy_periodic_every15sec(dev);
2307*4882a593Smuzhiyun }
2308*4882a593Smuzhiyun 
2309*4882a593Smuzhiyun /* Periodic work locking policy:
2310*4882a593Smuzhiyun  * 	The whole periodic work handler is protected by
2311*4882a593Smuzhiyun  * 	wl->mutex. If another lock is needed somewhere in the
2312*4882a593Smuzhiyun  * 	pwork callchain, it's acquired in-place, where it's needed.
2313*4882a593Smuzhiyun  */
b43legacy_periodic_work_handler(struct work_struct * work)2314*4882a593Smuzhiyun static void b43legacy_periodic_work_handler(struct work_struct *work)
2315*4882a593Smuzhiyun {
2316*4882a593Smuzhiyun 	struct b43legacy_wldev *dev = container_of(work, struct b43legacy_wldev,
2317*4882a593Smuzhiyun 					     periodic_work.work);
2318*4882a593Smuzhiyun 	struct b43legacy_wl *wl = dev->wl;
2319*4882a593Smuzhiyun 	unsigned long delay;
2320*4882a593Smuzhiyun 
2321*4882a593Smuzhiyun 	mutex_lock(&wl->mutex);
2322*4882a593Smuzhiyun 
2323*4882a593Smuzhiyun 	if (unlikely(b43legacy_status(dev) != B43legacy_STAT_STARTED))
2324*4882a593Smuzhiyun 		goto out;
2325*4882a593Smuzhiyun 	if (b43legacy_debug(dev, B43legacy_DBG_PWORK_STOP))
2326*4882a593Smuzhiyun 		goto out_requeue;
2327*4882a593Smuzhiyun 
2328*4882a593Smuzhiyun 	do_periodic_work(dev);
2329*4882a593Smuzhiyun 
2330*4882a593Smuzhiyun 	dev->periodic_state++;
2331*4882a593Smuzhiyun out_requeue:
2332*4882a593Smuzhiyun 	if (b43legacy_debug(dev, B43legacy_DBG_PWORK_FAST))
2333*4882a593Smuzhiyun 		delay = msecs_to_jiffies(50);
2334*4882a593Smuzhiyun 	else
2335*4882a593Smuzhiyun 		delay = round_jiffies_relative(HZ * 15);
2336*4882a593Smuzhiyun 	ieee80211_queue_delayed_work(wl->hw, &dev->periodic_work, delay);
2337*4882a593Smuzhiyun out:
2338*4882a593Smuzhiyun 	mutex_unlock(&wl->mutex);
2339*4882a593Smuzhiyun }
2340*4882a593Smuzhiyun 
b43legacy_periodic_tasks_setup(struct b43legacy_wldev * dev)2341*4882a593Smuzhiyun static void b43legacy_periodic_tasks_setup(struct b43legacy_wldev *dev)
2342*4882a593Smuzhiyun {
2343*4882a593Smuzhiyun 	struct delayed_work *work = &dev->periodic_work;
2344*4882a593Smuzhiyun 
2345*4882a593Smuzhiyun 	dev->periodic_state = 0;
2346*4882a593Smuzhiyun 	INIT_DELAYED_WORK(work, b43legacy_periodic_work_handler);
2347*4882a593Smuzhiyun 	ieee80211_queue_delayed_work(dev->wl->hw, work, 0);
2348*4882a593Smuzhiyun }
2349*4882a593Smuzhiyun 
2350*4882a593Smuzhiyun /* Validate access to the chip (SHM) */
b43legacy_validate_chipaccess(struct b43legacy_wldev * dev)2351*4882a593Smuzhiyun static int b43legacy_validate_chipaccess(struct b43legacy_wldev *dev)
2352*4882a593Smuzhiyun {
2353*4882a593Smuzhiyun 	u32 value;
2354*4882a593Smuzhiyun 	u32 shm_backup;
2355*4882a593Smuzhiyun 
2356*4882a593Smuzhiyun 	shm_backup = b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0);
2357*4882a593Smuzhiyun 	b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0xAA5555AA);
2358*4882a593Smuzhiyun 	if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) !=
2359*4882a593Smuzhiyun 				 0xAA5555AA)
2360*4882a593Smuzhiyun 		goto error;
2361*4882a593Smuzhiyun 	b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0x55AAAA55);
2362*4882a593Smuzhiyun 	if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) !=
2363*4882a593Smuzhiyun 				 0x55AAAA55)
2364*4882a593Smuzhiyun 		goto error;
2365*4882a593Smuzhiyun 	b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, shm_backup);
2366*4882a593Smuzhiyun 
2367*4882a593Smuzhiyun 	value = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2368*4882a593Smuzhiyun 	if ((value | B43legacy_MACCTL_GMODE) !=
2369*4882a593Smuzhiyun 	    (B43legacy_MACCTL_GMODE | B43legacy_MACCTL_IHR_ENABLED))
2370*4882a593Smuzhiyun 		goto error;
2371*4882a593Smuzhiyun 
2372*4882a593Smuzhiyun 	value = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
2373*4882a593Smuzhiyun 	if (value)
2374*4882a593Smuzhiyun 		goto error;
2375*4882a593Smuzhiyun 
2376*4882a593Smuzhiyun 	return 0;
2377*4882a593Smuzhiyun error:
2378*4882a593Smuzhiyun 	b43legacyerr(dev->wl, "Failed to validate the chipaccess\n");
2379*4882a593Smuzhiyun 	return -ENODEV;
2380*4882a593Smuzhiyun }
2381*4882a593Smuzhiyun 
b43legacy_security_init(struct b43legacy_wldev * dev)2382*4882a593Smuzhiyun static void b43legacy_security_init(struct b43legacy_wldev *dev)
2383*4882a593Smuzhiyun {
2384*4882a593Smuzhiyun 	dev->max_nr_keys = (dev->dev->id.revision >= 5) ? 58 : 20;
2385*4882a593Smuzhiyun 	B43legacy_WARN_ON(dev->max_nr_keys > ARRAY_SIZE(dev->key));
2386*4882a593Smuzhiyun 	dev->ktp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2387*4882a593Smuzhiyun 					0x0056);
2388*4882a593Smuzhiyun 	/* KTP is a word address, but we address SHM bytewise.
2389*4882a593Smuzhiyun 	 * So multiply by two.
2390*4882a593Smuzhiyun 	 */
2391*4882a593Smuzhiyun 	dev->ktp *= 2;
2392*4882a593Smuzhiyun 	if (dev->dev->id.revision >= 5)
2393*4882a593Smuzhiyun 		/* Number of RCMTA address slots */
2394*4882a593Smuzhiyun 		b43legacy_write16(dev, B43legacy_MMIO_RCMTA_COUNT,
2395*4882a593Smuzhiyun 				  dev->max_nr_keys - 8);
2396*4882a593Smuzhiyun }
2397*4882a593Smuzhiyun 
2398*4882a593Smuzhiyun #ifdef CONFIG_B43LEGACY_HWRNG
b43legacy_rng_read(struct hwrng * rng,u32 * data)2399*4882a593Smuzhiyun static int b43legacy_rng_read(struct hwrng *rng, u32 *data)
2400*4882a593Smuzhiyun {
2401*4882a593Smuzhiyun 	struct b43legacy_wl *wl = (struct b43legacy_wl *)rng->priv;
2402*4882a593Smuzhiyun 	unsigned long flags;
2403*4882a593Smuzhiyun 
2404*4882a593Smuzhiyun 	/* Don't take wl->mutex here, as it could deadlock with
2405*4882a593Smuzhiyun 	 * hwrng internal locking. It's not needed to take
2406*4882a593Smuzhiyun 	 * wl->mutex here, anyway. */
2407*4882a593Smuzhiyun 
2408*4882a593Smuzhiyun 	spin_lock_irqsave(&wl->irq_lock, flags);
2409*4882a593Smuzhiyun 	*data = b43legacy_read16(wl->current_dev, B43legacy_MMIO_RNG);
2410*4882a593Smuzhiyun 	spin_unlock_irqrestore(&wl->irq_lock, flags);
2411*4882a593Smuzhiyun 
2412*4882a593Smuzhiyun 	return (sizeof(u16));
2413*4882a593Smuzhiyun }
2414*4882a593Smuzhiyun #endif
2415*4882a593Smuzhiyun 
b43legacy_rng_exit(struct b43legacy_wl * wl)2416*4882a593Smuzhiyun static void b43legacy_rng_exit(struct b43legacy_wl *wl)
2417*4882a593Smuzhiyun {
2418*4882a593Smuzhiyun #ifdef CONFIG_B43LEGACY_HWRNG
2419*4882a593Smuzhiyun 	if (wl->rng_initialized)
2420*4882a593Smuzhiyun 		hwrng_unregister(&wl->rng);
2421*4882a593Smuzhiyun #endif
2422*4882a593Smuzhiyun }
2423*4882a593Smuzhiyun 
b43legacy_rng_init(struct b43legacy_wl * wl)2424*4882a593Smuzhiyun static int b43legacy_rng_init(struct b43legacy_wl *wl)
2425*4882a593Smuzhiyun {
2426*4882a593Smuzhiyun 	int err = 0;
2427*4882a593Smuzhiyun 
2428*4882a593Smuzhiyun #ifdef CONFIG_B43LEGACY_HWRNG
2429*4882a593Smuzhiyun 	snprintf(wl->rng_name, ARRAY_SIZE(wl->rng_name),
2430*4882a593Smuzhiyun 		 "%s_%s", KBUILD_MODNAME, wiphy_name(wl->hw->wiphy));
2431*4882a593Smuzhiyun 	wl->rng.name = wl->rng_name;
2432*4882a593Smuzhiyun 	wl->rng.data_read = b43legacy_rng_read;
2433*4882a593Smuzhiyun 	wl->rng.priv = (unsigned long)wl;
2434*4882a593Smuzhiyun 	wl->rng_initialized = 1;
2435*4882a593Smuzhiyun 	err = hwrng_register(&wl->rng);
2436*4882a593Smuzhiyun 	if (err) {
2437*4882a593Smuzhiyun 		wl->rng_initialized = 0;
2438*4882a593Smuzhiyun 		b43legacyerr(wl, "Failed to register the random "
2439*4882a593Smuzhiyun 		       "number generator (%d)\n", err);
2440*4882a593Smuzhiyun 	}
2441*4882a593Smuzhiyun 
2442*4882a593Smuzhiyun #endif
2443*4882a593Smuzhiyun 	return err;
2444*4882a593Smuzhiyun }
2445*4882a593Smuzhiyun 
b43legacy_tx_work(struct work_struct * work)2446*4882a593Smuzhiyun static void b43legacy_tx_work(struct work_struct *work)
2447*4882a593Smuzhiyun {
2448*4882a593Smuzhiyun 	struct b43legacy_wl *wl = container_of(work, struct b43legacy_wl,
2449*4882a593Smuzhiyun 				  tx_work);
2450*4882a593Smuzhiyun 	struct b43legacy_wldev *dev;
2451*4882a593Smuzhiyun 	struct sk_buff *skb;
2452*4882a593Smuzhiyun 	int queue_num;
2453*4882a593Smuzhiyun 	int err = 0;
2454*4882a593Smuzhiyun 
2455*4882a593Smuzhiyun 	mutex_lock(&wl->mutex);
2456*4882a593Smuzhiyun 	dev = wl->current_dev;
2457*4882a593Smuzhiyun 	if (unlikely(!dev || b43legacy_status(dev) < B43legacy_STAT_STARTED)) {
2458*4882a593Smuzhiyun 		mutex_unlock(&wl->mutex);
2459*4882a593Smuzhiyun 		return;
2460*4882a593Smuzhiyun 	}
2461*4882a593Smuzhiyun 
2462*4882a593Smuzhiyun 	for (queue_num = 0; queue_num < B43legacy_QOS_QUEUE_NUM; queue_num++) {
2463*4882a593Smuzhiyun 		while (skb_queue_len(&wl->tx_queue[queue_num])) {
2464*4882a593Smuzhiyun 			skb = skb_dequeue(&wl->tx_queue[queue_num]);
2465*4882a593Smuzhiyun 			if (b43legacy_using_pio(dev))
2466*4882a593Smuzhiyun 				err = b43legacy_pio_tx(dev, skb);
2467*4882a593Smuzhiyun 			else
2468*4882a593Smuzhiyun 				err = b43legacy_dma_tx(dev, skb);
2469*4882a593Smuzhiyun 			if (err == -ENOSPC) {
2470*4882a593Smuzhiyun 				wl->tx_queue_stopped[queue_num] = 1;
2471*4882a593Smuzhiyun 				ieee80211_stop_queue(wl->hw, queue_num);
2472*4882a593Smuzhiyun 				skb_queue_head(&wl->tx_queue[queue_num], skb);
2473*4882a593Smuzhiyun 				break;
2474*4882a593Smuzhiyun 			}
2475*4882a593Smuzhiyun 			if (unlikely(err))
2476*4882a593Smuzhiyun 				dev_kfree_skb(skb); /* Drop it */
2477*4882a593Smuzhiyun 			err = 0;
2478*4882a593Smuzhiyun 		}
2479*4882a593Smuzhiyun 
2480*4882a593Smuzhiyun 		if (!err)
2481*4882a593Smuzhiyun 			wl->tx_queue_stopped[queue_num] = 0;
2482*4882a593Smuzhiyun 	}
2483*4882a593Smuzhiyun 
2484*4882a593Smuzhiyun 	mutex_unlock(&wl->mutex);
2485*4882a593Smuzhiyun }
2486*4882a593Smuzhiyun 
b43legacy_op_tx(struct ieee80211_hw * hw,struct ieee80211_tx_control * control,struct sk_buff * skb)2487*4882a593Smuzhiyun static void b43legacy_op_tx(struct ieee80211_hw *hw,
2488*4882a593Smuzhiyun 			    struct ieee80211_tx_control *control,
2489*4882a593Smuzhiyun 			    struct sk_buff *skb)
2490*4882a593Smuzhiyun {
2491*4882a593Smuzhiyun 	struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2492*4882a593Smuzhiyun 
2493*4882a593Smuzhiyun 	if (unlikely(skb->len < 2 + 2 + 6)) {
2494*4882a593Smuzhiyun 		/* Too short, this can't be a valid frame. */
2495*4882a593Smuzhiyun 		dev_kfree_skb_any(skb);
2496*4882a593Smuzhiyun 		return;
2497*4882a593Smuzhiyun 	}
2498*4882a593Smuzhiyun 	B43legacy_WARN_ON(skb_shinfo(skb)->nr_frags);
2499*4882a593Smuzhiyun 
2500*4882a593Smuzhiyun 	skb_queue_tail(&wl->tx_queue[skb->queue_mapping], skb);
2501*4882a593Smuzhiyun 	if (!wl->tx_queue_stopped[skb->queue_mapping])
2502*4882a593Smuzhiyun 		ieee80211_queue_work(wl->hw, &wl->tx_work);
2503*4882a593Smuzhiyun 	else
2504*4882a593Smuzhiyun 		ieee80211_stop_queue(wl->hw, skb->queue_mapping);
2505*4882a593Smuzhiyun }
2506*4882a593Smuzhiyun 
b43legacy_op_conf_tx(struct ieee80211_hw * hw,struct ieee80211_vif * vif,u16 queue,const struct ieee80211_tx_queue_params * params)2507*4882a593Smuzhiyun static int b43legacy_op_conf_tx(struct ieee80211_hw *hw,
2508*4882a593Smuzhiyun 				struct ieee80211_vif *vif, u16 queue,
2509*4882a593Smuzhiyun 				const struct ieee80211_tx_queue_params *params)
2510*4882a593Smuzhiyun {
2511*4882a593Smuzhiyun 	return 0;
2512*4882a593Smuzhiyun }
2513*4882a593Smuzhiyun 
b43legacy_op_get_stats(struct ieee80211_hw * hw,struct ieee80211_low_level_stats * stats)2514*4882a593Smuzhiyun static int b43legacy_op_get_stats(struct ieee80211_hw *hw,
2515*4882a593Smuzhiyun 				  struct ieee80211_low_level_stats *stats)
2516*4882a593Smuzhiyun {
2517*4882a593Smuzhiyun 	struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2518*4882a593Smuzhiyun 	unsigned long flags;
2519*4882a593Smuzhiyun 
2520*4882a593Smuzhiyun 	spin_lock_irqsave(&wl->irq_lock, flags);
2521*4882a593Smuzhiyun 	memcpy(stats, &wl->ieee_stats, sizeof(*stats));
2522*4882a593Smuzhiyun 	spin_unlock_irqrestore(&wl->irq_lock, flags);
2523*4882a593Smuzhiyun 
2524*4882a593Smuzhiyun 	return 0;
2525*4882a593Smuzhiyun }
2526*4882a593Smuzhiyun 
phymode_to_string(unsigned int phymode)2527*4882a593Smuzhiyun static const char *phymode_to_string(unsigned int phymode)
2528*4882a593Smuzhiyun {
2529*4882a593Smuzhiyun 	switch (phymode) {
2530*4882a593Smuzhiyun 	case B43legacy_PHYMODE_B:
2531*4882a593Smuzhiyun 		return "B";
2532*4882a593Smuzhiyun 	case B43legacy_PHYMODE_G:
2533*4882a593Smuzhiyun 		return "G";
2534*4882a593Smuzhiyun 	default:
2535*4882a593Smuzhiyun 		B43legacy_BUG_ON(1);
2536*4882a593Smuzhiyun 	}
2537*4882a593Smuzhiyun 	return "";
2538*4882a593Smuzhiyun }
2539*4882a593Smuzhiyun 
find_wldev_for_phymode(struct b43legacy_wl * wl,unsigned int phymode,struct b43legacy_wldev ** dev,bool * gmode)2540*4882a593Smuzhiyun static int find_wldev_for_phymode(struct b43legacy_wl *wl,
2541*4882a593Smuzhiyun 				  unsigned int phymode,
2542*4882a593Smuzhiyun 				  struct b43legacy_wldev **dev,
2543*4882a593Smuzhiyun 				  bool *gmode)
2544*4882a593Smuzhiyun {
2545*4882a593Smuzhiyun 	struct b43legacy_wldev *d;
2546*4882a593Smuzhiyun 
2547*4882a593Smuzhiyun 	list_for_each_entry(d, &wl->devlist, list) {
2548*4882a593Smuzhiyun 		if (d->phy.possible_phymodes & phymode) {
2549*4882a593Smuzhiyun 			/* Ok, this device supports the PHY-mode.
2550*4882a593Smuzhiyun 			 * Set the gmode bit. */
2551*4882a593Smuzhiyun 			*gmode = true;
2552*4882a593Smuzhiyun 			*dev = d;
2553*4882a593Smuzhiyun 
2554*4882a593Smuzhiyun 			return 0;
2555*4882a593Smuzhiyun 		}
2556*4882a593Smuzhiyun 	}
2557*4882a593Smuzhiyun 
2558*4882a593Smuzhiyun 	return -ESRCH;
2559*4882a593Smuzhiyun }
2560*4882a593Smuzhiyun 
b43legacy_put_phy_into_reset(struct b43legacy_wldev * dev)2561*4882a593Smuzhiyun static void b43legacy_put_phy_into_reset(struct b43legacy_wldev *dev)
2562*4882a593Smuzhiyun {
2563*4882a593Smuzhiyun 	struct ssb_device *sdev = dev->dev;
2564*4882a593Smuzhiyun 	u32 tmslow;
2565*4882a593Smuzhiyun 
2566*4882a593Smuzhiyun 	tmslow = ssb_read32(sdev, SSB_TMSLOW);
2567*4882a593Smuzhiyun 	tmslow &= ~B43legacy_TMSLOW_GMODE;
2568*4882a593Smuzhiyun 	tmslow |= B43legacy_TMSLOW_PHYRESET;
2569*4882a593Smuzhiyun 	tmslow |= SSB_TMSLOW_FGC;
2570*4882a593Smuzhiyun 	ssb_write32(sdev, SSB_TMSLOW, tmslow);
2571*4882a593Smuzhiyun 	msleep(1);
2572*4882a593Smuzhiyun 
2573*4882a593Smuzhiyun 	tmslow = ssb_read32(sdev, SSB_TMSLOW);
2574*4882a593Smuzhiyun 	tmslow &= ~SSB_TMSLOW_FGC;
2575*4882a593Smuzhiyun 	tmslow |= B43legacy_TMSLOW_PHYRESET;
2576*4882a593Smuzhiyun 	ssb_write32(sdev, SSB_TMSLOW, tmslow);
2577*4882a593Smuzhiyun 	msleep(1);
2578*4882a593Smuzhiyun }
2579*4882a593Smuzhiyun 
2580*4882a593Smuzhiyun /* Expects wl->mutex locked */
b43legacy_switch_phymode(struct b43legacy_wl * wl,unsigned int new_mode)2581*4882a593Smuzhiyun static int b43legacy_switch_phymode(struct b43legacy_wl *wl,
2582*4882a593Smuzhiyun 				      unsigned int new_mode)
2583*4882a593Smuzhiyun {
2584*4882a593Smuzhiyun 	struct b43legacy_wldev *up_dev;
2585*4882a593Smuzhiyun 	struct b43legacy_wldev *down_dev;
2586*4882a593Smuzhiyun 	int err;
2587*4882a593Smuzhiyun 	bool gmode = false;
2588*4882a593Smuzhiyun 	int prev_status;
2589*4882a593Smuzhiyun 
2590*4882a593Smuzhiyun 	err = find_wldev_for_phymode(wl, new_mode, &up_dev, &gmode);
2591*4882a593Smuzhiyun 	if (err) {
2592*4882a593Smuzhiyun 		b43legacyerr(wl, "Could not find a device for %s-PHY mode\n",
2593*4882a593Smuzhiyun 		       phymode_to_string(new_mode));
2594*4882a593Smuzhiyun 		return err;
2595*4882a593Smuzhiyun 	}
2596*4882a593Smuzhiyun 	if ((up_dev == wl->current_dev) &&
2597*4882a593Smuzhiyun 	    (!!wl->current_dev->phy.gmode == !!gmode))
2598*4882a593Smuzhiyun 		/* This device is already running. */
2599*4882a593Smuzhiyun 		return 0;
2600*4882a593Smuzhiyun 	b43legacydbg(wl, "Reconfiguring PHYmode to %s-PHY\n",
2601*4882a593Smuzhiyun 	       phymode_to_string(new_mode));
2602*4882a593Smuzhiyun 	down_dev = wl->current_dev;
2603*4882a593Smuzhiyun 
2604*4882a593Smuzhiyun 	prev_status = b43legacy_status(down_dev);
2605*4882a593Smuzhiyun 	/* Shutdown the currently running core. */
2606*4882a593Smuzhiyun 	if (prev_status >= B43legacy_STAT_STARTED)
2607*4882a593Smuzhiyun 		b43legacy_wireless_core_stop(down_dev);
2608*4882a593Smuzhiyun 	if (prev_status >= B43legacy_STAT_INITIALIZED)
2609*4882a593Smuzhiyun 		b43legacy_wireless_core_exit(down_dev);
2610*4882a593Smuzhiyun 
2611*4882a593Smuzhiyun 	if (down_dev != up_dev)
2612*4882a593Smuzhiyun 		/* We switch to a different core, so we put PHY into
2613*4882a593Smuzhiyun 		 * RESET on the old core. */
2614*4882a593Smuzhiyun 		b43legacy_put_phy_into_reset(down_dev);
2615*4882a593Smuzhiyun 
2616*4882a593Smuzhiyun 	/* Now start the new core. */
2617*4882a593Smuzhiyun 	up_dev->phy.gmode = gmode;
2618*4882a593Smuzhiyun 	if (prev_status >= B43legacy_STAT_INITIALIZED) {
2619*4882a593Smuzhiyun 		err = b43legacy_wireless_core_init(up_dev);
2620*4882a593Smuzhiyun 		if (err) {
2621*4882a593Smuzhiyun 			b43legacyerr(wl, "Fatal: Could not initialize device"
2622*4882a593Smuzhiyun 				     " for newly selected %s-PHY mode\n",
2623*4882a593Smuzhiyun 				     phymode_to_string(new_mode));
2624*4882a593Smuzhiyun 			goto init_failure;
2625*4882a593Smuzhiyun 		}
2626*4882a593Smuzhiyun 	}
2627*4882a593Smuzhiyun 	if (prev_status >= B43legacy_STAT_STARTED) {
2628*4882a593Smuzhiyun 		err = b43legacy_wireless_core_start(up_dev);
2629*4882a593Smuzhiyun 		if (err) {
2630*4882a593Smuzhiyun 			b43legacyerr(wl, "Fatal: Could not start device for "
2631*4882a593Smuzhiyun 			       "newly selected %s-PHY mode\n",
2632*4882a593Smuzhiyun 			       phymode_to_string(new_mode));
2633*4882a593Smuzhiyun 			b43legacy_wireless_core_exit(up_dev);
2634*4882a593Smuzhiyun 			goto init_failure;
2635*4882a593Smuzhiyun 		}
2636*4882a593Smuzhiyun 	}
2637*4882a593Smuzhiyun 	B43legacy_WARN_ON(b43legacy_status(up_dev) != prev_status);
2638*4882a593Smuzhiyun 
2639*4882a593Smuzhiyun 	b43legacy_shm_write32(up_dev, B43legacy_SHM_SHARED, 0x003E, 0);
2640*4882a593Smuzhiyun 
2641*4882a593Smuzhiyun 	wl->current_dev = up_dev;
2642*4882a593Smuzhiyun 
2643*4882a593Smuzhiyun 	return 0;
2644*4882a593Smuzhiyun init_failure:
2645*4882a593Smuzhiyun 	/* Whoops, failed to init the new core. No core is operating now. */
2646*4882a593Smuzhiyun 	wl->current_dev = NULL;
2647*4882a593Smuzhiyun 	return err;
2648*4882a593Smuzhiyun }
2649*4882a593Smuzhiyun 
2650*4882a593Smuzhiyun /* Write the short and long frame retry limit values. */
b43legacy_set_retry_limits(struct b43legacy_wldev * dev,unsigned int short_retry,unsigned int long_retry)2651*4882a593Smuzhiyun static void b43legacy_set_retry_limits(struct b43legacy_wldev *dev,
2652*4882a593Smuzhiyun 				       unsigned int short_retry,
2653*4882a593Smuzhiyun 				       unsigned int long_retry)
2654*4882a593Smuzhiyun {
2655*4882a593Smuzhiyun 	/* The retry limit is a 4-bit counter. Enforce this to avoid overflowing
2656*4882a593Smuzhiyun 	 * the chip-internal counter. */
2657*4882a593Smuzhiyun 	short_retry = min(short_retry, (unsigned int)0xF);
2658*4882a593Smuzhiyun 	long_retry = min(long_retry, (unsigned int)0xF);
2659*4882a593Smuzhiyun 
2660*4882a593Smuzhiyun 	b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, 0x0006, short_retry);
2661*4882a593Smuzhiyun 	b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, 0x0007, long_retry);
2662*4882a593Smuzhiyun }
2663*4882a593Smuzhiyun 
b43legacy_op_dev_config(struct ieee80211_hw * hw,u32 changed)2664*4882a593Smuzhiyun static int b43legacy_op_dev_config(struct ieee80211_hw *hw,
2665*4882a593Smuzhiyun 				   u32 changed)
2666*4882a593Smuzhiyun {
2667*4882a593Smuzhiyun 	struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2668*4882a593Smuzhiyun 	struct b43legacy_wldev *dev;
2669*4882a593Smuzhiyun 	struct b43legacy_phy *phy;
2670*4882a593Smuzhiyun 	struct ieee80211_conf *conf = &hw->conf;
2671*4882a593Smuzhiyun 	unsigned long flags;
2672*4882a593Smuzhiyun 	unsigned int new_phymode = 0xFFFF;
2673*4882a593Smuzhiyun 	int antenna_tx;
2674*4882a593Smuzhiyun 	int err = 0;
2675*4882a593Smuzhiyun 
2676*4882a593Smuzhiyun 	antenna_tx = B43legacy_ANTENNA_DEFAULT;
2677*4882a593Smuzhiyun 
2678*4882a593Smuzhiyun 	mutex_lock(&wl->mutex);
2679*4882a593Smuzhiyun 	dev = wl->current_dev;
2680*4882a593Smuzhiyun 	phy = &dev->phy;
2681*4882a593Smuzhiyun 
2682*4882a593Smuzhiyun 	if (changed & IEEE80211_CONF_CHANGE_RETRY_LIMITS)
2683*4882a593Smuzhiyun 		b43legacy_set_retry_limits(dev,
2684*4882a593Smuzhiyun 					   conf->short_frame_max_tx_count,
2685*4882a593Smuzhiyun 					   conf->long_frame_max_tx_count);
2686*4882a593Smuzhiyun 	changed &= ~IEEE80211_CONF_CHANGE_RETRY_LIMITS;
2687*4882a593Smuzhiyun 	if (!changed)
2688*4882a593Smuzhiyun 		goto out_unlock_mutex;
2689*4882a593Smuzhiyun 
2690*4882a593Smuzhiyun 	/* Switch the PHY mode (if necessary). */
2691*4882a593Smuzhiyun 	switch (conf->chandef.chan->band) {
2692*4882a593Smuzhiyun 	case NL80211_BAND_2GHZ:
2693*4882a593Smuzhiyun 		if (phy->type == B43legacy_PHYTYPE_B)
2694*4882a593Smuzhiyun 			new_phymode = B43legacy_PHYMODE_B;
2695*4882a593Smuzhiyun 		else
2696*4882a593Smuzhiyun 			new_phymode = B43legacy_PHYMODE_G;
2697*4882a593Smuzhiyun 		break;
2698*4882a593Smuzhiyun 	default:
2699*4882a593Smuzhiyun 		B43legacy_WARN_ON(1);
2700*4882a593Smuzhiyun 	}
2701*4882a593Smuzhiyun 	err = b43legacy_switch_phymode(wl, new_phymode);
2702*4882a593Smuzhiyun 	if (err)
2703*4882a593Smuzhiyun 		goto out_unlock_mutex;
2704*4882a593Smuzhiyun 
2705*4882a593Smuzhiyun 	/* Disable IRQs while reconfiguring the device.
2706*4882a593Smuzhiyun 	 * This makes it possible to drop the spinlock throughout
2707*4882a593Smuzhiyun 	 * the reconfiguration process. */
2708*4882a593Smuzhiyun 	spin_lock_irqsave(&wl->irq_lock, flags);
2709*4882a593Smuzhiyun 	if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
2710*4882a593Smuzhiyun 		spin_unlock_irqrestore(&wl->irq_lock, flags);
2711*4882a593Smuzhiyun 		goto out_unlock_mutex;
2712*4882a593Smuzhiyun 	}
2713*4882a593Smuzhiyun 	b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
2714*4882a593Smuzhiyun 	spin_unlock_irqrestore(&wl->irq_lock, flags);
2715*4882a593Smuzhiyun 	b43legacy_synchronize_irq(dev);
2716*4882a593Smuzhiyun 
2717*4882a593Smuzhiyun 	/* Switch to the requested channel.
2718*4882a593Smuzhiyun 	 * The firmware takes care of races with the TX handler. */
2719*4882a593Smuzhiyun 	if (conf->chandef.chan->hw_value != phy->channel)
2720*4882a593Smuzhiyun 		b43legacy_radio_selectchannel(dev, conf->chandef.chan->hw_value,
2721*4882a593Smuzhiyun 					      0);
2722*4882a593Smuzhiyun 
2723*4882a593Smuzhiyun 	dev->wl->radiotap_enabled = !!(conf->flags & IEEE80211_CONF_MONITOR);
2724*4882a593Smuzhiyun 
2725*4882a593Smuzhiyun 	/* Adjust the desired TX power level. */
2726*4882a593Smuzhiyun 	if (conf->power_level != 0) {
2727*4882a593Smuzhiyun 		if (conf->power_level != phy->power_level) {
2728*4882a593Smuzhiyun 			phy->power_level = conf->power_level;
2729*4882a593Smuzhiyun 			b43legacy_phy_xmitpower(dev);
2730*4882a593Smuzhiyun 		}
2731*4882a593Smuzhiyun 	}
2732*4882a593Smuzhiyun 
2733*4882a593Smuzhiyun 	/* Antennas for RX and management frame TX. */
2734*4882a593Smuzhiyun 	b43legacy_mgmtframe_txantenna(dev, antenna_tx);
2735*4882a593Smuzhiyun 
2736*4882a593Smuzhiyun 	if (wl->radio_enabled != phy->radio_on) {
2737*4882a593Smuzhiyun 		if (wl->radio_enabled) {
2738*4882a593Smuzhiyun 			b43legacy_radio_turn_on(dev);
2739*4882a593Smuzhiyun 			b43legacyinfo(dev->wl, "Radio turned on by software\n");
2740*4882a593Smuzhiyun 			if (!dev->radio_hw_enable)
2741*4882a593Smuzhiyun 				b43legacyinfo(dev->wl, "The hardware RF-kill"
2742*4882a593Smuzhiyun 					      " button still turns the radio"
2743*4882a593Smuzhiyun 					      " physically off. Press the"
2744*4882a593Smuzhiyun 					      " button to turn it on.\n");
2745*4882a593Smuzhiyun 		} else {
2746*4882a593Smuzhiyun 			b43legacy_radio_turn_off(dev, 0);
2747*4882a593Smuzhiyun 			b43legacyinfo(dev->wl, "Radio turned off by"
2748*4882a593Smuzhiyun 				      " software\n");
2749*4882a593Smuzhiyun 		}
2750*4882a593Smuzhiyun 	}
2751*4882a593Smuzhiyun 
2752*4882a593Smuzhiyun 	spin_lock_irqsave(&wl->irq_lock, flags);
2753*4882a593Smuzhiyun 	b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask);
2754*4882a593Smuzhiyun 	spin_unlock_irqrestore(&wl->irq_lock, flags);
2755*4882a593Smuzhiyun out_unlock_mutex:
2756*4882a593Smuzhiyun 	mutex_unlock(&wl->mutex);
2757*4882a593Smuzhiyun 
2758*4882a593Smuzhiyun 	return err;
2759*4882a593Smuzhiyun }
2760*4882a593Smuzhiyun 
b43legacy_update_basic_rates(struct b43legacy_wldev * dev,u32 brates)2761*4882a593Smuzhiyun static void b43legacy_update_basic_rates(struct b43legacy_wldev *dev, u32 brates)
2762*4882a593Smuzhiyun {
2763*4882a593Smuzhiyun 	struct ieee80211_supported_band *sband =
2764*4882a593Smuzhiyun 		dev->wl->hw->wiphy->bands[NL80211_BAND_2GHZ];
2765*4882a593Smuzhiyun 	struct ieee80211_rate *rate;
2766*4882a593Smuzhiyun 	int i;
2767*4882a593Smuzhiyun 	u16 basic, direct, offset, basic_offset, rateptr;
2768*4882a593Smuzhiyun 
2769*4882a593Smuzhiyun 	for (i = 0; i < sband->n_bitrates; i++) {
2770*4882a593Smuzhiyun 		rate = &sband->bitrates[i];
2771*4882a593Smuzhiyun 
2772*4882a593Smuzhiyun 		if (b43legacy_is_cck_rate(rate->hw_value)) {
2773*4882a593Smuzhiyun 			direct = B43legacy_SHM_SH_CCKDIRECT;
2774*4882a593Smuzhiyun 			basic = B43legacy_SHM_SH_CCKBASIC;
2775*4882a593Smuzhiyun 			offset = b43legacy_plcp_get_ratecode_cck(rate->hw_value);
2776*4882a593Smuzhiyun 			offset &= 0xF;
2777*4882a593Smuzhiyun 		} else {
2778*4882a593Smuzhiyun 			direct = B43legacy_SHM_SH_OFDMDIRECT;
2779*4882a593Smuzhiyun 			basic = B43legacy_SHM_SH_OFDMBASIC;
2780*4882a593Smuzhiyun 			offset = b43legacy_plcp_get_ratecode_ofdm(rate->hw_value);
2781*4882a593Smuzhiyun 			offset &= 0xF;
2782*4882a593Smuzhiyun 		}
2783*4882a593Smuzhiyun 
2784*4882a593Smuzhiyun 		rate = ieee80211_get_response_rate(sband, brates, rate->bitrate);
2785*4882a593Smuzhiyun 
2786*4882a593Smuzhiyun 		if (b43legacy_is_cck_rate(rate->hw_value)) {
2787*4882a593Smuzhiyun 			basic_offset = b43legacy_plcp_get_ratecode_cck(rate->hw_value);
2788*4882a593Smuzhiyun 			basic_offset &= 0xF;
2789*4882a593Smuzhiyun 		} else {
2790*4882a593Smuzhiyun 			basic_offset = b43legacy_plcp_get_ratecode_ofdm(rate->hw_value);
2791*4882a593Smuzhiyun 			basic_offset &= 0xF;
2792*4882a593Smuzhiyun 		}
2793*4882a593Smuzhiyun 
2794*4882a593Smuzhiyun 		/*
2795*4882a593Smuzhiyun 		 * Get the pointer that we need to point to
2796*4882a593Smuzhiyun 		 * from the direct map
2797*4882a593Smuzhiyun 		 */
2798*4882a593Smuzhiyun 		rateptr = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED,
2799*4882a593Smuzhiyun 					       direct + 2 * basic_offset);
2800*4882a593Smuzhiyun 		/* and write it to the basic map */
2801*4882a593Smuzhiyun 		b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
2802*4882a593Smuzhiyun 				      basic + 2 * offset, rateptr);
2803*4882a593Smuzhiyun 	}
2804*4882a593Smuzhiyun }
2805*4882a593Smuzhiyun 
b43legacy_op_bss_info_changed(struct ieee80211_hw * hw,struct ieee80211_vif * vif,struct ieee80211_bss_conf * conf,u32 changed)2806*4882a593Smuzhiyun static void b43legacy_op_bss_info_changed(struct ieee80211_hw *hw,
2807*4882a593Smuzhiyun 				    struct ieee80211_vif *vif,
2808*4882a593Smuzhiyun 				    struct ieee80211_bss_conf *conf,
2809*4882a593Smuzhiyun 				    u32 changed)
2810*4882a593Smuzhiyun {
2811*4882a593Smuzhiyun 	struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2812*4882a593Smuzhiyun 	struct b43legacy_wldev *dev;
2813*4882a593Smuzhiyun 	unsigned long flags;
2814*4882a593Smuzhiyun 
2815*4882a593Smuzhiyun 	mutex_lock(&wl->mutex);
2816*4882a593Smuzhiyun 	B43legacy_WARN_ON(wl->vif != vif);
2817*4882a593Smuzhiyun 
2818*4882a593Smuzhiyun 	dev = wl->current_dev;
2819*4882a593Smuzhiyun 
2820*4882a593Smuzhiyun 	/* Disable IRQs while reconfiguring the device.
2821*4882a593Smuzhiyun 	 * This makes it possible to drop the spinlock throughout
2822*4882a593Smuzhiyun 	 * the reconfiguration process. */
2823*4882a593Smuzhiyun 	spin_lock_irqsave(&wl->irq_lock, flags);
2824*4882a593Smuzhiyun 	if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
2825*4882a593Smuzhiyun 		spin_unlock_irqrestore(&wl->irq_lock, flags);
2826*4882a593Smuzhiyun 		goto out_unlock_mutex;
2827*4882a593Smuzhiyun 	}
2828*4882a593Smuzhiyun 	b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
2829*4882a593Smuzhiyun 
2830*4882a593Smuzhiyun 	if (changed & BSS_CHANGED_BSSID) {
2831*4882a593Smuzhiyun 		b43legacy_synchronize_irq(dev);
2832*4882a593Smuzhiyun 
2833*4882a593Smuzhiyun 		if (conf->bssid)
2834*4882a593Smuzhiyun 			memcpy(wl->bssid, conf->bssid, ETH_ALEN);
2835*4882a593Smuzhiyun 		else
2836*4882a593Smuzhiyun 			eth_zero_addr(wl->bssid);
2837*4882a593Smuzhiyun 	}
2838*4882a593Smuzhiyun 
2839*4882a593Smuzhiyun 	if (b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED) {
2840*4882a593Smuzhiyun 		if (changed & BSS_CHANGED_BEACON &&
2841*4882a593Smuzhiyun 		    (b43legacy_is_mode(wl, NL80211_IFTYPE_AP) ||
2842*4882a593Smuzhiyun 		     b43legacy_is_mode(wl, NL80211_IFTYPE_ADHOC)))
2843*4882a593Smuzhiyun 			b43legacy_update_templates(wl);
2844*4882a593Smuzhiyun 
2845*4882a593Smuzhiyun 		if (changed & BSS_CHANGED_BSSID)
2846*4882a593Smuzhiyun 			b43legacy_write_mac_bssid_templates(dev);
2847*4882a593Smuzhiyun 	}
2848*4882a593Smuzhiyun 	spin_unlock_irqrestore(&wl->irq_lock, flags);
2849*4882a593Smuzhiyun 
2850*4882a593Smuzhiyun 	b43legacy_mac_suspend(dev);
2851*4882a593Smuzhiyun 
2852*4882a593Smuzhiyun 	if (changed & BSS_CHANGED_BEACON_INT &&
2853*4882a593Smuzhiyun 	    (b43legacy_is_mode(wl, NL80211_IFTYPE_AP) ||
2854*4882a593Smuzhiyun 	     b43legacy_is_mode(wl, NL80211_IFTYPE_ADHOC)))
2855*4882a593Smuzhiyun 		b43legacy_set_beacon_int(dev, conf->beacon_int);
2856*4882a593Smuzhiyun 
2857*4882a593Smuzhiyun 	if (changed & BSS_CHANGED_BASIC_RATES)
2858*4882a593Smuzhiyun 		b43legacy_update_basic_rates(dev, conf->basic_rates);
2859*4882a593Smuzhiyun 
2860*4882a593Smuzhiyun 	if (changed & BSS_CHANGED_ERP_SLOT) {
2861*4882a593Smuzhiyun 		if (conf->use_short_slot)
2862*4882a593Smuzhiyun 			b43legacy_short_slot_timing_enable(dev);
2863*4882a593Smuzhiyun 		else
2864*4882a593Smuzhiyun 			b43legacy_short_slot_timing_disable(dev);
2865*4882a593Smuzhiyun 	}
2866*4882a593Smuzhiyun 
2867*4882a593Smuzhiyun 	b43legacy_mac_enable(dev);
2868*4882a593Smuzhiyun 
2869*4882a593Smuzhiyun 	spin_lock_irqsave(&wl->irq_lock, flags);
2870*4882a593Smuzhiyun 	b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask);
2871*4882a593Smuzhiyun 	/* XXX: why? */
2872*4882a593Smuzhiyun 	spin_unlock_irqrestore(&wl->irq_lock, flags);
2873*4882a593Smuzhiyun  out_unlock_mutex:
2874*4882a593Smuzhiyun 	mutex_unlock(&wl->mutex);
2875*4882a593Smuzhiyun }
2876*4882a593Smuzhiyun 
b43legacy_op_configure_filter(struct ieee80211_hw * hw,unsigned int changed,unsigned int * fflags,u64 multicast)2877*4882a593Smuzhiyun static void b43legacy_op_configure_filter(struct ieee80211_hw *hw,
2878*4882a593Smuzhiyun 					  unsigned int changed,
2879*4882a593Smuzhiyun 					  unsigned int *fflags,u64 multicast)
2880*4882a593Smuzhiyun {
2881*4882a593Smuzhiyun 	struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
2882*4882a593Smuzhiyun 	struct b43legacy_wldev *dev = wl->current_dev;
2883*4882a593Smuzhiyun 	unsigned long flags;
2884*4882a593Smuzhiyun 
2885*4882a593Smuzhiyun 	if (!dev) {
2886*4882a593Smuzhiyun 		*fflags = 0;
2887*4882a593Smuzhiyun 		return;
2888*4882a593Smuzhiyun 	}
2889*4882a593Smuzhiyun 
2890*4882a593Smuzhiyun 	spin_lock_irqsave(&wl->irq_lock, flags);
2891*4882a593Smuzhiyun 	*fflags &= FIF_ALLMULTI |
2892*4882a593Smuzhiyun 		  FIF_FCSFAIL |
2893*4882a593Smuzhiyun 		  FIF_PLCPFAIL |
2894*4882a593Smuzhiyun 		  FIF_CONTROL |
2895*4882a593Smuzhiyun 		  FIF_OTHER_BSS |
2896*4882a593Smuzhiyun 		  FIF_BCN_PRBRESP_PROMISC;
2897*4882a593Smuzhiyun 
2898*4882a593Smuzhiyun 	changed &= FIF_ALLMULTI |
2899*4882a593Smuzhiyun 		   FIF_FCSFAIL |
2900*4882a593Smuzhiyun 		   FIF_PLCPFAIL |
2901*4882a593Smuzhiyun 		   FIF_CONTROL |
2902*4882a593Smuzhiyun 		   FIF_OTHER_BSS |
2903*4882a593Smuzhiyun 		   FIF_BCN_PRBRESP_PROMISC;
2904*4882a593Smuzhiyun 
2905*4882a593Smuzhiyun 	wl->filter_flags = *fflags;
2906*4882a593Smuzhiyun 
2907*4882a593Smuzhiyun 	if (changed && b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED)
2908*4882a593Smuzhiyun 		b43legacy_adjust_opmode(dev);
2909*4882a593Smuzhiyun 	spin_unlock_irqrestore(&wl->irq_lock, flags);
2910*4882a593Smuzhiyun }
2911*4882a593Smuzhiyun 
2912*4882a593Smuzhiyun /* Locking: wl->mutex */
b43legacy_wireless_core_stop(struct b43legacy_wldev * dev)2913*4882a593Smuzhiyun static void b43legacy_wireless_core_stop(struct b43legacy_wldev *dev)
2914*4882a593Smuzhiyun {
2915*4882a593Smuzhiyun 	struct b43legacy_wl *wl = dev->wl;
2916*4882a593Smuzhiyun 	unsigned long flags;
2917*4882a593Smuzhiyun 	int queue_num;
2918*4882a593Smuzhiyun 
2919*4882a593Smuzhiyun 	if (b43legacy_status(dev) < B43legacy_STAT_STARTED)
2920*4882a593Smuzhiyun 		return;
2921*4882a593Smuzhiyun 
2922*4882a593Smuzhiyun 	/* Disable and sync interrupts. We must do this before than
2923*4882a593Smuzhiyun 	 * setting the status to INITIALIZED, as the interrupt handler
2924*4882a593Smuzhiyun 	 * won't care about IRQs then. */
2925*4882a593Smuzhiyun 	spin_lock_irqsave(&wl->irq_lock, flags);
2926*4882a593Smuzhiyun 	b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0);
2927*4882a593Smuzhiyun 	b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK); /* flush */
2928*4882a593Smuzhiyun 	spin_unlock_irqrestore(&wl->irq_lock, flags);
2929*4882a593Smuzhiyun 	b43legacy_synchronize_irq(dev);
2930*4882a593Smuzhiyun 
2931*4882a593Smuzhiyun 	b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED);
2932*4882a593Smuzhiyun 
2933*4882a593Smuzhiyun 	mutex_unlock(&wl->mutex);
2934*4882a593Smuzhiyun 	/* Must unlock as it would otherwise deadlock. No races here.
2935*4882a593Smuzhiyun 	 * Cancel the possibly running self-rearming periodic work. */
2936*4882a593Smuzhiyun 	cancel_delayed_work_sync(&dev->periodic_work);
2937*4882a593Smuzhiyun 	cancel_work_sync(&wl->tx_work);
2938*4882a593Smuzhiyun 	mutex_lock(&wl->mutex);
2939*4882a593Smuzhiyun 
2940*4882a593Smuzhiyun 	/* Drain all TX queues. */
2941*4882a593Smuzhiyun 	for (queue_num = 0; queue_num < B43legacy_QOS_QUEUE_NUM; queue_num++) {
2942*4882a593Smuzhiyun 		while (skb_queue_len(&wl->tx_queue[queue_num]))
2943*4882a593Smuzhiyun 			dev_kfree_skb(skb_dequeue(&wl->tx_queue[queue_num]));
2944*4882a593Smuzhiyun 	}
2945*4882a593Smuzhiyun 
2946*4882a593Smuzhiyun b43legacy_mac_suspend(dev);
2947*4882a593Smuzhiyun 	free_irq(dev->dev->irq, dev);
2948*4882a593Smuzhiyun 	b43legacydbg(wl, "Wireless interface stopped\n");
2949*4882a593Smuzhiyun }
2950*4882a593Smuzhiyun 
2951*4882a593Smuzhiyun /* Locking: wl->mutex */
b43legacy_wireless_core_start(struct b43legacy_wldev * dev)2952*4882a593Smuzhiyun static int b43legacy_wireless_core_start(struct b43legacy_wldev *dev)
2953*4882a593Smuzhiyun {
2954*4882a593Smuzhiyun 	int err;
2955*4882a593Smuzhiyun 
2956*4882a593Smuzhiyun 	B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_INITIALIZED);
2957*4882a593Smuzhiyun 
2958*4882a593Smuzhiyun 	drain_txstatus_queue(dev);
2959*4882a593Smuzhiyun 	err = request_irq(dev->dev->irq, b43legacy_interrupt_handler,
2960*4882a593Smuzhiyun 			  IRQF_SHARED, KBUILD_MODNAME, dev);
2961*4882a593Smuzhiyun 	if (err) {
2962*4882a593Smuzhiyun 		b43legacyerr(dev->wl, "Cannot request IRQ-%d\n",
2963*4882a593Smuzhiyun 		       dev->dev->irq);
2964*4882a593Smuzhiyun 		goto out;
2965*4882a593Smuzhiyun 	}
2966*4882a593Smuzhiyun 	/* We are ready to run. */
2967*4882a593Smuzhiyun 	ieee80211_wake_queues(dev->wl->hw);
2968*4882a593Smuzhiyun 	b43legacy_set_status(dev, B43legacy_STAT_STARTED);
2969*4882a593Smuzhiyun 
2970*4882a593Smuzhiyun 	/* Start data flow (TX/RX) */
2971*4882a593Smuzhiyun 	b43legacy_mac_enable(dev);
2972*4882a593Smuzhiyun 	b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask);
2973*4882a593Smuzhiyun 
2974*4882a593Smuzhiyun 	/* Start maintenance work */
2975*4882a593Smuzhiyun 	b43legacy_periodic_tasks_setup(dev);
2976*4882a593Smuzhiyun 
2977*4882a593Smuzhiyun 	b43legacydbg(dev->wl, "Wireless interface started\n");
2978*4882a593Smuzhiyun out:
2979*4882a593Smuzhiyun 	return err;
2980*4882a593Smuzhiyun }
2981*4882a593Smuzhiyun 
2982*4882a593Smuzhiyun /* Get PHY and RADIO versioning numbers */
b43legacy_phy_versioning(struct b43legacy_wldev * dev)2983*4882a593Smuzhiyun static int b43legacy_phy_versioning(struct b43legacy_wldev *dev)
2984*4882a593Smuzhiyun {
2985*4882a593Smuzhiyun 	struct b43legacy_phy *phy = &dev->phy;
2986*4882a593Smuzhiyun 	u32 tmp;
2987*4882a593Smuzhiyun 	u8 analog_type;
2988*4882a593Smuzhiyun 	u8 phy_type;
2989*4882a593Smuzhiyun 	u8 phy_rev;
2990*4882a593Smuzhiyun 	u16 radio_manuf;
2991*4882a593Smuzhiyun 	u16 radio_ver;
2992*4882a593Smuzhiyun 	u16 radio_rev;
2993*4882a593Smuzhiyun 	int unsupported = 0;
2994*4882a593Smuzhiyun 
2995*4882a593Smuzhiyun 	/* Get PHY versioning */
2996*4882a593Smuzhiyun 	tmp = b43legacy_read16(dev, B43legacy_MMIO_PHY_VER);
2997*4882a593Smuzhiyun 	analog_type = (tmp & B43legacy_PHYVER_ANALOG)
2998*4882a593Smuzhiyun 		      >> B43legacy_PHYVER_ANALOG_SHIFT;
2999*4882a593Smuzhiyun 	phy_type = (tmp & B43legacy_PHYVER_TYPE) >> B43legacy_PHYVER_TYPE_SHIFT;
3000*4882a593Smuzhiyun 	phy_rev = (tmp & B43legacy_PHYVER_VERSION);
3001*4882a593Smuzhiyun 	switch (phy_type) {
3002*4882a593Smuzhiyun 	case B43legacy_PHYTYPE_B:
3003*4882a593Smuzhiyun 		if (phy_rev != 2 && phy_rev != 4
3004*4882a593Smuzhiyun 		    && phy_rev != 6 && phy_rev != 7)
3005*4882a593Smuzhiyun 			unsupported = 1;
3006*4882a593Smuzhiyun 		break;
3007*4882a593Smuzhiyun 	case B43legacy_PHYTYPE_G:
3008*4882a593Smuzhiyun 		if (phy_rev > 8)
3009*4882a593Smuzhiyun 			unsupported = 1;
3010*4882a593Smuzhiyun 		break;
3011*4882a593Smuzhiyun 	default:
3012*4882a593Smuzhiyun 		unsupported = 1;
3013*4882a593Smuzhiyun 	}
3014*4882a593Smuzhiyun 	if (unsupported) {
3015*4882a593Smuzhiyun 		b43legacyerr(dev->wl, "FOUND UNSUPPORTED PHY "
3016*4882a593Smuzhiyun 		       "(Analog %u, Type %u, Revision %u)\n",
3017*4882a593Smuzhiyun 		       analog_type, phy_type, phy_rev);
3018*4882a593Smuzhiyun 		return -EOPNOTSUPP;
3019*4882a593Smuzhiyun 	}
3020*4882a593Smuzhiyun 	b43legacydbg(dev->wl, "Found PHY: Analog %u, Type %u, Revision %u\n",
3021*4882a593Smuzhiyun 	       analog_type, phy_type, phy_rev);
3022*4882a593Smuzhiyun 
3023*4882a593Smuzhiyun 
3024*4882a593Smuzhiyun 	/* Get RADIO versioning */
3025*4882a593Smuzhiyun 	if (dev->dev->bus->chip_id == 0x4317) {
3026*4882a593Smuzhiyun 		if (dev->dev->bus->chip_rev == 0)
3027*4882a593Smuzhiyun 			tmp = 0x3205017F;
3028*4882a593Smuzhiyun 		else if (dev->dev->bus->chip_rev == 1)
3029*4882a593Smuzhiyun 			tmp = 0x4205017F;
3030*4882a593Smuzhiyun 		else
3031*4882a593Smuzhiyun 			tmp = 0x5205017F;
3032*4882a593Smuzhiyun 	} else {
3033*4882a593Smuzhiyun 		b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL,
3034*4882a593Smuzhiyun 				  B43legacy_RADIOCTL_ID);
3035*4882a593Smuzhiyun 		tmp = b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_HIGH);
3036*4882a593Smuzhiyun 		tmp <<= 16;
3037*4882a593Smuzhiyun 		b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL,
3038*4882a593Smuzhiyun 				  B43legacy_RADIOCTL_ID);
3039*4882a593Smuzhiyun 		tmp |= b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_LOW);
3040*4882a593Smuzhiyun 	}
3041*4882a593Smuzhiyun 	radio_manuf = (tmp & 0x00000FFF);
3042*4882a593Smuzhiyun 	radio_ver = (tmp & 0x0FFFF000) >> 12;
3043*4882a593Smuzhiyun 	radio_rev = (tmp & 0xF0000000) >> 28;
3044*4882a593Smuzhiyun 	switch (phy_type) {
3045*4882a593Smuzhiyun 	case B43legacy_PHYTYPE_B:
3046*4882a593Smuzhiyun 		if ((radio_ver & 0xFFF0) != 0x2050)
3047*4882a593Smuzhiyun 			unsupported = 1;
3048*4882a593Smuzhiyun 		break;
3049*4882a593Smuzhiyun 	case B43legacy_PHYTYPE_G:
3050*4882a593Smuzhiyun 		if (radio_ver != 0x2050)
3051*4882a593Smuzhiyun 			unsupported = 1;
3052*4882a593Smuzhiyun 		break;
3053*4882a593Smuzhiyun 	default:
3054*4882a593Smuzhiyun 		B43legacy_BUG_ON(1);
3055*4882a593Smuzhiyun 	}
3056*4882a593Smuzhiyun 	if (unsupported) {
3057*4882a593Smuzhiyun 		b43legacyerr(dev->wl, "FOUND UNSUPPORTED RADIO "
3058*4882a593Smuzhiyun 		       "(Manuf 0x%X, Version 0x%X, Revision %u)\n",
3059*4882a593Smuzhiyun 		       radio_manuf, radio_ver, radio_rev);
3060*4882a593Smuzhiyun 		return -EOPNOTSUPP;
3061*4882a593Smuzhiyun 	}
3062*4882a593Smuzhiyun 	b43legacydbg(dev->wl, "Found Radio: Manuf 0x%X, Version 0x%X,"
3063*4882a593Smuzhiyun 		     " Revision %u\n", radio_manuf, radio_ver, radio_rev);
3064*4882a593Smuzhiyun 
3065*4882a593Smuzhiyun 
3066*4882a593Smuzhiyun 	phy->radio_manuf = radio_manuf;
3067*4882a593Smuzhiyun 	phy->radio_ver = radio_ver;
3068*4882a593Smuzhiyun 	phy->radio_rev = radio_rev;
3069*4882a593Smuzhiyun 
3070*4882a593Smuzhiyun 	phy->analog = analog_type;
3071*4882a593Smuzhiyun 	phy->type = phy_type;
3072*4882a593Smuzhiyun 	phy->rev = phy_rev;
3073*4882a593Smuzhiyun 
3074*4882a593Smuzhiyun 	return 0;
3075*4882a593Smuzhiyun }
3076*4882a593Smuzhiyun 
setup_struct_phy_for_init(struct b43legacy_wldev * dev,struct b43legacy_phy * phy)3077*4882a593Smuzhiyun static void setup_struct_phy_for_init(struct b43legacy_wldev *dev,
3078*4882a593Smuzhiyun 				      struct b43legacy_phy *phy)
3079*4882a593Smuzhiyun {
3080*4882a593Smuzhiyun 	struct b43legacy_lopair *lo;
3081*4882a593Smuzhiyun 	int i;
3082*4882a593Smuzhiyun 
3083*4882a593Smuzhiyun 	memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig));
3084*4882a593Smuzhiyun 	memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos));
3085*4882a593Smuzhiyun 
3086*4882a593Smuzhiyun 	/* Assume the radio is enabled. If it's not enabled, the state will
3087*4882a593Smuzhiyun 	 * immediately get fixed on the first periodic work run. */
3088*4882a593Smuzhiyun 	dev->radio_hw_enable = true;
3089*4882a593Smuzhiyun 
3090*4882a593Smuzhiyun 	phy->savedpctlreg = 0xFFFF;
3091*4882a593Smuzhiyun 	phy->aci_enable = false;
3092*4882a593Smuzhiyun 	phy->aci_wlan_automatic = false;
3093*4882a593Smuzhiyun 	phy->aci_hw_rssi = false;
3094*4882a593Smuzhiyun 
3095*4882a593Smuzhiyun 	lo = phy->_lo_pairs;
3096*4882a593Smuzhiyun 	if (lo)
3097*4882a593Smuzhiyun 		memset(lo, 0, sizeof(struct b43legacy_lopair) *
3098*4882a593Smuzhiyun 				     B43legacy_LO_COUNT);
3099*4882a593Smuzhiyun 	phy->max_lb_gain = 0;
3100*4882a593Smuzhiyun 	phy->trsw_rx_gain = 0;
3101*4882a593Smuzhiyun 
3102*4882a593Smuzhiyun 	/* Set default attenuation values. */
3103*4882a593Smuzhiyun 	phy->bbatt = b43legacy_default_baseband_attenuation(dev);
3104*4882a593Smuzhiyun 	phy->rfatt = b43legacy_default_radio_attenuation(dev);
3105*4882a593Smuzhiyun 	phy->txctl1 = b43legacy_default_txctl1(dev);
3106*4882a593Smuzhiyun 	phy->txpwr_offset = 0;
3107*4882a593Smuzhiyun 
3108*4882a593Smuzhiyun 	/* NRSSI */
3109*4882a593Smuzhiyun 	phy->nrssislope = 0;
3110*4882a593Smuzhiyun 	for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++)
3111*4882a593Smuzhiyun 		phy->nrssi[i] = -1000;
3112*4882a593Smuzhiyun 	for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++)
3113*4882a593Smuzhiyun 		phy->nrssi_lt[i] = i;
3114*4882a593Smuzhiyun 
3115*4882a593Smuzhiyun 	phy->lofcal = 0xFFFF;
3116*4882a593Smuzhiyun 	phy->initval = 0xFFFF;
3117*4882a593Smuzhiyun 
3118*4882a593Smuzhiyun 	phy->interfmode = B43legacy_INTERFMODE_NONE;
3119*4882a593Smuzhiyun 	phy->channel = 0xFF;
3120*4882a593Smuzhiyun }
3121*4882a593Smuzhiyun 
setup_struct_wldev_for_init(struct b43legacy_wldev * dev)3122*4882a593Smuzhiyun static void setup_struct_wldev_for_init(struct b43legacy_wldev *dev)
3123*4882a593Smuzhiyun {
3124*4882a593Smuzhiyun 	/* Flags */
3125*4882a593Smuzhiyun 	dev->dfq_valid = false;
3126*4882a593Smuzhiyun 
3127*4882a593Smuzhiyun 	/* Stats */
3128*4882a593Smuzhiyun 	memset(&dev->stats, 0, sizeof(dev->stats));
3129*4882a593Smuzhiyun 
3130*4882a593Smuzhiyun 	setup_struct_phy_for_init(dev, &dev->phy);
3131*4882a593Smuzhiyun 
3132*4882a593Smuzhiyun 	/* IRQ related flags */
3133*4882a593Smuzhiyun 	dev->irq_reason = 0;
3134*4882a593Smuzhiyun 	memset(dev->dma_reason, 0, sizeof(dev->dma_reason));
3135*4882a593Smuzhiyun 	dev->irq_mask = B43legacy_IRQ_MASKTEMPLATE;
3136*4882a593Smuzhiyun 
3137*4882a593Smuzhiyun 	dev->mac_suspended = 1;
3138*4882a593Smuzhiyun 
3139*4882a593Smuzhiyun 	/* Noise calculation context */
3140*4882a593Smuzhiyun 	memset(&dev->noisecalc, 0, sizeof(dev->noisecalc));
3141*4882a593Smuzhiyun }
3142*4882a593Smuzhiyun 
b43legacy_set_synth_pu_delay(struct b43legacy_wldev * dev,bool idle)3143*4882a593Smuzhiyun static void b43legacy_set_synth_pu_delay(struct b43legacy_wldev *dev,
3144*4882a593Smuzhiyun 					  bool idle) {
3145*4882a593Smuzhiyun 	u16 pu_delay = 1050;
3146*4882a593Smuzhiyun 
3147*4882a593Smuzhiyun 	if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_ADHOC) || idle)
3148*4882a593Smuzhiyun 		pu_delay = 500;
3149*4882a593Smuzhiyun 	if ((dev->phy.radio_ver == 0x2050) && (dev->phy.radio_rev == 8))
3150*4882a593Smuzhiyun 		pu_delay = max(pu_delay, (u16)2400);
3151*4882a593Smuzhiyun 
3152*4882a593Smuzhiyun 	b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3153*4882a593Smuzhiyun 			      B43legacy_SHM_SH_SPUWKUP, pu_delay);
3154*4882a593Smuzhiyun }
3155*4882a593Smuzhiyun 
3156*4882a593Smuzhiyun /* Set the TSF CFP pre-TargetBeaconTransmissionTime. */
b43legacy_set_pretbtt(struct b43legacy_wldev * dev)3157*4882a593Smuzhiyun static void b43legacy_set_pretbtt(struct b43legacy_wldev *dev)
3158*4882a593Smuzhiyun {
3159*4882a593Smuzhiyun 	u16 pretbtt;
3160*4882a593Smuzhiyun 
3161*4882a593Smuzhiyun 	/* The time value is in microseconds. */
3162*4882a593Smuzhiyun 	if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_ADHOC))
3163*4882a593Smuzhiyun 		pretbtt = 2;
3164*4882a593Smuzhiyun 	else
3165*4882a593Smuzhiyun 		pretbtt = 250;
3166*4882a593Smuzhiyun 	b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3167*4882a593Smuzhiyun 			      B43legacy_SHM_SH_PRETBTT, pretbtt);
3168*4882a593Smuzhiyun 	b43legacy_write16(dev, B43legacy_MMIO_TSF_CFP_PRETBTT, pretbtt);
3169*4882a593Smuzhiyun }
3170*4882a593Smuzhiyun 
3171*4882a593Smuzhiyun /* Shutdown a wireless core */
3172*4882a593Smuzhiyun /* Locking: wl->mutex */
b43legacy_wireless_core_exit(struct b43legacy_wldev * dev)3173*4882a593Smuzhiyun static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev)
3174*4882a593Smuzhiyun {
3175*4882a593Smuzhiyun 	struct b43legacy_phy *phy = &dev->phy;
3176*4882a593Smuzhiyun 	u32 macctl;
3177*4882a593Smuzhiyun 
3178*4882a593Smuzhiyun 	B43legacy_WARN_ON(b43legacy_status(dev) > B43legacy_STAT_INITIALIZED);
3179*4882a593Smuzhiyun 	if (b43legacy_status(dev) != B43legacy_STAT_INITIALIZED)
3180*4882a593Smuzhiyun 		return;
3181*4882a593Smuzhiyun 	b43legacy_set_status(dev, B43legacy_STAT_UNINIT);
3182*4882a593Smuzhiyun 
3183*4882a593Smuzhiyun 	/* Stop the microcode PSM. */
3184*4882a593Smuzhiyun 	macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
3185*4882a593Smuzhiyun 	macctl &= ~B43legacy_MACCTL_PSM_RUN;
3186*4882a593Smuzhiyun 	macctl |= B43legacy_MACCTL_PSM_JMP0;
3187*4882a593Smuzhiyun 	b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
3188*4882a593Smuzhiyun 
3189*4882a593Smuzhiyun 	b43legacy_leds_exit(dev);
3190*4882a593Smuzhiyun 	b43legacy_rng_exit(dev->wl);
3191*4882a593Smuzhiyun 	b43legacy_pio_free(dev);
3192*4882a593Smuzhiyun 	b43legacy_dma_free(dev);
3193*4882a593Smuzhiyun 	b43legacy_chip_exit(dev);
3194*4882a593Smuzhiyun 	b43legacy_radio_turn_off(dev, 1);
3195*4882a593Smuzhiyun 	b43legacy_switch_analog(dev, 0);
3196*4882a593Smuzhiyun 	if (phy->dyn_tssi_tbl)
3197*4882a593Smuzhiyun 		kfree(phy->tssi2dbm);
3198*4882a593Smuzhiyun 	kfree(phy->lo_control);
3199*4882a593Smuzhiyun 	phy->lo_control = NULL;
3200*4882a593Smuzhiyun 	if (dev->wl->current_beacon) {
3201*4882a593Smuzhiyun 		dev_kfree_skb_any(dev->wl->current_beacon);
3202*4882a593Smuzhiyun 		dev->wl->current_beacon = NULL;
3203*4882a593Smuzhiyun 	}
3204*4882a593Smuzhiyun 
3205*4882a593Smuzhiyun 	ssb_device_disable(dev->dev, 0);
3206*4882a593Smuzhiyun 	ssb_bus_may_powerdown(dev->dev->bus);
3207*4882a593Smuzhiyun }
3208*4882a593Smuzhiyun 
prepare_phy_data_for_init(struct b43legacy_wldev * dev)3209*4882a593Smuzhiyun static void prepare_phy_data_for_init(struct b43legacy_wldev *dev)
3210*4882a593Smuzhiyun {
3211*4882a593Smuzhiyun 	struct b43legacy_phy *phy = &dev->phy;
3212*4882a593Smuzhiyun 	int i;
3213*4882a593Smuzhiyun 
3214*4882a593Smuzhiyun 	/* Set default attenuation values. */
3215*4882a593Smuzhiyun 	phy->bbatt = b43legacy_default_baseband_attenuation(dev);
3216*4882a593Smuzhiyun 	phy->rfatt = b43legacy_default_radio_attenuation(dev);
3217*4882a593Smuzhiyun 	phy->txctl1 = b43legacy_default_txctl1(dev);
3218*4882a593Smuzhiyun 	phy->txctl2 = 0xFFFF;
3219*4882a593Smuzhiyun 	phy->txpwr_offset = 0;
3220*4882a593Smuzhiyun 
3221*4882a593Smuzhiyun 	/* NRSSI */
3222*4882a593Smuzhiyun 	phy->nrssislope = 0;
3223*4882a593Smuzhiyun 	for (i = 0; i < ARRAY_SIZE(phy->nrssi); i++)
3224*4882a593Smuzhiyun 		phy->nrssi[i] = -1000;
3225*4882a593Smuzhiyun 	for (i = 0; i < ARRAY_SIZE(phy->nrssi_lt); i++)
3226*4882a593Smuzhiyun 		phy->nrssi_lt[i] = i;
3227*4882a593Smuzhiyun 
3228*4882a593Smuzhiyun 	phy->lofcal = 0xFFFF;
3229*4882a593Smuzhiyun 	phy->initval = 0xFFFF;
3230*4882a593Smuzhiyun 
3231*4882a593Smuzhiyun 	phy->aci_enable = false;
3232*4882a593Smuzhiyun 	phy->aci_wlan_automatic = false;
3233*4882a593Smuzhiyun 	phy->aci_hw_rssi = false;
3234*4882a593Smuzhiyun 
3235*4882a593Smuzhiyun 	phy->antenna_diversity = 0xFFFF;
3236*4882a593Smuzhiyun 	memset(phy->minlowsig, 0xFF, sizeof(phy->minlowsig));
3237*4882a593Smuzhiyun 	memset(phy->minlowsigpos, 0, sizeof(phy->minlowsigpos));
3238*4882a593Smuzhiyun 
3239*4882a593Smuzhiyun 	/* Flags */
3240*4882a593Smuzhiyun 	phy->calibrated = 0;
3241*4882a593Smuzhiyun 
3242*4882a593Smuzhiyun 	if (phy->_lo_pairs)
3243*4882a593Smuzhiyun 		memset(phy->_lo_pairs, 0,
3244*4882a593Smuzhiyun 		       sizeof(struct b43legacy_lopair) * B43legacy_LO_COUNT);
3245*4882a593Smuzhiyun 	memset(phy->loopback_gain, 0, sizeof(phy->loopback_gain));
3246*4882a593Smuzhiyun }
3247*4882a593Smuzhiyun 
3248*4882a593Smuzhiyun /* Initialize a wireless core */
b43legacy_wireless_core_init(struct b43legacy_wldev * dev)3249*4882a593Smuzhiyun static int b43legacy_wireless_core_init(struct b43legacy_wldev *dev)
3250*4882a593Smuzhiyun {
3251*4882a593Smuzhiyun 	struct b43legacy_wl *wl = dev->wl;
3252*4882a593Smuzhiyun 	struct ssb_bus *bus = dev->dev->bus;
3253*4882a593Smuzhiyun 	struct b43legacy_phy *phy = &dev->phy;
3254*4882a593Smuzhiyun 	struct ssb_sprom *sprom = &dev->dev->bus->sprom;
3255*4882a593Smuzhiyun 	int err;
3256*4882a593Smuzhiyun 	u32 hf;
3257*4882a593Smuzhiyun 	u32 tmp;
3258*4882a593Smuzhiyun 
3259*4882a593Smuzhiyun 	B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT);
3260*4882a593Smuzhiyun 
3261*4882a593Smuzhiyun 	err = ssb_bus_powerup(bus, 0);
3262*4882a593Smuzhiyun 	if (err)
3263*4882a593Smuzhiyun 		goto out;
3264*4882a593Smuzhiyun 	if (!ssb_device_is_enabled(dev->dev)) {
3265*4882a593Smuzhiyun 		tmp = phy->gmode ? B43legacy_TMSLOW_GMODE : 0;
3266*4882a593Smuzhiyun 		b43legacy_wireless_core_reset(dev, tmp);
3267*4882a593Smuzhiyun 	}
3268*4882a593Smuzhiyun 
3269*4882a593Smuzhiyun 	if ((phy->type == B43legacy_PHYTYPE_B) ||
3270*4882a593Smuzhiyun 	    (phy->type == B43legacy_PHYTYPE_G)) {
3271*4882a593Smuzhiyun 		phy->_lo_pairs = kcalloc(B43legacy_LO_COUNT,
3272*4882a593Smuzhiyun 					 sizeof(struct b43legacy_lopair),
3273*4882a593Smuzhiyun 					 GFP_KERNEL);
3274*4882a593Smuzhiyun 		if (!phy->_lo_pairs)
3275*4882a593Smuzhiyun 			return -ENOMEM;
3276*4882a593Smuzhiyun 	}
3277*4882a593Smuzhiyun 	setup_struct_wldev_for_init(dev);
3278*4882a593Smuzhiyun 
3279*4882a593Smuzhiyun 	err = b43legacy_phy_init_tssi2dbm_table(dev);
3280*4882a593Smuzhiyun 	if (err)
3281*4882a593Smuzhiyun 		goto err_kfree_lo_control;
3282*4882a593Smuzhiyun 
3283*4882a593Smuzhiyun 	/* Enable IRQ routing to this device. */
3284*4882a593Smuzhiyun 	ssb_pcicore_dev_irqvecs_enable(&bus->pcicore, dev->dev);
3285*4882a593Smuzhiyun 
3286*4882a593Smuzhiyun 	prepare_phy_data_for_init(dev);
3287*4882a593Smuzhiyun 	b43legacy_phy_calibrate(dev);
3288*4882a593Smuzhiyun 	err = b43legacy_chip_init(dev);
3289*4882a593Smuzhiyun 	if (err)
3290*4882a593Smuzhiyun 		goto err_kfree_tssitbl;
3291*4882a593Smuzhiyun 	b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3292*4882a593Smuzhiyun 			      B43legacy_SHM_SH_WLCOREREV,
3293*4882a593Smuzhiyun 			      dev->dev->id.revision);
3294*4882a593Smuzhiyun 	hf = b43legacy_hf_read(dev);
3295*4882a593Smuzhiyun 	if (phy->type == B43legacy_PHYTYPE_G) {
3296*4882a593Smuzhiyun 		hf |= B43legacy_HF_SYMW;
3297*4882a593Smuzhiyun 		if (phy->rev == 1)
3298*4882a593Smuzhiyun 			hf |= B43legacy_HF_GDCW;
3299*4882a593Smuzhiyun 		if (sprom->boardflags_lo & B43legacy_BFL_PACTRL)
3300*4882a593Smuzhiyun 			hf |= B43legacy_HF_OFDMPABOOST;
3301*4882a593Smuzhiyun 	} else if (phy->type == B43legacy_PHYTYPE_B) {
3302*4882a593Smuzhiyun 		hf |= B43legacy_HF_SYMW;
3303*4882a593Smuzhiyun 		if (phy->rev >= 2 && phy->radio_ver == 0x2050)
3304*4882a593Smuzhiyun 			hf &= ~B43legacy_HF_GDCW;
3305*4882a593Smuzhiyun 	}
3306*4882a593Smuzhiyun 	b43legacy_hf_write(dev, hf);
3307*4882a593Smuzhiyun 
3308*4882a593Smuzhiyun 	b43legacy_set_retry_limits(dev,
3309*4882a593Smuzhiyun 				   B43legacy_DEFAULT_SHORT_RETRY_LIMIT,
3310*4882a593Smuzhiyun 				   B43legacy_DEFAULT_LONG_RETRY_LIMIT);
3311*4882a593Smuzhiyun 
3312*4882a593Smuzhiyun 	b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3313*4882a593Smuzhiyun 			      0x0044, 3);
3314*4882a593Smuzhiyun 	b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3315*4882a593Smuzhiyun 			      0x0046, 2);
3316*4882a593Smuzhiyun 
3317*4882a593Smuzhiyun 	/* Disable sending probe responses from firmware.
3318*4882a593Smuzhiyun 	 * Setting the MaxTime to one usec will always trigger
3319*4882a593Smuzhiyun 	 * a timeout, so we never send any probe resp.
3320*4882a593Smuzhiyun 	 * A timeout of zero is infinite. */
3321*4882a593Smuzhiyun 	b43legacy_shm_write16(dev, B43legacy_SHM_SHARED,
3322*4882a593Smuzhiyun 			      B43legacy_SHM_SH_PRMAXTIME, 1);
3323*4882a593Smuzhiyun 
3324*4882a593Smuzhiyun 	b43legacy_rate_memory_init(dev);
3325*4882a593Smuzhiyun 
3326*4882a593Smuzhiyun 	/* Minimum Contention Window */
3327*4882a593Smuzhiyun 	if (phy->type == B43legacy_PHYTYPE_B)
3328*4882a593Smuzhiyun 		b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3329*4882a593Smuzhiyun 				      0x0003, 31);
3330*4882a593Smuzhiyun 	else
3331*4882a593Smuzhiyun 		b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3332*4882a593Smuzhiyun 				      0x0003, 15);
3333*4882a593Smuzhiyun 	/* Maximum Contention Window */
3334*4882a593Smuzhiyun 	b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS,
3335*4882a593Smuzhiyun 			      0x0004, 1023);
3336*4882a593Smuzhiyun 
3337*4882a593Smuzhiyun 	do {
3338*4882a593Smuzhiyun 		if (b43legacy_using_pio(dev))
3339*4882a593Smuzhiyun 			err = b43legacy_pio_init(dev);
3340*4882a593Smuzhiyun 		else {
3341*4882a593Smuzhiyun 			err = b43legacy_dma_init(dev);
3342*4882a593Smuzhiyun 			if (!err)
3343*4882a593Smuzhiyun 				b43legacy_qos_init(dev);
3344*4882a593Smuzhiyun 		}
3345*4882a593Smuzhiyun 	} while (err == -EAGAIN);
3346*4882a593Smuzhiyun 	if (err)
3347*4882a593Smuzhiyun 		goto err_chip_exit;
3348*4882a593Smuzhiyun 
3349*4882a593Smuzhiyun 	b43legacy_set_synth_pu_delay(dev, 1);
3350*4882a593Smuzhiyun 
3351*4882a593Smuzhiyun 	ssb_bus_powerup(bus, 1); /* Enable dynamic PCTL */
3352*4882a593Smuzhiyun 	b43legacy_upload_card_macaddress(dev);
3353*4882a593Smuzhiyun 	b43legacy_security_init(dev);
3354*4882a593Smuzhiyun 	b43legacy_rng_init(wl);
3355*4882a593Smuzhiyun 
3356*4882a593Smuzhiyun 	ieee80211_wake_queues(dev->wl->hw);
3357*4882a593Smuzhiyun 	b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED);
3358*4882a593Smuzhiyun 
3359*4882a593Smuzhiyun 	b43legacy_leds_init(dev);
3360*4882a593Smuzhiyun out:
3361*4882a593Smuzhiyun 	return err;
3362*4882a593Smuzhiyun 
3363*4882a593Smuzhiyun err_chip_exit:
3364*4882a593Smuzhiyun 	b43legacy_chip_exit(dev);
3365*4882a593Smuzhiyun err_kfree_tssitbl:
3366*4882a593Smuzhiyun 	if (phy->dyn_tssi_tbl)
3367*4882a593Smuzhiyun 		kfree(phy->tssi2dbm);
3368*4882a593Smuzhiyun err_kfree_lo_control:
3369*4882a593Smuzhiyun 	kfree(phy->lo_control);
3370*4882a593Smuzhiyun 	phy->lo_control = NULL;
3371*4882a593Smuzhiyun 	ssb_bus_may_powerdown(bus);
3372*4882a593Smuzhiyun 	B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT);
3373*4882a593Smuzhiyun 	return err;
3374*4882a593Smuzhiyun }
3375*4882a593Smuzhiyun 
b43legacy_op_add_interface(struct ieee80211_hw * hw,struct ieee80211_vif * vif)3376*4882a593Smuzhiyun static int b43legacy_op_add_interface(struct ieee80211_hw *hw,
3377*4882a593Smuzhiyun 				      struct ieee80211_vif *vif)
3378*4882a593Smuzhiyun {
3379*4882a593Smuzhiyun 	struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3380*4882a593Smuzhiyun 	struct b43legacy_wldev *dev;
3381*4882a593Smuzhiyun 	unsigned long flags;
3382*4882a593Smuzhiyun 	int err = -EOPNOTSUPP;
3383*4882a593Smuzhiyun 
3384*4882a593Smuzhiyun 	/* TODO: allow WDS/AP devices to coexist */
3385*4882a593Smuzhiyun 
3386*4882a593Smuzhiyun 	if (vif->type != NL80211_IFTYPE_AP &&
3387*4882a593Smuzhiyun 	    vif->type != NL80211_IFTYPE_STATION &&
3388*4882a593Smuzhiyun 	    vif->type != NL80211_IFTYPE_WDS &&
3389*4882a593Smuzhiyun 	    vif->type != NL80211_IFTYPE_ADHOC)
3390*4882a593Smuzhiyun 		return -EOPNOTSUPP;
3391*4882a593Smuzhiyun 
3392*4882a593Smuzhiyun 	mutex_lock(&wl->mutex);
3393*4882a593Smuzhiyun 	if (wl->operating)
3394*4882a593Smuzhiyun 		goto out_mutex_unlock;
3395*4882a593Smuzhiyun 
3396*4882a593Smuzhiyun 	b43legacydbg(wl, "Adding Interface type %d\n", vif->type);
3397*4882a593Smuzhiyun 
3398*4882a593Smuzhiyun 	dev = wl->current_dev;
3399*4882a593Smuzhiyun 	wl->operating = true;
3400*4882a593Smuzhiyun 	wl->vif = vif;
3401*4882a593Smuzhiyun 	wl->if_type = vif->type;
3402*4882a593Smuzhiyun 	memcpy(wl->mac_addr, vif->addr, ETH_ALEN);
3403*4882a593Smuzhiyun 
3404*4882a593Smuzhiyun 	spin_lock_irqsave(&wl->irq_lock, flags);
3405*4882a593Smuzhiyun 	b43legacy_adjust_opmode(dev);
3406*4882a593Smuzhiyun 	b43legacy_set_pretbtt(dev);
3407*4882a593Smuzhiyun 	b43legacy_set_synth_pu_delay(dev, 0);
3408*4882a593Smuzhiyun 	b43legacy_upload_card_macaddress(dev);
3409*4882a593Smuzhiyun 	spin_unlock_irqrestore(&wl->irq_lock, flags);
3410*4882a593Smuzhiyun 
3411*4882a593Smuzhiyun 	err = 0;
3412*4882a593Smuzhiyun  out_mutex_unlock:
3413*4882a593Smuzhiyun 	mutex_unlock(&wl->mutex);
3414*4882a593Smuzhiyun 
3415*4882a593Smuzhiyun 	return err;
3416*4882a593Smuzhiyun }
3417*4882a593Smuzhiyun 
b43legacy_op_remove_interface(struct ieee80211_hw * hw,struct ieee80211_vif * vif)3418*4882a593Smuzhiyun static void b43legacy_op_remove_interface(struct ieee80211_hw *hw,
3419*4882a593Smuzhiyun 					  struct ieee80211_vif *vif)
3420*4882a593Smuzhiyun {
3421*4882a593Smuzhiyun 	struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3422*4882a593Smuzhiyun 	struct b43legacy_wldev *dev = wl->current_dev;
3423*4882a593Smuzhiyun 	unsigned long flags;
3424*4882a593Smuzhiyun 
3425*4882a593Smuzhiyun 	b43legacydbg(wl, "Removing Interface type %d\n", vif->type);
3426*4882a593Smuzhiyun 
3427*4882a593Smuzhiyun 	mutex_lock(&wl->mutex);
3428*4882a593Smuzhiyun 
3429*4882a593Smuzhiyun 	B43legacy_WARN_ON(!wl->operating);
3430*4882a593Smuzhiyun 	B43legacy_WARN_ON(wl->vif != vif);
3431*4882a593Smuzhiyun 	wl->vif = NULL;
3432*4882a593Smuzhiyun 
3433*4882a593Smuzhiyun 	wl->operating = false;
3434*4882a593Smuzhiyun 
3435*4882a593Smuzhiyun 	spin_lock_irqsave(&wl->irq_lock, flags);
3436*4882a593Smuzhiyun 	b43legacy_adjust_opmode(dev);
3437*4882a593Smuzhiyun 	eth_zero_addr(wl->mac_addr);
3438*4882a593Smuzhiyun 	b43legacy_upload_card_macaddress(dev);
3439*4882a593Smuzhiyun 	spin_unlock_irqrestore(&wl->irq_lock, flags);
3440*4882a593Smuzhiyun 
3441*4882a593Smuzhiyun 	mutex_unlock(&wl->mutex);
3442*4882a593Smuzhiyun }
3443*4882a593Smuzhiyun 
b43legacy_op_start(struct ieee80211_hw * hw)3444*4882a593Smuzhiyun static int b43legacy_op_start(struct ieee80211_hw *hw)
3445*4882a593Smuzhiyun {
3446*4882a593Smuzhiyun 	struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3447*4882a593Smuzhiyun 	struct b43legacy_wldev *dev = wl->current_dev;
3448*4882a593Smuzhiyun 	int did_init = 0;
3449*4882a593Smuzhiyun 	int err = 0;
3450*4882a593Smuzhiyun 
3451*4882a593Smuzhiyun 	/* Kill all old instance specific information to make sure
3452*4882a593Smuzhiyun 	 * the card won't use it in the short timeframe between start
3453*4882a593Smuzhiyun 	 * and mac80211 reconfiguring it. */
3454*4882a593Smuzhiyun 	eth_zero_addr(wl->bssid);
3455*4882a593Smuzhiyun 	eth_zero_addr(wl->mac_addr);
3456*4882a593Smuzhiyun 	wl->filter_flags = 0;
3457*4882a593Smuzhiyun 	wl->beacon0_uploaded = false;
3458*4882a593Smuzhiyun 	wl->beacon1_uploaded = false;
3459*4882a593Smuzhiyun 	wl->beacon_templates_virgin = true;
3460*4882a593Smuzhiyun 	wl->radio_enabled = true;
3461*4882a593Smuzhiyun 
3462*4882a593Smuzhiyun 	mutex_lock(&wl->mutex);
3463*4882a593Smuzhiyun 
3464*4882a593Smuzhiyun 	if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED) {
3465*4882a593Smuzhiyun 		err = b43legacy_wireless_core_init(dev);
3466*4882a593Smuzhiyun 		if (err)
3467*4882a593Smuzhiyun 			goto out_mutex_unlock;
3468*4882a593Smuzhiyun 		did_init = 1;
3469*4882a593Smuzhiyun 	}
3470*4882a593Smuzhiyun 
3471*4882a593Smuzhiyun 	if (b43legacy_status(dev) < B43legacy_STAT_STARTED) {
3472*4882a593Smuzhiyun 		err = b43legacy_wireless_core_start(dev);
3473*4882a593Smuzhiyun 		if (err) {
3474*4882a593Smuzhiyun 			if (did_init)
3475*4882a593Smuzhiyun 				b43legacy_wireless_core_exit(dev);
3476*4882a593Smuzhiyun 			goto out_mutex_unlock;
3477*4882a593Smuzhiyun 		}
3478*4882a593Smuzhiyun 	}
3479*4882a593Smuzhiyun 
3480*4882a593Smuzhiyun 	wiphy_rfkill_start_polling(hw->wiphy);
3481*4882a593Smuzhiyun 
3482*4882a593Smuzhiyun out_mutex_unlock:
3483*4882a593Smuzhiyun 	mutex_unlock(&wl->mutex);
3484*4882a593Smuzhiyun 
3485*4882a593Smuzhiyun 	return err;
3486*4882a593Smuzhiyun }
3487*4882a593Smuzhiyun 
b43legacy_op_stop(struct ieee80211_hw * hw)3488*4882a593Smuzhiyun static void b43legacy_op_stop(struct ieee80211_hw *hw)
3489*4882a593Smuzhiyun {
3490*4882a593Smuzhiyun 	struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3491*4882a593Smuzhiyun 	struct b43legacy_wldev *dev = wl->current_dev;
3492*4882a593Smuzhiyun 
3493*4882a593Smuzhiyun 	cancel_work_sync(&(wl->beacon_update_trigger));
3494*4882a593Smuzhiyun 
3495*4882a593Smuzhiyun 	mutex_lock(&wl->mutex);
3496*4882a593Smuzhiyun 	if (b43legacy_status(dev) >= B43legacy_STAT_STARTED)
3497*4882a593Smuzhiyun 		b43legacy_wireless_core_stop(dev);
3498*4882a593Smuzhiyun 	b43legacy_wireless_core_exit(dev);
3499*4882a593Smuzhiyun 	wl->radio_enabled = false;
3500*4882a593Smuzhiyun 	mutex_unlock(&wl->mutex);
3501*4882a593Smuzhiyun }
3502*4882a593Smuzhiyun 
b43legacy_op_beacon_set_tim(struct ieee80211_hw * hw,struct ieee80211_sta * sta,bool set)3503*4882a593Smuzhiyun static int b43legacy_op_beacon_set_tim(struct ieee80211_hw *hw,
3504*4882a593Smuzhiyun 				       struct ieee80211_sta *sta, bool set)
3505*4882a593Smuzhiyun {
3506*4882a593Smuzhiyun 	struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3507*4882a593Smuzhiyun 	unsigned long flags;
3508*4882a593Smuzhiyun 
3509*4882a593Smuzhiyun 	spin_lock_irqsave(&wl->irq_lock, flags);
3510*4882a593Smuzhiyun 	b43legacy_update_templates(wl);
3511*4882a593Smuzhiyun 	spin_unlock_irqrestore(&wl->irq_lock, flags);
3512*4882a593Smuzhiyun 
3513*4882a593Smuzhiyun 	return 0;
3514*4882a593Smuzhiyun }
3515*4882a593Smuzhiyun 
b43legacy_op_get_survey(struct ieee80211_hw * hw,int idx,struct survey_info * survey)3516*4882a593Smuzhiyun static int b43legacy_op_get_survey(struct ieee80211_hw *hw, int idx,
3517*4882a593Smuzhiyun 				   struct survey_info *survey)
3518*4882a593Smuzhiyun {
3519*4882a593Smuzhiyun 	struct b43legacy_wl *wl = hw_to_b43legacy_wl(hw);
3520*4882a593Smuzhiyun 	struct b43legacy_wldev *dev = wl->current_dev;
3521*4882a593Smuzhiyun 	struct ieee80211_conf *conf = &hw->conf;
3522*4882a593Smuzhiyun 
3523*4882a593Smuzhiyun 	if (idx != 0)
3524*4882a593Smuzhiyun 		return -ENOENT;
3525*4882a593Smuzhiyun 
3526*4882a593Smuzhiyun 	survey->channel = conf->chandef.chan;
3527*4882a593Smuzhiyun 	survey->filled = SURVEY_INFO_NOISE_DBM;
3528*4882a593Smuzhiyun 	survey->noise = dev->stats.link_noise;
3529*4882a593Smuzhiyun 
3530*4882a593Smuzhiyun 	return 0;
3531*4882a593Smuzhiyun }
3532*4882a593Smuzhiyun 
3533*4882a593Smuzhiyun static const struct ieee80211_ops b43legacy_hw_ops = {
3534*4882a593Smuzhiyun 	.tx			= b43legacy_op_tx,
3535*4882a593Smuzhiyun 	.conf_tx		= b43legacy_op_conf_tx,
3536*4882a593Smuzhiyun 	.add_interface		= b43legacy_op_add_interface,
3537*4882a593Smuzhiyun 	.remove_interface	= b43legacy_op_remove_interface,
3538*4882a593Smuzhiyun 	.config			= b43legacy_op_dev_config,
3539*4882a593Smuzhiyun 	.bss_info_changed	= b43legacy_op_bss_info_changed,
3540*4882a593Smuzhiyun 	.configure_filter	= b43legacy_op_configure_filter,
3541*4882a593Smuzhiyun 	.get_stats		= b43legacy_op_get_stats,
3542*4882a593Smuzhiyun 	.start			= b43legacy_op_start,
3543*4882a593Smuzhiyun 	.stop			= b43legacy_op_stop,
3544*4882a593Smuzhiyun 	.set_tim		= b43legacy_op_beacon_set_tim,
3545*4882a593Smuzhiyun 	.get_survey		= b43legacy_op_get_survey,
3546*4882a593Smuzhiyun 	.rfkill_poll		= b43legacy_rfkill_poll,
3547*4882a593Smuzhiyun };
3548*4882a593Smuzhiyun 
3549*4882a593Smuzhiyun /* Hard-reset the chip. Do not call this directly.
3550*4882a593Smuzhiyun  * Use b43legacy_controller_restart()
3551*4882a593Smuzhiyun  */
b43legacy_chip_reset(struct work_struct * work)3552*4882a593Smuzhiyun static void b43legacy_chip_reset(struct work_struct *work)
3553*4882a593Smuzhiyun {
3554*4882a593Smuzhiyun 	struct b43legacy_wldev *dev =
3555*4882a593Smuzhiyun 		container_of(work, struct b43legacy_wldev, restart_work);
3556*4882a593Smuzhiyun 	struct b43legacy_wl *wl = dev->wl;
3557*4882a593Smuzhiyun 	int err = 0;
3558*4882a593Smuzhiyun 	int prev_status;
3559*4882a593Smuzhiyun 
3560*4882a593Smuzhiyun 	mutex_lock(&wl->mutex);
3561*4882a593Smuzhiyun 
3562*4882a593Smuzhiyun 	prev_status = b43legacy_status(dev);
3563*4882a593Smuzhiyun 	/* Bring the device down... */
3564*4882a593Smuzhiyun 	if (prev_status >= B43legacy_STAT_STARTED)
3565*4882a593Smuzhiyun 		b43legacy_wireless_core_stop(dev);
3566*4882a593Smuzhiyun 	if (prev_status >= B43legacy_STAT_INITIALIZED)
3567*4882a593Smuzhiyun 		b43legacy_wireless_core_exit(dev);
3568*4882a593Smuzhiyun 
3569*4882a593Smuzhiyun 	/* ...and up again. */
3570*4882a593Smuzhiyun 	if (prev_status >= B43legacy_STAT_INITIALIZED) {
3571*4882a593Smuzhiyun 		err = b43legacy_wireless_core_init(dev);
3572*4882a593Smuzhiyun 		if (err)
3573*4882a593Smuzhiyun 			goto out;
3574*4882a593Smuzhiyun 	}
3575*4882a593Smuzhiyun 	if (prev_status >= B43legacy_STAT_STARTED) {
3576*4882a593Smuzhiyun 		err = b43legacy_wireless_core_start(dev);
3577*4882a593Smuzhiyun 		if (err) {
3578*4882a593Smuzhiyun 			b43legacy_wireless_core_exit(dev);
3579*4882a593Smuzhiyun 			goto out;
3580*4882a593Smuzhiyun 		}
3581*4882a593Smuzhiyun 	}
3582*4882a593Smuzhiyun out:
3583*4882a593Smuzhiyun 	if (err)
3584*4882a593Smuzhiyun 		wl->current_dev = NULL; /* Failed to init the dev. */
3585*4882a593Smuzhiyun 	mutex_unlock(&wl->mutex);
3586*4882a593Smuzhiyun 	if (err)
3587*4882a593Smuzhiyun 		b43legacyerr(wl, "Controller restart FAILED\n");
3588*4882a593Smuzhiyun 	else
3589*4882a593Smuzhiyun 		b43legacyinfo(wl, "Controller restarted\n");
3590*4882a593Smuzhiyun }
3591*4882a593Smuzhiyun 
b43legacy_setup_modes(struct b43legacy_wldev * dev,int have_bphy,int have_gphy)3592*4882a593Smuzhiyun static int b43legacy_setup_modes(struct b43legacy_wldev *dev,
3593*4882a593Smuzhiyun 				 int have_bphy,
3594*4882a593Smuzhiyun 				 int have_gphy)
3595*4882a593Smuzhiyun {
3596*4882a593Smuzhiyun 	struct ieee80211_hw *hw = dev->wl->hw;
3597*4882a593Smuzhiyun 	struct b43legacy_phy *phy = &dev->phy;
3598*4882a593Smuzhiyun 
3599*4882a593Smuzhiyun 	phy->possible_phymodes = 0;
3600*4882a593Smuzhiyun 	if (have_bphy) {
3601*4882a593Smuzhiyun 		hw->wiphy->bands[NL80211_BAND_2GHZ] =
3602*4882a593Smuzhiyun 			&b43legacy_band_2GHz_BPHY;
3603*4882a593Smuzhiyun 		phy->possible_phymodes |= B43legacy_PHYMODE_B;
3604*4882a593Smuzhiyun 	}
3605*4882a593Smuzhiyun 
3606*4882a593Smuzhiyun 	if (have_gphy) {
3607*4882a593Smuzhiyun 		hw->wiphy->bands[NL80211_BAND_2GHZ] =
3608*4882a593Smuzhiyun 			&b43legacy_band_2GHz_GPHY;
3609*4882a593Smuzhiyun 		phy->possible_phymodes |= B43legacy_PHYMODE_G;
3610*4882a593Smuzhiyun 	}
3611*4882a593Smuzhiyun 
3612*4882a593Smuzhiyun 	return 0;
3613*4882a593Smuzhiyun }
3614*4882a593Smuzhiyun 
b43legacy_wireless_core_detach(struct b43legacy_wldev * dev)3615*4882a593Smuzhiyun static void b43legacy_wireless_core_detach(struct b43legacy_wldev *dev)
3616*4882a593Smuzhiyun {
3617*4882a593Smuzhiyun 	/* We release firmware that late to not be required to re-request
3618*4882a593Smuzhiyun 	 * is all the time when we reinit the core. */
3619*4882a593Smuzhiyun 	b43legacy_release_firmware(dev);
3620*4882a593Smuzhiyun }
3621*4882a593Smuzhiyun 
b43legacy_wireless_core_attach(struct b43legacy_wldev * dev)3622*4882a593Smuzhiyun static int b43legacy_wireless_core_attach(struct b43legacy_wldev *dev)
3623*4882a593Smuzhiyun {
3624*4882a593Smuzhiyun 	struct b43legacy_wl *wl = dev->wl;
3625*4882a593Smuzhiyun 	struct ssb_bus *bus = dev->dev->bus;
3626*4882a593Smuzhiyun 	struct pci_dev *pdev = (bus->bustype == SSB_BUSTYPE_PCI) ? bus->host_pci : NULL;
3627*4882a593Smuzhiyun 	int err;
3628*4882a593Smuzhiyun 	int have_bphy = 0;
3629*4882a593Smuzhiyun 	int have_gphy = 0;
3630*4882a593Smuzhiyun 	u32 tmp;
3631*4882a593Smuzhiyun 
3632*4882a593Smuzhiyun 	/* Do NOT do any device initialization here.
3633*4882a593Smuzhiyun 	 * Do it in wireless_core_init() instead.
3634*4882a593Smuzhiyun 	 * This function is for gathering basic information about the HW, only.
3635*4882a593Smuzhiyun 	 * Also some structs may be set up here. But most likely you want to
3636*4882a593Smuzhiyun 	 * have that in core_init(), too.
3637*4882a593Smuzhiyun 	 */
3638*4882a593Smuzhiyun 
3639*4882a593Smuzhiyun 	err = ssb_bus_powerup(bus, 0);
3640*4882a593Smuzhiyun 	if (err) {
3641*4882a593Smuzhiyun 		b43legacyerr(wl, "Bus powerup failed\n");
3642*4882a593Smuzhiyun 		goto out;
3643*4882a593Smuzhiyun 	}
3644*4882a593Smuzhiyun 	/* Get the PHY type. */
3645*4882a593Smuzhiyun 	if (dev->dev->id.revision >= 5) {
3646*4882a593Smuzhiyun 		u32 tmshigh;
3647*4882a593Smuzhiyun 
3648*4882a593Smuzhiyun 		tmshigh = ssb_read32(dev->dev, SSB_TMSHIGH);
3649*4882a593Smuzhiyun 		have_gphy = !!(tmshigh & B43legacy_TMSHIGH_GPHY);
3650*4882a593Smuzhiyun 		if (!have_gphy)
3651*4882a593Smuzhiyun 			have_bphy = 1;
3652*4882a593Smuzhiyun 	} else if (dev->dev->id.revision == 4)
3653*4882a593Smuzhiyun 		have_gphy = 1;
3654*4882a593Smuzhiyun 	else
3655*4882a593Smuzhiyun 		have_bphy = 1;
3656*4882a593Smuzhiyun 
3657*4882a593Smuzhiyun 	dev->phy.gmode = (have_gphy || have_bphy);
3658*4882a593Smuzhiyun 	dev->phy.radio_on = true;
3659*4882a593Smuzhiyun 	tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0;
3660*4882a593Smuzhiyun 	b43legacy_wireless_core_reset(dev, tmp);
3661*4882a593Smuzhiyun 
3662*4882a593Smuzhiyun 	err = b43legacy_phy_versioning(dev);
3663*4882a593Smuzhiyun 	if (err)
3664*4882a593Smuzhiyun 		goto err_powerdown;
3665*4882a593Smuzhiyun 	/* Check if this device supports multiband. */
3666*4882a593Smuzhiyun 	if (!pdev ||
3667*4882a593Smuzhiyun 	    (pdev->device != 0x4312 &&
3668*4882a593Smuzhiyun 	     pdev->device != 0x4319 &&
3669*4882a593Smuzhiyun 	     pdev->device != 0x4324)) {
3670*4882a593Smuzhiyun 		/* No multiband support. */
3671*4882a593Smuzhiyun 		have_bphy = 0;
3672*4882a593Smuzhiyun 		have_gphy = 0;
3673*4882a593Smuzhiyun 		switch (dev->phy.type) {
3674*4882a593Smuzhiyun 		case B43legacy_PHYTYPE_B:
3675*4882a593Smuzhiyun 			have_bphy = 1;
3676*4882a593Smuzhiyun 			break;
3677*4882a593Smuzhiyun 		case B43legacy_PHYTYPE_G:
3678*4882a593Smuzhiyun 			have_gphy = 1;
3679*4882a593Smuzhiyun 			break;
3680*4882a593Smuzhiyun 		default:
3681*4882a593Smuzhiyun 			B43legacy_BUG_ON(1);
3682*4882a593Smuzhiyun 		}
3683*4882a593Smuzhiyun 	}
3684*4882a593Smuzhiyun 	dev->phy.gmode = (have_gphy || have_bphy);
3685*4882a593Smuzhiyun 	tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0;
3686*4882a593Smuzhiyun 	b43legacy_wireless_core_reset(dev, tmp);
3687*4882a593Smuzhiyun 
3688*4882a593Smuzhiyun 	err = b43legacy_validate_chipaccess(dev);
3689*4882a593Smuzhiyun 	if (err)
3690*4882a593Smuzhiyun 		goto err_powerdown;
3691*4882a593Smuzhiyun 	err = b43legacy_setup_modes(dev, have_bphy, have_gphy);
3692*4882a593Smuzhiyun 	if (err)
3693*4882a593Smuzhiyun 		goto err_powerdown;
3694*4882a593Smuzhiyun 
3695*4882a593Smuzhiyun 	/* Now set some default "current_dev" */
3696*4882a593Smuzhiyun 	if (!wl->current_dev)
3697*4882a593Smuzhiyun 		wl->current_dev = dev;
3698*4882a593Smuzhiyun 	INIT_WORK(&dev->restart_work, b43legacy_chip_reset);
3699*4882a593Smuzhiyun 
3700*4882a593Smuzhiyun 	b43legacy_radio_turn_off(dev, 1);
3701*4882a593Smuzhiyun 	b43legacy_switch_analog(dev, 0);
3702*4882a593Smuzhiyun 	ssb_device_disable(dev->dev, 0);
3703*4882a593Smuzhiyun 	ssb_bus_may_powerdown(bus);
3704*4882a593Smuzhiyun 
3705*4882a593Smuzhiyun out:
3706*4882a593Smuzhiyun 	return err;
3707*4882a593Smuzhiyun 
3708*4882a593Smuzhiyun err_powerdown:
3709*4882a593Smuzhiyun 	ssb_bus_may_powerdown(bus);
3710*4882a593Smuzhiyun 	return err;
3711*4882a593Smuzhiyun }
3712*4882a593Smuzhiyun 
b43legacy_one_core_detach(struct ssb_device * dev)3713*4882a593Smuzhiyun static void b43legacy_one_core_detach(struct ssb_device *dev)
3714*4882a593Smuzhiyun {
3715*4882a593Smuzhiyun 	struct b43legacy_wldev *wldev;
3716*4882a593Smuzhiyun 	struct b43legacy_wl *wl;
3717*4882a593Smuzhiyun 
3718*4882a593Smuzhiyun 	/* Do not cancel ieee80211-workqueue based work here.
3719*4882a593Smuzhiyun 	 * See comment in b43legacy_remove(). */
3720*4882a593Smuzhiyun 
3721*4882a593Smuzhiyun 	wldev = ssb_get_drvdata(dev);
3722*4882a593Smuzhiyun 	wl = wldev->wl;
3723*4882a593Smuzhiyun 	b43legacy_debugfs_remove_device(wldev);
3724*4882a593Smuzhiyun 	b43legacy_wireless_core_detach(wldev);
3725*4882a593Smuzhiyun 	list_del(&wldev->list);
3726*4882a593Smuzhiyun 	wl->nr_devs--;
3727*4882a593Smuzhiyun 	ssb_set_drvdata(dev, NULL);
3728*4882a593Smuzhiyun 	kfree(wldev);
3729*4882a593Smuzhiyun }
3730*4882a593Smuzhiyun 
b43legacy_one_core_attach(struct ssb_device * dev,struct b43legacy_wl * wl)3731*4882a593Smuzhiyun static int b43legacy_one_core_attach(struct ssb_device *dev,
3732*4882a593Smuzhiyun 				     struct b43legacy_wl *wl)
3733*4882a593Smuzhiyun {
3734*4882a593Smuzhiyun 	struct b43legacy_wldev *wldev;
3735*4882a593Smuzhiyun 	int err = -ENOMEM;
3736*4882a593Smuzhiyun 
3737*4882a593Smuzhiyun 	wldev = kzalloc(sizeof(*wldev), GFP_KERNEL);
3738*4882a593Smuzhiyun 	if (!wldev)
3739*4882a593Smuzhiyun 		goto out;
3740*4882a593Smuzhiyun 
3741*4882a593Smuzhiyun 	wldev->dev = dev;
3742*4882a593Smuzhiyun 	wldev->wl = wl;
3743*4882a593Smuzhiyun 	b43legacy_set_status(wldev, B43legacy_STAT_UNINIT);
3744*4882a593Smuzhiyun 	wldev->bad_frames_preempt = modparam_bad_frames_preempt;
3745*4882a593Smuzhiyun 	tasklet_setup(&wldev->isr_tasklet, b43legacy_interrupt_tasklet);
3746*4882a593Smuzhiyun 	if (modparam_pio)
3747*4882a593Smuzhiyun 		wldev->__using_pio = true;
3748*4882a593Smuzhiyun 	INIT_LIST_HEAD(&wldev->list);
3749*4882a593Smuzhiyun 
3750*4882a593Smuzhiyun 	err = b43legacy_wireless_core_attach(wldev);
3751*4882a593Smuzhiyun 	if (err)
3752*4882a593Smuzhiyun 		goto err_kfree_wldev;
3753*4882a593Smuzhiyun 
3754*4882a593Smuzhiyun 	list_add(&wldev->list, &wl->devlist);
3755*4882a593Smuzhiyun 	wl->nr_devs++;
3756*4882a593Smuzhiyun 	ssb_set_drvdata(dev, wldev);
3757*4882a593Smuzhiyun 	b43legacy_debugfs_add_device(wldev);
3758*4882a593Smuzhiyun out:
3759*4882a593Smuzhiyun 	return err;
3760*4882a593Smuzhiyun 
3761*4882a593Smuzhiyun err_kfree_wldev:
3762*4882a593Smuzhiyun 	kfree(wldev);
3763*4882a593Smuzhiyun 	return err;
3764*4882a593Smuzhiyun }
3765*4882a593Smuzhiyun 
b43legacy_sprom_fixup(struct ssb_bus * bus)3766*4882a593Smuzhiyun static void b43legacy_sprom_fixup(struct ssb_bus *bus)
3767*4882a593Smuzhiyun {
3768*4882a593Smuzhiyun 	/* boardflags workarounds */
3769*4882a593Smuzhiyun 	if (bus->boardinfo.vendor == PCI_VENDOR_ID_APPLE &&
3770*4882a593Smuzhiyun 	    bus->boardinfo.type == 0x4E &&
3771*4882a593Smuzhiyun 	    bus->sprom.board_rev > 0x40)
3772*4882a593Smuzhiyun 		bus->sprom.boardflags_lo |= B43legacy_BFL_PACTRL;
3773*4882a593Smuzhiyun }
3774*4882a593Smuzhiyun 
b43legacy_wireless_exit(struct ssb_device * dev,struct b43legacy_wl * wl)3775*4882a593Smuzhiyun static void b43legacy_wireless_exit(struct ssb_device *dev,
3776*4882a593Smuzhiyun 				  struct b43legacy_wl *wl)
3777*4882a593Smuzhiyun {
3778*4882a593Smuzhiyun 	struct ieee80211_hw *hw = wl->hw;
3779*4882a593Smuzhiyun 
3780*4882a593Smuzhiyun 	ssb_set_devtypedata(dev, NULL);
3781*4882a593Smuzhiyun 	ieee80211_free_hw(hw);
3782*4882a593Smuzhiyun }
3783*4882a593Smuzhiyun 
b43legacy_wireless_init(struct ssb_device * dev)3784*4882a593Smuzhiyun static int b43legacy_wireless_init(struct ssb_device *dev)
3785*4882a593Smuzhiyun {
3786*4882a593Smuzhiyun 	struct ssb_sprom *sprom = &dev->bus->sprom;
3787*4882a593Smuzhiyun 	struct ieee80211_hw *hw;
3788*4882a593Smuzhiyun 	struct b43legacy_wl *wl;
3789*4882a593Smuzhiyun 	int err = -ENOMEM;
3790*4882a593Smuzhiyun 	int queue_num;
3791*4882a593Smuzhiyun 
3792*4882a593Smuzhiyun 	b43legacy_sprom_fixup(dev->bus);
3793*4882a593Smuzhiyun 
3794*4882a593Smuzhiyun 	hw = ieee80211_alloc_hw(sizeof(*wl), &b43legacy_hw_ops);
3795*4882a593Smuzhiyun 	if (!hw) {
3796*4882a593Smuzhiyun 		b43legacyerr(NULL, "Could not allocate ieee80211 device\n");
3797*4882a593Smuzhiyun 		goto out;
3798*4882a593Smuzhiyun 	}
3799*4882a593Smuzhiyun 
3800*4882a593Smuzhiyun 	/* fill hw info */
3801*4882a593Smuzhiyun 	ieee80211_hw_set(hw, RX_INCLUDES_FCS);
3802*4882a593Smuzhiyun 	ieee80211_hw_set(hw, SIGNAL_DBM);
3803*4882a593Smuzhiyun 	ieee80211_hw_set(hw, MFP_CAPABLE); /* Allow WPA3 in software */
3804*4882a593Smuzhiyun 
3805*4882a593Smuzhiyun 	hw->wiphy->interface_modes =
3806*4882a593Smuzhiyun 		BIT(NL80211_IFTYPE_AP) |
3807*4882a593Smuzhiyun 		BIT(NL80211_IFTYPE_STATION) |
3808*4882a593Smuzhiyun #ifdef CONFIG_WIRELESS_WDS
3809*4882a593Smuzhiyun 		BIT(NL80211_IFTYPE_WDS) |
3810*4882a593Smuzhiyun #endif
3811*4882a593Smuzhiyun 		BIT(NL80211_IFTYPE_ADHOC);
3812*4882a593Smuzhiyun 	hw->queues = 1; /* FIXME: hardware has more queues */
3813*4882a593Smuzhiyun 	hw->max_rates = 2;
3814*4882a593Smuzhiyun 	SET_IEEE80211_DEV(hw, dev->dev);
3815*4882a593Smuzhiyun 	if (is_valid_ether_addr(sprom->et1mac))
3816*4882a593Smuzhiyun 		SET_IEEE80211_PERM_ADDR(hw, sprom->et1mac);
3817*4882a593Smuzhiyun 	else
3818*4882a593Smuzhiyun 		SET_IEEE80211_PERM_ADDR(hw, sprom->il0mac);
3819*4882a593Smuzhiyun 
3820*4882a593Smuzhiyun 	wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_CQM_RSSI_LIST);
3821*4882a593Smuzhiyun 
3822*4882a593Smuzhiyun 	/* Get and initialize struct b43legacy_wl */
3823*4882a593Smuzhiyun 	wl = hw_to_b43legacy_wl(hw);
3824*4882a593Smuzhiyun 	memset(wl, 0, sizeof(*wl));
3825*4882a593Smuzhiyun 	wl->hw = hw;
3826*4882a593Smuzhiyun 	spin_lock_init(&wl->irq_lock);
3827*4882a593Smuzhiyun 	spin_lock_init(&wl->leds_lock);
3828*4882a593Smuzhiyun 	mutex_init(&wl->mutex);
3829*4882a593Smuzhiyun 	INIT_LIST_HEAD(&wl->devlist);
3830*4882a593Smuzhiyun 	INIT_WORK(&wl->beacon_update_trigger, b43legacy_beacon_update_trigger_work);
3831*4882a593Smuzhiyun 	INIT_WORK(&wl->tx_work, b43legacy_tx_work);
3832*4882a593Smuzhiyun 
3833*4882a593Smuzhiyun 	/* Initialize queues and flags. */
3834*4882a593Smuzhiyun 	for (queue_num = 0; queue_num < B43legacy_QOS_QUEUE_NUM; queue_num++) {
3835*4882a593Smuzhiyun 		skb_queue_head_init(&wl->tx_queue[queue_num]);
3836*4882a593Smuzhiyun 		wl->tx_queue_stopped[queue_num] = 0;
3837*4882a593Smuzhiyun 	}
3838*4882a593Smuzhiyun 
3839*4882a593Smuzhiyun 	ssb_set_devtypedata(dev, wl);
3840*4882a593Smuzhiyun 	b43legacyinfo(wl, "Broadcom %04X WLAN found (core revision %u)\n",
3841*4882a593Smuzhiyun 		      dev->bus->chip_id, dev->id.revision);
3842*4882a593Smuzhiyun 	err = 0;
3843*4882a593Smuzhiyun out:
3844*4882a593Smuzhiyun 	return err;
3845*4882a593Smuzhiyun }
3846*4882a593Smuzhiyun 
b43legacy_probe(struct ssb_device * dev,const struct ssb_device_id * id)3847*4882a593Smuzhiyun static int b43legacy_probe(struct ssb_device *dev,
3848*4882a593Smuzhiyun 			 const struct ssb_device_id *id)
3849*4882a593Smuzhiyun {
3850*4882a593Smuzhiyun 	struct b43legacy_wl *wl;
3851*4882a593Smuzhiyun 	int err;
3852*4882a593Smuzhiyun 	int first = 0;
3853*4882a593Smuzhiyun 
3854*4882a593Smuzhiyun 	wl = ssb_get_devtypedata(dev);
3855*4882a593Smuzhiyun 	if (!wl) {
3856*4882a593Smuzhiyun 		/* Probing the first core - setup common struct b43legacy_wl */
3857*4882a593Smuzhiyun 		first = 1;
3858*4882a593Smuzhiyun 		err = b43legacy_wireless_init(dev);
3859*4882a593Smuzhiyun 		if (err)
3860*4882a593Smuzhiyun 			goto out;
3861*4882a593Smuzhiyun 		wl = ssb_get_devtypedata(dev);
3862*4882a593Smuzhiyun 		B43legacy_WARN_ON(!wl);
3863*4882a593Smuzhiyun 	}
3864*4882a593Smuzhiyun 	err = b43legacy_one_core_attach(dev, wl);
3865*4882a593Smuzhiyun 	if (err)
3866*4882a593Smuzhiyun 		goto err_wireless_exit;
3867*4882a593Smuzhiyun 
3868*4882a593Smuzhiyun 	/* setup and start work to load firmware */
3869*4882a593Smuzhiyun 	INIT_WORK(&wl->firmware_load, b43legacy_request_firmware);
3870*4882a593Smuzhiyun 	schedule_work(&wl->firmware_load);
3871*4882a593Smuzhiyun 
3872*4882a593Smuzhiyun out:
3873*4882a593Smuzhiyun 	return err;
3874*4882a593Smuzhiyun 
3875*4882a593Smuzhiyun err_wireless_exit:
3876*4882a593Smuzhiyun 	if (first)
3877*4882a593Smuzhiyun 		b43legacy_wireless_exit(dev, wl);
3878*4882a593Smuzhiyun 	return err;
3879*4882a593Smuzhiyun }
3880*4882a593Smuzhiyun 
b43legacy_remove(struct ssb_device * dev)3881*4882a593Smuzhiyun static void b43legacy_remove(struct ssb_device *dev)
3882*4882a593Smuzhiyun {
3883*4882a593Smuzhiyun 	struct b43legacy_wl *wl = ssb_get_devtypedata(dev);
3884*4882a593Smuzhiyun 	struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3885*4882a593Smuzhiyun 
3886*4882a593Smuzhiyun 	/* We must cancel any work here before unregistering from ieee80211,
3887*4882a593Smuzhiyun 	 * as the ieee80211 unreg will destroy the workqueue. */
3888*4882a593Smuzhiyun 	cancel_work_sync(&wldev->restart_work);
3889*4882a593Smuzhiyun 	cancel_work_sync(&wl->firmware_load);
3890*4882a593Smuzhiyun 	complete(&wldev->fw_load_complete);
3891*4882a593Smuzhiyun 
3892*4882a593Smuzhiyun 	B43legacy_WARN_ON(!wl);
3893*4882a593Smuzhiyun 	if (!wldev->fw.ucode)
3894*4882a593Smuzhiyun 		return;			/* NULL if fw never loaded */
3895*4882a593Smuzhiyun 	if (wl->current_dev == wldev)
3896*4882a593Smuzhiyun 		ieee80211_unregister_hw(wl->hw);
3897*4882a593Smuzhiyun 
3898*4882a593Smuzhiyun 	b43legacy_one_core_detach(dev);
3899*4882a593Smuzhiyun 
3900*4882a593Smuzhiyun 	if (list_empty(&wl->devlist))
3901*4882a593Smuzhiyun 		/* Last core on the chip unregistered.
3902*4882a593Smuzhiyun 		 * We can destroy common struct b43legacy_wl.
3903*4882a593Smuzhiyun 		 */
3904*4882a593Smuzhiyun 		b43legacy_wireless_exit(dev, wl);
3905*4882a593Smuzhiyun }
3906*4882a593Smuzhiyun 
3907*4882a593Smuzhiyun /* Perform a hardware reset. This can be called from any context. */
b43legacy_controller_restart(struct b43legacy_wldev * dev,const char * reason)3908*4882a593Smuzhiyun void b43legacy_controller_restart(struct b43legacy_wldev *dev,
3909*4882a593Smuzhiyun 				  const char *reason)
3910*4882a593Smuzhiyun {
3911*4882a593Smuzhiyun 	/* Must avoid requeueing, if we are in shutdown. */
3912*4882a593Smuzhiyun 	if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED)
3913*4882a593Smuzhiyun 		return;
3914*4882a593Smuzhiyun 	b43legacyinfo(dev->wl, "Controller RESET (%s) ...\n", reason);
3915*4882a593Smuzhiyun 	ieee80211_queue_work(dev->wl->hw, &dev->restart_work);
3916*4882a593Smuzhiyun }
3917*4882a593Smuzhiyun 
3918*4882a593Smuzhiyun #ifdef CONFIG_PM
3919*4882a593Smuzhiyun 
b43legacy_suspend(struct ssb_device * dev,pm_message_t state)3920*4882a593Smuzhiyun static int b43legacy_suspend(struct ssb_device *dev, pm_message_t state)
3921*4882a593Smuzhiyun {
3922*4882a593Smuzhiyun 	struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3923*4882a593Smuzhiyun 	struct b43legacy_wl *wl = wldev->wl;
3924*4882a593Smuzhiyun 
3925*4882a593Smuzhiyun 	b43legacydbg(wl, "Suspending...\n");
3926*4882a593Smuzhiyun 
3927*4882a593Smuzhiyun 	mutex_lock(&wl->mutex);
3928*4882a593Smuzhiyun 	wldev->suspend_init_status = b43legacy_status(wldev);
3929*4882a593Smuzhiyun 	if (wldev->suspend_init_status >= B43legacy_STAT_STARTED)
3930*4882a593Smuzhiyun 		b43legacy_wireless_core_stop(wldev);
3931*4882a593Smuzhiyun 	if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED)
3932*4882a593Smuzhiyun 		b43legacy_wireless_core_exit(wldev);
3933*4882a593Smuzhiyun 	mutex_unlock(&wl->mutex);
3934*4882a593Smuzhiyun 
3935*4882a593Smuzhiyun 	b43legacydbg(wl, "Device suspended.\n");
3936*4882a593Smuzhiyun 
3937*4882a593Smuzhiyun 	return 0;
3938*4882a593Smuzhiyun }
3939*4882a593Smuzhiyun 
b43legacy_resume(struct ssb_device * dev)3940*4882a593Smuzhiyun static int b43legacy_resume(struct ssb_device *dev)
3941*4882a593Smuzhiyun {
3942*4882a593Smuzhiyun 	struct b43legacy_wldev *wldev = ssb_get_drvdata(dev);
3943*4882a593Smuzhiyun 	struct b43legacy_wl *wl = wldev->wl;
3944*4882a593Smuzhiyun 	int err = 0;
3945*4882a593Smuzhiyun 
3946*4882a593Smuzhiyun 	b43legacydbg(wl, "Resuming...\n");
3947*4882a593Smuzhiyun 
3948*4882a593Smuzhiyun 	mutex_lock(&wl->mutex);
3949*4882a593Smuzhiyun 	if (wldev->suspend_init_status >= B43legacy_STAT_INITIALIZED) {
3950*4882a593Smuzhiyun 		err = b43legacy_wireless_core_init(wldev);
3951*4882a593Smuzhiyun 		if (err) {
3952*4882a593Smuzhiyun 			b43legacyerr(wl, "Resume failed at core init\n");
3953*4882a593Smuzhiyun 			goto out;
3954*4882a593Smuzhiyun 		}
3955*4882a593Smuzhiyun 	}
3956*4882a593Smuzhiyun 	if (wldev->suspend_init_status >= B43legacy_STAT_STARTED) {
3957*4882a593Smuzhiyun 		err = b43legacy_wireless_core_start(wldev);
3958*4882a593Smuzhiyun 		if (err) {
3959*4882a593Smuzhiyun 			b43legacy_wireless_core_exit(wldev);
3960*4882a593Smuzhiyun 			b43legacyerr(wl, "Resume failed at core start\n");
3961*4882a593Smuzhiyun 			goto out;
3962*4882a593Smuzhiyun 		}
3963*4882a593Smuzhiyun 	}
3964*4882a593Smuzhiyun 
3965*4882a593Smuzhiyun 	b43legacydbg(wl, "Device resumed.\n");
3966*4882a593Smuzhiyun out:
3967*4882a593Smuzhiyun 	mutex_unlock(&wl->mutex);
3968*4882a593Smuzhiyun 	return err;
3969*4882a593Smuzhiyun }
3970*4882a593Smuzhiyun 
3971*4882a593Smuzhiyun #else	/* CONFIG_PM */
3972*4882a593Smuzhiyun # define b43legacy_suspend	NULL
3973*4882a593Smuzhiyun # define b43legacy_resume		NULL
3974*4882a593Smuzhiyun #endif	/* CONFIG_PM */
3975*4882a593Smuzhiyun 
3976*4882a593Smuzhiyun static struct ssb_driver b43legacy_ssb_driver = {
3977*4882a593Smuzhiyun 	.name		= KBUILD_MODNAME,
3978*4882a593Smuzhiyun 	.id_table	= b43legacy_ssb_tbl,
3979*4882a593Smuzhiyun 	.probe		= b43legacy_probe,
3980*4882a593Smuzhiyun 	.remove		= b43legacy_remove,
3981*4882a593Smuzhiyun 	.suspend	= b43legacy_suspend,
3982*4882a593Smuzhiyun 	.resume		= b43legacy_resume,
3983*4882a593Smuzhiyun };
3984*4882a593Smuzhiyun 
b43legacy_print_driverinfo(void)3985*4882a593Smuzhiyun static void b43legacy_print_driverinfo(void)
3986*4882a593Smuzhiyun {
3987*4882a593Smuzhiyun 	const char *feat_pci = "", *feat_leds = "",
3988*4882a593Smuzhiyun 		   *feat_pio = "", *feat_dma = "";
3989*4882a593Smuzhiyun 
3990*4882a593Smuzhiyun #ifdef CONFIG_B43LEGACY_PCI_AUTOSELECT
3991*4882a593Smuzhiyun 	feat_pci = "P";
3992*4882a593Smuzhiyun #endif
3993*4882a593Smuzhiyun #ifdef CONFIG_B43LEGACY_LEDS
3994*4882a593Smuzhiyun 	feat_leds = "L";
3995*4882a593Smuzhiyun #endif
3996*4882a593Smuzhiyun #ifdef CONFIG_B43LEGACY_PIO
3997*4882a593Smuzhiyun 	feat_pio = "I";
3998*4882a593Smuzhiyun #endif
3999*4882a593Smuzhiyun #ifdef CONFIG_B43LEGACY_DMA
4000*4882a593Smuzhiyun 	feat_dma = "D";
4001*4882a593Smuzhiyun #endif
4002*4882a593Smuzhiyun 	printk(KERN_INFO "Broadcom 43xx-legacy driver loaded "
4003*4882a593Smuzhiyun 	       "[ Features: %s%s%s%s ]\n",
4004*4882a593Smuzhiyun 	       feat_pci, feat_leds, feat_pio, feat_dma);
4005*4882a593Smuzhiyun }
4006*4882a593Smuzhiyun 
b43legacy_init(void)4007*4882a593Smuzhiyun static int __init b43legacy_init(void)
4008*4882a593Smuzhiyun {
4009*4882a593Smuzhiyun 	int err;
4010*4882a593Smuzhiyun 
4011*4882a593Smuzhiyun 	b43legacy_debugfs_init();
4012*4882a593Smuzhiyun 
4013*4882a593Smuzhiyun 	err = ssb_driver_register(&b43legacy_ssb_driver);
4014*4882a593Smuzhiyun 	if (err)
4015*4882a593Smuzhiyun 		goto err_dfs_exit;
4016*4882a593Smuzhiyun 
4017*4882a593Smuzhiyun 	b43legacy_print_driverinfo();
4018*4882a593Smuzhiyun 
4019*4882a593Smuzhiyun 	return err;
4020*4882a593Smuzhiyun 
4021*4882a593Smuzhiyun err_dfs_exit:
4022*4882a593Smuzhiyun 	b43legacy_debugfs_exit();
4023*4882a593Smuzhiyun 	return err;
4024*4882a593Smuzhiyun }
4025*4882a593Smuzhiyun 
b43legacy_exit(void)4026*4882a593Smuzhiyun static void __exit b43legacy_exit(void)
4027*4882a593Smuzhiyun {
4028*4882a593Smuzhiyun 	ssb_driver_unregister(&b43legacy_ssb_driver);
4029*4882a593Smuzhiyun 	b43legacy_debugfs_exit();
4030*4882a593Smuzhiyun }
4031*4882a593Smuzhiyun 
4032*4882a593Smuzhiyun module_init(b43legacy_init)
4033*4882a593Smuzhiyun module_exit(b43legacy_exit)
4034