1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun #ifndef B43legacy_ILT_H_ 3*4882a593Smuzhiyun #define B43legacy_ILT_H_ 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun #define B43legacy_ILT_ROTOR_SIZE 53 6*4882a593Smuzhiyun extern const u32 b43legacy_ilt_rotor[B43legacy_ILT_ROTOR_SIZE]; 7*4882a593Smuzhiyun #define B43legacy_ILT_RETARD_SIZE 53 8*4882a593Smuzhiyun extern const u32 b43legacy_ilt_retard[B43legacy_ILT_RETARD_SIZE]; 9*4882a593Smuzhiyun #define B43legacy_ILT_FINEFREQA_SIZE 256 10*4882a593Smuzhiyun extern const u16 b43legacy_ilt_finefreqa[B43legacy_ILT_FINEFREQA_SIZE]; 11*4882a593Smuzhiyun #define B43legacy_ILT_FINEFREQG_SIZE 256 12*4882a593Smuzhiyun extern const u16 b43legacy_ilt_finefreqg[B43legacy_ILT_FINEFREQG_SIZE]; 13*4882a593Smuzhiyun #define B43legacy_ILT_NOISEA2_SIZE 8 14*4882a593Smuzhiyun extern const u16 b43legacy_ilt_noisea2[B43legacy_ILT_NOISEA2_SIZE]; 15*4882a593Smuzhiyun #define B43legacy_ILT_NOISEA3_SIZE 8 16*4882a593Smuzhiyun extern const u16 b43legacy_ilt_noisea3[B43legacy_ILT_NOISEA3_SIZE]; 17*4882a593Smuzhiyun #define B43legacy_ILT_NOISEG1_SIZE 8 18*4882a593Smuzhiyun extern const u16 b43legacy_ilt_noiseg1[B43legacy_ILT_NOISEG1_SIZE]; 19*4882a593Smuzhiyun #define B43legacy_ILT_NOISEG2_SIZE 8 20*4882a593Smuzhiyun extern const u16 b43legacy_ilt_noiseg2[B43legacy_ILT_NOISEG2_SIZE]; 21*4882a593Smuzhiyun #define B43legacy_ILT_NOISESCALEG_SIZE 27 22*4882a593Smuzhiyun extern const u16 b43legacy_ilt_noisescaleg1[B43legacy_ILT_NOISESCALEG_SIZE]; 23*4882a593Smuzhiyun extern const u16 b43legacy_ilt_noisescaleg2[B43legacy_ILT_NOISESCALEG_SIZE]; 24*4882a593Smuzhiyun extern const u16 b43legacy_ilt_noisescaleg3[B43legacy_ILT_NOISESCALEG_SIZE]; 25*4882a593Smuzhiyun #define B43legacy_ILT_SIGMASQR_SIZE 53 26*4882a593Smuzhiyun extern const u16 b43legacy_ilt_sigmasqr1[B43legacy_ILT_SIGMASQR_SIZE]; 27*4882a593Smuzhiyun extern const u16 b43legacy_ilt_sigmasqr2[B43legacy_ILT_SIGMASQR_SIZE]; 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun void b43legacy_ilt_write(struct b43legacy_wldev *dev, u16 offset, u16 val); 31*4882a593Smuzhiyun void b43legacy_ilt_write32(struct b43legacy_wldev *dev, u16 offset, 32*4882a593Smuzhiyun u32 val); 33*4882a593Smuzhiyun u16 b43legacy_ilt_read(struct b43legacy_wldev *dev, u16 offset); 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun #endif /* B43legacy_ILT_H_ */ 36