1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun #ifndef B43_TABLES_NPHY_H_ 3*4882a593Smuzhiyun #define B43_TABLES_NPHY_H_ 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun #include <linux/types.h> 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun struct b43_phy_n_sfo_cfg { 8*4882a593Smuzhiyun u16 phy_bw1a; 9*4882a593Smuzhiyun u16 phy_bw2; 10*4882a593Smuzhiyun u16 phy_bw3; 11*4882a593Smuzhiyun u16 phy_bw4; 12*4882a593Smuzhiyun u16 phy_bw5; 13*4882a593Smuzhiyun u16 phy_bw6; 14*4882a593Smuzhiyun }; 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun struct b43_wldev; 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun struct nphy_txiqcal_ladder { 19*4882a593Smuzhiyun u8 percent; 20*4882a593Smuzhiyun u8 g_env; 21*4882a593Smuzhiyun }; 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun struct nphy_rf_control_override_rev2 { 24*4882a593Smuzhiyun u8 addr0; 25*4882a593Smuzhiyun u8 addr1; 26*4882a593Smuzhiyun u16 bmask; 27*4882a593Smuzhiyun u8 shift; 28*4882a593Smuzhiyun }; 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun struct nphy_rf_control_override_rev3 { 31*4882a593Smuzhiyun u16 val_mask; 32*4882a593Smuzhiyun u8 val_shift; 33*4882a593Smuzhiyun u8 en_addr0; 34*4882a593Smuzhiyun u8 val_addr0; 35*4882a593Smuzhiyun u8 en_addr1; 36*4882a593Smuzhiyun u8 val_addr1; 37*4882a593Smuzhiyun }; 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun struct nphy_rf_control_override_rev7 { 40*4882a593Smuzhiyun u16 field; 41*4882a593Smuzhiyun u16 val_addr_core0; 42*4882a593Smuzhiyun u16 val_addr_core1; 43*4882a593Smuzhiyun u16 val_mask; 44*4882a593Smuzhiyun u8 val_shift; 45*4882a593Smuzhiyun }; 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun struct nphy_gain_ctl_workaround_entry { 48*4882a593Smuzhiyun s8 lna1_gain[4]; 49*4882a593Smuzhiyun s8 lna2_gain[4]; 50*4882a593Smuzhiyun u8 gain_db[10]; 51*4882a593Smuzhiyun u8 gain_bits[10]; 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun u16 init_gain; 54*4882a593Smuzhiyun u16 rfseq_init[4]; 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun u16 cliphi_gain; 57*4882a593Smuzhiyun u16 clipmd_gain; 58*4882a593Smuzhiyun u16 cliplo_gain; 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun u16 crsmin; 61*4882a593Smuzhiyun u16 crsminl; 62*4882a593Smuzhiyun u16 crsminu; 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun u16 nbclip; 65*4882a593Smuzhiyun u16 wlclip; 66*4882a593Smuzhiyun }; 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun /* Get entry with workaround values for gain ctl. Does not return NULL. */ 69*4882a593Smuzhiyun struct nphy_gain_ctl_workaround_entry *b43_nphy_get_gain_ctl_workaround_ent( 70*4882a593Smuzhiyun struct b43_wldev *dev, bool ghz5, bool ext_lna); 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun /* The N-PHY tables. */ 74*4882a593Smuzhiyun #define B43_NTAB_TYPEMASK 0xF0000000 75*4882a593Smuzhiyun #define B43_NTAB_8BIT 0x10000000 76*4882a593Smuzhiyun #define B43_NTAB_16BIT 0x20000000 77*4882a593Smuzhiyun #define B43_NTAB_32BIT 0x30000000 78*4882a593Smuzhiyun #define B43_NTAB8(table, offset) (((table) << 10) | (offset) | B43_NTAB_8BIT) 79*4882a593Smuzhiyun #define B43_NTAB16(table, offset) (((table) << 10) | (offset) | B43_NTAB_16BIT) 80*4882a593Smuzhiyun #define B43_NTAB32(table, offset) (((table) << 10) | (offset) | B43_NTAB_32BIT) 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun /* Static N-PHY tables */ 83*4882a593Smuzhiyun #define B43_NTAB_FRAMESTRUCT B43_NTAB32(0x0A, 0x000) /* Frame Struct Table */ 84*4882a593Smuzhiyun #define B43_NTAB_FRAMESTRUCT_SIZE 832 85*4882a593Smuzhiyun #define B43_NTAB_FRAMELT B43_NTAB8 (0x18, 0x000) /* Frame Lookup Table */ 86*4882a593Smuzhiyun #define B43_NTAB_FRAMELT_SIZE 32 87*4882a593Smuzhiyun #define B43_NTAB_TMAP B43_NTAB32(0x0C, 0x000) /* T Map Table */ 88*4882a593Smuzhiyun #define B43_NTAB_TMAP_SIZE 448 89*4882a593Smuzhiyun #define B43_NTAB_TDTRN B43_NTAB32(0x0E, 0x000) /* TDTRN Table */ 90*4882a593Smuzhiyun #define B43_NTAB_TDTRN_SIZE 704 91*4882a593Smuzhiyun #define B43_NTAB_INTLEVEL B43_NTAB32(0x0D, 0x000) /* Int Level Table */ 92*4882a593Smuzhiyun #define B43_NTAB_INTLEVEL_SIZE 7 93*4882a593Smuzhiyun #define B43_NTAB_PILOT B43_NTAB16(0x0B, 0x000) /* Pilot Table */ 94*4882a593Smuzhiyun #define B43_NTAB_PILOT_SIZE 88 95*4882a593Smuzhiyun #define B43_NTAB_PILOTLT B43_NTAB32(0x14, 0x000) /* Pilot Lookup Table */ 96*4882a593Smuzhiyun #define B43_NTAB_PILOTLT_SIZE 6 97*4882a593Smuzhiyun #define B43_NTAB_TDI20A0 B43_NTAB32(0x13, 0x080) /* TDI Table 20 Antenna 0 */ 98*4882a593Smuzhiyun #define B43_NTAB_TDI20A0_SIZE 55 99*4882a593Smuzhiyun #define B43_NTAB_TDI20A1 B43_NTAB32(0x13, 0x100) /* TDI Table 20 Antenna 1 */ 100*4882a593Smuzhiyun #define B43_NTAB_TDI20A1_SIZE 55 101*4882a593Smuzhiyun #define B43_NTAB_TDI40A0 B43_NTAB32(0x13, 0x280) /* TDI Table 40 Antenna 0 */ 102*4882a593Smuzhiyun #define B43_NTAB_TDI40A0_SIZE 110 103*4882a593Smuzhiyun #define B43_NTAB_TDI40A1 B43_NTAB32(0x13, 0x300) /* TDI Table 40 Antenna 1 */ 104*4882a593Smuzhiyun #define B43_NTAB_TDI40A1_SIZE 110 105*4882a593Smuzhiyun #define B43_NTAB_BDI B43_NTAB16(0x15, 0x000) /* BDI Table */ 106*4882a593Smuzhiyun #define B43_NTAB_BDI_SIZE 6 107*4882a593Smuzhiyun #define B43_NTAB_CHANEST B43_NTAB32(0x16, 0x000) /* Channel Estimate Table */ 108*4882a593Smuzhiyun #define B43_NTAB_CHANEST_SIZE 96 109*4882a593Smuzhiyun #define B43_NTAB_MCS B43_NTAB8 (0x12, 0x000) /* MCS Table */ 110*4882a593Smuzhiyun #define B43_NTAB_MCS_SIZE 128 111*4882a593Smuzhiyun 112*4882a593Smuzhiyun /* Volatile N-PHY tables */ 113*4882a593Smuzhiyun #define B43_NTAB_NOISEVAR10 B43_NTAB32(0x10, 0x000) /* Noise Var Table 10 */ 114*4882a593Smuzhiyun #define B43_NTAB_NOISEVAR10_SIZE 256 115*4882a593Smuzhiyun #define B43_NTAB_NOISEVAR11 B43_NTAB32(0x10, 0x080) /* Noise Var Table 11 */ 116*4882a593Smuzhiyun #define B43_NTAB_NOISEVAR11_SIZE 256 117*4882a593Smuzhiyun #define B43_NTAB_C0_ESTPLT B43_NTAB8 (0x1A, 0x000) /* Estimate Power Lookup Table Core 0 */ 118*4882a593Smuzhiyun #define B43_NTAB_C0_ESTPLT_SIZE 64 119*4882a593Smuzhiyun #define B43_NTAB_C0_ADJPLT B43_NTAB8 (0x1A, 0x040) /* Adjust Power Lookup Table Core 0 */ 120*4882a593Smuzhiyun #define B43_NTAB_C0_ADJPLT_SIZE 128 121*4882a593Smuzhiyun #define B43_NTAB_C0_GAINCTL B43_NTAB32(0x1A, 0x0C0) /* Gain Control Lookup Table Core 0 */ 122*4882a593Smuzhiyun #define B43_NTAB_C0_GAINCTL_SIZE 128 123*4882a593Smuzhiyun #define B43_NTAB_C0_IQLT B43_NTAB32(0x1A, 0x140) /* IQ Lookup Table Core 0 */ 124*4882a593Smuzhiyun #define B43_NTAB_C0_IQLT_SIZE 128 125*4882a593Smuzhiyun #define B43_NTAB_C0_LOFEEDTH B43_NTAB16(0x1A, 0x1C0) /* Local Oscillator Feed Through Lookup Table Core 0 */ 126*4882a593Smuzhiyun #define B43_NTAB_C0_LOFEEDTH_SIZE 128 127*4882a593Smuzhiyun #define B43_NTAB_C1_ESTPLT B43_NTAB8 (0x1B, 0x000) /* Estimate Power Lookup Table Core 1 */ 128*4882a593Smuzhiyun #define B43_NTAB_C1_ESTPLT_SIZE 64 129*4882a593Smuzhiyun #define B43_NTAB_C1_ADJPLT B43_NTAB8 (0x1B, 0x040) /* Adjust Power Lookup Table Core 1 */ 130*4882a593Smuzhiyun #define B43_NTAB_C1_ADJPLT_SIZE 128 131*4882a593Smuzhiyun #define B43_NTAB_C1_GAINCTL B43_NTAB32(0x1B, 0x0C0) /* Gain Control Lookup Table Core 1 */ 132*4882a593Smuzhiyun #define B43_NTAB_C1_GAINCTL_SIZE 128 133*4882a593Smuzhiyun #define B43_NTAB_C1_IQLT B43_NTAB32(0x1B, 0x140) /* IQ Lookup Table Core 1 */ 134*4882a593Smuzhiyun #define B43_NTAB_C1_IQLT_SIZE 128 135*4882a593Smuzhiyun #define B43_NTAB_C1_LOFEEDTH B43_NTAB16(0x1B, 0x1C0) /* Local Oscillator Feed Through Lookup Table Core 1 */ 136*4882a593Smuzhiyun #define B43_NTAB_C1_LOFEEDTH_SIZE 128 137*4882a593Smuzhiyun 138*4882a593Smuzhiyun /* Volatile N-PHY tables, PHY revision >= 3 */ 139*4882a593Smuzhiyun #define B43_NTAB_ANT_SW_CTL_R3 B43_NTAB16( 9, 0) /* antenna software control */ 140*4882a593Smuzhiyun 141*4882a593Smuzhiyun /* Static N-PHY tables, PHY revision >= 3 */ 142*4882a593Smuzhiyun #define B43_NTAB_FRAMESTRUCT_R3 B43_NTAB32(10, 0) /* frame struct */ 143*4882a593Smuzhiyun #define B43_NTAB_PILOT_R3 B43_NTAB16(11, 0) /* pilot */ 144*4882a593Smuzhiyun #define B43_NTAB_TMAP_R3 B43_NTAB32(12, 0) /* TM AP */ 145*4882a593Smuzhiyun #define B43_NTAB_INTLEVEL_R3 B43_NTAB32(13, 0) /* INT LV */ 146*4882a593Smuzhiyun #define B43_NTAB_TDTRN_R3 B43_NTAB32(14, 0) /* TD TRN */ 147*4882a593Smuzhiyun #define B43_NTAB_NOISEVAR_R3 B43_NTAB32(16, 0) /* noise variance */ 148*4882a593Smuzhiyun #define B43_NTAB_MCS_R3 B43_NTAB16(18, 0) /* MCS */ 149*4882a593Smuzhiyun #define B43_NTAB_TDI20A0_R3 B43_NTAB32(19, 128) /* TDI 20/0 */ 150*4882a593Smuzhiyun #define B43_NTAB_TDI20A1_R3 B43_NTAB32(19, 256) /* TDI 20/1 */ 151*4882a593Smuzhiyun #define B43_NTAB_TDI40A0_R3 B43_NTAB32(19, 640) /* TDI 40/0 */ 152*4882a593Smuzhiyun #define B43_NTAB_TDI40A1_R3 B43_NTAB32(19, 768) /* TDI 40/1 */ 153*4882a593Smuzhiyun #define B43_NTAB_PILOTLT_R3 B43_NTAB32(20, 0) /* PLT lookup */ 154*4882a593Smuzhiyun #define B43_NTAB_CHANEST_R3 B43_NTAB32(22, 0) /* channel estimate */ 155*4882a593Smuzhiyun #define B43_NTAB_FRAMELT_R3 B43_NTAB8(24, 0) /* frame lookup */ 156*4882a593Smuzhiyun #define B43_NTAB_C0_ESTPLT_R3 B43_NTAB8(26, 0) /* estimated power lookup 0 */ 157*4882a593Smuzhiyun #define B43_NTAB_C0_ADJPLT_R3 B43_NTAB8(26, 64) /* adjusted power lookup 0 */ 158*4882a593Smuzhiyun #define B43_NTAB_C0_GAINCTL_R3 B43_NTAB32(26, 192) /* gain control lookup 0 */ 159*4882a593Smuzhiyun #define B43_NTAB_C0_IQLT_R3 B43_NTAB32(26, 320) /* I/Q lookup 0 */ 160*4882a593Smuzhiyun #define B43_NTAB_C0_LOFEEDTH_R3 B43_NTAB16(26, 448) /* Local Oscillator Feed Through lookup 0 */ 161*4882a593Smuzhiyun #define B43_NTAB_C0_PAPD_COMP_R3 B43_NTAB16(26, 576) 162*4882a593Smuzhiyun #define B43_NTAB_C1_ESTPLT_R3 B43_NTAB8(27, 0) /* estimated power lookup 1 */ 163*4882a593Smuzhiyun #define B43_NTAB_C1_ADJPLT_R3 B43_NTAB8(27, 64) /* adjusted power lookup 1 */ 164*4882a593Smuzhiyun #define B43_NTAB_C1_GAINCTL_R3 B43_NTAB32(27, 192) /* gain control lookup 1 */ 165*4882a593Smuzhiyun #define B43_NTAB_C1_IQLT_R3 B43_NTAB32(27, 320) /* I/Q lookup 1 */ 166*4882a593Smuzhiyun #define B43_NTAB_C1_LOFEEDTH_R3 B43_NTAB16(27, 448) /* Local Oscillator Feed Through lookup 1 */ 167*4882a593Smuzhiyun #define B43_NTAB_C1_PAPD_COMP_R3 B43_NTAB16(27, 576) 168*4882a593Smuzhiyun 169*4882a593Smuzhiyun /* Static N-PHY tables, PHY revision >= 7 */ 170*4882a593Smuzhiyun #define B43_NTAB_TMAP_R7 B43_NTAB32(12, 0) /* TM AP */ 171*4882a593Smuzhiyun #define B43_NTAB_NOISEVAR_R7 B43_NTAB32(16, 0) /* noise variance */ 172*4882a593Smuzhiyun 173*4882a593Smuzhiyun #define B43_NTAB_TX_IQLO_CAL_LOFT_LADDER_40_SIZE 18 174*4882a593Smuzhiyun #define B43_NTAB_TX_IQLO_CAL_LOFT_LADDER_20_SIZE 18 175*4882a593Smuzhiyun #define B43_NTAB_TX_IQLO_CAL_IQIMB_LADDER_40_SIZE 18 176*4882a593Smuzhiyun #define B43_NTAB_TX_IQLO_CAL_IQIMB_LADDER_20_SIZE 18 177*4882a593Smuzhiyun #define B43_NTAB_TX_IQLO_CAL_STARTCOEFS_REV3 11 178*4882a593Smuzhiyun #define B43_NTAB_TX_IQLO_CAL_STARTCOEFS 9 179*4882a593Smuzhiyun #define B43_NTAB_TX_IQLO_CAL_CMDS_RECAL_REV3 12 180*4882a593Smuzhiyun #define B43_NTAB_TX_IQLO_CAL_CMDS_RECAL 10 181*4882a593Smuzhiyun #define B43_NTAB_TX_IQLO_CAL_CMDS_FULLCAL 10 182*4882a593Smuzhiyun #define B43_NTAB_TX_IQLO_CAL_CMDS_FULLCAL_REV3 12 183*4882a593Smuzhiyun 184*4882a593Smuzhiyun u32 b43_ntab_read(struct b43_wldev *dev, u32 offset); 185*4882a593Smuzhiyun void b43_ntab_read_bulk(struct b43_wldev *dev, u32 offset, 186*4882a593Smuzhiyun unsigned int nr_elements, void *_data); 187*4882a593Smuzhiyun void b43_ntab_write(struct b43_wldev *dev, u32 offset, u32 value); 188*4882a593Smuzhiyun void b43_ntab_write_bulk(struct b43_wldev *dev, u32 offset, 189*4882a593Smuzhiyun unsigned int nr_elements, const void *_data); 190*4882a593Smuzhiyun 191*4882a593Smuzhiyun void b43_nphy_tables_init(struct b43_wldev *dev); 192*4882a593Smuzhiyun 193*4882a593Smuzhiyun const u32 *b43_nphy_get_tx_gain_table(struct b43_wldev *dev); 194*4882a593Smuzhiyun 195*4882a593Smuzhiyun const s16 *b43_ntab_get_rf_pwr_offset_table(struct b43_wldev *dev); 196*4882a593Smuzhiyun 197*4882a593Smuzhiyun extern const s8 b43_ntab_papd_pga_gain_delta_ipa_2g[]; 198*4882a593Smuzhiyun 199*4882a593Smuzhiyun extern const u16 tbl_iqcal_gainparams[2][9][8]; 200*4882a593Smuzhiyun extern const struct nphy_txiqcal_ladder ladder_lo[]; 201*4882a593Smuzhiyun extern const struct nphy_txiqcal_ladder ladder_iq[]; 202*4882a593Smuzhiyun extern const u16 loscale[]; 203*4882a593Smuzhiyun 204*4882a593Smuzhiyun extern const u16 tbl_tx_iqlo_cal_loft_ladder_40[]; 205*4882a593Smuzhiyun extern const u16 tbl_tx_iqlo_cal_loft_ladder_20[]; 206*4882a593Smuzhiyun extern const u16 tbl_tx_iqlo_cal_iqimb_ladder_40[]; 207*4882a593Smuzhiyun extern const u16 tbl_tx_iqlo_cal_iqimb_ladder_20[]; 208*4882a593Smuzhiyun extern const u16 tbl_tx_iqlo_cal_startcoefs_nphyrev3[]; 209*4882a593Smuzhiyun extern const u16 tbl_tx_iqlo_cal_startcoefs[]; 210*4882a593Smuzhiyun extern const u16 tbl_tx_iqlo_cal_cmds_recal_nphyrev3[]; 211*4882a593Smuzhiyun extern const u16 tbl_tx_iqlo_cal_cmds_recal[]; 212*4882a593Smuzhiyun extern const u16 tbl_tx_iqlo_cal_cmds_fullcal[]; 213*4882a593Smuzhiyun extern const u16 tbl_tx_iqlo_cal_cmds_fullcal_nphyrev3[]; 214*4882a593Smuzhiyun extern const s16 tbl_tx_filter_coef_rev4[7][15]; 215*4882a593Smuzhiyun 216*4882a593Smuzhiyun extern const struct nphy_rf_control_override_rev2 217*4882a593Smuzhiyun tbl_rf_control_override_rev2[]; 218*4882a593Smuzhiyun extern const struct nphy_rf_control_override_rev3 219*4882a593Smuzhiyun tbl_rf_control_override_rev3[]; 220*4882a593Smuzhiyun const struct nphy_rf_control_override_rev7 *b43_nphy_get_rf_ctl_over_rev7( 221*4882a593Smuzhiyun struct b43_wldev *dev, u16 field, u8 override); 222*4882a593Smuzhiyun 223*4882a593Smuzhiyun #endif /* B43_TABLES_NPHY_H_ */ 224