1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun #ifndef B43_RADIO_2056_H_ 3*4882a593Smuzhiyun #define B43_RADIO_2056_H_ 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun #include <linux/types.h> 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #include "tables_nphy.h" 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #define B2056_SYN (0x0 << 12) 10*4882a593Smuzhiyun #define B2056_TX0 (0x2 << 12) 11*4882a593Smuzhiyun #define B2056_TX1 (0x3 << 12) 12*4882a593Smuzhiyun #define B2056_RX0 (0x6 << 12) 13*4882a593Smuzhiyun #define B2056_RX1 (0x7 << 12) 14*4882a593Smuzhiyun #define B2056_ALLTX (0xE << 12) 15*4882a593Smuzhiyun #define B2056_ALLRX (0xF << 12) 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun #define B2056_SYN_RESERVED_ADDR0 0x00 18*4882a593Smuzhiyun #define B2056_SYN_IDCODE 0x01 19*4882a593Smuzhiyun #define B2056_SYN_RESERVED_ADDR2 0x02 20*4882a593Smuzhiyun #define B2056_SYN_RESERVED_ADDR3 0x03 21*4882a593Smuzhiyun #define B2056_SYN_RESERVED_ADDR4 0x04 22*4882a593Smuzhiyun #define B2056_SYN_RESERVED_ADDR5 0x05 23*4882a593Smuzhiyun #define B2056_SYN_RESERVED_ADDR6 0x06 24*4882a593Smuzhiyun #define B2056_SYN_RESERVED_ADDR7 0x07 25*4882a593Smuzhiyun #define B2056_SYN_COM_CTRL 0x08 26*4882a593Smuzhiyun #define B2056_SYN_COM_PU 0x09 27*4882a593Smuzhiyun #define B2056_SYN_COM_OVR 0x0A 28*4882a593Smuzhiyun #define B2056_SYN_COM_RESET 0x0B 29*4882a593Smuzhiyun #define B2056_SYN_COM_RCAL 0x0C 30*4882a593Smuzhiyun #define B2056_SYN_COM_RC_RXLPF 0x0D 31*4882a593Smuzhiyun #define B2056_SYN_COM_RC_TXLPF 0x0E 32*4882a593Smuzhiyun #define B2056_SYN_COM_RC_RXHPF 0x0F 33*4882a593Smuzhiyun #define B2056_SYN_RESERVED_ADDR16 0x10 34*4882a593Smuzhiyun #define B2056_SYN_RESERVED_ADDR17 0x11 35*4882a593Smuzhiyun #define B2056_SYN_RESERVED_ADDR18 0x12 36*4882a593Smuzhiyun #define B2056_SYN_RESERVED_ADDR19 0x13 37*4882a593Smuzhiyun #define B2056_SYN_RESERVED_ADDR20 0x14 38*4882a593Smuzhiyun #define B2056_SYN_RESERVED_ADDR21 0x15 39*4882a593Smuzhiyun #define B2056_SYN_RESERVED_ADDR22 0x16 40*4882a593Smuzhiyun #define B2056_SYN_RESERVED_ADDR23 0x17 41*4882a593Smuzhiyun #define B2056_SYN_RESERVED_ADDR24 0x18 42*4882a593Smuzhiyun #define B2056_SYN_RESERVED_ADDR25 0x19 43*4882a593Smuzhiyun #define B2056_SYN_RESERVED_ADDR26 0x1A 44*4882a593Smuzhiyun #define B2056_SYN_RESERVED_ADDR27 0x1B 45*4882a593Smuzhiyun #define B2056_SYN_RESERVED_ADDR28 0x1C 46*4882a593Smuzhiyun #define B2056_SYN_RESERVED_ADDR29 0x1D 47*4882a593Smuzhiyun #define B2056_SYN_RESERVED_ADDR30 0x1E 48*4882a593Smuzhiyun #define B2056_SYN_RESERVED_ADDR31 0x1F 49*4882a593Smuzhiyun #define B2056_SYN_GPIO_MASTER1 0x20 50*4882a593Smuzhiyun #define B2056_SYN_GPIO_MASTER2 0x21 51*4882a593Smuzhiyun #define B2056_SYN_TOPBIAS_MASTER 0x22 52*4882a593Smuzhiyun #define B2056_SYN_TOPBIAS_RCAL 0x23 53*4882a593Smuzhiyun #define B2056_SYN_AFEREG 0x24 54*4882a593Smuzhiyun #define B2056_SYN_TEMPPROCSENSE 0x25 55*4882a593Smuzhiyun #define B2056_SYN_TEMPPROCSENSEIDAC 0x26 56*4882a593Smuzhiyun #define B2056_SYN_TEMPPROCSENSERCAL 0x27 57*4882a593Smuzhiyun #define B2056_SYN_LPO 0x28 58*4882a593Smuzhiyun #define B2056_SYN_VDDCAL_MASTER 0x29 59*4882a593Smuzhiyun #define B2056_SYN_VDDCAL_IDAC 0x2A 60*4882a593Smuzhiyun #define B2056_SYN_VDDCAL_STATUS 0x2B 61*4882a593Smuzhiyun #define B2056_SYN_RCAL_MASTER 0x2C 62*4882a593Smuzhiyun #define B2056_SYN_RCAL_CODE_OUT 0x2D 63*4882a593Smuzhiyun #define B2056_SYN_RCCAL_CTRL0 0x2E 64*4882a593Smuzhiyun #define B2056_SYN_RCCAL_CTRL1 0x2F 65*4882a593Smuzhiyun #define B2056_SYN_RCCAL_CTRL2 0x30 66*4882a593Smuzhiyun #define B2056_SYN_RCCAL_CTRL3 0x31 67*4882a593Smuzhiyun #define B2056_SYN_RCCAL_CTRL4 0x32 68*4882a593Smuzhiyun #define B2056_SYN_RCCAL_CTRL5 0x33 69*4882a593Smuzhiyun #define B2056_SYN_RCCAL_CTRL6 0x34 70*4882a593Smuzhiyun #define B2056_SYN_RCCAL_CTRL7 0x35 71*4882a593Smuzhiyun #define B2056_SYN_RCCAL_CTRL8 0x36 72*4882a593Smuzhiyun #define B2056_SYN_RCCAL_CTRL9 0x37 73*4882a593Smuzhiyun #define B2056_SYN_RCCAL_CTRL10 0x38 74*4882a593Smuzhiyun #define B2056_SYN_RCCAL_CTRL11 0x39 75*4882a593Smuzhiyun #define B2056_SYN_ZCAL_SPARE1 0x3A 76*4882a593Smuzhiyun #define B2056_SYN_ZCAL_SPARE2 0x3B 77*4882a593Smuzhiyun #define B2056_SYN_PLL_MAST1 0x3C 78*4882a593Smuzhiyun #define B2056_SYN_PLL_MAST2 0x3D 79*4882a593Smuzhiyun #define B2056_SYN_PLL_MAST3 0x3E 80*4882a593Smuzhiyun #define B2056_SYN_PLL_BIAS_RESET 0x3F 81*4882a593Smuzhiyun #define B2056_SYN_PLL_XTAL0 0x40 82*4882a593Smuzhiyun #define B2056_SYN_PLL_XTAL1 0x41 83*4882a593Smuzhiyun #define B2056_SYN_PLL_XTAL3 0x42 84*4882a593Smuzhiyun #define B2056_SYN_PLL_XTAL4 0x43 85*4882a593Smuzhiyun #define B2056_SYN_PLL_XTAL5 0x44 86*4882a593Smuzhiyun #define B2056_SYN_PLL_XTAL6 0x45 87*4882a593Smuzhiyun #define B2056_SYN_PLL_REFDIV 0x46 88*4882a593Smuzhiyun #define B2056_SYN_PLL_PFD 0x47 89*4882a593Smuzhiyun #define B2056_SYN_PLL_CP1 0x48 90*4882a593Smuzhiyun #define B2056_SYN_PLL_CP2 0x49 91*4882a593Smuzhiyun #define B2056_SYN_PLL_CP3 0x4A 92*4882a593Smuzhiyun #define B2056_SYN_PLL_LOOPFILTER1 0x4B 93*4882a593Smuzhiyun #define B2056_SYN_PLL_LOOPFILTER2 0x4C 94*4882a593Smuzhiyun #define B2056_SYN_PLL_LOOPFILTER3 0x4D 95*4882a593Smuzhiyun #define B2056_SYN_PLL_LOOPFILTER4 0x4E 96*4882a593Smuzhiyun #define B2056_SYN_PLL_LOOPFILTER5 0x4F 97*4882a593Smuzhiyun #define B2056_SYN_PLL_MMD1 0x50 98*4882a593Smuzhiyun #define B2056_SYN_PLL_MMD2 0x51 99*4882a593Smuzhiyun #define B2056_SYN_PLL_VCO1 0x52 100*4882a593Smuzhiyun #define B2056_SYN_PLL_VCO2 0x53 101*4882a593Smuzhiyun #define B2056_SYN_PLL_MONITOR1 0x54 102*4882a593Smuzhiyun #define B2056_SYN_PLL_MONITOR2 0x55 103*4882a593Smuzhiyun #define B2056_SYN_PLL_VCOCAL1 0x56 104*4882a593Smuzhiyun #define B2056_SYN_PLL_VCOCAL2 0x57 105*4882a593Smuzhiyun #define B2056_SYN_PLL_VCOCAL4 0x58 106*4882a593Smuzhiyun #define B2056_SYN_PLL_VCOCAL5 0x59 107*4882a593Smuzhiyun #define B2056_SYN_PLL_VCOCAL6 0x5A 108*4882a593Smuzhiyun #define B2056_SYN_PLL_VCOCAL7 0x5B 109*4882a593Smuzhiyun #define B2056_SYN_PLL_VCOCAL8 0x5C 110*4882a593Smuzhiyun #define B2056_SYN_PLL_VCOCAL9 0x5D 111*4882a593Smuzhiyun #define B2056_SYN_PLL_VCOCAL10 0x5E 112*4882a593Smuzhiyun #define B2056_SYN_PLL_VCOCAL11 0x5F 113*4882a593Smuzhiyun #define B2056_SYN_PLL_VCOCAL12 0x60 114*4882a593Smuzhiyun #define B2056_SYN_PLL_VCOCAL13 0x61 115*4882a593Smuzhiyun #define B2056_SYN_PLL_VREG 0x62 116*4882a593Smuzhiyun #define B2056_SYN_PLL_STATUS1 0x63 117*4882a593Smuzhiyun #define B2056_SYN_PLL_STATUS2 0x64 118*4882a593Smuzhiyun #define B2056_SYN_PLL_STATUS3 0x65 119*4882a593Smuzhiyun #define B2056_SYN_LOGEN_PU0 0x66 120*4882a593Smuzhiyun #define B2056_SYN_LOGEN_PU1 0x67 121*4882a593Smuzhiyun #define B2056_SYN_LOGEN_PU2 0x68 122*4882a593Smuzhiyun #define B2056_SYN_LOGEN_PU3 0x69 123*4882a593Smuzhiyun #define B2056_SYN_LOGEN_PU5 0x6A 124*4882a593Smuzhiyun #define B2056_SYN_LOGEN_PU6 0x6B 125*4882a593Smuzhiyun #define B2056_SYN_LOGEN_PU7 0x6C 126*4882a593Smuzhiyun #define B2056_SYN_LOGEN_PU8 0x6D 127*4882a593Smuzhiyun #define B2056_SYN_LOGEN_BIAS_RESET 0x6E 128*4882a593Smuzhiyun #define B2056_SYN_LOGEN_RCCR1 0x6F 129*4882a593Smuzhiyun #define B2056_SYN_LOGEN_VCOBUF1 0x70 130*4882a593Smuzhiyun #define B2056_SYN_LOGEN_MIXER1 0x71 131*4882a593Smuzhiyun #define B2056_SYN_LOGEN_MIXER2 0x72 132*4882a593Smuzhiyun #define B2056_SYN_LOGEN_BUF1 0x73 133*4882a593Smuzhiyun #define B2056_SYN_LOGENBUF2 0x74 134*4882a593Smuzhiyun #define B2056_SYN_LOGEN_BUF3 0x75 135*4882a593Smuzhiyun #define B2056_SYN_LOGEN_BUF4 0x76 136*4882a593Smuzhiyun #define B2056_SYN_LOGEN_DIV1 0x77 137*4882a593Smuzhiyun #define B2056_SYN_LOGEN_DIV2 0x78 138*4882a593Smuzhiyun #define B2056_SYN_LOGEN_DIV3 0x79 139*4882a593Smuzhiyun #define B2056_SYN_LOGEN_ACL1 0x7A 140*4882a593Smuzhiyun #define B2056_SYN_LOGEN_ACL2 0x7B 141*4882a593Smuzhiyun #define B2056_SYN_LOGEN_ACL3 0x7C 142*4882a593Smuzhiyun #define B2056_SYN_LOGEN_ACL4 0x7D 143*4882a593Smuzhiyun #define B2056_SYN_LOGEN_ACL5 0x7E 144*4882a593Smuzhiyun #define B2056_SYN_LOGEN_ACL6 0x7F 145*4882a593Smuzhiyun #define B2056_SYN_LOGEN_ACLOUT 0x80 146*4882a593Smuzhiyun #define B2056_SYN_LOGEN_ACLCAL1 0x81 147*4882a593Smuzhiyun #define B2056_SYN_LOGEN_ACLCAL2 0x82 148*4882a593Smuzhiyun #define B2056_SYN_LOGEN_ACLCAL3 0x83 149*4882a593Smuzhiyun #define B2056_SYN_CALEN 0x84 150*4882a593Smuzhiyun #define B2056_SYN_LOGEN_PEAKDET1 0x85 151*4882a593Smuzhiyun #define B2056_SYN_LOGEN_CORE_ACL_OVR 0x86 152*4882a593Smuzhiyun #define B2056_SYN_LOGEN_RX_DIFF_ACL_OVR 0x87 153*4882a593Smuzhiyun #define B2056_SYN_LOGEN_TX_DIFF_ACL_OVR 0x88 154*4882a593Smuzhiyun #define B2056_SYN_LOGEN_RX_CMOS_ACL_OVR 0x89 155*4882a593Smuzhiyun #define B2056_SYN_LOGEN_TX_CMOS_ACL_OVR 0x8A 156*4882a593Smuzhiyun #define B2056_SYN_LOGEN_VCOBUF2 0x8B 157*4882a593Smuzhiyun #define B2056_SYN_LOGEN_MIXER3 0x8C 158*4882a593Smuzhiyun #define B2056_SYN_LOGEN_BUF5 0x8D 159*4882a593Smuzhiyun #define B2056_SYN_LOGEN_BUF6 0x8E 160*4882a593Smuzhiyun #define B2056_SYN_LOGEN_CBUFRX1 0x8F 161*4882a593Smuzhiyun #define B2056_SYN_LOGEN_CBUFRX2 0x90 162*4882a593Smuzhiyun #define B2056_SYN_LOGEN_CBUFRX3 0x91 163*4882a593Smuzhiyun #define B2056_SYN_LOGEN_CBUFRX4 0x92 164*4882a593Smuzhiyun #define B2056_SYN_LOGEN_CBUFTX1 0x93 165*4882a593Smuzhiyun #define B2056_SYN_LOGEN_CBUFTX2 0x94 166*4882a593Smuzhiyun #define B2056_SYN_LOGEN_CBUFTX3 0x95 167*4882a593Smuzhiyun #define B2056_SYN_LOGEN_CBUFTX4 0x96 168*4882a593Smuzhiyun #define B2056_SYN_LOGEN_CMOSRX1 0x97 169*4882a593Smuzhiyun #define B2056_SYN_LOGEN_CMOSRX2 0x98 170*4882a593Smuzhiyun #define B2056_SYN_LOGEN_CMOSRX3 0x99 171*4882a593Smuzhiyun #define B2056_SYN_LOGEN_CMOSRX4 0x9A 172*4882a593Smuzhiyun #define B2056_SYN_LOGEN_CMOSTX1 0x9B 173*4882a593Smuzhiyun #define B2056_SYN_LOGEN_CMOSTX2 0x9C 174*4882a593Smuzhiyun #define B2056_SYN_LOGEN_CMOSTX3 0x9D 175*4882a593Smuzhiyun #define B2056_SYN_LOGEN_CMOSTX4 0x9E 176*4882a593Smuzhiyun #define B2056_SYN_LOGEN_VCOBUF2_OVRVAL 0x9F 177*4882a593Smuzhiyun #define B2056_SYN_LOGEN_MIXER3_OVRVAL 0xA0 178*4882a593Smuzhiyun #define B2056_SYN_LOGEN_BUF5_OVRVAL 0xA1 179*4882a593Smuzhiyun #define B2056_SYN_LOGEN_BUF6_OVRVAL 0xA2 180*4882a593Smuzhiyun #define B2056_SYN_LOGEN_CBUFRX1_OVRVAL 0xA3 181*4882a593Smuzhiyun #define B2056_SYN_LOGEN_CBUFRX2_OVRVAL 0xA4 182*4882a593Smuzhiyun #define B2056_SYN_LOGEN_CBUFRX3_OVRVAL 0xA5 183*4882a593Smuzhiyun #define B2056_SYN_LOGEN_CBUFRX4_OVRVAL 0xA6 184*4882a593Smuzhiyun #define B2056_SYN_LOGEN_CBUFTX1_OVRVAL 0xA7 185*4882a593Smuzhiyun #define B2056_SYN_LOGEN_CBUFTX2_OVRVAL 0xA8 186*4882a593Smuzhiyun #define B2056_SYN_LOGEN_CBUFTX3_OVRVAL 0xA9 187*4882a593Smuzhiyun #define B2056_SYN_LOGEN_CBUFTX4_OVRVAL 0xAA 188*4882a593Smuzhiyun #define B2056_SYN_LOGEN_CMOSRX1_OVRVAL 0xAB 189*4882a593Smuzhiyun #define B2056_SYN_LOGEN_CMOSRX2_OVRVAL 0xAC 190*4882a593Smuzhiyun #define B2056_SYN_LOGEN_CMOSRX3_OVRVAL 0xAD 191*4882a593Smuzhiyun #define B2056_SYN_LOGEN_CMOSRX4_OVRVAL 0xAE 192*4882a593Smuzhiyun #define B2056_SYN_LOGEN_CMOSTX1_OVRVAL 0xAF 193*4882a593Smuzhiyun #define B2056_SYN_LOGEN_CMOSTX2_OVRVAL 0xB0 194*4882a593Smuzhiyun #define B2056_SYN_LOGEN_CMOSTX3_OVRVAL 0xB1 195*4882a593Smuzhiyun #define B2056_SYN_LOGEN_CMOSTX4_OVRVAL 0xB2 196*4882a593Smuzhiyun #define B2056_SYN_LOGEN_ACL_WAITCNT 0xB3 197*4882a593Smuzhiyun #define B2056_SYN_LOGEN_CORE_CALVALID 0xB4 198*4882a593Smuzhiyun #define B2056_SYN_LOGEN_RX_CMOS_CALVALID 0xB5 199*4882a593Smuzhiyun #define B2056_SYN_LOGEN_TX_CMOS_VALID 0xB6 200*4882a593Smuzhiyun 201*4882a593Smuzhiyun #define B2056_TX_RESERVED_ADDR0 0x00 202*4882a593Smuzhiyun #define B2056_TX_IDCODE 0x01 203*4882a593Smuzhiyun #define B2056_TX_RESERVED_ADDR2 0x02 204*4882a593Smuzhiyun #define B2056_TX_RESERVED_ADDR3 0x03 205*4882a593Smuzhiyun #define B2056_TX_RESERVED_ADDR4 0x04 206*4882a593Smuzhiyun #define B2056_TX_RESERVED_ADDR5 0x05 207*4882a593Smuzhiyun #define B2056_TX_RESERVED_ADDR6 0x06 208*4882a593Smuzhiyun #define B2056_TX_RESERVED_ADDR7 0x07 209*4882a593Smuzhiyun #define B2056_TX_COM_CTRL 0x08 210*4882a593Smuzhiyun #define B2056_TX_COM_PU 0x09 211*4882a593Smuzhiyun #define B2056_TX_COM_OVR 0x0A 212*4882a593Smuzhiyun #define B2056_TX_COM_RESET 0x0B 213*4882a593Smuzhiyun #define B2056_TX_COM_RCAL 0x0C 214*4882a593Smuzhiyun #define B2056_TX_COM_RC_RXLPF 0x0D 215*4882a593Smuzhiyun #define B2056_TX_COM_RC_TXLPF 0x0E 216*4882a593Smuzhiyun #define B2056_TX_COM_RC_RXHPF 0x0F 217*4882a593Smuzhiyun #define B2056_TX_RESERVED_ADDR16 0x10 218*4882a593Smuzhiyun #define B2056_TX_RESERVED_ADDR17 0x11 219*4882a593Smuzhiyun #define B2056_TX_RESERVED_ADDR18 0x12 220*4882a593Smuzhiyun #define B2056_TX_RESERVED_ADDR19 0x13 221*4882a593Smuzhiyun #define B2056_TX_RESERVED_ADDR20 0x14 222*4882a593Smuzhiyun #define B2056_TX_RESERVED_ADDR21 0x15 223*4882a593Smuzhiyun #define B2056_TX_RESERVED_ADDR22 0x16 224*4882a593Smuzhiyun #define B2056_TX_RESERVED_ADDR23 0x17 225*4882a593Smuzhiyun #define B2056_TX_RESERVED_ADDR24 0x18 226*4882a593Smuzhiyun #define B2056_TX_RESERVED_ADDR25 0x19 227*4882a593Smuzhiyun #define B2056_TX_RESERVED_ADDR26 0x1A 228*4882a593Smuzhiyun #define B2056_TX_RESERVED_ADDR27 0x1B 229*4882a593Smuzhiyun #define B2056_TX_RESERVED_ADDR28 0x1C 230*4882a593Smuzhiyun #define B2056_TX_RESERVED_ADDR29 0x1D 231*4882a593Smuzhiyun #define B2056_TX_RESERVED_ADDR30 0x1E 232*4882a593Smuzhiyun #define B2056_TX_RESERVED_ADDR31 0x1F 233*4882a593Smuzhiyun #define B2056_TX_IQCAL_GAIN_BW 0x20 234*4882a593Smuzhiyun #define B2056_TX_LOFT_FINE_I 0x21 235*4882a593Smuzhiyun #define B2056_TX_LOFT_FINE_Q 0x22 236*4882a593Smuzhiyun #define B2056_TX_LOFT_COARSE_I 0x23 237*4882a593Smuzhiyun #define B2056_TX_LOFT_COARSE_Q 0x24 238*4882a593Smuzhiyun #define B2056_TX_TX_COM_MASTER1 0x25 239*4882a593Smuzhiyun #define B2056_TX_TX_COM_MASTER2 0x26 240*4882a593Smuzhiyun #define B2056_TX_RXIQCAL_TXMUX 0x27 241*4882a593Smuzhiyun #define B2056_TX_TX_SSI_MASTER 0x28 242*4882a593Smuzhiyun #define B2056_TX_IQCAL_VCM_HG 0x29 243*4882a593Smuzhiyun #define B2056_TX_IQCAL_IDAC 0x2A 244*4882a593Smuzhiyun #define B2056_TX_TSSI_VCM 0x2B 245*4882a593Smuzhiyun #define B2056_TX_TX_AMP_DET 0x2C 246*4882a593Smuzhiyun #define B2056_TX_TX_SSI_MUX 0x2D 247*4882a593Smuzhiyun #define B2056_TX_TSSIA 0x2E 248*4882a593Smuzhiyun #define B2056_TX_TSSIG 0x2F 249*4882a593Smuzhiyun #define B2056_TX_TSSI_MISC1 0x30 250*4882a593Smuzhiyun #define B2056_TX_TSSI_MISC2 0x31 251*4882a593Smuzhiyun #define B2056_TX_TSSI_MISC3 0x32 252*4882a593Smuzhiyun #define B2056_TX_PA_SPARE1 0x33 253*4882a593Smuzhiyun #define B2056_TX_PA_SPARE2 0x34 254*4882a593Smuzhiyun #define B2056_TX_INTPAA_MASTER 0x35 255*4882a593Smuzhiyun #define B2056_TX_INTPAA_GAIN 0x36 256*4882a593Smuzhiyun #define B2056_TX_INTPAA_BOOST_TUNE 0x37 257*4882a593Smuzhiyun #define B2056_TX_INTPAA_IAUX_STAT 0x38 258*4882a593Smuzhiyun #define B2056_TX_INTPAA_IAUX_DYN 0x39 259*4882a593Smuzhiyun #define B2056_TX_INTPAA_IMAIN_STAT 0x3A 260*4882a593Smuzhiyun #define B2056_TX_INTPAA_IMAIN_DYN 0x3B 261*4882a593Smuzhiyun #define B2056_TX_INTPAA_CASCBIAS 0x3C 262*4882a593Smuzhiyun #define B2056_TX_INTPAA_PASLOPE 0x3D 263*4882a593Smuzhiyun #define B2056_TX_INTPAA_PA_MISC 0x3E 264*4882a593Smuzhiyun #define B2056_TX_INTPAG_MASTER 0x3F 265*4882a593Smuzhiyun #define B2056_TX_INTPAG_GAIN 0x40 266*4882a593Smuzhiyun #define B2056_TX_INTPAG_BOOST_TUNE 0x41 267*4882a593Smuzhiyun #define B2056_TX_INTPAG_IAUX_STAT 0x42 268*4882a593Smuzhiyun #define B2056_TX_INTPAG_IAUX_DYN 0x43 269*4882a593Smuzhiyun #define B2056_TX_INTPAG_IMAIN_STAT 0x44 270*4882a593Smuzhiyun #define B2056_TX_INTPAG_IMAIN_DYN 0x45 271*4882a593Smuzhiyun #define B2056_TX_INTPAG_CASCBIAS 0x46 272*4882a593Smuzhiyun #define B2056_TX_INTPAG_PASLOPE 0x47 273*4882a593Smuzhiyun #define B2056_TX_INTPAG_PA_MISC 0x48 274*4882a593Smuzhiyun #define B2056_TX_PADA_MASTER 0x49 275*4882a593Smuzhiyun #define B2056_TX_PADA_IDAC 0x4A 276*4882a593Smuzhiyun #define B2056_TX_PADA_CASCBIAS 0x4B 277*4882a593Smuzhiyun #define B2056_TX_PADA_GAIN 0x4C 278*4882a593Smuzhiyun #define B2056_TX_PADA_BOOST_TUNE 0x4D 279*4882a593Smuzhiyun #define B2056_TX_PADA_SLOPE 0x4E 280*4882a593Smuzhiyun #define B2056_TX_PADG_MASTER 0x4F 281*4882a593Smuzhiyun #define B2056_TX_PADG_IDAC 0x50 282*4882a593Smuzhiyun #define B2056_TX_PADG_CASCBIAS 0x51 283*4882a593Smuzhiyun #define B2056_TX_PADG_GAIN 0x52 284*4882a593Smuzhiyun #define B2056_TX_PADG_BOOST_TUNE 0x53 285*4882a593Smuzhiyun #define B2056_TX_PADG_SLOPE 0x54 286*4882a593Smuzhiyun #define B2056_TX_PGAA_MASTER 0x55 287*4882a593Smuzhiyun #define B2056_TX_PGAA_IDAC 0x56 288*4882a593Smuzhiyun #define B2056_TX_PGAA_GAIN 0x57 289*4882a593Smuzhiyun #define B2056_TX_PGAA_BOOST_TUNE 0x58 290*4882a593Smuzhiyun #define B2056_TX_PGAA_SLOPE 0x59 291*4882a593Smuzhiyun #define B2056_TX_PGAA_MISC 0x5A 292*4882a593Smuzhiyun #define B2056_TX_PGAG_MASTER 0x5B 293*4882a593Smuzhiyun #define B2056_TX_PGAG_IDAC 0x5C 294*4882a593Smuzhiyun #define B2056_TX_PGAG_GAIN 0x5D 295*4882a593Smuzhiyun #define B2056_TX_PGAG_BOOST_TUNE 0x5E 296*4882a593Smuzhiyun #define B2056_TX_PGAG_SLOPE 0x5F 297*4882a593Smuzhiyun #define B2056_TX_PGAG_MISC 0x60 298*4882a593Smuzhiyun #define B2056_TX_MIXA_MASTER 0x61 299*4882a593Smuzhiyun #define B2056_TX_MIXA_BOOST_TUNE 0x62 300*4882a593Smuzhiyun #define B2056_TX_MIXG 0x63 301*4882a593Smuzhiyun #define B2056_TX_MIXG_BOOST_TUNE 0x64 302*4882a593Smuzhiyun #define B2056_TX_BB_GM_MASTER 0x65 303*4882a593Smuzhiyun #define B2056_TX_GMBB_GM 0x66 304*4882a593Smuzhiyun #define B2056_TX_GMBB_IDAC 0x67 305*4882a593Smuzhiyun #define B2056_TX_TXLPF_MASTER 0x68 306*4882a593Smuzhiyun #define B2056_TX_TXLPF_RCCAL 0x69 307*4882a593Smuzhiyun #define B2056_TX_TXLPF_RCCAL_OFF0 0x6A 308*4882a593Smuzhiyun #define B2056_TX_TXLPF_RCCAL_OFF1 0x6B 309*4882a593Smuzhiyun #define B2056_TX_TXLPF_RCCAL_OFF2 0x6C 310*4882a593Smuzhiyun #define B2056_TX_TXLPF_RCCAL_OFF3 0x6D 311*4882a593Smuzhiyun #define B2056_TX_TXLPF_RCCAL_OFF4 0x6E 312*4882a593Smuzhiyun #define B2056_TX_TXLPF_RCCAL_OFF5 0x6F 313*4882a593Smuzhiyun #define B2056_TX_TXLPF_RCCAL_OFF6 0x70 314*4882a593Smuzhiyun #define B2056_TX_TXLPF_BW 0x71 315*4882a593Smuzhiyun #define B2056_TX_TXLPF_GAIN 0x72 316*4882a593Smuzhiyun #define B2056_TX_TXLPF_IDAC 0x73 317*4882a593Smuzhiyun #define B2056_TX_TXLPF_IDAC_0 0x74 318*4882a593Smuzhiyun #define B2056_TX_TXLPF_IDAC_1 0x75 319*4882a593Smuzhiyun #define B2056_TX_TXLPF_IDAC_2 0x76 320*4882a593Smuzhiyun #define B2056_TX_TXLPF_IDAC_3 0x77 321*4882a593Smuzhiyun #define B2056_TX_TXLPF_IDAC_4 0x78 322*4882a593Smuzhiyun #define B2056_TX_TXLPF_IDAC_5 0x79 323*4882a593Smuzhiyun #define B2056_TX_TXLPF_IDAC_6 0x7A 324*4882a593Smuzhiyun #define B2056_TX_TXLPF_OPAMP_IDAC 0x7B 325*4882a593Smuzhiyun #define B2056_TX_TXLPF_MISC 0x7C 326*4882a593Smuzhiyun #define B2056_TX_TXSPARE1 0x7D 327*4882a593Smuzhiyun #define B2056_TX_TXSPARE2 0x7E 328*4882a593Smuzhiyun #define B2056_TX_TXSPARE3 0x7F 329*4882a593Smuzhiyun #define B2056_TX_TXSPARE4 0x80 330*4882a593Smuzhiyun #define B2056_TX_TXSPARE5 0x81 331*4882a593Smuzhiyun #define B2056_TX_TXSPARE6 0x82 332*4882a593Smuzhiyun #define B2056_TX_TXSPARE7 0x83 333*4882a593Smuzhiyun #define B2056_TX_TXSPARE8 0x84 334*4882a593Smuzhiyun #define B2056_TX_TXSPARE9 0x85 335*4882a593Smuzhiyun #define B2056_TX_TXSPARE10 0x86 336*4882a593Smuzhiyun #define B2056_TX_TXSPARE11 0x87 337*4882a593Smuzhiyun #define B2056_TX_TXSPARE12 0x88 338*4882a593Smuzhiyun #define B2056_TX_TXSPARE13 0x89 339*4882a593Smuzhiyun #define B2056_TX_TXSPARE14 0x8A 340*4882a593Smuzhiyun #define B2056_TX_TXSPARE15 0x8B 341*4882a593Smuzhiyun #define B2056_TX_TXSPARE16 0x8C 342*4882a593Smuzhiyun #define B2056_TX_STATUS_INTPA_GAIN 0x8D 343*4882a593Smuzhiyun #define B2056_TX_STATUS_PAD_GAIN 0x8E 344*4882a593Smuzhiyun #define B2056_TX_STATUS_PGA_GAIN 0x8F 345*4882a593Smuzhiyun #define B2056_TX_STATUS_GM_TXLPF_GAIN 0x90 346*4882a593Smuzhiyun #define B2056_TX_STATUS_TXLPF_BW 0x91 347*4882a593Smuzhiyun #define B2056_TX_STATUS_TXLPF_RC 0x92 348*4882a593Smuzhiyun #define B2056_TX_GMBB_IDAC0 0x93 349*4882a593Smuzhiyun #define B2056_TX_GMBB_IDAC1 0x94 350*4882a593Smuzhiyun #define B2056_TX_GMBB_IDAC2 0x95 351*4882a593Smuzhiyun #define B2056_TX_GMBB_IDAC3 0x96 352*4882a593Smuzhiyun #define B2056_TX_GMBB_IDAC4 0x97 353*4882a593Smuzhiyun #define B2056_TX_GMBB_IDAC5 0x98 354*4882a593Smuzhiyun #define B2056_TX_GMBB_IDAC6 0x99 355*4882a593Smuzhiyun #define B2056_TX_GMBB_IDAC7 0x9A 356*4882a593Smuzhiyun 357*4882a593Smuzhiyun #define B2056_RX_RESERVED_ADDR0 0x00 358*4882a593Smuzhiyun #define B2056_RX_IDCODE 0x01 359*4882a593Smuzhiyun #define B2056_RX_RESERVED_ADDR2 0x02 360*4882a593Smuzhiyun #define B2056_RX_RESERVED_ADDR3 0x03 361*4882a593Smuzhiyun #define B2056_RX_RESERVED_ADDR4 0x04 362*4882a593Smuzhiyun #define B2056_RX_RESERVED_ADDR5 0x05 363*4882a593Smuzhiyun #define B2056_RX_RESERVED_ADDR6 0x06 364*4882a593Smuzhiyun #define B2056_RX_RESERVED_ADDR7 0x07 365*4882a593Smuzhiyun #define B2056_RX_COM_CTRL 0x08 366*4882a593Smuzhiyun #define B2056_RX_COM_PU 0x09 367*4882a593Smuzhiyun #define B2056_RX_COM_OVR 0x0A 368*4882a593Smuzhiyun #define B2056_RX_COM_RESET 0x0B 369*4882a593Smuzhiyun #define B2056_RX_COM_RCAL 0x0C 370*4882a593Smuzhiyun #define B2056_RX_COM_RC_RXLPF 0x0D 371*4882a593Smuzhiyun #define B2056_RX_COM_RC_TXLPF 0x0E 372*4882a593Smuzhiyun #define B2056_RX_COM_RC_RXHPF 0x0F 373*4882a593Smuzhiyun #define B2056_RX_RESERVED_ADDR16 0x10 374*4882a593Smuzhiyun #define B2056_RX_RESERVED_ADDR17 0x11 375*4882a593Smuzhiyun #define B2056_RX_RESERVED_ADDR18 0x12 376*4882a593Smuzhiyun #define B2056_RX_RESERVED_ADDR19 0x13 377*4882a593Smuzhiyun #define B2056_RX_RESERVED_ADDR20 0x14 378*4882a593Smuzhiyun #define B2056_RX_RESERVED_ADDR21 0x15 379*4882a593Smuzhiyun #define B2056_RX_RESERVED_ADDR22 0x16 380*4882a593Smuzhiyun #define B2056_RX_RESERVED_ADDR23 0x17 381*4882a593Smuzhiyun #define B2056_RX_RESERVED_ADDR24 0x18 382*4882a593Smuzhiyun #define B2056_RX_RESERVED_ADDR25 0x19 383*4882a593Smuzhiyun #define B2056_RX_RESERVED_ADDR26 0x1A 384*4882a593Smuzhiyun #define B2056_RX_RESERVED_ADDR27 0x1B 385*4882a593Smuzhiyun #define B2056_RX_RESERVED_ADDR28 0x1C 386*4882a593Smuzhiyun #define B2056_RX_RESERVED_ADDR29 0x1D 387*4882a593Smuzhiyun #define B2056_RX_RESERVED_ADDR30 0x1E 388*4882a593Smuzhiyun #define B2056_RX_RESERVED_ADDR31 0x1F 389*4882a593Smuzhiyun #define B2056_RX_RXIQCAL_RXMUX 0x20 390*4882a593Smuzhiyun #define B2056_RX_RSSI_PU 0x21 391*4882a593Smuzhiyun #define B2056_RX_RSSI_SEL 0x22 392*4882a593Smuzhiyun #define B2056_RX_RSSI_GAIN 0x23 393*4882a593Smuzhiyun #define B2056_RX_RSSI_NB_IDAC 0x24 394*4882a593Smuzhiyun #define B2056_RX_RSSI_WB2I_IDAC_1 0x25 395*4882a593Smuzhiyun #define B2056_RX_RSSI_WB2I_IDAC_2 0x26 396*4882a593Smuzhiyun #define B2056_RX_RSSI_WB2Q_IDAC_1 0x27 397*4882a593Smuzhiyun #define B2056_RX_RSSI_WB2Q_IDAC_2 0x28 398*4882a593Smuzhiyun #define B2056_RX_RSSI_POLE 0x29 399*4882a593Smuzhiyun #define B2056_RX_RSSI_WB1_IDAC 0x2A 400*4882a593Smuzhiyun #define B2056_RX_RSSI_MISC 0x2B 401*4882a593Smuzhiyun #define B2056_RX_LNAA_MASTER 0x2C 402*4882a593Smuzhiyun #define B2056_RX_LNAA_TUNE 0x2D 403*4882a593Smuzhiyun #define B2056_RX_LNAA_GAIN 0x2E 404*4882a593Smuzhiyun #define B2056_RX_LNA_A_SLOPE 0x2F 405*4882a593Smuzhiyun #define B2056_RX_BIASPOLE_LNAA1_IDAC 0x30 406*4882a593Smuzhiyun #define B2056_RX_LNAA2_IDAC 0x31 407*4882a593Smuzhiyun #define B2056_RX_LNA1A_MISC 0x32 408*4882a593Smuzhiyun #define B2056_RX_LNAG_MASTER 0x33 409*4882a593Smuzhiyun #define B2056_RX_LNAG_TUNE 0x34 410*4882a593Smuzhiyun #define B2056_RX_LNAG_GAIN 0x35 411*4882a593Smuzhiyun #define B2056_RX_LNA_G_SLOPE 0x36 412*4882a593Smuzhiyun #define B2056_RX_BIASPOLE_LNAG1_IDAC 0x37 413*4882a593Smuzhiyun #define B2056_RX_LNAG2_IDAC 0x38 414*4882a593Smuzhiyun #define B2056_RX_LNA1G_MISC 0x39 415*4882a593Smuzhiyun #define B2056_RX_MIXA_MASTER 0x3A 416*4882a593Smuzhiyun #define B2056_RX_MIXA_VCM 0x3B 417*4882a593Smuzhiyun #define B2056_RX_MIXA_CTRLPTAT 0x3C 418*4882a593Smuzhiyun #define B2056_RX_MIXA_LOB_BIAS 0x3D 419*4882a593Smuzhiyun #define B2056_RX_MIXA_CORE_IDAC 0x3E 420*4882a593Smuzhiyun #define B2056_RX_MIXA_CMFB_IDAC 0x3F 421*4882a593Smuzhiyun #define B2056_RX_MIXA_BIAS_AUX 0x40 422*4882a593Smuzhiyun #define B2056_RX_MIXA_BIAS_MAIN 0x41 423*4882a593Smuzhiyun #define B2056_RX_MIXA_BIAS_MISC 0x42 424*4882a593Smuzhiyun #define B2056_RX_MIXA_MAST_BIAS 0x43 425*4882a593Smuzhiyun #define B2056_RX_MIXG_MASTER 0x44 426*4882a593Smuzhiyun #define B2056_RX_MIXG_VCM 0x45 427*4882a593Smuzhiyun #define B2056_RX_MIXG_CTRLPTAT 0x46 428*4882a593Smuzhiyun #define B2056_RX_MIXG_LOB_BIAS 0x47 429*4882a593Smuzhiyun #define B2056_RX_MIXG_CORE_IDAC 0x48 430*4882a593Smuzhiyun #define B2056_RX_MIXG_CMFB_IDAC 0x49 431*4882a593Smuzhiyun #define B2056_RX_MIXG_BIAS_AUX 0x4A 432*4882a593Smuzhiyun #define B2056_RX_MIXG_BIAS_MAIN 0x4B 433*4882a593Smuzhiyun #define B2056_RX_MIXG_BIAS_MISC 0x4C 434*4882a593Smuzhiyun #define B2056_RX_MIXG_MAST_BIAS 0x4D 435*4882a593Smuzhiyun #define B2056_RX_TIA_MASTER 0x4E 436*4882a593Smuzhiyun #define B2056_RX_TIA_IOPAMP 0x4F 437*4882a593Smuzhiyun #define B2056_RX_TIA_QOPAMP 0x50 438*4882a593Smuzhiyun #define B2056_RX_TIA_IMISC 0x51 439*4882a593Smuzhiyun #define B2056_RX_TIA_QMISC 0x52 440*4882a593Smuzhiyun #define B2056_RX_TIA_GAIN 0x53 441*4882a593Smuzhiyun #define B2056_RX_TIA_SPARE1 0x54 442*4882a593Smuzhiyun #define B2056_RX_TIA_SPARE2 0x55 443*4882a593Smuzhiyun #define B2056_RX_BB_LPF_MASTER 0x56 444*4882a593Smuzhiyun #define B2056_RX_AACI_MASTER 0x57 445*4882a593Smuzhiyun #define B2056_RX_RXLPF_IDAC 0x58 446*4882a593Smuzhiyun #define B2056_RX_RXLPF_OPAMPBIAS_LOWQ 0x59 447*4882a593Smuzhiyun #define B2056_RX_RXLPF_OPAMPBIAS_HIGHQ 0x5A 448*4882a593Smuzhiyun #define B2056_RX_RXLPF_BIAS_DCCANCEL 0x5B 449*4882a593Smuzhiyun #define B2056_RX_RXLPF_OUTVCM 0x5C 450*4882a593Smuzhiyun #define B2056_RX_RXLPF_INVCM_BODY 0x5D 451*4882a593Smuzhiyun #define B2056_RX_RXLPF_CC_OP 0x5E 452*4882a593Smuzhiyun #define B2056_RX_RXLPF_GAIN 0x5F 453*4882a593Smuzhiyun #define B2056_RX_RXLPF_Q_BW 0x60 454*4882a593Smuzhiyun #define B2056_RX_RXLPF_HP_CORNER_BW 0x61 455*4882a593Smuzhiyun #define B2056_RX_RXLPF_RCCAL_HPC 0x62 456*4882a593Smuzhiyun #define B2056_RX_RXHPF_OFF0 0x63 457*4882a593Smuzhiyun #define B2056_RX_RXHPF_OFF1 0x64 458*4882a593Smuzhiyun #define B2056_RX_RXHPF_OFF2 0x65 459*4882a593Smuzhiyun #define B2056_RX_RXHPF_OFF3 0x66 460*4882a593Smuzhiyun #define B2056_RX_RXHPF_OFF4 0x67 461*4882a593Smuzhiyun #define B2056_RX_RXHPF_OFF5 0x68 462*4882a593Smuzhiyun #define B2056_RX_RXHPF_OFF6 0x69 463*4882a593Smuzhiyun #define B2056_RX_RXHPF_OFF7 0x6A 464*4882a593Smuzhiyun #define B2056_RX_RXLPF_RCCAL_LPC 0x6B 465*4882a593Smuzhiyun #define B2056_RX_RXLPF_OFF_0 0x6C 466*4882a593Smuzhiyun #define B2056_RX_RXLPF_OFF_1 0x6D 467*4882a593Smuzhiyun #define B2056_RX_RXLPF_OFF_2 0x6E 468*4882a593Smuzhiyun #define B2056_RX_RXLPF_OFF_3 0x6F 469*4882a593Smuzhiyun #define B2056_RX_RXLPF_OFF_4 0x70 470*4882a593Smuzhiyun #define B2056_RX_UNUSED 0x71 471*4882a593Smuzhiyun #define B2056_RX_VGA_MASTER 0x72 472*4882a593Smuzhiyun #define B2056_RX_VGA_BIAS 0x73 473*4882a593Smuzhiyun #define B2056_RX_VGA_BIAS_DCCANCEL 0x74 474*4882a593Smuzhiyun #define B2056_RX_VGA_GAIN 0x75 475*4882a593Smuzhiyun #define B2056_RX_VGA_HP_CORNER_BW 0x76 476*4882a593Smuzhiyun #define B2056_RX_VGABUF_BIAS 0x77 477*4882a593Smuzhiyun #define B2056_RX_VGABUF_GAIN_BW 0x78 478*4882a593Smuzhiyun #define B2056_RX_TXFBMIX_A 0x79 479*4882a593Smuzhiyun #define B2056_RX_TXFBMIX_G 0x7A 480*4882a593Smuzhiyun #define B2056_RX_RXSPARE1 0x7B 481*4882a593Smuzhiyun #define B2056_RX_RXSPARE2 0x7C 482*4882a593Smuzhiyun #define B2056_RX_RXSPARE3 0x7D 483*4882a593Smuzhiyun #define B2056_RX_RXSPARE4 0x7E 484*4882a593Smuzhiyun #define B2056_RX_RXSPARE5 0x7F 485*4882a593Smuzhiyun #define B2056_RX_RXSPARE6 0x80 486*4882a593Smuzhiyun #define B2056_RX_RXSPARE7 0x81 487*4882a593Smuzhiyun #define B2056_RX_RXSPARE8 0x82 488*4882a593Smuzhiyun #define B2056_RX_RXSPARE9 0x83 489*4882a593Smuzhiyun #define B2056_RX_RXSPARE10 0x84 490*4882a593Smuzhiyun #define B2056_RX_RXSPARE11 0x85 491*4882a593Smuzhiyun #define B2056_RX_RXSPARE12 0x86 492*4882a593Smuzhiyun #define B2056_RX_RXSPARE13 0x87 493*4882a593Smuzhiyun #define B2056_RX_RXSPARE14 0x88 494*4882a593Smuzhiyun #define B2056_RX_RXSPARE15 0x89 495*4882a593Smuzhiyun #define B2056_RX_RXSPARE16 0x8A 496*4882a593Smuzhiyun #define B2056_RX_STATUS_LNAA_GAIN 0x8B 497*4882a593Smuzhiyun #define B2056_RX_STATUS_LNAG_GAIN 0x8C 498*4882a593Smuzhiyun #define B2056_RX_STATUS_MIXTIA_GAIN 0x8D 499*4882a593Smuzhiyun #define B2056_RX_STATUS_RXLPF_GAIN 0x8E 500*4882a593Smuzhiyun #define B2056_RX_STATUS_VGA_BUF_GAIN 0x8F 501*4882a593Smuzhiyun #define B2056_RX_STATUS_RXLPF_Q 0x90 502*4882a593Smuzhiyun #define B2056_RX_STATUS_RXLPF_BUF_BW 0x91 503*4882a593Smuzhiyun #define B2056_RX_STATUS_RXLPF_VGA_HPC 0x92 504*4882a593Smuzhiyun #define B2056_RX_STATUS_RXLPF_RC 0x93 505*4882a593Smuzhiyun #define B2056_RX_STATUS_HPC_RC 0x94 506*4882a593Smuzhiyun 507*4882a593Smuzhiyun #define B2056_LNA1_A_PU 0x01 508*4882a593Smuzhiyun #define B2056_LNA2_A_PU 0x02 509*4882a593Smuzhiyun #define B2056_LNA1_G_PU 0x01 510*4882a593Smuzhiyun #define B2056_LNA2_G_PU 0x02 511*4882a593Smuzhiyun #define B2056_MIXA_PU_I 0x01 512*4882a593Smuzhiyun #define B2056_MIXA_PU_Q 0x02 513*4882a593Smuzhiyun #define B2056_MIXA_PU_GM 0x10 514*4882a593Smuzhiyun #define B2056_MIXG_PU_I 0x01 515*4882a593Smuzhiyun #define B2056_MIXG_PU_Q 0x02 516*4882a593Smuzhiyun #define B2056_MIXG_PU_GM 0x10 517*4882a593Smuzhiyun #define B2056_TIA_PU 0x01 518*4882a593Smuzhiyun #define B2056_BB_LPF_PU 0x20 519*4882a593Smuzhiyun #define B2056_W1_PU 0x02 520*4882a593Smuzhiyun #define B2056_W2_PU 0x04 521*4882a593Smuzhiyun #define B2056_NB_PU 0x08 522*4882a593Smuzhiyun #define B2056_RSSI_W1_SEL 0x02 523*4882a593Smuzhiyun #define B2056_RSSI_W2_SEL 0x04 524*4882a593Smuzhiyun #define B2056_RSSI_NB_SEL 0x08 525*4882a593Smuzhiyun #define B2056_VCM_MASK 0x1C 526*4882a593Smuzhiyun #define B2056_RSSI_VCM_SHIFT 0x02 527*4882a593Smuzhiyun 528*4882a593Smuzhiyun #define B2056_SYN (0x0 << 12) 529*4882a593Smuzhiyun #define B2056_TX0 (0x2 << 12) 530*4882a593Smuzhiyun #define B2056_TX1 (0x3 << 12) 531*4882a593Smuzhiyun #define B2056_RX0 (0x6 << 12) 532*4882a593Smuzhiyun #define B2056_RX1 (0x7 << 12) 533*4882a593Smuzhiyun #define B2056_ALLTX (0xE << 12) 534*4882a593Smuzhiyun #define B2056_ALLRX (0xF << 12) 535*4882a593Smuzhiyun 536*4882a593Smuzhiyun #define B2056_SYN_RESERVED_ADDR0 0x00 537*4882a593Smuzhiyun #define B2056_SYN_IDCODE 0x01 538*4882a593Smuzhiyun #define B2056_SYN_RESERVED_ADDR2 0x02 539*4882a593Smuzhiyun #define B2056_SYN_RESERVED_ADDR3 0x03 540*4882a593Smuzhiyun #define B2056_SYN_RESERVED_ADDR4 0x04 541*4882a593Smuzhiyun #define B2056_SYN_RESERVED_ADDR5 0x05 542*4882a593Smuzhiyun #define B2056_SYN_RESERVED_ADDR6 0x06 543*4882a593Smuzhiyun #define B2056_SYN_RESERVED_ADDR7 0x07 544*4882a593Smuzhiyun #define B2056_SYN_COM_CTRL 0x08 545*4882a593Smuzhiyun #define B2056_SYN_COM_PU 0x09 546*4882a593Smuzhiyun #define B2056_SYN_COM_OVR 0x0A 547*4882a593Smuzhiyun #define B2056_SYN_COM_RESET 0x0B 548*4882a593Smuzhiyun #define B2056_SYN_COM_RCAL 0x0C 549*4882a593Smuzhiyun #define B2056_SYN_COM_RC_RXLPF 0x0D 550*4882a593Smuzhiyun #define B2056_SYN_COM_RC_TXLPF 0x0E 551*4882a593Smuzhiyun #define B2056_SYN_COM_RC_RXHPF 0x0F 552*4882a593Smuzhiyun #define B2056_SYN_RESERVED_ADDR16 0x10 553*4882a593Smuzhiyun #define B2056_SYN_RESERVED_ADDR17 0x11 554*4882a593Smuzhiyun #define B2056_SYN_RESERVED_ADDR18 0x12 555*4882a593Smuzhiyun #define B2056_SYN_RESERVED_ADDR19 0x13 556*4882a593Smuzhiyun #define B2056_SYN_RESERVED_ADDR20 0x14 557*4882a593Smuzhiyun #define B2056_SYN_RESERVED_ADDR21 0x15 558*4882a593Smuzhiyun #define B2056_SYN_RESERVED_ADDR22 0x16 559*4882a593Smuzhiyun #define B2056_SYN_RESERVED_ADDR23 0x17 560*4882a593Smuzhiyun #define B2056_SYN_RESERVED_ADDR24 0x18 561*4882a593Smuzhiyun #define B2056_SYN_RESERVED_ADDR25 0x19 562*4882a593Smuzhiyun #define B2056_SYN_RESERVED_ADDR26 0x1A 563*4882a593Smuzhiyun #define B2056_SYN_RESERVED_ADDR27 0x1B 564*4882a593Smuzhiyun #define B2056_SYN_RESERVED_ADDR28 0x1C 565*4882a593Smuzhiyun #define B2056_SYN_RESERVED_ADDR29 0x1D 566*4882a593Smuzhiyun #define B2056_SYN_RESERVED_ADDR30 0x1E 567*4882a593Smuzhiyun #define B2056_SYN_RESERVED_ADDR31 0x1F 568*4882a593Smuzhiyun #define B2056_SYN_GPIO_MASTER1 0x20 569*4882a593Smuzhiyun #define B2056_SYN_GPIO_MASTER2 0x21 570*4882a593Smuzhiyun #define B2056_SYN_TOPBIAS_MASTER 0x22 571*4882a593Smuzhiyun #define B2056_SYN_TOPBIAS_RCAL 0x23 572*4882a593Smuzhiyun #define B2056_SYN_AFEREG 0x24 573*4882a593Smuzhiyun #define B2056_SYN_TEMPPROCSENSE 0x25 574*4882a593Smuzhiyun #define B2056_SYN_TEMPPROCSENSEIDAC 0x26 575*4882a593Smuzhiyun #define B2056_SYN_TEMPPROCSENSERCAL 0x27 576*4882a593Smuzhiyun #define B2056_SYN_LPO 0x28 577*4882a593Smuzhiyun #define B2056_SYN_VDDCAL_MASTER 0x29 578*4882a593Smuzhiyun #define B2056_SYN_VDDCAL_IDAC 0x2A 579*4882a593Smuzhiyun #define B2056_SYN_VDDCAL_STATUS 0x2B 580*4882a593Smuzhiyun #define B2056_SYN_RCAL_MASTER 0x2C 581*4882a593Smuzhiyun #define B2056_SYN_RCAL_CODE_OUT 0x2D 582*4882a593Smuzhiyun #define B2056_SYN_RCCAL_CTRL0 0x2E 583*4882a593Smuzhiyun #define B2056_SYN_RCCAL_CTRL1 0x2F 584*4882a593Smuzhiyun #define B2056_SYN_RCCAL_CTRL2 0x30 585*4882a593Smuzhiyun #define B2056_SYN_RCCAL_CTRL3 0x31 586*4882a593Smuzhiyun #define B2056_SYN_RCCAL_CTRL4 0x32 587*4882a593Smuzhiyun #define B2056_SYN_RCCAL_CTRL5 0x33 588*4882a593Smuzhiyun #define B2056_SYN_RCCAL_CTRL6 0x34 589*4882a593Smuzhiyun #define B2056_SYN_RCCAL_CTRL7 0x35 590*4882a593Smuzhiyun #define B2056_SYN_RCCAL_CTRL8 0x36 591*4882a593Smuzhiyun #define B2056_SYN_RCCAL_CTRL9 0x37 592*4882a593Smuzhiyun #define B2056_SYN_RCCAL_CTRL10 0x38 593*4882a593Smuzhiyun #define B2056_SYN_RCCAL_CTRL11 0x39 594*4882a593Smuzhiyun #define B2056_SYN_ZCAL_SPARE1 0x3A 595*4882a593Smuzhiyun #define B2056_SYN_ZCAL_SPARE2 0x3B 596*4882a593Smuzhiyun #define B2056_SYN_PLL_MAST1 0x3C 597*4882a593Smuzhiyun #define B2056_SYN_PLL_MAST2 0x3D 598*4882a593Smuzhiyun #define B2056_SYN_PLL_MAST3 0x3E 599*4882a593Smuzhiyun #define B2056_SYN_PLL_BIAS_RESET 0x3F 600*4882a593Smuzhiyun #define B2056_SYN_PLL_XTAL0 0x40 601*4882a593Smuzhiyun #define B2056_SYN_PLL_XTAL1 0x41 602*4882a593Smuzhiyun #define B2056_SYN_PLL_XTAL3 0x42 603*4882a593Smuzhiyun #define B2056_SYN_PLL_XTAL4 0x43 604*4882a593Smuzhiyun #define B2056_SYN_PLL_XTAL5 0x44 605*4882a593Smuzhiyun #define B2056_SYN_PLL_XTAL6 0x45 606*4882a593Smuzhiyun #define B2056_SYN_PLL_REFDIV 0x46 607*4882a593Smuzhiyun #define B2056_SYN_PLL_PFD 0x47 608*4882a593Smuzhiyun #define B2056_SYN_PLL_CP1 0x48 609*4882a593Smuzhiyun #define B2056_SYN_PLL_CP2 0x49 610*4882a593Smuzhiyun #define B2056_SYN_PLL_CP3 0x4A 611*4882a593Smuzhiyun #define B2056_SYN_PLL_LOOPFILTER1 0x4B 612*4882a593Smuzhiyun #define B2056_SYN_PLL_LOOPFILTER2 0x4C 613*4882a593Smuzhiyun #define B2056_SYN_PLL_LOOPFILTER3 0x4D 614*4882a593Smuzhiyun #define B2056_SYN_PLL_LOOPFILTER4 0x4E 615*4882a593Smuzhiyun #define B2056_SYN_PLL_LOOPFILTER5 0x4F 616*4882a593Smuzhiyun #define B2056_SYN_PLL_MMD1 0x50 617*4882a593Smuzhiyun #define B2056_SYN_PLL_MMD2 0x51 618*4882a593Smuzhiyun #define B2056_SYN_PLL_VCO1 0x52 619*4882a593Smuzhiyun #define B2056_SYN_PLL_VCO2 0x53 620*4882a593Smuzhiyun #define B2056_SYN_PLL_MONITOR1 0x54 621*4882a593Smuzhiyun #define B2056_SYN_PLL_MONITOR2 0x55 622*4882a593Smuzhiyun #define B2056_SYN_PLL_VCOCAL1 0x56 623*4882a593Smuzhiyun #define B2056_SYN_PLL_VCOCAL2 0x57 624*4882a593Smuzhiyun #define B2056_SYN_PLL_VCOCAL4 0x58 625*4882a593Smuzhiyun #define B2056_SYN_PLL_VCOCAL5 0x59 626*4882a593Smuzhiyun #define B2056_SYN_PLL_VCOCAL6 0x5A 627*4882a593Smuzhiyun #define B2056_SYN_PLL_VCOCAL7 0x5B 628*4882a593Smuzhiyun #define B2056_SYN_PLL_VCOCAL8 0x5C 629*4882a593Smuzhiyun #define B2056_SYN_PLL_VCOCAL9 0x5D 630*4882a593Smuzhiyun #define B2056_SYN_PLL_VCOCAL10 0x5E 631*4882a593Smuzhiyun #define B2056_SYN_PLL_VCOCAL11 0x5F 632*4882a593Smuzhiyun #define B2056_SYN_PLL_VCOCAL12 0x60 633*4882a593Smuzhiyun #define B2056_SYN_PLL_VCOCAL13 0x61 634*4882a593Smuzhiyun #define B2056_SYN_PLL_VREG 0x62 635*4882a593Smuzhiyun #define B2056_SYN_PLL_STATUS1 0x63 636*4882a593Smuzhiyun #define B2056_SYN_PLL_STATUS2 0x64 637*4882a593Smuzhiyun #define B2056_SYN_PLL_STATUS3 0x65 638*4882a593Smuzhiyun #define B2056_SYN_LOGEN_PU0 0x66 639*4882a593Smuzhiyun #define B2056_SYN_LOGEN_PU1 0x67 640*4882a593Smuzhiyun #define B2056_SYN_LOGEN_PU2 0x68 641*4882a593Smuzhiyun #define B2056_SYN_LOGEN_PU3 0x69 642*4882a593Smuzhiyun #define B2056_SYN_LOGEN_PU5 0x6A 643*4882a593Smuzhiyun #define B2056_SYN_LOGEN_PU6 0x6B 644*4882a593Smuzhiyun #define B2056_SYN_LOGEN_PU7 0x6C 645*4882a593Smuzhiyun #define B2056_SYN_LOGEN_PU8 0x6D 646*4882a593Smuzhiyun #define B2056_SYN_LOGEN_BIAS_RESET 0x6E 647*4882a593Smuzhiyun #define B2056_SYN_LOGEN_RCCR1 0x6F 648*4882a593Smuzhiyun #define B2056_SYN_LOGEN_VCOBUF1 0x70 649*4882a593Smuzhiyun #define B2056_SYN_LOGEN_MIXER1 0x71 650*4882a593Smuzhiyun #define B2056_SYN_LOGEN_MIXER2 0x72 651*4882a593Smuzhiyun #define B2056_SYN_LOGEN_BUF1 0x73 652*4882a593Smuzhiyun #define B2056_SYN_LOGENBUF2 0x74 653*4882a593Smuzhiyun #define B2056_SYN_LOGEN_BUF3 0x75 654*4882a593Smuzhiyun #define B2056_SYN_LOGEN_BUF4 0x76 655*4882a593Smuzhiyun #define B2056_SYN_LOGEN_DIV1 0x77 656*4882a593Smuzhiyun #define B2056_SYN_LOGEN_DIV2 0x78 657*4882a593Smuzhiyun #define B2056_SYN_LOGEN_DIV3 0x79 658*4882a593Smuzhiyun #define B2056_SYN_LOGEN_ACL1 0x7A 659*4882a593Smuzhiyun #define B2056_SYN_LOGEN_ACL2 0x7B 660*4882a593Smuzhiyun #define B2056_SYN_LOGEN_ACL3 0x7C 661*4882a593Smuzhiyun #define B2056_SYN_LOGEN_ACL4 0x7D 662*4882a593Smuzhiyun #define B2056_SYN_LOGEN_ACL5 0x7E 663*4882a593Smuzhiyun #define B2056_SYN_LOGEN_ACL6 0x7F 664*4882a593Smuzhiyun #define B2056_SYN_LOGEN_ACLOUT 0x80 665*4882a593Smuzhiyun #define B2056_SYN_LOGEN_ACLCAL1 0x81 666*4882a593Smuzhiyun #define B2056_SYN_LOGEN_ACLCAL2 0x82 667*4882a593Smuzhiyun #define B2056_SYN_LOGEN_ACLCAL3 0x83 668*4882a593Smuzhiyun #define B2056_SYN_CALEN 0x84 669*4882a593Smuzhiyun #define B2056_SYN_LOGEN_PEAKDET1 0x85 670*4882a593Smuzhiyun #define B2056_SYN_LOGEN_CORE_ACL_OVR 0x86 671*4882a593Smuzhiyun #define B2056_SYN_LOGEN_RX_DIFF_ACL_OVR 0x87 672*4882a593Smuzhiyun #define B2056_SYN_LOGEN_TX_DIFF_ACL_OVR 0x88 673*4882a593Smuzhiyun #define B2056_SYN_LOGEN_RX_CMOS_ACL_OVR 0x89 674*4882a593Smuzhiyun #define B2056_SYN_LOGEN_TX_CMOS_ACL_OVR 0x8A 675*4882a593Smuzhiyun #define B2056_SYN_LOGEN_VCOBUF2 0x8B 676*4882a593Smuzhiyun #define B2056_SYN_LOGEN_MIXER3 0x8C 677*4882a593Smuzhiyun #define B2056_SYN_LOGEN_BUF5 0x8D 678*4882a593Smuzhiyun #define B2056_SYN_LOGEN_BUF6 0x8E 679*4882a593Smuzhiyun #define B2056_SYN_LOGEN_CBUFRX1 0x8F 680*4882a593Smuzhiyun #define B2056_SYN_LOGEN_CBUFRX2 0x90 681*4882a593Smuzhiyun #define B2056_SYN_LOGEN_CBUFRX3 0x91 682*4882a593Smuzhiyun #define B2056_SYN_LOGEN_CBUFRX4 0x92 683*4882a593Smuzhiyun #define B2056_SYN_LOGEN_CBUFTX1 0x93 684*4882a593Smuzhiyun #define B2056_SYN_LOGEN_CBUFTX2 0x94 685*4882a593Smuzhiyun #define B2056_SYN_LOGEN_CBUFTX3 0x95 686*4882a593Smuzhiyun #define B2056_SYN_LOGEN_CBUFTX4 0x96 687*4882a593Smuzhiyun #define B2056_SYN_LOGEN_CMOSRX1 0x97 688*4882a593Smuzhiyun #define B2056_SYN_LOGEN_CMOSRX2 0x98 689*4882a593Smuzhiyun #define B2056_SYN_LOGEN_CMOSRX3 0x99 690*4882a593Smuzhiyun #define B2056_SYN_LOGEN_CMOSRX4 0x9A 691*4882a593Smuzhiyun #define B2056_SYN_LOGEN_CMOSTX1 0x9B 692*4882a593Smuzhiyun #define B2056_SYN_LOGEN_CMOSTX2 0x9C 693*4882a593Smuzhiyun #define B2056_SYN_LOGEN_CMOSTX3 0x9D 694*4882a593Smuzhiyun #define B2056_SYN_LOGEN_CMOSTX4 0x9E 695*4882a593Smuzhiyun #define B2056_SYN_LOGEN_VCOBUF2_OVRVAL 0x9F 696*4882a593Smuzhiyun #define B2056_SYN_LOGEN_MIXER3_OVRVAL 0xA0 697*4882a593Smuzhiyun #define B2056_SYN_LOGEN_BUF5_OVRVAL 0xA1 698*4882a593Smuzhiyun #define B2056_SYN_LOGEN_BUF6_OVRVAL 0xA2 699*4882a593Smuzhiyun #define B2056_SYN_LOGEN_CBUFRX1_OVRVAL 0xA3 700*4882a593Smuzhiyun #define B2056_SYN_LOGEN_CBUFRX2_OVRVAL 0xA4 701*4882a593Smuzhiyun #define B2056_SYN_LOGEN_CBUFRX3_OVRVAL 0xA5 702*4882a593Smuzhiyun #define B2056_SYN_LOGEN_CBUFRX4_OVRVAL 0xA6 703*4882a593Smuzhiyun #define B2056_SYN_LOGEN_CBUFTX1_OVRVAL 0xA7 704*4882a593Smuzhiyun #define B2056_SYN_LOGEN_CBUFTX2_OVRVAL 0xA8 705*4882a593Smuzhiyun #define B2056_SYN_LOGEN_CBUFTX3_OVRVAL 0xA9 706*4882a593Smuzhiyun #define B2056_SYN_LOGEN_CBUFTX4_OVRVAL 0xAA 707*4882a593Smuzhiyun #define B2056_SYN_LOGEN_CMOSRX1_OVRVAL 0xAB 708*4882a593Smuzhiyun #define B2056_SYN_LOGEN_CMOSRX2_OVRVAL 0xAC 709*4882a593Smuzhiyun #define B2056_SYN_LOGEN_CMOSRX3_OVRVAL 0xAD 710*4882a593Smuzhiyun #define B2056_SYN_LOGEN_CMOSRX4_OVRVAL 0xAE 711*4882a593Smuzhiyun #define B2056_SYN_LOGEN_CMOSTX1_OVRVAL 0xAF 712*4882a593Smuzhiyun #define B2056_SYN_LOGEN_CMOSTX2_OVRVAL 0xB0 713*4882a593Smuzhiyun #define B2056_SYN_LOGEN_CMOSTX3_OVRVAL 0xB1 714*4882a593Smuzhiyun #define B2056_SYN_LOGEN_CMOSTX4_OVRVAL 0xB2 715*4882a593Smuzhiyun #define B2056_SYN_LOGEN_ACL_WAITCNT 0xB3 716*4882a593Smuzhiyun #define B2056_SYN_LOGEN_CORE_CALVALID 0xB4 717*4882a593Smuzhiyun #define B2056_SYN_LOGEN_RX_CMOS_CALVALID 0xB5 718*4882a593Smuzhiyun #define B2056_SYN_LOGEN_TX_CMOS_VALID 0xB6 719*4882a593Smuzhiyun 720*4882a593Smuzhiyun #define B2056_TX_RESERVED_ADDR0 0x00 721*4882a593Smuzhiyun #define B2056_TX_IDCODE 0x01 722*4882a593Smuzhiyun #define B2056_TX_RESERVED_ADDR2 0x02 723*4882a593Smuzhiyun #define B2056_TX_RESERVED_ADDR3 0x03 724*4882a593Smuzhiyun #define B2056_TX_RESERVED_ADDR4 0x04 725*4882a593Smuzhiyun #define B2056_TX_RESERVED_ADDR5 0x05 726*4882a593Smuzhiyun #define B2056_TX_RESERVED_ADDR6 0x06 727*4882a593Smuzhiyun #define B2056_TX_RESERVED_ADDR7 0x07 728*4882a593Smuzhiyun #define B2056_TX_COM_CTRL 0x08 729*4882a593Smuzhiyun #define B2056_TX_COM_PU 0x09 730*4882a593Smuzhiyun #define B2056_TX_COM_OVR 0x0A 731*4882a593Smuzhiyun #define B2056_TX_COM_RESET 0x0B 732*4882a593Smuzhiyun #define B2056_TX_COM_RCAL 0x0C 733*4882a593Smuzhiyun #define B2056_TX_COM_RC_RXLPF 0x0D 734*4882a593Smuzhiyun #define B2056_TX_COM_RC_TXLPF 0x0E 735*4882a593Smuzhiyun #define B2056_TX_COM_RC_RXHPF 0x0F 736*4882a593Smuzhiyun #define B2056_TX_RESERVED_ADDR16 0x10 737*4882a593Smuzhiyun #define B2056_TX_RESERVED_ADDR17 0x11 738*4882a593Smuzhiyun #define B2056_TX_RESERVED_ADDR18 0x12 739*4882a593Smuzhiyun #define B2056_TX_RESERVED_ADDR19 0x13 740*4882a593Smuzhiyun #define B2056_TX_RESERVED_ADDR20 0x14 741*4882a593Smuzhiyun #define B2056_TX_RESERVED_ADDR21 0x15 742*4882a593Smuzhiyun #define B2056_TX_RESERVED_ADDR22 0x16 743*4882a593Smuzhiyun #define B2056_TX_RESERVED_ADDR23 0x17 744*4882a593Smuzhiyun #define B2056_TX_RESERVED_ADDR24 0x18 745*4882a593Smuzhiyun #define B2056_TX_RESERVED_ADDR25 0x19 746*4882a593Smuzhiyun #define B2056_TX_RESERVED_ADDR26 0x1A 747*4882a593Smuzhiyun #define B2056_TX_RESERVED_ADDR27 0x1B 748*4882a593Smuzhiyun #define B2056_TX_RESERVED_ADDR28 0x1C 749*4882a593Smuzhiyun #define B2056_TX_RESERVED_ADDR29 0x1D 750*4882a593Smuzhiyun #define B2056_TX_RESERVED_ADDR30 0x1E 751*4882a593Smuzhiyun #define B2056_TX_RESERVED_ADDR31 0x1F 752*4882a593Smuzhiyun #define B2056_TX_IQCAL_GAIN_BW 0x20 753*4882a593Smuzhiyun #define B2056_TX_LOFT_FINE_I 0x21 754*4882a593Smuzhiyun #define B2056_TX_LOFT_FINE_Q 0x22 755*4882a593Smuzhiyun #define B2056_TX_LOFT_COARSE_I 0x23 756*4882a593Smuzhiyun #define B2056_TX_LOFT_COARSE_Q 0x24 757*4882a593Smuzhiyun #define B2056_TX_TX_COM_MASTER1 0x25 758*4882a593Smuzhiyun #define B2056_TX_TX_COM_MASTER2 0x26 759*4882a593Smuzhiyun #define B2056_TX_RXIQCAL_TXMUX 0x27 760*4882a593Smuzhiyun #define B2056_TX_TX_SSI_MASTER 0x28 761*4882a593Smuzhiyun #define B2056_TX_IQCAL_VCM_HG 0x29 762*4882a593Smuzhiyun #define B2056_TX_IQCAL_IDAC 0x2A 763*4882a593Smuzhiyun #define B2056_TX_TSSI_VCM 0x2B 764*4882a593Smuzhiyun #define B2056_TX_TX_AMP_DET 0x2C 765*4882a593Smuzhiyun #define B2056_TX_TX_SSI_MUX 0x2D 766*4882a593Smuzhiyun #define B2056_TX_TSSIA 0x2E 767*4882a593Smuzhiyun #define B2056_TX_TSSIG 0x2F 768*4882a593Smuzhiyun #define B2056_TX_TSSI_MISC1 0x30 769*4882a593Smuzhiyun #define B2056_TX_TSSI_MISC2 0x31 770*4882a593Smuzhiyun #define B2056_TX_TSSI_MISC3 0x32 771*4882a593Smuzhiyun #define B2056_TX_PA_SPARE1 0x33 772*4882a593Smuzhiyun #define B2056_TX_PA_SPARE2 0x34 773*4882a593Smuzhiyun #define B2056_TX_INTPAA_MASTER 0x35 774*4882a593Smuzhiyun #define B2056_TX_INTPAA_GAIN 0x36 775*4882a593Smuzhiyun #define B2056_TX_INTPAA_BOOST_TUNE 0x37 776*4882a593Smuzhiyun #define B2056_TX_INTPAA_IAUX_STAT 0x38 777*4882a593Smuzhiyun #define B2056_TX_INTPAA_IAUX_DYN 0x39 778*4882a593Smuzhiyun #define B2056_TX_INTPAA_IMAIN_STAT 0x3A 779*4882a593Smuzhiyun #define B2056_TX_INTPAA_IMAIN_DYN 0x3B 780*4882a593Smuzhiyun #define B2056_TX_INTPAA_CASCBIAS 0x3C 781*4882a593Smuzhiyun #define B2056_TX_INTPAA_PASLOPE 0x3D 782*4882a593Smuzhiyun #define B2056_TX_INTPAA_PA_MISC 0x3E 783*4882a593Smuzhiyun #define B2056_TX_INTPAG_MASTER 0x3F 784*4882a593Smuzhiyun #define B2056_TX_INTPAG_GAIN 0x40 785*4882a593Smuzhiyun #define B2056_TX_INTPAG_BOOST_TUNE 0x41 786*4882a593Smuzhiyun #define B2056_TX_INTPAG_IAUX_STAT 0x42 787*4882a593Smuzhiyun #define B2056_TX_INTPAG_IAUX_DYN 0x43 788*4882a593Smuzhiyun #define B2056_TX_INTPAG_IMAIN_STAT 0x44 789*4882a593Smuzhiyun #define B2056_TX_INTPAG_IMAIN_DYN 0x45 790*4882a593Smuzhiyun #define B2056_TX_INTPAG_CASCBIAS 0x46 791*4882a593Smuzhiyun #define B2056_TX_INTPAG_PASLOPE 0x47 792*4882a593Smuzhiyun #define B2056_TX_INTPAG_PA_MISC 0x48 793*4882a593Smuzhiyun #define B2056_TX_PADA_MASTER 0x49 794*4882a593Smuzhiyun #define B2056_TX_PADA_IDAC 0x4A 795*4882a593Smuzhiyun #define B2056_TX_PADA_CASCBIAS 0x4B 796*4882a593Smuzhiyun #define B2056_TX_PADA_GAIN 0x4C 797*4882a593Smuzhiyun #define B2056_TX_PADA_BOOST_TUNE 0x4D 798*4882a593Smuzhiyun #define B2056_TX_PADA_SLOPE 0x4E 799*4882a593Smuzhiyun #define B2056_TX_PADG_MASTER 0x4F 800*4882a593Smuzhiyun #define B2056_TX_PADG_IDAC 0x50 801*4882a593Smuzhiyun #define B2056_TX_PADG_CASCBIAS 0x51 802*4882a593Smuzhiyun #define B2056_TX_PADG_GAIN 0x52 803*4882a593Smuzhiyun #define B2056_TX_PADG_BOOST_TUNE 0x53 804*4882a593Smuzhiyun #define B2056_TX_PADG_SLOPE 0x54 805*4882a593Smuzhiyun #define B2056_TX_PGAA_MASTER 0x55 806*4882a593Smuzhiyun #define B2056_TX_PGAA_IDAC 0x56 807*4882a593Smuzhiyun #define B2056_TX_PGAA_GAIN 0x57 808*4882a593Smuzhiyun #define B2056_TX_PGAA_BOOST_TUNE 0x58 809*4882a593Smuzhiyun #define B2056_TX_PGAA_SLOPE 0x59 810*4882a593Smuzhiyun #define B2056_TX_PGAA_MISC 0x5A 811*4882a593Smuzhiyun #define B2056_TX_PGAG_MASTER 0x5B 812*4882a593Smuzhiyun #define B2056_TX_PGAG_IDAC 0x5C 813*4882a593Smuzhiyun #define B2056_TX_PGAG_GAIN 0x5D 814*4882a593Smuzhiyun #define B2056_TX_PGAG_BOOST_TUNE 0x5E 815*4882a593Smuzhiyun #define B2056_TX_PGAG_SLOPE 0x5F 816*4882a593Smuzhiyun #define B2056_TX_PGAG_MISC 0x60 817*4882a593Smuzhiyun #define B2056_TX_MIXA_MASTER 0x61 818*4882a593Smuzhiyun #define B2056_TX_MIXA_BOOST_TUNE 0x62 819*4882a593Smuzhiyun #define B2056_TX_MIXG 0x63 820*4882a593Smuzhiyun #define B2056_TX_MIXG_BOOST_TUNE 0x64 821*4882a593Smuzhiyun #define B2056_TX_BB_GM_MASTER 0x65 822*4882a593Smuzhiyun #define B2056_TX_GMBB_GM 0x66 823*4882a593Smuzhiyun #define B2056_TX_GMBB_IDAC 0x67 824*4882a593Smuzhiyun #define B2056_TX_TXLPF_MASTER 0x68 825*4882a593Smuzhiyun #define B2056_TX_TXLPF_RCCAL 0x69 826*4882a593Smuzhiyun #define B2056_TX_TXLPF_RCCAL_OFF0 0x6A 827*4882a593Smuzhiyun #define B2056_TX_TXLPF_RCCAL_OFF1 0x6B 828*4882a593Smuzhiyun #define B2056_TX_TXLPF_RCCAL_OFF2 0x6C 829*4882a593Smuzhiyun #define B2056_TX_TXLPF_RCCAL_OFF3 0x6D 830*4882a593Smuzhiyun #define B2056_TX_TXLPF_RCCAL_OFF4 0x6E 831*4882a593Smuzhiyun #define B2056_TX_TXLPF_RCCAL_OFF5 0x6F 832*4882a593Smuzhiyun #define B2056_TX_TXLPF_RCCAL_OFF6 0x70 833*4882a593Smuzhiyun #define B2056_TX_TXLPF_BW 0x71 834*4882a593Smuzhiyun #define B2056_TX_TXLPF_GAIN 0x72 835*4882a593Smuzhiyun #define B2056_TX_TXLPF_IDAC 0x73 836*4882a593Smuzhiyun #define B2056_TX_TXLPF_IDAC_0 0x74 837*4882a593Smuzhiyun #define B2056_TX_TXLPF_IDAC_1 0x75 838*4882a593Smuzhiyun #define B2056_TX_TXLPF_IDAC_2 0x76 839*4882a593Smuzhiyun #define B2056_TX_TXLPF_IDAC_3 0x77 840*4882a593Smuzhiyun #define B2056_TX_TXLPF_IDAC_4 0x78 841*4882a593Smuzhiyun #define B2056_TX_TXLPF_IDAC_5 0x79 842*4882a593Smuzhiyun #define B2056_TX_TXLPF_IDAC_6 0x7A 843*4882a593Smuzhiyun #define B2056_TX_TXLPF_OPAMP_IDAC 0x7B 844*4882a593Smuzhiyun #define B2056_TX_TXLPF_MISC 0x7C 845*4882a593Smuzhiyun #define B2056_TX_TXSPARE1 0x7D 846*4882a593Smuzhiyun #define B2056_TX_TXSPARE2 0x7E 847*4882a593Smuzhiyun #define B2056_TX_TXSPARE3 0x7F 848*4882a593Smuzhiyun #define B2056_TX_TXSPARE4 0x80 849*4882a593Smuzhiyun #define B2056_TX_TXSPARE5 0x81 850*4882a593Smuzhiyun #define B2056_TX_TXSPARE6 0x82 851*4882a593Smuzhiyun #define B2056_TX_TXSPARE7 0x83 852*4882a593Smuzhiyun #define B2056_TX_TXSPARE8 0x84 853*4882a593Smuzhiyun #define B2056_TX_TXSPARE9 0x85 854*4882a593Smuzhiyun #define B2056_TX_TXSPARE10 0x86 855*4882a593Smuzhiyun #define B2056_TX_TXSPARE11 0x87 856*4882a593Smuzhiyun #define B2056_TX_TXSPARE12 0x88 857*4882a593Smuzhiyun #define B2056_TX_TXSPARE13 0x89 858*4882a593Smuzhiyun #define B2056_TX_TXSPARE14 0x8A 859*4882a593Smuzhiyun #define B2056_TX_TXSPARE15 0x8B 860*4882a593Smuzhiyun #define B2056_TX_TXSPARE16 0x8C 861*4882a593Smuzhiyun #define B2056_TX_STATUS_INTPA_GAIN 0x8D 862*4882a593Smuzhiyun #define B2056_TX_STATUS_PAD_GAIN 0x8E 863*4882a593Smuzhiyun #define B2056_TX_STATUS_PGA_GAIN 0x8F 864*4882a593Smuzhiyun #define B2056_TX_STATUS_GM_TXLPF_GAIN 0x90 865*4882a593Smuzhiyun #define B2056_TX_STATUS_TXLPF_BW 0x91 866*4882a593Smuzhiyun #define B2056_TX_STATUS_TXLPF_RC 0x92 867*4882a593Smuzhiyun #define B2056_TX_GMBB_IDAC0 0x93 868*4882a593Smuzhiyun #define B2056_TX_GMBB_IDAC1 0x94 869*4882a593Smuzhiyun #define B2056_TX_GMBB_IDAC2 0x95 870*4882a593Smuzhiyun #define B2056_TX_GMBB_IDAC3 0x96 871*4882a593Smuzhiyun #define B2056_TX_GMBB_IDAC4 0x97 872*4882a593Smuzhiyun #define B2056_TX_GMBB_IDAC5 0x98 873*4882a593Smuzhiyun #define B2056_TX_GMBB_IDAC6 0x99 874*4882a593Smuzhiyun #define B2056_TX_GMBB_IDAC7 0x9A 875*4882a593Smuzhiyun 876*4882a593Smuzhiyun #define B2056_RX_RESERVED_ADDR0 0x00 877*4882a593Smuzhiyun #define B2056_RX_IDCODE 0x01 878*4882a593Smuzhiyun #define B2056_RX_RESERVED_ADDR2 0x02 879*4882a593Smuzhiyun #define B2056_RX_RESERVED_ADDR3 0x03 880*4882a593Smuzhiyun #define B2056_RX_RESERVED_ADDR4 0x04 881*4882a593Smuzhiyun #define B2056_RX_RESERVED_ADDR5 0x05 882*4882a593Smuzhiyun #define B2056_RX_RESERVED_ADDR6 0x06 883*4882a593Smuzhiyun #define B2056_RX_RESERVED_ADDR7 0x07 884*4882a593Smuzhiyun #define B2056_RX_COM_CTRL 0x08 885*4882a593Smuzhiyun #define B2056_RX_COM_PU 0x09 886*4882a593Smuzhiyun #define B2056_RX_COM_OVR 0x0A 887*4882a593Smuzhiyun #define B2056_RX_COM_RESET 0x0B 888*4882a593Smuzhiyun #define B2056_RX_COM_RCAL 0x0C 889*4882a593Smuzhiyun #define B2056_RX_COM_RC_RXLPF 0x0D 890*4882a593Smuzhiyun #define B2056_RX_COM_RC_TXLPF 0x0E 891*4882a593Smuzhiyun #define B2056_RX_COM_RC_RXHPF 0x0F 892*4882a593Smuzhiyun #define B2056_RX_RESERVED_ADDR16 0x10 893*4882a593Smuzhiyun #define B2056_RX_RESERVED_ADDR17 0x11 894*4882a593Smuzhiyun #define B2056_RX_RESERVED_ADDR18 0x12 895*4882a593Smuzhiyun #define B2056_RX_RESERVED_ADDR19 0x13 896*4882a593Smuzhiyun #define B2056_RX_RESERVED_ADDR20 0x14 897*4882a593Smuzhiyun #define B2056_RX_RESERVED_ADDR21 0x15 898*4882a593Smuzhiyun #define B2056_RX_RESERVED_ADDR22 0x16 899*4882a593Smuzhiyun #define B2056_RX_RESERVED_ADDR23 0x17 900*4882a593Smuzhiyun #define B2056_RX_RESERVED_ADDR24 0x18 901*4882a593Smuzhiyun #define B2056_RX_RESERVED_ADDR25 0x19 902*4882a593Smuzhiyun #define B2056_RX_RESERVED_ADDR26 0x1A 903*4882a593Smuzhiyun #define B2056_RX_RESERVED_ADDR27 0x1B 904*4882a593Smuzhiyun #define B2056_RX_RESERVED_ADDR28 0x1C 905*4882a593Smuzhiyun #define B2056_RX_RESERVED_ADDR29 0x1D 906*4882a593Smuzhiyun #define B2056_RX_RESERVED_ADDR30 0x1E 907*4882a593Smuzhiyun #define B2056_RX_RESERVED_ADDR31 0x1F 908*4882a593Smuzhiyun #define B2056_RX_RXIQCAL_RXMUX 0x20 909*4882a593Smuzhiyun #define B2056_RX_RSSI_PU 0x21 910*4882a593Smuzhiyun #define B2056_RX_RSSI_SEL 0x22 911*4882a593Smuzhiyun #define B2056_RX_RSSI_GAIN 0x23 912*4882a593Smuzhiyun #define B2056_RX_RSSI_NB_IDAC 0x24 913*4882a593Smuzhiyun #define B2056_RX_RSSI_WB2I_IDAC_1 0x25 914*4882a593Smuzhiyun #define B2056_RX_RSSI_WB2I_IDAC_2 0x26 915*4882a593Smuzhiyun #define B2056_RX_RSSI_WB2Q_IDAC_1 0x27 916*4882a593Smuzhiyun #define B2056_RX_RSSI_WB2Q_IDAC_2 0x28 917*4882a593Smuzhiyun #define B2056_RX_RSSI_POLE 0x29 918*4882a593Smuzhiyun #define B2056_RX_RSSI_WB1_IDAC 0x2A 919*4882a593Smuzhiyun #define B2056_RX_RSSI_MISC 0x2B 920*4882a593Smuzhiyun #define B2056_RX_LNAA_MASTER 0x2C 921*4882a593Smuzhiyun #define B2056_RX_LNAA_TUNE 0x2D 922*4882a593Smuzhiyun #define B2056_RX_LNAA_GAIN 0x2E 923*4882a593Smuzhiyun #define B2056_RX_LNA_A_SLOPE 0x2F 924*4882a593Smuzhiyun #define B2056_RX_BIASPOLE_LNAA1_IDAC 0x30 925*4882a593Smuzhiyun #define B2056_RX_LNAA2_IDAC 0x31 926*4882a593Smuzhiyun #define B2056_RX_LNA1A_MISC 0x32 927*4882a593Smuzhiyun #define B2056_RX_LNAG_MASTER 0x33 928*4882a593Smuzhiyun #define B2056_RX_LNAG_TUNE 0x34 929*4882a593Smuzhiyun #define B2056_RX_LNAG_GAIN 0x35 930*4882a593Smuzhiyun #define B2056_RX_LNA_G_SLOPE 0x36 931*4882a593Smuzhiyun #define B2056_RX_BIASPOLE_LNAG1_IDAC 0x37 932*4882a593Smuzhiyun #define B2056_RX_LNAG2_IDAC 0x38 933*4882a593Smuzhiyun #define B2056_RX_LNA1G_MISC 0x39 934*4882a593Smuzhiyun #define B2056_RX_MIXA_MASTER 0x3A 935*4882a593Smuzhiyun #define B2056_RX_MIXA_VCM 0x3B 936*4882a593Smuzhiyun #define B2056_RX_MIXA_CTRLPTAT 0x3C 937*4882a593Smuzhiyun #define B2056_RX_MIXA_LOB_BIAS 0x3D 938*4882a593Smuzhiyun #define B2056_RX_MIXA_CORE_IDAC 0x3E 939*4882a593Smuzhiyun #define B2056_RX_MIXA_CMFB_IDAC 0x3F 940*4882a593Smuzhiyun #define B2056_RX_MIXA_BIAS_AUX 0x40 941*4882a593Smuzhiyun #define B2056_RX_MIXA_BIAS_MAIN 0x41 942*4882a593Smuzhiyun #define B2056_RX_MIXA_BIAS_MISC 0x42 943*4882a593Smuzhiyun #define B2056_RX_MIXA_MAST_BIAS 0x43 944*4882a593Smuzhiyun #define B2056_RX_MIXG_MASTER 0x44 945*4882a593Smuzhiyun #define B2056_RX_MIXG_VCM 0x45 946*4882a593Smuzhiyun #define B2056_RX_MIXG_CTRLPTAT 0x46 947*4882a593Smuzhiyun #define B2056_RX_MIXG_LOB_BIAS 0x47 948*4882a593Smuzhiyun #define B2056_RX_MIXG_CORE_IDAC 0x48 949*4882a593Smuzhiyun #define B2056_RX_MIXG_CMFB_IDAC 0x49 950*4882a593Smuzhiyun #define B2056_RX_MIXG_BIAS_AUX 0x4A 951*4882a593Smuzhiyun #define B2056_RX_MIXG_BIAS_MAIN 0x4B 952*4882a593Smuzhiyun #define B2056_RX_MIXG_BIAS_MISC 0x4C 953*4882a593Smuzhiyun #define B2056_RX_MIXG_MAST_BIAS 0x4D 954*4882a593Smuzhiyun #define B2056_RX_TIA_MASTER 0x4E 955*4882a593Smuzhiyun #define B2056_RX_TIA_IOPAMP 0x4F 956*4882a593Smuzhiyun #define B2056_RX_TIA_QOPAMP 0x50 957*4882a593Smuzhiyun #define B2056_RX_TIA_IMISC 0x51 958*4882a593Smuzhiyun #define B2056_RX_TIA_QMISC 0x52 959*4882a593Smuzhiyun #define B2056_RX_TIA_GAIN 0x53 960*4882a593Smuzhiyun #define B2056_RX_TIA_SPARE1 0x54 961*4882a593Smuzhiyun #define B2056_RX_TIA_SPARE2 0x55 962*4882a593Smuzhiyun #define B2056_RX_BB_LPF_MASTER 0x56 963*4882a593Smuzhiyun #define B2056_RX_AACI_MASTER 0x57 964*4882a593Smuzhiyun #define B2056_RX_RXLPF_IDAC 0x58 965*4882a593Smuzhiyun #define B2056_RX_RXLPF_OPAMPBIAS_LOWQ 0x59 966*4882a593Smuzhiyun #define B2056_RX_RXLPF_OPAMPBIAS_HIGHQ 0x5A 967*4882a593Smuzhiyun #define B2056_RX_RXLPF_BIAS_DCCANCEL 0x5B 968*4882a593Smuzhiyun #define B2056_RX_RXLPF_OUTVCM 0x5C 969*4882a593Smuzhiyun #define B2056_RX_RXLPF_INVCM_BODY 0x5D 970*4882a593Smuzhiyun #define B2056_RX_RXLPF_CC_OP 0x5E 971*4882a593Smuzhiyun #define B2056_RX_RXLPF_GAIN 0x5F 972*4882a593Smuzhiyun #define B2056_RX_RXLPF_Q_BW 0x60 973*4882a593Smuzhiyun #define B2056_RX_RXLPF_HP_CORNER_BW 0x61 974*4882a593Smuzhiyun #define B2056_RX_RXLPF_RCCAL_HPC 0x62 975*4882a593Smuzhiyun #define B2056_RX_RXHPF_OFF0 0x63 976*4882a593Smuzhiyun #define B2056_RX_RXHPF_OFF1 0x64 977*4882a593Smuzhiyun #define B2056_RX_RXHPF_OFF2 0x65 978*4882a593Smuzhiyun #define B2056_RX_RXHPF_OFF3 0x66 979*4882a593Smuzhiyun #define B2056_RX_RXHPF_OFF4 0x67 980*4882a593Smuzhiyun #define B2056_RX_RXHPF_OFF5 0x68 981*4882a593Smuzhiyun #define B2056_RX_RXHPF_OFF6 0x69 982*4882a593Smuzhiyun #define B2056_RX_RXHPF_OFF7 0x6A 983*4882a593Smuzhiyun #define B2056_RX_RXLPF_RCCAL_LPC 0x6B 984*4882a593Smuzhiyun #define B2056_RX_RXLPF_OFF_0 0x6C 985*4882a593Smuzhiyun #define B2056_RX_RXLPF_OFF_1 0x6D 986*4882a593Smuzhiyun #define B2056_RX_RXLPF_OFF_2 0x6E 987*4882a593Smuzhiyun #define B2056_RX_RXLPF_OFF_3 0x6F 988*4882a593Smuzhiyun #define B2056_RX_RXLPF_OFF_4 0x70 989*4882a593Smuzhiyun #define B2056_RX_UNUSED 0x71 990*4882a593Smuzhiyun #define B2056_RX_VGA_MASTER 0x72 991*4882a593Smuzhiyun #define B2056_RX_VGA_BIAS 0x73 992*4882a593Smuzhiyun #define B2056_RX_VGA_BIAS_DCCANCEL 0x74 993*4882a593Smuzhiyun #define B2056_RX_VGA_GAIN 0x75 994*4882a593Smuzhiyun #define B2056_RX_VGA_HP_CORNER_BW 0x76 995*4882a593Smuzhiyun #define B2056_RX_VGABUF_BIAS 0x77 996*4882a593Smuzhiyun #define B2056_RX_VGABUF_GAIN_BW 0x78 997*4882a593Smuzhiyun #define B2056_RX_TXFBMIX_A 0x79 998*4882a593Smuzhiyun #define B2056_RX_TXFBMIX_G 0x7A 999*4882a593Smuzhiyun #define B2056_RX_RXSPARE1 0x7B 1000*4882a593Smuzhiyun #define B2056_RX_RXSPARE2 0x7C 1001*4882a593Smuzhiyun #define B2056_RX_RXSPARE3 0x7D 1002*4882a593Smuzhiyun #define B2056_RX_RXSPARE4 0x7E 1003*4882a593Smuzhiyun #define B2056_RX_RXSPARE5 0x7F 1004*4882a593Smuzhiyun #define B2056_RX_RXSPARE6 0x80 1005*4882a593Smuzhiyun #define B2056_RX_RXSPARE7 0x81 1006*4882a593Smuzhiyun #define B2056_RX_RXSPARE8 0x82 1007*4882a593Smuzhiyun #define B2056_RX_RXSPARE9 0x83 1008*4882a593Smuzhiyun #define B2056_RX_RXSPARE10 0x84 1009*4882a593Smuzhiyun #define B2056_RX_RXSPARE11 0x85 1010*4882a593Smuzhiyun #define B2056_RX_RXSPARE12 0x86 1011*4882a593Smuzhiyun #define B2056_RX_RXSPARE13 0x87 1012*4882a593Smuzhiyun #define B2056_RX_RXSPARE14 0x88 1013*4882a593Smuzhiyun #define B2056_RX_RXSPARE15 0x89 1014*4882a593Smuzhiyun #define B2056_RX_RXSPARE16 0x8A 1015*4882a593Smuzhiyun #define B2056_RX_STATUS_LNAA_GAIN 0x8B 1016*4882a593Smuzhiyun #define B2056_RX_STATUS_LNAG_GAIN 0x8C 1017*4882a593Smuzhiyun #define B2056_RX_STATUS_MIXTIA_GAIN 0x8D 1018*4882a593Smuzhiyun #define B2056_RX_STATUS_RXLPF_GAIN 0x8E 1019*4882a593Smuzhiyun #define B2056_RX_STATUS_VGA_BUF_GAIN 0x8F 1020*4882a593Smuzhiyun #define B2056_RX_STATUS_RXLPF_Q 0x90 1021*4882a593Smuzhiyun #define B2056_RX_STATUS_RXLPF_BUF_BW 0x91 1022*4882a593Smuzhiyun #define B2056_RX_STATUS_RXLPF_VGA_HPC 0x92 1023*4882a593Smuzhiyun #define B2056_RX_STATUS_RXLPF_RC 0x93 1024*4882a593Smuzhiyun #define B2056_RX_STATUS_HPC_RC 0x94 1025*4882a593Smuzhiyun 1026*4882a593Smuzhiyun #define B2056_LNA1_A_PU 0x01 1027*4882a593Smuzhiyun #define B2056_LNA2_A_PU 0x02 1028*4882a593Smuzhiyun #define B2056_LNA1_G_PU 0x01 1029*4882a593Smuzhiyun #define B2056_LNA2_G_PU 0x02 1030*4882a593Smuzhiyun #define B2056_MIXA_PU_I 0x01 1031*4882a593Smuzhiyun #define B2056_MIXA_PU_Q 0x02 1032*4882a593Smuzhiyun #define B2056_MIXA_PU_GM 0x10 1033*4882a593Smuzhiyun #define B2056_MIXG_PU_I 0x01 1034*4882a593Smuzhiyun #define B2056_MIXG_PU_Q 0x02 1035*4882a593Smuzhiyun #define B2056_MIXG_PU_GM 0x10 1036*4882a593Smuzhiyun #define B2056_TIA_PU 0x01 1037*4882a593Smuzhiyun #define B2056_BB_LPF_PU 0x20 1038*4882a593Smuzhiyun #define B2056_W1_PU 0x02 1039*4882a593Smuzhiyun #define B2056_W2_PU 0x04 1040*4882a593Smuzhiyun #define B2056_NB_PU 0x08 1041*4882a593Smuzhiyun #define B2056_RSSI_W1_SEL 0x02 1042*4882a593Smuzhiyun #define B2056_RSSI_W2_SEL 0x04 1043*4882a593Smuzhiyun #define B2056_RSSI_NB_SEL 0x08 1044*4882a593Smuzhiyun #define B2056_VCM_MASK 0x1C 1045*4882a593Smuzhiyun #define B2056_RSSI_VCM_SHIFT 0x02 1046*4882a593Smuzhiyun 1047*4882a593Smuzhiyun struct b43_nphy_channeltab_entry_rev3 { 1048*4882a593Smuzhiyun /* The channel frequency in MHz */ 1049*4882a593Smuzhiyun u16 freq; 1050*4882a593Smuzhiyun /* Radio register values on channelswitch */ 1051*4882a593Smuzhiyun u8 radio_syn_pll_vcocal1; 1052*4882a593Smuzhiyun u8 radio_syn_pll_vcocal2; 1053*4882a593Smuzhiyun u8 radio_syn_pll_refdiv; 1054*4882a593Smuzhiyun u8 radio_syn_pll_mmd2; 1055*4882a593Smuzhiyun u8 radio_syn_pll_mmd1; 1056*4882a593Smuzhiyun u8 radio_syn_pll_loopfilter1; 1057*4882a593Smuzhiyun u8 radio_syn_pll_loopfilter2; 1058*4882a593Smuzhiyun u8 radio_syn_pll_loopfilter3; 1059*4882a593Smuzhiyun u8 radio_syn_pll_loopfilter4; 1060*4882a593Smuzhiyun u8 radio_syn_pll_loopfilter5; 1061*4882a593Smuzhiyun u8 radio_syn_reserved_addr27; 1062*4882a593Smuzhiyun u8 radio_syn_reserved_addr28; 1063*4882a593Smuzhiyun u8 radio_syn_reserved_addr29; 1064*4882a593Smuzhiyun u8 radio_syn_logen_vcobuf1; 1065*4882a593Smuzhiyun u8 radio_syn_logen_mixer2; 1066*4882a593Smuzhiyun u8 radio_syn_logen_buf3; 1067*4882a593Smuzhiyun u8 radio_syn_logen_buf4; 1068*4882a593Smuzhiyun u8 radio_rx0_lnaa_tune; 1069*4882a593Smuzhiyun u8 radio_rx0_lnag_tune; 1070*4882a593Smuzhiyun u8 radio_tx0_intpaa_boost_tune; 1071*4882a593Smuzhiyun u8 radio_tx0_intpag_boost_tune; 1072*4882a593Smuzhiyun u8 radio_tx0_pada_boost_tune; 1073*4882a593Smuzhiyun u8 radio_tx0_padg_boost_tune; 1074*4882a593Smuzhiyun u8 radio_tx0_pgaa_boost_tune; 1075*4882a593Smuzhiyun u8 radio_tx0_pgag_boost_tune; 1076*4882a593Smuzhiyun u8 radio_tx0_mixa_boost_tune; 1077*4882a593Smuzhiyun u8 radio_tx0_mixg_boost_tune; 1078*4882a593Smuzhiyun u8 radio_rx1_lnaa_tune; 1079*4882a593Smuzhiyun u8 radio_rx1_lnag_tune; 1080*4882a593Smuzhiyun u8 radio_tx1_intpaa_boost_tune; 1081*4882a593Smuzhiyun u8 radio_tx1_intpag_boost_tune; 1082*4882a593Smuzhiyun u8 radio_tx1_pada_boost_tune; 1083*4882a593Smuzhiyun u8 radio_tx1_padg_boost_tune; 1084*4882a593Smuzhiyun u8 radio_tx1_pgaa_boost_tune; 1085*4882a593Smuzhiyun u8 radio_tx1_pgag_boost_tune; 1086*4882a593Smuzhiyun u8 radio_tx1_mixa_boost_tune; 1087*4882a593Smuzhiyun u8 radio_tx1_mixg_boost_tune; 1088*4882a593Smuzhiyun /* PHY register values on channelswitch */ 1089*4882a593Smuzhiyun struct b43_phy_n_sfo_cfg phy_regs; 1090*4882a593Smuzhiyun }; 1091*4882a593Smuzhiyun 1092*4882a593Smuzhiyun void b2056_upload_inittabs(struct b43_wldev *dev, 1093*4882a593Smuzhiyun bool ghz5, bool ignore_uploadflag); 1094*4882a593Smuzhiyun void b2056_upload_syn_pll_cp2(struct b43_wldev *dev, bool ghz5); 1095*4882a593Smuzhiyun 1096*4882a593Smuzhiyun /* Get the NPHY Channel Switch Table entry for a channel. 1097*4882a593Smuzhiyun * Returns NULL on failure to find an entry. */ 1098*4882a593Smuzhiyun const struct b43_nphy_channeltab_entry_rev3 * 1099*4882a593Smuzhiyun b43_nphy_get_chantabent_rev3(struct b43_wldev *dev, u16 freq); 1100*4882a593Smuzhiyun 1101*4882a593Smuzhiyun #endif /* B43_RADIO_2056_H_ */ 1102