xref: /OK3568_Linux_fs/kernel/drivers/net/wireless/atmel/atmel.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*** -*- linux-c -*- **********************************************************
2*4882a593Smuzhiyun 
3*4882a593Smuzhiyun      Driver for Atmel at76c502 at76c504 and at76c506 wireless cards.
4*4882a593Smuzhiyun 
5*4882a593Smuzhiyun 	Copyright 2000-2001 ATMEL Corporation.
6*4882a593Smuzhiyun 	Copyright 2003-2004 Simon Kelley.
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun     This code was developed from version 2.1.1 of the Atmel drivers,
9*4882a593Smuzhiyun     released by Atmel corp. under the GPL in December 2002. It also
10*4882a593Smuzhiyun     includes code from the Linux aironet drivers (C) Benjamin Reed,
11*4882a593Smuzhiyun     and the Linux PCMCIA package, (C) David Hinds and the Linux wireless
12*4882a593Smuzhiyun     extensions, (C) Jean Tourrilhes.
13*4882a593Smuzhiyun 
14*4882a593Smuzhiyun     The firmware module for reading the MAC address of the card comes from
15*4882a593Smuzhiyun     net.russotto.AtmelMACFW, written by Matthew T. Russotto and copyright
16*4882a593Smuzhiyun     by him. net.russotto.AtmelMACFW is used under the GPL license version 2.
17*4882a593Smuzhiyun     This file contains the module in binary form and, under the terms
18*4882a593Smuzhiyun     of the GPL, in source form. The source is located at the end of the file.
19*4882a593Smuzhiyun 
20*4882a593Smuzhiyun     This program is free software; you can redistribute it and/or modify
21*4882a593Smuzhiyun     it under the terms of the GNU General Public License as published by
22*4882a593Smuzhiyun     the Free Software Foundation; either version 2 of the License, or
23*4882a593Smuzhiyun     (at your option) any later version.
24*4882a593Smuzhiyun 
25*4882a593Smuzhiyun     This software is distributed in the hope that it will be useful,
26*4882a593Smuzhiyun     but WITHOUT ANY WARRANTY; without even the implied warranty of
27*4882a593Smuzhiyun     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
28*4882a593Smuzhiyun     GNU General Public License for more details.
29*4882a593Smuzhiyun 
30*4882a593Smuzhiyun     You should have received a copy of the GNU General Public License
31*4882a593Smuzhiyun     along with Atmel wireless lan drivers; if not, see
32*4882a593Smuzhiyun     <http://www.gnu.org/licenses/>.
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun     For all queries about this code, please contact the current author,
35*4882a593Smuzhiyun     Simon Kelley <simon@thekelleys.org.uk> and not Atmel Corporation.
36*4882a593Smuzhiyun 
37*4882a593Smuzhiyun     Credit is due to HP UK and Cambridge Online Systems Ltd for supplying
38*4882a593Smuzhiyun     hardware used during development of this driver.
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun ******************************************************************************/
41*4882a593Smuzhiyun 
42*4882a593Smuzhiyun #include <linux/interrupt.h>
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun #include <linux/kernel.h>
45*4882a593Smuzhiyun #include <linux/ptrace.h>
46*4882a593Smuzhiyun #include <linux/slab.h>
47*4882a593Smuzhiyun #include <linux/string.h>
48*4882a593Smuzhiyun #include <linux/timer.h>
49*4882a593Smuzhiyun #include <asm/byteorder.h>
50*4882a593Smuzhiyun #include <asm/io.h>
51*4882a593Smuzhiyun #include <linux/uaccess.h>
52*4882a593Smuzhiyun #include <linux/module.h>
53*4882a593Smuzhiyun #include <linux/netdevice.h>
54*4882a593Smuzhiyun #include <linux/etherdevice.h>
55*4882a593Smuzhiyun #include <linux/skbuff.h>
56*4882a593Smuzhiyun #include <linux/if_arp.h>
57*4882a593Smuzhiyun #include <linux/ioport.h>
58*4882a593Smuzhiyun #include <linux/fcntl.h>
59*4882a593Smuzhiyun #include <linux/delay.h>
60*4882a593Smuzhiyun #include <linux/wireless.h>
61*4882a593Smuzhiyun #include <net/iw_handler.h>
62*4882a593Smuzhiyun #include <linux/crc32.h>
63*4882a593Smuzhiyun #include <linux/proc_fs.h>
64*4882a593Smuzhiyun #include <linux/seq_file.h>
65*4882a593Smuzhiyun #include <linux/device.h>
66*4882a593Smuzhiyun #include <linux/moduleparam.h>
67*4882a593Smuzhiyun #include <linux/firmware.h>
68*4882a593Smuzhiyun #include <linux/jiffies.h>
69*4882a593Smuzhiyun #include <net/cfg80211.h>
70*4882a593Smuzhiyun #include "atmel.h"
71*4882a593Smuzhiyun 
72*4882a593Smuzhiyun #define DRIVER_MAJOR 0
73*4882a593Smuzhiyun #define DRIVER_MINOR 98
74*4882a593Smuzhiyun 
75*4882a593Smuzhiyun MODULE_AUTHOR("Simon Kelley");
76*4882a593Smuzhiyun MODULE_DESCRIPTION("Support for Atmel at76c50x 802.11 wireless ethernet cards.");
77*4882a593Smuzhiyun MODULE_LICENSE("GPL");
78*4882a593Smuzhiyun MODULE_SUPPORTED_DEVICE("Atmel at76c50x wireless cards");
79*4882a593Smuzhiyun 
80*4882a593Smuzhiyun /* The name of the firmware file to be loaded
81*4882a593Smuzhiyun    over-rides any automatic selection */
82*4882a593Smuzhiyun static char *firmware = NULL;
83*4882a593Smuzhiyun module_param(firmware, charp, 0);
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun /* table of firmware file names */
86*4882a593Smuzhiyun static struct {
87*4882a593Smuzhiyun 	AtmelFWType fw_type;
88*4882a593Smuzhiyun 	const char *fw_file;
89*4882a593Smuzhiyun 	const char *fw_file_ext;
90*4882a593Smuzhiyun } fw_table[] = {
91*4882a593Smuzhiyun 	{ ATMEL_FW_TYPE_502,		"atmel_at76c502",	"bin" },
92*4882a593Smuzhiyun 	{ ATMEL_FW_TYPE_502D,		"atmel_at76c502d",	"bin" },
93*4882a593Smuzhiyun 	{ ATMEL_FW_TYPE_502E,		"atmel_at76c502e",	"bin" },
94*4882a593Smuzhiyun 	{ ATMEL_FW_TYPE_502_3COM,	"atmel_at76c502_3com",	"bin" },
95*4882a593Smuzhiyun 	{ ATMEL_FW_TYPE_504,		"atmel_at76c504",	"bin" },
96*4882a593Smuzhiyun 	{ ATMEL_FW_TYPE_504_2958,	"atmel_at76c504_2958",	"bin" },
97*4882a593Smuzhiyun 	{ ATMEL_FW_TYPE_504A_2958,	"atmel_at76c504a_2958",	"bin" },
98*4882a593Smuzhiyun 	{ ATMEL_FW_TYPE_506,		"atmel_at76c506",	"bin" },
99*4882a593Smuzhiyun 	{ ATMEL_FW_TYPE_NONE,		NULL,			NULL }
100*4882a593Smuzhiyun };
101*4882a593Smuzhiyun MODULE_FIRMWARE("atmel_at76c502-wpa.bin");
102*4882a593Smuzhiyun MODULE_FIRMWARE("atmel_at76c502.bin");
103*4882a593Smuzhiyun MODULE_FIRMWARE("atmel_at76c502d-wpa.bin");
104*4882a593Smuzhiyun MODULE_FIRMWARE("atmel_at76c502d.bin");
105*4882a593Smuzhiyun MODULE_FIRMWARE("atmel_at76c502e-wpa.bin");
106*4882a593Smuzhiyun MODULE_FIRMWARE("atmel_at76c502e.bin");
107*4882a593Smuzhiyun MODULE_FIRMWARE("atmel_at76c502_3com-wpa.bin");
108*4882a593Smuzhiyun MODULE_FIRMWARE("atmel_at76c502_3com.bin");
109*4882a593Smuzhiyun MODULE_FIRMWARE("atmel_at76c504-wpa.bin");
110*4882a593Smuzhiyun MODULE_FIRMWARE("atmel_at76c504.bin");
111*4882a593Smuzhiyun MODULE_FIRMWARE("atmel_at76c504_2958-wpa.bin");
112*4882a593Smuzhiyun MODULE_FIRMWARE("atmel_at76c504_2958.bin");
113*4882a593Smuzhiyun MODULE_FIRMWARE("atmel_at76c504a_2958-wpa.bin");
114*4882a593Smuzhiyun MODULE_FIRMWARE("atmel_at76c504a_2958.bin");
115*4882a593Smuzhiyun MODULE_FIRMWARE("atmel_at76c506-wpa.bin");
116*4882a593Smuzhiyun MODULE_FIRMWARE("atmel_at76c506.bin");
117*4882a593Smuzhiyun 
118*4882a593Smuzhiyun #define MAX_SSID_LENGTH 32
119*4882a593Smuzhiyun #define MGMT_JIFFIES (256 * HZ / 100)
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun #define MAX_BSS_ENTRIES	64
122*4882a593Smuzhiyun 
123*4882a593Smuzhiyun /* registers */
124*4882a593Smuzhiyun #define GCR  0x00    /* (SIR0)  General Configuration Register */
125*4882a593Smuzhiyun #define BSR  0x02    /* (SIR1)  Bank Switching Select Register */
126*4882a593Smuzhiyun #define AR   0x04
127*4882a593Smuzhiyun #define DR   0x08
128*4882a593Smuzhiyun #define MR1  0x12    /* Mirror Register 1 */
129*4882a593Smuzhiyun #define MR2  0x14    /* Mirror Register 2 */
130*4882a593Smuzhiyun #define MR3  0x16    /* Mirror Register 3 */
131*4882a593Smuzhiyun #define MR4  0x18    /* Mirror Register 4 */
132*4882a593Smuzhiyun 
133*4882a593Smuzhiyun #define GPR1                            0x0c
134*4882a593Smuzhiyun #define GPR2                            0x0e
135*4882a593Smuzhiyun #define GPR3                            0x10
136*4882a593Smuzhiyun /*
137*4882a593Smuzhiyun  * Constants for the GCR register.
138*4882a593Smuzhiyun  */
139*4882a593Smuzhiyun #define GCR_REMAP     0x0400          /* Remap internal SRAM to 0 */
140*4882a593Smuzhiyun #define GCR_SWRES     0x0080          /* BIU reset (ARM and PAI are NOT reset) */
141*4882a593Smuzhiyun #define GCR_CORES     0x0060          /* Core Reset (ARM and PAI are reset) */
142*4882a593Smuzhiyun #define GCR_ENINT     0x0002          /* Enable Interrupts */
143*4882a593Smuzhiyun #define GCR_ACKINT    0x0008          /* Acknowledge Interrupts */
144*4882a593Smuzhiyun 
145*4882a593Smuzhiyun #define BSS_SRAM      0x0200          /* AMBA module selection --> SRAM */
146*4882a593Smuzhiyun #define BSS_IRAM      0x0100          /* AMBA module selection --> IRAM */
147*4882a593Smuzhiyun /*
148*4882a593Smuzhiyun  *Constants for the MR registers.
149*4882a593Smuzhiyun  */
150*4882a593Smuzhiyun #define MAC_INIT_COMPLETE       0x0001        /* MAC init has been completed */
151*4882a593Smuzhiyun #define MAC_BOOT_COMPLETE       0x0010        /* MAC boot has been completed */
152*4882a593Smuzhiyun #define MAC_INIT_OK             0x0002        /* MAC boot has been completed */
153*4882a593Smuzhiyun 
154*4882a593Smuzhiyun #define MIB_MAX_DATA_BYTES    212
155*4882a593Smuzhiyun #define MIB_HEADER_SIZE       4    /* first four fields */
156*4882a593Smuzhiyun 
157*4882a593Smuzhiyun struct get_set_mib {
158*4882a593Smuzhiyun 	u8 type;
159*4882a593Smuzhiyun 	u8 size;
160*4882a593Smuzhiyun 	u8 index;
161*4882a593Smuzhiyun 	u8 reserved;
162*4882a593Smuzhiyun 	u8 data[MIB_MAX_DATA_BYTES];
163*4882a593Smuzhiyun };
164*4882a593Smuzhiyun 
165*4882a593Smuzhiyun struct rx_desc {
166*4882a593Smuzhiyun 	u32          Next;
167*4882a593Smuzhiyun 	u16          MsduPos;
168*4882a593Smuzhiyun 	u16          MsduSize;
169*4882a593Smuzhiyun 
170*4882a593Smuzhiyun 	u8           State;
171*4882a593Smuzhiyun 	u8           Status;
172*4882a593Smuzhiyun 	u8           Rate;
173*4882a593Smuzhiyun 	u8           Rssi;
174*4882a593Smuzhiyun 	u8           LinkQuality;
175*4882a593Smuzhiyun 	u8           PreambleType;
176*4882a593Smuzhiyun 	u16          Duration;
177*4882a593Smuzhiyun 	u32          RxTime;
178*4882a593Smuzhiyun };
179*4882a593Smuzhiyun 
180*4882a593Smuzhiyun #define RX_DESC_FLAG_VALID       0x80
181*4882a593Smuzhiyun #define RX_DESC_FLAG_CONSUMED    0x40
182*4882a593Smuzhiyun #define RX_DESC_FLAG_IDLE        0x00
183*4882a593Smuzhiyun 
184*4882a593Smuzhiyun #define RX_STATUS_SUCCESS        0x00
185*4882a593Smuzhiyun 
186*4882a593Smuzhiyun #define RX_DESC_MSDU_POS_OFFSET      4
187*4882a593Smuzhiyun #define RX_DESC_MSDU_SIZE_OFFSET     6
188*4882a593Smuzhiyun #define RX_DESC_FLAGS_OFFSET         8
189*4882a593Smuzhiyun #define RX_DESC_STATUS_OFFSET        9
190*4882a593Smuzhiyun #define RX_DESC_RSSI_OFFSET          11
191*4882a593Smuzhiyun #define RX_DESC_LINK_QUALITY_OFFSET  12
192*4882a593Smuzhiyun #define RX_DESC_PREAMBLE_TYPE_OFFSET 13
193*4882a593Smuzhiyun #define RX_DESC_DURATION_OFFSET      14
194*4882a593Smuzhiyun #define RX_DESC_RX_TIME_OFFSET       16
195*4882a593Smuzhiyun 
196*4882a593Smuzhiyun struct tx_desc {
197*4882a593Smuzhiyun 	u32       NextDescriptor;
198*4882a593Smuzhiyun 	u16       TxStartOfFrame;
199*4882a593Smuzhiyun 	u16       TxLength;
200*4882a593Smuzhiyun 
201*4882a593Smuzhiyun 	u8        TxState;
202*4882a593Smuzhiyun 	u8        TxStatus;
203*4882a593Smuzhiyun 	u8        RetryCount;
204*4882a593Smuzhiyun 
205*4882a593Smuzhiyun 	u8        TxRate;
206*4882a593Smuzhiyun 
207*4882a593Smuzhiyun 	u8        KeyIndex;
208*4882a593Smuzhiyun 	u8        ChiperType;
209*4882a593Smuzhiyun 	u8        ChipreLength;
210*4882a593Smuzhiyun 	u8        Reserved1;
211*4882a593Smuzhiyun 
212*4882a593Smuzhiyun 	u8        Reserved;
213*4882a593Smuzhiyun 	u8        PacketType;
214*4882a593Smuzhiyun 	u16       HostTxLength;
215*4882a593Smuzhiyun };
216*4882a593Smuzhiyun 
217*4882a593Smuzhiyun #define TX_DESC_NEXT_OFFSET          0
218*4882a593Smuzhiyun #define TX_DESC_POS_OFFSET           4
219*4882a593Smuzhiyun #define TX_DESC_SIZE_OFFSET          6
220*4882a593Smuzhiyun #define TX_DESC_FLAGS_OFFSET         8
221*4882a593Smuzhiyun #define TX_DESC_STATUS_OFFSET        9
222*4882a593Smuzhiyun #define TX_DESC_RETRY_OFFSET         10
223*4882a593Smuzhiyun #define TX_DESC_RATE_OFFSET          11
224*4882a593Smuzhiyun #define TX_DESC_KEY_INDEX_OFFSET     12
225*4882a593Smuzhiyun #define TX_DESC_CIPHER_TYPE_OFFSET   13
226*4882a593Smuzhiyun #define TX_DESC_CIPHER_LENGTH_OFFSET 14
227*4882a593Smuzhiyun #define TX_DESC_PACKET_TYPE_OFFSET   17
228*4882a593Smuzhiyun #define TX_DESC_HOST_LENGTH_OFFSET   18
229*4882a593Smuzhiyun 
230*4882a593Smuzhiyun /*
231*4882a593Smuzhiyun  * Host-MAC interface
232*4882a593Smuzhiyun  */
233*4882a593Smuzhiyun 
234*4882a593Smuzhiyun #define TX_STATUS_SUCCESS       0x00
235*4882a593Smuzhiyun 
236*4882a593Smuzhiyun #define TX_FIRM_OWN             0x80
237*4882a593Smuzhiyun #define TX_DONE                 0x40
238*4882a593Smuzhiyun 
239*4882a593Smuzhiyun #define TX_ERROR                0x01
240*4882a593Smuzhiyun 
241*4882a593Smuzhiyun #define TX_PACKET_TYPE_DATA     0x01
242*4882a593Smuzhiyun #define TX_PACKET_TYPE_MGMT     0x02
243*4882a593Smuzhiyun 
244*4882a593Smuzhiyun #define ISR_EMPTY               0x00        /* no bits set in ISR */
245*4882a593Smuzhiyun #define ISR_TxCOMPLETE          0x01        /* packet transmitted */
246*4882a593Smuzhiyun #define ISR_RxCOMPLETE          0x02        /* packet received */
247*4882a593Smuzhiyun #define ISR_RxFRAMELOST         0x04        /* Rx Frame lost */
248*4882a593Smuzhiyun #define ISR_FATAL_ERROR         0x08        /* Fatal error */
249*4882a593Smuzhiyun #define ISR_COMMAND_COMPLETE    0x10        /* command completed */
250*4882a593Smuzhiyun #define ISR_OUT_OF_RANGE        0x20        /* command completed */
251*4882a593Smuzhiyun #define ISR_IBSS_MERGE          0x40        /* (4.1.2.30): IBSS merge */
252*4882a593Smuzhiyun #define ISR_GENERIC_IRQ         0x80
253*4882a593Smuzhiyun 
254*4882a593Smuzhiyun #define Local_Mib_Type          0x01
255*4882a593Smuzhiyun #define Mac_Address_Mib_Type    0x02
256*4882a593Smuzhiyun #define Mac_Mib_Type            0x03
257*4882a593Smuzhiyun #define Statistics_Mib_Type     0x04
258*4882a593Smuzhiyun #define Mac_Mgmt_Mib_Type       0x05
259*4882a593Smuzhiyun #define Mac_Wep_Mib_Type        0x06
260*4882a593Smuzhiyun #define Phy_Mib_Type            0x07
261*4882a593Smuzhiyun #define Multi_Domain_MIB        0x08
262*4882a593Smuzhiyun 
263*4882a593Smuzhiyun #define MAC_MGMT_MIB_CUR_BSSID_POS            14
264*4882a593Smuzhiyun #define MAC_MIB_FRAG_THRESHOLD_POS            8
265*4882a593Smuzhiyun #define MAC_MIB_RTS_THRESHOLD_POS             10
266*4882a593Smuzhiyun #define MAC_MIB_SHORT_RETRY_POS               16
267*4882a593Smuzhiyun #define MAC_MIB_LONG_RETRY_POS                17
268*4882a593Smuzhiyun #define MAC_MIB_SHORT_RETRY_LIMIT_POS         16
269*4882a593Smuzhiyun #define MAC_MGMT_MIB_BEACON_PER_POS           0
270*4882a593Smuzhiyun #define MAC_MGMT_MIB_STATION_ID_POS           6
271*4882a593Smuzhiyun #define MAC_MGMT_MIB_CUR_PRIVACY_POS          11
272*4882a593Smuzhiyun #define MAC_MGMT_MIB_CUR_BSSID_POS            14
273*4882a593Smuzhiyun #define MAC_MGMT_MIB_PS_MODE_POS              53
274*4882a593Smuzhiyun #define MAC_MGMT_MIB_LISTEN_INTERVAL_POS      54
275*4882a593Smuzhiyun #define MAC_MGMT_MIB_MULTI_DOMAIN_IMPLEMENTED 56
276*4882a593Smuzhiyun #define MAC_MGMT_MIB_MULTI_DOMAIN_ENABLED     57
277*4882a593Smuzhiyun #define PHY_MIB_CHANNEL_POS                   14
278*4882a593Smuzhiyun #define PHY_MIB_RATE_SET_POS                  20
279*4882a593Smuzhiyun #define PHY_MIB_REG_DOMAIN_POS                26
280*4882a593Smuzhiyun #define LOCAL_MIB_AUTO_TX_RATE_POS            3
281*4882a593Smuzhiyun #define LOCAL_MIB_SSID_SIZE                   5
282*4882a593Smuzhiyun #define LOCAL_MIB_TX_PROMISCUOUS_POS          6
283*4882a593Smuzhiyun #define LOCAL_MIB_TX_MGMT_RATE_POS            7
284*4882a593Smuzhiyun #define LOCAL_MIB_TX_CONTROL_RATE_POS         8
285*4882a593Smuzhiyun #define LOCAL_MIB_PREAMBLE_TYPE               9
286*4882a593Smuzhiyun #define MAC_ADDR_MIB_MAC_ADDR_POS             0
287*4882a593Smuzhiyun 
288*4882a593Smuzhiyun #define         CMD_Set_MIB_Vars              0x01
289*4882a593Smuzhiyun #define         CMD_Get_MIB_Vars              0x02
290*4882a593Smuzhiyun #define         CMD_Scan                      0x03
291*4882a593Smuzhiyun #define         CMD_Join                      0x04
292*4882a593Smuzhiyun #define         CMD_Start                     0x05
293*4882a593Smuzhiyun #define         CMD_EnableRadio               0x06
294*4882a593Smuzhiyun #define         CMD_DisableRadio              0x07
295*4882a593Smuzhiyun #define         CMD_SiteSurvey                0x0B
296*4882a593Smuzhiyun 
297*4882a593Smuzhiyun #define         CMD_STATUS_IDLE                   0x00
298*4882a593Smuzhiyun #define         CMD_STATUS_COMPLETE               0x01
299*4882a593Smuzhiyun #define         CMD_STATUS_UNKNOWN                0x02
300*4882a593Smuzhiyun #define         CMD_STATUS_INVALID_PARAMETER      0x03
301*4882a593Smuzhiyun #define         CMD_STATUS_FUNCTION_NOT_SUPPORTED 0x04
302*4882a593Smuzhiyun #define         CMD_STATUS_TIME_OUT               0x07
303*4882a593Smuzhiyun #define         CMD_STATUS_IN_PROGRESS            0x08
304*4882a593Smuzhiyun #define         CMD_STATUS_REJECTED_RADIO_OFF     0x09
305*4882a593Smuzhiyun #define         CMD_STATUS_HOST_ERROR             0xFF
306*4882a593Smuzhiyun #define         CMD_STATUS_BUSY                   0xFE
307*4882a593Smuzhiyun 
308*4882a593Smuzhiyun #define CMD_BLOCK_COMMAND_OFFSET        0
309*4882a593Smuzhiyun #define CMD_BLOCK_STATUS_OFFSET         1
310*4882a593Smuzhiyun #define CMD_BLOCK_PARAMETERS_OFFSET     4
311*4882a593Smuzhiyun 
312*4882a593Smuzhiyun #define SCAN_OPTIONS_SITE_SURVEY        0x80
313*4882a593Smuzhiyun 
314*4882a593Smuzhiyun #define MGMT_FRAME_BODY_OFFSET		24
315*4882a593Smuzhiyun #define MAX_AUTHENTICATION_RETRIES	3
316*4882a593Smuzhiyun #define MAX_ASSOCIATION_RETRIES		3
317*4882a593Smuzhiyun 
318*4882a593Smuzhiyun #define AUTHENTICATION_RESPONSE_TIME_OUT  1000
319*4882a593Smuzhiyun 
320*4882a593Smuzhiyun #define MAX_WIRELESS_BODY  2316 /* mtu is 2312, CRC is 4 */
321*4882a593Smuzhiyun #define LOOP_RETRY_LIMIT   500000
322*4882a593Smuzhiyun 
323*4882a593Smuzhiyun #define ACTIVE_MODE	1
324*4882a593Smuzhiyun #define PS_MODE		2
325*4882a593Smuzhiyun 
326*4882a593Smuzhiyun #define MAX_ENCRYPTION_KEYS 4
327*4882a593Smuzhiyun #define MAX_ENCRYPTION_KEY_SIZE 40
328*4882a593Smuzhiyun 
329*4882a593Smuzhiyun /*
330*4882a593Smuzhiyun  * 802.11 related definitions
331*4882a593Smuzhiyun  */
332*4882a593Smuzhiyun 
333*4882a593Smuzhiyun /*
334*4882a593Smuzhiyun  * Regulatory Domains
335*4882a593Smuzhiyun  */
336*4882a593Smuzhiyun 
337*4882a593Smuzhiyun #define REG_DOMAIN_FCC		0x10	/* Channels	1-11	USA				*/
338*4882a593Smuzhiyun #define REG_DOMAIN_DOC		0x20	/* Channel	1-11	Canada				*/
339*4882a593Smuzhiyun #define REG_DOMAIN_ETSI		0x30	/* Channel	1-13	Europe (ex Spain/France)	*/
340*4882a593Smuzhiyun #define REG_DOMAIN_SPAIN	0x31	/* Channel	10-11	Spain				*/
341*4882a593Smuzhiyun #define REG_DOMAIN_FRANCE	0x32	/* Channel	10-13	France				*/
342*4882a593Smuzhiyun #define REG_DOMAIN_MKK		0x40	/* Channel	14	Japan				*/
343*4882a593Smuzhiyun #define REG_DOMAIN_MKK1		0x41	/* Channel	1-14	Japan(MKK1)			*/
344*4882a593Smuzhiyun #define REG_DOMAIN_ISRAEL	0x50	/* Channel	3-9	ISRAEL				*/
345*4882a593Smuzhiyun 
346*4882a593Smuzhiyun #define BSS_TYPE_AD_HOC		1
347*4882a593Smuzhiyun #define BSS_TYPE_INFRASTRUCTURE 2
348*4882a593Smuzhiyun 
349*4882a593Smuzhiyun #define SCAN_TYPE_ACTIVE	0
350*4882a593Smuzhiyun #define SCAN_TYPE_PASSIVE	1
351*4882a593Smuzhiyun 
352*4882a593Smuzhiyun #define LONG_PREAMBLE		0
353*4882a593Smuzhiyun #define SHORT_PREAMBLE		1
354*4882a593Smuzhiyun #define AUTO_PREAMBLE		2
355*4882a593Smuzhiyun 
356*4882a593Smuzhiyun #define DATA_FRAME_WS_HEADER_SIZE   30
357*4882a593Smuzhiyun 
358*4882a593Smuzhiyun /* promiscuous mode control */
359*4882a593Smuzhiyun #define PROM_MODE_OFF			0x0
360*4882a593Smuzhiyun #define PROM_MODE_UNKNOWN		0x1
361*4882a593Smuzhiyun #define PROM_MODE_CRC_FAILED		0x2
362*4882a593Smuzhiyun #define PROM_MODE_DUPLICATED		0x4
363*4882a593Smuzhiyun #define PROM_MODE_MGMT			0x8
364*4882a593Smuzhiyun #define PROM_MODE_CTRL			0x10
365*4882a593Smuzhiyun #define PROM_MODE_BAD_PROTOCOL		0x20
366*4882a593Smuzhiyun 
367*4882a593Smuzhiyun #define IFACE_INT_STATUS_OFFSET		0
368*4882a593Smuzhiyun #define IFACE_INT_MASK_OFFSET		1
369*4882a593Smuzhiyun #define IFACE_LOCKOUT_HOST_OFFSET	2
370*4882a593Smuzhiyun #define IFACE_LOCKOUT_MAC_OFFSET	3
371*4882a593Smuzhiyun #define IFACE_FUNC_CTRL_OFFSET		28
372*4882a593Smuzhiyun #define IFACE_MAC_STAT_OFFSET		30
373*4882a593Smuzhiyun #define IFACE_GENERIC_INT_TYPE_OFFSET	32
374*4882a593Smuzhiyun 
375*4882a593Smuzhiyun #define CIPHER_SUITE_NONE     0
376*4882a593Smuzhiyun #define CIPHER_SUITE_WEP_64   1
377*4882a593Smuzhiyun #define CIPHER_SUITE_TKIP     2
378*4882a593Smuzhiyun #define CIPHER_SUITE_AES      3
379*4882a593Smuzhiyun #define CIPHER_SUITE_CCX      4
380*4882a593Smuzhiyun #define CIPHER_SUITE_WEP_128  5
381*4882a593Smuzhiyun 
382*4882a593Smuzhiyun /*
383*4882a593Smuzhiyun  * IFACE MACROS & definitions
384*4882a593Smuzhiyun  */
385*4882a593Smuzhiyun 
386*4882a593Smuzhiyun /*
387*4882a593Smuzhiyun  * FuncCtrl field:
388*4882a593Smuzhiyun  */
389*4882a593Smuzhiyun #define FUNC_CTRL_TxENABLE		0x10
390*4882a593Smuzhiyun #define FUNC_CTRL_RxENABLE		0x20
391*4882a593Smuzhiyun #define FUNC_CTRL_INIT_COMPLETE		0x01
392*4882a593Smuzhiyun 
393*4882a593Smuzhiyun /* A stub firmware image which reads the MAC address from NVRAM on the card.
394*4882a593Smuzhiyun    For copyright information and source see the end of this file. */
395*4882a593Smuzhiyun static u8 mac_reader[] = {
396*4882a593Smuzhiyun 	0x06, 0x00, 0x00, 0xea, 0x04, 0x00, 0x00, 0xea, 0x03, 0x00, 0x00, 0xea, 0x02, 0x00, 0x00, 0xea,
397*4882a593Smuzhiyun 	0x01, 0x00, 0x00, 0xea, 0x00, 0x00, 0x00, 0xea, 0xff, 0xff, 0xff, 0xea, 0xfe, 0xff, 0xff, 0xea,
398*4882a593Smuzhiyun 	0xd3, 0x00, 0xa0, 0xe3, 0x00, 0xf0, 0x21, 0xe1, 0x0e, 0x04, 0xa0, 0xe3, 0x00, 0x10, 0xa0, 0xe3,
399*4882a593Smuzhiyun 	0x81, 0x11, 0xa0, 0xe1, 0x00, 0x10, 0x81, 0xe3, 0x00, 0x10, 0x80, 0xe5, 0x1c, 0x10, 0x90, 0xe5,
400*4882a593Smuzhiyun 	0x10, 0x10, 0xc1, 0xe3, 0x1c, 0x10, 0x80, 0xe5, 0x01, 0x10, 0xa0, 0xe3, 0x08, 0x10, 0x80, 0xe5,
401*4882a593Smuzhiyun 	0x02, 0x03, 0xa0, 0xe3, 0x00, 0x10, 0xa0, 0xe3, 0xb0, 0x10, 0xc0, 0xe1, 0xb4, 0x10, 0xc0, 0xe1,
402*4882a593Smuzhiyun 	0xb8, 0x10, 0xc0, 0xe1, 0xbc, 0x10, 0xc0, 0xe1, 0x56, 0xdc, 0xa0, 0xe3, 0x21, 0x00, 0x00, 0xeb,
403*4882a593Smuzhiyun 	0x0a, 0x00, 0xa0, 0xe3, 0x1a, 0x00, 0x00, 0xeb, 0x10, 0x00, 0x00, 0xeb, 0x07, 0x00, 0x00, 0xeb,
404*4882a593Smuzhiyun 	0x02, 0x03, 0xa0, 0xe3, 0x02, 0x14, 0xa0, 0xe3, 0xb4, 0x10, 0xc0, 0xe1, 0x4c, 0x10, 0x9f, 0xe5,
405*4882a593Smuzhiyun 	0xbc, 0x10, 0xc0, 0xe1, 0x10, 0x10, 0xa0, 0xe3, 0xb8, 0x10, 0xc0, 0xe1, 0xfe, 0xff, 0xff, 0xea,
406*4882a593Smuzhiyun 	0x00, 0x40, 0x2d, 0xe9, 0x00, 0x20, 0xa0, 0xe3, 0x02, 0x3c, 0xa0, 0xe3, 0x00, 0x10, 0xa0, 0xe3,
407*4882a593Smuzhiyun 	0x28, 0x00, 0x9f, 0xe5, 0x37, 0x00, 0x00, 0xeb, 0x00, 0x40, 0xbd, 0xe8, 0x1e, 0xff, 0x2f, 0xe1,
408*4882a593Smuzhiyun 	0x00, 0x40, 0x2d, 0xe9, 0x12, 0x2e, 0xa0, 0xe3, 0x06, 0x30, 0xa0, 0xe3, 0x00, 0x10, 0xa0, 0xe3,
409*4882a593Smuzhiyun 	0x02, 0x04, 0xa0, 0xe3, 0x2f, 0x00, 0x00, 0xeb, 0x00, 0x40, 0xbd, 0xe8, 0x1e, 0xff, 0x2f, 0xe1,
410*4882a593Smuzhiyun 	0x00, 0x02, 0x00, 0x02, 0x80, 0x01, 0x90, 0xe0, 0x01, 0x00, 0x00, 0x0a, 0x01, 0x00, 0x50, 0xe2,
411*4882a593Smuzhiyun 	0xfc, 0xff, 0xff, 0xea, 0x1e, 0xff, 0x2f, 0xe1, 0x80, 0x10, 0xa0, 0xe3, 0xf3, 0x06, 0xa0, 0xe3,
412*4882a593Smuzhiyun 	0x00, 0x10, 0x80, 0xe5, 0x00, 0x10, 0xa0, 0xe3, 0x00, 0x10, 0x80, 0xe5, 0x01, 0x10, 0xa0, 0xe3,
413*4882a593Smuzhiyun 	0x04, 0x10, 0x80, 0xe5, 0x00, 0x10, 0x80, 0xe5, 0x0e, 0x34, 0xa0, 0xe3, 0x1c, 0x10, 0x93, 0xe5,
414*4882a593Smuzhiyun 	0x02, 0x1a, 0x81, 0xe3, 0x1c, 0x10, 0x83, 0xe5, 0x58, 0x11, 0x9f, 0xe5, 0x30, 0x10, 0x80, 0xe5,
415*4882a593Smuzhiyun 	0x54, 0x11, 0x9f, 0xe5, 0x34, 0x10, 0x80, 0xe5, 0x38, 0x10, 0x80, 0xe5, 0x3c, 0x10, 0x80, 0xe5,
416*4882a593Smuzhiyun 	0x10, 0x10, 0x90, 0xe5, 0x08, 0x00, 0x90, 0xe5, 0x1e, 0xff, 0x2f, 0xe1, 0xf3, 0x16, 0xa0, 0xe3,
417*4882a593Smuzhiyun 	0x08, 0x00, 0x91, 0xe5, 0x05, 0x00, 0xa0, 0xe3, 0x0c, 0x00, 0x81, 0xe5, 0x10, 0x00, 0x91, 0xe5,
418*4882a593Smuzhiyun 	0x02, 0x00, 0x10, 0xe3, 0xfc, 0xff, 0xff, 0x0a, 0xff, 0x00, 0xa0, 0xe3, 0x0c, 0x00, 0x81, 0xe5,
419*4882a593Smuzhiyun 	0x10, 0x00, 0x91, 0xe5, 0x02, 0x00, 0x10, 0xe3, 0xfc, 0xff, 0xff, 0x0a, 0x08, 0x00, 0x91, 0xe5,
420*4882a593Smuzhiyun 	0x10, 0x00, 0x91, 0xe5, 0x01, 0x00, 0x10, 0xe3, 0xfc, 0xff, 0xff, 0x0a, 0x08, 0x00, 0x91, 0xe5,
421*4882a593Smuzhiyun 	0xff, 0x00, 0x00, 0xe2, 0x1e, 0xff, 0x2f, 0xe1, 0x30, 0x40, 0x2d, 0xe9, 0x00, 0x50, 0xa0, 0xe1,
422*4882a593Smuzhiyun 	0x03, 0x40, 0xa0, 0xe1, 0xa2, 0x02, 0xa0, 0xe1, 0x08, 0x00, 0x00, 0xe2, 0x03, 0x00, 0x80, 0xe2,
423*4882a593Smuzhiyun 	0xd8, 0x10, 0x9f, 0xe5, 0x00, 0x00, 0xc1, 0xe5, 0x01, 0x20, 0xc1, 0xe5, 0xe2, 0xff, 0xff, 0xeb,
424*4882a593Smuzhiyun 	0x01, 0x00, 0x10, 0xe3, 0xfc, 0xff, 0xff, 0x1a, 0x14, 0x00, 0xa0, 0xe3, 0xc4, 0xff, 0xff, 0xeb,
425*4882a593Smuzhiyun 	0x04, 0x20, 0xa0, 0xe1, 0x05, 0x10, 0xa0, 0xe1, 0x02, 0x00, 0xa0, 0xe3, 0x01, 0x00, 0x00, 0xeb,
426*4882a593Smuzhiyun 	0x30, 0x40, 0xbd, 0xe8, 0x1e, 0xff, 0x2f, 0xe1, 0x70, 0x40, 0x2d, 0xe9, 0xf3, 0x46, 0xa0, 0xe3,
427*4882a593Smuzhiyun 	0x00, 0x30, 0xa0, 0xe3, 0x00, 0x00, 0x50, 0xe3, 0x08, 0x00, 0x00, 0x9a, 0x8c, 0x50, 0x9f, 0xe5,
428*4882a593Smuzhiyun 	0x03, 0x60, 0xd5, 0xe7, 0x0c, 0x60, 0x84, 0xe5, 0x10, 0x60, 0x94, 0xe5, 0x02, 0x00, 0x16, 0xe3,
429*4882a593Smuzhiyun 	0xfc, 0xff, 0xff, 0x0a, 0x01, 0x30, 0x83, 0xe2, 0x00, 0x00, 0x53, 0xe1, 0xf7, 0xff, 0xff, 0x3a,
430*4882a593Smuzhiyun 	0xff, 0x30, 0xa0, 0xe3, 0x0c, 0x30, 0x84, 0xe5, 0x08, 0x00, 0x94, 0xe5, 0x10, 0x00, 0x94, 0xe5,
431*4882a593Smuzhiyun 	0x01, 0x00, 0x10, 0xe3, 0xfc, 0xff, 0xff, 0x0a, 0x08, 0x00, 0x94, 0xe5, 0x00, 0x00, 0xa0, 0xe3,
432*4882a593Smuzhiyun 	0x00, 0x00, 0x52, 0xe3, 0x0b, 0x00, 0x00, 0x9a, 0x10, 0x50, 0x94, 0xe5, 0x02, 0x00, 0x15, 0xe3,
433*4882a593Smuzhiyun 	0xfc, 0xff, 0xff, 0x0a, 0x0c, 0x30, 0x84, 0xe5, 0x10, 0x50, 0x94, 0xe5, 0x01, 0x00, 0x15, 0xe3,
434*4882a593Smuzhiyun 	0xfc, 0xff, 0xff, 0x0a, 0x08, 0x50, 0x94, 0xe5, 0x01, 0x50, 0xc1, 0xe4, 0x01, 0x00, 0x80, 0xe2,
435*4882a593Smuzhiyun 	0x02, 0x00, 0x50, 0xe1, 0xf3, 0xff, 0xff, 0x3a, 0xc8, 0x00, 0xa0, 0xe3, 0x98, 0xff, 0xff, 0xeb,
436*4882a593Smuzhiyun 	0x70, 0x40, 0xbd, 0xe8, 0x1e, 0xff, 0x2f, 0xe1, 0x01, 0x0c, 0x00, 0x02, 0x01, 0x02, 0x00, 0x02,
437*4882a593Smuzhiyun 	0x00, 0x01, 0x00, 0x02
438*4882a593Smuzhiyun };
439*4882a593Smuzhiyun 
440*4882a593Smuzhiyun struct atmel_private {
441*4882a593Smuzhiyun 	void *card; /* Bus dependent structure varies for PCcard */
442*4882a593Smuzhiyun 	int (*present_callback)(void *); /* And callback which uses it */
443*4882a593Smuzhiyun 	char firmware_id[32];
444*4882a593Smuzhiyun 	AtmelFWType firmware_type;
445*4882a593Smuzhiyun 	u8 *firmware;
446*4882a593Smuzhiyun 	int firmware_length;
447*4882a593Smuzhiyun 	struct timer_list management_timer;
448*4882a593Smuzhiyun 	struct net_device *dev;
449*4882a593Smuzhiyun 	struct device *sys_dev;
450*4882a593Smuzhiyun 	struct iw_statistics wstats;
451*4882a593Smuzhiyun 	spinlock_t irqlock, timerlock;	/* spinlocks */
452*4882a593Smuzhiyun 	enum { BUS_TYPE_PCCARD, BUS_TYPE_PCI } bus_type;
453*4882a593Smuzhiyun 	enum {
454*4882a593Smuzhiyun 		CARD_TYPE_PARALLEL_FLASH,
455*4882a593Smuzhiyun 		CARD_TYPE_SPI_FLASH,
456*4882a593Smuzhiyun 		CARD_TYPE_EEPROM
457*4882a593Smuzhiyun 	} card_type;
458*4882a593Smuzhiyun 	int do_rx_crc; /* If we need to CRC incoming packets */
459*4882a593Smuzhiyun 	int probe_crc; /* set if we don't yet know */
460*4882a593Smuzhiyun 	int crc_ok_cnt, crc_ko_cnt; /* counters for probing */
461*4882a593Smuzhiyun 	u16 rx_desc_head;
462*4882a593Smuzhiyun 	u16 tx_desc_free, tx_desc_head, tx_desc_tail, tx_desc_previous;
463*4882a593Smuzhiyun 	u16 tx_free_mem, tx_buff_head, tx_buff_tail;
464*4882a593Smuzhiyun 
465*4882a593Smuzhiyun 	u16 frag_seq, frag_len, frag_no;
466*4882a593Smuzhiyun 	u8 frag_source[6];
467*4882a593Smuzhiyun 
468*4882a593Smuzhiyun 	u8 wep_is_on, default_key, exclude_unencrypted, encryption_level;
469*4882a593Smuzhiyun 	u8 group_cipher_suite, pairwise_cipher_suite;
470*4882a593Smuzhiyun 	u8 wep_keys[MAX_ENCRYPTION_KEYS][MAX_ENCRYPTION_KEY_SIZE];
471*4882a593Smuzhiyun 	int wep_key_len[MAX_ENCRYPTION_KEYS];
472*4882a593Smuzhiyun 	int use_wpa, radio_on_broken; /* firmware dependent stuff. */
473*4882a593Smuzhiyun 
474*4882a593Smuzhiyun 	u16 host_info_base;
475*4882a593Smuzhiyun 	struct host_info_struct {
476*4882a593Smuzhiyun 		/* NB this is matched to the hardware, don't change. */
477*4882a593Smuzhiyun 		u8 volatile int_status;
478*4882a593Smuzhiyun 		u8 volatile int_mask;
479*4882a593Smuzhiyun 		u8 volatile lockout_host;
480*4882a593Smuzhiyun 		u8 volatile lockout_mac;
481*4882a593Smuzhiyun 
482*4882a593Smuzhiyun 		u16 tx_buff_pos;
483*4882a593Smuzhiyun 		u16 tx_buff_size;
484*4882a593Smuzhiyun 		u16 tx_desc_pos;
485*4882a593Smuzhiyun 		u16 tx_desc_count;
486*4882a593Smuzhiyun 
487*4882a593Smuzhiyun 		u16 rx_buff_pos;
488*4882a593Smuzhiyun 		u16 rx_buff_size;
489*4882a593Smuzhiyun 		u16 rx_desc_pos;
490*4882a593Smuzhiyun 		u16 rx_desc_count;
491*4882a593Smuzhiyun 
492*4882a593Smuzhiyun 		u16 build_version;
493*4882a593Smuzhiyun 		u16 command_pos;
494*4882a593Smuzhiyun 
495*4882a593Smuzhiyun 		u16 major_version;
496*4882a593Smuzhiyun 		u16 minor_version;
497*4882a593Smuzhiyun 
498*4882a593Smuzhiyun 		u16 func_ctrl;
499*4882a593Smuzhiyun 		u16 mac_status;
500*4882a593Smuzhiyun 		u16 generic_IRQ_type;
501*4882a593Smuzhiyun 		u8  reserved[2];
502*4882a593Smuzhiyun 	} host_info;
503*4882a593Smuzhiyun 
504*4882a593Smuzhiyun 	enum {
505*4882a593Smuzhiyun 		STATION_STATE_SCANNING,
506*4882a593Smuzhiyun 		STATION_STATE_JOINNING,
507*4882a593Smuzhiyun 		STATION_STATE_AUTHENTICATING,
508*4882a593Smuzhiyun 		STATION_STATE_ASSOCIATING,
509*4882a593Smuzhiyun 		STATION_STATE_READY,
510*4882a593Smuzhiyun 		STATION_STATE_REASSOCIATING,
511*4882a593Smuzhiyun 		STATION_STATE_DOWN,
512*4882a593Smuzhiyun 		STATION_STATE_MGMT_ERROR
513*4882a593Smuzhiyun 	} station_state;
514*4882a593Smuzhiyun 
515*4882a593Smuzhiyun 	int operating_mode, power_mode;
516*4882a593Smuzhiyun 	unsigned long last_qual;
517*4882a593Smuzhiyun 	int beacons_this_sec;
518*4882a593Smuzhiyun 	int channel;
519*4882a593Smuzhiyun 	int reg_domain, config_reg_domain;
520*4882a593Smuzhiyun 	int tx_rate;
521*4882a593Smuzhiyun 	int auto_tx_rate;
522*4882a593Smuzhiyun 	int rts_threshold;
523*4882a593Smuzhiyun 	int frag_threshold;
524*4882a593Smuzhiyun 	int long_retry, short_retry;
525*4882a593Smuzhiyun 	int preamble;
526*4882a593Smuzhiyun 	int default_beacon_period, beacon_period, listen_interval;
527*4882a593Smuzhiyun 	int CurrentAuthentTransactionSeqNum, ExpectedAuthentTransactionSeqNum;
528*4882a593Smuzhiyun 	int AuthenticationRequestRetryCnt, AssociationRequestRetryCnt, ReAssociationRequestRetryCnt;
529*4882a593Smuzhiyun 	enum {
530*4882a593Smuzhiyun 		SITE_SURVEY_IDLE,
531*4882a593Smuzhiyun 		SITE_SURVEY_IN_PROGRESS,
532*4882a593Smuzhiyun 		SITE_SURVEY_COMPLETED
533*4882a593Smuzhiyun 	} site_survey_state;
534*4882a593Smuzhiyun 	unsigned long last_survey;
535*4882a593Smuzhiyun 
536*4882a593Smuzhiyun 	int station_was_associated, station_is_associated;
537*4882a593Smuzhiyun 	int fast_scan;
538*4882a593Smuzhiyun 
539*4882a593Smuzhiyun 	struct bss_info {
540*4882a593Smuzhiyun 		int channel;
541*4882a593Smuzhiyun 		int SSIDsize;
542*4882a593Smuzhiyun 		int RSSI;
543*4882a593Smuzhiyun 		int UsingWEP;
544*4882a593Smuzhiyun 		int preamble;
545*4882a593Smuzhiyun 		int beacon_period;
546*4882a593Smuzhiyun 		int BSStype;
547*4882a593Smuzhiyun 		u8 BSSID[6];
548*4882a593Smuzhiyun 		u8 SSID[MAX_SSID_LENGTH];
549*4882a593Smuzhiyun 	} BSSinfo[MAX_BSS_ENTRIES];
550*4882a593Smuzhiyun 	int BSS_list_entries, current_BSS;
551*4882a593Smuzhiyun 	int connect_to_any_BSS;
552*4882a593Smuzhiyun 	int SSID_size, new_SSID_size;
553*4882a593Smuzhiyun 	u8 CurrentBSSID[6], BSSID[6];
554*4882a593Smuzhiyun 	u8 SSID[MAX_SSID_LENGTH], new_SSID[MAX_SSID_LENGTH];
555*4882a593Smuzhiyun 	u64 last_beacon_timestamp;
556*4882a593Smuzhiyun 	u8 rx_buf[MAX_WIRELESS_BODY];
557*4882a593Smuzhiyun };
558*4882a593Smuzhiyun 
559*4882a593Smuzhiyun static u8 atmel_basic_rates[4] = {0x82, 0x84, 0x0b, 0x16};
560*4882a593Smuzhiyun 
561*4882a593Smuzhiyun static const struct {
562*4882a593Smuzhiyun 	int reg_domain;
563*4882a593Smuzhiyun 	int min, max;
564*4882a593Smuzhiyun 	char *name;
565*4882a593Smuzhiyun } channel_table[] = { { REG_DOMAIN_FCC, 1, 11, "USA" },
566*4882a593Smuzhiyun 		      { REG_DOMAIN_DOC, 1, 11, "Canada" },
567*4882a593Smuzhiyun 		      { REG_DOMAIN_ETSI, 1, 13, "Europe" },
568*4882a593Smuzhiyun 		      { REG_DOMAIN_SPAIN, 10, 11, "Spain" },
569*4882a593Smuzhiyun 		      { REG_DOMAIN_FRANCE, 10, 13, "France" },
570*4882a593Smuzhiyun 		      { REG_DOMAIN_MKK, 14, 14, "MKK" },
571*4882a593Smuzhiyun 		      { REG_DOMAIN_MKK1, 1, 14, "MKK1" },
572*4882a593Smuzhiyun 		      { REG_DOMAIN_ISRAEL, 3, 9, "Israel"} };
573*4882a593Smuzhiyun 
574*4882a593Smuzhiyun static void build_wpa_mib(struct atmel_private *priv);
575*4882a593Smuzhiyun static int atmel_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
576*4882a593Smuzhiyun static void atmel_copy_to_card(struct net_device *dev, u16 dest,
577*4882a593Smuzhiyun 			       const unsigned char *src, u16 len);
578*4882a593Smuzhiyun static void atmel_copy_to_host(struct net_device *dev, unsigned char *dest,
579*4882a593Smuzhiyun 			       u16 src, u16 len);
580*4882a593Smuzhiyun static void atmel_set_gcr(struct net_device *dev, u16 mask);
581*4882a593Smuzhiyun static void atmel_clear_gcr(struct net_device *dev, u16 mask);
582*4882a593Smuzhiyun static int atmel_lock_mac(struct atmel_private *priv);
583*4882a593Smuzhiyun static void atmel_wmem32(struct atmel_private *priv, u16 pos, u32 data);
584*4882a593Smuzhiyun static void atmel_command_irq(struct atmel_private *priv);
585*4882a593Smuzhiyun static int atmel_validate_channel(struct atmel_private *priv, int channel);
586*4882a593Smuzhiyun static void atmel_management_frame(struct atmel_private *priv,
587*4882a593Smuzhiyun 				   struct ieee80211_hdr *header,
588*4882a593Smuzhiyun 				   u16 frame_len, u8 rssi);
589*4882a593Smuzhiyun static void atmel_management_timer(struct timer_list *t);
590*4882a593Smuzhiyun static void atmel_send_command(struct atmel_private *priv, int command,
591*4882a593Smuzhiyun 			       void *cmd, int cmd_size);
592*4882a593Smuzhiyun static int atmel_send_command_wait(struct atmel_private *priv, int command,
593*4882a593Smuzhiyun 				   void *cmd, int cmd_size);
594*4882a593Smuzhiyun static void atmel_transmit_management_frame(struct atmel_private *priv,
595*4882a593Smuzhiyun 					    struct ieee80211_hdr *header,
596*4882a593Smuzhiyun 					    u8 *body, int body_len);
597*4882a593Smuzhiyun 
598*4882a593Smuzhiyun static u8 atmel_get_mib8(struct atmel_private *priv, u8 type, u8 index);
599*4882a593Smuzhiyun static void atmel_set_mib8(struct atmel_private *priv, u8 type, u8 index,
600*4882a593Smuzhiyun 			   u8 data);
601*4882a593Smuzhiyun static void atmel_set_mib16(struct atmel_private *priv, u8 type, u8 index,
602*4882a593Smuzhiyun 			    u16 data);
603*4882a593Smuzhiyun static void atmel_set_mib(struct atmel_private *priv, u8 type, u8 index,
604*4882a593Smuzhiyun 			  u8 *data, int data_len);
605*4882a593Smuzhiyun static void atmel_get_mib(struct atmel_private *priv, u8 type, u8 index,
606*4882a593Smuzhiyun 			  u8 *data, int data_len);
607*4882a593Smuzhiyun static void atmel_scan(struct atmel_private *priv, int specific_ssid);
608*4882a593Smuzhiyun static void atmel_join_bss(struct atmel_private *priv, int bss_index);
609*4882a593Smuzhiyun static void atmel_smooth_qual(struct atmel_private *priv);
610*4882a593Smuzhiyun static void atmel_writeAR(struct net_device *dev, u16 data);
611*4882a593Smuzhiyun static int probe_atmel_card(struct net_device *dev);
612*4882a593Smuzhiyun static int reset_atmel_card(struct net_device *dev);
613*4882a593Smuzhiyun static void atmel_enter_state(struct atmel_private *priv, int new_state);
614*4882a593Smuzhiyun int atmel_open (struct net_device *dev);
615*4882a593Smuzhiyun 
atmel_hi(struct atmel_private * priv,u16 offset)616*4882a593Smuzhiyun static inline u16 atmel_hi(struct atmel_private *priv, u16 offset)
617*4882a593Smuzhiyun {
618*4882a593Smuzhiyun 	return priv->host_info_base + offset;
619*4882a593Smuzhiyun }
620*4882a593Smuzhiyun 
atmel_co(struct atmel_private * priv,u16 offset)621*4882a593Smuzhiyun static inline u16 atmel_co(struct atmel_private *priv, u16 offset)
622*4882a593Smuzhiyun {
623*4882a593Smuzhiyun 	return priv->host_info.command_pos + offset;
624*4882a593Smuzhiyun }
625*4882a593Smuzhiyun 
atmel_rx(struct atmel_private * priv,u16 offset,u16 desc)626*4882a593Smuzhiyun static inline u16 atmel_rx(struct atmel_private *priv, u16 offset, u16 desc)
627*4882a593Smuzhiyun {
628*4882a593Smuzhiyun 	return priv->host_info.rx_desc_pos + (sizeof(struct rx_desc) * desc) + offset;
629*4882a593Smuzhiyun }
630*4882a593Smuzhiyun 
atmel_tx(struct atmel_private * priv,u16 offset,u16 desc)631*4882a593Smuzhiyun static inline u16 atmel_tx(struct atmel_private *priv, u16 offset, u16 desc)
632*4882a593Smuzhiyun {
633*4882a593Smuzhiyun 	return priv->host_info.tx_desc_pos + (sizeof(struct tx_desc) * desc) + offset;
634*4882a593Smuzhiyun }
635*4882a593Smuzhiyun 
atmel_read8(struct net_device * dev,u16 offset)636*4882a593Smuzhiyun static inline u8 atmel_read8(struct net_device *dev, u16 offset)
637*4882a593Smuzhiyun {
638*4882a593Smuzhiyun 	return inb(dev->base_addr + offset);
639*4882a593Smuzhiyun }
640*4882a593Smuzhiyun 
atmel_write8(struct net_device * dev,u16 offset,u8 data)641*4882a593Smuzhiyun static inline void atmel_write8(struct net_device *dev, u16 offset, u8 data)
642*4882a593Smuzhiyun {
643*4882a593Smuzhiyun 	outb(data, dev->base_addr + offset);
644*4882a593Smuzhiyun }
645*4882a593Smuzhiyun 
atmel_read16(struct net_device * dev,u16 offset)646*4882a593Smuzhiyun static inline u16 atmel_read16(struct net_device *dev, u16 offset)
647*4882a593Smuzhiyun {
648*4882a593Smuzhiyun 	return inw(dev->base_addr + offset);
649*4882a593Smuzhiyun }
650*4882a593Smuzhiyun 
atmel_write16(struct net_device * dev,u16 offset,u16 data)651*4882a593Smuzhiyun static inline void atmel_write16(struct net_device *dev, u16 offset, u16 data)
652*4882a593Smuzhiyun {
653*4882a593Smuzhiyun 	outw(data, dev->base_addr + offset);
654*4882a593Smuzhiyun }
655*4882a593Smuzhiyun 
atmel_rmem8(struct atmel_private * priv,u16 pos)656*4882a593Smuzhiyun static inline u8 atmel_rmem8(struct atmel_private *priv, u16 pos)
657*4882a593Smuzhiyun {
658*4882a593Smuzhiyun 	atmel_writeAR(priv->dev, pos);
659*4882a593Smuzhiyun 	return atmel_read8(priv->dev, DR);
660*4882a593Smuzhiyun }
661*4882a593Smuzhiyun 
atmel_wmem8(struct atmel_private * priv,u16 pos,u16 data)662*4882a593Smuzhiyun static inline void atmel_wmem8(struct atmel_private *priv, u16 pos, u16 data)
663*4882a593Smuzhiyun {
664*4882a593Smuzhiyun 	atmel_writeAR(priv->dev, pos);
665*4882a593Smuzhiyun 	atmel_write8(priv->dev, DR, data);
666*4882a593Smuzhiyun }
667*4882a593Smuzhiyun 
atmel_rmem16(struct atmel_private * priv,u16 pos)668*4882a593Smuzhiyun static inline u16 atmel_rmem16(struct atmel_private *priv, u16 pos)
669*4882a593Smuzhiyun {
670*4882a593Smuzhiyun 	atmel_writeAR(priv->dev, pos);
671*4882a593Smuzhiyun 	return atmel_read16(priv->dev, DR);
672*4882a593Smuzhiyun }
673*4882a593Smuzhiyun 
atmel_wmem16(struct atmel_private * priv,u16 pos,u16 data)674*4882a593Smuzhiyun static inline void atmel_wmem16(struct atmel_private *priv, u16 pos, u16 data)
675*4882a593Smuzhiyun {
676*4882a593Smuzhiyun 	atmel_writeAR(priv->dev, pos);
677*4882a593Smuzhiyun 	atmel_write16(priv->dev, DR, data);
678*4882a593Smuzhiyun }
679*4882a593Smuzhiyun 
680*4882a593Smuzhiyun static const struct iw_handler_def atmel_handler_def;
681*4882a593Smuzhiyun 
tx_done_irq(struct atmel_private * priv)682*4882a593Smuzhiyun static void tx_done_irq(struct atmel_private *priv)
683*4882a593Smuzhiyun {
684*4882a593Smuzhiyun 	int i;
685*4882a593Smuzhiyun 
686*4882a593Smuzhiyun 	for (i = 0;
687*4882a593Smuzhiyun 	     atmel_rmem8(priv, atmel_tx(priv, TX_DESC_FLAGS_OFFSET, priv->tx_desc_head)) == TX_DONE &&
688*4882a593Smuzhiyun 		     i < priv->host_info.tx_desc_count;
689*4882a593Smuzhiyun 	     i++) {
690*4882a593Smuzhiyun 		u8 status = atmel_rmem8(priv, atmel_tx(priv, TX_DESC_STATUS_OFFSET, priv->tx_desc_head));
691*4882a593Smuzhiyun 		u16 msdu_size = atmel_rmem16(priv, atmel_tx(priv, TX_DESC_SIZE_OFFSET, priv->tx_desc_head));
692*4882a593Smuzhiyun 		u8 type = atmel_rmem8(priv, atmel_tx(priv, TX_DESC_PACKET_TYPE_OFFSET, priv->tx_desc_head));
693*4882a593Smuzhiyun 
694*4882a593Smuzhiyun 		atmel_wmem8(priv, atmel_tx(priv, TX_DESC_FLAGS_OFFSET, priv->tx_desc_head), 0);
695*4882a593Smuzhiyun 
696*4882a593Smuzhiyun 		priv->tx_free_mem += msdu_size;
697*4882a593Smuzhiyun 		priv->tx_desc_free++;
698*4882a593Smuzhiyun 
699*4882a593Smuzhiyun 		if (priv->tx_buff_head + msdu_size > (priv->host_info.tx_buff_pos + priv->host_info.tx_buff_size))
700*4882a593Smuzhiyun 			priv->tx_buff_head = 0;
701*4882a593Smuzhiyun 		else
702*4882a593Smuzhiyun 			priv->tx_buff_head += msdu_size;
703*4882a593Smuzhiyun 
704*4882a593Smuzhiyun 		if (priv->tx_desc_head < (priv->host_info.tx_desc_count - 1))
705*4882a593Smuzhiyun 			priv->tx_desc_head++ ;
706*4882a593Smuzhiyun 		else
707*4882a593Smuzhiyun 			priv->tx_desc_head = 0;
708*4882a593Smuzhiyun 
709*4882a593Smuzhiyun 		if (type == TX_PACKET_TYPE_DATA) {
710*4882a593Smuzhiyun 			if (status == TX_STATUS_SUCCESS)
711*4882a593Smuzhiyun 				priv->dev->stats.tx_packets++;
712*4882a593Smuzhiyun 			else
713*4882a593Smuzhiyun 				priv->dev->stats.tx_errors++;
714*4882a593Smuzhiyun 			netif_wake_queue(priv->dev);
715*4882a593Smuzhiyun 		}
716*4882a593Smuzhiyun 	}
717*4882a593Smuzhiyun }
718*4882a593Smuzhiyun 
find_tx_buff(struct atmel_private * priv,u16 len)719*4882a593Smuzhiyun static u16 find_tx_buff(struct atmel_private *priv, u16 len)
720*4882a593Smuzhiyun {
721*4882a593Smuzhiyun 	u16 bottom_free = priv->host_info.tx_buff_size - priv->tx_buff_tail;
722*4882a593Smuzhiyun 
723*4882a593Smuzhiyun 	if (priv->tx_desc_free == 3 || priv->tx_free_mem < len)
724*4882a593Smuzhiyun 		return 0;
725*4882a593Smuzhiyun 
726*4882a593Smuzhiyun 	if (bottom_free >= len)
727*4882a593Smuzhiyun 		return priv->host_info.tx_buff_pos + priv->tx_buff_tail;
728*4882a593Smuzhiyun 
729*4882a593Smuzhiyun 	if (priv->tx_free_mem - bottom_free >= len) {
730*4882a593Smuzhiyun 		priv->tx_buff_tail = 0;
731*4882a593Smuzhiyun 		return priv->host_info.tx_buff_pos;
732*4882a593Smuzhiyun 	}
733*4882a593Smuzhiyun 
734*4882a593Smuzhiyun 	return 0;
735*4882a593Smuzhiyun }
736*4882a593Smuzhiyun 
tx_update_descriptor(struct atmel_private * priv,int is_bcast,u16 len,u16 buff,u8 type)737*4882a593Smuzhiyun static void tx_update_descriptor(struct atmel_private *priv, int is_bcast,
738*4882a593Smuzhiyun 				 u16 len, u16 buff, u8 type)
739*4882a593Smuzhiyun {
740*4882a593Smuzhiyun 	atmel_wmem16(priv, atmel_tx(priv, TX_DESC_POS_OFFSET, priv->tx_desc_tail), buff);
741*4882a593Smuzhiyun 	atmel_wmem16(priv, atmel_tx(priv, TX_DESC_SIZE_OFFSET, priv->tx_desc_tail), len);
742*4882a593Smuzhiyun 	if (!priv->use_wpa)
743*4882a593Smuzhiyun 		atmel_wmem16(priv, atmel_tx(priv, TX_DESC_HOST_LENGTH_OFFSET, priv->tx_desc_tail), len);
744*4882a593Smuzhiyun 	atmel_wmem8(priv, atmel_tx(priv, TX_DESC_PACKET_TYPE_OFFSET, priv->tx_desc_tail), type);
745*4882a593Smuzhiyun 	atmel_wmem8(priv, atmel_tx(priv, TX_DESC_RATE_OFFSET, priv->tx_desc_tail), priv->tx_rate);
746*4882a593Smuzhiyun 	atmel_wmem8(priv, atmel_tx(priv, TX_DESC_RETRY_OFFSET, priv->tx_desc_tail), 0);
747*4882a593Smuzhiyun 	if (priv->use_wpa) {
748*4882a593Smuzhiyun 		int cipher_type, cipher_length;
749*4882a593Smuzhiyun 		if (is_bcast) {
750*4882a593Smuzhiyun 			cipher_type = priv->group_cipher_suite;
751*4882a593Smuzhiyun 			if (cipher_type == CIPHER_SUITE_WEP_64 ||
752*4882a593Smuzhiyun 			    cipher_type == CIPHER_SUITE_WEP_128)
753*4882a593Smuzhiyun 				cipher_length = 8;
754*4882a593Smuzhiyun 			else if (cipher_type == CIPHER_SUITE_TKIP)
755*4882a593Smuzhiyun 				cipher_length = 12;
756*4882a593Smuzhiyun 			else if (priv->pairwise_cipher_suite == CIPHER_SUITE_WEP_64 ||
757*4882a593Smuzhiyun 				 priv->pairwise_cipher_suite == CIPHER_SUITE_WEP_128) {
758*4882a593Smuzhiyun 				cipher_type = priv->pairwise_cipher_suite;
759*4882a593Smuzhiyun 				cipher_length = 8;
760*4882a593Smuzhiyun 			} else {
761*4882a593Smuzhiyun 				cipher_type = CIPHER_SUITE_NONE;
762*4882a593Smuzhiyun 				cipher_length = 0;
763*4882a593Smuzhiyun 			}
764*4882a593Smuzhiyun 		} else {
765*4882a593Smuzhiyun 			cipher_type = priv->pairwise_cipher_suite;
766*4882a593Smuzhiyun 			if (cipher_type == CIPHER_SUITE_WEP_64 ||
767*4882a593Smuzhiyun 			    cipher_type == CIPHER_SUITE_WEP_128)
768*4882a593Smuzhiyun 				cipher_length = 8;
769*4882a593Smuzhiyun 			else if (cipher_type == CIPHER_SUITE_TKIP)
770*4882a593Smuzhiyun 				cipher_length = 12;
771*4882a593Smuzhiyun 			else if (priv->group_cipher_suite == CIPHER_SUITE_WEP_64 ||
772*4882a593Smuzhiyun 				 priv->group_cipher_suite == CIPHER_SUITE_WEP_128) {
773*4882a593Smuzhiyun 				cipher_type = priv->group_cipher_suite;
774*4882a593Smuzhiyun 				cipher_length = 8;
775*4882a593Smuzhiyun 			} else {
776*4882a593Smuzhiyun 				cipher_type = CIPHER_SUITE_NONE;
777*4882a593Smuzhiyun 				cipher_length = 0;
778*4882a593Smuzhiyun 			}
779*4882a593Smuzhiyun 		}
780*4882a593Smuzhiyun 
781*4882a593Smuzhiyun 		atmel_wmem8(priv, atmel_tx(priv, TX_DESC_CIPHER_TYPE_OFFSET, priv->tx_desc_tail),
782*4882a593Smuzhiyun 			    cipher_type);
783*4882a593Smuzhiyun 		atmel_wmem8(priv, atmel_tx(priv, TX_DESC_CIPHER_LENGTH_OFFSET, priv->tx_desc_tail),
784*4882a593Smuzhiyun 			    cipher_length);
785*4882a593Smuzhiyun 	}
786*4882a593Smuzhiyun 	atmel_wmem32(priv, atmel_tx(priv, TX_DESC_NEXT_OFFSET, priv->tx_desc_tail), 0x80000000L);
787*4882a593Smuzhiyun 	atmel_wmem8(priv, atmel_tx(priv, TX_DESC_FLAGS_OFFSET, priv->tx_desc_tail), TX_FIRM_OWN);
788*4882a593Smuzhiyun 	if (priv->tx_desc_previous != priv->tx_desc_tail)
789*4882a593Smuzhiyun 		atmel_wmem32(priv, atmel_tx(priv, TX_DESC_NEXT_OFFSET, priv->tx_desc_previous), 0);
790*4882a593Smuzhiyun 	priv->tx_desc_previous = priv->tx_desc_tail;
791*4882a593Smuzhiyun 	if (priv->tx_desc_tail < (priv->host_info.tx_desc_count - 1))
792*4882a593Smuzhiyun 		priv->tx_desc_tail++;
793*4882a593Smuzhiyun 	else
794*4882a593Smuzhiyun 		priv->tx_desc_tail = 0;
795*4882a593Smuzhiyun 	priv->tx_desc_free--;
796*4882a593Smuzhiyun 	priv->tx_free_mem -= len;
797*4882a593Smuzhiyun }
798*4882a593Smuzhiyun 
start_tx(struct sk_buff * skb,struct net_device * dev)799*4882a593Smuzhiyun static netdev_tx_t start_tx(struct sk_buff *skb, struct net_device *dev)
800*4882a593Smuzhiyun {
801*4882a593Smuzhiyun 	struct atmel_private *priv = netdev_priv(dev);
802*4882a593Smuzhiyun 	struct ieee80211_hdr header;
803*4882a593Smuzhiyun 	unsigned long flags;
804*4882a593Smuzhiyun 	u16 buff, frame_ctl, len = (ETH_ZLEN < skb->len) ? skb->len : ETH_ZLEN;
805*4882a593Smuzhiyun 
806*4882a593Smuzhiyun 	if (priv->card && priv->present_callback &&
807*4882a593Smuzhiyun 	    !(*priv->present_callback)(priv->card)) {
808*4882a593Smuzhiyun 		dev->stats.tx_errors++;
809*4882a593Smuzhiyun 		dev_kfree_skb(skb);
810*4882a593Smuzhiyun 		return NETDEV_TX_OK;
811*4882a593Smuzhiyun 	}
812*4882a593Smuzhiyun 
813*4882a593Smuzhiyun 	if (priv->station_state != STATION_STATE_READY) {
814*4882a593Smuzhiyun 		dev->stats.tx_errors++;
815*4882a593Smuzhiyun 		dev_kfree_skb(skb);
816*4882a593Smuzhiyun 		return NETDEV_TX_OK;
817*4882a593Smuzhiyun 	}
818*4882a593Smuzhiyun 
819*4882a593Smuzhiyun 	/* first ensure the timer func cannot run */
820*4882a593Smuzhiyun 	spin_lock_bh(&priv->timerlock);
821*4882a593Smuzhiyun 	/* then stop the hardware ISR */
822*4882a593Smuzhiyun 	spin_lock_irqsave(&priv->irqlock, flags);
823*4882a593Smuzhiyun 	/* nb doing the above in the opposite order will deadlock */
824*4882a593Smuzhiyun 
825*4882a593Smuzhiyun 	/* The Wireless Header is 30 bytes. In the Ethernet packet we "cut" the
826*4882a593Smuzhiyun 	   12 first bytes (containing DA/SA) and put them in the appropriate
827*4882a593Smuzhiyun 	   fields of the Wireless Header. Thus the packet length is then the
828*4882a593Smuzhiyun 	   initial + 18 (+30-12) */
829*4882a593Smuzhiyun 
830*4882a593Smuzhiyun 	if (!(buff = find_tx_buff(priv, len + 18))) {
831*4882a593Smuzhiyun 		dev->stats.tx_dropped++;
832*4882a593Smuzhiyun 		spin_unlock_irqrestore(&priv->irqlock, flags);
833*4882a593Smuzhiyun 		spin_unlock_bh(&priv->timerlock);
834*4882a593Smuzhiyun 		netif_stop_queue(dev);
835*4882a593Smuzhiyun 		return NETDEV_TX_BUSY;
836*4882a593Smuzhiyun 	}
837*4882a593Smuzhiyun 
838*4882a593Smuzhiyun 	frame_ctl = IEEE80211_FTYPE_DATA;
839*4882a593Smuzhiyun 	header.duration_id = 0;
840*4882a593Smuzhiyun 	header.seq_ctrl = 0;
841*4882a593Smuzhiyun 	if (priv->wep_is_on)
842*4882a593Smuzhiyun 		frame_ctl |= IEEE80211_FCTL_PROTECTED;
843*4882a593Smuzhiyun 	if (priv->operating_mode == IW_MODE_ADHOC) {
844*4882a593Smuzhiyun 		skb_copy_from_linear_data(skb, &header.addr1, ETH_ALEN);
845*4882a593Smuzhiyun 		memcpy(&header.addr2, dev->dev_addr, ETH_ALEN);
846*4882a593Smuzhiyun 		memcpy(&header.addr3, priv->BSSID, ETH_ALEN);
847*4882a593Smuzhiyun 	} else {
848*4882a593Smuzhiyun 		frame_ctl |= IEEE80211_FCTL_TODS;
849*4882a593Smuzhiyun 		memcpy(&header.addr1, priv->CurrentBSSID, ETH_ALEN);
850*4882a593Smuzhiyun 		memcpy(&header.addr2, dev->dev_addr, ETH_ALEN);
851*4882a593Smuzhiyun 		skb_copy_from_linear_data(skb, &header.addr3, ETH_ALEN);
852*4882a593Smuzhiyun 	}
853*4882a593Smuzhiyun 
854*4882a593Smuzhiyun 	if (priv->use_wpa)
855*4882a593Smuzhiyun 		memcpy(&header.addr4, rfc1042_header, ETH_ALEN);
856*4882a593Smuzhiyun 
857*4882a593Smuzhiyun 	header.frame_control = cpu_to_le16(frame_ctl);
858*4882a593Smuzhiyun 	/* Copy the wireless header into the card */
859*4882a593Smuzhiyun 	atmel_copy_to_card(dev, buff, (unsigned char *)&header, DATA_FRAME_WS_HEADER_SIZE);
860*4882a593Smuzhiyun 	/* Copy the packet sans its 802.3 header addresses which have been replaced */
861*4882a593Smuzhiyun 	atmel_copy_to_card(dev, buff + DATA_FRAME_WS_HEADER_SIZE, skb->data + 12, len - 12);
862*4882a593Smuzhiyun 	priv->tx_buff_tail += len - 12 + DATA_FRAME_WS_HEADER_SIZE;
863*4882a593Smuzhiyun 
864*4882a593Smuzhiyun 	/* low bit of first byte of destination tells us if broadcast */
865*4882a593Smuzhiyun 	tx_update_descriptor(priv, *(skb->data) & 0x01, len + 18, buff, TX_PACKET_TYPE_DATA);
866*4882a593Smuzhiyun 	dev->stats.tx_bytes += len;
867*4882a593Smuzhiyun 
868*4882a593Smuzhiyun 	spin_unlock_irqrestore(&priv->irqlock, flags);
869*4882a593Smuzhiyun 	spin_unlock_bh(&priv->timerlock);
870*4882a593Smuzhiyun 	dev_kfree_skb(skb);
871*4882a593Smuzhiyun 
872*4882a593Smuzhiyun 	return NETDEV_TX_OK;
873*4882a593Smuzhiyun }
874*4882a593Smuzhiyun 
atmel_transmit_management_frame(struct atmel_private * priv,struct ieee80211_hdr * header,u8 * body,int body_len)875*4882a593Smuzhiyun static void atmel_transmit_management_frame(struct atmel_private *priv,
876*4882a593Smuzhiyun 					    struct ieee80211_hdr *header,
877*4882a593Smuzhiyun 					    u8 *body, int body_len)
878*4882a593Smuzhiyun {
879*4882a593Smuzhiyun 	u16 buff;
880*4882a593Smuzhiyun 	int len = MGMT_FRAME_BODY_OFFSET + body_len;
881*4882a593Smuzhiyun 
882*4882a593Smuzhiyun 	if (!(buff = find_tx_buff(priv, len)))
883*4882a593Smuzhiyun 		return;
884*4882a593Smuzhiyun 
885*4882a593Smuzhiyun 	atmel_copy_to_card(priv->dev, buff, (u8 *)header, MGMT_FRAME_BODY_OFFSET);
886*4882a593Smuzhiyun 	atmel_copy_to_card(priv->dev, buff + MGMT_FRAME_BODY_OFFSET, body, body_len);
887*4882a593Smuzhiyun 	priv->tx_buff_tail += len;
888*4882a593Smuzhiyun 	tx_update_descriptor(priv, header->addr1[0] & 0x01, len, buff, TX_PACKET_TYPE_MGMT);
889*4882a593Smuzhiyun }
890*4882a593Smuzhiyun 
fast_rx_path(struct atmel_private * priv,struct ieee80211_hdr * header,u16 msdu_size,u16 rx_packet_loc,u32 crc)891*4882a593Smuzhiyun static void fast_rx_path(struct atmel_private *priv,
892*4882a593Smuzhiyun 			 struct ieee80211_hdr *header,
893*4882a593Smuzhiyun 			 u16 msdu_size, u16 rx_packet_loc, u32 crc)
894*4882a593Smuzhiyun {
895*4882a593Smuzhiyun 	/* fast path: unfragmented packet copy directly into skbuf */
896*4882a593Smuzhiyun 	u8 mac4[6];
897*4882a593Smuzhiyun 	struct sk_buff	*skb;
898*4882a593Smuzhiyun 	unsigned char *skbp;
899*4882a593Smuzhiyun 
900*4882a593Smuzhiyun 	/* get the final, mac 4 header field, this tells us encapsulation */
901*4882a593Smuzhiyun 	atmel_copy_to_host(priv->dev, mac4, rx_packet_loc + 24, 6);
902*4882a593Smuzhiyun 	msdu_size -= 6;
903*4882a593Smuzhiyun 
904*4882a593Smuzhiyun 	if (priv->do_rx_crc) {
905*4882a593Smuzhiyun 		crc = crc32_le(crc, mac4, 6);
906*4882a593Smuzhiyun 		msdu_size -= 4;
907*4882a593Smuzhiyun 	}
908*4882a593Smuzhiyun 
909*4882a593Smuzhiyun 	if (!(skb = dev_alloc_skb(msdu_size + 14))) {
910*4882a593Smuzhiyun 		priv->dev->stats.rx_dropped++;
911*4882a593Smuzhiyun 		return;
912*4882a593Smuzhiyun 	}
913*4882a593Smuzhiyun 
914*4882a593Smuzhiyun 	skb_reserve(skb, 2);
915*4882a593Smuzhiyun 	skbp = skb_put(skb, msdu_size + 12);
916*4882a593Smuzhiyun 	atmel_copy_to_host(priv->dev, skbp + 12, rx_packet_loc + 30, msdu_size);
917*4882a593Smuzhiyun 
918*4882a593Smuzhiyun 	if (priv->do_rx_crc) {
919*4882a593Smuzhiyun 		u32 netcrc;
920*4882a593Smuzhiyun 		crc = crc32_le(crc, skbp + 12, msdu_size);
921*4882a593Smuzhiyun 		atmel_copy_to_host(priv->dev, (void *)&netcrc, rx_packet_loc + 30 + msdu_size, 4);
922*4882a593Smuzhiyun 		if ((crc ^ 0xffffffff) != netcrc) {
923*4882a593Smuzhiyun 			priv->dev->stats.rx_crc_errors++;
924*4882a593Smuzhiyun 			dev_kfree_skb(skb);
925*4882a593Smuzhiyun 			return;
926*4882a593Smuzhiyun 		}
927*4882a593Smuzhiyun 	}
928*4882a593Smuzhiyun 
929*4882a593Smuzhiyun 	memcpy(skbp, header->addr1, ETH_ALEN); /* destination address */
930*4882a593Smuzhiyun 	if (le16_to_cpu(header->frame_control) & IEEE80211_FCTL_FROMDS)
931*4882a593Smuzhiyun 		memcpy(&skbp[ETH_ALEN], header->addr3, ETH_ALEN);
932*4882a593Smuzhiyun 	else
933*4882a593Smuzhiyun 		memcpy(&skbp[ETH_ALEN], header->addr2, ETH_ALEN); /* source address */
934*4882a593Smuzhiyun 
935*4882a593Smuzhiyun 	skb->protocol = eth_type_trans(skb, priv->dev);
936*4882a593Smuzhiyun 	skb->ip_summed = CHECKSUM_NONE;
937*4882a593Smuzhiyun 	netif_rx(skb);
938*4882a593Smuzhiyun 	priv->dev->stats.rx_bytes += 12 + msdu_size;
939*4882a593Smuzhiyun 	priv->dev->stats.rx_packets++;
940*4882a593Smuzhiyun }
941*4882a593Smuzhiyun 
942*4882a593Smuzhiyun /* Test to see if the packet in card memory at packet_loc has a valid CRC
943*4882a593Smuzhiyun    It doesn't matter that this is slow: it is only used to proble the first few
944*4882a593Smuzhiyun    packets. */
probe_crc(struct atmel_private * priv,u16 packet_loc,u16 msdu_size)945*4882a593Smuzhiyun static int probe_crc(struct atmel_private *priv, u16 packet_loc, u16 msdu_size)
946*4882a593Smuzhiyun {
947*4882a593Smuzhiyun 	int i = msdu_size - 4;
948*4882a593Smuzhiyun 	u32 netcrc, crc = 0xffffffff;
949*4882a593Smuzhiyun 
950*4882a593Smuzhiyun 	if (msdu_size < 4)
951*4882a593Smuzhiyun 		return 0;
952*4882a593Smuzhiyun 
953*4882a593Smuzhiyun 	atmel_copy_to_host(priv->dev, (void *)&netcrc, packet_loc + i, 4);
954*4882a593Smuzhiyun 
955*4882a593Smuzhiyun 	atmel_writeAR(priv->dev, packet_loc);
956*4882a593Smuzhiyun 	while (i--) {
957*4882a593Smuzhiyun 		u8 octet = atmel_read8(priv->dev, DR);
958*4882a593Smuzhiyun 		crc = crc32_le(crc, &octet, 1);
959*4882a593Smuzhiyun 	}
960*4882a593Smuzhiyun 
961*4882a593Smuzhiyun 	return (crc ^ 0xffffffff) == netcrc;
962*4882a593Smuzhiyun }
963*4882a593Smuzhiyun 
frag_rx_path(struct atmel_private * priv,struct ieee80211_hdr * header,u16 msdu_size,u16 rx_packet_loc,u32 crc,u16 seq_no,u8 frag_no,int more_frags)964*4882a593Smuzhiyun static void frag_rx_path(struct atmel_private *priv,
965*4882a593Smuzhiyun 			 struct ieee80211_hdr *header,
966*4882a593Smuzhiyun 			 u16 msdu_size, u16 rx_packet_loc, u32 crc, u16 seq_no,
967*4882a593Smuzhiyun 			 u8 frag_no, int more_frags)
968*4882a593Smuzhiyun {
969*4882a593Smuzhiyun 	u8 mac4[ETH_ALEN];
970*4882a593Smuzhiyun 	u8 source[ETH_ALEN];
971*4882a593Smuzhiyun 	struct sk_buff *skb;
972*4882a593Smuzhiyun 
973*4882a593Smuzhiyun 	if (le16_to_cpu(header->frame_control) & IEEE80211_FCTL_FROMDS)
974*4882a593Smuzhiyun 		memcpy(source, header->addr3, ETH_ALEN);
975*4882a593Smuzhiyun 	else
976*4882a593Smuzhiyun 		memcpy(source, header->addr2, ETH_ALEN);
977*4882a593Smuzhiyun 
978*4882a593Smuzhiyun 	rx_packet_loc += 24; /* skip header */
979*4882a593Smuzhiyun 
980*4882a593Smuzhiyun 	if (priv->do_rx_crc)
981*4882a593Smuzhiyun 		msdu_size -= 4;
982*4882a593Smuzhiyun 
983*4882a593Smuzhiyun 	if (frag_no == 0) { /* first fragment */
984*4882a593Smuzhiyun 		atmel_copy_to_host(priv->dev, mac4, rx_packet_loc, ETH_ALEN);
985*4882a593Smuzhiyun 		msdu_size -= ETH_ALEN;
986*4882a593Smuzhiyun 		rx_packet_loc += ETH_ALEN;
987*4882a593Smuzhiyun 
988*4882a593Smuzhiyun 		if (priv->do_rx_crc)
989*4882a593Smuzhiyun 			crc = crc32_le(crc, mac4, 6);
990*4882a593Smuzhiyun 
991*4882a593Smuzhiyun 		priv->frag_seq = seq_no;
992*4882a593Smuzhiyun 		priv->frag_no = 1;
993*4882a593Smuzhiyun 		priv->frag_len = msdu_size;
994*4882a593Smuzhiyun 		memcpy(priv->frag_source, source, ETH_ALEN);
995*4882a593Smuzhiyun 		memcpy(&priv->rx_buf[ETH_ALEN], source, ETH_ALEN);
996*4882a593Smuzhiyun 		memcpy(priv->rx_buf, header->addr1, ETH_ALEN);
997*4882a593Smuzhiyun 
998*4882a593Smuzhiyun 		atmel_copy_to_host(priv->dev, &priv->rx_buf[12], rx_packet_loc, msdu_size);
999*4882a593Smuzhiyun 
1000*4882a593Smuzhiyun 		if (priv->do_rx_crc) {
1001*4882a593Smuzhiyun 			u32 netcrc;
1002*4882a593Smuzhiyun 			crc = crc32_le(crc, &priv->rx_buf[12], msdu_size);
1003*4882a593Smuzhiyun 			atmel_copy_to_host(priv->dev, (void *)&netcrc, rx_packet_loc + msdu_size, 4);
1004*4882a593Smuzhiyun 			if ((crc ^ 0xffffffff) != netcrc) {
1005*4882a593Smuzhiyun 				priv->dev->stats.rx_crc_errors++;
1006*4882a593Smuzhiyun 				eth_broadcast_addr(priv->frag_source);
1007*4882a593Smuzhiyun 			}
1008*4882a593Smuzhiyun 		}
1009*4882a593Smuzhiyun 
1010*4882a593Smuzhiyun 	} else if (priv->frag_no == frag_no &&
1011*4882a593Smuzhiyun 		   priv->frag_seq == seq_no &&
1012*4882a593Smuzhiyun 		   memcmp(priv->frag_source, source, ETH_ALEN) == 0) {
1013*4882a593Smuzhiyun 
1014*4882a593Smuzhiyun 		atmel_copy_to_host(priv->dev, &priv->rx_buf[12 + priv->frag_len],
1015*4882a593Smuzhiyun 				   rx_packet_loc, msdu_size);
1016*4882a593Smuzhiyun 		if (priv->do_rx_crc) {
1017*4882a593Smuzhiyun 			u32 netcrc;
1018*4882a593Smuzhiyun 			crc = crc32_le(crc,
1019*4882a593Smuzhiyun 				       &priv->rx_buf[12 + priv->frag_len],
1020*4882a593Smuzhiyun 				       msdu_size);
1021*4882a593Smuzhiyun 			atmel_copy_to_host(priv->dev, (void *)&netcrc, rx_packet_loc + msdu_size, 4);
1022*4882a593Smuzhiyun 			if ((crc ^ 0xffffffff) != netcrc) {
1023*4882a593Smuzhiyun 				priv->dev->stats.rx_crc_errors++;
1024*4882a593Smuzhiyun 				eth_broadcast_addr(priv->frag_source);
1025*4882a593Smuzhiyun 				more_frags = 1; /* don't send broken assembly */
1026*4882a593Smuzhiyun 			}
1027*4882a593Smuzhiyun 		}
1028*4882a593Smuzhiyun 
1029*4882a593Smuzhiyun 		priv->frag_len += msdu_size;
1030*4882a593Smuzhiyun 		priv->frag_no++;
1031*4882a593Smuzhiyun 
1032*4882a593Smuzhiyun 		if (!more_frags) { /* last one */
1033*4882a593Smuzhiyun 			eth_broadcast_addr(priv->frag_source);
1034*4882a593Smuzhiyun 			if (!(skb = dev_alloc_skb(priv->frag_len + 14))) {
1035*4882a593Smuzhiyun 				priv->dev->stats.rx_dropped++;
1036*4882a593Smuzhiyun 			} else {
1037*4882a593Smuzhiyun 				skb_reserve(skb, 2);
1038*4882a593Smuzhiyun 				skb_put_data(skb, priv->rx_buf,
1039*4882a593Smuzhiyun 				             priv->frag_len + 12);
1040*4882a593Smuzhiyun 				skb->protocol = eth_type_trans(skb, priv->dev);
1041*4882a593Smuzhiyun 				skb->ip_summed = CHECKSUM_NONE;
1042*4882a593Smuzhiyun 				netif_rx(skb);
1043*4882a593Smuzhiyun 				priv->dev->stats.rx_bytes += priv->frag_len + 12;
1044*4882a593Smuzhiyun 				priv->dev->stats.rx_packets++;
1045*4882a593Smuzhiyun 			}
1046*4882a593Smuzhiyun 		}
1047*4882a593Smuzhiyun 	} else
1048*4882a593Smuzhiyun 		priv->wstats.discard.fragment++;
1049*4882a593Smuzhiyun }
1050*4882a593Smuzhiyun 
rx_done_irq(struct atmel_private * priv)1051*4882a593Smuzhiyun static void rx_done_irq(struct atmel_private *priv)
1052*4882a593Smuzhiyun {
1053*4882a593Smuzhiyun 	int i;
1054*4882a593Smuzhiyun 	struct ieee80211_hdr header;
1055*4882a593Smuzhiyun 
1056*4882a593Smuzhiyun 	for (i = 0;
1057*4882a593Smuzhiyun 	     atmel_rmem8(priv, atmel_rx(priv, RX_DESC_FLAGS_OFFSET, priv->rx_desc_head)) == RX_DESC_FLAG_VALID &&
1058*4882a593Smuzhiyun 		     i < priv->host_info.rx_desc_count;
1059*4882a593Smuzhiyun 	     i++) {
1060*4882a593Smuzhiyun 
1061*4882a593Smuzhiyun 		u16 msdu_size, rx_packet_loc, frame_ctl, seq_control;
1062*4882a593Smuzhiyun 		u8 status = atmel_rmem8(priv, atmel_rx(priv, RX_DESC_STATUS_OFFSET, priv->rx_desc_head));
1063*4882a593Smuzhiyun 		u32 crc = 0xffffffff;
1064*4882a593Smuzhiyun 
1065*4882a593Smuzhiyun 		if (status != RX_STATUS_SUCCESS) {
1066*4882a593Smuzhiyun 			if (status == 0xc1) /* determined by experiment */
1067*4882a593Smuzhiyun 				priv->wstats.discard.nwid++;
1068*4882a593Smuzhiyun 			else
1069*4882a593Smuzhiyun 				priv->dev->stats.rx_errors++;
1070*4882a593Smuzhiyun 			goto next;
1071*4882a593Smuzhiyun 		}
1072*4882a593Smuzhiyun 
1073*4882a593Smuzhiyun 		msdu_size = atmel_rmem16(priv, atmel_rx(priv, RX_DESC_MSDU_SIZE_OFFSET, priv->rx_desc_head));
1074*4882a593Smuzhiyun 		rx_packet_loc = atmel_rmem16(priv, atmel_rx(priv, RX_DESC_MSDU_POS_OFFSET, priv->rx_desc_head));
1075*4882a593Smuzhiyun 
1076*4882a593Smuzhiyun 		if (msdu_size < 30) {
1077*4882a593Smuzhiyun 			priv->dev->stats.rx_errors++;
1078*4882a593Smuzhiyun 			goto next;
1079*4882a593Smuzhiyun 		}
1080*4882a593Smuzhiyun 
1081*4882a593Smuzhiyun 		/* Get header as far as end of seq_ctrl */
1082*4882a593Smuzhiyun 		atmel_copy_to_host(priv->dev, (char *)&header, rx_packet_loc, 24);
1083*4882a593Smuzhiyun 		frame_ctl = le16_to_cpu(header.frame_control);
1084*4882a593Smuzhiyun 		seq_control = le16_to_cpu(header.seq_ctrl);
1085*4882a593Smuzhiyun 
1086*4882a593Smuzhiyun 		/* probe for CRC use here if needed  once five packets have
1087*4882a593Smuzhiyun 		   arrived with the same crc status, we assume we know what's
1088*4882a593Smuzhiyun 		   happening and stop probing */
1089*4882a593Smuzhiyun 		if (priv->probe_crc) {
1090*4882a593Smuzhiyun 			if (!priv->wep_is_on || !(frame_ctl & IEEE80211_FCTL_PROTECTED)) {
1091*4882a593Smuzhiyun 				priv->do_rx_crc = probe_crc(priv, rx_packet_loc, msdu_size);
1092*4882a593Smuzhiyun 			} else {
1093*4882a593Smuzhiyun 				priv->do_rx_crc = probe_crc(priv, rx_packet_loc + 24, msdu_size - 24);
1094*4882a593Smuzhiyun 			}
1095*4882a593Smuzhiyun 			if (priv->do_rx_crc) {
1096*4882a593Smuzhiyun 				if (priv->crc_ok_cnt++ > 5)
1097*4882a593Smuzhiyun 					priv->probe_crc = 0;
1098*4882a593Smuzhiyun 			} else {
1099*4882a593Smuzhiyun 				if (priv->crc_ko_cnt++ > 5)
1100*4882a593Smuzhiyun 					priv->probe_crc = 0;
1101*4882a593Smuzhiyun 			}
1102*4882a593Smuzhiyun 		}
1103*4882a593Smuzhiyun 
1104*4882a593Smuzhiyun 		/* don't CRC header when WEP in use */
1105*4882a593Smuzhiyun 		if (priv->do_rx_crc && (!priv->wep_is_on || !(frame_ctl & IEEE80211_FCTL_PROTECTED))) {
1106*4882a593Smuzhiyun 			crc = crc32_le(0xffffffff, (unsigned char *)&header, 24);
1107*4882a593Smuzhiyun 		}
1108*4882a593Smuzhiyun 		msdu_size -= 24; /* header */
1109*4882a593Smuzhiyun 
1110*4882a593Smuzhiyun 		if ((frame_ctl & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA) {
1111*4882a593Smuzhiyun 			int more_fragments = frame_ctl & IEEE80211_FCTL_MOREFRAGS;
1112*4882a593Smuzhiyun 			u8 packet_fragment_no = seq_control & IEEE80211_SCTL_FRAG;
1113*4882a593Smuzhiyun 			u16 packet_sequence_no = (seq_control & IEEE80211_SCTL_SEQ) >> 4;
1114*4882a593Smuzhiyun 
1115*4882a593Smuzhiyun 			if (!more_fragments && packet_fragment_no == 0) {
1116*4882a593Smuzhiyun 				fast_rx_path(priv, &header, msdu_size, rx_packet_loc, crc);
1117*4882a593Smuzhiyun 			} else {
1118*4882a593Smuzhiyun 				frag_rx_path(priv, &header, msdu_size, rx_packet_loc, crc,
1119*4882a593Smuzhiyun 					     packet_sequence_no, packet_fragment_no, more_fragments);
1120*4882a593Smuzhiyun 			}
1121*4882a593Smuzhiyun 		}
1122*4882a593Smuzhiyun 
1123*4882a593Smuzhiyun 		if ((frame_ctl & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
1124*4882a593Smuzhiyun 			/* copy rest of packet into buffer */
1125*4882a593Smuzhiyun 			atmel_copy_to_host(priv->dev, (unsigned char *)&priv->rx_buf, rx_packet_loc + 24, msdu_size);
1126*4882a593Smuzhiyun 
1127*4882a593Smuzhiyun 			/* we use the same buffer for frag reassembly and control packets */
1128*4882a593Smuzhiyun 			eth_broadcast_addr(priv->frag_source);
1129*4882a593Smuzhiyun 
1130*4882a593Smuzhiyun 			if (priv->do_rx_crc) {
1131*4882a593Smuzhiyun 				/* last 4 octets is crc */
1132*4882a593Smuzhiyun 				msdu_size -= 4;
1133*4882a593Smuzhiyun 				crc = crc32_le(crc, (unsigned char *)&priv->rx_buf, msdu_size);
1134*4882a593Smuzhiyun 				if ((crc ^ 0xffffffff) != (*((u32 *)&priv->rx_buf[msdu_size]))) {
1135*4882a593Smuzhiyun 					priv->dev->stats.rx_crc_errors++;
1136*4882a593Smuzhiyun 					goto next;
1137*4882a593Smuzhiyun 				}
1138*4882a593Smuzhiyun 			}
1139*4882a593Smuzhiyun 
1140*4882a593Smuzhiyun 			atmel_management_frame(priv, &header, msdu_size,
1141*4882a593Smuzhiyun 					       atmel_rmem8(priv, atmel_rx(priv, RX_DESC_RSSI_OFFSET, priv->rx_desc_head)));
1142*4882a593Smuzhiyun 		}
1143*4882a593Smuzhiyun 
1144*4882a593Smuzhiyun next:
1145*4882a593Smuzhiyun 		/* release descriptor */
1146*4882a593Smuzhiyun 		atmel_wmem8(priv, atmel_rx(priv, RX_DESC_FLAGS_OFFSET, priv->rx_desc_head), RX_DESC_FLAG_CONSUMED);
1147*4882a593Smuzhiyun 
1148*4882a593Smuzhiyun 		if (priv->rx_desc_head < (priv->host_info.rx_desc_count - 1))
1149*4882a593Smuzhiyun 			priv->rx_desc_head++;
1150*4882a593Smuzhiyun 		else
1151*4882a593Smuzhiyun 			priv->rx_desc_head = 0;
1152*4882a593Smuzhiyun 	}
1153*4882a593Smuzhiyun }
1154*4882a593Smuzhiyun 
service_interrupt(int irq,void * dev_id)1155*4882a593Smuzhiyun static irqreturn_t service_interrupt(int irq, void *dev_id)
1156*4882a593Smuzhiyun {
1157*4882a593Smuzhiyun 	struct net_device *dev = (struct net_device *) dev_id;
1158*4882a593Smuzhiyun 	struct atmel_private *priv = netdev_priv(dev);
1159*4882a593Smuzhiyun 	u8 isr;
1160*4882a593Smuzhiyun 	int i = -1;
1161*4882a593Smuzhiyun 	static const u8 irq_order[] = {
1162*4882a593Smuzhiyun 		ISR_OUT_OF_RANGE,
1163*4882a593Smuzhiyun 		ISR_RxCOMPLETE,
1164*4882a593Smuzhiyun 		ISR_TxCOMPLETE,
1165*4882a593Smuzhiyun 		ISR_RxFRAMELOST,
1166*4882a593Smuzhiyun 		ISR_FATAL_ERROR,
1167*4882a593Smuzhiyun 		ISR_COMMAND_COMPLETE,
1168*4882a593Smuzhiyun 		ISR_IBSS_MERGE,
1169*4882a593Smuzhiyun 		ISR_GENERIC_IRQ
1170*4882a593Smuzhiyun 	};
1171*4882a593Smuzhiyun 
1172*4882a593Smuzhiyun 	if (priv->card && priv->present_callback &&
1173*4882a593Smuzhiyun 	    !(*priv->present_callback)(priv->card))
1174*4882a593Smuzhiyun 		return IRQ_HANDLED;
1175*4882a593Smuzhiyun 
1176*4882a593Smuzhiyun 	/* In this state upper-level code assumes it can mess with
1177*4882a593Smuzhiyun 	   the card unhampered by interrupts which may change register state.
1178*4882a593Smuzhiyun 	   Note that even though the card shouldn't generate interrupts
1179*4882a593Smuzhiyun 	   the inturrupt line may be shared. This allows card setup
1180*4882a593Smuzhiyun 	   to go on without disabling interrupts for a long time. */
1181*4882a593Smuzhiyun 	if (priv->station_state == STATION_STATE_DOWN)
1182*4882a593Smuzhiyun 		return IRQ_NONE;
1183*4882a593Smuzhiyun 
1184*4882a593Smuzhiyun 	atmel_clear_gcr(dev, GCR_ENINT); /* disable interrupts */
1185*4882a593Smuzhiyun 
1186*4882a593Smuzhiyun 	while (1) {
1187*4882a593Smuzhiyun 		if (!atmel_lock_mac(priv)) {
1188*4882a593Smuzhiyun 			/* failed to contact card */
1189*4882a593Smuzhiyun 			printk(KERN_ALERT "%s: failed to contact MAC.\n", dev->name);
1190*4882a593Smuzhiyun 			return IRQ_HANDLED;
1191*4882a593Smuzhiyun 		}
1192*4882a593Smuzhiyun 
1193*4882a593Smuzhiyun 		isr = atmel_rmem8(priv, atmel_hi(priv, IFACE_INT_STATUS_OFFSET));
1194*4882a593Smuzhiyun 		atmel_wmem8(priv, atmel_hi(priv, IFACE_LOCKOUT_MAC_OFFSET), 0);
1195*4882a593Smuzhiyun 
1196*4882a593Smuzhiyun 		if (!isr) {
1197*4882a593Smuzhiyun 			atmel_set_gcr(dev, GCR_ENINT); /* enable interrupts */
1198*4882a593Smuzhiyun 			return i == -1 ? IRQ_NONE : IRQ_HANDLED;
1199*4882a593Smuzhiyun 		}
1200*4882a593Smuzhiyun 
1201*4882a593Smuzhiyun 		atmel_set_gcr(dev, GCR_ACKINT); /* acknowledge interrupt */
1202*4882a593Smuzhiyun 
1203*4882a593Smuzhiyun 		for (i = 0; i < ARRAY_SIZE(irq_order); i++)
1204*4882a593Smuzhiyun 			if (isr & irq_order[i])
1205*4882a593Smuzhiyun 				break;
1206*4882a593Smuzhiyun 
1207*4882a593Smuzhiyun 		if (!atmel_lock_mac(priv)) {
1208*4882a593Smuzhiyun 			/* failed to contact card */
1209*4882a593Smuzhiyun 			printk(KERN_ALERT "%s: failed to contact MAC.\n", dev->name);
1210*4882a593Smuzhiyun 			return IRQ_HANDLED;
1211*4882a593Smuzhiyun 		}
1212*4882a593Smuzhiyun 
1213*4882a593Smuzhiyun 		isr = atmel_rmem8(priv, atmel_hi(priv, IFACE_INT_STATUS_OFFSET));
1214*4882a593Smuzhiyun 		isr ^= irq_order[i];
1215*4882a593Smuzhiyun 		atmel_wmem8(priv, atmel_hi(priv, IFACE_INT_STATUS_OFFSET), isr);
1216*4882a593Smuzhiyun 		atmel_wmem8(priv, atmel_hi(priv, IFACE_LOCKOUT_MAC_OFFSET), 0);
1217*4882a593Smuzhiyun 
1218*4882a593Smuzhiyun 		switch (irq_order[i]) {
1219*4882a593Smuzhiyun 
1220*4882a593Smuzhiyun 		case ISR_OUT_OF_RANGE:
1221*4882a593Smuzhiyun 			if (priv->operating_mode == IW_MODE_INFRA &&
1222*4882a593Smuzhiyun 			    priv->station_state == STATION_STATE_READY) {
1223*4882a593Smuzhiyun 				priv->station_is_associated = 0;
1224*4882a593Smuzhiyun 				atmel_scan(priv, 1);
1225*4882a593Smuzhiyun 			}
1226*4882a593Smuzhiyun 			break;
1227*4882a593Smuzhiyun 
1228*4882a593Smuzhiyun 		case ISR_RxFRAMELOST:
1229*4882a593Smuzhiyun 			priv->wstats.discard.misc++;
1230*4882a593Smuzhiyun 			fallthrough;
1231*4882a593Smuzhiyun 		case ISR_RxCOMPLETE:
1232*4882a593Smuzhiyun 			rx_done_irq(priv);
1233*4882a593Smuzhiyun 			break;
1234*4882a593Smuzhiyun 
1235*4882a593Smuzhiyun 		case ISR_TxCOMPLETE:
1236*4882a593Smuzhiyun 			tx_done_irq(priv);
1237*4882a593Smuzhiyun 			break;
1238*4882a593Smuzhiyun 
1239*4882a593Smuzhiyun 		case ISR_FATAL_ERROR:
1240*4882a593Smuzhiyun 			printk(KERN_ALERT "%s: *** FATAL error interrupt ***\n", dev->name);
1241*4882a593Smuzhiyun 			atmel_enter_state(priv, STATION_STATE_MGMT_ERROR);
1242*4882a593Smuzhiyun 			break;
1243*4882a593Smuzhiyun 
1244*4882a593Smuzhiyun 		case ISR_COMMAND_COMPLETE:
1245*4882a593Smuzhiyun 			atmel_command_irq(priv);
1246*4882a593Smuzhiyun 			break;
1247*4882a593Smuzhiyun 
1248*4882a593Smuzhiyun 		case ISR_IBSS_MERGE:
1249*4882a593Smuzhiyun 			atmel_get_mib(priv, Mac_Mgmt_Mib_Type, MAC_MGMT_MIB_CUR_BSSID_POS,
1250*4882a593Smuzhiyun 				      priv->CurrentBSSID, 6);
1251*4882a593Smuzhiyun 			/* The WPA stuff cares about the current AP address */
1252*4882a593Smuzhiyun 			if (priv->use_wpa)
1253*4882a593Smuzhiyun 				build_wpa_mib(priv);
1254*4882a593Smuzhiyun 			break;
1255*4882a593Smuzhiyun 		case ISR_GENERIC_IRQ:
1256*4882a593Smuzhiyun 			printk(KERN_INFO "%s: Generic_irq received.\n", dev->name);
1257*4882a593Smuzhiyun 			break;
1258*4882a593Smuzhiyun 		}
1259*4882a593Smuzhiyun 	}
1260*4882a593Smuzhiyun }
1261*4882a593Smuzhiyun 
atmel_get_wireless_stats(struct net_device * dev)1262*4882a593Smuzhiyun static struct iw_statistics *atmel_get_wireless_stats(struct net_device *dev)
1263*4882a593Smuzhiyun {
1264*4882a593Smuzhiyun 	struct atmel_private *priv = netdev_priv(dev);
1265*4882a593Smuzhiyun 
1266*4882a593Smuzhiyun 	/* update the link quality here in case we are seeing no beacons
1267*4882a593Smuzhiyun 	   at all to drive the process */
1268*4882a593Smuzhiyun 	atmel_smooth_qual(priv);
1269*4882a593Smuzhiyun 
1270*4882a593Smuzhiyun 	priv->wstats.status = priv->station_state;
1271*4882a593Smuzhiyun 
1272*4882a593Smuzhiyun 	if (priv->operating_mode == IW_MODE_INFRA) {
1273*4882a593Smuzhiyun 		if (priv->station_state != STATION_STATE_READY) {
1274*4882a593Smuzhiyun 			priv->wstats.qual.qual = 0;
1275*4882a593Smuzhiyun 			priv->wstats.qual.level = 0;
1276*4882a593Smuzhiyun 			priv->wstats.qual.updated = (IW_QUAL_QUAL_INVALID
1277*4882a593Smuzhiyun 					| IW_QUAL_LEVEL_INVALID);
1278*4882a593Smuzhiyun 		}
1279*4882a593Smuzhiyun 		priv->wstats.qual.noise = 0;
1280*4882a593Smuzhiyun 		priv->wstats.qual.updated |= IW_QUAL_NOISE_INVALID;
1281*4882a593Smuzhiyun 	} else {
1282*4882a593Smuzhiyun 		/* Quality levels cannot be determined in ad-hoc mode,
1283*4882a593Smuzhiyun 		   because we can 'hear' more that one remote station. */
1284*4882a593Smuzhiyun 		priv->wstats.qual.qual = 0;
1285*4882a593Smuzhiyun 		priv->wstats.qual.level	= 0;
1286*4882a593Smuzhiyun 		priv->wstats.qual.noise	= 0;
1287*4882a593Smuzhiyun 		priv->wstats.qual.updated = IW_QUAL_QUAL_INVALID
1288*4882a593Smuzhiyun 					| IW_QUAL_LEVEL_INVALID
1289*4882a593Smuzhiyun 					| IW_QUAL_NOISE_INVALID;
1290*4882a593Smuzhiyun 		priv->wstats.miss.beacon = 0;
1291*4882a593Smuzhiyun 	}
1292*4882a593Smuzhiyun 
1293*4882a593Smuzhiyun 	return &priv->wstats;
1294*4882a593Smuzhiyun }
1295*4882a593Smuzhiyun 
atmel_set_mac_address(struct net_device * dev,void * p)1296*4882a593Smuzhiyun static int atmel_set_mac_address(struct net_device *dev, void *p)
1297*4882a593Smuzhiyun {
1298*4882a593Smuzhiyun 	struct sockaddr *addr = p;
1299*4882a593Smuzhiyun 
1300*4882a593Smuzhiyun 	memcpy (dev->dev_addr, addr->sa_data, dev->addr_len);
1301*4882a593Smuzhiyun 	return atmel_open(dev);
1302*4882a593Smuzhiyun }
1303*4882a593Smuzhiyun 
1304*4882a593Smuzhiyun EXPORT_SYMBOL(atmel_open);
1305*4882a593Smuzhiyun 
atmel_open(struct net_device * dev)1306*4882a593Smuzhiyun int atmel_open(struct net_device *dev)
1307*4882a593Smuzhiyun {
1308*4882a593Smuzhiyun 	struct atmel_private *priv = netdev_priv(dev);
1309*4882a593Smuzhiyun 	int i, channel, err;
1310*4882a593Smuzhiyun 
1311*4882a593Smuzhiyun 	/* any scheduled timer is no longer needed and might screw things up.. */
1312*4882a593Smuzhiyun 	del_timer_sync(&priv->management_timer);
1313*4882a593Smuzhiyun 
1314*4882a593Smuzhiyun 	/* Interrupts will not touch the card once in this state... */
1315*4882a593Smuzhiyun 	priv->station_state = STATION_STATE_DOWN;
1316*4882a593Smuzhiyun 
1317*4882a593Smuzhiyun 	if (priv->new_SSID_size) {
1318*4882a593Smuzhiyun 		memcpy(priv->SSID, priv->new_SSID, priv->new_SSID_size);
1319*4882a593Smuzhiyun 		priv->SSID_size = priv->new_SSID_size;
1320*4882a593Smuzhiyun 		priv->new_SSID_size = 0;
1321*4882a593Smuzhiyun 	}
1322*4882a593Smuzhiyun 	priv->BSS_list_entries = 0;
1323*4882a593Smuzhiyun 
1324*4882a593Smuzhiyun 	priv->AuthenticationRequestRetryCnt = 0;
1325*4882a593Smuzhiyun 	priv->AssociationRequestRetryCnt = 0;
1326*4882a593Smuzhiyun 	priv->ReAssociationRequestRetryCnt = 0;
1327*4882a593Smuzhiyun 	priv->CurrentAuthentTransactionSeqNum = 0x0001;
1328*4882a593Smuzhiyun 	priv->ExpectedAuthentTransactionSeqNum = 0x0002;
1329*4882a593Smuzhiyun 
1330*4882a593Smuzhiyun 	priv->site_survey_state = SITE_SURVEY_IDLE;
1331*4882a593Smuzhiyun 	priv->station_is_associated = 0;
1332*4882a593Smuzhiyun 
1333*4882a593Smuzhiyun 	err = reset_atmel_card(dev);
1334*4882a593Smuzhiyun 	if (err)
1335*4882a593Smuzhiyun 		return err;
1336*4882a593Smuzhiyun 
1337*4882a593Smuzhiyun 	if (priv->config_reg_domain) {
1338*4882a593Smuzhiyun 		priv->reg_domain = priv->config_reg_domain;
1339*4882a593Smuzhiyun 		atmel_set_mib8(priv, Phy_Mib_Type, PHY_MIB_REG_DOMAIN_POS, priv->reg_domain);
1340*4882a593Smuzhiyun 	} else {
1341*4882a593Smuzhiyun 		priv->reg_domain = atmel_get_mib8(priv, Phy_Mib_Type, PHY_MIB_REG_DOMAIN_POS);
1342*4882a593Smuzhiyun 		for (i = 0; i < ARRAY_SIZE(channel_table); i++)
1343*4882a593Smuzhiyun 			if (priv->reg_domain == channel_table[i].reg_domain)
1344*4882a593Smuzhiyun 				break;
1345*4882a593Smuzhiyun 		if (i == ARRAY_SIZE(channel_table)) {
1346*4882a593Smuzhiyun 			priv->reg_domain = REG_DOMAIN_MKK1;
1347*4882a593Smuzhiyun 			printk(KERN_ALERT "%s: failed to get regulatory domain: assuming MKK1.\n", dev->name);
1348*4882a593Smuzhiyun 		}
1349*4882a593Smuzhiyun 	}
1350*4882a593Smuzhiyun 
1351*4882a593Smuzhiyun 	if ((channel = atmel_validate_channel(priv, priv->channel)))
1352*4882a593Smuzhiyun 		priv->channel = channel;
1353*4882a593Smuzhiyun 
1354*4882a593Smuzhiyun 	/* this moves station_state on.... */
1355*4882a593Smuzhiyun 	atmel_scan(priv, 1);
1356*4882a593Smuzhiyun 
1357*4882a593Smuzhiyun 	atmel_set_gcr(priv->dev, GCR_ENINT); /* enable interrupts */
1358*4882a593Smuzhiyun 	return 0;
1359*4882a593Smuzhiyun }
1360*4882a593Smuzhiyun 
atmel_close(struct net_device * dev)1361*4882a593Smuzhiyun static int atmel_close(struct net_device *dev)
1362*4882a593Smuzhiyun {
1363*4882a593Smuzhiyun 	struct atmel_private *priv = netdev_priv(dev);
1364*4882a593Smuzhiyun 
1365*4882a593Smuzhiyun 	/* Send event to userspace that we are disassociating */
1366*4882a593Smuzhiyun 	if (priv->station_state == STATION_STATE_READY) {
1367*4882a593Smuzhiyun 		union iwreq_data wrqu;
1368*4882a593Smuzhiyun 
1369*4882a593Smuzhiyun 		wrqu.data.length = 0;
1370*4882a593Smuzhiyun 		wrqu.data.flags = 0;
1371*4882a593Smuzhiyun 		wrqu.ap_addr.sa_family = ARPHRD_ETHER;
1372*4882a593Smuzhiyun 		eth_zero_addr(wrqu.ap_addr.sa_data);
1373*4882a593Smuzhiyun 		wireless_send_event(priv->dev, SIOCGIWAP, &wrqu, NULL);
1374*4882a593Smuzhiyun 	}
1375*4882a593Smuzhiyun 
1376*4882a593Smuzhiyun 	atmel_enter_state(priv, STATION_STATE_DOWN);
1377*4882a593Smuzhiyun 
1378*4882a593Smuzhiyun 	if (priv->bus_type == BUS_TYPE_PCCARD)
1379*4882a593Smuzhiyun 		atmel_write16(dev, GCR, 0x0060);
1380*4882a593Smuzhiyun 	atmel_write16(dev, GCR, 0x0040);
1381*4882a593Smuzhiyun 	return 0;
1382*4882a593Smuzhiyun }
1383*4882a593Smuzhiyun 
atmel_validate_channel(struct atmel_private * priv,int channel)1384*4882a593Smuzhiyun static int atmel_validate_channel(struct atmel_private *priv, int channel)
1385*4882a593Smuzhiyun {
1386*4882a593Smuzhiyun 	/* check that channel is OK, if so return zero,
1387*4882a593Smuzhiyun 	   else return suitable default channel */
1388*4882a593Smuzhiyun 	int i;
1389*4882a593Smuzhiyun 
1390*4882a593Smuzhiyun 	for (i = 0; i < ARRAY_SIZE(channel_table); i++)
1391*4882a593Smuzhiyun 		if (priv->reg_domain == channel_table[i].reg_domain) {
1392*4882a593Smuzhiyun 			if (channel >= channel_table[i].min &&
1393*4882a593Smuzhiyun 			    channel <= channel_table[i].max)
1394*4882a593Smuzhiyun 				return 0;
1395*4882a593Smuzhiyun 			else
1396*4882a593Smuzhiyun 				return channel_table[i].min;
1397*4882a593Smuzhiyun 		}
1398*4882a593Smuzhiyun 	return 0;
1399*4882a593Smuzhiyun }
1400*4882a593Smuzhiyun 
1401*4882a593Smuzhiyun #ifdef CONFIG_PROC_FS
atmel_proc_show(struct seq_file * m,void * v)1402*4882a593Smuzhiyun static int atmel_proc_show(struct seq_file *m, void *v)
1403*4882a593Smuzhiyun {
1404*4882a593Smuzhiyun 	struct atmel_private *priv = m->private;
1405*4882a593Smuzhiyun 	int i;
1406*4882a593Smuzhiyun 	char *s, *r, *c;
1407*4882a593Smuzhiyun 
1408*4882a593Smuzhiyun 	seq_printf(m, "Driver version:\t\t%d.%d\n", DRIVER_MAJOR, DRIVER_MINOR);
1409*4882a593Smuzhiyun 
1410*4882a593Smuzhiyun 	if (priv->station_state != STATION_STATE_DOWN) {
1411*4882a593Smuzhiyun 		seq_printf(m,
1412*4882a593Smuzhiyun 			   "Firmware version:\t%d.%d build %d\n"
1413*4882a593Smuzhiyun 			   "Firmware location:\t",
1414*4882a593Smuzhiyun 			   priv->host_info.major_version,
1415*4882a593Smuzhiyun 			   priv->host_info.minor_version,
1416*4882a593Smuzhiyun 			   priv->host_info.build_version);
1417*4882a593Smuzhiyun 
1418*4882a593Smuzhiyun 		if (priv->card_type != CARD_TYPE_EEPROM)
1419*4882a593Smuzhiyun 			seq_puts(m, "on card\n");
1420*4882a593Smuzhiyun 		else if (priv->firmware)
1421*4882a593Smuzhiyun 			seq_printf(m, "%s loaded by host\n", priv->firmware_id);
1422*4882a593Smuzhiyun 		else
1423*4882a593Smuzhiyun 			seq_printf(m, "%s loaded by hotplug\n", priv->firmware_id);
1424*4882a593Smuzhiyun 
1425*4882a593Smuzhiyun 		switch (priv->card_type) {
1426*4882a593Smuzhiyun 		case CARD_TYPE_PARALLEL_FLASH:
1427*4882a593Smuzhiyun 			c = "Parallel flash";
1428*4882a593Smuzhiyun 			break;
1429*4882a593Smuzhiyun 		case CARD_TYPE_SPI_FLASH:
1430*4882a593Smuzhiyun 			c = "SPI flash\n";
1431*4882a593Smuzhiyun 			break;
1432*4882a593Smuzhiyun 		case CARD_TYPE_EEPROM:
1433*4882a593Smuzhiyun 			c = "EEPROM";
1434*4882a593Smuzhiyun 			break;
1435*4882a593Smuzhiyun 		default:
1436*4882a593Smuzhiyun 			c = "<unknown>";
1437*4882a593Smuzhiyun 		}
1438*4882a593Smuzhiyun 
1439*4882a593Smuzhiyun 		r = "<unknown>";
1440*4882a593Smuzhiyun 		for (i = 0; i < ARRAY_SIZE(channel_table); i++)
1441*4882a593Smuzhiyun 			if (priv->reg_domain == channel_table[i].reg_domain)
1442*4882a593Smuzhiyun 				r = channel_table[i].name;
1443*4882a593Smuzhiyun 
1444*4882a593Smuzhiyun 		seq_printf(m, "MAC memory type:\t%s\n", c);
1445*4882a593Smuzhiyun 		seq_printf(m, "Regulatory domain:\t%s\n", r);
1446*4882a593Smuzhiyun 		seq_printf(m, "Host CRC checking:\t%s\n",
1447*4882a593Smuzhiyun 			 priv->do_rx_crc ? "On" : "Off");
1448*4882a593Smuzhiyun 		seq_printf(m, "WPA-capable firmware:\t%s\n",
1449*4882a593Smuzhiyun 			 priv->use_wpa ? "Yes" : "No");
1450*4882a593Smuzhiyun 	}
1451*4882a593Smuzhiyun 
1452*4882a593Smuzhiyun 	switch (priv->station_state) {
1453*4882a593Smuzhiyun 	case STATION_STATE_SCANNING:
1454*4882a593Smuzhiyun 		s = "Scanning";
1455*4882a593Smuzhiyun 		break;
1456*4882a593Smuzhiyun 	case STATION_STATE_JOINNING:
1457*4882a593Smuzhiyun 		s = "Joining";
1458*4882a593Smuzhiyun 		break;
1459*4882a593Smuzhiyun 	case STATION_STATE_AUTHENTICATING:
1460*4882a593Smuzhiyun 		s = "Authenticating";
1461*4882a593Smuzhiyun 		break;
1462*4882a593Smuzhiyun 	case STATION_STATE_ASSOCIATING:
1463*4882a593Smuzhiyun 		s = "Associating";
1464*4882a593Smuzhiyun 		break;
1465*4882a593Smuzhiyun 	case STATION_STATE_READY:
1466*4882a593Smuzhiyun 		s = "Ready";
1467*4882a593Smuzhiyun 		break;
1468*4882a593Smuzhiyun 	case STATION_STATE_REASSOCIATING:
1469*4882a593Smuzhiyun 		s = "Reassociating";
1470*4882a593Smuzhiyun 		break;
1471*4882a593Smuzhiyun 	case STATION_STATE_MGMT_ERROR:
1472*4882a593Smuzhiyun 		s = "Management error";
1473*4882a593Smuzhiyun 		break;
1474*4882a593Smuzhiyun 	case STATION_STATE_DOWN:
1475*4882a593Smuzhiyun 		s = "Down";
1476*4882a593Smuzhiyun 		break;
1477*4882a593Smuzhiyun 	default:
1478*4882a593Smuzhiyun 		s = "<unknown>";
1479*4882a593Smuzhiyun 	}
1480*4882a593Smuzhiyun 
1481*4882a593Smuzhiyun 	seq_printf(m, "Current state:\t\t%s\n", s);
1482*4882a593Smuzhiyun 	return 0;
1483*4882a593Smuzhiyun }
1484*4882a593Smuzhiyun #endif
1485*4882a593Smuzhiyun 
1486*4882a593Smuzhiyun static const struct net_device_ops atmel_netdev_ops = {
1487*4882a593Smuzhiyun 	.ndo_open 		= atmel_open,
1488*4882a593Smuzhiyun 	.ndo_stop		= atmel_close,
1489*4882a593Smuzhiyun 	.ndo_set_mac_address 	= atmel_set_mac_address,
1490*4882a593Smuzhiyun 	.ndo_start_xmit 	= start_tx,
1491*4882a593Smuzhiyun 	.ndo_do_ioctl 		= atmel_ioctl,
1492*4882a593Smuzhiyun 	.ndo_validate_addr	= eth_validate_addr,
1493*4882a593Smuzhiyun };
1494*4882a593Smuzhiyun 
init_atmel_card(unsigned short irq,unsigned long port,const AtmelFWType fw_type,struct device * sys_dev,int (* card_present)(void *),void * card)1495*4882a593Smuzhiyun struct net_device *init_atmel_card(unsigned short irq, unsigned long port,
1496*4882a593Smuzhiyun 				   const AtmelFWType fw_type,
1497*4882a593Smuzhiyun 				   struct device *sys_dev,
1498*4882a593Smuzhiyun 				   int (*card_present)(void *), void *card)
1499*4882a593Smuzhiyun {
1500*4882a593Smuzhiyun 	struct net_device *dev;
1501*4882a593Smuzhiyun 	struct atmel_private *priv;
1502*4882a593Smuzhiyun 	int rc;
1503*4882a593Smuzhiyun 
1504*4882a593Smuzhiyun 	/* Create the network device object. */
1505*4882a593Smuzhiyun 	dev = alloc_etherdev(sizeof(*priv));
1506*4882a593Smuzhiyun 	if (!dev)
1507*4882a593Smuzhiyun 		return NULL;
1508*4882a593Smuzhiyun 
1509*4882a593Smuzhiyun 	if (dev_alloc_name(dev, dev->name) < 0) {
1510*4882a593Smuzhiyun 		printk(KERN_ERR "atmel: Couldn't get name!\n");
1511*4882a593Smuzhiyun 		goto err_out_free;
1512*4882a593Smuzhiyun 	}
1513*4882a593Smuzhiyun 
1514*4882a593Smuzhiyun 	priv = netdev_priv(dev);
1515*4882a593Smuzhiyun 	priv->dev = dev;
1516*4882a593Smuzhiyun 	priv->sys_dev = sys_dev;
1517*4882a593Smuzhiyun 	priv->present_callback = card_present;
1518*4882a593Smuzhiyun 	priv->card = card;
1519*4882a593Smuzhiyun 	priv->firmware = NULL;
1520*4882a593Smuzhiyun 	priv->firmware_type = fw_type;
1521*4882a593Smuzhiyun 	if (firmware) /* module parameter */
1522*4882a593Smuzhiyun 		strlcpy(priv->firmware_id, firmware, sizeof(priv->firmware_id));
1523*4882a593Smuzhiyun 	priv->bus_type = card_present ? BUS_TYPE_PCCARD : BUS_TYPE_PCI;
1524*4882a593Smuzhiyun 	priv->station_state = STATION_STATE_DOWN;
1525*4882a593Smuzhiyun 	priv->do_rx_crc = 0;
1526*4882a593Smuzhiyun 	/* For PCMCIA cards, some chips need CRC, some don't
1527*4882a593Smuzhiyun 	   so we have to probe. */
1528*4882a593Smuzhiyun 	if (priv->bus_type == BUS_TYPE_PCCARD) {
1529*4882a593Smuzhiyun 		priv->probe_crc = 1;
1530*4882a593Smuzhiyun 		priv->crc_ok_cnt = priv->crc_ko_cnt = 0;
1531*4882a593Smuzhiyun 	} else
1532*4882a593Smuzhiyun 		priv->probe_crc = 0;
1533*4882a593Smuzhiyun 	priv->last_qual = jiffies;
1534*4882a593Smuzhiyun 	priv->last_beacon_timestamp = 0;
1535*4882a593Smuzhiyun 	memset(priv->frag_source, 0xff, sizeof(priv->frag_source));
1536*4882a593Smuzhiyun 	eth_zero_addr(priv->BSSID);
1537*4882a593Smuzhiyun 	priv->CurrentBSSID[0] = 0xFF; /* Initialize to something invalid.... */
1538*4882a593Smuzhiyun 	priv->station_was_associated = 0;
1539*4882a593Smuzhiyun 
1540*4882a593Smuzhiyun 	priv->last_survey = jiffies;
1541*4882a593Smuzhiyun 	priv->preamble = LONG_PREAMBLE;
1542*4882a593Smuzhiyun 	priv->operating_mode = IW_MODE_INFRA;
1543*4882a593Smuzhiyun 	priv->connect_to_any_BSS = 0;
1544*4882a593Smuzhiyun 	priv->config_reg_domain = 0;
1545*4882a593Smuzhiyun 	priv->reg_domain = 0;
1546*4882a593Smuzhiyun 	priv->tx_rate = 3;
1547*4882a593Smuzhiyun 	priv->auto_tx_rate = 1;
1548*4882a593Smuzhiyun 	priv->channel = 4;
1549*4882a593Smuzhiyun 	priv->power_mode = 0;
1550*4882a593Smuzhiyun 	priv->SSID[0] = '\0';
1551*4882a593Smuzhiyun 	priv->SSID_size = 0;
1552*4882a593Smuzhiyun 	priv->new_SSID_size = 0;
1553*4882a593Smuzhiyun 	priv->frag_threshold = 2346;
1554*4882a593Smuzhiyun 	priv->rts_threshold = 2347;
1555*4882a593Smuzhiyun 	priv->short_retry = 7;
1556*4882a593Smuzhiyun 	priv->long_retry = 4;
1557*4882a593Smuzhiyun 
1558*4882a593Smuzhiyun 	priv->wep_is_on = 0;
1559*4882a593Smuzhiyun 	priv->default_key = 0;
1560*4882a593Smuzhiyun 	priv->encryption_level = 0;
1561*4882a593Smuzhiyun 	priv->exclude_unencrypted = 0;
1562*4882a593Smuzhiyun 	priv->group_cipher_suite = priv->pairwise_cipher_suite = CIPHER_SUITE_NONE;
1563*4882a593Smuzhiyun 	priv->use_wpa = 0;
1564*4882a593Smuzhiyun 	memset(priv->wep_keys, 0, sizeof(priv->wep_keys));
1565*4882a593Smuzhiyun 	memset(priv->wep_key_len, 0, sizeof(priv->wep_key_len));
1566*4882a593Smuzhiyun 
1567*4882a593Smuzhiyun 	priv->default_beacon_period = priv->beacon_period = 100;
1568*4882a593Smuzhiyun 	priv->listen_interval = 1;
1569*4882a593Smuzhiyun 
1570*4882a593Smuzhiyun 	timer_setup(&priv->management_timer, atmel_management_timer, 0);
1571*4882a593Smuzhiyun 	spin_lock_init(&priv->irqlock);
1572*4882a593Smuzhiyun 	spin_lock_init(&priv->timerlock);
1573*4882a593Smuzhiyun 
1574*4882a593Smuzhiyun 	dev->netdev_ops = &atmel_netdev_ops;
1575*4882a593Smuzhiyun 	dev->wireless_handlers = &atmel_handler_def;
1576*4882a593Smuzhiyun 	dev->irq = irq;
1577*4882a593Smuzhiyun 	dev->base_addr = port;
1578*4882a593Smuzhiyun 
1579*4882a593Smuzhiyun 	/* MTU range: 68 - 2312 */
1580*4882a593Smuzhiyun 	dev->min_mtu = 68;
1581*4882a593Smuzhiyun 	dev->max_mtu = MAX_WIRELESS_BODY - ETH_FCS_LEN;
1582*4882a593Smuzhiyun 
1583*4882a593Smuzhiyun 	SET_NETDEV_DEV(dev, sys_dev);
1584*4882a593Smuzhiyun 
1585*4882a593Smuzhiyun 	if ((rc = request_irq(dev->irq, service_interrupt, IRQF_SHARED, dev->name, dev))) {
1586*4882a593Smuzhiyun 		printk(KERN_ERR "%s: register interrupt %d failed, rc %d\n", dev->name, irq, rc);
1587*4882a593Smuzhiyun 		goto err_out_free;
1588*4882a593Smuzhiyun 	}
1589*4882a593Smuzhiyun 
1590*4882a593Smuzhiyun 	if (!request_region(dev->base_addr, 32,
1591*4882a593Smuzhiyun 			    priv->bus_type == BUS_TYPE_PCCARD ?  "atmel_cs" : "atmel_pci")) {
1592*4882a593Smuzhiyun 		goto err_out_irq;
1593*4882a593Smuzhiyun 	}
1594*4882a593Smuzhiyun 
1595*4882a593Smuzhiyun 	if (register_netdev(dev))
1596*4882a593Smuzhiyun 		goto err_out_res;
1597*4882a593Smuzhiyun 
1598*4882a593Smuzhiyun 	if (!probe_atmel_card(dev)) {
1599*4882a593Smuzhiyun 		unregister_netdev(dev);
1600*4882a593Smuzhiyun 		goto err_out_res;
1601*4882a593Smuzhiyun 	}
1602*4882a593Smuzhiyun 
1603*4882a593Smuzhiyun 	netif_carrier_off(dev);
1604*4882a593Smuzhiyun 
1605*4882a593Smuzhiyun 	if (!proc_create_single_data("driver/atmel", 0, NULL, atmel_proc_show,
1606*4882a593Smuzhiyun 			priv))
1607*4882a593Smuzhiyun 		printk(KERN_WARNING "atmel: unable to create /proc entry.\n");
1608*4882a593Smuzhiyun 
1609*4882a593Smuzhiyun 	printk(KERN_INFO "%s: Atmel at76c50x. Version %d.%d. MAC %pM\n",
1610*4882a593Smuzhiyun 	       dev->name, DRIVER_MAJOR, DRIVER_MINOR, dev->dev_addr);
1611*4882a593Smuzhiyun 
1612*4882a593Smuzhiyun 	return dev;
1613*4882a593Smuzhiyun 
1614*4882a593Smuzhiyun err_out_res:
1615*4882a593Smuzhiyun 	release_region(dev->base_addr, 32);
1616*4882a593Smuzhiyun err_out_irq:
1617*4882a593Smuzhiyun 	free_irq(dev->irq, dev);
1618*4882a593Smuzhiyun err_out_free:
1619*4882a593Smuzhiyun 	free_netdev(dev);
1620*4882a593Smuzhiyun 	return NULL;
1621*4882a593Smuzhiyun }
1622*4882a593Smuzhiyun 
1623*4882a593Smuzhiyun EXPORT_SYMBOL(init_atmel_card);
1624*4882a593Smuzhiyun 
stop_atmel_card(struct net_device * dev)1625*4882a593Smuzhiyun void stop_atmel_card(struct net_device *dev)
1626*4882a593Smuzhiyun {
1627*4882a593Smuzhiyun 	struct atmel_private *priv = netdev_priv(dev);
1628*4882a593Smuzhiyun 
1629*4882a593Smuzhiyun 	/* put a brick on it... */
1630*4882a593Smuzhiyun 	if (priv->bus_type == BUS_TYPE_PCCARD)
1631*4882a593Smuzhiyun 		atmel_write16(dev, GCR, 0x0060);
1632*4882a593Smuzhiyun 	atmel_write16(dev, GCR, 0x0040);
1633*4882a593Smuzhiyun 
1634*4882a593Smuzhiyun 	del_timer_sync(&priv->management_timer);
1635*4882a593Smuzhiyun 	unregister_netdev(dev);
1636*4882a593Smuzhiyun 	remove_proc_entry("driver/atmel", NULL);
1637*4882a593Smuzhiyun 	free_irq(dev->irq, dev);
1638*4882a593Smuzhiyun 	kfree(priv->firmware);
1639*4882a593Smuzhiyun 	release_region(dev->base_addr, 32);
1640*4882a593Smuzhiyun 	free_netdev(dev);
1641*4882a593Smuzhiyun }
1642*4882a593Smuzhiyun 
1643*4882a593Smuzhiyun EXPORT_SYMBOL(stop_atmel_card);
1644*4882a593Smuzhiyun 
atmel_set_essid(struct net_device * dev,struct iw_request_info * info,struct iw_point * dwrq,char * extra)1645*4882a593Smuzhiyun static int atmel_set_essid(struct net_device *dev,
1646*4882a593Smuzhiyun 			   struct iw_request_info *info,
1647*4882a593Smuzhiyun 			   struct iw_point *dwrq,
1648*4882a593Smuzhiyun 			   char *extra)
1649*4882a593Smuzhiyun {
1650*4882a593Smuzhiyun 	struct atmel_private *priv = netdev_priv(dev);
1651*4882a593Smuzhiyun 
1652*4882a593Smuzhiyun 	/* Check if we asked for `any' */
1653*4882a593Smuzhiyun 	if (dwrq->flags == 0) {
1654*4882a593Smuzhiyun 		priv->connect_to_any_BSS = 1;
1655*4882a593Smuzhiyun 	} else {
1656*4882a593Smuzhiyun 		int index = (dwrq->flags & IW_ENCODE_INDEX) - 1;
1657*4882a593Smuzhiyun 
1658*4882a593Smuzhiyun 		priv->connect_to_any_BSS = 0;
1659*4882a593Smuzhiyun 
1660*4882a593Smuzhiyun 		/* Check the size of the string */
1661*4882a593Smuzhiyun 		if (dwrq->length > MAX_SSID_LENGTH)
1662*4882a593Smuzhiyun 			 return -E2BIG;
1663*4882a593Smuzhiyun 		if (index != 0)
1664*4882a593Smuzhiyun 			return -EINVAL;
1665*4882a593Smuzhiyun 
1666*4882a593Smuzhiyun 		memcpy(priv->new_SSID, extra, dwrq->length);
1667*4882a593Smuzhiyun 		priv->new_SSID_size = dwrq->length;
1668*4882a593Smuzhiyun 	}
1669*4882a593Smuzhiyun 
1670*4882a593Smuzhiyun 	return -EINPROGRESS;
1671*4882a593Smuzhiyun }
1672*4882a593Smuzhiyun 
atmel_get_essid(struct net_device * dev,struct iw_request_info * info,struct iw_point * dwrq,char * extra)1673*4882a593Smuzhiyun static int atmel_get_essid(struct net_device *dev,
1674*4882a593Smuzhiyun 			   struct iw_request_info *info,
1675*4882a593Smuzhiyun 			   struct iw_point *dwrq,
1676*4882a593Smuzhiyun 			   char *extra)
1677*4882a593Smuzhiyun {
1678*4882a593Smuzhiyun 	struct atmel_private *priv = netdev_priv(dev);
1679*4882a593Smuzhiyun 
1680*4882a593Smuzhiyun 	/* Get the current SSID */
1681*4882a593Smuzhiyun 	if (priv->new_SSID_size != 0) {
1682*4882a593Smuzhiyun 		memcpy(extra, priv->new_SSID, priv->new_SSID_size);
1683*4882a593Smuzhiyun 		dwrq->length = priv->new_SSID_size;
1684*4882a593Smuzhiyun 	} else {
1685*4882a593Smuzhiyun 		memcpy(extra, priv->SSID, priv->SSID_size);
1686*4882a593Smuzhiyun 		dwrq->length = priv->SSID_size;
1687*4882a593Smuzhiyun 	}
1688*4882a593Smuzhiyun 
1689*4882a593Smuzhiyun 	dwrq->flags = !priv->connect_to_any_BSS; /* active */
1690*4882a593Smuzhiyun 
1691*4882a593Smuzhiyun 	return 0;
1692*4882a593Smuzhiyun }
1693*4882a593Smuzhiyun 
atmel_get_wap(struct net_device * dev,struct iw_request_info * info,struct sockaddr * awrq,char * extra)1694*4882a593Smuzhiyun static int atmel_get_wap(struct net_device *dev,
1695*4882a593Smuzhiyun 			 struct iw_request_info *info,
1696*4882a593Smuzhiyun 			 struct sockaddr *awrq,
1697*4882a593Smuzhiyun 			 char *extra)
1698*4882a593Smuzhiyun {
1699*4882a593Smuzhiyun 	struct atmel_private *priv = netdev_priv(dev);
1700*4882a593Smuzhiyun 	memcpy(awrq->sa_data, priv->CurrentBSSID, ETH_ALEN);
1701*4882a593Smuzhiyun 	awrq->sa_family = ARPHRD_ETHER;
1702*4882a593Smuzhiyun 
1703*4882a593Smuzhiyun 	return 0;
1704*4882a593Smuzhiyun }
1705*4882a593Smuzhiyun 
atmel_set_encode(struct net_device * dev,struct iw_request_info * info,struct iw_point * dwrq,char * extra)1706*4882a593Smuzhiyun static int atmel_set_encode(struct net_device *dev,
1707*4882a593Smuzhiyun 			    struct iw_request_info *info,
1708*4882a593Smuzhiyun 			    struct iw_point *dwrq,
1709*4882a593Smuzhiyun 			    char *extra)
1710*4882a593Smuzhiyun {
1711*4882a593Smuzhiyun 	struct atmel_private *priv = netdev_priv(dev);
1712*4882a593Smuzhiyun 
1713*4882a593Smuzhiyun 	/* Basic checking: do we have a key to set ?
1714*4882a593Smuzhiyun 	 * Note : with the new API, it's impossible to get a NULL pointer.
1715*4882a593Smuzhiyun 	 * Therefore, we need to check a key size == 0 instead.
1716*4882a593Smuzhiyun 	 * New version of iwconfig properly set the IW_ENCODE_NOKEY flag
1717*4882a593Smuzhiyun 	 * when no key is present (only change flags), but older versions
1718*4882a593Smuzhiyun 	 * don't do it. - Jean II */
1719*4882a593Smuzhiyun 	if (dwrq->length > 0) {
1720*4882a593Smuzhiyun 		int index = (dwrq->flags & IW_ENCODE_INDEX) - 1;
1721*4882a593Smuzhiyun 		int current_index = priv->default_key;
1722*4882a593Smuzhiyun 		/* Check the size of the key */
1723*4882a593Smuzhiyun 		if (dwrq->length > 13) {
1724*4882a593Smuzhiyun 			return -EINVAL;
1725*4882a593Smuzhiyun 		}
1726*4882a593Smuzhiyun 		/* Check the index (none -> use current) */
1727*4882a593Smuzhiyun 		if (index < 0 || index >= 4)
1728*4882a593Smuzhiyun 			index = current_index;
1729*4882a593Smuzhiyun 		else
1730*4882a593Smuzhiyun 			priv->default_key = index;
1731*4882a593Smuzhiyun 		/* Set the length */
1732*4882a593Smuzhiyun 		if (dwrq->length > 5)
1733*4882a593Smuzhiyun 			priv->wep_key_len[index] = 13;
1734*4882a593Smuzhiyun 		else
1735*4882a593Smuzhiyun 			if (dwrq->length > 0)
1736*4882a593Smuzhiyun 				priv->wep_key_len[index] = 5;
1737*4882a593Smuzhiyun 			else
1738*4882a593Smuzhiyun 				/* Disable the key */
1739*4882a593Smuzhiyun 				priv->wep_key_len[index] = 0;
1740*4882a593Smuzhiyun 		/* Check if the key is not marked as invalid */
1741*4882a593Smuzhiyun 		if (!(dwrq->flags & IW_ENCODE_NOKEY)) {
1742*4882a593Smuzhiyun 			/* Cleanup */
1743*4882a593Smuzhiyun 			memset(priv->wep_keys[index], 0, 13);
1744*4882a593Smuzhiyun 			/* Copy the key in the driver */
1745*4882a593Smuzhiyun 			memcpy(priv->wep_keys[index], extra, dwrq->length);
1746*4882a593Smuzhiyun 		}
1747*4882a593Smuzhiyun 		/* WE specify that if a valid key is set, encryption
1748*4882a593Smuzhiyun 		 * should be enabled (user may turn it off later)
1749*4882a593Smuzhiyun 		 * This is also how "iwconfig ethX key on" works */
1750*4882a593Smuzhiyun 		if (index == current_index &&
1751*4882a593Smuzhiyun 		    priv->wep_key_len[index] > 0) {
1752*4882a593Smuzhiyun 			priv->wep_is_on = 1;
1753*4882a593Smuzhiyun 			priv->exclude_unencrypted = 1;
1754*4882a593Smuzhiyun 			if (priv->wep_key_len[index] > 5) {
1755*4882a593Smuzhiyun 				priv->pairwise_cipher_suite = CIPHER_SUITE_WEP_128;
1756*4882a593Smuzhiyun 				priv->encryption_level = 2;
1757*4882a593Smuzhiyun 			} else {
1758*4882a593Smuzhiyun 				priv->pairwise_cipher_suite = CIPHER_SUITE_WEP_64;
1759*4882a593Smuzhiyun 				priv->encryption_level = 1;
1760*4882a593Smuzhiyun 			}
1761*4882a593Smuzhiyun 		}
1762*4882a593Smuzhiyun 	} else {
1763*4882a593Smuzhiyun 		/* Do we want to just set the transmit key index ? */
1764*4882a593Smuzhiyun 		int index = (dwrq->flags & IW_ENCODE_INDEX) - 1;
1765*4882a593Smuzhiyun 		if (index >= 0 && index < 4) {
1766*4882a593Smuzhiyun 			priv->default_key = index;
1767*4882a593Smuzhiyun 		} else
1768*4882a593Smuzhiyun 			/* Don't complain if only change the mode */
1769*4882a593Smuzhiyun 			if (!(dwrq->flags & IW_ENCODE_MODE))
1770*4882a593Smuzhiyun 				return -EINVAL;
1771*4882a593Smuzhiyun 	}
1772*4882a593Smuzhiyun 	/* Read the flags */
1773*4882a593Smuzhiyun 	if (dwrq->flags & IW_ENCODE_DISABLED) {
1774*4882a593Smuzhiyun 		priv->wep_is_on = 0;
1775*4882a593Smuzhiyun 		priv->encryption_level = 0;
1776*4882a593Smuzhiyun 		priv->pairwise_cipher_suite = CIPHER_SUITE_NONE;
1777*4882a593Smuzhiyun 	} else {
1778*4882a593Smuzhiyun 		priv->wep_is_on = 1;
1779*4882a593Smuzhiyun 		if (priv->wep_key_len[priv->default_key] > 5) {
1780*4882a593Smuzhiyun 			priv->pairwise_cipher_suite = CIPHER_SUITE_WEP_128;
1781*4882a593Smuzhiyun 			priv->encryption_level = 2;
1782*4882a593Smuzhiyun 		} else {
1783*4882a593Smuzhiyun 			priv->pairwise_cipher_suite = CIPHER_SUITE_WEP_64;
1784*4882a593Smuzhiyun 			priv->encryption_level = 1;
1785*4882a593Smuzhiyun 		}
1786*4882a593Smuzhiyun 	}
1787*4882a593Smuzhiyun 	if (dwrq->flags & IW_ENCODE_RESTRICTED)
1788*4882a593Smuzhiyun 		priv->exclude_unencrypted = 1;
1789*4882a593Smuzhiyun 	if (dwrq->flags & IW_ENCODE_OPEN)
1790*4882a593Smuzhiyun 		priv->exclude_unencrypted = 0;
1791*4882a593Smuzhiyun 
1792*4882a593Smuzhiyun 	return -EINPROGRESS;		/* Call commit handler */
1793*4882a593Smuzhiyun }
1794*4882a593Smuzhiyun 
atmel_get_encode(struct net_device * dev,struct iw_request_info * info,struct iw_point * dwrq,char * extra)1795*4882a593Smuzhiyun static int atmel_get_encode(struct net_device *dev,
1796*4882a593Smuzhiyun 			    struct iw_request_info *info,
1797*4882a593Smuzhiyun 			    struct iw_point *dwrq,
1798*4882a593Smuzhiyun 			    char *extra)
1799*4882a593Smuzhiyun {
1800*4882a593Smuzhiyun 	struct atmel_private *priv = netdev_priv(dev);
1801*4882a593Smuzhiyun 	int index = (dwrq->flags & IW_ENCODE_INDEX) - 1;
1802*4882a593Smuzhiyun 
1803*4882a593Smuzhiyun 	if (!priv->wep_is_on)
1804*4882a593Smuzhiyun 		dwrq->flags = IW_ENCODE_DISABLED;
1805*4882a593Smuzhiyun 	else {
1806*4882a593Smuzhiyun 		if (priv->exclude_unencrypted)
1807*4882a593Smuzhiyun 			dwrq->flags = IW_ENCODE_RESTRICTED;
1808*4882a593Smuzhiyun 		else
1809*4882a593Smuzhiyun 			dwrq->flags = IW_ENCODE_OPEN;
1810*4882a593Smuzhiyun 	}
1811*4882a593Smuzhiyun 		/* Which key do we want ? -1 -> tx index */
1812*4882a593Smuzhiyun 	if (index < 0 || index >= 4)
1813*4882a593Smuzhiyun 		index = priv->default_key;
1814*4882a593Smuzhiyun 	dwrq->flags |= index + 1;
1815*4882a593Smuzhiyun 	/* Copy the key to the user buffer */
1816*4882a593Smuzhiyun 	dwrq->length = priv->wep_key_len[index];
1817*4882a593Smuzhiyun 	if (dwrq->length > 16) {
1818*4882a593Smuzhiyun 		dwrq->length = 0;
1819*4882a593Smuzhiyun 	} else {
1820*4882a593Smuzhiyun 		memset(extra, 0, 16);
1821*4882a593Smuzhiyun 		memcpy(extra, priv->wep_keys[index], dwrq->length);
1822*4882a593Smuzhiyun 	}
1823*4882a593Smuzhiyun 
1824*4882a593Smuzhiyun 	return 0;
1825*4882a593Smuzhiyun }
1826*4882a593Smuzhiyun 
atmel_set_encodeext(struct net_device * dev,struct iw_request_info * info,union iwreq_data * wrqu,char * extra)1827*4882a593Smuzhiyun static int atmel_set_encodeext(struct net_device *dev,
1828*4882a593Smuzhiyun 			    struct iw_request_info *info,
1829*4882a593Smuzhiyun 			    union iwreq_data *wrqu,
1830*4882a593Smuzhiyun 			    char *extra)
1831*4882a593Smuzhiyun {
1832*4882a593Smuzhiyun 	struct atmel_private *priv = netdev_priv(dev);
1833*4882a593Smuzhiyun 	struct iw_point *encoding = &wrqu->encoding;
1834*4882a593Smuzhiyun 	struct iw_encode_ext *ext = (struct iw_encode_ext *)extra;
1835*4882a593Smuzhiyun 	int idx, key_len, alg = ext->alg, set_key = 1;
1836*4882a593Smuzhiyun 
1837*4882a593Smuzhiyun 	/* Determine and validate the key index */
1838*4882a593Smuzhiyun 	idx = encoding->flags & IW_ENCODE_INDEX;
1839*4882a593Smuzhiyun 	if (idx) {
1840*4882a593Smuzhiyun 		if (idx < 1 || idx > 4)
1841*4882a593Smuzhiyun 			return -EINVAL;
1842*4882a593Smuzhiyun 		idx--;
1843*4882a593Smuzhiyun 	} else
1844*4882a593Smuzhiyun 		idx = priv->default_key;
1845*4882a593Smuzhiyun 
1846*4882a593Smuzhiyun 	if (encoding->flags & IW_ENCODE_DISABLED)
1847*4882a593Smuzhiyun 	    alg = IW_ENCODE_ALG_NONE;
1848*4882a593Smuzhiyun 
1849*4882a593Smuzhiyun 	if (ext->ext_flags & IW_ENCODE_EXT_SET_TX_KEY) {
1850*4882a593Smuzhiyun 		priv->default_key = idx;
1851*4882a593Smuzhiyun 		set_key = ext->key_len > 0 ? 1 : 0;
1852*4882a593Smuzhiyun 	}
1853*4882a593Smuzhiyun 
1854*4882a593Smuzhiyun 	if (set_key) {
1855*4882a593Smuzhiyun 		/* Set the requested key first */
1856*4882a593Smuzhiyun 		switch (alg) {
1857*4882a593Smuzhiyun 		case IW_ENCODE_ALG_NONE:
1858*4882a593Smuzhiyun 			priv->wep_is_on = 0;
1859*4882a593Smuzhiyun 			priv->encryption_level = 0;
1860*4882a593Smuzhiyun 			priv->pairwise_cipher_suite = CIPHER_SUITE_NONE;
1861*4882a593Smuzhiyun 			break;
1862*4882a593Smuzhiyun 		case IW_ENCODE_ALG_WEP:
1863*4882a593Smuzhiyun 			if (ext->key_len > 5) {
1864*4882a593Smuzhiyun 				priv->wep_key_len[idx] = 13;
1865*4882a593Smuzhiyun 				priv->pairwise_cipher_suite = CIPHER_SUITE_WEP_128;
1866*4882a593Smuzhiyun 				priv->encryption_level = 2;
1867*4882a593Smuzhiyun 			} else if (ext->key_len > 0) {
1868*4882a593Smuzhiyun 				priv->wep_key_len[idx] = 5;
1869*4882a593Smuzhiyun 				priv->pairwise_cipher_suite = CIPHER_SUITE_WEP_64;
1870*4882a593Smuzhiyun 				priv->encryption_level = 1;
1871*4882a593Smuzhiyun 			} else {
1872*4882a593Smuzhiyun 				return -EINVAL;
1873*4882a593Smuzhiyun 			}
1874*4882a593Smuzhiyun 			priv->wep_is_on = 1;
1875*4882a593Smuzhiyun 			memset(priv->wep_keys[idx], 0, 13);
1876*4882a593Smuzhiyun 			key_len = min ((int)ext->key_len, priv->wep_key_len[idx]);
1877*4882a593Smuzhiyun 			memcpy(priv->wep_keys[idx], ext->key, key_len);
1878*4882a593Smuzhiyun 			break;
1879*4882a593Smuzhiyun 		default:
1880*4882a593Smuzhiyun 			return -EINVAL;
1881*4882a593Smuzhiyun 		}
1882*4882a593Smuzhiyun 	}
1883*4882a593Smuzhiyun 
1884*4882a593Smuzhiyun 	return -EINPROGRESS;
1885*4882a593Smuzhiyun }
1886*4882a593Smuzhiyun 
atmel_get_encodeext(struct net_device * dev,struct iw_request_info * info,union iwreq_data * wrqu,char * extra)1887*4882a593Smuzhiyun static int atmel_get_encodeext(struct net_device *dev,
1888*4882a593Smuzhiyun 			    struct iw_request_info *info,
1889*4882a593Smuzhiyun 			    union iwreq_data *wrqu,
1890*4882a593Smuzhiyun 			    char *extra)
1891*4882a593Smuzhiyun {
1892*4882a593Smuzhiyun 	struct atmel_private *priv = netdev_priv(dev);
1893*4882a593Smuzhiyun 	struct iw_point *encoding = &wrqu->encoding;
1894*4882a593Smuzhiyun 	struct iw_encode_ext *ext = (struct iw_encode_ext *)extra;
1895*4882a593Smuzhiyun 	int idx, max_key_len;
1896*4882a593Smuzhiyun 
1897*4882a593Smuzhiyun 	max_key_len = encoding->length - sizeof(*ext);
1898*4882a593Smuzhiyun 	if (max_key_len < 0)
1899*4882a593Smuzhiyun 		return -EINVAL;
1900*4882a593Smuzhiyun 
1901*4882a593Smuzhiyun 	idx = encoding->flags & IW_ENCODE_INDEX;
1902*4882a593Smuzhiyun 	if (idx) {
1903*4882a593Smuzhiyun 		if (idx < 1 || idx > 4)
1904*4882a593Smuzhiyun 			return -EINVAL;
1905*4882a593Smuzhiyun 		idx--;
1906*4882a593Smuzhiyun 	} else
1907*4882a593Smuzhiyun 		idx = priv->default_key;
1908*4882a593Smuzhiyun 
1909*4882a593Smuzhiyun 	encoding->flags = idx + 1;
1910*4882a593Smuzhiyun 	memset(ext, 0, sizeof(*ext));
1911*4882a593Smuzhiyun 
1912*4882a593Smuzhiyun 	if (!priv->wep_is_on) {
1913*4882a593Smuzhiyun 		ext->alg = IW_ENCODE_ALG_NONE;
1914*4882a593Smuzhiyun 		ext->key_len = 0;
1915*4882a593Smuzhiyun 		encoding->flags |= IW_ENCODE_DISABLED;
1916*4882a593Smuzhiyun 	} else {
1917*4882a593Smuzhiyun 		if (priv->encryption_level > 0)
1918*4882a593Smuzhiyun 			ext->alg = IW_ENCODE_ALG_WEP;
1919*4882a593Smuzhiyun 		else
1920*4882a593Smuzhiyun 			return -EINVAL;
1921*4882a593Smuzhiyun 
1922*4882a593Smuzhiyun 		ext->key_len = priv->wep_key_len[idx];
1923*4882a593Smuzhiyun 		memcpy(ext->key, priv->wep_keys[idx], ext->key_len);
1924*4882a593Smuzhiyun 		encoding->flags |= IW_ENCODE_ENABLED;
1925*4882a593Smuzhiyun 	}
1926*4882a593Smuzhiyun 
1927*4882a593Smuzhiyun 	return 0;
1928*4882a593Smuzhiyun }
1929*4882a593Smuzhiyun 
atmel_set_auth(struct net_device * dev,struct iw_request_info * info,union iwreq_data * wrqu,char * extra)1930*4882a593Smuzhiyun static int atmel_set_auth(struct net_device *dev,
1931*4882a593Smuzhiyun 			       struct iw_request_info *info,
1932*4882a593Smuzhiyun 			       union iwreq_data *wrqu, char *extra)
1933*4882a593Smuzhiyun {
1934*4882a593Smuzhiyun 	struct atmel_private *priv = netdev_priv(dev);
1935*4882a593Smuzhiyun 	struct iw_param *param = &wrqu->param;
1936*4882a593Smuzhiyun 
1937*4882a593Smuzhiyun 	switch (param->flags & IW_AUTH_INDEX) {
1938*4882a593Smuzhiyun 	case IW_AUTH_WPA_VERSION:
1939*4882a593Smuzhiyun 	case IW_AUTH_CIPHER_PAIRWISE:
1940*4882a593Smuzhiyun 	case IW_AUTH_CIPHER_GROUP:
1941*4882a593Smuzhiyun 	case IW_AUTH_KEY_MGMT:
1942*4882a593Smuzhiyun 	case IW_AUTH_RX_UNENCRYPTED_EAPOL:
1943*4882a593Smuzhiyun 	case IW_AUTH_PRIVACY_INVOKED:
1944*4882a593Smuzhiyun 		/*
1945*4882a593Smuzhiyun 		 * atmel does not use these parameters
1946*4882a593Smuzhiyun 		 */
1947*4882a593Smuzhiyun 		break;
1948*4882a593Smuzhiyun 
1949*4882a593Smuzhiyun 	case IW_AUTH_DROP_UNENCRYPTED:
1950*4882a593Smuzhiyun 		priv->exclude_unencrypted = param->value ? 1 : 0;
1951*4882a593Smuzhiyun 		break;
1952*4882a593Smuzhiyun 
1953*4882a593Smuzhiyun 	case IW_AUTH_80211_AUTH_ALG: {
1954*4882a593Smuzhiyun 			if (param->value & IW_AUTH_ALG_SHARED_KEY) {
1955*4882a593Smuzhiyun 				priv->exclude_unencrypted = 1;
1956*4882a593Smuzhiyun 			} else if (param->value & IW_AUTH_ALG_OPEN_SYSTEM) {
1957*4882a593Smuzhiyun 				priv->exclude_unencrypted = 0;
1958*4882a593Smuzhiyun 			} else
1959*4882a593Smuzhiyun 				return -EINVAL;
1960*4882a593Smuzhiyun 			break;
1961*4882a593Smuzhiyun 		}
1962*4882a593Smuzhiyun 
1963*4882a593Smuzhiyun 	case IW_AUTH_WPA_ENABLED:
1964*4882a593Smuzhiyun 		/* Silently accept disable of WPA */
1965*4882a593Smuzhiyun 		if (param->value > 0)
1966*4882a593Smuzhiyun 			return -EOPNOTSUPP;
1967*4882a593Smuzhiyun 		break;
1968*4882a593Smuzhiyun 
1969*4882a593Smuzhiyun 	default:
1970*4882a593Smuzhiyun 		return -EOPNOTSUPP;
1971*4882a593Smuzhiyun 	}
1972*4882a593Smuzhiyun 	return -EINPROGRESS;
1973*4882a593Smuzhiyun }
1974*4882a593Smuzhiyun 
atmel_get_auth(struct net_device * dev,struct iw_request_info * info,union iwreq_data * wrqu,char * extra)1975*4882a593Smuzhiyun static int atmel_get_auth(struct net_device *dev,
1976*4882a593Smuzhiyun 			       struct iw_request_info *info,
1977*4882a593Smuzhiyun 			       union iwreq_data *wrqu, char *extra)
1978*4882a593Smuzhiyun {
1979*4882a593Smuzhiyun 	struct atmel_private *priv = netdev_priv(dev);
1980*4882a593Smuzhiyun 	struct iw_param *param = &wrqu->param;
1981*4882a593Smuzhiyun 
1982*4882a593Smuzhiyun 	switch (param->flags & IW_AUTH_INDEX) {
1983*4882a593Smuzhiyun 	case IW_AUTH_DROP_UNENCRYPTED:
1984*4882a593Smuzhiyun 		param->value = priv->exclude_unencrypted;
1985*4882a593Smuzhiyun 		break;
1986*4882a593Smuzhiyun 
1987*4882a593Smuzhiyun 	case IW_AUTH_80211_AUTH_ALG:
1988*4882a593Smuzhiyun 		if (priv->exclude_unencrypted == 1)
1989*4882a593Smuzhiyun 			param->value = IW_AUTH_ALG_SHARED_KEY;
1990*4882a593Smuzhiyun 		else
1991*4882a593Smuzhiyun 			param->value = IW_AUTH_ALG_OPEN_SYSTEM;
1992*4882a593Smuzhiyun 		break;
1993*4882a593Smuzhiyun 
1994*4882a593Smuzhiyun 	case IW_AUTH_WPA_ENABLED:
1995*4882a593Smuzhiyun 		param->value = 0;
1996*4882a593Smuzhiyun 		break;
1997*4882a593Smuzhiyun 
1998*4882a593Smuzhiyun 	default:
1999*4882a593Smuzhiyun 		return -EOPNOTSUPP;
2000*4882a593Smuzhiyun 	}
2001*4882a593Smuzhiyun 	return 0;
2002*4882a593Smuzhiyun }
2003*4882a593Smuzhiyun 
2004*4882a593Smuzhiyun 
atmel_get_name(struct net_device * dev,struct iw_request_info * info,char * cwrq,char * extra)2005*4882a593Smuzhiyun static int atmel_get_name(struct net_device *dev,
2006*4882a593Smuzhiyun 			  struct iw_request_info *info,
2007*4882a593Smuzhiyun 			  char *cwrq,
2008*4882a593Smuzhiyun 			  char *extra)
2009*4882a593Smuzhiyun {
2010*4882a593Smuzhiyun 	strcpy(cwrq, "IEEE 802.11-DS");
2011*4882a593Smuzhiyun 	return 0;
2012*4882a593Smuzhiyun }
2013*4882a593Smuzhiyun 
atmel_set_rate(struct net_device * dev,struct iw_request_info * info,struct iw_param * vwrq,char * extra)2014*4882a593Smuzhiyun static int atmel_set_rate(struct net_device *dev,
2015*4882a593Smuzhiyun 			  struct iw_request_info *info,
2016*4882a593Smuzhiyun 			  struct iw_param *vwrq,
2017*4882a593Smuzhiyun 			  char *extra)
2018*4882a593Smuzhiyun {
2019*4882a593Smuzhiyun 	struct atmel_private *priv = netdev_priv(dev);
2020*4882a593Smuzhiyun 
2021*4882a593Smuzhiyun 	if (vwrq->fixed == 0) {
2022*4882a593Smuzhiyun 		priv->tx_rate = 3;
2023*4882a593Smuzhiyun 		priv->auto_tx_rate = 1;
2024*4882a593Smuzhiyun 	} else {
2025*4882a593Smuzhiyun 		priv->auto_tx_rate = 0;
2026*4882a593Smuzhiyun 
2027*4882a593Smuzhiyun 		/* Which type of value ? */
2028*4882a593Smuzhiyun 		if ((vwrq->value < 4) && (vwrq->value >= 0)) {
2029*4882a593Smuzhiyun 			/* Setting by rate index */
2030*4882a593Smuzhiyun 			priv->tx_rate = vwrq->value;
2031*4882a593Smuzhiyun 		} else {
2032*4882a593Smuzhiyun 		/* Setting by frequency value */
2033*4882a593Smuzhiyun 			switch (vwrq->value) {
2034*4882a593Smuzhiyun 			case  1000000:
2035*4882a593Smuzhiyun 				priv->tx_rate = 0;
2036*4882a593Smuzhiyun 				break;
2037*4882a593Smuzhiyun 			case  2000000:
2038*4882a593Smuzhiyun 				priv->tx_rate = 1;
2039*4882a593Smuzhiyun 				break;
2040*4882a593Smuzhiyun 			case  5500000:
2041*4882a593Smuzhiyun 				priv->tx_rate = 2;
2042*4882a593Smuzhiyun 				break;
2043*4882a593Smuzhiyun 			case 11000000:
2044*4882a593Smuzhiyun 				priv->tx_rate = 3;
2045*4882a593Smuzhiyun 				break;
2046*4882a593Smuzhiyun 			default:
2047*4882a593Smuzhiyun 				return -EINVAL;
2048*4882a593Smuzhiyun 			}
2049*4882a593Smuzhiyun 		}
2050*4882a593Smuzhiyun 	}
2051*4882a593Smuzhiyun 
2052*4882a593Smuzhiyun 	return -EINPROGRESS;
2053*4882a593Smuzhiyun }
2054*4882a593Smuzhiyun 
atmel_set_mode(struct net_device * dev,struct iw_request_info * info,__u32 * uwrq,char * extra)2055*4882a593Smuzhiyun static int atmel_set_mode(struct net_device *dev,
2056*4882a593Smuzhiyun 			  struct iw_request_info *info,
2057*4882a593Smuzhiyun 			  __u32 *uwrq,
2058*4882a593Smuzhiyun 			  char *extra)
2059*4882a593Smuzhiyun {
2060*4882a593Smuzhiyun 	struct atmel_private *priv = netdev_priv(dev);
2061*4882a593Smuzhiyun 
2062*4882a593Smuzhiyun 	if (*uwrq != IW_MODE_ADHOC && *uwrq != IW_MODE_INFRA)
2063*4882a593Smuzhiyun 		return -EINVAL;
2064*4882a593Smuzhiyun 
2065*4882a593Smuzhiyun 	priv->operating_mode = *uwrq;
2066*4882a593Smuzhiyun 	return -EINPROGRESS;
2067*4882a593Smuzhiyun }
2068*4882a593Smuzhiyun 
atmel_get_mode(struct net_device * dev,struct iw_request_info * info,__u32 * uwrq,char * extra)2069*4882a593Smuzhiyun static int atmel_get_mode(struct net_device *dev,
2070*4882a593Smuzhiyun 			  struct iw_request_info *info,
2071*4882a593Smuzhiyun 			  __u32 *uwrq,
2072*4882a593Smuzhiyun 			  char *extra)
2073*4882a593Smuzhiyun {
2074*4882a593Smuzhiyun 	struct atmel_private *priv = netdev_priv(dev);
2075*4882a593Smuzhiyun 
2076*4882a593Smuzhiyun 	*uwrq = priv->operating_mode;
2077*4882a593Smuzhiyun 	return 0;
2078*4882a593Smuzhiyun }
2079*4882a593Smuzhiyun 
atmel_get_rate(struct net_device * dev,struct iw_request_info * info,struct iw_param * vwrq,char * extra)2080*4882a593Smuzhiyun static int atmel_get_rate(struct net_device *dev,
2081*4882a593Smuzhiyun 			 struct iw_request_info *info,
2082*4882a593Smuzhiyun 			 struct iw_param *vwrq,
2083*4882a593Smuzhiyun 			 char *extra)
2084*4882a593Smuzhiyun {
2085*4882a593Smuzhiyun 	struct atmel_private *priv = netdev_priv(dev);
2086*4882a593Smuzhiyun 
2087*4882a593Smuzhiyun 	if (priv->auto_tx_rate) {
2088*4882a593Smuzhiyun 		vwrq->fixed = 0;
2089*4882a593Smuzhiyun 		vwrq->value = 11000000;
2090*4882a593Smuzhiyun 	} else {
2091*4882a593Smuzhiyun 		vwrq->fixed = 1;
2092*4882a593Smuzhiyun 		switch (priv->tx_rate) {
2093*4882a593Smuzhiyun 		case 0:
2094*4882a593Smuzhiyun 			vwrq->value =  1000000;
2095*4882a593Smuzhiyun 			break;
2096*4882a593Smuzhiyun 		case 1:
2097*4882a593Smuzhiyun 			vwrq->value =  2000000;
2098*4882a593Smuzhiyun 			break;
2099*4882a593Smuzhiyun 		case 2:
2100*4882a593Smuzhiyun 			vwrq->value =  5500000;
2101*4882a593Smuzhiyun 			break;
2102*4882a593Smuzhiyun 		case 3:
2103*4882a593Smuzhiyun 			vwrq->value = 11000000;
2104*4882a593Smuzhiyun 			break;
2105*4882a593Smuzhiyun 		}
2106*4882a593Smuzhiyun 	}
2107*4882a593Smuzhiyun 	return 0;
2108*4882a593Smuzhiyun }
2109*4882a593Smuzhiyun 
atmel_set_power(struct net_device * dev,struct iw_request_info * info,struct iw_param * vwrq,char * extra)2110*4882a593Smuzhiyun static int atmel_set_power(struct net_device *dev,
2111*4882a593Smuzhiyun 			   struct iw_request_info *info,
2112*4882a593Smuzhiyun 			   struct iw_param *vwrq,
2113*4882a593Smuzhiyun 			   char *extra)
2114*4882a593Smuzhiyun {
2115*4882a593Smuzhiyun 	struct atmel_private *priv = netdev_priv(dev);
2116*4882a593Smuzhiyun 	priv->power_mode = vwrq->disabled ? 0 : 1;
2117*4882a593Smuzhiyun 	return -EINPROGRESS;
2118*4882a593Smuzhiyun }
2119*4882a593Smuzhiyun 
atmel_get_power(struct net_device * dev,struct iw_request_info * info,struct iw_param * vwrq,char * extra)2120*4882a593Smuzhiyun static int atmel_get_power(struct net_device *dev,
2121*4882a593Smuzhiyun 			   struct iw_request_info *info,
2122*4882a593Smuzhiyun 			   struct iw_param *vwrq,
2123*4882a593Smuzhiyun 			   char *extra)
2124*4882a593Smuzhiyun {
2125*4882a593Smuzhiyun 	struct atmel_private *priv = netdev_priv(dev);
2126*4882a593Smuzhiyun 	vwrq->disabled = priv->power_mode ? 0 : 1;
2127*4882a593Smuzhiyun 	vwrq->flags = IW_POWER_ON;
2128*4882a593Smuzhiyun 	return 0;
2129*4882a593Smuzhiyun }
2130*4882a593Smuzhiyun 
atmel_set_retry(struct net_device * dev,struct iw_request_info * info,struct iw_param * vwrq,char * extra)2131*4882a593Smuzhiyun static int atmel_set_retry(struct net_device *dev,
2132*4882a593Smuzhiyun 			   struct iw_request_info *info,
2133*4882a593Smuzhiyun 			   struct iw_param *vwrq,
2134*4882a593Smuzhiyun 			   char *extra)
2135*4882a593Smuzhiyun {
2136*4882a593Smuzhiyun 	struct atmel_private *priv = netdev_priv(dev);
2137*4882a593Smuzhiyun 
2138*4882a593Smuzhiyun 	if (!vwrq->disabled && (vwrq->flags & IW_RETRY_LIMIT)) {
2139*4882a593Smuzhiyun 		if (vwrq->flags & IW_RETRY_LONG)
2140*4882a593Smuzhiyun 			priv->long_retry = vwrq->value;
2141*4882a593Smuzhiyun 		else if (vwrq->flags & IW_RETRY_SHORT)
2142*4882a593Smuzhiyun 			priv->short_retry = vwrq->value;
2143*4882a593Smuzhiyun 		else {
2144*4882a593Smuzhiyun 			/* No modifier : set both */
2145*4882a593Smuzhiyun 			priv->long_retry = vwrq->value;
2146*4882a593Smuzhiyun 			priv->short_retry = vwrq->value;
2147*4882a593Smuzhiyun 		}
2148*4882a593Smuzhiyun 		return -EINPROGRESS;
2149*4882a593Smuzhiyun 	}
2150*4882a593Smuzhiyun 
2151*4882a593Smuzhiyun 	return -EINVAL;
2152*4882a593Smuzhiyun }
2153*4882a593Smuzhiyun 
atmel_get_retry(struct net_device * dev,struct iw_request_info * info,struct iw_param * vwrq,char * extra)2154*4882a593Smuzhiyun static int atmel_get_retry(struct net_device *dev,
2155*4882a593Smuzhiyun 			   struct iw_request_info *info,
2156*4882a593Smuzhiyun 			   struct iw_param *vwrq,
2157*4882a593Smuzhiyun 			   char *extra)
2158*4882a593Smuzhiyun {
2159*4882a593Smuzhiyun 	struct atmel_private *priv = netdev_priv(dev);
2160*4882a593Smuzhiyun 
2161*4882a593Smuzhiyun 	vwrq->disabled = 0;      /* Can't be disabled */
2162*4882a593Smuzhiyun 
2163*4882a593Smuzhiyun 	/* Note : by default, display the short retry number */
2164*4882a593Smuzhiyun 	if (vwrq->flags & IW_RETRY_LONG) {
2165*4882a593Smuzhiyun 		vwrq->flags = IW_RETRY_LIMIT | IW_RETRY_LONG;
2166*4882a593Smuzhiyun 		vwrq->value = priv->long_retry;
2167*4882a593Smuzhiyun 	} else {
2168*4882a593Smuzhiyun 		vwrq->flags = IW_RETRY_LIMIT;
2169*4882a593Smuzhiyun 		vwrq->value = priv->short_retry;
2170*4882a593Smuzhiyun 		if (priv->long_retry != priv->short_retry)
2171*4882a593Smuzhiyun 			vwrq->flags |= IW_RETRY_SHORT;
2172*4882a593Smuzhiyun 	}
2173*4882a593Smuzhiyun 
2174*4882a593Smuzhiyun 	return 0;
2175*4882a593Smuzhiyun }
2176*4882a593Smuzhiyun 
atmel_set_rts(struct net_device * dev,struct iw_request_info * info,struct iw_param * vwrq,char * extra)2177*4882a593Smuzhiyun static int atmel_set_rts(struct net_device *dev,
2178*4882a593Smuzhiyun 			 struct iw_request_info *info,
2179*4882a593Smuzhiyun 			 struct iw_param *vwrq,
2180*4882a593Smuzhiyun 			 char *extra)
2181*4882a593Smuzhiyun {
2182*4882a593Smuzhiyun 	struct atmel_private *priv = netdev_priv(dev);
2183*4882a593Smuzhiyun 	int rthr = vwrq->value;
2184*4882a593Smuzhiyun 
2185*4882a593Smuzhiyun 	if (vwrq->disabled)
2186*4882a593Smuzhiyun 		rthr = 2347;
2187*4882a593Smuzhiyun 	if ((rthr < 0) || (rthr > 2347)) {
2188*4882a593Smuzhiyun 		return -EINVAL;
2189*4882a593Smuzhiyun 	}
2190*4882a593Smuzhiyun 	priv->rts_threshold = rthr;
2191*4882a593Smuzhiyun 
2192*4882a593Smuzhiyun 	return -EINPROGRESS;		/* Call commit handler */
2193*4882a593Smuzhiyun }
2194*4882a593Smuzhiyun 
atmel_get_rts(struct net_device * dev,struct iw_request_info * info,struct iw_param * vwrq,char * extra)2195*4882a593Smuzhiyun static int atmel_get_rts(struct net_device *dev,
2196*4882a593Smuzhiyun 			 struct iw_request_info *info,
2197*4882a593Smuzhiyun 			 struct iw_param *vwrq,
2198*4882a593Smuzhiyun 			 char *extra)
2199*4882a593Smuzhiyun {
2200*4882a593Smuzhiyun 	struct atmel_private *priv = netdev_priv(dev);
2201*4882a593Smuzhiyun 
2202*4882a593Smuzhiyun 	vwrq->value = priv->rts_threshold;
2203*4882a593Smuzhiyun 	vwrq->disabled = (vwrq->value >= 2347);
2204*4882a593Smuzhiyun 	vwrq->fixed = 1;
2205*4882a593Smuzhiyun 
2206*4882a593Smuzhiyun 	return 0;
2207*4882a593Smuzhiyun }
2208*4882a593Smuzhiyun 
atmel_set_frag(struct net_device * dev,struct iw_request_info * info,struct iw_param * vwrq,char * extra)2209*4882a593Smuzhiyun static int atmel_set_frag(struct net_device *dev,
2210*4882a593Smuzhiyun 			  struct iw_request_info *info,
2211*4882a593Smuzhiyun 			  struct iw_param *vwrq,
2212*4882a593Smuzhiyun 			  char *extra)
2213*4882a593Smuzhiyun {
2214*4882a593Smuzhiyun 	struct atmel_private *priv = netdev_priv(dev);
2215*4882a593Smuzhiyun 	int fthr = vwrq->value;
2216*4882a593Smuzhiyun 
2217*4882a593Smuzhiyun 	if (vwrq->disabled)
2218*4882a593Smuzhiyun 		fthr = 2346;
2219*4882a593Smuzhiyun 	if ((fthr < 256) || (fthr > 2346)) {
2220*4882a593Smuzhiyun 		return -EINVAL;
2221*4882a593Smuzhiyun 	}
2222*4882a593Smuzhiyun 	fthr &= ~0x1;	/* Get an even value - is it really needed ??? */
2223*4882a593Smuzhiyun 	priv->frag_threshold = fthr;
2224*4882a593Smuzhiyun 
2225*4882a593Smuzhiyun 	return -EINPROGRESS;		/* Call commit handler */
2226*4882a593Smuzhiyun }
2227*4882a593Smuzhiyun 
atmel_get_frag(struct net_device * dev,struct iw_request_info * info,struct iw_param * vwrq,char * extra)2228*4882a593Smuzhiyun static int atmel_get_frag(struct net_device *dev,
2229*4882a593Smuzhiyun 			  struct iw_request_info *info,
2230*4882a593Smuzhiyun 			  struct iw_param *vwrq,
2231*4882a593Smuzhiyun 			  char *extra)
2232*4882a593Smuzhiyun {
2233*4882a593Smuzhiyun 	struct atmel_private *priv = netdev_priv(dev);
2234*4882a593Smuzhiyun 
2235*4882a593Smuzhiyun 	vwrq->value = priv->frag_threshold;
2236*4882a593Smuzhiyun 	vwrq->disabled = (vwrq->value >= 2346);
2237*4882a593Smuzhiyun 	vwrq->fixed = 1;
2238*4882a593Smuzhiyun 
2239*4882a593Smuzhiyun 	return 0;
2240*4882a593Smuzhiyun }
2241*4882a593Smuzhiyun 
atmel_set_freq(struct net_device * dev,struct iw_request_info * info,struct iw_freq * fwrq,char * extra)2242*4882a593Smuzhiyun static int atmel_set_freq(struct net_device *dev,
2243*4882a593Smuzhiyun 			  struct iw_request_info *info,
2244*4882a593Smuzhiyun 			  struct iw_freq *fwrq,
2245*4882a593Smuzhiyun 			  char *extra)
2246*4882a593Smuzhiyun {
2247*4882a593Smuzhiyun 	struct atmel_private *priv = netdev_priv(dev);
2248*4882a593Smuzhiyun 	int rc = -EINPROGRESS;		/* Call commit handler */
2249*4882a593Smuzhiyun 
2250*4882a593Smuzhiyun 	/* If setting by frequency, convert to a channel */
2251*4882a593Smuzhiyun 	if (fwrq->e == 1) {
2252*4882a593Smuzhiyun 		int f = fwrq->m / 100000;
2253*4882a593Smuzhiyun 
2254*4882a593Smuzhiyun 		/* Hack to fall through... */
2255*4882a593Smuzhiyun 		fwrq->e = 0;
2256*4882a593Smuzhiyun 		fwrq->m = ieee80211_frequency_to_channel(f);
2257*4882a593Smuzhiyun 	}
2258*4882a593Smuzhiyun 	/* Setting by channel number */
2259*4882a593Smuzhiyun 	if (fwrq->m < 0 || fwrq->m > 1000 || fwrq->e > 0)
2260*4882a593Smuzhiyun 		rc = -EOPNOTSUPP;
2261*4882a593Smuzhiyun 	else {
2262*4882a593Smuzhiyun 		int channel = fwrq->m;
2263*4882a593Smuzhiyun 		if (atmel_validate_channel(priv, channel) == 0) {
2264*4882a593Smuzhiyun 			priv->channel = channel;
2265*4882a593Smuzhiyun 		} else {
2266*4882a593Smuzhiyun 			rc = -EINVAL;
2267*4882a593Smuzhiyun 		}
2268*4882a593Smuzhiyun 	}
2269*4882a593Smuzhiyun 	return rc;
2270*4882a593Smuzhiyun }
2271*4882a593Smuzhiyun 
atmel_get_freq(struct net_device * dev,struct iw_request_info * info,struct iw_freq * fwrq,char * extra)2272*4882a593Smuzhiyun static int atmel_get_freq(struct net_device *dev,
2273*4882a593Smuzhiyun 			  struct iw_request_info *info,
2274*4882a593Smuzhiyun 			  struct iw_freq *fwrq,
2275*4882a593Smuzhiyun 			  char *extra)
2276*4882a593Smuzhiyun {
2277*4882a593Smuzhiyun 	struct atmel_private *priv = netdev_priv(dev);
2278*4882a593Smuzhiyun 
2279*4882a593Smuzhiyun 	fwrq->m = priv->channel;
2280*4882a593Smuzhiyun 	fwrq->e = 0;
2281*4882a593Smuzhiyun 	return 0;
2282*4882a593Smuzhiyun }
2283*4882a593Smuzhiyun 
atmel_set_scan(struct net_device * dev,struct iw_request_info * info,struct iw_point * dwrq,char * extra)2284*4882a593Smuzhiyun static int atmel_set_scan(struct net_device *dev,
2285*4882a593Smuzhiyun 			  struct iw_request_info *info,
2286*4882a593Smuzhiyun 			  struct iw_point *dwrq,
2287*4882a593Smuzhiyun 			  char *extra)
2288*4882a593Smuzhiyun {
2289*4882a593Smuzhiyun 	struct atmel_private *priv = netdev_priv(dev);
2290*4882a593Smuzhiyun 	unsigned long flags;
2291*4882a593Smuzhiyun 
2292*4882a593Smuzhiyun 	/* Note : you may have realised that, as this is a SET operation,
2293*4882a593Smuzhiyun 	 * this is privileged and therefore a normal user can't
2294*4882a593Smuzhiyun 	 * perform scanning.
2295*4882a593Smuzhiyun 	 * This is not an error, while the device perform scanning,
2296*4882a593Smuzhiyun 	 * traffic doesn't flow, so it's a perfect DoS...
2297*4882a593Smuzhiyun 	 * Jean II */
2298*4882a593Smuzhiyun 
2299*4882a593Smuzhiyun 	if (priv->station_state == STATION_STATE_DOWN)
2300*4882a593Smuzhiyun 		return -EAGAIN;
2301*4882a593Smuzhiyun 
2302*4882a593Smuzhiyun 	/* Timeout old surveys. */
2303*4882a593Smuzhiyun 	if (time_after(jiffies, priv->last_survey + 20 * HZ))
2304*4882a593Smuzhiyun 		priv->site_survey_state = SITE_SURVEY_IDLE;
2305*4882a593Smuzhiyun 	priv->last_survey = jiffies;
2306*4882a593Smuzhiyun 
2307*4882a593Smuzhiyun 	/* Initiate a scan command */
2308*4882a593Smuzhiyun 	if (priv->site_survey_state == SITE_SURVEY_IN_PROGRESS)
2309*4882a593Smuzhiyun 		return -EBUSY;
2310*4882a593Smuzhiyun 
2311*4882a593Smuzhiyun 	del_timer_sync(&priv->management_timer);
2312*4882a593Smuzhiyun 	spin_lock_irqsave(&priv->irqlock, flags);
2313*4882a593Smuzhiyun 
2314*4882a593Smuzhiyun 	priv->site_survey_state = SITE_SURVEY_IN_PROGRESS;
2315*4882a593Smuzhiyun 	priv->fast_scan = 0;
2316*4882a593Smuzhiyun 	atmel_scan(priv, 0);
2317*4882a593Smuzhiyun 	spin_unlock_irqrestore(&priv->irqlock, flags);
2318*4882a593Smuzhiyun 
2319*4882a593Smuzhiyun 	return 0;
2320*4882a593Smuzhiyun }
2321*4882a593Smuzhiyun 
atmel_get_scan(struct net_device * dev,struct iw_request_info * info,struct iw_point * dwrq,char * extra)2322*4882a593Smuzhiyun static int atmel_get_scan(struct net_device *dev,
2323*4882a593Smuzhiyun 			  struct iw_request_info *info,
2324*4882a593Smuzhiyun 			  struct iw_point *dwrq,
2325*4882a593Smuzhiyun 			  char *extra)
2326*4882a593Smuzhiyun {
2327*4882a593Smuzhiyun 	struct atmel_private *priv = netdev_priv(dev);
2328*4882a593Smuzhiyun 	int i;
2329*4882a593Smuzhiyun 	char *current_ev = extra;
2330*4882a593Smuzhiyun 	struct iw_event	iwe;
2331*4882a593Smuzhiyun 
2332*4882a593Smuzhiyun 	if (priv->site_survey_state != SITE_SURVEY_COMPLETED)
2333*4882a593Smuzhiyun 		return -EAGAIN;
2334*4882a593Smuzhiyun 
2335*4882a593Smuzhiyun 	for (i = 0; i < priv->BSS_list_entries; i++) {
2336*4882a593Smuzhiyun 		iwe.cmd = SIOCGIWAP;
2337*4882a593Smuzhiyun 		iwe.u.ap_addr.sa_family = ARPHRD_ETHER;
2338*4882a593Smuzhiyun 		memcpy(iwe.u.ap_addr.sa_data, priv->BSSinfo[i].BSSID, ETH_ALEN);
2339*4882a593Smuzhiyun 		current_ev = iwe_stream_add_event(info, current_ev,
2340*4882a593Smuzhiyun 						  extra + IW_SCAN_MAX_DATA,
2341*4882a593Smuzhiyun 						  &iwe, IW_EV_ADDR_LEN);
2342*4882a593Smuzhiyun 
2343*4882a593Smuzhiyun 		iwe.u.data.length =  priv->BSSinfo[i].SSIDsize;
2344*4882a593Smuzhiyun 		if (iwe.u.data.length > 32)
2345*4882a593Smuzhiyun 			iwe.u.data.length = 32;
2346*4882a593Smuzhiyun 		iwe.cmd = SIOCGIWESSID;
2347*4882a593Smuzhiyun 		iwe.u.data.flags = 1;
2348*4882a593Smuzhiyun 		current_ev = iwe_stream_add_point(info, current_ev,
2349*4882a593Smuzhiyun 						  extra + IW_SCAN_MAX_DATA,
2350*4882a593Smuzhiyun 						  &iwe, priv->BSSinfo[i].SSID);
2351*4882a593Smuzhiyun 
2352*4882a593Smuzhiyun 		iwe.cmd = SIOCGIWMODE;
2353*4882a593Smuzhiyun 		iwe.u.mode = priv->BSSinfo[i].BSStype;
2354*4882a593Smuzhiyun 		current_ev = iwe_stream_add_event(info, current_ev,
2355*4882a593Smuzhiyun 						  extra + IW_SCAN_MAX_DATA,
2356*4882a593Smuzhiyun 						  &iwe, IW_EV_UINT_LEN);
2357*4882a593Smuzhiyun 
2358*4882a593Smuzhiyun 		iwe.cmd = SIOCGIWFREQ;
2359*4882a593Smuzhiyun 		iwe.u.freq.m = priv->BSSinfo[i].channel;
2360*4882a593Smuzhiyun 		iwe.u.freq.e = 0;
2361*4882a593Smuzhiyun 		current_ev = iwe_stream_add_event(info, current_ev,
2362*4882a593Smuzhiyun 						  extra + IW_SCAN_MAX_DATA,
2363*4882a593Smuzhiyun 						  &iwe, IW_EV_FREQ_LEN);
2364*4882a593Smuzhiyun 
2365*4882a593Smuzhiyun 		/* Add quality statistics */
2366*4882a593Smuzhiyun 		iwe.cmd = IWEVQUAL;
2367*4882a593Smuzhiyun 		iwe.u.qual.level = priv->BSSinfo[i].RSSI;
2368*4882a593Smuzhiyun 		iwe.u.qual.qual  = iwe.u.qual.level;
2369*4882a593Smuzhiyun 		/* iwe.u.qual.noise  = SOMETHING */
2370*4882a593Smuzhiyun 		current_ev = iwe_stream_add_event(info, current_ev,
2371*4882a593Smuzhiyun 						  extra + IW_SCAN_MAX_DATA,
2372*4882a593Smuzhiyun 						  &iwe, IW_EV_QUAL_LEN);
2373*4882a593Smuzhiyun 
2374*4882a593Smuzhiyun 
2375*4882a593Smuzhiyun 		iwe.cmd = SIOCGIWENCODE;
2376*4882a593Smuzhiyun 		if (priv->BSSinfo[i].UsingWEP)
2377*4882a593Smuzhiyun 			iwe.u.data.flags = IW_ENCODE_ENABLED | IW_ENCODE_NOKEY;
2378*4882a593Smuzhiyun 		else
2379*4882a593Smuzhiyun 			iwe.u.data.flags = IW_ENCODE_DISABLED;
2380*4882a593Smuzhiyun 		iwe.u.data.length = 0;
2381*4882a593Smuzhiyun 		current_ev = iwe_stream_add_point(info, current_ev,
2382*4882a593Smuzhiyun 						  extra + IW_SCAN_MAX_DATA,
2383*4882a593Smuzhiyun 						  &iwe, NULL);
2384*4882a593Smuzhiyun 	}
2385*4882a593Smuzhiyun 
2386*4882a593Smuzhiyun 	/* Length of data */
2387*4882a593Smuzhiyun 	dwrq->length = (current_ev - extra);
2388*4882a593Smuzhiyun 	dwrq->flags = 0;
2389*4882a593Smuzhiyun 
2390*4882a593Smuzhiyun 	return 0;
2391*4882a593Smuzhiyun }
2392*4882a593Smuzhiyun 
atmel_get_range(struct net_device * dev,struct iw_request_info * info,struct iw_point * dwrq,char * extra)2393*4882a593Smuzhiyun static int atmel_get_range(struct net_device *dev,
2394*4882a593Smuzhiyun 			   struct iw_request_info *info,
2395*4882a593Smuzhiyun 			   struct iw_point *dwrq,
2396*4882a593Smuzhiyun 			   char *extra)
2397*4882a593Smuzhiyun {
2398*4882a593Smuzhiyun 	struct atmel_private *priv = netdev_priv(dev);
2399*4882a593Smuzhiyun 	struct iw_range *range = (struct iw_range *) extra;
2400*4882a593Smuzhiyun 	int k, i, j;
2401*4882a593Smuzhiyun 
2402*4882a593Smuzhiyun 	dwrq->length = sizeof(struct iw_range);
2403*4882a593Smuzhiyun 	memset(range, 0, sizeof(struct iw_range));
2404*4882a593Smuzhiyun 	range->min_nwid = 0x0000;
2405*4882a593Smuzhiyun 	range->max_nwid = 0x0000;
2406*4882a593Smuzhiyun 	range->num_channels = 0;
2407*4882a593Smuzhiyun 	for (j = 0; j < ARRAY_SIZE(channel_table); j++)
2408*4882a593Smuzhiyun 		if (priv->reg_domain == channel_table[j].reg_domain) {
2409*4882a593Smuzhiyun 			range->num_channels = channel_table[j].max - channel_table[j].min + 1;
2410*4882a593Smuzhiyun 			break;
2411*4882a593Smuzhiyun 		}
2412*4882a593Smuzhiyun 	if (range->num_channels != 0) {
2413*4882a593Smuzhiyun 		for (k = 0, i = channel_table[j].min; i <= channel_table[j].max; i++) {
2414*4882a593Smuzhiyun 			range->freq[k].i = i; /* List index */
2415*4882a593Smuzhiyun 
2416*4882a593Smuzhiyun 			/* Values in MHz -> * 10^5 * 10 */
2417*4882a593Smuzhiyun 			range->freq[k].m = 100000 *
2418*4882a593Smuzhiyun 			 ieee80211_channel_to_frequency(i, NL80211_BAND_2GHZ);
2419*4882a593Smuzhiyun 			range->freq[k++].e = 1;
2420*4882a593Smuzhiyun 		}
2421*4882a593Smuzhiyun 		range->num_frequency = k;
2422*4882a593Smuzhiyun 	}
2423*4882a593Smuzhiyun 
2424*4882a593Smuzhiyun 	range->max_qual.qual = 100;
2425*4882a593Smuzhiyun 	range->max_qual.level = 100;
2426*4882a593Smuzhiyun 	range->max_qual.noise = 0;
2427*4882a593Smuzhiyun 	range->max_qual.updated = IW_QUAL_NOISE_INVALID;
2428*4882a593Smuzhiyun 
2429*4882a593Smuzhiyun 	range->avg_qual.qual = 50;
2430*4882a593Smuzhiyun 	range->avg_qual.level = 50;
2431*4882a593Smuzhiyun 	range->avg_qual.noise = 0;
2432*4882a593Smuzhiyun 	range->avg_qual.updated = IW_QUAL_NOISE_INVALID;
2433*4882a593Smuzhiyun 
2434*4882a593Smuzhiyun 	range->sensitivity = 0;
2435*4882a593Smuzhiyun 
2436*4882a593Smuzhiyun 	range->bitrate[0] =  1000000;
2437*4882a593Smuzhiyun 	range->bitrate[1] =  2000000;
2438*4882a593Smuzhiyun 	range->bitrate[2] =  5500000;
2439*4882a593Smuzhiyun 	range->bitrate[3] = 11000000;
2440*4882a593Smuzhiyun 	range->num_bitrates = 4;
2441*4882a593Smuzhiyun 
2442*4882a593Smuzhiyun 	range->min_rts = 0;
2443*4882a593Smuzhiyun 	range->max_rts = 2347;
2444*4882a593Smuzhiyun 	range->min_frag = 256;
2445*4882a593Smuzhiyun 	range->max_frag = 2346;
2446*4882a593Smuzhiyun 
2447*4882a593Smuzhiyun 	range->encoding_size[0] = 5;
2448*4882a593Smuzhiyun 	range->encoding_size[1] = 13;
2449*4882a593Smuzhiyun 	range->num_encoding_sizes = 2;
2450*4882a593Smuzhiyun 	range->max_encoding_tokens = 4;
2451*4882a593Smuzhiyun 
2452*4882a593Smuzhiyun 	range->pmp_flags = IW_POWER_ON;
2453*4882a593Smuzhiyun 	range->pmt_flags = IW_POWER_ON;
2454*4882a593Smuzhiyun 	range->pm_capa = 0;
2455*4882a593Smuzhiyun 
2456*4882a593Smuzhiyun 	range->we_version_source = WIRELESS_EXT;
2457*4882a593Smuzhiyun 	range->we_version_compiled = WIRELESS_EXT;
2458*4882a593Smuzhiyun 	range->retry_capa = IW_RETRY_LIMIT ;
2459*4882a593Smuzhiyun 	range->retry_flags = IW_RETRY_LIMIT;
2460*4882a593Smuzhiyun 	range->r_time_flags = 0;
2461*4882a593Smuzhiyun 	range->min_retry = 1;
2462*4882a593Smuzhiyun 	range->max_retry = 65535;
2463*4882a593Smuzhiyun 
2464*4882a593Smuzhiyun 	return 0;
2465*4882a593Smuzhiyun }
2466*4882a593Smuzhiyun 
atmel_set_wap(struct net_device * dev,struct iw_request_info * info,struct sockaddr * awrq,char * extra)2467*4882a593Smuzhiyun static int atmel_set_wap(struct net_device *dev,
2468*4882a593Smuzhiyun 			 struct iw_request_info *info,
2469*4882a593Smuzhiyun 			 struct sockaddr *awrq,
2470*4882a593Smuzhiyun 			 char *extra)
2471*4882a593Smuzhiyun {
2472*4882a593Smuzhiyun 	struct atmel_private *priv = netdev_priv(dev);
2473*4882a593Smuzhiyun 	int i;
2474*4882a593Smuzhiyun 	static const u8 any[] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
2475*4882a593Smuzhiyun 	static const u8 off[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
2476*4882a593Smuzhiyun 	unsigned long flags;
2477*4882a593Smuzhiyun 
2478*4882a593Smuzhiyun 	if (awrq->sa_family != ARPHRD_ETHER)
2479*4882a593Smuzhiyun 		return -EINVAL;
2480*4882a593Smuzhiyun 
2481*4882a593Smuzhiyun 	if (!memcmp(any, awrq->sa_data, 6) ||
2482*4882a593Smuzhiyun 	    !memcmp(off, awrq->sa_data, 6)) {
2483*4882a593Smuzhiyun 		del_timer_sync(&priv->management_timer);
2484*4882a593Smuzhiyun 		spin_lock_irqsave(&priv->irqlock, flags);
2485*4882a593Smuzhiyun 		atmel_scan(priv, 1);
2486*4882a593Smuzhiyun 		spin_unlock_irqrestore(&priv->irqlock, flags);
2487*4882a593Smuzhiyun 		return 0;
2488*4882a593Smuzhiyun 	}
2489*4882a593Smuzhiyun 
2490*4882a593Smuzhiyun 	for (i = 0; i < priv->BSS_list_entries; i++) {
2491*4882a593Smuzhiyun 		if (memcmp(priv->BSSinfo[i].BSSID, awrq->sa_data, 6) == 0) {
2492*4882a593Smuzhiyun 			if (!priv->wep_is_on && priv->BSSinfo[i].UsingWEP) {
2493*4882a593Smuzhiyun 				return -EINVAL;
2494*4882a593Smuzhiyun 			} else if  (priv->wep_is_on && !priv->BSSinfo[i].UsingWEP) {
2495*4882a593Smuzhiyun 				return -EINVAL;
2496*4882a593Smuzhiyun 			} else {
2497*4882a593Smuzhiyun 				del_timer_sync(&priv->management_timer);
2498*4882a593Smuzhiyun 				spin_lock_irqsave(&priv->irqlock, flags);
2499*4882a593Smuzhiyun 				atmel_join_bss(priv, i);
2500*4882a593Smuzhiyun 				spin_unlock_irqrestore(&priv->irqlock, flags);
2501*4882a593Smuzhiyun 				return 0;
2502*4882a593Smuzhiyun 			}
2503*4882a593Smuzhiyun 		}
2504*4882a593Smuzhiyun 	}
2505*4882a593Smuzhiyun 
2506*4882a593Smuzhiyun 	return -EINVAL;
2507*4882a593Smuzhiyun }
2508*4882a593Smuzhiyun 
atmel_config_commit(struct net_device * dev,struct iw_request_info * info,void * zwrq,char * extra)2509*4882a593Smuzhiyun static int atmel_config_commit(struct net_device *dev,
2510*4882a593Smuzhiyun 			       struct iw_request_info *info,	/* NULL */
2511*4882a593Smuzhiyun 			       void *zwrq,			/* NULL */
2512*4882a593Smuzhiyun 			       char *extra)			/* NULL */
2513*4882a593Smuzhiyun {
2514*4882a593Smuzhiyun 	return atmel_open(dev);
2515*4882a593Smuzhiyun }
2516*4882a593Smuzhiyun 
2517*4882a593Smuzhiyun static const iw_handler atmel_handler[] =
2518*4882a593Smuzhiyun {
2519*4882a593Smuzhiyun 	(iw_handler) atmel_config_commit,	/* SIOCSIWCOMMIT */
2520*4882a593Smuzhiyun 	(iw_handler) atmel_get_name,		/* SIOCGIWNAME */
2521*4882a593Smuzhiyun 	(iw_handler) NULL,			/* SIOCSIWNWID */
2522*4882a593Smuzhiyun 	(iw_handler) NULL,			/* SIOCGIWNWID */
2523*4882a593Smuzhiyun 	(iw_handler) atmel_set_freq,		/* SIOCSIWFREQ */
2524*4882a593Smuzhiyun 	(iw_handler) atmel_get_freq,		/* SIOCGIWFREQ */
2525*4882a593Smuzhiyun 	(iw_handler) atmel_set_mode,		/* SIOCSIWMODE */
2526*4882a593Smuzhiyun 	(iw_handler) atmel_get_mode,		/* SIOCGIWMODE */
2527*4882a593Smuzhiyun 	(iw_handler) NULL,			/* SIOCSIWSENS */
2528*4882a593Smuzhiyun 	(iw_handler) NULL,			/* SIOCGIWSENS */
2529*4882a593Smuzhiyun 	(iw_handler) NULL,			/* SIOCSIWRANGE */
2530*4882a593Smuzhiyun 	(iw_handler) atmel_get_range,           /* SIOCGIWRANGE */
2531*4882a593Smuzhiyun 	(iw_handler) NULL,			/* SIOCSIWPRIV */
2532*4882a593Smuzhiyun 	(iw_handler) NULL,			/* SIOCGIWPRIV */
2533*4882a593Smuzhiyun 	(iw_handler) NULL,			/* SIOCSIWSTATS */
2534*4882a593Smuzhiyun 	(iw_handler) NULL,			/* SIOCGIWSTATS */
2535*4882a593Smuzhiyun 	(iw_handler) NULL,			/* SIOCSIWSPY */
2536*4882a593Smuzhiyun 	(iw_handler) NULL,			/* SIOCGIWSPY */
2537*4882a593Smuzhiyun 	(iw_handler) NULL,			/* -- hole -- */
2538*4882a593Smuzhiyun 	(iw_handler) NULL,			/* -- hole -- */
2539*4882a593Smuzhiyun 	(iw_handler) atmel_set_wap,		/* SIOCSIWAP */
2540*4882a593Smuzhiyun 	(iw_handler) atmel_get_wap,		/* SIOCGIWAP */
2541*4882a593Smuzhiyun 	(iw_handler) NULL,			/* -- hole -- */
2542*4882a593Smuzhiyun 	(iw_handler) NULL,			/* SIOCGIWAPLIST */
2543*4882a593Smuzhiyun 	(iw_handler) atmel_set_scan,		/* SIOCSIWSCAN */
2544*4882a593Smuzhiyun 	(iw_handler) atmel_get_scan,		/* SIOCGIWSCAN */
2545*4882a593Smuzhiyun 	(iw_handler) atmel_set_essid,		/* SIOCSIWESSID */
2546*4882a593Smuzhiyun 	(iw_handler) atmel_get_essid,		/* SIOCGIWESSID */
2547*4882a593Smuzhiyun 	(iw_handler) NULL,			/* SIOCSIWNICKN */
2548*4882a593Smuzhiyun 	(iw_handler) NULL,			/* SIOCGIWNICKN */
2549*4882a593Smuzhiyun 	(iw_handler) NULL,			/* -- hole -- */
2550*4882a593Smuzhiyun 	(iw_handler) NULL,			/* -- hole -- */
2551*4882a593Smuzhiyun 	(iw_handler) atmel_set_rate,		/* SIOCSIWRATE */
2552*4882a593Smuzhiyun 	(iw_handler) atmel_get_rate,		/* SIOCGIWRATE */
2553*4882a593Smuzhiyun 	(iw_handler) atmel_set_rts,		/* SIOCSIWRTS */
2554*4882a593Smuzhiyun 	(iw_handler) atmel_get_rts,		/* SIOCGIWRTS */
2555*4882a593Smuzhiyun 	(iw_handler) atmel_set_frag,		/* SIOCSIWFRAG */
2556*4882a593Smuzhiyun 	(iw_handler) atmel_get_frag,		/* SIOCGIWFRAG */
2557*4882a593Smuzhiyun 	(iw_handler) NULL,			/* SIOCSIWTXPOW */
2558*4882a593Smuzhiyun 	(iw_handler) NULL,			/* SIOCGIWTXPOW */
2559*4882a593Smuzhiyun 	(iw_handler) atmel_set_retry,		/* SIOCSIWRETRY */
2560*4882a593Smuzhiyun 	(iw_handler) atmel_get_retry,		/* SIOCGIWRETRY */
2561*4882a593Smuzhiyun 	(iw_handler) atmel_set_encode,		/* SIOCSIWENCODE */
2562*4882a593Smuzhiyun 	(iw_handler) atmel_get_encode,		/* SIOCGIWENCODE */
2563*4882a593Smuzhiyun 	(iw_handler) atmel_set_power,		/* SIOCSIWPOWER */
2564*4882a593Smuzhiyun 	(iw_handler) atmel_get_power,		/* SIOCGIWPOWER */
2565*4882a593Smuzhiyun 	(iw_handler) NULL,			/* -- hole -- */
2566*4882a593Smuzhiyun 	(iw_handler) NULL,			/* -- hole -- */
2567*4882a593Smuzhiyun 	(iw_handler) NULL,			/* SIOCSIWGENIE */
2568*4882a593Smuzhiyun 	(iw_handler) NULL,			/* SIOCGIWGENIE */
2569*4882a593Smuzhiyun 	(iw_handler) atmel_set_auth,		/* SIOCSIWAUTH */
2570*4882a593Smuzhiyun 	(iw_handler) atmel_get_auth,		/* SIOCGIWAUTH */
2571*4882a593Smuzhiyun 	(iw_handler) atmel_set_encodeext,	/* SIOCSIWENCODEEXT */
2572*4882a593Smuzhiyun 	(iw_handler) atmel_get_encodeext,	/* SIOCGIWENCODEEXT */
2573*4882a593Smuzhiyun 	(iw_handler) NULL,			/* SIOCSIWPMKSA */
2574*4882a593Smuzhiyun };
2575*4882a593Smuzhiyun 
2576*4882a593Smuzhiyun static const iw_handler atmel_private_handler[] =
2577*4882a593Smuzhiyun {
2578*4882a593Smuzhiyun 	NULL,				/* SIOCIWFIRSTPRIV */
2579*4882a593Smuzhiyun };
2580*4882a593Smuzhiyun 
2581*4882a593Smuzhiyun struct atmel_priv_ioctl {
2582*4882a593Smuzhiyun 	char id[32];
2583*4882a593Smuzhiyun 	unsigned char __user *data;
2584*4882a593Smuzhiyun 	unsigned short len;
2585*4882a593Smuzhiyun };
2586*4882a593Smuzhiyun 
2587*4882a593Smuzhiyun #define ATMELFWL	SIOCIWFIRSTPRIV
2588*4882a593Smuzhiyun #define ATMELIDIFC	ATMELFWL + 1
2589*4882a593Smuzhiyun #define ATMELRD		ATMELFWL + 2
2590*4882a593Smuzhiyun #define ATMELMAGIC 0x51807
2591*4882a593Smuzhiyun #define REGDOMAINSZ 20
2592*4882a593Smuzhiyun 
2593*4882a593Smuzhiyun static const struct iw_priv_args atmel_private_args[] = {
2594*4882a593Smuzhiyun 	{
2595*4882a593Smuzhiyun 		.cmd = ATMELFWL,
2596*4882a593Smuzhiyun 		.set_args = IW_PRIV_TYPE_BYTE
2597*4882a593Smuzhiyun 				| IW_PRIV_SIZE_FIXED
2598*4882a593Smuzhiyun 				| sizeof(struct atmel_priv_ioctl),
2599*4882a593Smuzhiyun 		.get_args = IW_PRIV_TYPE_NONE,
2600*4882a593Smuzhiyun 		.name = "atmelfwl"
2601*4882a593Smuzhiyun 	}, {
2602*4882a593Smuzhiyun 		.cmd = ATMELIDIFC,
2603*4882a593Smuzhiyun 		.set_args = IW_PRIV_TYPE_NONE,
2604*4882a593Smuzhiyun 		.get_args = IW_PRIV_TYPE_INT | IW_PRIV_SIZE_FIXED | 1,
2605*4882a593Smuzhiyun 		.name = "atmelidifc"
2606*4882a593Smuzhiyun 	}, {
2607*4882a593Smuzhiyun 		.cmd = ATMELRD,
2608*4882a593Smuzhiyun 		.set_args = IW_PRIV_TYPE_CHAR | REGDOMAINSZ,
2609*4882a593Smuzhiyun 		.get_args = IW_PRIV_TYPE_NONE,
2610*4882a593Smuzhiyun 		.name = "regdomain"
2611*4882a593Smuzhiyun 	},
2612*4882a593Smuzhiyun };
2613*4882a593Smuzhiyun 
2614*4882a593Smuzhiyun static const struct iw_handler_def atmel_handler_def = {
2615*4882a593Smuzhiyun 	.num_standard	= ARRAY_SIZE(atmel_handler),
2616*4882a593Smuzhiyun 	.num_private	= ARRAY_SIZE(atmel_private_handler),
2617*4882a593Smuzhiyun 	.num_private_args = ARRAY_SIZE(atmel_private_args),
2618*4882a593Smuzhiyun 	.standard	= (iw_handler *) atmel_handler,
2619*4882a593Smuzhiyun 	.private	= (iw_handler *) atmel_private_handler,
2620*4882a593Smuzhiyun 	.private_args	= (struct iw_priv_args *) atmel_private_args,
2621*4882a593Smuzhiyun 	.get_wireless_stats = atmel_get_wireless_stats
2622*4882a593Smuzhiyun };
2623*4882a593Smuzhiyun 
atmel_ioctl(struct net_device * dev,struct ifreq * rq,int cmd)2624*4882a593Smuzhiyun static int atmel_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2625*4882a593Smuzhiyun {
2626*4882a593Smuzhiyun 	int i, rc = 0;
2627*4882a593Smuzhiyun 	struct atmel_private *priv = netdev_priv(dev);
2628*4882a593Smuzhiyun 	struct atmel_priv_ioctl com;
2629*4882a593Smuzhiyun 	struct iwreq *wrq = (struct iwreq *) rq;
2630*4882a593Smuzhiyun 	unsigned char *new_firmware;
2631*4882a593Smuzhiyun 	char domain[REGDOMAINSZ + 1];
2632*4882a593Smuzhiyun 
2633*4882a593Smuzhiyun 	switch (cmd) {
2634*4882a593Smuzhiyun 	case ATMELIDIFC:
2635*4882a593Smuzhiyun 		wrq->u.param.value = ATMELMAGIC;
2636*4882a593Smuzhiyun 		break;
2637*4882a593Smuzhiyun 
2638*4882a593Smuzhiyun 	case ATMELFWL:
2639*4882a593Smuzhiyun 		if (copy_from_user(&com, rq->ifr_data, sizeof(com))) {
2640*4882a593Smuzhiyun 			rc = -EFAULT;
2641*4882a593Smuzhiyun 			break;
2642*4882a593Smuzhiyun 		}
2643*4882a593Smuzhiyun 
2644*4882a593Smuzhiyun 		if (!capable(CAP_NET_ADMIN)) {
2645*4882a593Smuzhiyun 			rc = -EPERM;
2646*4882a593Smuzhiyun 			break;
2647*4882a593Smuzhiyun 		}
2648*4882a593Smuzhiyun 
2649*4882a593Smuzhiyun 		new_firmware = memdup_user(com.data, com.len);
2650*4882a593Smuzhiyun 		if (IS_ERR(new_firmware)) {
2651*4882a593Smuzhiyun 			rc = PTR_ERR(new_firmware);
2652*4882a593Smuzhiyun 			break;
2653*4882a593Smuzhiyun 		}
2654*4882a593Smuzhiyun 
2655*4882a593Smuzhiyun 		kfree(priv->firmware);
2656*4882a593Smuzhiyun 
2657*4882a593Smuzhiyun 		priv->firmware = new_firmware;
2658*4882a593Smuzhiyun 		priv->firmware_length = com.len;
2659*4882a593Smuzhiyun 		strncpy(priv->firmware_id, com.id, 31);
2660*4882a593Smuzhiyun 		priv->firmware_id[31] = '\0';
2661*4882a593Smuzhiyun 		break;
2662*4882a593Smuzhiyun 
2663*4882a593Smuzhiyun 	case ATMELRD:
2664*4882a593Smuzhiyun 		if (copy_from_user(domain, rq->ifr_data, REGDOMAINSZ)) {
2665*4882a593Smuzhiyun 			rc = -EFAULT;
2666*4882a593Smuzhiyun 			break;
2667*4882a593Smuzhiyun 		}
2668*4882a593Smuzhiyun 
2669*4882a593Smuzhiyun 		if (!capable(CAP_NET_ADMIN)) {
2670*4882a593Smuzhiyun 			rc = -EPERM;
2671*4882a593Smuzhiyun 			break;
2672*4882a593Smuzhiyun 		}
2673*4882a593Smuzhiyun 
2674*4882a593Smuzhiyun 		domain[REGDOMAINSZ] = 0;
2675*4882a593Smuzhiyun 		rc = -EINVAL;
2676*4882a593Smuzhiyun 		for (i = 0; i < ARRAY_SIZE(channel_table); i++) {
2677*4882a593Smuzhiyun 			if (!strcasecmp(channel_table[i].name, domain)) {
2678*4882a593Smuzhiyun 				priv->config_reg_domain = channel_table[i].reg_domain;
2679*4882a593Smuzhiyun 				rc = 0;
2680*4882a593Smuzhiyun 			}
2681*4882a593Smuzhiyun 		}
2682*4882a593Smuzhiyun 
2683*4882a593Smuzhiyun 		if (rc == 0 &&  priv->station_state != STATION_STATE_DOWN)
2684*4882a593Smuzhiyun 			rc = atmel_open(dev);
2685*4882a593Smuzhiyun 		break;
2686*4882a593Smuzhiyun 
2687*4882a593Smuzhiyun 	default:
2688*4882a593Smuzhiyun 		rc = -EOPNOTSUPP;
2689*4882a593Smuzhiyun 	}
2690*4882a593Smuzhiyun 
2691*4882a593Smuzhiyun 	return rc;
2692*4882a593Smuzhiyun }
2693*4882a593Smuzhiyun 
2694*4882a593Smuzhiyun struct auth_body {
2695*4882a593Smuzhiyun 	__le16 alg;
2696*4882a593Smuzhiyun 	__le16 trans_seq;
2697*4882a593Smuzhiyun 	__le16 status;
2698*4882a593Smuzhiyun 	u8 el_id;
2699*4882a593Smuzhiyun 	u8 chall_text_len;
2700*4882a593Smuzhiyun 	u8 chall_text[253];
2701*4882a593Smuzhiyun };
2702*4882a593Smuzhiyun 
atmel_enter_state(struct atmel_private * priv,int new_state)2703*4882a593Smuzhiyun static void atmel_enter_state(struct atmel_private *priv, int new_state)
2704*4882a593Smuzhiyun {
2705*4882a593Smuzhiyun 	int old_state = priv->station_state;
2706*4882a593Smuzhiyun 
2707*4882a593Smuzhiyun 	if (new_state == old_state)
2708*4882a593Smuzhiyun 		return;
2709*4882a593Smuzhiyun 
2710*4882a593Smuzhiyun 	priv->station_state = new_state;
2711*4882a593Smuzhiyun 
2712*4882a593Smuzhiyun 	if (new_state == STATION_STATE_READY) {
2713*4882a593Smuzhiyun 		netif_start_queue(priv->dev);
2714*4882a593Smuzhiyun 		netif_carrier_on(priv->dev);
2715*4882a593Smuzhiyun 	}
2716*4882a593Smuzhiyun 
2717*4882a593Smuzhiyun 	if (old_state == STATION_STATE_READY) {
2718*4882a593Smuzhiyun 		netif_carrier_off(priv->dev);
2719*4882a593Smuzhiyun 		if (netif_running(priv->dev))
2720*4882a593Smuzhiyun 			netif_stop_queue(priv->dev);
2721*4882a593Smuzhiyun 		priv->last_beacon_timestamp = 0;
2722*4882a593Smuzhiyun 	}
2723*4882a593Smuzhiyun }
2724*4882a593Smuzhiyun 
atmel_scan(struct atmel_private * priv,int specific_ssid)2725*4882a593Smuzhiyun static void atmel_scan(struct atmel_private *priv, int specific_ssid)
2726*4882a593Smuzhiyun {
2727*4882a593Smuzhiyun 	struct {
2728*4882a593Smuzhiyun 		u8 BSSID[ETH_ALEN];
2729*4882a593Smuzhiyun 		u8 SSID[MAX_SSID_LENGTH];
2730*4882a593Smuzhiyun 		u8 scan_type;
2731*4882a593Smuzhiyun 		u8 channel;
2732*4882a593Smuzhiyun 		__le16 BSS_type;
2733*4882a593Smuzhiyun 		__le16 min_channel_time;
2734*4882a593Smuzhiyun 		__le16 max_channel_time;
2735*4882a593Smuzhiyun 		u8 options;
2736*4882a593Smuzhiyun 		u8 SSID_size;
2737*4882a593Smuzhiyun 	} cmd;
2738*4882a593Smuzhiyun 
2739*4882a593Smuzhiyun 	eth_broadcast_addr(cmd.BSSID);
2740*4882a593Smuzhiyun 
2741*4882a593Smuzhiyun 	if (priv->fast_scan) {
2742*4882a593Smuzhiyun 		cmd.SSID_size = priv->SSID_size;
2743*4882a593Smuzhiyun 		memcpy(cmd.SSID, priv->SSID, priv->SSID_size);
2744*4882a593Smuzhiyun 		cmd.min_channel_time = cpu_to_le16(10);
2745*4882a593Smuzhiyun 		cmd.max_channel_time = cpu_to_le16(50);
2746*4882a593Smuzhiyun 	} else {
2747*4882a593Smuzhiyun 		priv->BSS_list_entries = 0;
2748*4882a593Smuzhiyun 		cmd.SSID_size = 0;
2749*4882a593Smuzhiyun 		cmd.min_channel_time = cpu_to_le16(10);
2750*4882a593Smuzhiyun 		cmd.max_channel_time = cpu_to_le16(120);
2751*4882a593Smuzhiyun 	}
2752*4882a593Smuzhiyun 
2753*4882a593Smuzhiyun 	cmd.options = 0;
2754*4882a593Smuzhiyun 
2755*4882a593Smuzhiyun 	if (!specific_ssid)
2756*4882a593Smuzhiyun 		cmd.options |= SCAN_OPTIONS_SITE_SURVEY;
2757*4882a593Smuzhiyun 
2758*4882a593Smuzhiyun 	cmd.channel = (priv->channel & 0x7f);
2759*4882a593Smuzhiyun 	cmd.scan_type = SCAN_TYPE_ACTIVE;
2760*4882a593Smuzhiyun 	cmd.BSS_type = cpu_to_le16(priv->operating_mode == IW_MODE_ADHOC ?
2761*4882a593Smuzhiyun 		BSS_TYPE_AD_HOC : BSS_TYPE_INFRASTRUCTURE);
2762*4882a593Smuzhiyun 
2763*4882a593Smuzhiyun 	atmel_send_command(priv, CMD_Scan, &cmd, sizeof(cmd));
2764*4882a593Smuzhiyun 
2765*4882a593Smuzhiyun 	/* This must come after all hardware access to avoid being messed up
2766*4882a593Smuzhiyun 	   by stuff happening in interrupt context after we leave STATE_DOWN */
2767*4882a593Smuzhiyun 	atmel_enter_state(priv, STATION_STATE_SCANNING);
2768*4882a593Smuzhiyun }
2769*4882a593Smuzhiyun 
join(struct atmel_private * priv,int type)2770*4882a593Smuzhiyun static void join(struct atmel_private *priv, int type)
2771*4882a593Smuzhiyun {
2772*4882a593Smuzhiyun 	struct {
2773*4882a593Smuzhiyun 		u8 BSSID[6];
2774*4882a593Smuzhiyun 		u8 SSID[MAX_SSID_LENGTH];
2775*4882a593Smuzhiyun 		u8 BSS_type; /* this is a short in a scan command - weird */
2776*4882a593Smuzhiyun 		u8 channel;
2777*4882a593Smuzhiyun 		__le16 timeout;
2778*4882a593Smuzhiyun 		u8 SSID_size;
2779*4882a593Smuzhiyun 		u8 reserved;
2780*4882a593Smuzhiyun 	} cmd;
2781*4882a593Smuzhiyun 
2782*4882a593Smuzhiyun 	cmd.SSID_size = priv->SSID_size;
2783*4882a593Smuzhiyun 	memcpy(cmd.SSID, priv->SSID, priv->SSID_size);
2784*4882a593Smuzhiyun 	memcpy(cmd.BSSID, priv->CurrentBSSID, ETH_ALEN);
2785*4882a593Smuzhiyun 	cmd.channel = (priv->channel & 0x7f);
2786*4882a593Smuzhiyun 	cmd.BSS_type = type;
2787*4882a593Smuzhiyun 	cmd.timeout = cpu_to_le16(2000);
2788*4882a593Smuzhiyun 
2789*4882a593Smuzhiyun 	atmel_send_command(priv, CMD_Join, &cmd, sizeof(cmd));
2790*4882a593Smuzhiyun }
2791*4882a593Smuzhiyun 
start(struct atmel_private * priv,int type)2792*4882a593Smuzhiyun static void start(struct atmel_private *priv, int type)
2793*4882a593Smuzhiyun {
2794*4882a593Smuzhiyun 	struct {
2795*4882a593Smuzhiyun 		u8 BSSID[6];
2796*4882a593Smuzhiyun 		u8 SSID[MAX_SSID_LENGTH];
2797*4882a593Smuzhiyun 		u8 BSS_type;
2798*4882a593Smuzhiyun 		u8 channel;
2799*4882a593Smuzhiyun 		u8 SSID_size;
2800*4882a593Smuzhiyun 		u8 reserved[3];
2801*4882a593Smuzhiyun 	} cmd;
2802*4882a593Smuzhiyun 
2803*4882a593Smuzhiyun 	cmd.SSID_size = priv->SSID_size;
2804*4882a593Smuzhiyun 	memcpy(cmd.SSID, priv->SSID, priv->SSID_size);
2805*4882a593Smuzhiyun 	memcpy(cmd.BSSID, priv->BSSID, ETH_ALEN);
2806*4882a593Smuzhiyun 	cmd.BSS_type = type;
2807*4882a593Smuzhiyun 	cmd.channel = (priv->channel & 0x7f);
2808*4882a593Smuzhiyun 
2809*4882a593Smuzhiyun 	atmel_send_command(priv, CMD_Start, &cmd, sizeof(cmd));
2810*4882a593Smuzhiyun }
2811*4882a593Smuzhiyun 
handle_beacon_probe(struct atmel_private * priv,u16 capability,u8 channel)2812*4882a593Smuzhiyun static void handle_beacon_probe(struct atmel_private *priv, u16 capability,
2813*4882a593Smuzhiyun 				u8 channel)
2814*4882a593Smuzhiyun {
2815*4882a593Smuzhiyun 	int rejoin = 0;
2816*4882a593Smuzhiyun 	int new = capability & WLAN_CAPABILITY_SHORT_PREAMBLE ?
2817*4882a593Smuzhiyun 		SHORT_PREAMBLE : LONG_PREAMBLE;
2818*4882a593Smuzhiyun 
2819*4882a593Smuzhiyun 	if (priv->preamble != new) {
2820*4882a593Smuzhiyun 		priv->preamble = new;
2821*4882a593Smuzhiyun 		rejoin = 1;
2822*4882a593Smuzhiyun 		atmel_set_mib8(priv, Local_Mib_Type, LOCAL_MIB_PREAMBLE_TYPE, new);
2823*4882a593Smuzhiyun 	}
2824*4882a593Smuzhiyun 
2825*4882a593Smuzhiyun 	if (priv->channel != channel) {
2826*4882a593Smuzhiyun 		priv->channel = channel;
2827*4882a593Smuzhiyun 		rejoin = 1;
2828*4882a593Smuzhiyun 		atmel_set_mib8(priv, Phy_Mib_Type, PHY_MIB_CHANNEL_POS, channel);
2829*4882a593Smuzhiyun 	}
2830*4882a593Smuzhiyun 
2831*4882a593Smuzhiyun 	if (rejoin) {
2832*4882a593Smuzhiyun 		priv->station_is_associated = 0;
2833*4882a593Smuzhiyun 		atmel_enter_state(priv, STATION_STATE_JOINNING);
2834*4882a593Smuzhiyun 
2835*4882a593Smuzhiyun 		if (priv->operating_mode == IW_MODE_INFRA)
2836*4882a593Smuzhiyun 			join(priv, BSS_TYPE_INFRASTRUCTURE);
2837*4882a593Smuzhiyun 		else
2838*4882a593Smuzhiyun 			join(priv, BSS_TYPE_AD_HOC);
2839*4882a593Smuzhiyun 	}
2840*4882a593Smuzhiyun }
2841*4882a593Smuzhiyun 
send_authentication_request(struct atmel_private * priv,u16 system,u8 * challenge,int challenge_len)2842*4882a593Smuzhiyun static void send_authentication_request(struct atmel_private *priv, u16 system,
2843*4882a593Smuzhiyun 					u8 *challenge, int challenge_len)
2844*4882a593Smuzhiyun {
2845*4882a593Smuzhiyun 	struct ieee80211_hdr header;
2846*4882a593Smuzhiyun 	struct auth_body auth;
2847*4882a593Smuzhiyun 
2848*4882a593Smuzhiyun 	header.frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT | IEEE80211_STYPE_AUTH);
2849*4882a593Smuzhiyun 	header.duration_id = cpu_to_le16(0x8000);
2850*4882a593Smuzhiyun 	header.seq_ctrl = 0;
2851*4882a593Smuzhiyun 	memcpy(header.addr1, priv->CurrentBSSID, ETH_ALEN);
2852*4882a593Smuzhiyun 	memcpy(header.addr2, priv->dev->dev_addr, ETH_ALEN);
2853*4882a593Smuzhiyun 	memcpy(header.addr3, priv->CurrentBSSID, ETH_ALEN);
2854*4882a593Smuzhiyun 
2855*4882a593Smuzhiyun 	if (priv->wep_is_on && priv->CurrentAuthentTransactionSeqNum != 1)
2856*4882a593Smuzhiyun 		/* no WEP for authentication frames with TrSeqNo 1 */
2857*4882a593Smuzhiyun 		header.frame_control |=  cpu_to_le16(IEEE80211_FCTL_PROTECTED);
2858*4882a593Smuzhiyun 
2859*4882a593Smuzhiyun 	auth.alg = cpu_to_le16(system);
2860*4882a593Smuzhiyun 
2861*4882a593Smuzhiyun 	auth.status = 0;
2862*4882a593Smuzhiyun 	auth.trans_seq = cpu_to_le16(priv->CurrentAuthentTransactionSeqNum);
2863*4882a593Smuzhiyun 	priv->ExpectedAuthentTransactionSeqNum = priv->CurrentAuthentTransactionSeqNum+1;
2864*4882a593Smuzhiyun 	priv->CurrentAuthentTransactionSeqNum += 2;
2865*4882a593Smuzhiyun 
2866*4882a593Smuzhiyun 	if (challenge_len != 0)	{
2867*4882a593Smuzhiyun 		auth.el_id = 16; /* challenge_text */
2868*4882a593Smuzhiyun 		auth.chall_text_len = challenge_len;
2869*4882a593Smuzhiyun 		memcpy(auth.chall_text, challenge, challenge_len);
2870*4882a593Smuzhiyun 		atmel_transmit_management_frame(priv, &header, (u8 *)&auth, 8 + challenge_len);
2871*4882a593Smuzhiyun 	} else {
2872*4882a593Smuzhiyun 		atmel_transmit_management_frame(priv, &header, (u8 *)&auth, 6);
2873*4882a593Smuzhiyun 	}
2874*4882a593Smuzhiyun }
2875*4882a593Smuzhiyun 
send_association_request(struct atmel_private * priv,int is_reassoc)2876*4882a593Smuzhiyun static void send_association_request(struct atmel_private *priv, int is_reassoc)
2877*4882a593Smuzhiyun {
2878*4882a593Smuzhiyun 	u8 *ssid_el_p;
2879*4882a593Smuzhiyun 	int bodysize;
2880*4882a593Smuzhiyun 	struct ieee80211_hdr header;
2881*4882a593Smuzhiyun 	struct ass_req_format {
2882*4882a593Smuzhiyun 		__le16 capability;
2883*4882a593Smuzhiyun 		__le16 listen_interval;
2884*4882a593Smuzhiyun 		u8 ap[ETH_ALEN]; /* nothing after here directly accessible */
2885*4882a593Smuzhiyun 		u8 ssid_el_id;
2886*4882a593Smuzhiyun 		u8 ssid_len;
2887*4882a593Smuzhiyun 		u8 ssid[MAX_SSID_LENGTH];
2888*4882a593Smuzhiyun 		u8 sup_rates_el_id;
2889*4882a593Smuzhiyun 		u8 sup_rates_len;
2890*4882a593Smuzhiyun 		u8 rates[4];
2891*4882a593Smuzhiyun 	} body;
2892*4882a593Smuzhiyun 
2893*4882a593Smuzhiyun 	header.frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT |
2894*4882a593Smuzhiyun 		(is_reassoc ? IEEE80211_STYPE_REASSOC_REQ : IEEE80211_STYPE_ASSOC_REQ));
2895*4882a593Smuzhiyun 	header.duration_id = cpu_to_le16(0x8000);
2896*4882a593Smuzhiyun 	header.seq_ctrl = 0;
2897*4882a593Smuzhiyun 
2898*4882a593Smuzhiyun 	memcpy(header.addr1, priv->CurrentBSSID, ETH_ALEN);
2899*4882a593Smuzhiyun 	memcpy(header.addr2, priv->dev->dev_addr, ETH_ALEN);
2900*4882a593Smuzhiyun 	memcpy(header.addr3, priv->CurrentBSSID, ETH_ALEN);
2901*4882a593Smuzhiyun 
2902*4882a593Smuzhiyun 	body.capability = cpu_to_le16(WLAN_CAPABILITY_ESS);
2903*4882a593Smuzhiyun 	if (priv->wep_is_on)
2904*4882a593Smuzhiyun 		body.capability |= cpu_to_le16(WLAN_CAPABILITY_PRIVACY);
2905*4882a593Smuzhiyun 	if (priv->preamble == SHORT_PREAMBLE)
2906*4882a593Smuzhiyun 		body.capability |= cpu_to_le16(WLAN_CAPABILITY_SHORT_PREAMBLE);
2907*4882a593Smuzhiyun 
2908*4882a593Smuzhiyun 	body.listen_interval = cpu_to_le16(priv->listen_interval * priv->beacon_period);
2909*4882a593Smuzhiyun 
2910*4882a593Smuzhiyun 	/* current AP address - only in reassoc frame */
2911*4882a593Smuzhiyun 	if (is_reassoc) {
2912*4882a593Smuzhiyun 		memcpy(body.ap, priv->CurrentBSSID, ETH_ALEN);
2913*4882a593Smuzhiyun 		ssid_el_p = &body.ssid_el_id;
2914*4882a593Smuzhiyun 		bodysize = 18 + priv->SSID_size;
2915*4882a593Smuzhiyun 	} else {
2916*4882a593Smuzhiyun 		ssid_el_p = &body.ap[0];
2917*4882a593Smuzhiyun 		bodysize = 12 + priv->SSID_size;
2918*4882a593Smuzhiyun 	}
2919*4882a593Smuzhiyun 
2920*4882a593Smuzhiyun 	ssid_el_p[0] = WLAN_EID_SSID;
2921*4882a593Smuzhiyun 	ssid_el_p[1] = priv->SSID_size;
2922*4882a593Smuzhiyun 	memcpy(ssid_el_p + 2, priv->SSID, priv->SSID_size);
2923*4882a593Smuzhiyun 	ssid_el_p[2 + priv->SSID_size] = WLAN_EID_SUPP_RATES;
2924*4882a593Smuzhiyun 	ssid_el_p[3 + priv->SSID_size] = 4; /* len of supported rates */
2925*4882a593Smuzhiyun 	memcpy(ssid_el_p + 4 + priv->SSID_size, atmel_basic_rates, 4);
2926*4882a593Smuzhiyun 
2927*4882a593Smuzhiyun 	atmel_transmit_management_frame(priv, &header, (void *)&body, bodysize);
2928*4882a593Smuzhiyun }
2929*4882a593Smuzhiyun 
is_frame_from_current_bss(struct atmel_private * priv,struct ieee80211_hdr * header)2930*4882a593Smuzhiyun static int is_frame_from_current_bss(struct atmel_private *priv,
2931*4882a593Smuzhiyun 				     struct ieee80211_hdr *header)
2932*4882a593Smuzhiyun {
2933*4882a593Smuzhiyun 	if (le16_to_cpu(header->frame_control) & IEEE80211_FCTL_FROMDS)
2934*4882a593Smuzhiyun 		return memcmp(header->addr3, priv->CurrentBSSID, 6) == 0;
2935*4882a593Smuzhiyun 	else
2936*4882a593Smuzhiyun 		return memcmp(header->addr2, priv->CurrentBSSID, 6) == 0;
2937*4882a593Smuzhiyun }
2938*4882a593Smuzhiyun 
retrieve_bss(struct atmel_private * priv)2939*4882a593Smuzhiyun static int retrieve_bss(struct atmel_private *priv)
2940*4882a593Smuzhiyun {
2941*4882a593Smuzhiyun 	int i;
2942*4882a593Smuzhiyun 	int max_rssi = -128;
2943*4882a593Smuzhiyun 	int max_index = -1;
2944*4882a593Smuzhiyun 
2945*4882a593Smuzhiyun 	if (priv->BSS_list_entries == 0)
2946*4882a593Smuzhiyun 		return -1;
2947*4882a593Smuzhiyun 
2948*4882a593Smuzhiyun 	if (priv->connect_to_any_BSS) {
2949*4882a593Smuzhiyun 		/* Select a BSS with the max-RSSI but of the same type and of
2950*4882a593Smuzhiyun 		   the same WEP mode and that it is not marked as 'bad' (i.e.
2951*4882a593Smuzhiyun 		   we had previously failed to connect to this BSS with the
2952*4882a593Smuzhiyun 		   settings that we currently use) */
2953*4882a593Smuzhiyun 		priv->current_BSS = 0;
2954*4882a593Smuzhiyun 		for (i = 0; i < priv->BSS_list_entries; i++) {
2955*4882a593Smuzhiyun 			if (priv->operating_mode == priv->BSSinfo[i].BSStype &&
2956*4882a593Smuzhiyun 			    ((!priv->wep_is_on && !priv->BSSinfo[i].UsingWEP) ||
2957*4882a593Smuzhiyun 			     (priv->wep_is_on && priv->BSSinfo[i].UsingWEP)) &&
2958*4882a593Smuzhiyun 			    !(priv->BSSinfo[i].channel & 0x80)) {
2959*4882a593Smuzhiyun 				max_rssi = priv->BSSinfo[i].RSSI;
2960*4882a593Smuzhiyun 				priv->current_BSS = max_index = i;
2961*4882a593Smuzhiyun 			}
2962*4882a593Smuzhiyun 		}
2963*4882a593Smuzhiyun 		return max_index;
2964*4882a593Smuzhiyun 	}
2965*4882a593Smuzhiyun 
2966*4882a593Smuzhiyun 	for (i = 0; i < priv->BSS_list_entries; i++) {
2967*4882a593Smuzhiyun 		if (priv->SSID_size == priv->BSSinfo[i].SSIDsize &&
2968*4882a593Smuzhiyun 		    memcmp(priv->SSID, priv->BSSinfo[i].SSID, priv->SSID_size) == 0 &&
2969*4882a593Smuzhiyun 		    priv->operating_mode == priv->BSSinfo[i].BSStype &&
2970*4882a593Smuzhiyun 		    atmel_validate_channel(priv, priv->BSSinfo[i].channel) == 0) {
2971*4882a593Smuzhiyun 			if (priv->BSSinfo[i].RSSI >= max_rssi) {
2972*4882a593Smuzhiyun 				max_rssi = priv->BSSinfo[i].RSSI;
2973*4882a593Smuzhiyun 				max_index = i;
2974*4882a593Smuzhiyun 			}
2975*4882a593Smuzhiyun 		}
2976*4882a593Smuzhiyun 	}
2977*4882a593Smuzhiyun 	return max_index;
2978*4882a593Smuzhiyun }
2979*4882a593Smuzhiyun 
store_bss_info(struct atmel_private * priv,struct ieee80211_hdr * header,u16 capability,u16 beacon_period,u8 channel,u8 rssi,u8 ssid_len,u8 * ssid,int is_beacon)2980*4882a593Smuzhiyun static void store_bss_info(struct atmel_private *priv,
2981*4882a593Smuzhiyun 			   struct ieee80211_hdr *header, u16 capability,
2982*4882a593Smuzhiyun 			   u16 beacon_period, u8 channel, u8 rssi, u8 ssid_len,
2983*4882a593Smuzhiyun 			   u8 *ssid, int is_beacon)
2984*4882a593Smuzhiyun {
2985*4882a593Smuzhiyun 	u8 *bss = capability & WLAN_CAPABILITY_ESS ? header->addr2 : header->addr3;
2986*4882a593Smuzhiyun 	int i, index;
2987*4882a593Smuzhiyun 
2988*4882a593Smuzhiyun 	for (index = -1, i = 0; i < priv->BSS_list_entries; i++)
2989*4882a593Smuzhiyun 		if (memcmp(bss, priv->BSSinfo[i].BSSID, ETH_ALEN) == 0)
2990*4882a593Smuzhiyun 			index = i;
2991*4882a593Smuzhiyun 
2992*4882a593Smuzhiyun 	/* If we process a probe and an entry from this BSS exists
2993*4882a593Smuzhiyun 	   we will update the BSS entry with the info from this BSS.
2994*4882a593Smuzhiyun 	   If we process a beacon we will only update RSSI */
2995*4882a593Smuzhiyun 
2996*4882a593Smuzhiyun 	if (index == -1) {
2997*4882a593Smuzhiyun 		if (priv->BSS_list_entries == MAX_BSS_ENTRIES)
2998*4882a593Smuzhiyun 			return;
2999*4882a593Smuzhiyun 		index = priv->BSS_list_entries++;
3000*4882a593Smuzhiyun 		memcpy(priv->BSSinfo[index].BSSID, bss, ETH_ALEN);
3001*4882a593Smuzhiyun 		priv->BSSinfo[index].RSSI = rssi;
3002*4882a593Smuzhiyun 	} else {
3003*4882a593Smuzhiyun 		if (rssi > priv->BSSinfo[index].RSSI)
3004*4882a593Smuzhiyun 			priv->BSSinfo[index].RSSI = rssi;
3005*4882a593Smuzhiyun 		if (is_beacon)
3006*4882a593Smuzhiyun 			return;
3007*4882a593Smuzhiyun 	}
3008*4882a593Smuzhiyun 
3009*4882a593Smuzhiyun 	priv->BSSinfo[index].channel = channel;
3010*4882a593Smuzhiyun 	priv->BSSinfo[index].beacon_period = beacon_period;
3011*4882a593Smuzhiyun 	priv->BSSinfo[index].UsingWEP = capability & WLAN_CAPABILITY_PRIVACY;
3012*4882a593Smuzhiyun 	memcpy(priv->BSSinfo[index].SSID, ssid, ssid_len);
3013*4882a593Smuzhiyun 	priv->BSSinfo[index].SSIDsize = ssid_len;
3014*4882a593Smuzhiyun 
3015*4882a593Smuzhiyun 	if (capability & WLAN_CAPABILITY_IBSS)
3016*4882a593Smuzhiyun 		priv->BSSinfo[index].BSStype = IW_MODE_ADHOC;
3017*4882a593Smuzhiyun 	else if (capability & WLAN_CAPABILITY_ESS)
3018*4882a593Smuzhiyun 		priv->BSSinfo[index].BSStype = IW_MODE_INFRA;
3019*4882a593Smuzhiyun 
3020*4882a593Smuzhiyun 	priv->BSSinfo[index].preamble = capability & WLAN_CAPABILITY_SHORT_PREAMBLE ?
3021*4882a593Smuzhiyun 		SHORT_PREAMBLE : LONG_PREAMBLE;
3022*4882a593Smuzhiyun }
3023*4882a593Smuzhiyun 
authenticate(struct atmel_private * priv,u16 frame_len)3024*4882a593Smuzhiyun static void authenticate(struct atmel_private *priv, u16 frame_len)
3025*4882a593Smuzhiyun {
3026*4882a593Smuzhiyun 	struct auth_body *auth = (struct auth_body *)priv->rx_buf;
3027*4882a593Smuzhiyun 	u16 status = le16_to_cpu(auth->status);
3028*4882a593Smuzhiyun 	u16 trans_seq_no = le16_to_cpu(auth->trans_seq);
3029*4882a593Smuzhiyun 	u16 system = le16_to_cpu(auth->alg);
3030*4882a593Smuzhiyun 
3031*4882a593Smuzhiyun 	if (status == WLAN_STATUS_SUCCESS && !priv->wep_is_on) {
3032*4882a593Smuzhiyun 		/* no WEP */
3033*4882a593Smuzhiyun 		if (priv->station_was_associated) {
3034*4882a593Smuzhiyun 			atmel_enter_state(priv, STATION_STATE_REASSOCIATING);
3035*4882a593Smuzhiyun 			send_association_request(priv, 1);
3036*4882a593Smuzhiyun 			return;
3037*4882a593Smuzhiyun 		} else {
3038*4882a593Smuzhiyun 			atmel_enter_state(priv, STATION_STATE_ASSOCIATING);
3039*4882a593Smuzhiyun 			send_association_request(priv, 0);
3040*4882a593Smuzhiyun 			return;
3041*4882a593Smuzhiyun 		}
3042*4882a593Smuzhiyun 	}
3043*4882a593Smuzhiyun 
3044*4882a593Smuzhiyun 	if (status == WLAN_STATUS_SUCCESS && priv->wep_is_on) {
3045*4882a593Smuzhiyun 		int should_associate = 0;
3046*4882a593Smuzhiyun 		/* WEP */
3047*4882a593Smuzhiyun 		if (trans_seq_no != priv->ExpectedAuthentTransactionSeqNum)
3048*4882a593Smuzhiyun 			return;
3049*4882a593Smuzhiyun 
3050*4882a593Smuzhiyun 		if (system == WLAN_AUTH_OPEN) {
3051*4882a593Smuzhiyun 			if (trans_seq_no == 0x0002) {
3052*4882a593Smuzhiyun 				should_associate = 1;
3053*4882a593Smuzhiyun 			}
3054*4882a593Smuzhiyun 		} else if (system == WLAN_AUTH_SHARED_KEY) {
3055*4882a593Smuzhiyun 			if (trans_seq_no == 0x0002 &&
3056*4882a593Smuzhiyun 			    auth->el_id == WLAN_EID_CHALLENGE) {
3057*4882a593Smuzhiyun 				send_authentication_request(priv, system, auth->chall_text, auth->chall_text_len);
3058*4882a593Smuzhiyun 				return;
3059*4882a593Smuzhiyun 			} else if (trans_seq_no == 0x0004) {
3060*4882a593Smuzhiyun 				should_associate = 1;
3061*4882a593Smuzhiyun 			}
3062*4882a593Smuzhiyun 		}
3063*4882a593Smuzhiyun 
3064*4882a593Smuzhiyun 		if (should_associate) {
3065*4882a593Smuzhiyun 			if (priv->station_was_associated) {
3066*4882a593Smuzhiyun 				atmel_enter_state(priv, STATION_STATE_REASSOCIATING);
3067*4882a593Smuzhiyun 				send_association_request(priv, 1);
3068*4882a593Smuzhiyun 				return;
3069*4882a593Smuzhiyun 			} else {
3070*4882a593Smuzhiyun 				atmel_enter_state(priv, STATION_STATE_ASSOCIATING);
3071*4882a593Smuzhiyun 				send_association_request(priv, 0);
3072*4882a593Smuzhiyun 				return;
3073*4882a593Smuzhiyun 			}
3074*4882a593Smuzhiyun 		}
3075*4882a593Smuzhiyun 	}
3076*4882a593Smuzhiyun 
3077*4882a593Smuzhiyun 	if (status == WLAN_STATUS_NOT_SUPPORTED_AUTH_ALG) {
3078*4882a593Smuzhiyun 		/* Flip back and forth between WEP auth modes until the max
3079*4882a593Smuzhiyun 		 * authentication tries has been exceeded.
3080*4882a593Smuzhiyun 		 */
3081*4882a593Smuzhiyun 		if (system == WLAN_AUTH_OPEN) {
3082*4882a593Smuzhiyun 			priv->CurrentAuthentTransactionSeqNum = 0x001;
3083*4882a593Smuzhiyun 			priv->exclude_unencrypted = 1;
3084*4882a593Smuzhiyun 			send_authentication_request(priv, WLAN_AUTH_SHARED_KEY, NULL, 0);
3085*4882a593Smuzhiyun 			return;
3086*4882a593Smuzhiyun 		} else if (system == WLAN_AUTH_SHARED_KEY
3087*4882a593Smuzhiyun 			   && priv->wep_is_on) {
3088*4882a593Smuzhiyun 			priv->CurrentAuthentTransactionSeqNum = 0x001;
3089*4882a593Smuzhiyun 			priv->exclude_unencrypted = 0;
3090*4882a593Smuzhiyun 			send_authentication_request(priv, WLAN_AUTH_OPEN, NULL, 0);
3091*4882a593Smuzhiyun 			return;
3092*4882a593Smuzhiyun 		} else if (priv->connect_to_any_BSS) {
3093*4882a593Smuzhiyun 			int bss_index;
3094*4882a593Smuzhiyun 
3095*4882a593Smuzhiyun 			priv->BSSinfo[(int)(priv->current_BSS)].channel |= 0x80;
3096*4882a593Smuzhiyun 
3097*4882a593Smuzhiyun 			if ((bss_index  = retrieve_bss(priv)) != -1) {
3098*4882a593Smuzhiyun 				atmel_join_bss(priv, bss_index);
3099*4882a593Smuzhiyun 				return;
3100*4882a593Smuzhiyun 			}
3101*4882a593Smuzhiyun 		}
3102*4882a593Smuzhiyun 	}
3103*4882a593Smuzhiyun 
3104*4882a593Smuzhiyun 	priv->AuthenticationRequestRetryCnt = 0;
3105*4882a593Smuzhiyun 	atmel_enter_state(priv,  STATION_STATE_MGMT_ERROR);
3106*4882a593Smuzhiyun 	priv->station_is_associated = 0;
3107*4882a593Smuzhiyun }
3108*4882a593Smuzhiyun 
associate(struct atmel_private * priv,u16 frame_len,u16 subtype)3109*4882a593Smuzhiyun static void associate(struct atmel_private *priv, u16 frame_len, u16 subtype)
3110*4882a593Smuzhiyun {
3111*4882a593Smuzhiyun 	struct ass_resp_format {
3112*4882a593Smuzhiyun 		__le16 capability;
3113*4882a593Smuzhiyun 		__le16 status;
3114*4882a593Smuzhiyun 		__le16 ass_id;
3115*4882a593Smuzhiyun 		u8 el_id;
3116*4882a593Smuzhiyun 		u8 length;
3117*4882a593Smuzhiyun 		u8 rates[4];
3118*4882a593Smuzhiyun 	} *ass_resp = (struct ass_resp_format *)priv->rx_buf;
3119*4882a593Smuzhiyun 
3120*4882a593Smuzhiyun 	u16 status = le16_to_cpu(ass_resp->status);
3121*4882a593Smuzhiyun 	u16 ass_id = le16_to_cpu(ass_resp->ass_id);
3122*4882a593Smuzhiyun 	u16 rates_len = ass_resp->length > 4 ? 4 : ass_resp->length;
3123*4882a593Smuzhiyun 
3124*4882a593Smuzhiyun 	union iwreq_data wrqu;
3125*4882a593Smuzhiyun 
3126*4882a593Smuzhiyun 	if (frame_len < 8 + rates_len)
3127*4882a593Smuzhiyun 		return;
3128*4882a593Smuzhiyun 
3129*4882a593Smuzhiyun 	if (status == WLAN_STATUS_SUCCESS) {
3130*4882a593Smuzhiyun 		if (subtype == IEEE80211_STYPE_ASSOC_RESP)
3131*4882a593Smuzhiyun 			priv->AssociationRequestRetryCnt = 0;
3132*4882a593Smuzhiyun 		else
3133*4882a593Smuzhiyun 			priv->ReAssociationRequestRetryCnt = 0;
3134*4882a593Smuzhiyun 
3135*4882a593Smuzhiyun 		atmel_set_mib16(priv, Mac_Mgmt_Mib_Type,
3136*4882a593Smuzhiyun 				MAC_MGMT_MIB_STATION_ID_POS, ass_id & 0x3fff);
3137*4882a593Smuzhiyun 		atmel_set_mib(priv, Phy_Mib_Type,
3138*4882a593Smuzhiyun 			      PHY_MIB_RATE_SET_POS, ass_resp->rates, rates_len);
3139*4882a593Smuzhiyun 		if (priv->power_mode == 0) {
3140*4882a593Smuzhiyun 			priv->listen_interval = 1;
3141*4882a593Smuzhiyun 			atmel_set_mib8(priv, Mac_Mgmt_Mib_Type,
3142*4882a593Smuzhiyun 				       MAC_MGMT_MIB_PS_MODE_POS, ACTIVE_MODE);
3143*4882a593Smuzhiyun 			atmel_set_mib16(priv, Mac_Mgmt_Mib_Type,
3144*4882a593Smuzhiyun 					MAC_MGMT_MIB_LISTEN_INTERVAL_POS, 1);
3145*4882a593Smuzhiyun 		} else {
3146*4882a593Smuzhiyun 			priv->listen_interval = 2;
3147*4882a593Smuzhiyun 			atmel_set_mib8(priv, Mac_Mgmt_Mib_Type,
3148*4882a593Smuzhiyun 				       MAC_MGMT_MIB_PS_MODE_POS,  PS_MODE);
3149*4882a593Smuzhiyun 			atmel_set_mib16(priv, Mac_Mgmt_Mib_Type,
3150*4882a593Smuzhiyun 					MAC_MGMT_MIB_LISTEN_INTERVAL_POS, 2);
3151*4882a593Smuzhiyun 		}
3152*4882a593Smuzhiyun 
3153*4882a593Smuzhiyun 		priv->station_is_associated = 1;
3154*4882a593Smuzhiyun 		priv->station_was_associated = 1;
3155*4882a593Smuzhiyun 		atmel_enter_state(priv, STATION_STATE_READY);
3156*4882a593Smuzhiyun 
3157*4882a593Smuzhiyun 		/* Send association event to userspace */
3158*4882a593Smuzhiyun 		wrqu.data.length = 0;
3159*4882a593Smuzhiyun 		wrqu.data.flags = 0;
3160*4882a593Smuzhiyun 		memcpy(wrqu.ap_addr.sa_data, priv->CurrentBSSID, ETH_ALEN);
3161*4882a593Smuzhiyun 		wrqu.ap_addr.sa_family = ARPHRD_ETHER;
3162*4882a593Smuzhiyun 		wireless_send_event(priv->dev, SIOCGIWAP, &wrqu, NULL);
3163*4882a593Smuzhiyun 
3164*4882a593Smuzhiyun 		return;
3165*4882a593Smuzhiyun 	}
3166*4882a593Smuzhiyun 
3167*4882a593Smuzhiyun 	if (subtype == IEEE80211_STYPE_ASSOC_RESP &&
3168*4882a593Smuzhiyun 	    status != WLAN_STATUS_ASSOC_DENIED_RATES &&
3169*4882a593Smuzhiyun 	    status != WLAN_STATUS_CAPS_UNSUPPORTED &&
3170*4882a593Smuzhiyun 	    priv->AssociationRequestRetryCnt < MAX_ASSOCIATION_RETRIES) {
3171*4882a593Smuzhiyun 		mod_timer(&priv->management_timer, jiffies + MGMT_JIFFIES);
3172*4882a593Smuzhiyun 		priv->AssociationRequestRetryCnt++;
3173*4882a593Smuzhiyun 		send_association_request(priv, 0);
3174*4882a593Smuzhiyun 		return;
3175*4882a593Smuzhiyun 	}
3176*4882a593Smuzhiyun 
3177*4882a593Smuzhiyun 	if (subtype == IEEE80211_STYPE_REASSOC_RESP &&
3178*4882a593Smuzhiyun 	    status != WLAN_STATUS_ASSOC_DENIED_RATES &&
3179*4882a593Smuzhiyun 	    status != WLAN_STATUS_CAPS_UNSUPPORTED &&
3180*4882a593Smuzhiyun 	    priv->ReAssociationRequestRetryCnt < MAX_ASSOCIATION_RETRIES) {
3181*4882a593Smuzhiyun 		mod_timer(&priv->management_timer, jiffies + MGMT_JIFFIES);
3182*4882a593Smuzhiyun 		priv->ReAssociationRequestRetryCnt++;
3183*4882a593Smuzhiyun 		send_association_request(priv, 1);
3184*4882a593Smuzhiyun 		return;
3185*4882a593Smuzhiyun 	}
3186*4882a593Smuzhiyun 
3187*4882a593Smuzhiyun 	atmel_enter_state(priv,  STATION_STATE_MGMT_ERROR);
3188*4882a593Smuzhiyun 	priv->station_is_associated = 0;
3189*4882a593Smuzhiyun 
3190*4882a593Smuzhiyun 	if (priv->connect_to_any_BSS) {
3191*4882a593Smuzhiyun 		int bss_index;
3192*4882a593Smuzhiyun 		priv->BSSinfo[(int)(priv->current_BSS)].channel |= 0x80;
3193*4882a593Smuzhiyun 
3194*4882a593Smuzhiyun 		if ((bss_index = retrieve_bss(priv)) != -1)
3195*4882a593Smuzhiyun 			atmel_join_bss(priv, bss_index);
3196*4882a593Smuzhiyun 	}
3197*4882a593Smuzhiyun }
3198*4882a593Smuzhiyun 
atmel_join_bss(struct atmel_private * priv,int bss_index)3199*4882a593Smuzhiyun static void atmel_join_bss(struct atmel_private *priv, int bss_index)
3200*4882a593Smuzhiyun {
3201*4882a593Smuzhiyun 	struct bss_info *bss =  &priv->BSSinfo[bss_index];
3202*4882a593Smuzhiyun 
3203*4882a593Smuzhiyun 	memcpy(priv->CurrentBSSID, bss->BSSID, ETH_ALEN);
3204*4882a593Smuzhiyun 	memcpy(priv->SSID, bss->SSID, priv->SSID_size = bss->SSIDsize);
3205*4882a593Smuzhiyun 
3206*4882a593Smuzhiyun 	/* The WPA stuff cares about the current AP address */
3207*4882a593Smuzhiyun 	if (priv->use_wpa)
3208*4882a593Smuzhiyun 		build_wpa_mib(priv);
3209*4882a593Smuzhiyun 
3210*4882a593Smuzhiyun 	/* When switching to AdHoc turn OFF Power Save if needed */
3211*4882a593Smuzhiyun 
3212*4882a593Smuzhiyun 	if (bss->BSStype == IW_MODE_ADHOC &&
3213*4882a593Smuzhiyun 	    priv->operating_mode != IW_MODE_ADHOC &&
3214*4882a593Smuzhiyun 	    priv->power_mode) {
3215*4882a593Smuzhiyun 		priv->power_mode = 0;
3216*4882a593Smuzhiyun 		priv->listen_interval = 1;
3217*4882a593Smuzhiyun 		atmel_set_mib8(priv, Mac_Mgmt_Mib_Type,
3218*4882a593Smuzhiyun 			       MAC_MGMT_MIB_PS_MODE_POS,  ACTIVE_MODE);
3219*4882a593Smuzhiyun 		atmel_set_mib16(priv, Mac_Mgmt_Mib_Type,
3220*4882a593Smuzhiyun 				MAC_MGMT_MIB_LISTEN_INTERVAL_POS, 1);
3221*4882a593Smuzhiyun 	}
3222*4882a593Smuzhiyun 
3223*4882a593Smuzhiyun 	priv->operating_mode = bss->BSStype;
3224*4882a593Smuzhiyun 	priv->channel = bss->channel & 0x7f;
3225*4882a593Smuzhiyun 	priv->beacon_period = bss->beacon_period;
3226*4882a593Smuzhiyun 
3227*4882a593Smuzhiyun 	if (priv->preamble != bss->preamble) {
3228*4882a593Smuzhiyun 		priv->preamble = bss->preamble;
3229*4882a593Smuzhiyun 		atmel_set_mib8(priv, Local_Mib_Type,
3230*4882a593Smuzhiyun 			       LOCAL_MIB_PREAMBLE_TYPE, bss->preamble);
3231*4882a593Smuzhiyun 	}
3232*4882a593Smuzhiyun 
3233*4882a593Smuzhiyun 	if (!priv->wep_is_on && bss->UsingWEP) {
3234*4882a593Smuzhiyun 		atmel_enter_state(priv, STATION_STATE_MGMT_ERROR);
3235*4882a593Smuzhiyun 		priv->station_is_associated = 0;
3236*4882a593Smuzhiyun 		return;
3237*4882a593Smuzhiyun 	}
3238*4882a593Smuzhiyun 
3239*4882a593Smuzhiyun 	if (priv->wep_is_on && !bss->UsingWEP) {
3240*4882a593Smuzhiyun 		atmel_enter_state(priv, STATION_STATE_MGMT_ERROR);
3241*4882a593Smuzhiyun 		priv->station_is_associated = 0;
3242*4882a593Smuzhiyun 		return;
3243*4882a593Smuzhiyun 	}
3244*4882a593Smuzhiyun 
3245*4882a593Smuzhiyun 	atmel_enter_state(priv, STATION_STATE_JOINNING);
3246*4882a593Smuzhiyun 
3247*4882a593Smuzhiyun 	if (priv->operating_mode == IW_MODE_INFRA)
3248*4882a593Smuzhiyun 		join(priv, BSS_TYPE_INFRASTRUCTURE);
3249*4882a593Smuzhiyun 	else
3250*4882a593Smuzhiyun 		join(priv, BSS_TYPE_AD_HOC);
3251*4882a593Smuzhiyun }
3252*4882a593Smuzhiyun 
restart_search(struct atmel_private * priv)3253*4882a593Smuzhiyun static void restart_search(struct atmel_private *priv)
3254*4882a593Smuzhiyun {
3255*4882a593Smuzhiyun 	int bss_index;
3256*4882a593Smuzhiyun 
3257*4882a593Smuzhiyun 	if (!priv->connect_to_any_BSS) {
3258*4882a593Smuzhiyun 		atmel_scan(priv, 1);
3259*4882a593Smuzhiyun 	} else {
3260*4882a593Smuzhiyun 		priv->BSSinfo[(int)(priv->current_BSS)].channel |= 0x80;
3261*4882a593Smuzhiyun 
3262*4882a593Smuzhiyun 		if ((bss_index = retrieve_bss(priv)) != -1)
3263*4882a593Smuzhiyun 			atmel_join_bss(priv, bss_index);
3264*4882a593Smuzhiyun 		else
3265*4882a593Smuzhiyun 			atmel_scan(priv, 0);
3266*4882a593Smuzhiyun 	}
3267*4882a593Smuzhiyun }
3268*4882a593Smuzhiyun 
smooth_rssi(struct atmel_private * priv,u8 rssi)3269*4882a593Smuzhiyun static void smooth_rssi(struct atmel_private *priv, u8 rssi)
3270*4882a593Smuzhiyun {
3271*4882a593Smuzhiyun 	u8 old = priv->wstats.qual.level;
3272*4882a593Smuzhiyun 	u8 max_rssi = 42; /* 502-rmfd-revd max by experiment, default for now */
3273*4882a593Smuzhiyun 
3274*4882a593Smuzhiyun 	switch (priv->firmware_type) {
3275*4882a593Smuzhiyun 	case ATMEL_FW_TYPE_502E:
3276*4882a593Smuzhiyun 		max_rssi = 63; /* 502-rmfd-reve max by experiment */
3277*4882a593Smuzhiyun 		break;
3278*4882a593Smuzhiyun 	default:
3279*4882a593Smuzhiyun 		break;
3280*4882a593Smuzhiyun 	}
3281*4882a593Smuzhiyun 
3282*4882a593Smuzhiyun 	rssi = rssi * 100 / max_rssi;
3283*4882a593Smuzhiyun 	if ((rssi + old) % 2)
3284*4882a593Smuzhiyun 		priv->wstats.qual.level = (rssi + old) / 2 + 1;
3285*4882a593Smuzhiyun 	else
3286*4882a593Smuzhiyun 		priv->wstats.qual.level = (rssi + old) / 2;
3287*4882a593Smuzhiyun 	priv->wstats.qual.updated |= IW_QUAL_LEVEL_UPDATED;
3288*4882a593Smuzhiyun 	priv->wstats.qual.updated &= ~IW_QUAL_LEVEL_INVALID;
3289*4882a593Smuzhiyun }
3290*4882a593Smuzhiyun 
atmel_smooth_qual(struct atmel_private * priv)3291*4882a593Smuzhiyun static void atmel_smooth_qual(struct atmel_private *priv)
3292*4882a593Smuzhiyun {
3293*4882a593Smuzhiyun 	unsigned long time_diff = (jiffies - priv->last_qual) / HZ;
3294*4882a593Smuzhiyun 	while (time_diff--) {
3295*4882a593Smuzhiyun 		priv->last_qual += HZ;
3296*4882a593Smuzhiyun 		priv->wstats.qual.qual = priv->wstats.qual.qual / 2;
3297*4882a593Smuzhiyun 		priv->wstats.qual.qual +=
3298*4882a593Smuzhiyun 			priv->beacons_this_sec * priv->beacon_period * (priv->wstats.qual.level + 100) / 4000;
3299*4882a593Smuzhiyun 		priv->beacons_this_sec = 0;
3300*4882a593Smuzhiyun 	}
3301*4882a593Smuzhiyun 	priv->wstats.qual.updated |= IW_QUAL_QUAL_UPDATED;
3302*4882a593Smuzhiyun 	priv->wstats.qual.updated &= ~IW_QUAL_QUAL_INVALID;
3303*4882a593Smuzhiyun }
3304*4882a593Smuzhiyun 
3305*4882a593Smuzhiyun /* deals with incoming management frames. */
atmel_management_frame(struct atmel_private * priv,struct ieee80211_hdr * header,u16 frame_len,u8 rssi)3306*4882a593Smuzhiyun static void atmel_management_frame(struct atmel_private *priv,
3307*4882a593Smuzhiyun 				   struct ieee80211_hdr *header,
3308*4882a593Smuzhiyun 				   u16 frame_len, u8 rssi)
3309*4882a593Smuzhiyun {
3310*4882a593Smuzhiyun 	u16 subtype;
3311*4882a593Smuzhiyun 
3312*4882a593Smuzhiyun 	subtype = le16_to_cpu(header->frame_control) & IEEE80211_FCTL_STYPE;
3313*4882a593Smuzhiyun 	switch (subtype) {
3314*4882a593Smuzhiyun 	case IEEE80211_STYPE_BEACON:
3315*4882a593Smuzhiyun 	case IEEE80211_STYPE_PROBE_RESP:
3316*4882a593Smuzhiyun 
3317*4882a593Smuzhiyun 		/* beacon frame has multiple variable-length fields -
3318*4882a593Smuzhiyun 		   never let an engineer loose with a data structure design. */
3319*4882a593Smuzhiyun 		{
3320*4882a593Smuzhiyun 			struct beacon_format {
3321*4882a593Smuzhiyun 				__le64 timestamp;
3322*4882a593Smuzhiyun 				__le16 interval;
3323*4882a593Smuzhiyun 				__le16 capability;
3324*4882a593Smuzhiyun 				u8 ssid_el_id;
3325*4882a593Smuzhiyun 				u8 ssid_length;
3326*4882a593Smuzhiyun 				/* ssid here */
3327*4882a593Smuzhiyun 				u8 rates_el_id;
3328*4882a593Smuzhiyun 				u8 rates_length;
3329*4882a593Smuzhiyun 				/* rates here */
3330*4882a593Smuzhiyun 				u8 ds_el_id;
3331*4882a593Smuzhiyun 				u8 ds_length;
3332*4882a593Smuzhiyun 				/* ds here */
3333*4882a593Smuzhiyun 			} *beacon = (struct beacon_format *)priv->rx_buf;
3334*4882a593Smuzhiyun 
3335*4882a593Smuzhiyun 			u8 channel, rates_length, ssid_length;
3336*4882a593Smuzhiyun 			u64 timestamp = le64_to_cpu(beacon->timestamp);
3337*4882a593Smuzhiyun 			u16 beacon_interval = le16_to_cpu(beacon->interval);
3338*4882a593Smuzhiyun 			u16 capability = le16_to_cpu(beacon->capability);
3339*4882a593Smuzhiyun 			u8 *beaconp = priv->rx_buf;
3340*4882a593Smuzhiyun 			ssid_length = beacon->ssid_length;
3341*4882a593Smuzhiyun 			/* this blows chunks. */
3342*4882a593Smuzhiyun 			if (frame_len < 14 || frame_len < ssid_length + 15)
3343*4882a593Smuzhiyun 				return;
3344*4882a593Smuzhiyun 			rates_length = beaconp[beacon->ssid_length + 15];
3345*4882a593Smuzhiyun 			if (frame_len < ssid_length + rates_length + 18)
3346*4882a593Smuzhiyun 				return;
3347*4882a593Smuzhiyun 			if (ssid_length >  MAX_SSID_LENGTH)
3348*4882a593Smuzhiyun 				return;
3349*4882a593Smuzhiyun 			channel = beaconp[ssid_length + rates_length + 18];
3350*4882a593Smuzhiyun 
3351*4882a593Smuzhiyun 			if (priv->station_state == STATION_STATE_READY) {
3352*4882a593Smuzhiyun 				smooth_rssi(priv, rssi);
3353*4882a593Smuzhiyun 				if (is_frame_from_current_bss(priv, header)) {
3354*4882a593Smuzhiyun 					priv->beacons_this_sec++;
3355*4882a593Smuzhiyun 					atmel_smooth_qual(priv);
3356*4882a593Smuzhiyun 					if (priv->last_beacon_timestamp) {
3357*4882a593Smuzhiyun 						/* Note truncate this to 32 bits - kernel can't divide a long long */
3358*4882a593Smuzhiyun 						u32 beacon_delay = timestamp - priv->last_beacon_timestamp;
3359*4882a593Smuzhiyun 						int beacons = beacon_delay / (beacon_interval * 1000);
3360*4882a593Smuzhiyun 						if (beacons > 1)
3361*4882a593Smuzhiyun 							priv->wstats.miss.beacon += beacons - 1;
3362*4882a593Smuzhiyun 					}
3363*4882a593Smuzhiyun 					priv->last_beacon_timestamp = timestamp;
3364*4882a593Smuzhiyun 					handle_beacon_probe(priv, capability, channel);
3365*4882a593Smuzhiyun 				}
3366*4882a593Smuzhiyun 			}
3367*4882a593Smuzhiyun 
3368*4882a593Smuzhiyun 			if (priv->station_state == STATION_STATE_SCANNING)
3369*4882a593Smuzhiyun 				store_bss_info(priv, header, capability,
3370*4882a593Smuzhiyun 					       beacon_interval, channel, rssi,
3371*4882a593Smuzhiyun 					       ssid_length,
3372*4882a593Smuzhiyun 					       &beacon->rates_el_id,
3373*4882a593Smuzhiyun 					       subtype == IEEE80211_STYPE_BEACON);
3374*4882a593Smuzhiyun 		}
3375*4882a593Smuzhiyun 		break;
3376*4882a593Smuzhiyun 
3377*4882a593Smuzhiyun 	case IEEE80211_STYPE_AUTH:
3378*4882a593Smuzhiyun 
3379*4882a593Smuzhiyun 		if (priv->station_state == STATION_STATE_AUTHENTICATING)
3380*4882a593Smuzhiyun 			authenticate(priv, frame_len);
3381*4882a593Smuzhiyun 
3382*4882a593Smuzhiyun 		break;
3383*4882a593Smuzhiyun 
3384*4882a593Smuzhiyun 	case IEEE80211_STYPE_ASSOC_RESP:
3385*4882a593Smuzhiyun 	case IEEE80211_STYPE_REASSOC_RESP:
3386*4882a593Smuzhiyun 
3387*4882a593Smuzhiyun 		if (priv->station_state == STATION_STATE_ASSOCIATING ||
3388*4882a593Smuzhiyun 		    priv->station_state == STATION_STATE_REASSOCIATING)
3389*4882a593Smuzhiyun 			associate(priv, frame_len, subtype);
3390*4882a593Smuzhiyun 
3391*4882a593Smuzhiyun 		break;
3392*4882a593Smuzhiyun 
3393*4882a593Smuzhiyun 	case IEEE80211_STYPE_DISASSOC:
3394*4882a593Smuzhiyun 		if (priv->station_is_associated &&
3395*4882a593Smuzhiyun 		    priv->operating_mode == IW_MODE_INFRA &&
3396*4882a593Smuzhiyun 		    is_frame_from_current_bss(priv, header)) {
3397*4882a593Smuzhiyun 			priv->station_was_associated = 0;
3398*4882a593Smuzhiyun 			priv->station_is_associated = 0;
3399*4882a593Smuzhiyun 
3400*4882a593Smuzhiyun 			atmel_enter_state(priv, STATION_STATE_JOINNING);
3401*4882a593Smuzhiyun 			join(priv, BSS_TYPE_INFRASTRUCTURE);
3402*4882a593Smuzhiyun 		}
3403*4882a593Smuzhiyun 
3404*4882a593Smuzhiyun 		break;
3405*4882a593Smuzhiyun 
3406*4882a593Smuzhiyun 	case IEEE80211_STYPE_DEAUTH:
3407*4882a593Smuzhiyun 		if (priv->operating_mode == IW_MODE_INFRA &&
3408*4882a593Smuzhiyun 		    is_frame_from_current_bss(priv, header)) {
3409*4882a593Smuzhiyun 			priv->station_was_associated = 0;
3410*4882a593Smuzhiyun 
3411*4882a593Smuzhiyun 			atmel_enter_state(priv, STATION_STATE_JOINNING);
3412*4882a593Smuzhiyun 			join(priv, BSS_TYPE_INFRASTRUCTURE);
3413*4882a593Smuzhiyun 		}
3414*4882a593Smuzhiyun 
3415*4882a593Smuzhiyun 		break;
3416*4882a593Smuzhiyun 	}
3417*4882a593Smuzhiyun }
3418*4882a593Smuzhiyun 
3419*4882a593Smuzhiyun /* run when timer expires */
atmel_management_timer(struct timer_list * t)3420*4882a593Smuzhiyun static void atmel_management_timer(struct timer_list *t)
3421*4882a593Smuzhiyun {
3422*4882a593Smuzhiyun 	struct atmel_private *priv = from_timer(priv, t, management_timer);
3423*4882a593Smuzhiyun 	unsigned long flags;
3424*4882a593Smuzhiyun 
3425*4882a593Smuzhiyun 	/* Check if the card has been yanked. */
3426*4882a593Smuzhiyun 	if (priv->card && priv->present_callback &&
3427*4882a593Smuzhiyun 		!(*priv->present_callback)(priv->card))
3428*4882a593Smuzhiyun 		return;
3429*4882a593Smuzhiyun 
3430*4882a593Smuzhiyun 	spin_lock_irqsave(&priv->irqlock, flags);
3431*4882a593Smuzhiyun 
3432*4882a593Smuzhiyun 	switch (priv->station_state) {
3433*4882a593Smuzhiyun 
3434*4882a593Smuzhiyun 	case STATION_STATE_AUTHENTICATING:
3435*4882a593Smuzhiyun 		if (priv->AuthenticationRequestRetryCnt >= MAX_AUTHENTICATION_RETRIES) {
3436*4882a593Smuzhiyun 			atmel_enter_state(priv, STATION_STATE_MGMT_ERROR);
3437*4882a593Smuzhiyun 			priv->station_is_associated = 0;
3438*4882a593Smuzhiyun 			priv->AuthenticationRequestRetryCnt = 0;
3439*4882a593Smuzhiyun 			restart_search(priv);
3440*4882a593Smuzhiyun 		} else {
3441*4882a593Smuzhiyun 			int auth = WLAN_AUTH_OPEN;
3442*4882a593Smuzhiyun 			priv->AuthenticationRequestRetryCnt++;
3443*4882a593Smuzhiyun 			priv->CurrentAuthentTransactionSeqNum = 0x0001;
3444*4882a593Smuzhiyun 			mod_timer(&priv->management_timer, jiffies + MGMT_JIFFIES);
3445*4882a593Smuzhiyun 			if (priv->wep_is_on && priv->exclude_unencrypted)
3446*4882a593Smuzhiyun 				auth = WLAN_AUTH_SHARED_KEY;
3447*4882a593Smuzhiyun 			send_authentication_request(priv, auth, NULL, 0);
3448*4882a593Smuzhiyun 	  }
3449*4882a593Smuzhiyun 	  break;
3450*4882a593Smuzhiyun 
3451*4882a593Smuzhiyun 	case STATION_STATE_ASSOCIATING:
3452*4882a593Smuzhiyun 		if (priv->AssociationRequestRetryCnt == MAX_ASSOCIATION_RETRIES) {
3453*4882a593Smuzhiyun 			atmel_enter_state(priv, STATION_STATE_MGMT_ERROR);
3454*4882a593Smuzhiyun 			priv->station_is_associated = 0;
3455*4882a593Smuzhiyun 			priv->AssociationRequestRetryCnt = 0;
3456*4882a593Smuzhiyun 			restart_search(priv);
3457*4882a593Smuzhiyun 		} else {
3458*4882a593Smuzhiyun 			priv->AssociationRequestRetryCnt++;
3459*4882a593Smuzhiyun 			mod_timer(&priv->management_timer, jiffies + MGMT_JIFFIES);
3460*4882a593Smuzhiyun 			send_association_request(priv, 0);
3461*4882a593Smuzhiyun 		}
3462*4882a593Smuzhiyun 	  break;
3463*4882a593Smuzhiyun 
3464*4882a593Smuzhiyun 	case STATION_STATE_REASSOCIATING:
3465*4882a593Smuzhiyun 		if (priv->ReAssociationRequestRetryCnt == MAX_ASSOCIATION_RETRIES) {
3466*4882a593Smuzhiyun 			atmel_enter_state(priv, STATION_STATE_MGMT_ERROR);
3467*4882a593Smuzhiyun 			priv->station_is_associated = 0;
3468*4882a593Smuzhiyun 			priv->ReAssociationRequestRetryCnt = 0;
3469*4882a593Smuzhiyun 			restart_search(priv);
3470*4882a593Smuzhiyun 		} else {
3471*4882a593Smuzhiyun 			priv->ReAssociationRequestRetryCnt++;
3472*4882a593Smuzhiyun 			mod_timer(&priv->management_timer, jiffies + MGMT_JIFFIES);
3473*4882a593Smuzhiyun 			send_association_request(priv, 1);
3474*4882a593Smuzhiyun 		}
3475*4882a593Smuzhiyun 		break;
3476*4882a593Smuzhiyun 
3477*4882a593Smuzhiyun 	default:
3478*4882a593Smuzhiyun 		break;
3479*4882a593Smuzhiyun 	}
3480*4882a593Smuzhiyun 
3481*4882a593Smuzhiyun 	spin_unlock_irqrestore(&priv->irqlock, flags);
3482*4882a593Smuzhiyun }
3483*4882a593Smuzhiyun 
atmel_command_irq(struct atmel_private * priv)3484*4882a593Smuzhiyun static void atmel_command_irq(struct atmel_private *priv)
3485*4882a593Smuzhiyun {
3486*4882a593Smuzhiyun 	u8 status = atmel_rmem8(priv, atmel_co(priv, CMD_BLOCK_STATUS_OFFSET));
3487*4882a593Smuzhiyun 	u8 command = atmel_rmem8(priv, atmel_co(priv, CMD_BLOCK_COMMAND_OFFSET));
3488*4882a593Smuzhiyun 	int fast_scan;
3489*4882a593Smuzhiyun 	union iwreq_data wrqu;
3490*4882a593Smuzhiyun 
3491*4882a593Smuzhiyun 	if (status == CMD_STATUS_IDLE ||
3492*4882a593Smuzhiyun 	    status == CMD_STATUS_IN_PROGRESS)
3493*4882a593Smuzhiyun 		return;
3494*4882a593Smuzhiyun 
3495*4882a593Smuzhiyun 	switch (command) {
3496*4882a593Smuzhiyun 	case CMD_Start:
3497*4882a593Smuzhiyun 		if (status == CMD_STATUS_COMPLETE) {
3498*4882a593Smuzhiyun 			priv->station_was_associated = priv->station_is_associated;
3499*4882a593Smuzhiyun 			atmel_get_mib(priv, Mac_Mgmt_Mib_Type, MAC_MGMT_MIB_CUR_BSSID_POS,
3500*4882a593Smuzhiyun 				      (u8 *)priv->CurrentBSSID, 6);
3501*4882a593Smuzhiyun 			atmel_enter_state(priv, STATION_STATE_READY);
3502*4882a593Smuzhiyun 		}
3503*4882a593Smuzhiyun 		break;
3504*4882a593Smuzhiyun 
3505*4882a593Smuzhiyun 	case CMD_Scan:
3506*4882a593Smuzhiyun 		fast_scan = priv->fast_scan;
3507*4882a593Smuzhiyun 		priv->fast_scan = 0;
3508*4882a593Smuzhiyun 
3509*4882a593Smuzhiyun 		if (status != CMD_STATUS_COMPLETE) {
3510*4882a593Smuzhiyun 			atmel_scan(priv, 1);
3511*4882a593Smuzhiyun 		} else {
3512*4882a593Smuzhiyun 			int bss_index = retrieve_bss(priv);
3513*4882a593Smuzhiyun 			int notify_scan_complete = 1;
3514*4882a593Smuzhiyun 			if (bss_index != -1) {
3515*4882a593Smuzhiyun 				atmel_join_bss(priv, bss_index);
3516*4882a593Smuzhiyun 			} else if (priv->operating_mode == IW_MODE_ADHOC &&
3517*4882a593Smuzhiyun 				   priv->SSID_size != 0) {
3518*4882a593Smuzhiyun 				start(priv, BSS_TYPE_AD_HOC);
3519*4882a593Smuzhiyun 			} else {
3520*4882a593Smuzhiyun 				priv->fast_scan = !fast_scan;
3521*4882a593Smuzhiyun 				atmel_scan(priv, 1);
3522*4882a593Smuzhiyun 				notify_scan_complete = 0;
3523*4882a593Smuzhiyun 			}
3524*4882a593Smuzhiyun 			priv->site_survey_state = SITE_SURVEY_COMPLETED;
3525*4882a593Smuzhiyun 			if (notify_scan_complete) {
3526*4882a593Smuzhiyun 				wrqu.data.length = 0;
3527*4882a593Smuzhiyun 				wrqu.data.flags = 0;
3528*4882a593Smuzhiyun 				wireless_send_event(priv->dev, SIOCGIWSCAN, &wrqu, NULL);
3529*4882a593Smuzhiyun 			}
3530*4882a593Smuzhiyun 		}
3531*4882a593Smuzhiyun 		break;
3532*4882a593Smuzhiyun 
3533*4882a593Smuzhiyun 	case CMD_SiteSurvey:
3534*4882a593Smuzhiyun 		priv->fast_scan = 0;
3535*4882a593Smuzhiyun 
3536*4882a593Smuzhiyun 		if (status != CMD_STATUS_COMPLETE)
3537*4882a593Smuzhiyun 			return;
3538*4882a593Smuzhiyun 
3539*4882a593Smuzhiyun 		priv->site_survey_state = SITE_SURVEY_COMPLETED;
3540*4882a593Smuzhiyun 		if (priv->station_is_associated) {
3541*4882a593Smuzhiyun 			atmel_enter_state(priv, STATION_STATE_READY);
3542*4882a593Smuzhiyun 			wrqu.data.length = 0;
3543*4882a593Smuzhiyun 			wrqu.data.flags = 0;
3544*4882a593Smuzhiyun 			wireless_send_event(priv->dev, SIOCGIWSCAN, &wrqu, NULL);
3545*4882a593Smuzhiyun 		} else {
3546*4882a593Smuzhiyun 			atmel_scan(priv, 1);
3547*4882a593Smuzhiyun 		}
3548*4882a593Smuzhiyun 		break;
3549*4882a593Smuzhiyun 
3550*4882a593Smuzhiyun 	case CMD_Join:
3551*4882a593Smuzhiyun 		if (status == CMD_STATUS_COMPLETE) {
3552*4882a593Smuzhiyun 			if (priv->operating_mode == IW_MODE_ADHOC) {
3553*4882a593Smuzhiyun 				priv->station_was_associated = priv->station_is_associated;
3554*4882a593Smuzhiyun 				atmel_enter_state(priv, STATION_STATE_READY);
3555*4882a593Smuzhiyun 			} else {
3556*4882a593Smuzhiyun 				int auth = WLAN_AUTH_OPEN;
3557*4882a593Smuzhiyun 				priv->AuthenticationRequestRetryCnt = 0;
3558*4882a593Smuzhiyun 				atmel_enter_state(priv, STATION_STATE_AUTHENTICATING);
3559*4882a593Smuzhiyun 
3560*4882a593Smuzhiyun 				mod_timer(&priv->management_timer, jiffies + MGMT_JIFFIES);
3561*4882a593Smuzhiyun 				priv->CurrentAuthentTransactionSeqNum = 0x0001;
3562*4882a593Smuzhiyun 				if (priv->wep_is_on && priv->exclude_unencrypted)
3563*4882a593Smuzhiyun 					auth = WLAN_AUTH_SHARED_KEY;
3564*4882a593Smuzhiyun 				send_authentication_request(priv, auth, NULL, 0);
3565*4882a593Smuzhiyun 			}
3566*4882a593Smuzhiyun 			return;
3567*4882a593Smuzhiyun 		}
3568*4882a593Smuzhiyun 
3569*4882a593Smuzhiyun 		atmel_scan(priv, 1);
3570*4882a593Smuzhiyun 	}
3571*4882a593Smuzhiyun }
3572*4882a593Smuzhiyun 
atmel_wakeup_firmware(struct atmel_private * priv)3573*4882a593Smuzhiyun static int atmel_wakeup_firmware(struct atmel_private *priv)
3574*4882a593Smuzhiyun {
3575*4882a593Smuzhiyun 	struct host_info_struct *iface = &priv->host_info;
3576*4882a593Smuzhiyun 	u16 mr1, mr3;
3577*4882a593Smuzhiyun 	int i;
3578*4882a593Smuzhiyun 
3579*4882a593Smuzhiyun 	if (priv->card_type == CARD_TYPE_SPI_FLASH)
3580*4882a593Smuzhiyun 		atmel_set_gcr(priv->dev, GCR_REMAP);
3581*4882a593Smuzhiyun 
3582*4882a593Smuzhiyun 	/* wake up on-board processor */
3583*4882a593Smuzhiyun 	atmel_clear_gcr(priv->dev, 0x0040);
3584*4882a593Smuzhiyun 	atmel_write16(priv->dev, BSR, BSS_SRAM);
3585*4882a593Smuzhiyun 
3586*4882a593Smuzhiyun 	if (priv->card_type == CARD_TYPE_SPI_FLASH)
3587*4882a593Smuzhiyun 		mdelay(100);
3588*4882a593Smuzhiyun 
3589*4882a593Smuzhiyun 	/* and wait for it */
3590*4882a593Smuzhiyun 	for (i = LOOP_RETRY_LIMIT; i; i--) {
3591*4882a593Smuzhiyun 		mr1 = atmel_read16(priv->dev, MR1);
3592*4882a593Smuzhiyun 		mr3 = atmel_read16(priv->dev, MR3);
3593*4882a593Smuzhiyun 
3594*4882a593Smuzhiyun 		if (mr3 & MAC_BOOT_COMPLETE)
3595*4882a593Smuzhiyun 			break;
3596*4882a593Smuzhiyun 		if (mr1 & MAC_BOOT_COMPLETE &&
3597*4882a593Smuzhiyun 		    priv->bus_type == BUS_TYPE_PCCARD)
3598*4882a593Smuzhiyun 			break;
3599*4882a593Smuzhiyun 	}
3600*4882a593Smuzhiyun 
3601*4882a593Smuzhiyun 	if (i == 0) {
3602*4882a593Smuzhiyun 		printk(KERN_ALERT "%s: MAC failed to boot.\n", priv->dev->name);
3603*4882a593Smuzhiyun 		return -EIO;
3604*4882a593Smuzhiyun 	}
3605*4882a593Smuzhiyun 
3606*4882a593Smuzhiyun 	if ((priv->host_info_base = atmel_read16(priv->dev, MR2)) == 0xffff) {
3607*4882a593Smuzhiyun 		printk(KERN_ALERT "%s: card missing.\n", priv->dev->name);
3608*4882a593Smuzhiyun 		return -ENODEV;
3609*4882a593Smuzhiyun 	}
3610*4882a593Smuzhiyun 
3611*4882a593Smuzhiyun 	/* now check for completion of MAC initialization through
3612*4882a593Smuzhiyun 	   the FunCtrl field of the IFACE, poll MR1 to detect completion of
3613*4882a593Smuzhiyun 	   MAC initialization, check completion status, set interrupt mask,
3614*4882a593Smuzhiyun 	   enables interrupts and calls Tx and Rx initialization functions */
3615*4882a593Smuzhiyun 
3616*4882a593Smuzhiyun 	atmel_wmem8(priv, atmel_hi(priv, IFACE_FUNC_CTRL_OFFSET), FUNC_CTRL_INIT_COMPLETE);
3617*4882a593Smuzhiyun 
3618*4882a593Smuzhiyun 	for (i = LOOP_RETRY_LIMIT; i; i--) {
3619*4882a593Smuzhiyun 		mr1 = atmel_read16(priv->dev, MR1);
3620*4882a593Smuzhiyun 		mr3 = atmel_read16(priv->dev, MR3);
3621*4882a593Smuzhiyun 
3622*4882a593Smuzhiyun 		if (mr3 & MAC_INIT_COMPLETE)
3623*4882a593Smuzhiyun 			break;
3624*4882a593Smuzhiyun 		if (mr1 & MAC_INIT_COMPLETE &&
3625*4882a593Smuzhiyun 		    priv->bus_type == BUS_TYPE_PCCARD)
3626*4882a593Smuzhiyun 			break;
3627*4882a593Smuzhiyun 	}
3628*4882a593Smuzhiyun 
3629*4882a593Smuzhiyun 	if (i == 0) {
3630*4882a593Smuzhiyun 		printk(KERN_ALERT "%s: MAC failed to initialise.\n",
3631*4882a593Smuzhiyun 				priv->dev->name);
3632*4882a593Smuzhiyun 		return -EIO;
3633*4882a593Smuzhiyun 	}
3634*4882a593Smuzhiyun 
3635*4882a593Smuzhiyun 	/* Check for MAC_INIT_OK only on the register that the MAC_INIT_OK was set */
3636*4882a593Smuzhiyun 	if ((mr3 & MAC_INIT_COMPLETE) &&
3637*4882a593Smuzhiyun 	    !(atmel_read16(priv->dev, MR3) & MAC_INIT_OK)) {
3638*4882a593Smuzhiyun 		printk(KERN_ALERT "%s: MAC failed MR3 self-test.\n", priv->dev->name);
3639*4882a593Smuzhiyun 		return -EIO;
3640*4882a593Smuzhiyun 	}
3641*4882a593Smuzhiyun 	if ((mr1 & MAC_INIT_COMPLETE) &&
3642*4882a593Smuzhiyun 	    !(atmel_read16(priv->dev, MR1) & MAC_INIT_OK)) {
3643*4882a593Smuzhiyun 		printk(KERN_ALERT "%s: MAC failed MR1 self-test.\n", priv->dev->name);
3644*4882a593Smuzhiyun 		return -EIO;
3645*4882a593Smuzhiyun 	}
3646*4882a593Smuzhiyun 
3647*4882a593Smuzhiyun 	atmel_copy_to_host(priv->dev, (unsigned char *)iface,
3648*4882a593Smuzhiyun 			   priv->host_info_base, sizeof(*iface));
3649*4882a593Smuzhiyun 
3650*4882a593Smuzhiyun 	iface->tx_buff_pos = le16_to_cpu(iface->tx_buff_pos);
3651*4882a593Smuzhiyun 	iface->tx_buff_size = le16_to_cpu(iface->tx_buff_size);
3652*4882a593Smuzhiyun 	iface->tx_desc_pos = le16_to_cpu(iface->tx_desc_pos);
3653*4882a593Smuzhiyun 	iface->tx_desc_count = le16_to_cpu(iface->tx_desc_count);
3654*4882a593Smuzhiyun 	iface->rx_buff_pos = le16_to_cpu(iface->rx_buff_pos);
3655*4882a593Smuzhiyun 	iface->rx_buff_size = le16_to_cpu(iface->rx_buff_size);
3656*4882a593Smuzhiyun 	iface->rx_desc_pos = le16_to_cpu(iface->rx_desc_pos);
3657*4882a593Smuzhiyun 	iface->rx_desc_count = le16_to_cpu(iface->rx_desc_count);
3658*4882a593Smuzhiyun 	iface->build_version = le16_to_cpu(iface->build_version);
3659*4882a593Smuzhiyun 	iface->command_pos = le16_to_cpu(iface->command_pos);
3660*4882a593Smuzhiyun 	iface->major_version = le16_to_cpu(iface->major_version);
3661*4882a593Smuzhiyun 	iface->minor_version = le16_to_cpu(iface->minor_version);
3662*4882a593Smuzhiyun 	iface->func_ctrl = le16_to_cpu(iface->func_ctrl);
3663*4882a593Smuzhiyun 	iface->mac_status = le16_to_cpu(iface->mac_status);
3664*4882a593Smuzhiyun 
3665*4882a593Smuzhiyun 	return 0;
3666*4882a593Smuzhiyun }
3667*4882a593Smuzhiyun 
3668*4882a593Smuzhiyun /* determine type of memory and MAC address */
probe_atmel_card(struct net_device * dev)3669*4882a593Smuzhiyun static int probe_atmel_card(struct net_device *dev)
3670*4882a593Smuzhiyun {
3671*4882a593Smuzhiyun 	int rc = 0;
3672*4882a593Smuzhiyun 	struct atmel_private *priv = netdev_priv(dev);
3673*4882a593Smuzhiyun 
3674*4882a593Smuzhiyun 	/* reset pccard */
3675*4882a593Smuzhiyun 	if (priv->bus_type == BUS_TYPE_PCCARD)
3676*4882a593Smuzhiyun 		atmel_write16(dev, GCR, 0x0060);
3677*4882a593Smuzhiyun 
3678*4882a593Smuzhiyun 	atmel_write16(dev, GCR, 0x0040);
3679*4882a593Smuzhiyun 	msleep(500);
3680*4882a593Smuzhiyun 
3681*4882a593Smuzhiyun 	if (atmel_read16(dev, MR2) == 0) {
3682*4882a593Smuzhiyun 		/* No stored firmware so load a small stub which just
3683*4882a593Smuzhiyun 		   tells us the MAC address */
3684*4882a593Smuzhiyun 		int i;
3685*4882a593Smuzhiyun 		priv->card_type = CARD_TYPE_EEPROM;
3686*4882a593Smuzhiyun 		atmel_write16(dev, BSR, BSS_IRAM);
3687*4882a593Smuzhiyun 		atmel_copy_to_card(dev, 0, mac_reader, sizeof(mac_reader));
3688*4882a593Smuzhiyun 		atmel_set_gcr(dev, GCR_REMAP);
3689*4882a593Smuzhiyun 		atmel_clear_gcr(priv->dev, 0x0040);
3690*4882a593Smuzhiyun 		atmel_write16(dev, BSR, BSS_SRAM);
3691*4882a593Smuzhiyun 		for (i = LOOP_RETRY_LIMIT; i; i--)
3692*4882a593Smuzhiyun 			if (atmel_read16(dev, MR3) & MAC_BOOT_COMPLETE)
3693*4882a593Smuzhiyun 				break;
3694*4882a593Smuzhiyun 		if (i == 0) {
3695*4882a593Smuzhiyun 			printk(KERN_ALERT "%s: MAC failed to boot MAC address reader.\n", dev->name);
3696*4882a593Smuzhiyun 		} else {
3697*4882a593Smuzhiyun 			atmel_copy_to_host(dev, dev->dev_addr, atmel_read16(dev, MR2), 6);
3698*4882a593Smuzhiyun 			/* got address, now squash it again until the network
3699*4882a593Smuzhiyun 			   interface is opened */
3700*4882a593Smuzhiyun 			if (priv->bus_type == BUS_TYPE_PCCARD)
3701*4882a593Smuzhiyun 				atmel_write16(dev, GCR, 0x0060);
3702*4882a593Smuzhiyun 			atmel_write16(dev, GCR, 0x0040);
3703*4882a593Smuzhiyun 			rc = 1;
3704*4882a593Smuzhiyun 		}
3705*4882a593Smuzhiyun 	} else if (atmel_read16(dev, MR4) == 0) {
3706*4882a593Smuzhiyun 		/* Mac address easy in this case. */
3707*4882a593Smuzhiyun 		priv->card_type = CARD_TYPE_PARALLEL_FLASH;
3708*4882a593Smuzhiyun 		atmel_write16(dev,  BSR, 1);
3709*4882a593Smuzhiyun 		atmel_copy_to_host(dev, dev->dev_addr, 0xc000, 6);
3710*4882a593Smuzhiyun 		atmel_write16(dev,  BSR, 0x200);
3711*4882a593Smuzhiyun 		rc = 1;
3712*4882a593Smuzhiyun 	} else {
3713*4882a593Smuzhiyun 		/* Standard firmware in flash, boot it up and ask
3714*4882a593Smuzhiyun 		   for the Mac Address */
3715*4882a593Smuzhiyun 		priv->card_type = CARD_TYPE_SPI_FLASH;
3716*4882a593Smuzhiyun 		if (atmel_wakeup_firmware(priv) == 0) {
3717*4882a593Smuzhiyun 			atmel_get_mib(priv, Mac_Address_Mib_Type, 0, dev->dev_addr, 6);
3718*4882a593Smuzhiyun 
3719*4882a593Smuzhiyun 			/* got address, now squash it again until the network
3720*4882a593Smuzhiyun 			   interface is opened */
3721*4882a593Smuzhiyun 			if (priv->bus_type == BUS_TYPE_PCCARD)
3722*4882a593Smuzhiyun 				atmel_write16(dev, GCR, 0x0060);
3723*4882a593Smuzhiyun 			atmel_write16(dev, GCR, 0x0040);
3724*4882a593Smuzhiyun 			rc = 1;
3725*4882a593Smuzhiyun 		}
3726*4882a593Smuzhiyun 	}
3727*4882a593Smuzhiyun 
3728*4882a593Smuzhiyun 	if (rc) {
3729*4882a593Smuzhiyun 		if (dev->dev_addr[0] == 0xFF) {
3730*4882a593Smuzhiyun 			static const u8 default_mac[] = {
3731*4882a593Smuzhiyun 				0x00, 0x04, 0x25, 0x00, 0x00, 0x00
3732*4882a593Smuzhiyun 			};
3733*4882a593Smuzhiyun 			printk(KERN_ALERT "%s: *** Invalid MAC address. UPGRADE Firmware ****\n", dev->name);
3734*4882a593Smuzhiyun 			memcpy(dev->dev_addr, default_mac, ETH_ALEN);
3735*4882a593Smuzhiyun 		}
3736*4882a593Smuzhiyun 	}
3737*4882a593Smuzhiyun 
3738*4882a593Smuzhiyun 	return rc;
3739*4882a593Smuzhiyun }
3740*4882a593Smuzhiyun 
3741*4882a593Smuzhiyun /* Move the encyption information on the MIB structure.
3742*4882a593Smuzhiyun    This routine is for the pre-WPA firmware: later firmware has
3743*4882a593Smuzhiyun    a different format MIB and a different routine. */
build_wep_mib(struct atmel_private * priv)3744*4882a593Smuzhiyun static void build_wep_mib(struct atmel_private *priv)
3745*4882a593Smuzhiyun {
3746*4882a593Smuzhiyun 	struct { /* NB this is matched to the hardware, don't change. */
3747*4882a593Smuzhiyun 		u8 wep_is_on;
3748*4882a593Smuzhiyun 		u8 default_key; /* 0..3 */
3749*4882a593Smuzhiyun 		u8 reserved;
3750*4882a593Smuzhiyun 		u8 exclude_unencrypted;
3751*4882a593Smuzhiyun 
3752*4882a593Smuzhiyun 		u32 WEPICV_error_count;
3753*4882a593Smuzhiyun 		u32 WEP_excluded_count;
3754*4882a593Smuzhiyun 
3755*4882a593Smuzhiyun 		u8 wep_keys[MAX_ENCRYPTION_KEYS][13];
3756*4882a593Smuzhiyun 		u8 encryption_level; /* 0, 1, 2 */
3757*4882a593Smuzhiyun 		u8 reserved2[3];
3758*4882a593Smuzhiyun 	} mib;
3759*4882a593Smuzhiyun 	int i;
3760*4882a593Smuzhiyun 
3761*4882a593Smuzhiyun 	mib.wep_is_on = priv->wep_is_on;
3762*4882a593Smuzhiyun 	if (priv->wep_is_on) {
3763*4882a593Smuzhiyun 		if (priv->wep_key_len[priv->default_key] > 5)
3764*4882a593Smuzhiyun 			mib.encryption_level = 2;
3765*4882a593Smuzhiyun 		else
3766*4882a593Smuzhiyun 			mib.encryption_level = 1;
3767*4882a593Smuzhiyun 	} else {
3768*4882a593Smuzhiyun 		mib.encryption_level = 0;
3769*4882a593Smuzhiyun 	}
3770*4882a593Smuzhiyun 
3771*4882a593Smuzhiyun 	mib.default_key = priv->default_key;
3772*4882a593Smuzhiyun 	mib.exclude_unencrypted = priv->exclude_unencrypted;
3773*4882a593Smuzhiyun 
3774*4882a593Smuzhiyun 	for (i = 0; i < MAX_ENCRYPTION_KEYS; i++)
3775*4882a593Smuzhiyun 		memcpy(mib.wep_keys[i], priv->wep_keys[i], 13);
3776*4882a593Smuzhiyun 
3777*4882a593Smuzhiyun 	atmel_set_mib(priv, Mac_Wep_Mib_Type, 0, (u8 *)&mib, sizeof(mib));
3778*4882a593Smuzhiyun }
3779*4882a593Smuzhiyun 
build_wpa_mib(struct atmel_private * priv)3780*4882a593Smuzhiyun static void build_wpa_mib(struct atmel_private *priv)
3781*4882a593Smuzhiyun {
3782*4882a593Smuzhiyun 	/* This is for the later (WPA enabled) firmware. */
3783*4882a593Smuzhiyun 
3784*4882a593Smuzhiyun 	struct { /* NB this is matched to the hardware, don't change. */
3785*4882a593Smuzhiyun 		u8 cipher_default_key_value[MAX_ENCRYPTION_KEYS][MAX_ENCRYPTION_KEY_SIZE];
3786*4882a593Smuzhiyun 		u8 receiver_address[ETH_ALEN];
3787*4882a593Smuzhiyun 		u8 wep_is_on;
3788*4882a593Smuzhiyun 		u8 default_key; /* 0..3 */
3789*4882a593Smuzhiyun 		u8 group_key;
3790*4882a593Smuzhiyun 		u8 exclude_unencrypted;
3791*4882a593Smuzhiyun 		u8 encryption_type;
3792*4882a593Smuzhiyun 		u8 reserved;
3793*4882a593Smuzhiyun 
3794*4882a593Smuzhiyun 		u32 WEPICV_error_count;
3795*4882a593Smuzhiyun 		u32 WEP_excluded_count;
3796*4882a593Smuzhiyun 
3797*4882a593Smuzhiyun 		u8 key_RSC[4][8];
3798*4882a593Smuzhiyun 	} mib;
3799*4882a593Smuzhiyun 
3800*4882a593Smuzhiyun 	int i;
3801*4882a593Smuzhiyun 
3802*4882a593Smuzhiyun 	mib.wep_is_on = priv->wep_is_on;
3803*4882a593Smuzhiyun 	mib.exclude_unencrypted = priv->exclude_unencrypted;
3804*4882a593Smuzhiyun 	memcpy(mib.receiver_address, priv->CurrentBSSID, ETH_ALEN);
3805*4882a593Smuzhiyun 
3806*4882a593Smuzhiyun 	/* zero all the keys before adding in valid ones. */
3807*4882a593Smuzhiyun 	memset(mib.cipher_default_key_value, 0, sizeof(mib.cipher_default_key_value));
3808*4882a593Smuzhiyun 
3809*4882a593Smuzhiyun 	if (priv->wep_is_on) {
3810*4882a593Smuzhiyun 		/* There's a comment in the Atmel code to the effect that this
3811*4882a593Smuzhiyun 		   is only valid when still using WEP, it may need to be set to
3812*4882a593Smuzhiyun 		   something to use WPA */
3813*4882a593Smuzhiyun 		memset(mib.key_RSC, 0, sizeof(mib.key_RSC));
3814*4882a593Smuzhiyun 
3815*4882a593Smuzhiyun 		mib.default_key = mib.group_key = 255;
3816*4882a593Smuzhiyun 		for (i = 0; i < MAX_ENCRYPTION_KEYS; i++) {
3817*4882a593Smuzhiyun 			if (priv->wep_key_len[i] > 0) {
3818*4882a593Smuzhiyun 				memcpy(mib.cipher_default_key_value[i], priv->wep_keys[i], MAX_ENCRYPTION_KEY_SIZE);
3819*4882a593Smuzhiyun 				if (i == priv->default_key) {
3820*4882a593Smuzhiyun 					mib.default_key = i;
3821*4882a593Smuzhiyun 					mib.cipher_default_key_value[i][MAX_ENCRYPTION_KEY_SIZE-1] = 7;
3822*4882a593Smuzhiyun 					mib.cipher_default_key_value[i][MAX_ENCRYPTION_KEY_SIZE-2] = priv->pairwise_cipher_suite;
3823*4882a593Smuzhiyun 				} else {
3824*4882a593Smuzhiyun 					mib.group_key = i;
3825*4882a593Smuzhiyun 					priv->group_cipher_suite = priv->pairwise_cipher_suite;
3826*4882a593Smuzhiyun 					mib.cipher_default_key_value[i][MAX_ENCRYPTION_KEY_SIZE-1] = 1;
3827*4882a593Smuzhiyun 					mib.cipher_default_key_value[i][MAX_ENCRYPTION_KEY_SIZE-2] = priv->group_cipher_suite;
3828*4882a593Smuzhiyun 				}
3829*4882a593Smuzhiyun 			}
3830*4882a593Smuzhiyun 		}
3831*4882a593Smuzhiyun 		if (mib.default_key == 255)
3832*4882a593Smuzhiyun 			mib.default_key = mib.group_key != 255 ? mib.group_key : 0;
3833*4882a593Smuzhiyun 		if (mib.group_key == 255)
3834*4882a593Smuzhiyun 			mib.group_key = mib.default_key;
3835*4882a593Smuzhiyun 
3836*4882a593Smuzhiyun 	}
3837*4882a593Smuzhiyun 
3838*4882a593Smuzhiyun 	atmel_set_mib(priv, Mac_Wep_Mib_Type, 0, (u8 *)&mib, sizeof(mib));
3839*4882a593Smuzhiyun }
3840*4882a593Smuzhiyun 
reset_atmel_card(struct net_device * dev)3841*4882a593Smuzhiyun static int reset_atmel_card(struct net_device *dev)
3842*4882a593Smuzhiyun {
3843*4882a593Smuzhiyun 	/* do everything necessary to wake up the hardware, including
3844*4882a593Smuzhiyun 	   waiting for the lightning strike and throwing the knife switch....
3845*4882a593Smuzhiyun 
3846*4882a593Smuzhiyun 	   set all the Mib values which matter in the card to match
3847*4882a593Smuzhiyun 	   their settings in the atmel_private structure. Some of these
3848*4882a593Smuzhiyun 	   can be altered on the fly, but many (WEP, infrastructure or ad-hoc)
3849*4882a593Smuzhiyun 	   can only be changed by tearing down the world and coming back through
3850*4882a593Smuzhiyun 	   here.
3851*4882a593Smuzhiyun 
3852*4882a593Smuzhiyun 	   This routine is also responsible for initialising some
3853*4882a593Smuzhiyun 	   hardware-specific fields in the atmel_private structure,
3854*4882a593Smuzhiyun 	   including a copy of the firmware's hostinfo structure
3855*4882a593Smuzhiyun 	   which is the route into the rest of the firmware datastructures. */
3856*4882a593Smuzhiyun 
3857*4882a593Smuzhiyun 	struct atmel_private *priv = netdev_priv(dev);
3858*4882a593Smuzhiyun 	u8 configuration;
3859*4882a593Smuzhiyun 	int old_state = priv->station_state;
3860*4882a593Smuzhiyun 	int err = 0;
3861*4882a593Smuzhiyun 
3862*4882a593Smuzhiyun 	/* data to add to the firmware names, in priority order
3863*4882a593Smuzhiyun 	   this implemenents firmware versioning */
3864*4882a593Smuzhiyun 
3865*4882a593Smuzhiyun 	static char *firmware_modifier[] = {
3866*4882a593Smuzhiyun 		"-wpa",
3867*4882a593Smuzhiyun 		"",
3868*4882a593Smuzhiyun 		NULL
3869*4882a593Smuzhiyun 	};
3870*4882a593Smuzhiyun 
3871*4882a593Smuzhiyun 	/* reset pccard */
3872*4882a593Smuzhiyun 	if (priv->bus_type == BUS_TYPE_PCCARD)
3873*4882a593Smuzhiyun 		atmel_write16(priv->dev, GCR, 0x0060);
3874*4882a593Smuzhiyun 
3875*4882a593Smuzhiyun 	/* stop card , disable interrupts */
3876*4882a593Smuzhiyun 	atmel_write16(priv->dev, GCR, 0x0040);
3877*4882a593Smuzhiyun 
3878*4882a593Smuzhiyun 	if (priv->card_type == CARD_TYPE_EEPROM) {
3879*4882a593Smuzhiyun 		/* copy in firmware if needed */
3880*4882a593Smuzhiyun 		const struct firmware *fw_entry = NULL;
3881*4882a593Smuzhiyun 		const unsigned char *fw;
3882*4882a593Smuzhiyun 		int len = priv->firmware_length;
3883*4882a593Smuzhiyun 		if (!(fw = priv->firmware)) {
3884*4882a593Smuzhiyun 			if (priv->firmware_type == ATMEL_FW_TYPE_NONE) {
3885*4882a593Smuzhiyun 				if (strlen(priv->firmware_id) == 0) {
3886*4882a593Smuzhiyun 					printk(KERN_INFO
3887*4882a593Smuzhiyun 					       "%s: card type is unknown: assuming at76c502 firmware is OK.\n",
3888*4882a593Smuzhiyun 					       dev->name);
3889*4882a593Smuzhiyun 					printk(KERN_INFO
3890*4882a593Smuzhiyun 					       "%s: if not, use the firmware= module parameter.\n",
3891*4882a593Smuzhiyun 					       dev->name);
3892*4882a593Smuzhiyun 					strcpy(priv->firmware_id, "atmel_at76c502.bin");
3893*4882a593Smuzhiyun 				}
3894*4882a593Smuzhiyun 				err = request_firmware(&fw_entry, priv->firmware_id, priv->sys_dev);
3895*4882a593Smuzhiyun 				if (err != 0) {
3896*4882a593Smuzhiyun 					printk(KERN_ALERT
3897*4882a593Smuzhiyun 					       "%s: firmware %s is missing, cannot continue.\n",
3898*4882a593Smuzhiyun 					       dev->name, priv->firmware_id);
3899*4882a593Smuzhiyun 					return err;
3900*4882a593Smuzhiyun 				}
3901*4882a593Smuzhiyun 			} else {
3902*4882a593Smuzhiyun 				int fw_index = 0;
3903*4882a593Smuzhiyun 				int success = 0;
3904*4882a593Smuzhiyun 
3905*4882a593Smuzhiyun 				/* get firmware filename entry based on firmware type ID */
3906*4882a593Smuzhiyun 				while (fw_table[fw_index].fw_type != priv->firmware_type
3907*4882a593Smuzhiyun 						&& fw_table[fw_index].fw_type != ATMEL_FW_TYPE_NONE)
3908*4882a593Smuzhiyun 					fw_index++;
3909*4882a593Smuzhiyun 
3910*4882a593Smuzhiyun 				/* construct the actual firmware file name */
3911*4882a593Smuzhiyun 				if (fw_table[fw_index].fw_type != ATMEL_FW_TYPE_NONE) {
3912*4882a593Smuzhiyun 					int i;
3913*4882a593Smuzhiyun 					for (i = 0; firmware_modifier[i]; i++) {
3914*4882a593Smuzhiyun 						snprintf(priv->firmware_id, 32, "%s%s.%s", fw_table[fw_index].fw_file,
3915*4882a593Smuzhiyun 							firmware_modifier[i], fw_table[fw_index].fw_file_ext);
3916*4882a593Smuzhiyun 						priv->firmware_id[31] = '\0';
3917*4882a593Smuzhiyun 						if (request_firmware(&fw_entry, priv->firmware_id, priv->sys_dev) == 0) {
3918*4882a593Smuzhiyun 							success = 1;
3919*4882a593Smuzhiyun 							break;
3920*4882a593Smuzhiyun 						}
3921*4882a593Smuzhiyun 					}
3922*4882a593Smuzhiyun 				}
3923*4882a593Smuzhiyun 				if (!success) {
3924*4882a593Smuzhiyun 					printk(KERN_ALERT
3925*4882a593Smuzhiyun 					       "%s: firmware %s is missing, cannot start.\n",
3926*4882a593Smuzhiyun 					       dev->name, priv->firmware_id);
3927*4882a593Smuzhiyun 					priv->firmware_id[0] = '\0';
3928*4882a593Smuzhiyun 					return -ENOENT;
3929*4882a593Smuzhiyun 				}
3930*4882a593Smuzhiyun 			}
3931*4882a593Smuzhiyun 
3932*4882a593Smuzhiyun 			fw = fw_entry->data;
3933*4882a593Smuzhiyun 			len = fw_entry->size;
3934*4882a593Smuzhiyun 		}
3935*4882a593Smuzhiyun 
3936*4882a593Smuzhiyun 		if (len <= 0x6000) {
3937*4882a593Smuzhiyun 			atmel_write16(priv->dev, BSR, BSS_IRAM);
3938*4882a593Smuzhiyun 			atmel_copy_to_card(priv->dev, 0, fw, len);
3939*4882a593Smuzhiyun 			atmel_set_gcr(priv->dev, GCR_REMAP);
3940*4882a593Smuzhiyun 		} else {
3941*4882a593Smuzhiyun 			/* Remap */
3942*4882a593Smuzhiyun 			atmel_set_gcr(priv->dev, GCR_REMAP);
3943*4882a593Smuzhiyun 			atmel_write16(priv->dev, BSR, BSS_IRAM);
3944*4882a593Smuzhiyun 			atmel_copy_to_card(priv->dev, 0, fw, 0x6000);
3945*4882a593Smuzhiyun 			atmel_write16(priv->dev, BSR, 0x2ff);
3946*4882a593Smuzhiyun 			atmel_copy_to_card(priv->dev, 0x8000, &fw[0x6000], len - 0x6000);
3947*4882a593Smuzhiyun 		}
3948*4882a593Smuzhiyun 
3949*4882a593Smuzhiyun 		release_firmware(fw_entry);
3950*4882a593Smuzhiyun 	}
3951*4882a593Smuzhiyun 
3952*4882a593Smuzhiyun 	err = atmel_wakeup_firmware(priv);
3953*4882a593Smuzhiyun 	if (err != 0)
3954*4882a593Smuzhiyun 		return err;
3955*4882a593Smuzhiyun 
3956*4882a593Smuzhiyun 	/* Check the version and set the correct flag for wpa stuff,
3957*4882a593Smuzhiyun 	   old and new firmware is incompatible.
3958*4882a593Smuzhiyun 	   The pre-wpa 3com firmware reports major version 5,
3959*4882a593Smuzhiyun 	   the wpa 3com firmware is major version 4 and doesn't need
3960*4882a593Smuzhiyun 	   the 3com broken-ness filter. */
3961*4882a593Smuzhiyun 	priv->use_wpa = (priv->host_info.major_version == 4);
3962*4882a593Smuzhiyun 	priv->radio_on_broken = (priv->host_info.major_version == 5);
3963*4882a593Smuzhiyun 
3964*4882a593Smuzhiyun 	/* unmask all irq sources */
3965*4882a593Smuzhiyun 	atmel_wmem8(priv, atmel_hi(priv, IFACE_INT_MASK_OFFSET), 0xff);
3966*4882a593Smuzhiyun 
3967*4882a593Smuzhiyun 	/* int Tx system and enable Tx */
3968*4882a593Smuzhiyun 	atmel_wmem8(priv, atmel_tx(priv, TX_DESC_FLAGS_OFFSET, 0), 0);
3969*4882a593Smuzhiyun 	atmel_wmem32(priv, atmel_tx(priv, TX_DESC_NEXT_OFFSET, 0), 0x80000000L);
3970*4882a593Smuzhiyun 	atmel_wmem16(priv, atmel_tx(priv, TX_DESC_POS_OFFSET, 0), 0);
3971*4882a593Smuzhiyun 	atmel_wmem16(priv, atmel_tx(priv, TX_DESC_SIZE_OFFSET, 0), 0);
3972*4882a593Smuzhiyun 
3973*4882a593Smuzhiyun 	priv->tx_desc_free = priv->host_info.tx_desc_count;
3974*4882a593Smuzhiyun 	priv->tx_desc_head = 0;
3975*4882a593Smuzhiyun 	priv->tx_desc_tail = 0;
3976*4882a593Smuzhiyun 	priv->tx_desc_previous = 0;
3977*4882a593Smuzhiyun 	priv->tx_free_mem = priv->host_info.tx_buff_size;
3978*4882a593Smuzhiyun 	priv->tx_buff_head = 0;
3979*4882a593Smuzhiyun 	priv->tx_buff_tail = 0;
3980*4882a593Smuzhiyun 
3981*4882a593Smuzhiyun 	configuration = atmel_rmem8(priv, atmel_hi(priv, IFACE_FUNC_CTRL_OFFSET));
3982*4882a593Smuzhiyun 	atmel_wmem8(priv, atmel_hi(priv, IFACE_FUNC_CTRL_OFFSET),
3983*4882a593Smuzhiyun 				   configuration | FUNC_CTRL_TxENABLE);
3984*4882a593Smuzhiyun 
3985*4882a593Smuzhiyun 	/* init Rx system and enable */
3986*4882a593Smuzhiyun 	priv->rx_desc_head = 0;
3987*4882a593Smuzhiyun 
3988*4882a593Smuzhiyun 	configuration = atmel_rmem8(priv, atmel_hi(priv, IFACE_FUNC_CTRL_OFFSET));
3989*4882a593Smuzhiyun 	atmel_wmem8(priv, atmel_hi(priv, IFACE_FUNC_CTRL_OFFSET),
3990*4882a593Smuzhiyun 				   configuration | FUNC_CTRL_RxENABLE);
3991*4882a593Smuzhiyun 
3992*4882a593Smuzhiyun 	if (!priv->radio_on_broken) {
3993*4882a593Smuzhiyun 		if (atmel_send_command_wait(priv, CMD_EnableRadio, NULL, 0) ==
3994*4882a593Smuzhiyun 		    CMD_STATUS_REJECTED_RADIO_OFF) {
3995*4882a593Smuzhiyun 			printk(KERN_INFO "%s: cannot turn the radio on.\n",
3996*4882a593Smuzhiyun 			       dev->name);
3997*4882a593Smuzhiyun 			return -EIO;
3998*4882a593Smuzhiyun 		}
3999*4882a593Smuzhiyun 	}
4000*4882a593Smuzhiyun 
4001*4882a593Smuzhiyun 	/* set up enough MIB values to run. */
4002*4882a593Smuzhiyun 	atmel_set_mib8(priv, Local_Mib_Type, LOCAL_MIB_AUTO_TX_RATE_POS, priv->auto_tx_rate);
4003*4882a593Smuzhiyun 	atmel_set_mib8(priv, Local_Mib_Type,  LOCAL_MIB_TX_PROMISCUOUS_POS,  PROM_MODE_OFF);
4004*4882a593Smuzhiyun 	atmel_set_mib16(priv, Mac_Mib_Type, MAC_MIB_RTS_THRESHOLD_POS, priv->rts_threshold);
4005*4882a593Smuzhiyun 	atmel_set_mib16(priv, Mac_Mib_Type, MAC_MIB_FRAG_THRESHOLD_POS, priv->frag_threshold);
4006*4882a593Smuzhiyun 	atmel_set_mib8(priv, Mac_Mib_Type, MAC_MIB_SHORT_RETRY_POS, priv->short_retry);
4007*4882a593Smuzhiyun 	atmel_set_mib8(priv, Mac_Mib_Type, MAC_MIB_LONG_RETRY_POS, priv->long_retry);
4008*4882a593Smuzhiyun 	atmel_set_mib8(priv, Local_Mib_Type, LOCAL_MIB_PREAMBLE_TYPE, priv->preamble);
4009*4882a593Smuzhiyun 	atmel_set_mib(priv, Mac_Address_Mib_Type, MAC_ADDR_MIB_MAC_ADDR_POS,
4010*4882a593Smuzhiyun 		      priv->dev->dev_addr, 6);
4011*4882a593Smuzhiyun 	atmel_set_mib8(priv, Mac_Mgmt_Mib_Type, MAC_MGMT_MIB_PS_MODE_POS, ACTIVE_MODE);
4012*4882a593Smuzhiyun 	atmel_set_mib16(priv, Mac_Mgmt_Mib_Type, MAC_MGMT_MIB_LISTEN_INTERVAL_POS, 1);
4013*4882a593Smuzhiyun 	atmel_set_mib16(priv, Mac_Mgmt_Mib_Type, MAC_MGMT_MIB_BEACON_PER_POS, priv->default_beacon_period);
4014*4882a593Smuzhiyun 	atmel_set_mib(priv, Phy_Mib_Type, PHY_MIB_RATE_SET_POS, atmel_basic_rates, 4);
4015*4882a593Smuzhiyun 	atmel_set_mib8(priv, Mac_Mgmt_Mib_Type, MAC_MGMT_MIB_CUR_PRIVACY_POS, priv->wep_is_on);
4016*4882a593Smuzhiyun 	if (priv->use_wpa)
4017*4882a593Smuzhiyun 		build_wpa_mib(priv);
4018*4882a593Smuzhiyun 	else
4019*4882a593Smuzhiyun 		build_wep_mib(priv);
4020*4882a593Smuzhiyun 
4021*4882a593Smuzhiyun 	if (old_state == STATION_STATE_READY) {
4022*4882a593Smuzhiyun 		union iwreq_data wrqu;
4023*4882a593Smuzhiyun 
4024*4882a593Smuzhiyun 		wrqu.data.length = 0;
4025*4882a593Smuzhiyun 		wrqu.data.flags = 0;
4026*4882a593Smuzhiyun 		wrqu.ap_addr.sa_family = ARPHRD_ETHER;
4027*4882a593Smuzhiyun 		eth_zero_addr(wrqu.ap_addr.sa_data);
4028*4882a593Smuzhiyun 		wireless_send_event(priv->dev, SIOCGIWAP, &wrqu, NULL);
4029*4882a593Smuzhiyun 	}
4030*4882a593Smuzhiyun 
4031*4882a593Smuzhiyun 	return 0;
4032*4882a593Smuzhiyun }
4033*4882a593Smuzhiyun 
atmel_send_command(struct atmel_private * priv,int command,void * cmd,int cmd_size)4034*4882a593Smuzhiyun static void atmel_send_command(struct atmel_private *priv, int command,
4035*4882a593Smuzhiyun 			       void *cmd, int cmd_size)
4036*4882a593Smuzhiyun {
4037*4882a593Smuzhiyun 	if (cmd)
4038*4882a593Smuzhiyun 		atmel_copy_to_card(priv->dev, atmel_co(priv, CMD_BLOCK_PARAMETERS_OFFSET),
4039*4882a593Smuzhiyun 				   cmd, cmd_size);
4040*4882a593Smuzhiyun 
4041*4882a593Smuzhiyun 	atmel_wmem8(priv, atmel_co(priv, CMD_BLOCK_COMMAND_OFFSET), command);
4042*4882a593Smuzhiyun 	atmel_wmem8(priv, atmel_co(priv, CMD_BLOCK_STATUS_OFFSET), 0);
4043*4882a593Smuzhiyun }
4044*4882a593Smuzhiyun 
atmel_send_command_wait(struct atmel_private * priv,int command,void * cmd,int cmd_size)4045*4882a593Smuzhiyun static int atmel_send_command_wait(struct atmel_private *priv, int command,
4046*4882a593Smuzhiyun 				   void *cmd, int cmd_size)
4047*4882a593Smuzhiyun {
4048*4882a593Smuzhiyun 	int i, status;
4049*4882a593Smuzhiyun 
4050*4882a593Smuzhiyun 	atmel_send_command(priv, command, cmd, cmd_size);
4051*4882a593Smuzhiyun 
4052*4882a593Smuzhiyun 	for (i = 5000; i; i--) {
4053*4882a593Smuzhiyun 		status = atmel_rmem8(priv, atmel_co(priv, CMD_BLOCK_STATUS_OFFSET));
4054*4882a593Smuzhiyun 		if (status != CMD_STATUS_IDLE &&
4055*4882a593Smuzhiyun 		    status != CMD_STATUS_IN_PROGRESS)
4056*4882a593Smuzhiyun 			break;
4057*4882a593Smuzhiyun 		udelay(20);
4058*4882a593Smuzhiyun 	}
4059*4882a593Smuzhiyun 
4060*4882a593Smuzhiyun 	if (i == 0) {
4061*4882a593Smuzhiyun 		printk(KERN_ALERT "%s: failed to contact MAC.\n", priv->dev->name);
4062*4882a593Smuzhiyun 		status =  CMD_STATUS_HOST_ERROR;
4063*4882a593Smuzhiyun 	} else {
4064*4882a593Smuzhiyun 		if (command != CMD_EnableRadio)
4065*4882a593Smuzhiyun 			status = CMD_STATUS_COMPLETE;
4066*4882a593Smuzhiyun 	}
4067*4882a593Smuzhiyun 
4068*4882a593Smuzhiyun 	return status;
4069*4882a593Smuzhiyun }
4070*4882a593Smuzhiyun 
atmel_get_mib8(struct atmel_private * priv,u8 type,u8 index)4071*4882a593Smuzhiyun static u8 atmel_get_mib8(struct atmel_private *priv, u8 type, u8 index)
4072*4882a593Smuzhiyun {
4073*4882a593Smuzhiyun 	struct get_set_mib m;
4074*4882a593Smuzhiyun 	m.type = type;
4075*4882a593Smuzhiyun 	m.size = 1;
4076*4882a593Smuzhiyun 	m.index = index;
4077*4882a593Smuzhiyun 
4078*4882a593Smuzhiyun 	atmel_send_command_wait(priv, CMD_Get_MIB_Vars, &m, MIB_HEADER_SIZE + 1);
4079*4882a593Smuzhiyun 	return atmel_rmem8(priv, atmel_co(priv, CMD_BLOCK_PARAMETERS_OFFSET + MIB_HEADER_SIZE));
4080*4882a593Smuzhiyun }
4081*4882a593Smuzhiyun 
atmel_set_mib8(struct atmel_private * priv,u8 type,u8 index,u8 data)4082*4882a593Smuzhiyun static void atmel_set_mib8(struct atmel_private *priv, u8 type, u8 index, u8 data)
4083*4882a593Smuzhiyun {
4084*4882a593Smuzhiyun 	struct get_set_mib m;
4085*4882a593Smuzhiyun 	m.type = type;
4086*4882a593Smuzhiyun 	m.size = 1;
4087*4882a593Smuzhiyun 	m.index = index;
4088*4882a593Smuzhiyun 	m.data[0] = data;
4089*4882a593Smuzhiyun 
4090*4882a593Smuzhiyun 	atmel_send_command_wait(priv, CMD_Set_MIB_Vars, &m, MIB_HEADER_SIZE + 1);
4091*4882a593Smuzhiyun }
4092*4882a593Smuzhiyun 
atmel_set_mib16(struct atmel_private * priv,u8 type,u8 index,u16 data)4093*4882a593Smuzhiyun static void atmel_set_mib16(struct atmel_private *priv, u8 type, u8 index,
4094*4882a593Smuzhiyun 			    u16 data)
4095*4882a593Smuzhiyun {
4096*4882a593Smuzhiyun 	struct get_set_mib m;
4097*4882a593Smuzhiyun 	m.type = type;
4098*4882a593Smuzhiyun 	m.size = 2;
4099*4882a593Smuzhiyun 	m.index = index;
4100*4882a593Smuzhiyun 	m.data[0] = data;
4101*4882a593Smuzhiyun 	m.data[1] = data >> 8;
4102*4882a593Smuzhiyun 
4103*4882a593Smuzhiyun 	atmel_send_command_wait(priv, CMD_Set_MIB_Vars, &m, MIB_HEADER_SIZE + 2);
4104*4882a593Smuzhiyun }
4105*4882a593Smuzhiyun 
atmel_set_mib(struct atmel_private * priv,u8 type,u8 index,u8 * data,int data_len)4106*4882a593Smuzhiyun static void atmel_set_mib(struct atmel_private *priv, u8 type, u8 index,
4107*4882a593Smuzhiyun 			  u8 *data, int data_len)
4108*4882a593Smuzhiyun {
4109*4882a593Smuzhiyun 	struct get_set_mib m;
4110*4882a593Smuzhiyun 	m.type = type;
4111*4882a593Smuzhiyun 	m.size = data_len;
4112*4882a593Smuzhiyun 	m.index = index;
4113*4882a593Smuzhiyun 
4114*4882a593Smuzhiyun 	if (data_len > MIB_MAX_DATA_BYTES)
4115*4882a593Smuzhiyun 		printk(KERN_ALERT "%s: MIB buffer too small.\n", priv->dev->name);
4116*4882a593Smuzhiyun 
4117*4882a593Smuzhiyun 	memcpy(m.data, data, data_len);
4118*4882a593Smuzhiyun 	atmel_send_command_wait(priv, CMD_Set_MIB_Vars, &m, MIB_HEADER_SIZE + data_len);
4119*4882a593Smuzhiyun }
4120*4882a593Smuzhiyun 
atmel_get_mib(struct atmel_private * priv,u8 type,u8 index,u8 * data,int data_len)4121*4882a593Smuzhiyun static void atmel_get_mib(struct atmel_private *priv, u8 type, u8 index,
4122*4882a593Smuzhiyun 			  u8 *data, int data_len)
4123*4882a593Smuzhiyun {
4124*4882a593Smuzhiyun 	struct get_set_mib m;
4125*4882a593Smuzhiyun 	m.type = type;
4126*4882a593Smuzhiyun 	m.size = data_len;
4127*4882a593Smuzhiyun 	m.index = index;
4128*4882a593Smuzhiyun 
4129*4882a593Smuzhiyun 	if (data_len > MIB_MAX_DATA_BYTES)
4130*4882a593Smuzhiyun 		printk(KERN_ALERT "%s: MIB buffer too small.\n", priv->dev->name);
4131*4882a593Smuzhiyun 
4132*4882a593Smuzhiyun 	atmel_send_command_wait(priv, CMD_Get_MIB_Vars, &m, MIB_HEADER_SIZE + data_len);
4133*4882a593Smuzhiyun 	atmel_copy_to_host(priv->dev, data,
4134*4882a593Smuzhiyun 			   atmel_co(priv, CMD_BLOCK_PARAMETERS_OFFSET + MIB_HEADER_SIZE), data_len);
4135*4882a593Smuzhiyun }
4136*4882a593Smuzhiyun 
atmel_writeAR(struct net_device * dev,u16 data)4137*4882a593Smuzhiyun static void atmel_writeAR(struct net_device *dev, u16 data)
4138*4882a593Smuzhiyun {
4139*4882a593Smuzhiyun 	int i;
4140*4882a593Smuzhiyun 	outw(data, dev->base_addr + AR);
4141*4882a593Smuzhiyun 	/* Address register appears to need some convincing..... */
4142*4882a593Smuzhiyun 	for (i = 0; data != inw(dev->base_addr + AR) && i < 10; i++)
4143*4882a593Smuzhiyun 		outw(data, dev->base_addr + AR);
4144*4882a593Smuzhiyun }
4145*4882a593Smuzhiyun 
atmel_copy_to_card(struct net_device * dev,u16 dest,const unsigned char * src,u16 len)4146*4882a593Smuzhiyun static void atmel_copy_to_card(struct net_device *dev, u16 dest,
4147*4882a593Smuzhiyun 			       const unsigned char *src, u16 len)
4148*4882a593Smuzhiyun {
4149*4882a593Smuzhiyun 	int i;
4150*4882a593Smuzhiyun 	atmel_writeAR(dev, dest);
4151*4882a593Smuzhiyun 	if (dest % 2) {
4152*4882a593Smuzhiyun 		atmel_write8(dev, DR, *src);
4153*4882a593Smuzhiyun 		src++; len--;
4154*4882a593Smuzhiyun 	}
4155*4882a593Smuzhiyun 	for (i = len; i > 1 ; i -= 2) {
4156*4882a593Smuzhiyun 		u8 lb = *src++;
4157*4882a593Smuzhiyun 		u8 hb = *src++;
4158*4882a593Smuzhiyun 		atmel_write16(dev, DR, lb | (hb << 8));
4159*4882a593Smuzhiyun 	}
4160*4882a593Smuzhiyun 	if (i)
4161*4882a593Smuzhiyun 		atmel_write8(dev, DR, *src);
4162*4882a593Smuzhiyun }
4163*4882a593Smuzhiyun 
atmel_copy_to_host(struct net_device * dev,unsigned char * dest,u16 src,u16 len)4164*4882a593Smuzhiyun static void atmel_copy_to_host(struct net_device *dev, unsigned char *dest,
4165*4882a593Smuzhiyun 			       u16 src, u16 len)
4166*4882a593Smuzhiyun {
4167*4882a593Smuzhiyun 	int i;
4168*4882a593Smuzhiyun 	atmel_writeAR(dev, src);
4169*4882a593Smuzhiyun 	if (src % 2) {
4170*4882a593Smuzhiyun 		*dest = atmel_read8(dev, DR);
4171*4882a593Smuzhiyun 		dest++; len--;
4172*4882a593Smuzhiyun 	}
4173*4882a593Smuzhiyun 	for (i = len; i > 1 ; i -= 2) {
4174*4882a593Smuzhiyun 		u16 hw = atmel_read16(dev, DR);
4175*4882a593Smuzhiyun 		*dest++ = hw;
4176*4882a593Smuzhiyun 		*dest++ = hw >> 8;
4177*4882a593Smuzhiyun 	}
4178*4882a593Smuzhiyun 	if (i)
4179*4882a593Smuzhiyun 		*dest = atmel_read8(dev, DR);
4180*4882a593Smuzhiyun }
4181*4882a593Smuzhiyun 
atmel_set_gcr(struct net_device * dev,u16 mask)4182*4882a593Smuzhiyun static void atmel_set_gcr(struct net_device *dev, u16 mask)
4183*4882a593Smuzhiyun {
4184*4882a593Smuzhiyun 	outw(inw(dev->base_addr + GCR) | mask, dev->base_addr + GCR);
4185*4882a593Smuzhiyun }
4186*4882a593Smuzhiyun 
atmel_clear_gcr(struct net_device * dev,u16 mask)4187*4882a593Smuzhiyun static void atmel_clear_gcr(struct net_device *dev, u16 mask)
4188*4882a593Smuzhiyun {
4189*4882a593Smuzhiyun 	outw(inw(dev->base_addr + GCR) & ~mask, dev->base_addr + GCR);
4190*4882a593Smuzhiyun }
4191*4882a593Smuzhiyun 
atmel_lock_mac(struct atmel_private * priv)4192*4882a593Smuzhiyun static int atmel_lock_mac(struct atmel_private *priv)
4193*4882a593Smuzhiyun {
4194*4882a593Smuzhiyun 	int i, j = 20;
4195*4882a593Smuzhiyun  retry:
4196*4882a593Smuzhiyun 	for (i = 5000; i; i--) {
4197*4882a593Smuzhiyun 		if (!atmel_rmem8(priv, atmel_hi(priv, IFACE_LOCKOUT_HOST_OFFSET)))
4198*4882a593Smuzhiyun 			break;
4199*4882a593Smuzhiyun 		udelay(20);
4200*4882a593Smuzhiyun 	}
4201*4882a593Smuzhiyun 
4202*4882a593Smuzhiyun 	if (!i)
4203*4882a593Smuzhiyun 		return 0; /* timed out */
4204*4882a593Smuzhiyun 
4205*4882a593Smuzhiyun 	atmel_wmem8(priv, atmel_hi(priv, IFACE_LOCKOUT_MAC_OFFSET), 1);
4206*4882a593Smuzhiyun 	if (atmel_rmem8(priv, atmel_hi(priv, IFACE_LOCKOUT_HOST_OFFSET))) {
4207*4882a593Smuzhiyun 		atmel_wmem8(priv, atmel_hi(priv, IFACE_LOCKOUT_MAC_OFFSET), 0);
4208*4882a593Smuzhiyun 		if (!j--)
4209*4882a593Smuzhiyun 			return 0; /* timed out */
4210*4882a593Smuzhiyun 		goto retry;
4211*4882a593Smuzhiyun 	}
4212*4882a593Smuzhiyun 
4213*4882a593Smuzhiyun 	return 1;
4214*4882a593Smuzhiyun }
4215*4882a593Smuzhiyun 
atmel_wmem32(struct atmel_private * priv,u16 pos,u32 data)4216*4882a593Smuzhiyun static void atmel_wmem32(struct atmel_private *priv, u16 pos, u32 data)
4217*4882a593Smuzhiyun {
4218*4882a593Smuzhiyun 	atmel_writeAR(priv->dev, pos);
4219*4882a593Smuzhiyun 	atmel_write16(priv->dev, DR, data); /* card is little-endian */
4220*4882a593Smuzhiyun 	atmel_write16(priv->dev, DR, data >> 16);
4221*4882a593Smuzhiyun }
4222*4882a593Smuzhiyun 
4223*4882a593Smuzhiyun /***************************************************************************/
4224*4882a593Smuzhiyun /* There follows the source form of the MAC address reading firmware       */
4225*4882a593Smuzhiyun /***************************************************************************/
4226*4882a593Smuzhiyun #if 0
4227*4882a593Smuzhiyun 
4228*4882a593Smuzhiyun /* Copyright 2003 Matthew T. Russotto                                      */
4229*4882a593Smuzhiyun /* But derived from the Atmel 76C502 firmware written by Atmel and         */
4230*4882a593Smuzhiyun /* included in "atmel wireless lan drivers" package                        */
4231*4882a593Smuzhiyun /*
4232*4882a593Smuzhiyun     This file is part of net.russotto.AtmelMACFW, hereto referred to
4233*4882a593Smuzhiyun     as AtmelMACFW
4234*4882a593Smuzhiyun 
4235*4882a593Smuzhiyun     AtmelMACFW is free software; you can redistribute it and/or modify
4236*4882a593Smuzhiyun     it under the terms of the GNU General Public License version 2
4237*4882a593Smuzhiyun     as published by the Free Software Foundation.
4238*4882a593Smuzhiyun 
4239*4882a593Smuzhiyun     AtmelMACFW is distributed in the hope that it will be useful,
4240*4882a593Smuzhiyun     but WITHOUT ANY WARRANTY; without even the implied warranty of
4241*4882a593Smuzhiyun     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
4242*4882a593Smuzhiyun     GNU General Public License for more details.
4243*4882a593Smuzhiyun 
4244*4882a593Smuzhiyun     You should have received a copy of the GNU General Public License
4245*4882a593Smuzhiyun     along with AtmelMACFW; if not, see <http://www.gnu.org/licenses/>.
4246*4882a593Smuzhiyun 
4247*4882a593Smuzhiyun ****************************************************************************/
4248*4882a593Smuzhiyun /* This firmware should work on the 76C502 RFMD, RFMD_D, and RFMD_E        */
4249*4882a593Smuzhiyun /* It will probably work on the 76C504 and 76C502 RFMD_3COM                */
4250*4882a593Smuzhiyun /* It only works on SPI EEPROM versions of the card.                       */
4251*4882a593Smuzhiyun 
4252*4882a593Smuzhiyun /* This firmware initializes the SPI controller and clock, reads the MAC   */
4253*4882a593Smuzhiyun /* address from the EEPROM into SRAM, and puts the SRAM offset of the MAC  */
4254*4882a593Smuzhiyun /* address in MR2, and sets MR3 to 0x10 to indicate it is done             */
4255*4882a593Smuzhiyun /* It also puts a complete copy of the EEPROM in SRAM with the offset in   */
4256*4882a593Smuzhiyun /* MR4, for investigational purposes (maybe we can determine chip type     */
4257*4882a593Smuzhiyun /* from that?)                                                             */
4258*4882a593Smuzhiyun 
4259*4882a593Smuzhiyun 	.org 0
4260*4882a593Smuzhiyun     .set MRBASE, 0x8000000
4261*4882a593Smuzhiyun 	.set CPSR_INITIAL, 0xD3 /* IRQ/FIQ disabled, ARM mode, Supervisor state */
4262*4882a593Smuzhiyun 	.set CPSR_USER, 0xD1 /* IRQ/FIQ disabled, ARM mode, USER state */
4263*4882a593Smuzhiyun 	.set SRAM_BASE,  0x02000000
4264*4882a593Smuzhiyun 	.set SP_BASE,    0x0F300000
4265*4882a593Smuzhiyun 	.set UNK_BASE,   0x0F000000 /* Some internal device, but which one? */
4266*4882a593Smuzhiyun 	.set SPI_CGEN_BASE,  0x0E000000 /* Some internal device, but which one? */
4267*4882a593Smuzhiyun 	.set UNK3_BASE,  0x02014000 /* Some internal device, but which one? */
4268*4882a593Smuzhiyun 	.set STACK_BASE, 0x5600
4269*4882a593Smuzhiyun 	.set SP_SR, 0x10
4270*4882a593Smuzhiyun 	.set SP_TDRE, 2 /* status register bit -- TDR empty */
4271*4882a593Smuzhiyun 	.set SP_RDRF, 1 /* status register bit -- RDR full */
4272*4882a593Smuzhiyun 	.set SP_SWRST, 0x80
4273*4882a593Smuzhiyun 	.set SP_SPIEN, 0x1
4274*4882a593Smuzhiyun 	.set SP_CR, 0   /* control register */
4275*4882a593Smuzhiyun 	.set SP_MR, 4   /* mode register */
4276*4882a593Smuzhiyun 	.set SP_RDR, 0x08 /* Read Data Register */
4277*4882a593Smuzhiyun 	.set SP_TDR, 0x0C /* Transmit Data Register */
4278*4882a593Smuzhiyun 	.set SP_CSR0, 0x30 /* chip select registers */
4279*4882a593Smuzhiyun 	.set SP_CSR1, 0x34
4280*4882a593Smuzhiyun 	.set SP_CSR2, 0x38
4281*4882a593Smuzhiyun 	.set SP_CSR3, 0x3C
4282*4882a593Smuzhiyun 	.set NVRAM_CMD_RDSR, 5 /* read status register */
4283*4882a593Smuzhiyun 	.set NVRAM_CMD_READ, 3 /* read data */
4284*4882a593Smuzhiyun 	.set NVRAM_SR_RDY, 1 /* RDY bit.  This bit is inverted */
4285*4882a593Smuzhiyun 	.set SPI_8CLOCKS, 0xFF /* Writing this to the TDR doesn't do anything to the
4286*4882a593Smuzhiyun 				  serial output, since SO is normally high.  But it
4287*4882a593Smuzhiyun 				  does cause 8 clock cycles and thus 8 bits to be
4288*4882a593Smuzhiyun 				  clocked in to the chip.  See Atmel's SPI
4289*4882a593Smuzhiyun 				  controller (e.g. AT91M55800) timing and 4K
4290*4882a593Smuzhiyun 				  SPI EEPROM manuals */
4291*4882a593Smuzhiyun 
4292*4882a593Smuzhiyun 	.set NVRAM_SCRATCH, 0x02000100  /* arbitrary area for scratchpad memory */
4293*4882a593Smuzhiyun 	.set NVRAM_IMAGE, 0x02000200
4294*4882a593Smuzhiyun 	.set NVRAM_LENGTH, 0x0200
4295*4882a593Smuzhiyun 	.set MAC_ADDRESS_MIB, SRAM_BASE
4296*4882a593Smuzhiyun 	.set MAC_ADDRESS_LENGTH, 6
4297*4882a593Smuzhiyun 	.set MAC_BOOT_FLAG, 0x10
4298*4882a593Smuzhiyun 	.set MR1, 0
4299*4882a593Smuzhiyun 	.set MR2, 4
4300*4882a593Smuzhiyun 	.set MR3, 8
4301*4882a593Smuzhiyun 	.set MR4, 0xC
4302*4882a593Smuzhiyun RESET_VECTOR:
4303*4882a593Smuzhiyun 	b RESET_HANDLER
4304*4882a593Smuzhiyun UNDEF_VECTOR:
4305*4882a593Smuzhiyun 	b HALT1
4306*4882a593Smuzhiyun SWI_VECTOR:
4307*4882a593Smuzhiyun 	b HALT1
4308*4882a593Smuzhiyun IABORT_VECTOR:
4309*4882a593Smuzhiyun 	b HALT1
4310*4882a593Smuzhiyun DABORT_VECTOR:
4311*4882a593Smuzhiyun RESERVED_VECTOR:
4312*4882a593Smuzhiyun 	b HALT1
4313*4882a593Smuzhiyun IRQ_VECTOR:
4314*4882a593Smuzhiyun 	b HALT1
4315*4882a593Smuzhiyun FIQ_VECTOR:
4316*4882a593Smuzhiyun 	b HALT1
4317*4882a593Smuzhiyun HALT1:	b HALT1
4318*4882a593Smuzhiyun RESET_HANDLER:
4319*4882a593Smuzhiyun 	mov     r0, #CPSR_INITIAL
4320*4882a593Smuzhiyun 	msr	CPSR_c, r0	/* This is probably unnecessary */
4321*4882a593Smuzhiyun 
4322*4882a593Smuzhiyun /* I'm guessing this is initializing clock generator electronics for SPI */
4323*4882a593Smuzhiyun 	ldr	r0, =SPI_CGEN_BASE
4324*4882a593Smuzhiyun 	mov	r1, #0
4325*4882a593Smuzhiyun 	mov	r1, r1, lsl #3
4326*4882a593Smuzhiyun 	orr	r1, r1, #0
4327*4882a593Smuzhiyun 	str	r1, [r0]
4328*4882a593Smuzhiyun 	ldr	r1, [r0, #28]
4329*4882a593Smuzhiyun 	bic	r1, r1, #16
4330*4882a593Smuzhiyun 	str	r1, [r0, #28]
4331*4882a593Smuzhiyun 	mov	r1, #1
4332*4882a593Smuzhiyun 	str	r1, [r0, #8]
4333*4882a593Smuzhiyun 
4334*4882a593Smuzhiyun 	ldr	r0, =MRBASE
4335*4882a593Smuzhiyun 	mov	r1, #0
4336*4882a593Smuzhiyun 	strh	r1, [r0, #MR1]
4337*4882a593Smuzhiyun 	strh	r1, [r0, #MR2]
4338*4882a593Smuzhiyun 	strh	r1, [r0, #MR3]
4339*4882a593Smuzhiyun 	strh	r1, [r0, #MR4]
4340*4882a593Smuzhiyun 
4341*4882a593Smuzhiyun 	mov	sp, #STACK_BASE
4342*4882a593Smuzhiyun 	bl	SP_INIT
4343*4882a593Smuzhiyun 	mov	r0, #10
4344*4882a593Smuzhiyun 	bl	DELAY9
4345*4882a593Smuzhiyun 	bl	GET_MAC_ADDR
4346*4882a593Smuzhiyun 	bl	GET_WHOLE_NVRAM
4347*4882a593Smuzhiyun 	ldr	r0, =MRBASE
4348*4882a593Smuzhiyun 	ldr	r1, =MAC_ADDRESS_MIB
4349*4882a593Smuzhiyun 	strh	r1, [r0, #MR2]
4350*4882a593Smuzhiyun 	ldr	r1, =NVRAM_IMAGE
4351*4882a593Smuzhiyun 	strh	r1, [r0, #MR4]
4352*4882a593Smuzhiyun 	mov	r1, #MAC_BOOT_FLAG
4353*4882a593Smuzhiyun 	strh	r1, [r0, #MR3]
4354*4882a593Smuzhiyun HALT2:	b HALT2
4355*4882a593Smuzhiyun .func Get_Whole_NVRAM, GET_WHOLE_NVRAM
4356*4882a593Smuzhiyun GET_WHOLE_NVRAM:
4357*4882a593Smuzhiyun 	stmdb	sp!, {lr}
4358*4882a593Smuzhiyun 	mov	r2, #0 /* 0th bytes of NVRAM */
4359*4882a593Smuzhiyun 	mov	r3, #NVRAM_LENGTH
4360*4882a593Smuzhiyun 	mov	r1, #0		/* not used in routine */
4361*4882a593Smuzhiyun 	ldr	r0, =NVRAM_IMAGE
4362*4882a593Smuzhiyun 	bl	NVRAM_XFER
4363*4882a593Smuzhiyun 	ldmia	sp!, {lr}
4364*4882a593Smuzhiyun 	bx	lr
4365*4882a593Smuzhiyun .endfunc
4366*4882a593Smuzhiyun 
4367*4882a593Smuzhiyun .func Get_MAC_Addr, GET_MAC_ADDR
4368*4882a593Smuzhiyun GET_MAC_ADDR:
4369*4882a593Smuzhiyun 	stmdb	sp!, {lr}
4370*4882a593Smuzhiyun 	mov	r2, #0x120	/* address of MAC Address within NVRAM */
4371*4882a593Smuzhiyun 	mov	r3, #MAC_ADDRESS_LENGTH
4372*4882a593Smuzhiyun 	mov	r1, #0		/* not used in routine */
4373*4882a593Smuzhiyun 	ldr	r0, =MAC_ADDRESS_MIB
4374*4882a593Smuzhiyun 	bl	NVRAM_XFER
4375*4882a593Smuzhiyun 	ldmia	sp!, {lr}
4376*4882a593Smuzhiyun 	bx	lr
4377*4882a593Smuzhiyun .endfunc
4378*4882a593Smuzhiyun .ltorg
4379*4882a593Smuzhiyun .func Delay9, DELAY9
4380*4882a593Smuzhiyun DELAY9:
4381*4882a593Smuzhiyun 	adds	r0, r0, r0, LSL #3   /* r0 = r0 * 9 */
4382*4882a593Smuzhiyun DELAYLOOP:
4383*4882a593Smuzhiyun 	beq	DELAY9_done
4384*4882a593Smuzhiyun 	subs	r0, r0, #1
4385*4882a593Smuzhiyun 	b	DELAYLOOP
4386*4882a593Smuzhiyun DELAY9_done:
4387*4882a593Smuzhiyun 	bx	lr
4388*4882a593Smuzhiyun .endfunc
4389*4882a593Smuzhiyun 
4390*4882a593Smuzhiyun .func SP_Init, SP_INIT
4391*4882a593Smuzhiyun SP_INIT:
4392*4882a593Smuzhiyun 	mov	r1, #SP_SWRST
4393*4882a593Smuzhiyun 	ldr	r0, =SP_BASE
4394*4882a593Smuzhiyun 	str	r1, [r0, #SP_CR] /* reset the SPI */
4395*4882a593Smuzhiyun 	mov	r1, #0
4396*4882a593Smuzhiyun 	str	r1, [r0, #SP_CR] /* release SPI from reset state */
4397*4882a593Smuzhiyun 	mov	r1, #SP_SPIEN
4398*4882a593Smuzhiyun 	str	r1, [r0, #SP_MR] /* set the SPI to MASTER mode*/
4399*4882a593Smuzhiyun 	str	r1, [r0, #SP_CR] /* enable the SPI */
4400*4882a593Smuzhiyun 
4401*4882a593Smuzhiyun /*  My guess would be this turns on the SPI clock */
4402*4882a593Smuzhiyun 	ldr	r3, =SPI_CGEN_BASE
4403*4882a593Smuzhiyun 	ldr	r1, [r3, #28]
4404*4882a593Smuzhiyun 	orr	r1, r1, #0x2000
4405*4882a593Smuzhiyun 	str	r1, [r3, #28]
4406*4882a593Smuzhiyun 
4407*4882a593Smuzhiyun 	ldr	r1, =0x2000c01
4408*4882a593Smuzhiyun 	str	r1, [r0, #SP_CSR0]
4409*4882a593Smuzhiyun 	ldr	r1, =0x2000201
4410*4882a593Smuzhiyun 	str	r1, [r0, #SP_CSR1]
4411*4882a593Smuzhiyun 	str	r1, [r0, #SP_CSR2]
4412*4882a593Smuzhiyun 	str	r1, [r0, #SP_CSR3]
4413*4882a593Smuzhiyun 	ldr	r1, [r0, #SP_SR]
4414*4882a593Smuzhiyun 	ldr	r0, [r0, #SP_RDR]
4415*4882a593Smuzhiyun 	bx	lr
4416*4882a593Smuzhiyun .endfunc
4417*4882a593Smuzhiyun .func NVRAM_Init, NVRAM_INIT
4418*4882a593Smuzhiyun NVRAM_INIT:
4419*4882a593Smuzhiyun 	ldr	r1, =SP_BASE
4420*4882a593Smuzhiyun 	ldr	r0, [r1, #SP_RDR]
4421*4882a593Smuzhiyun 	mov	r0, #NVRAM_CMD_RDSR
4422*4882a593Smuzhiyun 	str	r0, [r1, #SP_TDR]
4423*4882a593Smuzhiyun SP_loop1:
4424*4882a593Smuzhiyun 	ldr	r0, [r1, #SP_SR]
4425*4882a593Smuzhiyun 	tst	r0, #SP_TDRE
4426*4882a593Smuzhiyun 	beq	SP_loop1
4427*4882a593Smuzhiyun 
4428*4882a593Smuzhiyun 	mov	r0, #SPI_8CLOCKS
4429*4882a593Smuzhiyun 	str	r0, [r1, #SP_TDR]
4430*4882a593Smuzhiyun SP_loop2:
4431*4882a593Smuzhiyun 	ldr	r0, [r1, #SP_SR]
4432*4882a593Smuzhiyun 	tst	r0, #SP_TDRE
4433*4882a593Smuzhiyun 	beq	SP_loop2
4434*4882a593Smuzhiyun 
4435*4882a593Smuzhiyun 	ldr	r0, [r1, #SP_RDR]
4436*4882a593Smuzhiyun SP_loop3:
4437*4882a593Smuzhiyun 	ldr	r0, [r1, #SP_SR]
4438*4882a593Smuzhiyun 	tst	r0, #SP_RDRF
4439*4882a593Smuzhiyun 	beq	SP_loop3
4440*4882a593Smuzhiyun 
4441*4882a593Smuzhiyun 	ldr	r0, [r1, #SP_RDR]
4442*4882a593Smuzhiyun 	and	r0, r0, #255
4443*4882a593Smuzhiyun 	bx	lr
4444*4882a593Smuzhiyun .endfunc
4445*4882a593Smuzhiyun 
4446*4882a593Smuzhiyun .func NVRAM_Xfer, NVRAM_XFER
4447*4882a593Smuzhiyun 	/* r0 = dest address */
4448*4882a593Smuzhiyun 	/* r1 = not used */
4449*4882a593Smuzhiyun 	/* r2 = src address within NVRAM */
4450*4882a593Smuzhiyun 	/* r3 = length */
4451*4882a593Smuzhiyun NVRAM_XFER:
4452*4882a593Smuzhiyun 	stmdb	sp!, {r4, r5, lr}
4453*4882a593Smuzhiyun 	mov	r5, r0		/* save r0 (dest address) */
4454*4882a593Smuzhiyun 	mov	r4, r3		/* save r3 (length) */
4455*4882a593Smuzhiyun 	mov	r0, r2, LSR #5 /*  SPI memories put A8 in the command field */
4456*4882a593Smuzhiyun 	and	r0, r0, #8
4457*4882a593Smuzhiyun 	add	r0, r0, #NVRAM_CMD_READ
4458*4882a593Smuzhiyun 	ldr	r1, =NVRAM_SCRATCH
4459*4882a593Smuzhiyun 	strb	r0, [r1, #0]	/* save command in NVRAM_SCRATCH[0] */
4460*4882a593Smuzhiyun 	strb	r2, [r1, #1]    /* save low byte of source address in NVRAM_SCRATCH[1] */
4461*4882a593Smuzhiyun _local1:
4462*4882a593Smuzhiyun 	bl	NVRAM_INIT
4463*4882a593Smuzhiyun 	tst	r0, #NVRAM_SR_RDY
4464*4882a593Smuzhiyun 	bne	_local1
4465*4882a593Smuzhiyun 	mov	r0, #20
4466*4882a593Smuzhiyun 	bl	DELAY9
4467*4882a593Smuzhiyun 	mov	r2, r4		/* length */
4468*4882a593Smuzhiyun 	mov	r1, r5		/* dest address */
4469*4882a593Smuzhiyun 	mov	r0, #2		/* bytes to transfer in command */
4470*4882a593Smuzhiyun 	bl	NVRAM_XFER2
4471*4882a593Smuzhiyun 	ldmia	sp!, {r4, r5, lr}
4472*4882a593Smuzhiyun 	bx	lr
4473*4882a593Smuzhiyun .endfunc
4474*4882a593Smuzhiyun 
4475*4882a593Smuzhiyun .func NVRAM_Xfer2, NVRAM_XFER2
4476*4882a593Smuzhiyun NVRAM_XFER2:
4477*4882a593Smuzhiyun 	stmdb	sp!, {r4, r5, r6, lr}
4478*4882a593Smuzhiyun 	ldr	r4, =SP_BASE
4479*4882a593Smuzhiyun 	mov	r3, #0
4480*4882a593Smuzhiyun 	cmp	r0, #0
4481*4882a593Smuzhiyun 	bls	_local2
4482*4882a593Smuzhiyun 	ldr	r5, =NVRAM_SCRATCH
4483*4882a593Smuzhiyun _local4:
4484*4882a593Smuzhiyun 	ldrb	r6, [r5, r3]
4485*4882a593Smuzhiyun 	str	r6, [r4, #SP_TDR]
4486*4882a593Smuzhiyun _local3:
4487*4882a593Smuzhiyun 	ldr	r6, [r4, #SP_SR]
4488*4882a593Smuzhiyun 	tst	r6, #SP_TDRE
4489*4882a593Smuzhiyun 	beq	_local3
4490*4882a593Smuzhiyun 	add	r3, r3, #1
4491*4882a593Smuzhiyun 	cmp	r3, r0 /* r0 is # of bytes to send out (command+addr) */
4492*4882a593Smuzhiyun 	blo	_local4
4493*4882a593Smuzhiyun _local2:
4494*4882a593Smuzhiyun 	mov	r3, #SPI_8CLOCKS
4495*4882a593Smuzhiyun 	str	r3, [r4, #SP_TDR]
4496*4882a593Smuzhiyun 	ldr	r0, [r4, #SP_RDR]
4497*4882a593Smuzhiyun _local5:
4498*4882a593Smuzhiyun 	ldr	r0, [r4, #SP_SR]
4499*4882a593Smuzhiyun 	tst	r0, #SP_RDRF
4500*4882a593Smuzhiyun 	beq	_local5
4501*4882a593Smuzhiyun 	ldr	r0, [r4, #SP_RDR] /* what's this byte?  It's the byte read while writing the TDR -- nonsense, because the NVRAM doesn't read and write at the same time */
4502*4882a593Smuzhiyun 	mov	r0, #0
4503*4882a593Smuzhiyun 	cmp	r2, #0  /* r2 is # of bytes to copy in */
4504*4882a593Smuzhiyun 	bls	_local6
4505*4882a593Smuzhiyun _local7:
4506*4882a593Smuzhiyun 	ldr	r5, [r4, #SP_SR]
4507*4882a593Smuzhiyun 	tst	r5, #SP_TDRE
4508*4882a593Smuzhiyun 	beq	_local7
4509*4882a593Smuzhiyun 	str	r3, [r4, #SP_TDR]  /* r3 has SPI_8CLOCKS */
4510*4882a593Smuzhiyun _local8:
4511*4882a593Smuzhiyun 	ldr	r5, [r4, #SP_SR]
4512*4882a593Smuzhiyun 	tst	r5, #SP_RDRF
4513*4882a593Smuzhiyun 	beq	_local8
4514*4882a593Smuzhiyun 	ldr	r5, [r4, #SP_RDR] /* but didn't we read this byte above? */
4515*4882a593Smuzhiyun 	strb	r5, [r1], #1 /* postindexed */
4516*4882a593Smuzhiyun 	add	r0, r0, #1
4517*4882a593Smuzhiyun 	cmp	r0, r2
4518*4882a593Smuzhiyun 	blo	_local7 /* since we don't send another address, the NVRAM must be capable of sequential reads */
4519*4882a593Smuzhiyun _local6:
4520*4882a593Smuzhiyun 	mov	r0, #200
4521*4882a593Smuzhiyun 	bl	DELAY9
4522*4882a593Smuzhiyun 	ldmia	sp!, {r4, r5, r6, lr}
4523*4882a593Smuzhiyun 	bx	lr
4524*4882a593Smuzhiyun #endif
4525