1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright (c) 2013 Eugene Krasnikov <k.eugene.e@gmail.com>
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Permission to use, copy, modify, and/or distribute this software for any
5*4882a593Smuzhiyun * purpose with or without fee is hereby granted, provided that the above
6*4882a593Smuzhiyun * copyright notice and this permission notice appear in all copies.
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9*4882a593Smuzhiyun * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10*4882a593Smuzhiyun * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
11*4882a593Smuzhiyun * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12*4882a593Smuzhiyun * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
13*4882a593Smuzhiyun * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
14*4882a593Smuzhiyun * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15*4882a593Smuzhiyun */
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun #include "txrx.h"
20*4882a593Smuzhiyun
get_rssi0(struct wcn36xx_rx_bd * bd)21*4882a593Smuzhiyun static inline int get_rssi0(struct wcn36xx_rx_bd *bd)
22*4882a593Smuzhiyun {
23*4882a593Smuzhiyun return 100 - ((bd->phy_stat0 >> 24) & 0xff);
24*4882a593Smuzhiyun }
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun struct wcn36xx_rate {
27*4882a593Smuzhiyun u16 bitrate;
28*4882a593Smuzhiyun u16 mcs_or_legacy_index;
29*4882a593Smuzhiyun enum mac80211_rx_encoding encoding;
30*4882a593Smuzhiyun enum mac80211_rx_encoding_flags encoding_flags;
31*4882a593Smuzhiyun enum rate_info_bw bw;
32*4882a593Smuzhiyun };
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun /* Buffer descriptor rx_ch field is limited to 5-bit (4+1), a mapping is used
35*4882a593Smuzhiyun * for 11A Channels.
36*4882a593Smuzhiyun */
37*4882a593Smuzhiyun static const u8 ab_rx_ch_map[] = { 36, 40, 44, 48, 52, 56, 60, 64, 100, 104,
38*4882a593Smuzhiyun 108, 112, 116, 120, 124, 128, 132, 136, 140,
39*4882a593Smuzhiyun 149, 153, 157, 161, 165, 144 };
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun static const struct wcn36xx_rate wcn36xx_rate_table[] = {
42*4882a593Smuzhiyun /* 11b rates */
43*4882a593Smuzhiyun { 10, 0, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 },
44*4882a593Smuzhiyun { 20, 1, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 },
45*4882a593Smuzhiyun { 55, 2, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 },
46*4882a593Smuzhiyun { 110, 3, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 },
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun /* 11b SP (short preamble) */
49*4882a593Smuzhiyun { 10, 0, RX_ENC_LEGACY, RX_ENC_FLAG_SHORTPRE, RATE_INFO_BW_20 },
50*4882a593Smuzhiyun { 20, 1, RX_ENC_LEGACY, RX_ENC_FLAG_SHORTPRE, RATE_INFO_BW_20 },
51*4882a593Smuzhiyun { 55, 2, RX_ENC_LEGACY, RX_ENC_FLAG_SHORTPRE, RATE_INFO_BW_20 },
52*4882a593Smuzhiyun { 110, 3, RX_ENC_LEGACY, RX_ENC_FLAG_SHORTPRE, RATE_INFO_BW_20 },
53*4882a593Smuzhiyun
54*4882a593Smuzhiyun /* 11ag */
55*4882a593Smuzhiyun { 60, 4, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 },
56*4882a593Smuzhiyun { 90, 5, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 },
57*4882a593Smuzhiyun { 120, 6, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 },
58*4882a593Smuzhiyun { 180, 7, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 },
59*4882a593Smuzhiyun { 240, 8, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 },
60*4882a593Smuzhiyun { 360, 9, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 },
61*4882a593Smuzhiyun { 480, 10, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 },
62*4882a593Smuzhiyun { 540, 11, RX_ENC_LEGACY, 0, RATE_INFO_BW_20 },
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun /* 11n */
65*4882a593Smuzhiyun { 65, 0, RX_ENC_HT, 0, RATE_INFO_BW_20 },
66*4882a593Smuzhiyun { 130, 1, RX_ENC_HT, 0, RATE_INFO_BW_20 },
67*4882a593Smuzhiyun { 195, 2, RX_ENC_HT, 0, RATE_INFO_BW_20 },
68*4882a593Smuzhiyun { 260, 3, RX_ENC_HT, 0, RATE_INFO_BW_20 },
69*4882a593Smuzhiyun { 390, 4, RX_ENC_HT, 0, RATE_INFO_BW_20 },
70*4882a593Smuzhiyun { 520, 5, RX_ENC_HT, 0, RATE_INFO_BW_20 },
71*4882a593Smuzhiyun { 585, 6, RX_ENC_HT, 0, RATE_INFO_BW_20 },
72*4882a593Smuzhiyun { 650, 7, RX_ENC_HT, 0, RATE_INFO_BW_20 },
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun /* 11n SGI */
75*4882a593Smuzhiyun { 72, 0, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 },
76*4882a593Smuzhiyun { 144, 1, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 },
77*4882a593Smuzhiyun { 217, 2, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 },
78*4882a593Smuzhiyun { 289, 3, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 },
79*4882a593Smuzhiyun { 434, 4, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 },
80*4882a593Smuzhiyun { 578, 5, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 },
81*4882a593Smuzhiyun { 650, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 },
82*4882a593Smuzhiyun { 722, 7, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 },
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun /* 11n GF (greenfield) */
85*4882a593Smuzhiyun { 65, 0, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_20 },
86*4882a593Smuzhiyun { 130, 1, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_20 },
87*4882a593Smuzhiyun { 195, 2, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_20 },
88*4882a593Smuzhiyun { 260, 3, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_20 },
89*4882a593Smuzhiyun { 390, 4, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_20 },
90*4882a593Smuzhiyun { 520, 5, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_20 },
91*4882a593Smuzhiyun { 585, 6, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_20 },
92*4882a593Smuzhiyun { 650, 7, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_20 },
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun /* 11n CB (channel bonding) */
95*4882a593Smuzhiyun { 135, 0, RX_ENC_HT, 0, RATE_INFO_BW_40 },
96*4882a593Smuzhiyun { 270, 1, RX_ENC_HT, 0, RATE_INFO_BW_40 },
97*4882a593Smuzhiyun { 405, 2, RX_ENC_HT, 0, RATE_INFO_BW_40 },
98*4882a593Smuzhiyun { 540, 3, RX_ENC_HT, 0, RATE_INFO_BW_40 },
99*4882a593Smuzhiyun { 810, 4, RX_ENC_HT, 0, RATE_INFO_BW_40 },
100*4882a593Smuzhiyun { 1080, 5, RX_ENC_HT, 0, RATE_INFO_BW_40 },
101*4882a593Smuzhiyun { 1215, 6, RX_ENC_HT, 0, RATE_INFO_BW_40 },
102*4882a593Smuzhiyun { 1350, 7, RX_ENC_HT, 0, RATE_INFO_BW_40 },
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun /* 11n CB + SGI */
105*4882a593Smuzhiyun { 150, 0, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
106*4882a593Smuzhiyun { 300, 1, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
107*4882a593Smuzhiyun { 450, 2, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
108*4882a593Smuzhiyun { 600, 3, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
109*4882a593Smuzhiyun { 900, 4, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
110*4882a593Smuzhiyun { 1200, 5, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
111*4882a593Smuzhiyun { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
112*4882a593Smuzhiyun { 1500, 7, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun /* 11n GF + CB */
115*4882a593Smuzhiyun { 135, 0, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_40 },
116*4882a593Smuzhiyun { 270, 1, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_40 },
117*4882a593Smuzhiyun { 405, 2, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_40 },
118*4882a593Smuzhiyun { 540, 3, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_40 },
119*4882a593Smuzhiyun { 810, 4, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_40 },
120*4882a593Smuzhiyun { 1080, 5, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_40 },
121*4882a593Smuzhiyun { 1215, 6, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_40 },
122*4882a593Smuzhiyun { 1350, 7, RX_ENC_HT, RX_ENC_FLAG_HT_GF, RATE_INFO_BW_40 },
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun /* 11ac reserved indices */
125*4882a593Smuzhiyun { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
126*4882a593Smuzhiyun { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun /* 11ac 20 MHz 800ns GI MCS 0-8 */
129*4882a593Smuzhiyun { 65, 0, RX_ENC_HT, 0, RATE_INFO_BW_20 },
130*4882a593Smuzhiyun { 130, 1, RX_ENC_HT, 0, RATE_INFO_BW_20 },
131*4882a593Smuzhiyun { 195, 2, RX_ENC_HT, 0, RATE_INFO_BW_20 },
132*4882a593Smuzhiyun { 260, 3, RX_ENC_HT, 0, RATE_INFO_BW_20 },
133*4882a593Smuzhiyun { 390, 4, RX_ENC_HT, 0, RATE_INFO_BW_20 },
134*4882a593Smuzhiyun { 520, 5, RX_ENC_HT, 0, RATE_INFO_BW_20 },
135*4882a593Smuzhiyun { 585, 6, RX_ENC_HT, 0, RATE_INFO_BW_20 },
136*4882a593Smuzhiyun { 650, 7, RX_ENC_HT, 0, RATE_INFO_BW_20 },
137*4882a593Smuzhiyun { 780, 8, RX_ENC_HT, 0, RATE_INFO_BW_20 },
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun /* 11ac reserved indices */
140*4882a593Smuzhiyun { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
141*4882a593Smuzhiyun { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
142*4882a593Smuzhiyun { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
143*4882a593Smuzhiyun { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
144*4882a593Smuzhiyun { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
145*4882a593Smuzhiyun { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
146*4882a593Smuzhiyun { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
147*4882a593Smuzhiyun { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
148*4882a593Smuzhiyun { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun /* 11ac 20 MHz 400ns SGI MCS 6-8 */
151*4882a593Smuzhiyun { 655, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 },
152*4882a593Smuzhiyun { 722, 7, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 },
153*4882a593Smuzhiyun { 866, 8, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_20 },
154*4882a593Smuzhiyun
155*4882a593Smuzhiyun /* 11ac reserved indices */
156*4882a593Smuzhiyun { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
157*4882a593Smuzhiyun { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
158*4882a593Smuzhiyun { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun /* 11ac 40 MHz 800ns GI MCS 0-9 */
161*4882a593Smuzhiyun { 135, 0, RX_ENC_HT, 0, RATE_INFO_BW_40 },
162*4882a593Smuzhiyun { 270, 1, RX_ENC_HT, 0, RATE_INFO_BW_40 },
163*4882a593Smuzhiyun { 405, 2, RX_ENC_HT, 0, RATE_INFO_BW_40 },
164*4882a593Smuzhiyun { 540, 3, RX_ENC_HT, 0, RATE_INFO_BW_40 },
165*4882a593Smuzhiyun { 810, 4, RX_ENC_HT, 0, RATE_INFO_BW_40 },
166*4882a593Smuzhiyun { 1080, 5, RX_ENC_HT, 0, RATE_INFO_BW_40 },
167*4882a593Smuzhiyun { 1215, 6, RX_ENC_HT, 0, RATE_INFO_BW_40 },
168*4882a593Smuzhiyun { 1350, 7, RX_ENC_HT, 0, RATE_INFO_BW_40 },
169*4882a593Smuzhiyun { 1350, 7, RX_ENC_HT, 0, RATE_INFO_BW_40 },
170*4882a593Smuzhiyun { 1620, 8, RX_ENC_HT, 0, RATE_INFO_BW_40 },
171*4882a593Smuzhiyun { 1800, 9, RX_ENC_HT, 0, RATE_INFO_BW_40 },
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun /* 11ac reserved indices */
174*4882a593Smuzhiyun { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
175*4882a593Smuzhiyun { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
176*4882a593Smuzhiyun { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
177*4882a593Smuzhiyun { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
178*4882a593Smuzhiyun { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
179*4882a593Smuzhiyun { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun /* 11ac 40 MHz 400ns SGI MCS 5-7 */
182*4882a593Smuzhiyun { 1200, 5, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
183*4882a593Smuzhiyun { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
184*4882a593Smuzhiyun { 1500, 7, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun /* 11ac reserved index */
187*4882a593Smuzhiyun { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
188*4882a593Smuzhiyun
189*4882a593Smuzhiyun /* 11ac 40 MHz 400ns SGI MCS 5-7 */
190*4882a593Smuzhiyun { 1800, 8, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
191*4882a593Smuzhiyun { 2000, 9, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun /* 11ac reserved index */
194*4882a593Smuzhiyun { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun /* 11ac 80 MHz 800ns GI MCS 0-7 */
197*4882a593Smuzhiyun { 292, 0, RX_ENC_HT, 0, RATE_INFO_BW_80},
198*4882a593Smuzhiyun { 585, 1, RX_ENC_HT, 0, RATE_INFO_BW_80},
199*4882a593Smuzhiyun { 877, 2, RX_ENC_HT, 0, RATE_INFO_BW_80},
200*4882a593Smuzhiyun { 1170, 3, RX_ENC_HT, 0, RATE_INFO_BW_80},
201*4882a593Smuzhiyun { 1755, 4, RX_ENC_HT, 0, RATE_INFO_BW_80},
202*4882a593Smuzhiyun { 2340, 5, RX_ENC_HT, 0, RATE_INFO_BW_80},
203*4882a593Smuzhiyun { 2632, 6, RX_ENC_HT, 0, RATE_INFO_BW_80},
204*4882a593Smuzhiyun { 2925, 7, RX_ENC_HT, 0, RATE_INFO_BW_80},
205*4882a593Smuzhiyun
206*4882a593Smuzhiyun /* 11 ac reserved index */
207*4882a593Smuzhiyun { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun /* 11ac 80 MHz 800 ns GI MCS 8-9 */
210*4882a593Smuzhiyun { 3510, 8, RX_ENC_HT, 0, RATE_INFO_BW_80},
211*4882a593Smuzhiyun { 3900, 9, RX_ENC_HT, 0, RATE_INFO_BW_80},
212*4882a593Smuzhiyun
213*4882a593Smuzhiyun /* 11 ac reserved indices */
214*4882a593Smuzhiyun { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
215*4882a593Smuzhiyun { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
216*4882a593Smuzhiyun { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
217*4882a593Smuzhiyun { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
218*4882a593Smuzhiyun { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
219*4882a593Smuzhiyun { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
220*4882a593Smuzhiyun { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun /* 11ac 80 MHz 400 ns SGI MCS 6-7 */
223*4882a593Smuzhiyun { 2925, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_80 },
224*4882a593Smuzhiyun { 3250, 7, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_80 },
225*4882a593Smuzhiyun
226*4882a593Smuzhiyun /* 11ac reserved index */
227*4882a593Smuzhiyun { 1350, 6, RX_ENC_HT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_40 },
228*4882a593Smuzhiyun
229*4882a593Smuzhiyun /* 11ac 80 MHz 400ns SGI MCS 8-9 */
230*4882a593Smuzhiyun { 3900, 8, RX_ENC_VHT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_80 },
231*4882a593Smuzhiyun { 4333, 9, RX_ENC_VHT, RX_ENC_FLAG_SHORT_GI, RATE_INFO_BW_80 },
232*4882a593Smuzhiyun };
233*4882a593Smuzhiyun
wcn36xx_rx_skb(struct wcn36xx * wcn,struct sk_buff * skb)234*4882a593Smuzhiyun int wcn36xx_rx_skb(struct wcn36xx *wcn, struct sk_buff *skb)
235*4882a593Smuzhiyun {
236*4882a593Smuzhiyun struct ieee80211_rx_status status;
237*4882a593Smuzhiyun const struct wcn36xx_rate *rate;
238*4882a593Smuzhiyun struct ieee80211_hdr *hdr;
239*4882a593Smuzhiyun struct wcn36xx_rx_bd *bd;
240*4882a593Smuzhiyun u16 fc, sn;
241*4882a593Smuzhiyun
242*4882a593Smuzhiyun /*
243*4882a593Smuzhiyun * All fields must be 0, otherwise it can lead to
244*4882a593Smuzhiyun * unexpected consequences.
245*4882a593Smuzhiyun */
246*4882a593Smuzhiyun memset(&status, 0, sizeof(status));
247*4882a593Smuzhiyun
248*4882a593Smuzhiyun bd = (struct wcn36xx_rx_bd *)skb->data;
249*4882a593Smuzhiyun buff_to_be((u32 *)bd, sizeof(*bd)/sizeof(u32));
250*4882a593Smuzhiyun wcn36xx_dbg_dump(WCN36XX_DBG_RX_DUMP,
251*4882a593Smuzhiyun "BD <<< ", (char *)bd,
252*4882a593Smuzhiyun sizeof(struct wcn36xx_rx_bd));
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun skb_put(skb, bd->pdu.mpdu_header_off + bd->pdu.mpdu_len);
255*4882a593Smuzhiyun skb_pull(skb, bd->pdu.mpdu_header_off);
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun hdr = (struct ieee80211_hdr *) skb->data;
258*4882a593Smuzhiyun fc = __le16_to_cpu(hdr->frame_control);
259*4882a593Smuzhiyun sn = IEEE80211_SEQ_TO_SN(__le16_to_cpu(hdr->seq_ctrl));
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun status.mactime = 10;
262*4882a593Smuzhiyun status.signal = -get_rssi0(bd);
263*4882a593Smuzhiyun status.antenna = 1;
264*4882a593Smuzhiyun status.flag = 0;
265*4882a593Smuzhiyun status.rx_flags = 0;
266*4882a593Smuzhiyun status.flag |= RX_FLAG_IV_STRIPPED |
267*4882a593Smuzhiyun RX_FLAG_MMIC_STRIPPED |
268*4882a593Smuzhiyun RX_FLAG_DECRYPTED;
269*4882a593Smuzhiyun
270*4882a593Smuzhiyun wcn36xx_dbg(WCN36XX_DBG_RX, "status.flags=%x\n", status.flag);
271*4882a593Smuzhiyun
272*4882a593Smuzhiyun if (bd->scan_learn) {
273*4882a593Smuzhiyun /* If packet originate from hardware scanning, extract the
274*4882a593Smuzhiyun * band/channel from bd descriptor.
275*4882a593Smuzhiyun */
276*4882a593Smuzhiyun u8 hwch = (bd->reserved0 << 4) + bd->rx_ch;
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun if (bd->rf_band != 1 && hwch <= sizeof(ab_rx_ch_map) && hwch >= 1) {
279*4882a593Smuzhiyun status.band = NL80211_BAND_5GHZ;
280*4882a593Smuzhiyun status.freq = ieee80211_channel_to_frequency(ab_rx_ch_map[hwch - 1],
281*4882a593Smuzhiyun status.band);
282*4882a593Smuzhiyun } else {
283*4882a593Smuzhiyun status.band = NL80211_BAND_2GHZ;
284*4882a593Smuzhiyun status.freq = ieee80211_channel_to_frequency(hwch, status.band);
285*4882a593Smuzhiyun }
286*4882a593Smuzhiyun } else {
287*4882a593Smuzhiyun status.band = WCN36XX_BAND(wcn);
288*4882a593Smuzhiyun status.freq = WCN36XX_CENTER_FREQ(wcn);
289*4882a593Smuzhiyun }
290*4882a593Smuzhiyun
291*4882a593Smuzhiyun if (bd->rate_id < ARRAY_SIZE(wcn36xx_rate_table)) {
292*4882a593Smuzhiyun rate = &wcn36xx_rate_table[bd->rate_id];
293*4882a593Smuzhiyun status.encoding = rate->encoding;
294*4882a593Smuzhiyun status.enc_flags = rate->encoding_flags;
295*4882a593Smuzhiyun status.bw = rate->bw;
296*4882a593Smuzhiyun status.rate_idx = rate->mcs_or_legacy_index;
297*4882a593Smuzhiyun status.nss = 1;
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun if (status.band == NL80211_BAND_5GHZ &&
300*4882a593Smuzhiyun status.encoding == RX_ENC_LEGACY &&
301*4882a593Smuzhiyun status.rate_idx >= 4) {
302*4882a593Smuzhiyun /* no dsss rates in 5Ghz rates table */
303*4882a593Smuzhiyun status.rate_idx -= 4;
304*4882a593Smuzhiyun }
305*4882a593Smuzhiyun } else {
306*4882a593Smuzhiyun status.encoding = 0;
307*4882a593Smuzhiyun status.bw = 0;
308*4882a593Smuzhiyun status.enc_flags = 0;
309*4882a593Smuzhiyun status.rate_idx = 0;
310*4882a593Smuzhiyun }
311*4882a593Smuzhiyun
312*4882a593Smuzhiyun if (ieee80211_is_beacon(hdr->frame_control) ||
313*4882a593Smuzhiyun ieee80211_is_probe_resp(hdr->frame_control))
314*4882a593Smuzhiyun status.boottime_ns = ktime_get_boottime_ns();
315*4882a593Smuzhiyun
316*4882a593Smuzhiyun memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
317*4882a593Smuzhiyun
318*4882a593Smuzhiyun if (ieee80211_is_beacon(hdr->frame_control)) {
319*4882a593Smuzhiyun wcn36xx_dbg(WCN36XX_DBG_BEACON, "beacon skb %p len %d fc %04x sn %d\n",
320*4882a593Smuzhiyun skb, skb->len, fc, sn);
321*4882a593Smuzhiyun wcn36xx_dbg_dump(WCN36XX_DBG_BEACON_DUMP, "SKB <<< ",
322*4882a593Smuzhiyun (char *)skb->data, skb->len);
323*4882a593Smuzhiyun } else {
324*4882a593Smuzhiyun wcn36xx_dbg(WCN36XX_DBG_RX, "rx skb %p len %d fc %04x sn %d\n",
325*4882a593Smuzhiyun skb, skb->len, fc, sn);
326*4882a593Smuzhiyun wcn36xx_dbg_dump(WCN36XX_DBG_RX_DUMP, "SKB <<< ",
327*4882a593Smuzhiyun (char *)skb->data, skb->len);
328*4882a593Smuzhiyun }
329*4882a593Smuzhiyun
330*4882a593Smuzhiyun ieee80211_rx_irqsafe(wcn->hw, skb);
331*4882a593Smuzhiyun
332*4882a593Smuzhiyun return 0;
333*4882a593Smuzhiyun }
334*4882a593Smuzhiyun
wcn36xx_set_tx_pdu(struct wcn36xx_tx_bd * bd,u32 mpdu_header_len,u32 len,u16 tid)335*4882a593Smuzhiyun static void wcn36xx_set_tx_pdu(struct wcn36xx_tx_bd *bd,
336*4882a593Smuzhiyun u32 mpdu_header_len,
337*4882a593Smuzhiyun u32 len,
338*4882a593Smuzhiyun u16 tid)
339*4882a593Smuzhiyun {
340*4882a593Smuzhiyun bd->pdu.mpdu_header_len = mpdu_header_len;
341*4882a593Smuzhiyun bd->pdu.mpdu_header_off = sizeof(*bd);
342*4882a593Smuzhiyun bd->pdu.mpdu_data_off = bd->pdu.mpdu_header_len +
343*4882a593Smuzhiyun bd->pdu.mpdu_header_off;
344*4882a593Smuzhiyun bd->pdu.mpdu_len = len;
345*4882a593Smuzhiyun bd->pdu.tid = tid;
346*4882a593Smuzhiyun }
347*4882a593Smuzhiyun
get_vif_by_addr(struct wcn36xx * wcn,u8 * addr)348*4882a593Smuzhiyun static inline struct wcn36xx_vif *get_vif_by_addr(struct wcn36xx *wcn,
349*4882a593Smuzhiyun u8 *addr)
350*4882a593Smuzhiyun {
351*4882a593Smuzhiyun struct wcn36xx_vif *vif_priv = NULL;
352*4882a593Smuzhiyun struct ieee80211_vif *vif = NULL;
353*4882a593Smuzhiyun list_for_each_entry(vif_priv, &wcn->vif_list, list) {
354*4882a593Smuzhiyun vif = wcn36xx_priv_to_vif(vif_priv);
355*4882a593Smuzhiyun if (memcmp(vif->addr, addr, ETH_ALEN) == 0)
356*4882a593Smuzhiyun return vif_priv;
357*4882a593Smuzhiyun }
358*4882a593Smuzhiyun wcn36xx_warn("vif %pM not found\n", addr);
359*4882a593Smuzhiyun return NULL;
360*4882a593Smuzhiyun }
361*4882a593Smuzhiyun
wcn36xx_tx_start_ampdu(struct wcn36xx * wcn,struct wcn36xx_sta * sta_priv,struct sk_buff * skb)362*4882a593Smuzhiyun static void wcn36xx_tx_start_ampdu(struct wcn36xx *wcn,
363*4882a593Smuzhiyun struct wcn36xx_sta *sta_priv,
364*4882a593Smuzhiyun struct sk_buff *skb)
365*4882a593Smuzhiyun {
366*4882a593Smuzhiyun struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
367*4882a593Smuzhiyun struct ieee80211_sta *sta;
368*4882a593Smuzhiyun u8 *qc, tid;
369*4882a593Smuzhiyun
370*4882a593Smuzhiyun if (!conf_is_ht(&wcn->hw->conf))
371*4882a593Smuzhiyun return;
372*4882a593Smuzhiyun
373*4882a593Smuzhiyun sta = wcn36xx_priv_to_sta(sta_priv);
374*4882a593Smuzhiyun
375*4882a593Smuzhiyun if (WARN_ON(!ieee80211_is_data_qos(hdr->frame_control)))
376*4882a593Smuzhiyun return;
377*4882a593Smuzhiyun
378*4882a593Smuzhiyun if (skb_get_queue_mapping(skb) == IEEE80211_AC_VO)
379*4882a593Smuzhiyun return;
380*4882a593Smuzhiyun
381*4882a593Smuzhiyun qc = ieee80211_get_qos_ctl(hdr);
382*4882a593Smuzhiyun tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
383*4882a593Smuzhiyun
384*4882a593Smuzhiyun spin_lock(&sta_priv->ampdu_lock);
385*4882a593Smuzhiyun if (sta_priv->ampdu_state[tid] != WCN36XX_AMPDU_NONE)
386*4882a593Smuzhiyun goto out_unlock;
387*4882a593Smuzhiyun
388*4882a593Smuzhiyun if (sta_priv->non_agg_frame_ct++ >= WCN36XX_AMPDU_START_THRESH) {
389*4882a593Smuzhiyun sta_priv->ampdu_state[tid] = WCN36XX_AMPDU_START;
390*4882a593Smuzhiyun sta_priv->non_agg_frame_ct = 0;
391*4882a593Smuzhiyun ieee80211_start_tx_ba_session(sta, tid, 0);
392*4882a593Smuzhiyun }
393*4882a593Smuzhiyun out_unlock:
394*4882a593Smuzhiyun spin_unlock(&sta_priv->ampdu_lock);
395*4882a593Smuzhiyun }
396*4882a593Smuzhiyun
wcn36xx_set_tx_data(struct wcn36xx_tx_bd * bd,struct wcn36xx * wcn,struct wcn36xx_vif ** vif_priv,struct wcn36xx_sta * sta_priv,struct sk_buff * skb,bool bcast)397*4882a593Smuzhiyun static void wcn36xx_set_tx_data(struct wcn36xx_tx_bd *bd,
398*4882a593Smuzhiyun struct wcn36xx *wcn,
399*4882a593Smuzhiyun struct wcn36xx_vif **vif_priv,
400*4882a593Smuzhiyun struct wcn36xx_sta *sta_priv,
401*4882a593Smuzhiyun struct sk_buff *skb,
402*4882a593Smuzhiyun bool bcast)
403*4882a593Smuzhiyun {
404*4882a593Smuzhiyun struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
405*4882a593Smuzhiyun struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
406*4882a593Smuzhiyun struct ieee80211_vif *vif = NULL;
407*4882a593Smuzhiyun struct wcn36xx_vif *__vif_priv = NULL;
408*4882a593Smuzhiyun bool is_data_qos = ieee80211_is_data_qos(hdr->frame_control);
409*4882a593Smuzhiyun u16 tid = 0;
410*4882a593Smuzhiyun
411*4882a593Smuzhiyun bd->bd_rate = WCN36XX_BD_RATE_DATA;
412*4882a593Smuzhiyun
413*4882a593Smuzhiyun /*
414*4882a593Smuzhiyun * For not unicast frames mac80211 will not set sta pointer so use
415*4882a593Smuzhiyun * self_sta_index instead.
416*4882a593Smuzhiyun */
417*4882a593Smuzhiyun if (sta_priv) {
418*4882a593Smuzhiyun __vif_priv = sta_priv->vif;
419*4882a593Smuzhiyun vif = wcn36xx_priv_to_vif(__vif_priv);
420*4882a593Smuzhiyun
421*4882a593Smuzhiyun bd->dpu_sign = sta_priv->ucast_dpu_sign;
422*4882a593Smuzhiyun if (vif->type == NL80211_IFTYPE_STATION) {
423*4882a593Smuzhiyun bd->sta_index = sta_priv->bss_sta_index;
424*4882a593Smuzhiyun bd->dpu_desc_idx = sta_priv->bss_dpu_desc_index;
425*4882a593Smuzhiyun } else if (vif->type == NL80211_IFTYPE_AP ||
426*4882a593Smuzhiyun vif->type == NL80211_IFTYPE_ADHOC ||
427*4882a593Smuzhiyun vif->type == NL80211_IFTYPE_MESH_POINT) {
428*4882a593Smuzhiyun bd->sta_index = sta_priv->sta_index;
429*4882a593Smuzhiyun bd->dpu_desc_idx = sta_priv->dpu_desc_index;
430*4882a593Smuzhiyun }
431*4882a593Smuzhiyun } else {
432*4882a593Smuzhiyun __vif_priv = get_vif_by_addr(wcn, hdr->addr2);
433*4882a593Smuzhiyun bd->sta_index = __vif_priv->self_sta_index;
434*4882a593Smuzhiyun bd->dpu_desc_idx = __vif_priv->self_dpu_desc_index;
435*4882a593Smuzhiyun bd->dpu_sign = __vif_priv->self_ucast_dpu_sign;
436*4882a593Smuzhiyun }
437*4882a593Smuzhiyun
438*4882a593Smuzhiyun if (is_data_qos) {
439*4882a593Smuzhiyun tid = ieee80211_get_tid(hdr);
440*4882a593Smuzhiyun /* TID->QID is one-to-one mapping */
441*4882a593Smuzhiyun bd->queue_id = tid;
442*4882a593Smuzhiyun bd->pdu.bd_ssn = WCN36XX_TXBD_SSN_FILL_DPU_QOS;
443*4882a593Smuzhiyun } else {
444*4882a593Smuzhiyun bd->pdu.bd_ssn = WCN36XX_TXBD_SSN_FILL_DPU_NON_QOS;
445*4882a593Smuzhiyun }
446*4882a593Smuzhiyun
447*4882a593Smuzhiyun if (info->flags & IEEE80211_TX_INTFL_DONT_ENCRYPT ||
448*4882a593Smuzhiyun (sta_priv && !sta_priv->is_data_encrypted)) {
449*4882a593Smuzhiyun bd->dpu_ne = 1;
450*4882a593Smuzhiyun }
451*4882a593Smuzhiyun
452*4882a593Smuzhiyun if (ieee80211_is_any_nullfunc(hdr->frame_control)) {
453*4882a593Smuzhiyun /* Don't use a regular queue for null packet (no ampdu) */
454*4882a593Smuzhiyun bd->queue_id = WCN36XX_TX_U_WQ_ID;
455*4882a593Smuzhiyun bd->bd_rate = WCN36XX_BD_RATE_CTRL;
456*4882a593Smuzhiyun if (ieee80211_is_qos_nullfunc(hdr->frame_control))
457*4882a593Smuzhiyun bd->pdu.bd_ssn = WCN36XX_TXBD_SSN_FILL_HOST;
458*4882a593Smuzhiyun }
459*4882a593Smuzhiyun
460*4882a593Smuzhiyun if (bcast) {
461*4882a593Smuzhiyun bd->ub = 1;
462*4882a593Smuzhiyun bd->ack_policy = 1;
463*4882a593Smuzhiyun }
464*4882a593Smuzhiyun *vif_priv = __vif_priv;
465*4882a593Smuzhiyun
466*4882a593Smuzhiyun wcn36xx_set_tx_pdu(bd,
467*4882a593Smuzhiyun is_data_qos ?
468*4882a593Smuzhiyun sizeof(struct ieee80211_qos_hdr) :
469*4882a593Smuzhiyun sizeof(struct ieee80211_hdr_3addr),
470*4882a593Smuzhiyun skb->len, tid);
471*4882a593Smuzhiyun
472*4882a593Smuzhiyun if (sta_priv && is_data_qos)
473*4882a593Smuzhiyun wcn36xx_tx_start_ampdu(wcn, sta_priv, skb);
474*4882a593Smuzhiyun }
475*4882a593Smuzhiyun
wcn36xx_set_tx_mgmt(struct wcn36xx_tx_bd * bd,struct wcn36xx * wcn,struct wcn36xx_vif ** vif_priv,struct sk_buff * skb,bool bcast)476*4882a593Smuzhiyun static void wcn36xx_set_tx_mgmt(struct wcn36xx_tx_bd *bd,
477*4882a593Smuzhiyun struct wcn36xx *wcn,
478*4882a593Smuzhiyun struct wcn36xx_vif **vif_priv,
479*4882a593Smuzhiyun struct sk_buff *skb,
480*4882a593Smuzhiyun bool bcast)
481*4882a593Smuzhiyun {
482*4882a593Smuzhiyun struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
483*4882a593Smuzhiyun struct wcn36xx_vif *__vif_priv =
484*4882a593Smuzhiyun get_vif_by_addr(wcn, hdr->addr2);
485*4882a593Smuzhiyun bd->sta_index = __vif_priv->self_sta_index;
486*4882a593Smuzhiyun bd->dpu_desc_idx = __vif_priv->self_dpu_desc_index;
487*4882a593Smuzhiyun bd->dpu_ne = 1;
488*4882a593Smuzhiyun
489*4882a593Smuzhiyun /* default rate for unicast */
490*4882a593Smuzhiyun if (ieee80211_is_mgmt(hdr->frame_control))
491*4882a593Smuzhiyun bd->bd_rate = (WCN36XX_BAND(wcn) == NL80211_BAND_5GHZ) ?
492*4882a593Smuzhiyun WCN36XX_BD_RATE_CTRL :
493*4882a593Smuzhiyun WCN36XX_BD_RATE_MGMT;
494*4882a593Smuzhiyun else if (ieee80211_is_ctl(hdr->frame_control))
495*4882a593Smuzhiyun bd->bd_rate = WCN36XX_BD_RATE_CTRL;
496*4882a593Smuzhiyun else
497*4882a593Smuzhiyun wcn36xx_warn("frame control type unknown\n");
498*4882a593Smuzhiyun
499*4882a593Smuzhiyun /*
500*4882a593Smuzhiyun * In joining state trick hardware that probe is sent as
501*4882a593Smuzhiyun * unicast even if address is broadcast.
502*4882a593Smuzhiyun */
503*4882a593Smuzhiyun if (__vif_priv->is_joining &&
504*4882a593Smuzhiyun ieee80211_is_probe_req(hdr->frame_control))
505*4882a593Smuzhiyun bcast = false;
506*4882a593Smuzhiyun
507*4882a593Smuzhiyun if (bcast) {
508*4882a593Smuzhiyun /* broadcast */
509*4882a593Smuzhiyun bd->ub = 1;
510*4882a593Smuzhiyun /* No ack needed not unicast */
511*4882a593Smuzhiyun bd->ack_policy = 1;
512*4882a593Smuzhiyun bd->queue_id = WCN36XX_TX_B_WQ_ID;
513*4882a593Smuzhiyun } else
514*4882a593Smuzhiyun bd->queue_id = WCN36XX_TX_U_WQ_ID;
515*4882a593Smuzhiyun *vif_priv = __vif_priv;
516*4882a593Smuzhiyun
517*4882a593Smuzhiyun bd->pdu.bd_ssn = WCN36XX_TXBD_SSN_FILL_DPU_NON_QOS;
518*4882a593Smuzhiyun
519*4882a593Smuzhiyun wcn36xx_set_tx_pdu(bd,
520*4882a593Smuzhiyun ieee80211_is_data_qos(hdr->frame_control) ?
521*4882a593Smuzhiyun sizeof(struct ieee80211_qos_hdr) :
522*4882a593Smuzhiyun sizeof(struct ieee80211_hdr_3addr),
523*4882a593Smuzhiyun skb->len, WCN36XX_TID);
524*4882a593Smuzhiyun }
525*4882a593Smuzhiyun
wcn36xx_start_tx(struct wcn36xx * wcn,struct wcn36xx_sta * sta_priv,struct sk_buff * skb)526*4882a593Smuzhiyun int wcn36xx_start_tx(struct wcn36xx *wcn,
527*4882a593Smuzhiyun struct wcn36xx_sta *sta_priv,
528*4882a593Smuzhiyun struct sk_buff *skb)
529*4882a593Smuzhiyun {
530*4882a593Smuzhiyun struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
531*4882a593Smuzhiyun struct wcn36xx_vif *vif_priv = NULL;
532*4882a593Smuzhiyun struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
533*4882a593Smuzhiyun bool is_low = ieee80211_is_data(hdr->frame_control);
534*4882a593Smuzhiyun bool bcast = is_broadcast_ether_addr(hdr->addr1) ||
535*4882a593Smuzhiyun is_multicast_ether_addr(hdr->addr1);
536*4882a593Smuzhiyun bool ack_ind = (info->flags & IEEE80211_TX_CTL_REQ_TX_STATUS) &&
537*4882a593Smuzhiyun !(info->flags & IEEE80211_TX_CTL_NO_ACK);
538*4882a593Smuzhiyun struct wcn36xx_tx_bd bd;
539*4882a593Smuzhiyun int ret;
540*4882a593Smuzhiyun
541*4882a593Smuzhiyun memset(&bd, 0, sizeof(bd));
542*4882a593Smuzhiyun
543*4882a593Smuzhiyun wcn36xx_dbg(WCN36XX_DBG_TX,
544*4882a593Smuzhiyun "tx skb %p len %d fc %04x sn %d %s %s\n",
545*4882a593Smuzhiyun skb, skb->len, __le16_to_cpu(hdr->frame_control),
546*4882a593Smuzhiyun IEEE80211_SEQ_TO_SN(__le16_to_cpu(hdr->seq_ctrl)),
547*4882a593Smuzhiyun is_low ? "low" : "high", bcast ? "bcast" : "ucast");
548*4882a593Smuzhiyun
549*4882a593Smuzhiyun wcn36xx_dbg_dump(WCN36XX_DBG_TX_DUMP, "", skb->data, skb->len);
550*4882a593Smuzhiyun
551*4882a593Smuzhiyun bd.dpu_rf = WCN36XX_BMU_WQ_TX;
552*4882a593Smuzhiyun
553*4882a593Smuzhiyun if (unlikely(ack_ind)) {
554*4882a593Smuzhiyun wcn36xx_dbg(WCN36XX_DBG_DXE, "TX_ACK status requested\n");
555*4882a593Smuzhiyun
556*4882a593Smuzhiyun /* Only one at a time is supported by fw. Stop the TX queues
557*4882a593Smuzhiyun * until the ack status gets back.
558*4882a593Smuzhiyun */
559*4882a593Smuzhiyun ieee80211_stop_queues(wcn->hw);
560*4882a593Smuzhiyun
561*4882a593Smuzhiyun /* Request ack indication from the firmware */
562*4882a593Smuzhiyun bd.tx_comp = 1;
563*4882a593Smuzhiyun }
564*4882a593Smuzhiyun
565*4882a593Smuzhiyun /* Data frames served first*/
566*4882a593Smuzhiyun if (is_low)
567*4882a593Smuzhiyun wcn36xx_set_tx_data(&bd, wcn, &vif_priv, sta_priv, skb, bcast);
568*4882a593Smuzhiyun else
569*4882a593Smuzhiyun /* MGMT and CTRL frames are handeld here*/
570*4882a593Smuzhiyun wcn36xx_set_tx_mgmt(&bd, wcn, &vif_priv, skb, bcast);
571*4882a593Smuzhiyun
572*4882a593Smuzhiyun buff_to_be((u32 *)&bd, sizeof(bd)/sizeof(u32));
573*4882a593Smuzhiyun bd.tx_bd_sign = 0xbdbdbdbd;
574*4882a593Smuzhiyun
575*4882a593Smuzhiyun ret = wcn36xx_dxe_tx_frame(wcn, vif_priv, &bd, skb, is_low);
576*4882a593Smuzhiyun if (unlikely(ret && ack_ind)) {
577*4882a593Smuzhiyun /* If the skb has not been transmitted, resume TX queue */
578*4882a593Smuzhiyun ieee80211_wake_queues(wcn->hw);
579*4882a593Smuzhiyun }
580*4882a593Smuzhiyun
581*4882a593Smuzhiyun return ret;
582*4882a593Smuzhiyun }
583