xref: /OK3568_Linux_fs/kernel/drivers/net/wireless/ath/carl9170/carl9170.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Atheros CARL9170 driver
3*4882a593Smuzhiyun  *
4*4882a593Smuzhiyun  * Driver specific definitions
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  * Copyright 2008, Johannes Berg <johannes@sipsolutions.net>
7*4882a593Smuzhiyun  * Copyright 2009, 2010, Christian Lamparter <chunkeey@googlemail.com>
8*4882a593Smuzhiyun  *
9*4882a593Smuzhiyun  * This program is free software; you can redistribute it and/or modify
10*4882a593Smuzhiyun  * it under the terms of the GNU General Public License as published by
11*4882a593Smuzhiyun  * the Free Software Foundation; either version 2 of the License, or
12*4882a593Smuzhiyun  * (at your option) any later version.
13*4882a593Smuzhiyun  *
14*4882a593Smuzhiyun  * This program is distributed in the hope that it will be useful,
15*4882a593Smuzhiyun  * but WITHOUT ANY WARRANTY; without even the implied warranty of
16*4882a593Smuzhiyun  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
17*4882a593Smuzhiyun  * GNU General Public License for more details.
18*4882a593Smuzhiyun  *
19*4882a593Smuzhiyun  * You should have received a copy of the GNU General Public License
20*4882a593Smuzhiyun  * along with this program; see the file COPYING.  If not, see
21*4882a593Smuzhiyun  * http://www.gnu.org/licenses/.
22*4882a593Smuzhiyun  *
23*4882a593Smuzhiyun  * This file incorporates work covered by the following copyright and
24*4882a593Smuzhiyun  * permission notice:
25*4882a593Smuzhiyun  *    Copyright (c) 2007-2008 Atheros Communications, Inc.
26*4882a593Smuzhiyun  *
27*4882a593Smuzhiyun  *    Permission to use, copy, modify, and/or distribute this software for any
28*4882a593Smuzhiyun  *    purpose with or without fee is hereby granted, provided that the above
29*4882a593Smuzhiyun  *    copyright notice and this permission notice appear in all copies.
30*4882a593Smuzhiyun  *
31*4882a593Smuzhiyun  *    THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
32*4882a593Smuzhiyun  *    WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
33*4882a593Smuzhiyun  *    MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
34*4882a593Smuzhiyun  *    ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
35*4882a593Smuzhiyun  *    WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
36*4882a593Smuzhiyun  *    ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
37*4882a593Smuzhiyun  *    OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
38*4882a593Smuzhiyun  */
39*4882a593Smuzhiyun #ifndef __CARL9170_H
40*4882a593Smuzhiyun #define __CARL9170_H
41*4882a593Smuzhiyun 
42*4882a593Smuzhiyun #include <linux/kernel.h>
43*4882a593Smuzhiyun #include <linux/firmware.h>
44*4882a593Smuzhiyun #include <linux/completion.h>
45*4882a593Smuzhiyun #include <linux/spinlock.h>
46*4882a593Smuzhiyun #include <linux/hw_random.h>
47*4882a593Smuzhiyun #include <net/cfg80211.h>
48*4882a593Smuzhiyun #include <net/mac80211.h>
49*4882a593Smuzhiyun #include <linux/usb.h>
50*4882a593Smuzhiyun #ifdef CONFIG_CARL9170_LEDS
51*4882a593Smuzhiyun #include <linux/leds.h>
52*4882a593Smuzhiyun #endif /* CONFIG_CARL9170_LEDS */
53*4882a593Smuzhiyun #ifdef CONFIG_CARL9170_WPC
54*4882a593Smuzhiyun #include <linux/input.h>
55*4882a593Smuzhiyun #endif /* CONFIG_CARL9170_WPC */
56*4882a593Smuzhiyun #include "eeprom.h"
57*4882a593Smuzhiyun #include "wlan.h"
58*4882a593Smuzhiyun #include "hw.h"
59*4882a593Smuzhiyun #include "fwdesc.h"
60*4882a593Smuzhiyun #include "fwcmd.h"
61*4882a593Smuzhiyun #include "../regd.h"
62*4882a593Smuzhiyun 
63*4882a593Smuzhiyun #ifdef CONFIG_CARL9170_DEBUGFS
64*4882a593Smuzhiyun #include "debug.h"
65*4882a593Smuzhiyun #endif /* CONFIG_CARL9170_DEBUGFS */
66*4882a593Smuzhiyun 
67*4882a593Smuzhiyun #define CARL9170FW_NAME	"carl9170-1.fw"
68*4882a593Smuzhiyun 
69*4882a593Smuzhiyun #define PAYLOAD_MAX	(CARL9170_MAX_CMD_LEN / 4 - 1)
70*4882a593Smuzhiyun 
ar9170_qmap(u8 idx)71*4882a593Smuzhiyun static inline u8 ar9170_qmap(u8 idx)
72*4882a593Smuzhiyun {
73*4882a593Smuzhiyun 	return 3 - idx; /* { 3, 2, 1, 0 } */
74*4882a593Smuzhiyun }
75*4882a593Smuzhiyun 
76*4882a593Smuzhiyun #define CARL9170_MAX_RX_BUFFER_SIZE		8192
77*4882a593Smuzhiyun 
78*4882a593Smuzhiyun enum carl9170_device_state {
79*4882a593Smuzhiyun 	CARL9170_UNKNOWN_STATE,
80*4882a593Smuzhiyun 	CARL9170_STOPPED,
81*4882a593Smuzhiyun 	CARL9170_IDLE,
82*4882a593Smuzhiyun 	CARL9170_STARTED,
83*4882a593Smuzhiyun };
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun #define WME_BA_BMP_SIZE			64
86*4882a593Smuzhiyun #define CARL9170_TX_USER_RATE_TRIES	3
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun #define TID_TO_WME_AC(_tid)				\
89*4882a593Smuzhiyun 	((((_tid) == 0) || ((_tid) == 3)) ? IEEE80211_AC_BE :	\
90*4882a593Smuzhiyun 	 (((_tid) == 1) || ((_tid) == 2)) ? IEEE80211_AC_BK :	\
91*4882a593Smuzhiyun 	 (((_tid) == 4) || ((_tid) == 5)) ? IEEE80211_AC_VI :	\
92*4882a593Smuzhiyun 	 IEEE80211_AC_VO)
93*4882a593Smuzhiyun 
94*4882a593Smuzhiyun #define SEQ_DIFF(_start, _seq) \
95*4882a593Smuzhiyun 	(((_start) - (_seq)) & 0x0fff)
96*4882a593Smuzhiyun #define SEQ_PREV(_seq) \
97*4882a593Smuzhiyun 	(((_seq) - 1) & 0x0fff)
98*4882a593Smuzhiyun #define SEQ_NEXT(_seq) \
99*4882a593Smuzhiyun 	(((_seq) + 1) & 0x0fff)
100*4882a593Smuzhiyun #define BAW_WITHIN(_start, _bawsz, _seqno) \
101*4882a593Smuzhiyun 	((((_seqno) - (_start)) & 0xfff) < (_bawsz))
102*4882a593Smuzhiyun 
103*4882a593Smuzhiyun enum carl9170_tid_state {
104*4882a593Smuzhiyun 	CARL9170_TID_STATE_INVALID,
105*4882a593Smuzhiyun 	CARL9170_TID_STATE_KILLED,
106*4882a593Smuzhiyun 	CARL9170_TID_STATE_SHUTDOWN,
107*4882a593Smuzhiyun 	CARL9170_TID_STATE_SUSPEND,
108*4882a593Smuzhiyun 	CARL9170_TID_STATE_PROGRESS,
109*4882a593Smuzhiyun 	CARL9170_TID_STATE_IDLE,
110*4882a593Smuzhiyun 	CARL9170_TID_STATE_XMIT,
111*4882a593Smuzhiyun };
112*4882a593Smuzhiyun 
113*4882a593Smuzhiyun #define CARL9170_BAW_BITS (2 * WME_BA_BMP_SIZE)
114*4882a593Smuzhiyun #define CARL9170_BAW_SIZE (BITS_TO_LONGS(CARL9170_BAW_BITS))
115*4882a593Smuzhiyun #define CARL9170_BAW_LEN (DIV_ROUND_UP(CARL9170_BAW_BITS, BITS_PER_BYTE))
116*4882a593Smuzhiyun 
117*4882a593Smuzhiyun struct carl9170_sta_tid {
118*4882a593Smuzhiyun 	/* must be the first entry! */
119*4882a593Smuzhiyun 	struct list_head list;
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun 	/* temporary list for RCU unlink procedure */
122*4882a593Smuzhiyun 	struct list_head tmp_list;
123*4882a593Smuzhiyun 
124*4882a593Smuzhiyun 	/* lock for the following data structures */
125*4882a593Smuzhiyun 	spinlock_t lock;
126*4882a593Smuzhiyun 
127*4882a593Smuzhiyun 	unsigned int counter;
128*4882a593Smuzhiyun 	enum carl9170_tid_state state;
129*4882a593Smuzhiyun 	u8 tid;		/* TID number ( 0 - 15 ) */
130*4882a593Smuzhiyun 	u16 max;	/* max. AMPDU size */
131*4882a593Smuzhiyun 
132*4882a593Smuzhiyun 	u16 snx;	/* awaiting _next_ frame */
133*4882a593Smuzhiyun 	u16 hsn;	/* highest _queued_ sequence */
134*4882a593Smuzhiyun 	u16 bsn;	/* base of the tx/agg bitmap */
135*4882a593Smuzhiyun 	unsigned long bitmap[CARL9170_BAW_SIZE];
136*4882a593Smuzhiyun 
137*4882a593Smuzhiyun 	/* Preaggregation reorder queue */
138*4882a593Smuzhiyun 	struct sk_buff_head queue;
139*4882a593Smuzhiyun 
140*4882a593Smuzhiyun 	struct ieee80211_sta *sta;
141*4882a593Smuzhiyun 	struct ieee80211_vif *vif;
142*4882a593Smuzhiyun };
143*4882a593Smuzhiyun 
144*4882a593Smuzhiyun #define CARL9170_QUEUE_TIMEOUT		256
145*4882a593Smuzhiyun #define CARL9170_BUMP_QUEUE		1000
146*4882a593Smuzhiyun #define CARL9170_TX_TIMEOUT		2500
147*4882a593Smuzhiyun #define CARL9170_JANITOR_DELAY		128
148*4882a593Smuzhiyun #define CARL9170_QUEUE_STUCK_TIMEOUT	5500
149*4882a593Smuzhiyun #define CARL9170_STAT_WORK		30000
150*4882a593Smuzhiyun 
151*4882a593Smuzhiyun #define CARL9170_NUM_TX_AGG_MAX		30
152*4882a593Smuzhiyun 
153*4882a593Smuzhiyun /*
154*4882a593Smuzhiyun  * Tradeoff between stability/latency and speed.
155*4882a593Smuzhiyun  *
156*4882a593Smuzhiyun  * AR9170_TXQ_DEPTH is devised by dividing the amount of available
157*4882a593Smuzhiyun  * tx buffers with the size of a full ethernet frame + overhead.
158*4882a593Smuzhiyun  *
159*4882a593Smuzhiyun  * Naturally: The higher the limit, the faster the device CAN send.
160*4882a593Smuzhiyun  * However, even a slight over-commitment at the wrong time and the
161*4882a593Smuzhiyun  * hardware is doomed to send all already-queued frames at suboptimal
162*4882a593Smuzhiyun  * rates. This in turn leads to an enormous amount of unsuccessful
163*4882a593Smuzhiyun  * retries => Latency goes up, whereas the throughput goes down. CRASH!
164*4882a593Smuzhiyun  */
165*4882a593Smuzhiyun #define CARL9170_NUM_TX_LIMIT_HARD	((AR9170_TXQ_DEPTH * 3) / 2)
166*4882a593Smuzhiyun #define CARL9170_NUM_TX_LIMIT_SOFT	(AR9170_TXQ_DEPTH)
167*4882a593Smuzhiyun 
168*4882a593Smuzhiyun struct carl9170_tx_queue_stats {
169*4882a593Smuzhiyun 	unsigned int count;
170*4882a593Smuzhiyun 	unsigned int limit;
171*4882a593Smuzhiyun 	unsigned int len;
172*4882a593Smuzhiyun };
173*4882a593Smuzhiyun 
174*4882a593Smuzhiyun struct carl9170_vif {
175*4882a593Smuzhiyun 	unsigned int id;
176*4882a593Smuzhiyun 	struct ieee80211_vif __rcu *vif;
177*4882a593Smuzhiyun };
178*4882a593Smuzhiyun 
179*4882a593Smuzhiyun struct carl9170_vif_info {
180*4882a593Smuzhiyun 	struct list_head list;
181*4882a593Smuzhiyun 	bool active;
182*4882a593Smuzhiyun 	unsigned int id;
183*4882a593Smuzhiyun 	struct sk_buff *beacon;
184*4882a593Smuzhiyun 	bool enable_beacon;
185*4882a593Smuzhiyun };
186*4882a593Smuzhiyun 
187*4882a593Smuzhiyun #define AR9170_NUM_RX_URBS	16
188*4882a593Smuzhiyun #define AR9170_NUM_RX_URBS_MUL	2
189*4882a593Smuzhiyun #define AR9170_NUM_TX_URBS	8
190*4882a593Smuzhiyun #define AR9170_NUM_RX_URBS_POOL (AR9170_NUM_RX_URBS_MUL * AR9170_NUM_RX_URBS)
191*4882a593Smuzhiyun 
192*4882a593Smuzhiyun enum carl9170_device_features {
193*4882a593Smuzhiyun 	CARL9170_WPS_BUTTON		= BIT(0),
194*4882a593Smuzhiyun 	CARL9170_ONE_LED		= BIT(1),
195*4882a593Smuzhiyun };
196*4882a593Smuzhiyun 
197*4882a593Smuzhiyun #ifdef CONFIG_CARL9170_LEDS
198*4882a593Smuzhiyun struct ar9170;
199*4882a593Smuzhiyun 
200*4882a593Smuzhiyun struct carl9170_led {
201*4882a593Smuzhiyun 	struct ar9170 *ar;
202*4882a593Smuzhiyun 	struct led_classdev l;
203*4882a593Smuzhiyun 	char name[32];
204*4882a593Smuzhiyun 	unsigned int toggled;
205*4882a593Smuzhiyun 	bool last_state;
206*4882a593Smuzhiyun 	bool registered;
207*4882a593Smuzhiyun };
208*4882a593Smuzhiyun #endif /* CONFIG_CARL9170_LEDS */
209*4882a593Smuzhiyun 
210*4882a593Smuzhiyun enum carl9170_restart_reasons {
211*4882a593Smuzhiyun 	CARL9170_RR_NO_REASON = 0,
212*4882a593Smuzhiyun 	CARL9170_RR_FATAL_FIRMWARE_ERROR,
213*4882a593Smuzhiyun 	CARL9170_RR_TOO_MANY_FIRMWARE_ERRORS,
214*4882a593Smuzhiyun 	CARL9170_RR_WATCHDOG,
215*4882a593Smuzhiyun 	CARL9170_RR_STUCK_TX,
216*4882a593Smuzhiyun 	CARL9170_RR_UNRESPONSIVE_DEVICE,
217*4882a593Smuzhiyun 	CARL9170_RR_COMMAND_TIMEOUT,
218*4882a593Smuzhiyun 	CARL9170_RR_TOO_MANY_PHY_ERRORS,
219*4882a593Smuzhiyun 	CARL9170_RR_LOST_RSP,
220*4882a593Smuzhiyun 	CARL9170_RR_INVALID_RSP,
221*4882a593Smuzhiyun 	CARL9170_RR_USER_REQUEST,
222*4882a593Smuzhiyun 
223*4882a593Smuzhiyun 	__CARL9170_RR_LAST,
224*4882a593Smuzhiyun };
225*4882a593Smuzhiyun 
226*4882a593Smuzhiyun enum carl9170_erp_modes {
227*4882a593Smuzhiyun 	CARL9170_ERP_INVALID,
228*4882a593Smuzhiyun 	CARL9170_ERP_AUTO,
229*4882a593Smuzhiyun 	CARL9170_ERP_MAC80211,
230*4882a593Smuzhiyun 	CARL9170_ERP_OFF,
231*4882a593Smuzhiyun 	CARL9170_ERP_CTS,
232*4882a593Smuzhiyun 	CARL9170_ERP_RTS,
233*4882a593Smuzhiyun 	__CARL9170_ERP_NUM,
234*4882a593Smuzhiyun };
235*4882a593Smuzhiyun 
236*4882a593Smuzhiyun struct ar9170 {
237*4882a593Smuzhiyun 	struct ath_common common;
238*4882a593Smuzhiyun 	struct ieee80211_hw *hw;
239*4882a593Smuzhiyun 	struct mutex mutex;
240*4882a593Smuzhiyun 	enum carl9170_device_state state;
241*4882a593Smuzhiyun 	spinlock_t state_lock;
242*4882a593Smuzhiyun 	enum carl9170_restart_reasons last_reason;
243*4882a593Smuzhiyun 	bool registered;
244*4882a593Smuzhiyun 
245*4882a593Smuzhiyun 	/* USB */
246*4882a593Smuzhiyun 	struct usb_device *udev;
247*4882a593Smuzhiyun 	struct usb_interface *intf;
248*4882a593Smuzhiyun 	struct usb_anchor rx_anch;
249*4882a593Smuzhiyun 	struct usb_anchor rx_work;
250*4882a593Smuzhiyun 	struct usb_anchor rx_pool;
251*4882a593Smuzhiyun 	struct usb_anchor tx_wait;
252*4882a593Smuzhiyun 	struct usb_anchor tx_anch;
253*4882a593Smuzhiyun 	struct usb_anchor tx_cmd;
254*4882a593Smuzhiyun 	struct usb_anchor tx_err;
255*4882a593Smuzhiyun 	struct tasklet_struct usb_tasklet;
256*4882a593Smuzhiyun 	atomic_t tx_cmd_urbs;
257*4882a593Smuzhiyun 	atomic_t tx_anch_urbs;
258*4882a593Smuzhiyun 	atomic_t rx_anch_urbs;
259*4882a593Smuzhiyun 	atomic_t rx_work_urbs;
260*4882a593Smuzhiyun 	atomic_t rx_pool_urbs;
261*4882a593Smuzhiyun 	kernel_ulong_t features;
262*4882a593Smuzhiyun 	bool usb_ep_cmd_is_bulk;
263*4882a593Smuzhiyun 
264*4882a593Smuzhiyun 	/* firmware settings */
265*4882a593Smuzhiyun 	struct completion fw_load_wait;
266*4882a593Smuzhiyun 	struct completion fw_boot_wait;
267*4882a593Smuzhiyun 	struct {
268*4882a593Smuzhiyun 		const struct carl9170fw_desc_head *desc;
269*4882a593Smuzhiyun 		const struct firmware *fw;
270*4882a593Smuzhiyun 		unsigned int offset;
271*4882a593Smuzhiyun 		unsigned int address;
272*4882a593Smuzhiyun 		unsigned int cmd_bufs;
273*4882a593Smuzhiyun 		unsigned int api_version;
274*4882a593Smuzhiyun 		unsigned int vif_num;
275*4882a593Smuzhiyun 		unsigned int err_counter;
276*4882a593Smuzhiyun 		unsigned int bug_counter;
277*4882a593Smuzhiyun 		u32 beacon_addr;
278*4882a593Smuzhiyun 		unsigned int beacon_max_len;
279*4882a593Smuzhiyun 		bool rx_stream;
280*4882a593Smuzhiyun 		bool tx_stream;
281*4882a593Smuzhiyun 		bool rx_filter;
282*4882a593Smuzhiyun 		bool hw_counters;
283*4882a593Smuzhiyun 		unsigned int mem_blocks;
284*4882a593Smuzhiyun 		unsigned int mem_block_size;
285*4882a593Smuzhiyun 		unsigned int rx_size;
286*4882a593Smuzhiyun 		unsigned int tx_seq_table;
287*4882a593Smuzhiyun 		bool ba_filter;
288*4882a593Smuzhiyun 		bool disable_offload_fw;
289*4882a593Smuzhiyun 	} fw;
290*4882a593Smuzhiyun 
291*4882a593Smuzhiyun 	/* interface configuration combinations */
292*4882a593Smuzhiyun 	struct ieee80211_iface_limit if_comb_limits[1];
293*4882a593Smuzhiyun 	struct ieee80211_iface_combination if_combs[1];
294*4882a593Smuzhiyun 
295*4882a593Smuzhiyun 	/* reset / stuck frames/queue detection */
296*4882a593Smuzhiyun 	struct work_struct restart_work;
297*4882a593Smuzhiyun 	struct work_struct ping_work;
298*4882a593Smuzhiyun 	unsigned int restart_counter;
299*4882a593Smuzhiyun 	unsigned long queue_stop_timeout[__AR9170_NUM_TXQ];
300*4882a593Smuzhiyun 	unsigned long max_queue_stop_timeout[__AR9170_NUM_TXQ];
301*4882a593Smuzhiyun 	bool needs_full_reset;
302*4882a593Smuzhiyun 	bool force_usb_reset;
303*4882a593Smuzhiyun 	atomic_t pending_restarts;
304*4882a593Smuzhiyun 
305*4882a593Smuzhiyun 	/* interface mode settings */
306*4882a593Smuzhiyun 	struct list_head vif_list;
307*4882a593Smuzhiyun 	unsigned long vif_bitmap;
308*4882a593Smuzhiyun 	unsigned int vifs;
309*4882a593Smuzhiyun 	struct carl9170_vif vif_priv[AR9170_MAX_VIRTUAL_MAC];
310*4882a593Smuzhiyun 
311*4882a593Smuzhiyun 	/* beaconing */
312*4882a593Smuzhiyun 	spinlock_t beacon_lock;
313*4882a593Smuzhiyun 	unsigned int global_pretbtt;
314*4882a593Smuzhiyun 	unsigned int global_beacon_int;
315*4882a593Smuzhiyun 	struct carl9170_vif_info __rcu *beacon_iter;
316*4882a593Smuzhiyun 	unsigned int beacon_enabled;
317*4882a593Smuzhiyun 
318*4882a593Smuzhiyun 	/* cryptographic engine */
319*4882a593Smuzhiyun 	u64 usedkeys;
320*4882a593Smuzhiyun 	bool rx_software_decryption;
321*4882a593Smuzhiyun 	bool disable_offload;
322*4882a593Smuzhiyun 
323*4882a593Smuzhiyun 	/* filter settings */
324*4882a593Smuzhiyun 	u64 cur_mc_hash;
325*4882a593Smuzhiyun 	u32 cur_filter;
326*4882a593Smuzhiyun 	unsigned int filter_state;
327*4882a593Smuzhiyun 	unsigned int rx_filter_caps;
328*4882a593Smuzhiyun 	bool sniffer_enabled;
329*4882a593Smuzhiyun 
330*4882a593Smuzhiyun 	/* MAC */
331*4882a593Smuzhiyun 	enum carl9170_erp_modes erp_mode;
332*4882a593Smuzhiyun 
333*4882a593Smuzhiyun 	/* PHY */
334*4882a593Smuzhiyun 	struct ieee80211_channel *channel;
335*4882a593Smuzhiyun 	unsigned int num_channels;
336*4882a593Smuzhiyun 	int noise[4];
337*4882a593Smuzhiyun 	unsigned int chan_fail;
338*4882a593Smuzhiyun 	unsigned int total_chan_fail;
339*4882a593Smuzhiyun 	u8 heavy_clip;
340*4882a593Smuzhiyun 	u8 ht_settings;
341*4882a593Smuzhiyun 	struct {
342*4882a593Smuzhiyun 		u64 active;	/* usec */
343*4882a593Smuzhiyun 		u64 cca;	/* usec */
344*4882a593Smuzhiyun 		u64 tx_time;	/* usec */
345*4882a593Smuzhiyun 		u64 rx_total;
346*4882a593Smuzhiyun 		u64 rx_overrun;
347*4882a593Smuzhiyun 	} tally;
348*4882a593Smuzhiyun 	struct delayed_work stat_work;
349*4882a593Smuzhiyun 	struct survey_info *survey;
350*4882a593Smuzhiyun 
351*4882a593Smuzhiyun 	/* power calibration data */
352*4882a593Smuzhiyun 	u8 power_5G_leg[4];
353*4882a593Smuzhiyun 	u8 power_2G_cck[4];
354*4882a593Smuzhiyun 	u8 power_2G_ofdm[4];
355*4882a593Smuzhiyun 	u8 power_5G_ht20[8];
356*4882a593Smuzhiyun 	u8 power_5G_ht40[8];
357*4882a593Smuzhiyun 	u8 power_2G_ht20[8];
358*4882a593Smuzhiyun 	u8 power_2G_ht40[8];
359*4882a593Smuzhiyun 
360*4882a593Smuzhiyun #ifdef CONFIG_CARL9170_LEDS
361*4882a593Smuzhiyun 	/* LED */
362*4882a593Smuzhiyun 	struct delayed_work led_work;
363*4882a593Smuzhiyun 	struct carl9170_led leds[AR9170_NUM_LEDS];
364*4882a593Smuzhiyun #endif /* CONFIG_CARL9170_LEDS */
365*4882a593Smuzhiyun 
366*4882a593Smuzhiyun 	/* qos queue settings */
367*4882a593Smuzhiyun 	spinlock_t tx_stats_lock;
368*4882a593Smuzhiyun 	struct carl9170_tx_queue_stats tx_stats[__AR9170_NUM_TXQ];
369*4882a593Smuzhiyun 	struct ieee80211_tx_queue_params edcf[5];
370*4882a593Smuzhiyun 	struct completion tx_flush;
371*4882a593Smuzhiyun 
372*4882a593Smuzhiyun 	/* CMD */
373*4882a593Smuzhiyun 	int cmd_seq;
374*4882a593Smuzhiyun 	int readlen;
375*4882a593Smuzhiyun 	u8 *readbuf;
376*4882a593Smuzhiyun 	spinlock_t cmd_lock;
377*4882a593Smuzhiyun 	struct completion cmd_wait;
378*4882a593Smuzhiyun 	union {
379*4882a593Smuzhiyun 		__le32 cmd_buf[PAYLOAD_MAX + 1];
380*4882a593Smuzhiyun 		struct carl9170_cmd cmd;
381*4882a593Smuzhiyun 		struct carl9170_rsp rsp;
382*4882a593Smuzhiyun 	};
383*4882a593Smuzhiyun 
384*4882a593Smuzhiyun 	/* statistics */
385*4882a593Smuzhiyun 	unsigned int tx_dropped;
386*4882a593Smuzhiyun 	unsigned int tx_ack_failures;
387*4882a593Smuzhiyun 	unsigned int tx_fcs_errors;
388*4882a593Smuzhiyun 	unsigned int rx_dropped;
389*4882a593Smuzhiyun 
390*4882a593Smuzhiyun 	/* EEPROM */
391*4882a593Smuzhiyun 	struct ar9170_eeprom eeprom;
392*4882a593Smuzhiyun 
393*4882a593Smuzhiyun 	/* tx queuing */
394*4882a593Smuzhiyun 	struct sk_buff_head tx_pending[__AR9170_NUM_TXQ];
395*4882a593Smuzhiyun 	struct sk_buff_head tx_status[__AR9170_NUM_TXQ];
396*4882a593Smuzhiyun 	struct delayed_work tx_janitor;
397*4882a593Smuzhiyun 	unsigned long tx_janitor_last_run;
398*4882a593Smuzhiyun 	bool tx_schedule;
399*4882a593Smuzhiyun 
400*4882a593Smuzhiyun 	/* tx ampdu */
401*4882a593Smuzhiyun 	struct work_struct ampdu_work;
402*4882a593Smuzhiyun 	spinlock_t tx_ampdu_list_lock;
403*4882a593Smuzhiyun 	struct carl9170_sta_tid __rcu *tx_ampdu_iter;
404*4882a593Smuzhiyun 	struct list_head tx_ampdu_list;
405*4882a593Smuzhiyun 	atomic_t tx_ampdu_upload;
406*4882a593Smuzhiyun 	atomic_t tx_ampdu_scheduler;
407*4882a593Smuzhiyun 	atomic_t tx_total_pending;
408*4882a593Smuzhiyun 	atomic_t tx_total_queued;
409*4882a593Smuzhiyun 	unsigned int tx_ampdu_list_len;
410*4882a593Smuzhiyun 	int current_density;
411*4882a593Smuzhiyun 	int current_factor;
412*4882a593Smuzhiyun 	bool tx_ampdu_schedule;
413*4882a593Smuzhiyun 
414*4882a593Smuzhiyun 	/* internal memory management */
415*4882a593Smuzhiyun 	spinlock_t mem_lock;
416*4882a593Smuzhiyun 	unsigned long *mem_bitmap;
417*4882a593Smuzhiyun 	atomic_t mem_free_blocks;
418*4882a593Smuzhiyun 	atomic_t mem_allocs;
419*4882a593Smuzhiyun 
420*4882a593Smuzhiyun 	/* rxstream mpdu merge */
421*4882a593Smuzhiyun 	struct ar9170_rx_head rx_plcp;
422*4882a593Smuzhiyun 	bool rx_has_plcp;
423*4882a593Smuzhiyun 	struct sk_buff *rx_failover;
424*4882a593Smuzhiyun 	int rx_failover_missing;
425*4882a593Smuzhiyun 	u32 ampdu_ref;
426*4882a593Smuzhiyun 
427*4882a593Smuzhiyun 	/* FIFO for collecting outstanding BlockAckRequest */
428*4882a593Smuzhiyun 	struct list_head bar_list[__AR9170_NUM_TXQ];
429*4882a593Smuzhiyun 	spinlock_t bar_list_lock[__AR9170_NUM_TXQ];
430*4882a593Smuzhiyun 
431*4882a593Smuzhiyun #ifdef CONFIG_CARL9170_WPC
432*4882a593Smuzhiyun 	struct {
433*4882a593Smuzhiyun 		bool pbc_state;
434*4882a593Smuzhiyun 		struct input_dev *pbc;
435*4882a593Smuzhiyun 		char name[32];
436*4882a593Smuzhiyun 		char phys[32];
437*4882a593Smuzhiyun 	} wps;
438*4882a593Smuzhiyun #endif /* CONFIG_CARL9170_WPC */
439*4882a593Smuzhiyun 
440*4882a593Smuzhiyun #ifdef CONFIG_CARL9170_DEBUGFS
441*4882a593Smuzhiyun 	struct carl9170_debug debug;
442*4882a593Smuzhiyun 	struct dentry *debug_dir;
443*4882a593Smuzhiyun #endif /* CONFIG_CARL9170_DEBUGFS */
444*4882a593Smuzhiyun 
445*4882a593Smuzhiyun 	/* PSM */
446*4882a593Smuzhiyun 	struct work_struct ps_work;
447*4882a593Smuzhiyun 	struct {
448*4882a593Smuzhiyun 		unsigned int dtim_counter;
449*4882a593Smuzhiyun 		unsigned long last_beacon;
450*4882a593Smuzhiyun 		unsigned long last_action;
451*4882a593Smuzhiyun 		unsigned long last_slept;
452*4882a593Smuzhiyun 		unsigned int sleep_ms;
453*4882a593Smuzhiyun 		unsigned int off_override;
454*4882a593Smuzhiyun 		bool state;
455*4882a593Smuzhiyun 	} ps;
456*4882a593Smuzhiyun 
457*4882a593Smuzhiyun #ifdef CONFIG_CARL9170_HWRNG
458*4882a593Smuzhiyun # define CARL9170_HWRNG_CACHE_SIZE	CARL9170_MAX_CMD_PAYLOAD_LEN
459*4882a593Smuzhiyun 	struct {
460*4882a593Smuzhiyun 		struct hwrng rng;
461*4882a593Smuzhiyun 		bool initialized;
462*4882a593Smuzhiyun 		char name[30 + 1];
463*4882a593Smuzhiyun 		u16 cache[CARL9170_HWRNG_CACHE_SIZE / sizeof(u16)];
464*4882a593Smuzhiyun 		unsigned int cache_idx;
465*4882a593Smuzhiyun 	} rng;
466*4882a593Smuzhiyun #endif /* CONFIG_CARL9170_HWRNG */
467*4882a593Smuzhiyun };
468*4882a593Smuzhiyun 
469*4882a593Smuzhiyun enum carl9170_ps_off_override_reasons {
470*4882a593Smuzhiyun 	PS_OFF_VIF	= BIT(0),
471*4882a593Smuzhiyun 	PS_OFF_BCN	= BIT(1),
472*4882a593Smuzhiyun };
473*4882a593Smuzhiyun 
474*4882a593Smuzhiyun struct carl9170_bar_list_entry {
475*4882a593Smuzhiyun 	struct list_head list;
476*4882a593Smuzhiyun 	struct rcu_head head;
477*4882a593Smuzhiyun 	struct sk_buff *skb;
478*4882a593Smuzhiyun };
479*4882a593Smuzhiyun 
480*4882a593Smuzhiyun struct carl9170_ba_stats {
481*4882a593Smuzhiyun 	u8 ampdu_len;
482*4882a593Smuzhiyun 	u8 ampdu_ack_len;
483*4882a593Smuzhiyun 	bool clear;
484*4882a593Smuzhiyun 	bool req;
485*4882a593Smuzhiyun };
486*4882a593Smuzhiyun 
487*4882a593Smuzhiyun struct carl9170_sta_info {
488*4882a593Smuzhiyun 	bool ht_sta;
489*4882a593Smuzhiyun 	bool sleeping;
490*4882a593Smuzhiyun 	atomic_t pending_frames;
491*4882a593Smuzhiyun 	unsigned int ampdu_max_len;
492*4882a593Smuzhiyun 	struct carl9170_sta_tid __rcu *agg[IEEE80211_NUM_TIDS];
493*4882a593Smuzhiyun 	struct carl9170_ba_stats stats[IEEE80211_NUM_TIDS];
494*4882a593Smuzhiyun };
495*4882a593Smuzhiyun 
496*4882a593Smuzhiyun struct carl9170_tx_info {
497*4882a593Smuzhiyun 	unsigned long timeout;
498*4882a593Smuzhiyun 	struct ar9170 *ar;
499*4882a593Smuzhiyun 	struct kref ref;
500*4882a593Smuzhiyun };
501*4882a593Smuzhiyun 
502*4882a593Smuzhiyun #define CHK_DEV_STATE(a, s)	(((struct ar9170 *)a)->state >= (s))
503*4882a593Smuzhiyun #define IS_INITIALIZED(a)	(CHK_DEV_STATE(a, CARL9170_STOPPED))
504*4882a593Smuzhiyun #define IS_ACCEPTING_CMD(a)	(CHK_DEV_STATE(a, CARL9170_IDLE))
505*4882a593Smuzhiyun #define IS_STARTED(a)		(CHK_DEV_STATE(a, CARL9170_STARTED))
506*4882a593Smuzhiyun 
__carl9170_set_state(struct ar9170 * ar,enum carl9170_device_state newstate)507*4882a593Smuzhiyun static inline void __carl9170_set_state(struct ar9170 *ar,
508*4882a593Smuzhiyun 	enum carl9170_device_state newstate)
509*4882a593Smuzhiyun {
510*4882a593Smuzhiyun 	ar->state = newstate;
511*4882a593Smuzhiyun }
512*4882a593Smuzhiyun 
carl9170_set_state(struct ar9170 * ar,enum carl9170_device_state newstate)513*4882a593Smuzhiyun static inline void carl9170_set_state(struct ar9170 *ar,
514*4882a593Smuzhiyun 	enum carl9170_device_state newstate)
515*4882a593Smuzhiyun {
516*4882a593Smuzhiyun 	unsigned long flags;
517*4882a593Smuzhiyun 
518*4882a593Smuzhiyun 	spin_lock_irqsave(&ar->state_lock, flags);
519*4882a593Smuzhiyun 	__carl9170_set_state(ar, newstate);
520*4882a593Smuzhiyun 	spin_unlock_irqrestore(&ar->state_lock, flags);
521*4882a593Smuzhiyun }
522*4882a593Smuzhiyun 
carl9170_set_state_when(struct ar9170 * ar,enum carl9170_device_state min,enum carl9170_device_state newstate)523*4882a593Smuzhiyun static inline void carl9170_set_state_when(struct ar9170 *ar,
524*4882a593Smuzhiyun 	enum carl9170_device_state min, enum carl9170_device_state newstate)
525*4882a593Smuzhiyun {
526*4882a593Smuzhiyun 	unsigned long flags;
527*4882a593Smuzhiyun 
528*4882a593Smuzhiyun 	spin_lock_irqsave(&ar->state_lock, flags);
529*4882a593Smuzhiyun 	if (CHK_DEV_STATE(ar, min))
530*4882a593Smuzhiyun 		__carl9170_set_state(ar, newstate);
531*4882a593Smuzhiyun 	spin_unlock_irqrestore(&ar->state_lock, flags);
532*4882a593Smuzhiyun }
533*4882a593Smuzhiyun 
534*4882a593Smuzhiyun /* exported interface */
535*4882a593Smuzhiyun void *carl9170_alloc(size_t priv_size);
536*4882a593Smuzhiyun int carl9170_register(struct ar9170 *ar);
537*4882a593Smuzhiyun void carl9170_unregister(struct ar9170 *ar);
538*4882a593Smuzhiyun void carl9170_free(struct ar9170 *ar);
539*4882a593Smuzhiyun void carl9170_restart(struct ar9170 *ar, const enum carl9170_restart_reasons r);
540*4882a593Smuzhiyun void carl9170_ps_check(struct ar9170 *ar);
541*4882a593Smuzhiyun 
542*4882a593Smuzhiyun /* USB back-end */
543*4882a593Smuzhiyun int carl9170_usb_open(struct ar9170 *ar);
544*4882a593Smuzhiyun void carl9170_usb_stop(struct ar9170 *ar);
545*4882a593Smuzhiyun void carl9170_usb_tx(struct ar9170 *ar, struct sk_buff *skb);
546*4882a593Smuzhiyun void carl9170_usb_handle_tx_err(struct ar9170 *ar);
547*4882a593Smuzhiyun int carl9170_exec_cmd(struct ar9170 *ar, const enum carl9170_cmd_oids,
548*4882a593Smuzhiyun 		      u32 plen, void *payload, u32 rlen, void *resp);
549*4882a593Smuzhiyun int __carl9170_exec_cmd(struct ar9170 *ar, struct carl9170_cmd *cmd,
550*4882a593Smuzhiyun 			const bool free_buf);
551*4882a593Smuzhiyun int carl9170_usb_restart(struct ar9170 *ar);
552*4882a593Smuzhiyun void carl9170_usb_reset(struct ar9170 *ar);
553*4882a593Smuzhiyun 
554*4882a593Smuzhiyun /* MAC */
555*4882a593Smuzhiyun int carl9170_init_mac(struct ar9170 *ar);
556*4882a593Smuzhiyun int carl9170_set_qos(struct ar9170 *ar);
557*4882a593Smuzhiyun int carl9170_update_multicast(struct ar9170 *ar, const u64 mc_hast);
558*4882a593Smuzhiyun int carl9170_mod_virtual_mac(struct ar9170 *ar, const unsigned int id,
559*4882a593Smuzhiyun 			     const u8 *mac);
560*4882a593Smuzhiyun int carl9170_set_operating_mode(struct ar9170 *ar);
561*4882a593Smuzhiyun int carl9170_set_beacon_timers(struct ar9170 *ar);
562*4882a593Smuzhiyun int carl9170_set_dyn_sifs_ack(struct ar9170 *ar);
563*4882a593Smuzhiyun int carl9170_set_rts_cts_rate(struct ar9170 *ar);
564*4882a593Smuzhiyun int carl9170_set_ampdu_settings(struct ar9170 *ar);
565*4882a593Smuzhiyun int carl9170_set_slot_time(struct ar9170 *ar);
566*4882a593Smuzhiyun int carl9170_set_mac_rates(struct ar9170 *ar);
567*4882a593Smuzhiyun int carl9170_set_hwretry_limit(struct ar9170 *ar, const u32 max_retry);
568*4882a593Smuzhiyun int carl9170_upload_key(struct ar9170 *ar, const u8 id, const u8 *mac,
569*4882a593Smuzhiyun 	const u8 ktype, const u8 keyidx, const u8 *keydata, const int keylen);
570*4882a593Smuzhiyun int carl9170_disable_key(struct ar9170 *ar, const u8 id);
571*4882a593Smuzhiyun int carl9170_set_mac_tpc(struct ar9170 *ar, struct ieee80211_channel *channel);
572*4882a593Smuzhiyun 
573*4882a593Smuzhiyun /* RX */
574*4882a593Smuzhiyun void carl9170_rx(struct ar9170 *ar, void *buf, unsigned int len);
575*4882a593Smuzhiyun void carl9170_handle_command_response(struct ar9170 *ar, void *buf, u32 len);
576*4882a593Smuzhiyun 
577*4882a593Smuzhiyun /* TX */
578*4882a593Smuzhiyun void carl9170_op_tx(struct ieee80211_hw *hw,
579*4882a593Smuzhiyun 		    struct ieee80211_tx_control *control,
580*4882a593Smuzhiyun 		    struct sk_buff *skb);
581*4882a593Smuzhiyun void carl9170_tx_janitor(struct work_struct *work);
582*4882a593Smuzhiyun void carl9170_tx_process_status(struct ar9170 *ar,
583*4882a593Smuzhiyun 				const struct carl9170_rsp *cmd);
584*4882a593Smuzhiyun void carl9170_tx_status(struct ar9170 *ar, struct sk_buff *skb,
585*4882a593Smuzhiyun 			const bool success);
586*4882a593Smuzhiyun void carl9170_tx_callback(struct ar9170 *ar, struct sk_buff *skb);
587*4882a593Smuzhiyun void carl9170_tx_drop(struct ar9170 *ar, struct sk_buff *skb);
588*4882a593Smuzhiyun void carl9170_tx_scheduler(struct ar9170 *ar);
589*4882a593Smuzhiyun void carl9170_tx_get_skb(struct sk_buff *skb);
590*4882a593Smuzhiyun int carl9170_tx_put_skb(struct sk_buff *skb);
591*4882a593Smuzhiyun int carl9170_update_beacon(struct ar9170 *ar, const bool submit);
592*4882a593Smuzhiyun 
593*4882a593Smuzhiyun /* LEDs */
594*4882a593Smuzhiyun #ifdef CONFIG_CARL9170_LEDS
595*4882a593Smuzhiyun int carl9170_led_register(struct ar9170 *ar);
596*4882a593Smuzhiyun void carl9170_led_unregister(struct ar9170 *ar);
597*4882a593Smuzhiyun #endif /* CONFIG_CARL9170_LEDS */
598*4882a593Smuzhiyun int carl9170_led_init(struct ar9170 *ar);
599*4882a593Smuzhiyun int carl9170_led_set_state(struct ar9170 *ar, const u32 led_state);
600*4882a593Smuzhiyun 
601*4882a593Smuzhiyun /* PHY / RF */
602*4882a593Smuzhiyun int carl9170_set_channel(struct ar9170 *ar, struct ieee80211_channel *channel,
603*4882a593Smuzhiyun 			 enum nl80211_channel_type bw);
604*4882a593Smuzhiyun int carl9170_get_noisefloor(struct ar9170 *ar);
605*4882a593Smuzhiyun 
606*4882a593Smuzhiyun /* FW */
607*4882a593Smuzhiyun int carl9170_parse_firmware(struct ar9170 *ar);
608*4882a593Smuzhiyun 
609*4882a593Smuzhiyun extern struct ieee80211_rate __carl9170_ratetable[];
610*4882a593Smuzhiyun extern int modparam_noht;
611*4882a593Smuzhiyun 
carl9170_get_priv(struct carl9170_vif * carl_vif)612*4882a593Smuzhiyun static inline struct ar9170 *carl9170_get_priv(struct carl9170_vif *carl_vif)
613*4882a593Smuzhiyun {
614*4882a593Smuzhiyun 	return container_of(carl_vif, struct ar9170,
615*4882a593Smuzhiyun 			    vif_priv[carl_vif->id]);
616*4882a593Smuzhiyun }
617*4882a593Smuzhiyun 
carl9170_get_hdr(struct sk_buff * skb)618*4882a593Smuzhiyun static inline struct ieee80211_hdr *carl9170_get_hdr(struct sk_buff *skb)
619*4882a593Smuzhiyun {
620*4882a593Smuzhiyun 	return (void *)((struct _carl9170_tx_superframe *)
621*4882a593Smuzhiyun 		skb->data)->frame_data;
622*4882a593Smuzhiyun }
623*4882a593Smuzhiyun 
get_seq_h(struct ieee80211_hdr * hdr)624*4882a593Smuzhiyun static inline u16 get_seq_h(struct ieee80211_hdr *hdr)
625*4882a593Smuzhiyun {
626*4882a593Smuzhiyun 	return le16_to_cpu(hdr->seq_ctrl) >> 4;
627*4882a593Smuzhiyun }
628*4882a593Smuzhiyun 
carl9170_get_seq(struct sk_buff * skb)629*4882a593Smuzhiyun static inline u16 carl9170_get_seq(struct sk_buff *skb)
630*4882a593Smuzhiyun {
631*4882a593Smuzhiyun 	return get_seq_h(carl9170_get_hdr(skb));
632*4882a593Smuzhiyun }
633*4882a593Smuzhiyun 
get_tid_h(struct ieee80211_hdr * hdr)634*4882a593Smuzhiyun static inline u16 get_tid_h(struct ieee80211_hdr *hdr)
635*4882a593Smuzhiyun {
636*4882a593Smuzhiyun 	return (ieee80211_get_qos_ctl(hdr))[0] & IEEE80211_QOS_CTL_TID_MASK;
637*4882a593Smuzhiyun }
638*4882a593Smuzhiyun 
carl9170_get_tid(struct sk_buff * skb)639*4882a593Smuzhiyun static inline u16 carl9170_get_tid(struct sk_buff *skb)
640*4882a593Smuzhiyun {
641*4882a593Smuzhiyun 	return get_tid_h(carl9170_get_hdr(skb));
642*4882a593Smuzhiyun }
643*4882a593Smuzhiyun 
644*4882a593Smuzhiyun static inline struct ieee80211_vif *
carl9170_get_vif(struct carl9170_vif_info * priv)645*4882a593Smuzhiyun carl9170_get_vif(struct carl9170_vif_info *priv)
646*4882a593Smuzhiyun {
647*4882a593Smuzhiyun 	return container_of((void *)priv, struct ieee80211_vif, drv_priv);
648*4882a593Smuzhiyun }
649*4882a593Smuzhiyun 
650*4882a593Smuzhiyun /* Protected by ar->mutex or RCU */
carl9170_get_main_vif(struct ar9170 * ar)651*4882a593Smuzhiyun static inline struct ieee80211_vif *carl9170_get_main_vif(struct ar9170 *ar)
652*4882a593Smuzhiyun {
653*4882a593Smuzhiyun 	struct carl9170_vif_info *cvif;
654*4882a593Smuzhiyun 
655*4882a593Smuzhiyun 	list_for_each_entry_rcu(cvif, &ar->vif_list, list) {
656*4882a593Smuzhiyun 		if (cvif->active)
657*4882a593Smuzhiyun 			return carl9170_get_vif(cvif);
658*4882a593Smuzhiyun 	}
659*4882a593Smuzhiyun 
660*4882a593Smuzhiyun 	return NULL;
661*4882a593Smuzhiyun }
662*4882a593Smuzhiyun 
is_main_vif(struct ar9170 * ar,struct ieee80211_vif * vif)663*4882a593Smuzhiyun static inline bool is_main_vif(struct ar9170 *ar, struct ieee80211_vif *vif)
664*4882a593Smuzhiyun {
665*4882a593Smuzhiyun 	bool ret;
666*4882a593Smuzhiyun 
667*4882a593Smuzhiyun 	rcu_read_lock();
668*4882a593Smuzhiyun 	ret = (carl9170_get_main_vif(ar) == vif);
669*4882a593Smuzhiyun 	rcu_read_unlock();
670*4882a593Smuzhiyun 	return ret;
671*4882a593Smuzhiyun }
672*4882a593Smuzhiyun 
673*4882a593Smuzhiyun #endif /* __CARL9170_H */
674