1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright (c) 2010-2011 Atheros Communications Inc.
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Permission to use, copy, modify, and/or distribute this software for any
5*4882a593Smuzhiyun * purpose with or without fee is hereby granted, provided that the above
6*4882a593Smuzhiyun * copyright notice and this permission notice appear in all copies.
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9*4882a593Smuzhiyun * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10*4882a593Smuzhiyun * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11*4882a593Smuzhiyun * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12*4882a593Smuzhiyun * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13*4882a593Smuzhiyun * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14*4882a593Smuzhiyun * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15*4882a593Smuzhiyun */
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun #ifndef MCI_H
18*4882a593Smuzhiyun #define MCI_H
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun #include "ar9003_mci.h"
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun #define ATH_MCI_SCHED_BUF_SIZE (16 * 16) /* 16 entries, 4 dword each */
23*4882a593Smuzhiyun #define ATH_MCI_GPM_MAX_ENTRY 16
24*4882a593Smuzhiyun #define ATH_MCI_GPM_BUF_SIZE (ATH_MCI_GPM_MAX_ENTRY * 16)
25*4882a593Smuzhiyun #define ATH_MCI_DEF_BT_PERIOD 40
26*4882a593Smuzhiyun #define ATH_MCI_BDR_DUTY_CYCLE 20
27*4882a593Smuzhiyun #define ATH_MCI_MAX_DUTY_CYCLE 90
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun #define ATH_MCI_DEF_AGGR_LIMIT 6 /* in 0.24 ms */
30*4882a593Smuzhiyun #define ATH_MCI_MAX_ACL_PROFILE 7
31*4882a593Smuzhiyun #define ATH_MCI_MAX_SCO_PROFILE 1
32*4882a593Smuzhiyun #define ATH_MCI_MAX_PROFILE (ATH_MCI_MAX_ACL_PROFILE +\
33*4882a593Smuzhiyun ATH_MCI_MAX_SCO_PROFILE)
34*4882a593Smuzhiyun
35*4882a593Smuzhiyun #define ATH_MCI_INQUIRY_PRIO 62
36*4882a593Smuzhiyun #define ATH_MCI_HI_PRIO 60
37*4882a593Smuzhiyun #define ATH_MCI_NUM_BT_CHANNELS 79
38*4882a593Smuzhiyun #define ATH_MCI_CONCUR_TX_SWITCH 5
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun #define MCI_GPM_SET_CHANNEL_BIT(_p_gpm, _bt_chan) \
41*4882a593Smuzhiyun do { \
42*4882a593Smuzhiyun if (_bt_chan < ATH_MCI_NUM_BT_CHANNELS) { \
43*4882a593Smuzhiyun *(((u8 *)(_p_gpm)) + MCI_GPM_COEX_B_CHANNEL_MAP + \
44*4882a593Smuzhiyun (_bt_chan / 8)) |= (1 << (_bt_chan & 7)); \
45*4882a593Smuzhiyun } \
46*4882a593Smuzhiyun } while (0)
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun #define MCI_GPM_CLR_CHANNEL_BIT(_p_gpm, _bt_chan) \
49*4882a593Smuzhiyun do { \
50*4882a593Smuzhiyun if (_bt_chan < ATH_MCI_NUM_BT_CHANNELS) { \
51*4882a593Smuzhiyun *(((u8 *)(_p_gpm)) + MCI_GPM_COEX_B_CHANNEL_MAP + \
52*4882a593Smuzhiyun (_bt_chan / 8)) &= ~(1 << (_bt_chan & 7));\
53*4882a593Smuzhiyun } \
54*4882a593Smuzhiyun } while (0)
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun #define INC_PROF(_mci, _info) do { \
57*4882a593Smuzhiyun switch (_info->type) { \
58*4882a593Smuzhiyun case MCI_GPM_COEX_PROFILE_RFCOMM:\
59*4882a593Smuzhiyun _mci->num_other_acl++; \
60*4882a593Smuzhiyun break; \
61*4882a593Smuzhiyun case MCI_GPM_COEX_PROFILE_A2DP: \
62*4882a593Smuzhiyun _mci->num_a2dp++; \
63*4882a593Smuzhiyun if (!_info->edr) \
64*4882a593Smuzhiyun _mci->num_bdr++; \
65*4882a593Smuzhiyun break; \
66*4882a593Smuzhiyun case MCI_GPM_COEX_PROFILE_HID: \
67*4882a593Smuzhiyun _mci->num_hid++; \
68*4882a593Smuzhiyun break; \
69*4882a593Smuzhiyun case MCI_GPM_COEX_PROFILE_BNEP: \
70*4882a593Smuzhiyun _mci->num_pan++; \
71*4882a593Smuzhiyun break; \
72*4882a593Smuzhiyun case MCI_GPM_COEX_PROFILE_VOICE: \
73*4882a593Smuzhiyun case MCI_GPM_COEX_PROFILE_A2DPVO:\
74*4882a593Smuzhiyun _mci->num_sco++; \
75*4882a593Smuzhiyun break; \
76*4882a593Smuzhiyun default: \
77*4882a593Smuzhiyun break; \
78*4882a593Smuzhiyun } \
79*4882a593Smuzhiyun } while (0)
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun #define DEC_PROF(_mci, _info) do { \
82*4882a593Smuzhiyun switch (_info->type) { \
83*4882a593Smuzhiyun case MCI_GPM_COEX_PROFILE_RFCOMM:\
84*4882a593Smuzhiyun _mci->num_other_acl--; \
85*4882a593Smuzhiyun break; \
86*4882a593Smuzhiyun case MCI_GPM_COEX_PROFILE_A2DP: \
87*4882a593Smuzhiyun _mci->num_a2dp--; \
88*4882a593Smuzhiyun if (!_info->edr) \
89*4882a593Smuzhiyun _mci->num_bdr--; \
90*4882a593Smuzhiyun break; \
91*4882a593Smuzhiyun case MCI_GPM_COEX_PROFILE_HID: \
92*4882a593Smuzhiyun _mci->num_hid--; \
93*4882a593Smuzhiyun break; \
94*4882a593Smuzhiyun case MCI_GPM_COEX_PROFILE_BNEP: \
95*4882a593Smuzhiyun _mci->num_pan--; \
96*4882a593Smuzhiyun break; \
97*4882a593Smuzhiyun case MCI_GPM_COEX_PROFILE_VOICE: \
98*4882a593Smuzhiyun case MCI_GPM_COEX_PROFILE_A2DPVO:\
99*4882a593Smuzhiyun _mci->num_sco--; \
100*4882a593Smuzhiyun break; \
101*4882a593Smuzhiyun default: \
102*4882a593Smuzhiyun break; \
103*4882a593Smuzhiyun } \
104*4882a593Smuzhiyun } while (0)
105*4882a593Smuzhiyun
106*4882a593Smuzhiyun #define NUM_PROF(_mci) (_mci->num_other_acl + _mci->num_a2dp + \
107*4882a593Smuzhiyun _mci->num_hid + _mci->num_pan + _mci->num_sco)
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun struct ath_mci_profile_info {
110*4882a593Smuzhiyun u8 type;
111*4882a593Smuzhiyun u8 conn_handle;
112*4882a593Smuzhiyun bool start;
113*4882a593Smuzhiyun bool master;
114*4882a593Smuzhiyun bool edr;
115*4882a593Smuzhiyun u8 voice_type;
116*4882a593Smuzhiyun u16 T; /* Voice: Tvoice, HID: Tsniff, in slots */
117*4882a593Smuzhiyun u8 W; /* Voice: Wvoice, HID: Sniff timeout, in slots */
118*4882a593Smuzhiyun u8 A; /* HID: Sniff attempt, in slots */
119*4882a593Smuzhiyun struct list_head list;
120*4882a593Smuzhiyun };
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun struct ath_mci_profile_status {
123*4882a593Smuzhiyun bool is_critical;
124*4882a593Smuzhiyun bool is_link;
125*4882a593Smuzhiyun u8 conn_handle;
126*4882a593Smuzhiyun };
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun struct ath_mci_profile {
129*4882a593Smuzhiyun struct list_head info;
130*4882a593Smuzhiyun DECLARE_BITMAP(status, ATH_MCI_MAX_PROFILE);
131*4882a593Smuzhiyun u16 aggr_limit;
132*4882a593Smuzhiyun u8 num_mgmt;
133*4882a593Smuzhiyun u8 num_sco;
134*4882a593Smuzhiyun u8 num_a2dp;
135*4882a593Smuzhiyun u8 num_hid;
136*4882a593Smuzhiyun u8 num_pan;
137*4882a593Smuzhiyun u8 num_other_acl;
138*4882a593Smuzhiyun u8 num_bdr;
139*4882a593Smuzhiyun u8 voice_priority;
140*4882a593Smuzhiyun };
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun struct ath_mci_buf {
143*4882a593Smuzhiyun void *bf_addr; /* virtual addr of desc */
144*4882a593Smuzhiyun dma_addr_t bf_paddr; /* physical addr of buffer */
145*4882a593Smuzhiyun u32 bf_len; /* len of data */
146*4882a593Smuzhiyun };
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun struct ath_mci_coex {
149*4882a593Smuzhiyun struct ath_mci_buf sched_buf;
150*4882a593Smuzhiyun struct ath_mci_buf gpm_buf;
151*4882a593Smuzhiyun };
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun void ath_mci_flush_profile(struct ath_mci_profile *mci);
154*4882a593Smuzhiyun int ath_mci_setup(struct ath_softc *sc);
155*4882a593Smuzhiyun void ath_mci_cleanup(struct ath_softc *sc);
156*4882a593Smuzhiyun void ath_mci_intr(struct ath_softc *sc);
157*4882a593Smuzhiyun void ath9k_mci_update_rssi(struct ath_softc *sc);
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
160*4882a593Smuzhiyun void ath_mci_enable(struct ath_softc *sc);
161*4882a593Smuzhiyun void ath9k_mci_update_wlan_channels(struct ath_softc *sc, bool allow_all);
162*4882a593Smuzhiyun void ath9k_mci_set_txpower(struct ath_softc *sc, bool setchannel,
163*4882a593Smuzhiyun bool concur_tx);
164*4882a593Smuzhiyun #else
ath_mci_enable(struct ath_softc * sc)165*4882a593Smuzhiyun static inline void ath_mci_enable(struct ath_softc *sc)
166*4882a593Smuzhiyun {
167*4882a593Smuzhiyun }
ath9k_mci_update_wlan_channels(struct ath_softc * sc,bool allow_all)168*4882a593Smuzhiyun static inline void ath9k_mci_update_wlan_channels(struct ath_softc *sc,
169*4882a593Smuzhiyun bool allow_all)
170*4882a593Smuzhiyun {
171*4882a593Smuzhiyun }
ath9k_mci_set_txpower(struct ath_softc * sc,bool setchannel,bool concur_tx)172*4882a593Smuzhiyun static inline void ath9k_mci_set_txpower(struct ath_softc *sc, bool setchannel,
173*4882a593Smuzhiyun bool concur_tx)
174*4882a593Smuzhiyun {
175*4882a593Smuzhiyun }
176*4882a593Smuzhiyun #endif /* CONFIG_ATH9K_BTCOEX_SUPPORT */
177*4882a593Smuzhiyun
178*4882a593Smuzhiyun #endif /* MCI_H*/
179