1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright (c) 2010-2011 Atheros Communications Inc.
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Permission to use, copy, modify, and/or distribute this software for any
5*4882a593Smuzhiyun * purpose with or without fee is hereby granted, provided that the above
6*4882a593Smuzhiyun * copyright notice and this permission notice appear in all copies.
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9*4882a593Smuzhiyun * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10*4882a593Smuzhiyun * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11*4882a593Smuzhiyun * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12*4882a593Smuzhiyun * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13*4882a593Smuzhiyun * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14*4882a593Smuzhiyun * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15*4882a593Smuzhiyun */
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun #ifndef ATH9K_HW_OPS_H
18*4882a593Smuzhiyun #define ATH9K_HW_OPS_H
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun #include "hw.h"
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun /* Hardware core and driver accessible callbacks */
23*4882a593Smuzhiyun
ath9k_hw_configpcipowersave(struct ath_hw * ah,bool power_off)24*4882a593Smuzhiyun static inline void ath9k_hw_configpcipowersave(struct ath_hw *ah,
25*4882a593Smuzhiyun bool power_off)
26*4882a593Smuzhiyun {
27*4882a593Smuzhiyun if (!ah->aspm_enabled)
28*4882a593Smuzhiyun return;
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun ath9k_hw_ops(ah)->config_pci_powersave(ah, power_off);
31*4882a593Smuzhiyun }
32*4882a593Smuzhiyun
ath9k_hw_rxena(struct ath_hw * ah)33*4882a593Smuzhiyun static inline void ath9k_hw_rxena(struct ath_hw *ah)
34*4882a593Smuzhiyun {
35*4882a593Smuzhiyun ath9k_hw_ops(ah)->rx_enable(ah);
36*4882a593Smuzhiyun }
37*4882a593Smuzhiyun
ath9k_hw_set_desc_link(struct ath_hw * ah,void * ds,u32 link)38*4882a593Smuzhiyun static inline void ath9k_hw_set_desc_link(struct ath_hw *ah, void *ds,
39*4882a593Smuzhiyun u32 link)
40*4882a593Smuzhiyun {
41*4882a593Smuzhiyun ath9k_hw_ops(ah)->set_desc_link(ds, link);
42*4882a593Smuzhiyun }
43*4882a593Smuzhiyun
ath9k_hw_calibrate(struct ath_hw * ah,struct ath9k_channel * chan,u8 rxchainmask,bool longcal)44*4882a593Smuzhiyun static inline int ath9k_hw_calibrate(struct ath_hw *ah,
45*4882a593Smuzhiyun struct ath9k_channel *chan,
46*4882a593Smuzhiyun u8 rxchainmask, bool longcal)
47*4882a593Smuzhiyun {
48*4882a593Smuzhiyun return ath9k_hw_ops(ah)->calibrate(ah, chan, rxchainmask, longcal);
49*4882a593Smuzhiyun }
50*4882a593Smuzhiyun
ath9k_hw_getisr(struct ath_hw * ah,enum ath9k_int * masked,u32 * sync_cause_p)51*4882a593Smuzhiyun static inline bool ath9k_hw_getisr(struct ath_hw *ah, enum ath9k_int *masked,
52*4882a593Smuzhiyun u32 *sync_cause_p)
53*4882a593Smuzhiyun {
54*4882a593Smuzhiyun return ath9k_hw_ops(ah)->get_isr(ah, masked, sync_cause_p);
55*4882a593Smuzhiyun }
56*4882a593Smuzhiyun
ath9k_hw_set_txdesc(struct ath_hw * ah,void * ds,struct ath_tx_info * i)57*4882a593Smuzhiyun static inline void ath9k_hw_set_txdesc(struct ath_hw *ah, void *ds,
58*4882a593Smuzhiyun struct ath_tx_info *i)
59*4882a593Smuzhiyun {
60*4882a593Smuzhiyun return ath9k_hw_ops(ah)->set_txdesc(ah, ds, i);
61*4882a593Smuzhiyun }
62*4882a593Smuzhiyun
ath9k_hw_txprocdesc(struct ath_hw * ah,void * ds,struct ath_tx_status * ts)63*4882a593Smuzhiyun static inline int ath9k_hw_txprocdesc(struct ath_hw *ah, void *ds,
64*4882a593Smuzhiyun struct ath_tx_status *ts)
65*4882a593Smuzhiyun {
66*4882a593Smuzhiyun return ath9k_hw_ops(ah)->proc_txdesc(ah, ds, ts);
67*4882a593Smuzhiyun }
68*4882a593Smuzhiyun
ath9k_hw_get_duration(struct ath_hw * ah,const void * ds,int index)69*4882a593Smuzhiyun static inline int ath9k_hw_get_duration(struct ath_hw *ah, const void *ds,
70*4882a593Smuzhiyun int index)
71*4882a593Smuzhiyun {
72*4882a593Smuzhiyun return ath9k_hw_ops(ah)->get_duration(ah, ds, index);
73*4882a593Smuzhiyun }
74*4882a593Smuzhiyun
ath9k_hw_antdiv_comb_conf_get(struct ath_hw * ah,struct ath_hw_antcomb_conf * antconf)75*4882a593Smuzhiyun static inline void ath9k_hw_antdiv_comb_conf_get(struct ath_hw *ah,
76*4882a593Smuzhiyun struct ath_hw_antcomb_conf *antconf)
77*4882a593Smuzhiyun {
78*4882a593Smuzhiyun ath9k_hw_ops(ah)->antdiv_comb_conf_get(ah, antconf);
79*4882a593Smuzhiyun }
80*4882a593Smuzhiyun
ath9k_hw_antdiv_comb_conf_set(struct ath_hw * ah,struct ath_hw_antcomb_conf * antconf)81*4882a593Smuzhiyun static inline void ath9k_hw_antdiv_comb_conf_set(struct ath_hw *ah,
82*4882a593Smuzhiyun struct ath_hw_antcomb_conf *antconf)
83*4882a593Smuzhiyun {
84*4882a593Smuzhiyun ath9k_hw_ops(ah)->antdiv_comb_conf_set(ah, antconf);
85*4882a593Smuzhiyun }
86*4882a593Smuzhiyun
ath9k_hw_tx99_start(struct ath_hw * ah,u32 qnum)87*4882a593Smuzhiyun static inline void ath9k_hw_tx99_start(struct ath_hw *ah, u32 qnum)
88*4882a593Smuzhiyun {
89*4882a593Smuzhiyun ath9k_hw_ops(ah)->tx99_start(ah, qnum);
90*4882a593Smuzhiyun }
91*4882a593Smuzhiyun
ath9k_hw_tx99_stop(struct ath_hw * ah)92*4882a593Smuzhiyun static inline void ath9k_hw_tx99_stop(struct ath_hw *ah)
93*4882a593Smuzhiyun {
94*4882a593Smuzhiyun ath9k_hw_ops(ah)->tx99_stop(ah);
95*4882a593Smuzhiyun }
96*4882a593Smuzhiyun
ath9k_hw_tx99_set_txpower(struct ath_hw * ah,u8 power)97*4882a593Smuzhiyun static inline void ath9k_hw_tx99_set_txpower(struct ath_hw *ah, u8 power)
98*4882a593Smuzhiyun {
99*4882a593Smuzhiyun if (ath9k_hw_ops(ah)->tx99_set_txpower)
100*4882a593Smuzhiyun ath9k_hw_ops(ah)->tx99_set_txpower(ah, power);
101*4882a593Smuzhiyun }
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
104*4882a593Smuzhiyun
ath9k_hw_set_bt_ant_diversity(struct ath_hw * ah,bool enable)105*4882a593Smuzhiyun static inline void ath9k_hw_set_bt_ant_diversity(struct ath_hw *ah, bool enable)
106*4882a593Smuzhiyun {
107*4882a593Smuzhiyun if (ath9k_hw_ops(ah)->set_bt_ant_diversity)
108*4882a593Smuzhiyun ath9k_hw_ops(ah)->set_bt_ant_diversity(ah, enable);
109*4882a593Smuzhiyun }
110*4882a593Smuzhiyun
ath9k_hw_is_aic_enabled(struct ath_hw * ah)111*4882a593Smuzhiyun static inline bool ath9k_hw_is_aic_enabled(struct ath_hw *ah)
112*4882a593Smuzhiyun {
113*4882a593Smuzhiyun if (ath9k_hw_private_ops(ah)->is_aic_enabled)
114*4882a593Smuzhiyun return ath9k_hw_private_ops(ah)->is_aic_enabled(ah);
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun return false;
117*4882a593Smuzhiyun }
118*4882a593Smuzhiyun
119*4882a593Smuzhiyun #endif
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun /* Private hardware call ops */
122*4882a593Smuzhiyun
ath9k_hw_init_hang_checks(struct ath_hw * ah)123*4882a593Smuzhiyun static inline void ath9k_hw_init_hang_checks(struct ath_hw *ah)
124*4882a593Smuzhiyun {
125*4882a593Smuzhiyun ath9k_hw_private_ops(ah)->init_hang_checks(ah);
126*4882a593Smuzhiyun }
127*4882a593Smuzhiyun
ath9k_hw_detect_mac_hang(struct ath_hw * ah)128*4882a593Smuzhiyun static inline bool ath9k_hw_detect_mac_hang(struct ath_hw *ah)
129*4882a593Smuzhiyun {
130*4882a593Smuzhiyun return ath9k_hw_private_ops(ah)->detect_mac_hang(ah);
131*4882a593Smuzhiyun }
132*4882a593Smuzhiyun
ath9k_hw_detect_bb_hang(struct ath_hw * ah)133*4882a593Smuzhiyun static inline bool ath9k_hw_detect_bb_hang(struct ath_hw *ah)
134*4882a593Smuzhiyun {
135*4882a593Smuzhiyun return ath9k_hw_private_ops(ah)->detect_bb_hang(ah);
136*4882a593Smuzhiyun }
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun /* PHY ops */
139*4882a593Smuzhiyun
ath9k_hw_rf_set_freq(struct ath_hw * ah,struct ath9k_channel * chan)140*4882a593Smuzhiyun static inline int ath9k_hw_rf_set_freq(struct ath_hw *ah,
141*4882a593Smuzhiyun struct ath9k_channel *chan)
142*4882a593Smuzhiyun {
143*4882a593Smuzhiyun return ath9k_hw_private_ops(ah)->rf_set_freq(ah, chan);
144*4882a593Smuzhiyun }
145*4882a593Smuzhiyun
ath9k_hw_spur_mitigate_freq(struct ath_hw * ah,struct ath9k_channel * chan)146*4882a593Smuzhiyun static inline void ath9k_hw_spur_mitigate_freq(struct ath_hw *ah,
147*4882a593Smuzhiyun struct ath9k_channel *chan)
148*4882a593Smuzhiyun {
149*4882a593Smuzhiyun ath9k_hw_private_ops(ah)->spur_mitigate_freq(ah, chan);
150*4882a593Smuzhiyun }
151*4882a593Smuzhiyun
ath9k_hw_set_rf_regs(struct ath_hw * ah,struct ath9k_channel * chan,u16 modesIndex)152*4882a593Smuzhiyun static inline bool ath9k_hw_set_rf_regs(struct ath_hw *ah,
153*4882a593Smuzhiyun struct ath9k_channel *chan,
154*4882a593Smuzhiyun u16 modesIndex)
155*4882a593Smuzhiyun {
156*4882a593Smuzhiyun if (!ath9k_hw_private_ops(ah)->set_rf_regs)
157*4882a593Smuzhiyun return true;
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun return ath9k_hw_private_ops(ah)->set_rf_regs(ah, chan, modesIndex);
160*4882a593Smuzhiyun }
161*4882a593Smuzhiyun
ath9k_hw_init_bb(struct ath_hw * ah,struct ath9k_channel * chan)162*4882a593Smuzhiyun static inline void ath9k_hw_init_bb(struct ath_hw *ah,
163*4882a593Smuzhiyun struct ath9k_channel *chan)
164*4882a593Smuzhiyun {
165*4882a593Smuzhiyun return ath9k_hw_private_ops(ah)->init_bb(ah, chan);
166*4882a593Smuzhiyun }
167*4882a593Smuzhiyun
ath9k_hw_set_channel_regs(struct ath_hw * ah,struct ath9k_channel * chan)168*4882a593Smuzhiyun static inline void ath9k_hw_set_channel_regs(struct ath_hw *ah,
169*4882a593Smuzhiyun struct ath9k_channel *chan)
170*4882a593Smuzhiyun {
171*4882a593Smuzhiyun return ath9k_hw_private_ops(ah)->set_channel_regs(ah, chan);
172*4882a593Smuzhiyun }
173*4882a593Smuzhiyun
ath9k_hw_process_ini(struct ath_hw * ah,struct ath9k_channel * chan)174*4882a593Smuzhiyun static inline int ath9k_hw_process_ini(struct ath_hw *ah,
175*4882a593Smuzhiyun struct ath9k_channel *chan)
176*4882a593Smuzhiyun {
177*4882a593Smuzhiyun return ath9k_hw_private_ops(ah)->process_ini(ah, chan);
178*4882a593Smuzhiyun }
179*4882a593Smuzhiyun
ath9k_olc_init(struct ath_hw * ah)180*4882a593Smuzhiyun static inline void ath9k_olc_init(struct ath_hw *ah)
181*4882a593Smuzhiyun {
182*4882a593Smuzhiyun if (!ath9k_hw_private_ops(ah)->olc_init)
183*4882a593Smuzhiyun return;
184*4882a593Smuzhiyun
185*4882a593Smuzhiyun return ath9k_hw_private_ops(ah)->olc_init(ah);
186*4882a593Smuzhiyun }
187*4882a593Smuzhiyun
ath9k_hw_set_rfmode(struct ath_hw * ah,struct ath9k_channel * chan)188*4882a593Smuzhiyun static inline void ath9k_hw_set_rfmode(struct ath_hw *ah,
189*4882a593Smuzhiyun struct ath9k_channel *chan)
190*4882a593Smuzhiyun {
191*4882a593Smuzhiyun return ath9k_hw_private_ops(ah)->set_rfmode(ah, chan);
192*4882a593Smuzhiyun }
193*4882a593Smuzhiyun
ath9k_hw_mark_phy_inactive(struct ath_hw * ah)194*4882a593Smuzhiyun static inline void ath9k_hw_mark_phy_inactive(struct ath_hw *ah)
195*4882a593Smuzhiyun {
196*4882a593Smuzhiyun return ath9k_hw_private_ops(ah)->mark_phy_inactive(ah);
197*4882a593Smuzhiyun }
198*4882a593Smuzhiyun
ath9k_hw_set_delta_slope(struct ath_hw * ah,struct ath9k_channel * chan)199*4882a593Smuzhiyun static inline void ath9k_hw_set_delta_slope(struct ath_hw *ah,
200*4882a593Smuzhiyun struct ath9k_channel *chan)
201*4882a593Smuzhiyun {
202*4882a593Smuzhiyun return ath9k_hw_private_ops(ah)->set_delta_slope(ah, chan);
203*4882a593Smuzhiyun }
204*4882a593Smuzhiyun
ath9k_hw_rfbus_req(struct ath_hw * ah)205*4882a593Smuzhiyun static inline bool ath9k_hw_rfbus_req(struct ath_hw *ah)
206*4882a593Smuzhiyun {
207*4882a593Smuzhiyun return ath9k_hw_private_ops(ah)->rfbus_req(ah);
208*4882a593Smuzhiyun }
209*4882a593Smuzhiyun
ath9k_hw_rfbus_done(struct ath_hw * ah)210*4882a593Smuzhiyun static inline void ath9k_hw_rfbus_done(struct ath_hw *ah)
211*4882a593Smuzhiyun {
212*4882a593Smuzhiyun return ath9k_hw_private_ops(ah)->rfbus_done(ah);
213*4882a593Smuzhiyun }
214*4882a593Smuzhiyun
ath9k_hw_restore_chainmask(struct ath_hw * ah)215*4882a593Smuzhiyun static inline void ath9k_hw_restore_chainmask(struct ath_hw *ah)
216*4882a593Smuzhiyun {
217*4882a593Smuzhiyun if (!ath9k_hw_private_ops(ah)->restore_chainmask)
218*4882a593Smuzhiyun return;
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun return ath9k_hw_private_ops(ah)->restore_chainmask(ah);
221*4882a593Smuzhiyun }
222*4882a593Smuzhiyun
ath9k_hw_ani_control(struct ath_hw * ah,enum ath9k_ani_cmd cmd,int param)223*4882a593Smuzhiyun static inline bool ath9k_hw_ani_control(struct ath_hw *ah,
224*4882a593Smuzhiyun enum ath9k_ani_cmd cmd, int param)
225*4882a593Smuzhiyun {
226*4882a593Smuzhiyun return ath9k_hw_private_ops(ah)->ani_control(ah, cmd, param);
227*4882a593Smuzhiyun }
228*4882a593Smuzhiyun
ath9k_hw_do_getnf(struct ath_hw * ah,int16_t nfarray[NUM_NF_READINGS])229*4882a593Smuzhiyun static inline void ath9k_hw_do_getnf(struct ath_hw *ah,
230*4882a593Smuzhiyun int16_t nfarray[NUM_NF_READINGS])
231*4882a593Smuzhiyun {
232*4882a593Smuzhiyun ath9k_hw_private_ops(ah)->do_getnf(ah, nfarray);
233*4882a593Smuzhiyun }
234*4882a593Smuzhiyun
ath9k_hw_init_cal(struct ath_hw * ah,struct ath9k_channel * chan)235*4882a593Smuzhiyun static inline bool ath9k_hw_init_cal(struct ath_hw *ah,
236*4882a593Smuzhiyun struct ath9k_channel *chan)
237*4882a593Smuzhiyun {
238*4882a593Smuzhiyun return ath9k_hw_private_ops(ah)->init_cal(ah, chan);
239*4882a593Smuzhiyun }
240*4882a593Smuzhiyun
ath9k_hw_setup_calibration(struct ath_hw * ah,struct ath9k_cal_list * currCal)241*4882a593Smuzhiyun static inline void ath9k_hw_setup_calibration(struct ath_hw *ah,
242*4882a593Smuzhiyun struct ath9k_cal_list *currCal)
243*4882a593Smuzhiyun {
244*4882a593Smuzhiyun ath9k_hw_private_ops(ah)->setup_calibration(ah, currCal);
245*4882a593Smuzhiyun }
246*4882a593Smuzhiyun
ath9k_hw_fast_chan_change(struct ath_hw * ah,struct ath9k_channel * chan,u8 * ini_reloaded)247*4882a593Smuzhiyun static inline int ath9k_hw_fast_chan_change(struct ath_hw *ah,
248*4882a593Smuzhiyun struct ath9k_channel *chan,
249*4882a593Smuzhiyun u8 *ini_reloaded)
250*4882a593Smuzhiyun {
251*4882a593Smuzhiyun return ath9k_hw_private_ops(ah)->fast_chan_change(ah, chan,
252*4882a593Smuzhiyun ini_reloaded);
253*4882a593Smuzhiyun }
254*4882a593Smuzhiyun
ath9k_hw_set_radar_params(struct ath_hw * ah)255*4882a593Smuzhiyun static inline void ath9k_hw_set_radar_params(struct ath_hw *ah)
256*4882a593Smuzhiyun {
257*4882a593Smuzhiyun if (!ath9k_hw_private_ops(ah)->set_radar_params)
258*4882a593Smuzhiyun return;
259*4882a593Smuzhiyun
260*4882a593Smuzhiyun ath9k_hw_private_ops(ah)->set_radar_params(ah, &ah->radar_conf);
261*4882a593Smuzhiyun }
262*4882a593Smuzhiyun
ath9k_hw_init_cal_settings(struct ath_hw * ah)263*4882a593Smuzhiyun static inline void ath9k_hw_init_cal_settings(struct ath_hw *ah)
264*4882a593Smuzhiyun {
265*4882a593Smuzhiyun ath9k_hw_private_ops(ah)->init_cal_settings(ah);
266*4882a593Smuzhiyun }
267*4882a593Smuzhiyun
ath9k_hw_compute_pll_control(struct ath_hw * ah,struct ath9k_channel * chan)268*4882a593Smuzhiyun static inline u32 ath9k_hw_compute_pll_control(struct ath_hw *ah,
269*4882a593Smuzhiyun struct ath9k_channel *chan)
270*4882a593Smuzhiyun {
271*4882a593Smuzhiyun return ath9k_hw_private_ops(ah)->compute_pll_control(ah, chan);
272*4882a593Smuzhiyun }
273*4882a593Smuzhiyun
ath9k_hw_init_mode_gain_regs(struct ath_hw * ah)274*4882a593Smuzhiyun static inline void ath9k_hw_init_mode_gain_regs(struct ath_hw *ah)
275*4882a593Smuzhiyun {
276*4882a593Smuzhiyun if (!ath9k_hw_private_ops(ah)->init_mode_gain_regs)
277*4882a593Smuzhiyun return;
278*4882a593Smuzhiyun
279*4882a593Smuzhiyun ath9k_hw_private_ops(ah)->init_mode_gain_regs(ah);
280*4882a593Smuzhiyun }
281*4882a593Smuzhiyun
ath9k_hw_ani_cache_ini_regs(struct ath_hw * ah)282*4882a593Smuzhiyun static inline void ath9k_hw_ani_cache_ini_regs(struct ath_hw *ah)
283*4882a593Smuzhiyun {
284*4882a593Smuzhiyun if (!ath9k_hw_private_ops(ah)->ani_cache_ini_regs)
285*4882a593Smuzhiyun return;
286*4882a593Smuzhiyun
287*4882a593Smuzhiyun ath9k_hw_private_ops(ah)->ani_cache_ini_regs(ah);
288*4882a593Smuzhiyun }
289*4882a593Smuzhiyun
290*4882a593Smuzhiyun #endif /* ATH9K_HW_OPS_H */
291