1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright (c) 2008-2011 Atheros Communications Inc.
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Permission to use, copy, modify, and/or distribute this software for any
5*4882a593Smuzhiyun * purpose with or without fee is hereby granted, provided that the above
6*4882a593Smuzhiyun * copyright notice and this permission notice appear in all copies.
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9*4882a593Smuzhiyun * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10*4882a593Smuzhiyun * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11*4882a593Smuzhiyun * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12*4882a593Smuzhiyun * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13*4882a593Smuzhiyun * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14*4882a593Smuzhiyun * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15*4882a593Smuzhiyun */
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun #include "ath9k.h"
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun /********************************/
20*4882a593Smuzhiyun /* LED functions */
21*4882a593Smuzhiyun /********************************/
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun #ifdef CONFIG_MAC80211_LEDS
24*4882a593Smuzhiyun
ath_fill_led_pin(struct ath_softc * sc)25*4882a593Smuzhiyun static void ath_fill_led_pin(struct ath_softc *sc)
26*4882a593Smuzhiyun {
27*4882a593Smuzhiyun struct ath_hw *ah = sc->sc_ah;
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun /* Set default led pin if invalid */
30*4882a593Smuzhiyun if (ah->led_pin < 0) {
31*4882a593Smuzhiyun if (AR_SREV_9287(ah))
32*4882a593Smuzhiyun ah->led_pin = ATH_LED_PIN_9287;
33*4882a593Smuzhiyun else if (AR_SREV_9485(ah))
34*4882a593Smuzhiyun ah->led_pin = ATH_LED_PIN_9485;
35*4882a593Smuzhiyun else if (AR_SREV_9300(ah))
36*4882a593Smuzhiyun ah->led_pin = ATH_LED_PIN_9300;
37*4882a593Smuzhiyun else if (AR_SREV_9462(ah) || AR_SREV_9565(ah))
38*4882a593Smuzhiyun ah->led_pin = ATH_LED_PIN_9462;
39*4882a593Smuzhiyun else
40*4882a593Smuzhiyun ah->led_pin = ATH_LED_PIN_DEF;
41*4882a593Smuzhiyun }
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun /* Configure gpio for output */
44*4882a593Smuzhiyun ath9k_hw_gpio_request_out(ah, ah->led_pin, "ath9k-led",
45*4882a593Smuzhiyun AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun /* LED off, active low */
48*4882a593Smuzhiyun ath9k_hw_set_gpio(ah, ah->led_pin, ah->config.led_active_high ? 0 : 1);
49*4882a593Smuzhiyun }
50*4882a593Smuzhiyun
ath_led_brightness(struct led_classdev * led_cdev,enum led_brightness brightness)51*4882a593Smuzhiyun static void ath_led_brightness(struct led_classdev *led_cdev,
52*4882a593Smuzhiyun enum led_brightness brightness)
53*4882a593Smuzhiyun {
54*4882a593Smuzhiyun struct ath_softc *sc = container_of(led_cdev, struct ath_softc, led_cdev);
55*4882a593Smuzhiyun u32 val = (brightness == LED_OFF);
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun if (sc->sc_ah->config.led_active_high)
58*4882a593Smuzhiyun val = !val;
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun ath9k_hw_set_gpio(sc->sc_ah, sc->sc_ah->led_pin, val);
61*4882a593Smuzhiyun }
62*4882a593Smuzhiyun
ath_deinit_leds(struct ath_softc * sc)63*4882a593Smuzhiyun void ath_deinit_leds(struct ath_softc *sc)
64*4882a593Smuzhiyun {
65*4882a593Smuzhiyun if (!sc->led_registered)
66*4882a593Smuzhiyun return;
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun ath_led_brightness(&sc->led_cdev, LED_OFF);
69*4882a593Smuzhiyun led_classdev_unregister(&sc->led_cdev);
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun ath9k_hw_gpio_free(sc->sc_ah, sc->sc_ah->led_pin);
72*4882a593Smuzhiyun }
73*4882a593Smuzhiyun
ath_init_leds(struct ath_softc * sc)74*4882a593Smuzhiyun void ath_init_leds(struct ath_softc *sc)
75*4882a593Smuzhiyun {
76*4882a593Smuzhiyun int ret;
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun if (AR_SREV_9100(sc->sc_ah))
79*4882a593Smuzhiyun return;
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun ath_fill_led_pin(sc);
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun if (!ath9k_led_blink)
84*4882a593Smuzhiyun sc->led_cdev.default_trigger =
85*4882a593Smuzhiyun ieee80211_get_radio_led_name(sc->hw);
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun snprintf(sc->led_name, sizeof(sc->led_name),
88*4882a593Smuzhiyun "ath9k-%s", wiphy_name(sc->hw->wiphy));
89*4882a593Smuzhiyun sc->led_cdev.name = sc->led_name;
90*4882a593Smuzhiyun sc->led_cdev.brightness_set = ath_led_brightness;
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun ret = led_classdev_register(wiphy_dev(sc->hw->wiphy), &sc->led_cdev);
93*4882a593Smuzhiyun if (ret < 0)
94*4882a593Smuzhiyun return;
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun sc->led_registered = true;
97*4882a593Smuzhiyun }
98*4882a593Smuzhiyun #endif
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun /*******************/
101*4882a593Smuzhiyun /* Rfkill */
102*4882a593Smuzhiyun /*******************/
103*4882a593Smuzhiyun
ath_is_rfkill_set(struct ath_softc * sc)104*4882a593Smuzhiyun static bool ath_is_rfkill_set(struct ath_softc *sc)
105*4882a593Smuzhiyun {
106*4882a593Smuzhiyun struct ath_hw *ah = sc->sc_ah;
107*4882a593Smuzhiyun bool is_blocked;
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun ath9k_ps_wakeup(sc);
110*4882a593Smuzhiyun is_blocked = ath9k_hw_gpio_get(ah, ah->rfkill_gpio) ==
111*4882a593Smuzhiyun ah->rfkill_polarity;
112*4882a593Smuzhiyun ath9k_ps_restore(sc);
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun return is_blocked;
115*4882a593Smuzhiyun }
116*4882a593Smuzhiyun
ath9k_rfkill_poll_state(struct ieee80211_hw * hw)117*4882a593Smuzhiyun void ath9k_rfkill_poll_state(struct ieee80211_hw *hw)
118*4882a593Smuzhiyun {
119*4882a593Smuzhiyun struct ath_softc *sc = hw->priv;
120*4882a593Smuzhiyun bool blocked = !!ath_is_rfkill_set(sc);
121*4882a593Smuzhiyun
122*4882a593Smuzhiyun wiphy_rfkill_set_hw_state(hw->wiphy, blocked);
123*4882a593Smuzhiyun }
124*4882a593Smuzhiyun
ath_start_rfkill_poll(struct ath_softc * sc)125*4882a593Smuzhiyun void ath_start_rfkill_poll(struct ath_softc *sc)
126*4882a593Smuzhiyun {
127*4882a593Smuzhiyun struct ath_hw *ah = sc->sc_ah;
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun if (ah->caps.hw_caps & ATH9K_HW_CAP_RFSILENT)
130*4882a593Smuzhiyun wiphy_rfkill_start_polling(sc->hw->wiphy);
131*4882a593Smuzhiyun }
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun #ifdef CONFIG_ATH9K_BTCOEX_SUPPORT
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun /******************/
136*4882a593Smuzhiyun /* BTCOEX */
137*4882a593Smuzhiyun /******************/
138*4882a593Smuzhiyun
139*4882a593Smuzhiyun /*
140*4882a593Smuzhiyun * Detects if there is any priority bt traffic
141*4882a593Smuzhiyun */
ath_detect_bt_priority(struct ath_softc * sc)142*4882a593Smuzhiyun static void ath_detect_bt_priority(struct ath_softc *sc)
143*4882a593Smuzhiyun {
144*4882a593Smuzhiyun struct ath_btcoex *btcoex = &sc->btcoex;
145*4882a593Smuzhiyun struct ath_hw *ah = sc->sc_ah;
146*4882a593Smuzhiyun
147*4882a593Smuzhiyun if (ath9k_hw_gpio_get(sc->sc_ah, ah->btcoex_hw.btpriority_gpio))
148*4882a593Smuzhiyun btcoex->bt_priority_cnt++;
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun if (time_after(jiffies, btcoex->bt_priority_time +
151*4882a593Smuzhiyun msecs_to_jiffies(ATH_BT_PRIORITY_TIME_THRESHOLD))) {
152*4882a593Smuzhiyun clear_bit(BT_OP_PRIORITY_DETECTED, &btcoex->op_flags);
153*4882a593Smuzhiyun clear_bit(BT_OP_SCAN, &btcoex->op_flags);
154*4882a593Smuzhiyun /* Detect if colocated bt started scanning */
155*4882a593Smuzhiyun if (btcoex->bt_priority_cnt >= ATH_BT_CNT_SCAN_THRESHOLD) {
156*4882a593Smuzhiyun ath_dbg(ath9k_hw_common(sc->sc_ah), BTCOEX,
157*4882a593Smuzhiyun "BT scan detected\n");
158*4882a593Smuzhiyun set_bit(BT_OP_PRIORITY_DETECTED, &btcoex->op_flags);
159*4882a593Smuzhiyun set_bit(BT_OP_SCAN, &btcoex->op_flags);
160*4882a593Smuzhiyun } else if (btcoex->bt_priority_cnt >= ATH_BT_CNT_THRESHOLD) {
161*4882a593Smuzhiyun ath_dbg(ath9k_hw_common(sc->sc_ah), BTCOEX,
162*4882a593Smuzhiyun "BT priority traffic detected\n");
163*4882a593Smuzhiyun set_bit(BT_OP_PRIORITY_DETECTED, &btcoex->op_flags);
164*4882a593Smuzhiyun }
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun btcoex->bt_priority_cnt = 0;
167*4882a593Smuzhiyun btcoex->bt_priority_time = jiffies;
168*4882a593Smuzhiyun }
169*4882a593Smuzhiyun }
170*4882a593Smuzhiyun
ath_mci_ftp_adjust(struct ath_softc * sc)171*4882a593Smuzhiyun static void ath_mci_ftp_adjust(struct ath_softc *sc)
172*4882a593Smuzhiyun {
173*4882a593Smuzhiyun struct ath_btcoex *btcoex = &sc->btcoex;
174*4882a593Smuzhiyun struct ath_mci_profile *mci = &btcoex->mci;
175*4882a593Smuzhiyun struct ath_hw *ah = sc->sc_ah;
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun if (btcoex->bt_wait_time > ATH_BTCOEX_RX_WAIT_TIME) {
178*4882a593Smuzhiyun if (ar9003_mci_state(ah, MCI_STATE_NEED_FTP_STOMP) &&
179*4882a593Smuzhiyun (mci->num_pan || mci->num_other_acl))
180*4882a593Smuzhiyun ah->btcoex_hw.mci.stomp_ftp =
181*4882a593Smuzhiyun (sc->rx.num_pkts < ATH_BTCOEX_STOMP_FTP_THRESH);
182*4882a593Smuzhiyun else
183*4882a593Smuzhiyun ah->btcoex_hw.mci.stomp_ftp = false;
184*4882a593Smuzhiyun btcoex->bt_wait_time = 0;
185*4882a593Smuzhiyun sc->rx.num_pkts = 0;
186*4882a593Smuzhiyun }
187*4882a593Smuzhiyun }
188*4882a593Smuzhiyun
189*4882a593Smuzhiyun /*
190*4882a593Smuzhiyun * This is the master bt coex timer which runs for every
191*4882a593Smuzhiyun * 45ms, bt traffic will be given priority during 55% of this
192*4882a593Smuzhiyun * period while wlan gets remaining 45%
193*4882a593Smuzhiyun */
ath_btcoex_period_timer(struct timer_list * t)194*4882a593Smuzhiyun static void ath_btcoex_period_timer(struct timer_list *t)
195*4882a593Smuzhiyun {
196*4882a593Smuzhiyun struct ath_softc *sc = from_timer(sc, t, btcoex.period_timer);
197*4882a593Smuzhiyun struct ath_hw *ah = sc->sc_ah;
198*4882a593Smuzhiyun struct ath_btcoex *btcoex = &sc->btcoex;
199*4882a593Smuzhiyun enum ath_stomp_type stomp_type;
200*4882a593Smuzhiyun u32 timer_period;
201*4882a593Smuzhiyun unsigned long flags;
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun spin_lock_irqsave(&sc->sc_pm_lock, flags);
204*4882a593Smuzhiyun if (sc->sc_ah->power_mode == ATH9K_PM_NETWORK_SLEEP) {
205*4882a593Smuzhiyun btcoex->bt_wait_time += btcoex->btcoex_period;
206*4882a593Smuzhiyun spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
207*4882a593Smuzhiyun goto skip_hw_wakeup;
208*4882a593Smuzhiyun }
209*4882a593Smuzhiyun spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
210*4882a593Smuzhiyun
211*4882a593Smuzhiyun ath9k_ps_wakeup(sc);
212*4882a593Smuzhiyun spin_lock_bh(&btcoex->btcoex_lock);
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun if (ah->caps.hw_caps & ATH9K_HW_CAP_MCI) {
215*4882a593Smuzhiyun ath9k_mci_update_rssi(sc);
216*4882a593Smuzhiyun ath_mci_ftp_adjust(sc);
217*4882a593Smuzhiyun }
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun if (!(ah->caps.hw_caps & ATH9K_HW_CAP_MCI))
220*4882a593Smuzhiyun ath_detect_bt_priority(sc);
221*4882a593Smuzhiyun
222*4882a593Smuzhiyun stomp_type = btcoex->bt_stomp_type;
223*4882a593Smuzhiyun timer_period = btcoex->btcoex_no_stomp;
224*4882a593Smuzhiyun
225*4882a593Smuzhiyun if (!(ah->caps.hw_caps & ATH9K_HW_CAP_MCI)) {
226*4882a593Smuzhiyun if (test_bit(BT_OP_SCAN, &btcoex->op_flags)) {
227*4882a593Smuzhiyun stomp_type = ATH_BTCOEX_STOMP_ALL;
228*4882a593Smuzhiyun timer_period = btcoex->btscan_no_stomp;
229*4882a593Smuzhiyun }
230*4882a593Smuzhiyun } else if (btcoex->stomp_audio >= 5) {
231*4882a593Smuzhiyun stomp_type = ATH_BTCOEX_STOMP_AUDIO;
232*4882a593Smuzhiyun btcoex->stomp_audio = 0;
233*4882a593Smuzhiyun }
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun ath9k_hw_btcoex_bt_stomp(ah, stomp_type);
236*4882a593Smuzhiyun ath9k_hw_btcoex_enable(ah);
237*4882a593Smuzhiyun
238*4882a593Smuzhiyun spin_unlock_bh(&btcoex->btcoex_lock);
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun if (btcoex->btcoex_period != btcoex->btcoex_no_stomp)
241*4882a593Smuzhiyun mod_timer(&btcoex->no_stomp_timer,
242*4882a593Smuzhiyun jiffies + msecs_to_jiffies(timer_period));
243*4882a593Smuzhiyun
244*4882a593Smuzhiyun ath9k_ps_restore(sc);
245*4882a593Smuzhiyun
246*4882a593Smuzhiyun skip_hw_wakeup:
247*4882a593Smuzhiyun mod_timer(&btcoex->period_timer,
248*4882a593Smuzhiyun jiffies + msecs_to_jiffies(btcoex->btcoex_period));
249*4882a593Smuzhiyun }
250*4882a593Smuzhiyun
251*4882a593Smuzhiyun /*
252*4882a593Smuzhiyun * Generic tsf based hw timer which configures weight
253*4882a593Smuzhiyun * registers to time slice between wlan and bt traffic
254*4882a593Smuzhiyun */
ath_btcoex_no_stomp_timer(struct timer_list * t)255*4882a593Smuzhiyun static void ath_btcoex_no_stomp_timer(struct timer_list *t)
256*4882a593Smuzhiyun {
257*4882a593Smuzhiyun struct ath_softc *sc = from_timer(sc, t, btcoex.no_stomp_timer);
258*4882a593Smuzhiyun struct ath_hw *ah = sc->sc_ah;
259*4882a593Smuzhiyun struct ath_btcoex *btcoex = &sc->btcoex;
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun ath9k_ps_wakeup(sc);
262*4882a593Smuzhiyun spin_lock_bh(&btcoex->btcoex_lock);
263*4882a593Smuzhiyun
264*4882a593Smuzhiyun if (btcoex->bt_stomp_type == ATH_BTCOEX_STOMP_LOW ||
265*4882a593Smuzhiyun (!(ah->caps.hw_caps & ATH9K_HW_CAP_MCI) &&
266*4882a593Smuzhiyun test_bit(BT_OP_SCAN, &btcoex->op_flags)))
267*4882a593Smuzhiyun ath9k_hw_btcoex_bt_stomp(ah, ATH_BTCOEX_STOMP_NONE);
268*4882a593Smuzhiyun else if (btcoex->bt_stomp_type == ATH_BTCOEX_STOMP_ALL)
269*4882a593Smuzhiyun ath9k_hw_btcoex_bt_stomp(ah, ATH_BTCOEX_STOMP_LOW);
270*4882a593Smuzhiyun
271*4882a593Smuzhiyun ath9k_hw_btcoex_enable(ah);
272*4882a593Smuzhiyun spin_unlock_bh(&btcoex->btcoex_lock);
273*4882a593Smuzhiyun ath9k_ps_restore(sc);
274*4882a593Smuzhiyun }
275*4882a593Smuzhiyun
ath_init_btcoex_timer(struct ath_softc * sc)276*4882a593Smuzhiyun static void ath_init_btcoex_timer(struct ath_softc *sc)
277*4882a593Smuzhiyun {
278*4882a593Smuzhiyun struct ath_btcoex *btcoex = &sc->btcoex;
279*4882a593Smuzhiyun
280*4882a593Smuzhiyun btcoex->btcoex_period = ATH_BTCOEX_DEF_BT_PERIOD;
281*4882a593Smuzhiyun btcoex->btcoex_no_stomp = (100 - ATH_BTCOEX_DEF_DUTY_CYCLE) *
282*4882a593Smuzhiyun btcoex->btcoex_period / 100;
283*4882a593Smuzhiyun btcoex->btscan_no_stomp = (100 - ATH_BTCOEX_BTSCAN_DUTY_CYCLE) *
284*4882a593Smuzhiyun btcoex->btcoex_period / 100;
285*4882a593Smuzhiyun btcoex->bt_stomp_type = ATH_BTCOEX_STOMP_LOW;
286*4882a593Smuzhiyun
287*4882a593Smuzhiyun timer_setup(&btcoex->period_timer, ath_btcoex_period_timer, 0);
288*4882a593Smuzhiyun timer_setup(&btcoex->no_stomp_timer, ath_btcoex_no_stomp_timer, 0);
289*4882a593Smuzhiyun
290*4882a593Smuzhiyun spin_lock_init(&btcoex->btcoex_lock);
291*4882a593Smuzhiyun }
292*4882a593Smuzhiyun
293*4882a593Smuzhiyun /*
294*4882a593Smuzhiyun * (Re)start btcoex timers
295*4882a593Smuzhiyun */
ath9k_btcoex_timer_resume(struct ath_softc * sc)296*4882a593Smuzhiyun void ath9k_btcoex_timer_resume(struct ath_softc *sc)
297*4882a593Smuzhiyun {
298*4882a593Smuzhiyun struct ath_btcoex *btcoex = &sc->btcoex;
299*4882a593Smuzhiyun struct ath_hw *ah = sc->sc_ah;
300*4882a593Smuzhiyun
301*4882a593Smuzhiyun if (ath9k_hw_get_btcoex_scheme(ah) != ATH_BTCOEX_CFG_3WIRE &&
302*4882a593Smuzhiyun ath9k_hw_get_btcoex_scheme(ah) != ATH_BTCOEX_CFG_MCI)
303*4882a593Smuzhiyun return;
304*4882a593Smuzhiyun
305*4882a593Smuzhiyun ath_dbg(ath9k_hw_common(ah), BTCOEX, "Starting btcoex timers\n");
306*4882a593Smuzhiyun
307*4882a593Smuzhiyun /* make sure duty cycle timer is also stopped when resuming */
308*4882a593Smuzhiyun del_timer_sync(&btcoex->no_stomp_timer);
309*4882a593Smuzhiyun
310*4882a593Smuzhiyun btcoex->bt_priority_cnt = 0;
311*4882a593Smuzhiyun btcoex->bt_priority_time = jiffies;
312*4882a593Smuzhiyun clear_bit(BT_OP_PRIORITY_DETECTED, &btcoex->op_flags);
313*4882a593Smuzhiyun clear_bit(BT_OP_SCAN, &btcoex->op_flags);
314*4882a593Smuzhiyun
315*4882a593Smuzhiyun mod_timer(&btcoex->period_timer, jiffies);
316*4882a593Smuzhiyun }
317*4882a593Smuzhiyun
318*4882a593Smuzhiyun /*
319*4882a593Smuzhiyun * Pause btcoex timer and bt duty cycle timer
320*4882a593Smuzhiyun */
ath9k_btcoex_timer_pause(struct ath_softc * sc)321*4882a593Smuzhiyun void ath9k_btcoex_timer_pause(struct ath_softc *sc)
322*4882a593Smuzhiyun {
323*4882a593Smuzhiyun struct ath_btcoex *btcoex = &sc->btcoex;
324*4882a593Smuzhiyun struct ath_hw *ah = sc->sc_ah;
325*4882a593Smuzhiyun
326*4882a593Smuzhiyun if (ath9k_hw_get_btcoex_scheme(ah) != ATH_BTCOEX_CFG_3WIRE &&
327*4882a593Smuzhiyun ath9k_hw_get_btcoex_scheme(ah) != ATH_BTCOEX_CFG_MCI)
328*4882a593Smuzhiyun return;
329*4882a593Smuzhiyun
330*4882a593Smuzhiyun ath_dbg(ath9k_hw_common(ah), BTCOEX, "Stopping btcoex timers\n");
331*4882a593Smuzhiyun
332*4882a593Smuzhiyun del_timer_sync(&btcoex->period_timer);
333*4882a593Smuzhiyun del_timer_sync(&btcoex->no_stomp_timer);
334*4882a593Smuzhiyun }
335*4882a593Smuzhiyun
ath9k_btcoex_stop_gen_timer(struct ath_softc * sc)336*4882a593Smuzhiyun void ath9k_btcoex_stop_gen_timer(struct ath_softc *sc)
337*4882a593Smuzhiyun {
338*4882a593Smuzhiyun struct ath_btcoex *btcoex = &sc->btcoex;
339*4882a593Smuzhiyun
340*4882a593Smuzhiyun del_timer_sync(&btcoex->no_stomp_timer);
341*4882a593Smuzhiyun }
342*4882a593Smuzhiyun
ath9k_btcoex_aggr_limit(struct ath_softc * sc,u32 max_4ms_framelen)343*4882a593Smuzhiyun u16 ath9k_btcoex_aggr_limit(struct ath_softc *sc, u32 max_4ms_framelen)
344*4882a593Smuzhiyun {
345*4882a593Smuzhiyun struct ath_btcoex *btcoex = &sc->btcoex;
346*4882a593Smuzhiyun struct ath_mci_profile *mci = &sc->btcoex.mci;
347*4882a593Smuzhiyun u16 aggr_limit = 0;
348*4882a593Smuzhiyun
349*4882a593Smuzhiyun if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_MCI) && mci->aggr_limit)
350*4882a593Smuzhiyun aggr_limit = (max_4ms_framelen * mci->aggr_limit) >> 4;
351*4882a593Smuzhiyun else if (test_bit(BT_OP_PRIORITY_DETECTED, &btcoex->op_flags))
352*4882a593Smuzhiyun aggr_limit = min((max_4ms_framelen * 3) / 8,
353*4882a593Smuzhiyun (u32)ATH_AMPDU_LIMIT_MAX);
354*4882a593Smuzhiyun
355*4882a593Smuzhiyun return aggr_limit;
356*4882a593Smuzhiyun }
357*4882a593Smuzhiyun
ath9k_btcoex_handle_interrupt(struct ath_softc * sc,u32 status)358*4882a593Smuzhiyun void ath9k_btcoex_handle_interrupt(struct ath_softc *sc, u32 status)
359*4882a593Smuzhiyun {
360*4882a593Smuzhiyun if (status & ATH9K_INT_MCI)
361*4882a593Smuzhiyun ath_mci_intr(sc);
362*4882a593Smuzhiyun }
363*4882a593Smuzhiyun
ath9k_start_btcoex(struct ath_softc * sc)364*4882a593Smuzhiyun void ath9k_start_btcoex(struct ath_softc *sc)
365*4882a593Smuzhiyun {
366*4882a593Smuzhiyun struct ath_hw *ah = sc->sc_ah;
367*4882a593Smuzhiyun
368*4882a593Smuzhiyun if (ah->btcoex_hw.enabled ||
369*4882a593Smuzhiyun ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_NONE)
370*4882a593Smuzhiyun return;
371*4882a593Smuzhiyun
372*4882a593Smuzhiyun if (!(ah->caps.hw_caps & ATH9K_HW_CAP_MCI))
373*4882a593Smuzhiyun ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
374*4882a593Smuzhiyun AR_STOMP_LOW_WLAN_WGHT, 0);
375*4882a593Smuzhiyun else
376*4882a593Smuzhiyun ath9k_hw_btcoex_set_weight(ah, 0, 0,
377*4882a593Smuzhiyun ATH_BTCOEX_STOMP_NONE);
378*4882a593Smuzhiyun ath9k_hw_btcoex_enable(ah);
379*4882a593Smuzhiyun ath9k_btcoex_timer_resume(sc);
380*4882a593Smuzhiyun }
381*4882a593Smuzhiyun
ath9k_stop_btcoex(struct ath_softc * sc)382*4882a593Smuzhiyun void ath9k_stop_btcoex(struct ath_softc *sc)
383*4882a593Smuzhiyun {
384*4882a593Smuzhiyun struct ath_hw *ah = sc->sc_ah;
385*4882a593Smuzhiyun
386*4882a593Smuzhiyun if (!ah->btcoex_hw.enabled ||
387*4882a593Smuzhiyun ath9k_hw_get_btcoex_scheme(ah) == ATH_BTCOEX_CFG_NONE)
388*4882a593Smuzhiyun return;
389*4882a593Smuzhiyun
390*4882a593Smuzhiyun ath9k_btcoex_timer_pause(sc);
391*4882a593Smuzhiyun ath9k_hw_btcoex_disable(ah);
392*4882a593Smuzhiyun
393*4882a593Smuzhiyun if (ah->caps.hw_caps & ATH9K_HW_CAP_MCI)
394*4882a593Smuzhiyun ath_mci_flush_profile(&sc->btcoex.mci);
395*4882a593Smuzhiyun }
396*4882a593Smuzhiyun
ath9k_deinit_btcoex(struct ath_softc * sc)397*4882a593Smuzhiyun void ath9k_deinit_btcoex(struct ath_softc *sc)
398*4882a593Smuzhiyun {
399*4882a593Smuzhiyun struct ath_hw *ah = sc->sc_ah;
400*4882a593Smuzhiyun
401*4882a593Smuzhiyun if (ath9k_hw_mci_is_enabled(ah))
402*4882a593Smuzhiyun ath_mci_cleanup(sc);
403*4882a593Smuzhiyun else {
404*4882a593Smuzhiyun enum ath_btcoex_scheme scheme = ath9k_hw_get_btcoex_scheme(ah);
405*4882a593Smuzhiyun
406*4882a593Smuzhiyun if (scheme == ATH_BTCOEX_CFG_2WIRE ||
407*4882a593Smuzhiyun scheme == ATH_BTCOEX_CFG_3WIRE)
408*4882a593Smuzhiyun ath9k_hw_btcoex_deinit(sc->sc_ah);
409*4882a593Smuzhiyun }
410*4882a593Smuzhiyun }
411*4882a593Smuzhiyun
ath9k_init_btcoex(struct ath_softc * sc)412*4882a593Smuzhiyun int ath9k_init_btcoex(struct ath_softc *sc)
413*4882a593Smuzhiyun {
414*4882a593Smuzhiyun struct ath_txq *txq;
415*4882a593Smuzhiyun struct ath_hw *ah = sc->sc_ah;
416*4882a593Smuzhiyun int r;
417*4882a593Smuzhiyun
418*4882a593Smuzhiyun ath9k_hw_btcoex_init_scheme(ah);
419*4882a593Smuzhiyun
420*4882a593Smuzhiyun switch (ath9k_hw_get_btcoex_scheme(sc->sc_ah)) {
421*4882a593Smuzhiyun case ATH_BTCOEX_CFG_NONE:
422*4882a593Smuzhiyun break;
423*4882a593Smuzhiyun case ATH_BTCOEX_CFG_2WIRE:
424*4882a593Smuzhiyun ath9k_hw_btcoex_init_2wire(sc->sc_ah);
425*4882a593Smuzhiyun break;
426*4882a593Smuzhiyun case ATH_BTCOEX_CFG_3WIRE:
427*4882a593Smuzhiyun ath9k_hw_btcoex_init_3wire(sc->sc_ah);
428*4882a593Smuzhiyun ath_init_btcoex_timer(sc);
429*4882a593Smuzhiyun txq = sc->tx.txq_map[IEEE80211_AC_BE];
430*4882a593Smuzhiyun ath9k_hw_init_btcoex_hw(sc->sc_ah, txq->axq_qnum);
431*4882a593Smuzhiyun break;
432*4882a593Smuzhiyun case ATH_BTCOEX_CFG_MCI:
433*4882a593Smuzhiyun ath_init_btcoex_timer(sc);
434*4882a593Smuzhiyun
435*4882a593Smuzhiyun sc->btcoex.duty_cycle = ATH_BTCOEX_DEF_DUTY_CYCLE;
436*4882a593Smuzhiyun INIT_LIST_HEAD(&sc->btcoex.mci.info);
437*4882a593Smuzhiyun ath9k_hw_btcoex_init_mci(ah);
438*4882a593Smuzhiyun
439*4882a593Smuzhiyun r = ath_mci_setup(sc);
440*4882a593Smuzhiyun if (r)
441*4882a593Smuzhiyun return r;
442*4882a593Smuzhiyun
443*4882a593Smuzhiyun break;
444*4882a593Smuzhiyun default:
445*4882a593Smuzhiyun WARN_ON(1);
446*4882a593Smuzhiyun break;
447*4882a593Smuzhiyun }
448*4882a593Smuzhiyun
449*4882a593Smuzhiyun return 0;
450*4882a593Smuzhiyun }
451*4882a593Smuzhiyun
ath9k_dump_mci_btcoex(struct ath_softc * sc,u8 * buf,u32 size)452*4882a593Smuzhiyun static int ath9k_dump_mci_btcoex(struct ath_softc *sc, u8 *buf, u32 size)
453*4882a593Smuzhiyun {
454*4882a593Smuzhiyun struct ath_btcoex *btcoex = &sc->btcoex;
455*4882a593Smuzhiyun struct ath_mci_profile *mci = &btcoex->mci;
456*4882a593Smuzhiyun struct ath_hw *ah = sc->sc_ah;
457*4882a593Smuzhiyun struct ath_btcoex_hw *btcoex_hw = &ah->btcoex_hw;
458*4882a593Smuzhiyun u32 len = 0;
459*4882a593Smuzhiyun int i;
460*4882a593Smuzhiyun
461*4882a593Smuzhiyun ATH_DUMP_BTCOEX("Total BT profiles", NUM_PROF(mci));
462*4882a593Smuzhiyun ATH_DUMP_BTCOEX("MGMT", mci->num_mgmt);
463*4882a593Smuzhiyun ATH_DUMP_BTCOEX("SCO", mci->num_sco);
464*4882a593Smuzhiyun ATH_DUMP_BTCOEX("A2DP", mci->num_a2dp);
465*4882a593Smuzhiyun ATH_DUMP_BTCOEX("HID", mci->num_hid);
466*4882a593Smuzhiyun ATH_DUMP_BTCOEX("PAN", mci->num_pan);
467*4882a593Smuzhiyun ATH_DUMP_BTCOEX("ACL", mci->num_other_acl);
468*4882a593Smuzhiyun ATH_DUMP_BTCOEX("BDR", mci->num_bdr);
469*4882a593Smuzhiyun ATH_DUMP_BTCOEX("Aggr. Limit", mci->aggr_limit);
470*4882a593Smuzhiyun ATH_DUMP_BTCOEX("Stomp Type", btcoex->bt_stomp_type);
471*4882a593Smuzhiyun ATH_DUMP_BTCOEX("BTCoex Period (msec)", btcoex->btcoex_period);
472*4882a593Smuzhiyun ATH_DUMP_BTCOEX("Duty Cycle", btcoex->duty_cycle);
473*4882a593Smuzhiyun ATH_DUMP_BTCOEX("BT Wait time", btcoex->bt_wait_time);
474*4882a593Smuzhiyun ATH_DUMP_BTCOEX("Concurrent Tx", btcoex_hw->mci.concur_tx);
475*4882a593Smuzhiyun ATH_DUMP_BTCOEX("Concurrent RSSI cnt", btcoex->rssi_count);
476*4882a593Smuzhiyun
477*4882a593Smuzhiyun len += scnprintf(buf + len, size - len, "BT Weights: ");
478*4882a593Smuzhiyun for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
479*4882a593Smuzhiyun len += scnprintf(buf + len, size - len, "%08x ",
480*4882a593Smuzhiyun btcoex_hw->bt_weight[i]);
481*4882a593Smuzhiyun len += scnprintf(buf + len, size - len, "\n");
482*4882a593Smuzhiyun len += scnprintf(buf + len, size - len, "WLAN Weights: ");
483*4882a593Smuzhiyun for (i = 0; i < AR9300_NUM_BT_WEIGHTS; i++)
484*4882a593Smuzhiyun len += scnprintf(buf + len, size - len, "%08x ",
485*4882a593Smuzhiyun btcoex_hw->wlan_weight[i]);
486*4882a593Smuzhiyun len += scnprintf(buf + len, size - len, "\n");
487*4882a593Smuzhiyun len += scnprintf(buf + len, size - len, "Tx Priorities: ");
488*4882a593Smuzhiyun for (i = 0; i < ATH_BTCOEX_STOMP_MAX; i++)
489*4882a593Smuzhiyun len += scnprintf(buf + len, size - len, "%08x ",
490*4882a593Smuzhiyun btcoex_hw->tx_prio[i]);
491*4882a593Smuzhiyun
492*4882a593Smuzhiyun len += scnprintf(buf + len, size - len, "\n");
493*4882a593Smuzhiyun
494*4882a593Smuzhiyun return len;
495*4882a593Smuzhiyun }
496*4882a593Smuzhiyun
ath9k_dump_legacy_btcoex(struct ath_softc * sc,u8 * buf,u32 size)497*4882a593Smuzhiyun static int ath9k_dump_legacy_btcoex(struct ath_softc *sc, u8 *buf, u32 size)
498*4882a593Smuzhiyun {
499*4882a593Smuzhiyun
500*4882a593Smuzhiyun struct ath_btcoex *btcoex = &sc->btcoex;
501*4882a593Smuzhiyun u32 len = 0;
502*4882a593Smuzhiyun
503*4882a593Smuzhiyun ATH_DUMP_BTCOEX("Stomp Type", btcoex->bt_stomp_type);
504*4882a593Smuzhiyun ATH_DUMP_BTCOEX("BTCoex Period (msec)", btcoex->btcoex_period);
505*4882a593Smuzhiyun ATH_DUMP_BTCOEX("Duty Cycle", btcoex->duty_cycle);
506*4882a593Smuzhiyun ATH_DUMP_BTCOEX("BT Wait time", btcoex->bt_wait_time);
507*4882a593Smuzhiyun
508*4882a593Smuzhiyun return len;
509*4882a593Smuzhiyun }
510*4882a593Smuzhiyun
ath9k_dump_btcoex(struct ath_softc * sc,u8 * buf,u32 size)511*4882a593Smuzhiyun int ath9k_dump_btcoex(struct ath_softc *sc, u8 *buf, u32 size)
512*4882a593Smuzhiyun {
513*4882a593Smuzhiyun if (ath9k_hw_mci_is_enabled(sc->sc_ah))
514*4882a593Smuzhiyun return ath9k_dump_mci_btcoex(sc, buf, size);
515*4882a593Smuzhiyun else
516*4882a593Smuzhiyun return ath9k_dump_legacy_btcoex(sc, buf, size);
517*4882a593Smuzhiyun }
518*4882a593Smuzhiyun
519*4882a593Smuzhiyun #endif /* CONFIG_ATH9K_BTCOEX_SUPPORT */
520