1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright (c) 2009-2011 Atheros Communications Inc.
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Permission to use, copy, modify, and/or distribute this software for any
5*4882a593Smuzhiyun * purpose with or without fee is hereby granted, provided that the above
6*4882a593Smuzhiyun * copyright notice and this permission notice appear in all copies.
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9*4882a593Smuzhiyun * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10*4882a593Smuzhiyun * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11*4882a593Smuzhiyun * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12*4882a593Smuzhiyun * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13*4882a593Smuzhiyun * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14*4882a593Smuzhiyun * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15*4882a593Smuzhiyun */
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun /*
18*4882a593Smuzhiyun * Module for common driver code between ath9k and ath9k_htc
19*4882a593Smuzhiyun */
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun #include <linux/kernel.h>
22*4882a593Smuzhiyun #include <linux/module.h>
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun #include "common.h"
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun MODULE_AUTHOR("Atheros Communications");
27*4882a593Smuzhiyun MODULE_DESCRIPTION("Shared library for Atheros wireless 802.11n LAN cards.");
28*4882a593Smuzhiyun MODULE_LICENSE("Dual BSD/GPL");
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun /* Assumes you've already done the endian to CPU conversion */
ath9k_cmn_rx_accept(struct ath_common * common,struct ieee80211_hdr * hdr,struct ieee80211_rx_status * rxs,struct ath_rx_status * rx_stats,bool * decrypt_error,unsigned int rxfilter)31*4882a593Smuzhiyun bool ath9k_cmn_rx_accept(struct ath_common *common,
32*4882a593Smuzhiyun struct ieee80211_hdr *hdr,
33*4882a593Smuzhiyun struct ieee80211_rx_status *rxs,
34*4882a593Smuzhiyun struct ath_rx_status *rx_stats,
35*4882a593Smuzhiyun bool *decrypt_error,
36*4882a593Smuzhiyun unsigned int rxfilter)
37*4882a593Smuzhiyun {
38*4882a593Smuzhiyun struct ath_hw *ah = common->ah;
39*4882a593Smuzhiyun bool is_mc, is_valid_tkip, strip_mic, mic_error;
40*4882a593Smuzhiyun __le16 fc;
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun fc = hdr->frame_control;
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun is_mc = !!is_multicast_ether_addr(hdr->addr1);
45*4882a593Smuzhiyun is_valid_tkip = rx_stats->rs_keyix != ATH9K_RXKEYIX_INVALID &&
46*4882a593Smuzhiyun test_bit(rx_stats->rs_keyix, common->tkip_keymap);
47*4882a593Smuzhiyun strip_mic = is_valid_tkip && ieee80211_is_data(fc) &&
48*4882a593Smuzhiyun ieee80211_has_protected(fc) &&
49*4882a593Smuzhiyun !(rx_stats->rs_status &
50*4882a593Smuzhiyun (ATH9K_RXERR_DECRYPT | ATH9K_RXERR_CRC | ATH9K_RXERR_MIC |
51*4882a593Smuzhiyun ATH9K_RXERR_KEYMISS));
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun /*
54*4882a593Smuzhiyun * Key miss events are only relevant for pairwise keys where the
55*4882a593Smuzhiyun * descriptor does contain a valid key index. This has been observed
56*4882a593Smuzhiyun * mostly with CCMP encryption.
57*4882a593Smuzhiyun */
58*4882a593Smuzhiyun if (rx_stats->rs_keyix == ATH9K_RXKEYIX_INVALID ||
59*4882a593Smuzhiyun !test_bit(rx_stats->rs_keyix, common->ccmp_keymap))
60*4882a593Smuzhiyun rx_stats->rs_status &= ~ATH9K_RXERR_KEYMISS;
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun mic_error = is_valid_tkip && !ieee80211_is_ctl(fc) &&
63*4882a593Smuzhiyun !ieee80211_has_morefrags(fc) &&
64*4882a593Smuzhiyun !(le16_to_cpu(hdr->seq_ctrl) & IEEE80211_SCTL_FRAG) &&
65*4882a593Smuzhiyun (rx_stats->rs_status & ATH9K_RXERR_MIC);
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun /*
68*4882a593Smuzhiyun * The rx_stats->rs_status will not be set until the end of the
69*4882a593Smuzhiyun * chained descriptors so it can be ignored if rs_more is set. The
70*4882a593Smuzhiyun * rs_more will be false at the last element of the chained
71*4882a593Smuzhiyun * descriptors.
72*4882a593Smuzhiyun */
73*4882a593Smuzhiyun if (rx_stats->rs_status != 0) {
74*4882a593Smuzhiyun u8 status_mask;
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun if (rx_stats->rs_status & ATH9K_RXERR_CRC) {
77*4882a593Smuzhiyun rxs->flag |= RX_FLAG_FAILED_FCS_CRC;
78*4882a593Smuzhiyun mic_error = false;
79*4882a593Smuzhiyun }
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun if ((rx_stats->rs_status & ATH9K_RXERR_DECRYPT) ||
82*4882a593Smuzhiyun (!is_mc && (rx_stats->rs_status & ATH9K_RXERR_KEYMISS))) {
83*4882a593Smuzhiyun *decrypt_error = true;
84*4882a593Smuzhiyun mic_error = false;
85*4882a593Smuzhiyun }
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun /*
89*4882a593Smuzhiyun * Reject error frames with the exception of
90*4882a593Smuzhiyun * decryption and MIC failures. For monitor mode,
91*4882a593Smuzhiyun * we also ignore the CRC error.
92*4882a593Smuzhiyun */
93*4882a593Smuzhiyun status_mask = ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC |
94*4882a593Smuzhiyun ATH9K_RXERR_KEYMISS;
95*4882a593Smuzhiyun
96*4882a593Smuzhiyun if (ah->is_monitoring && (rxfilter & FIF_FCSFAIL))
97*4882a593Smuzhiyun status_mask |= ATH9K_RXERR_CRC;
98*4882a593Smuzhiyun
99*4882a593Smuzhiyun if (rx_stats->rs_status & ~status_mask)
100*4882a593Smuzhiyun return false;
101*4882a593Smuzhiyun }
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun /*
104*4882a593Smuzhiyun * For unicast frames the MIC error bit can have false positives,
105*4882a593Smuzhiyun * so all MIC error reports need to be validated in software.
106*4882a593Smuzhiyun * False negatives are not common, so skip software verification
107*4882a593Smuzhiyun * if the hardware considers the MIC valid.
108*4882a593Smuzhiyun */
109*4882a593Smuzhiyun if (strip_mic)
110*4882a593Smuzhiyun rxs->flag |= RX_FLAG_MMIC_STRIPPED;
111*4882a593Smuzhiyun else if (is_mc && mic_error)
112*4882a593Smuzhiyun rxs->flag |= RX_FLAG_MMIC_ERROR;
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun return true;
115*4882a593Smuzhiyun }
116*4882a593Smuzhiyun EXPORT_SYMBOL(ath9k_cmn_rx_accept);
117*4882a593Smuzhiyun
ath9k_cmn_rx_skb_postprocess(struct ath_common * common,struct sk_buff * skb,struct ath_rx_status * rx_stats,struct ieee80211_rx_status * rxs,bool decrypt_error)118*4882a593Smuzhiyun void ath9k_cmn_rx_skb_postprocess(struct ath_common *common,
119*4882a593Smuzhiyun struct sk_buff *skb,
120*4882a593Smuzhiyun struct ath_rx_status *rx_stats,
121*4882a593Smuzhiyun struct ieee80211_rx_status *rxs,
122*4882a593Smuzhiyun bool decrypt_error)
123*4882a593Smuzhiyun {
124*4882a593Smuzhiyun struct ath_hw *ah = common->ah;
125*4882a593Smuzhiyun struct ieee80211_hdr *hdr;
126*4882a593Smuzhiyun int hdrlen, padpos, padsize;
127*4882a593Smuzhiyun u8 keyix;
128*4882a593Smuzhiyun __le16 fc;
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun /* see if any padding is done by the hw and remove it */
131*4882a593Smuzhiyun hdr = (struct ieee80211_hdr *) skb->data;
132*4882a593Smuzhiyun hdrlen = ieee80211_get_hdrlen_from_skb(skb);
133*4882a593Smuzhiyun fc = hdr->frame_control;
134*4882a593Smuzhiyun padpos = ieee80211_hdrlen(fc);
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun /* The MAC header is padded to have 32-bit boundary if the
137*4882a593Smuzhiyun * packet payload is non-zero. The general calculation for
138*4882a593Smuzhiyun * padsize would take into account odd header lengths:
139*4882a593Smuzhiyun * padsize = (4 - padpos % 4) % 4; However, since only
140*4882a593Smuzhiyun * even-length headers are used, padding can only be 0 or 2
141*4882a593Smuzhiyun * bytes and we can optimize this a bit. In addition, we must
142*4882a593Smuzhiyun * not try to remove padding from short control frames that do
143*4882a593Smuzhiyun * not have payload. */
144*4882a593Smuzhiyun padsize = padpos & 3;
145*4882a593Smuzhiyun if (padsize && skb->len>=padpos+padsize+FCS_LEN) {
146*4882a593Smuzhiyun memmove(skb->data + padsize, skb->data, padpos);
147*4882a593Smuzhiyun skb_pull(skb, padsize);
148*4882a593Smuzhiyun }
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun keyix = rx_stats->rs_keyix;
151*4882a593Smuzhiyun
152*4882a593Smuzhiyun if (!(keyix == ATH9K_RXKEYIX_INVALID) && !decrypt_error &&
153*4882a593Smuzhiyun ieee80211_has_protected(fc)) {
154*4882a593Smuzhiyun rxs->flag |= RX_FLAG_DECRYPTED;
155*4882a593Smuzhiyun } else if (ieee80211_has_protected(fc)
156*4882a593Smuzhiyun && !decrypt_error && skb->len >= hdrlen + 4) {
157*4882a593Smuzhiyun keyix = skb->data[hdrlen + 3] >> 6;
158*4882a593Smuzhiyun
159*4882a593Smuzhiyun if (test_bit(keyix, common->keymap))
160*4882a593Smuzhiyun rxs->flag |= RX_FLAG_DECRYPTED;
161*4882a593Smuzhiyun }
162*4882a593Smuzhiyun if (ah->sw_mgmt_crypto_rx &&
163*4882a593Smuzhiyun (rxs->flag & RX_FLAG_DECRYPTED) &&
164*4882a593Smuzhiyun ieee80211_is_mgmt(fc))
165*4882a593Smuzhiyun /* Use software decrypt for management frames. */
166*4882a593Smuzhiyun rxs->flag &= ~RX_FLAG_DECRYPTED;
167*4882a593Smuzhiyun }
168*4882a593Smuzhiyun EXPORT_SYMBOL(ath9k_cmn_rx_skb_postprocess);
169*4882a593Smuzhiyun
ath9k_cmn_process_rate(struct ath_common * common,struct ieee80211_hw * hw,struct ath_rx_status * rx_stats,struct ieee80211_rx_status * rxs)170*4882a593Smuzhiyun int ath9k_cmn_process_rate(struct ath_common *common,
171*4882a593Smuzhiyun struct ieee80211_hw *hw,
172*4882a593Smuzhiyun struct ath_rx_status *rx_stats,
173*4882a593Smuzhiyun struct ieee80211_rx_status *rxs)
174*4882a593Smuzhiyun {
175*4882a593Smuzhiyun struct ieee80211_supported_band *sband;
176*4882a593Smuzhiyun enum nl80211_band band;
177*4882a593Smuzhiyun unsigned int i = 0;
178*4882a593Smuzhiyun struct ath_hw *ah = common->ah;
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun band = ah->curchan->chan->band;
181*4882a593Smuzhiyun sband = hw->wiphy->bands[band];
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun if (IS_CHAN_QUARTER_RATE(ah->curchan))
184*4882a593Smuzhiyun rxs->bw = RATE_INFO_BW_5;
185*4882a593Smuzhiyun else if (IS_CHAN_HALF_RATE(ah->curchan))
186*4882a593Smuzhiyun rxs->bw = RATE_INFO_BW_10;
187*4882a593Smuzhiyun
188*4882a593Smuzhiyun if (rx_stats->rs_rate & 0x80) {
189*4882a593Smuzhiyun /* HT rate */
190*4882a593Smuzhiyun rxs->encoding = RX_ENC_HT;
191*4882a593Smuzhiyun rxs->enc_flags |= rx_stats->enc_flags;
192*4882a593Smuzhiyun rxs->bw = rx_stats->bw;
193*4882a593Smuzhiyun rxs->rate_idx = rx_stats->rs_rate & 0x7f;
194*4882a593Smuzhiyun return 0;
195*4882a593Smuzhiyun }
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun for (i = 0; i < sband->n_bitrates; i++) {
198*4882a593Smuzhiyun if (sband->bitrates[i].hw_value == rx_stats->rs_rate) {
199*4882a593Smuzhiyun rxs->rate_idx = i;
200*4882a593Smuzhiyun return 0;
201*4882a593Smuzhiyun }
202*4882a593Smuzhiyun if (sband->bitrates[i].hw_value_short == rx_stats->rs_rate) {
203*4882a593Smuzhiyun rxs->enc_flags |= RX_ENC_FLAG_SHORTPRE;
204*4882a593Smuzhiyun rxs->rate_idx = i;
205*4882a593Smuzhiyun return 0;
206*4882a593Smuzhiyun }
207*4882a593Smuzhiyun }
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun return -EINVAL;
210*4882a593Smuzhiyun }
211*4882a593Smuzhiyun EXPORT_SYMBOL(ath9k_cmn_process_rate);
212*4882a593Smuzhiyun
ath9k_cmn_process_rssi(struct ath_common * common,struct ieee80211_hw * hw,struct ath_rx_status * rx_stats,struct ieee80211_rx_status * rxs)213*4882a593Smuzhiyun void ath9k_cmn_process_rssi(struct ath_common *common,
214*4882a593Smuzhiyun struct ieee80211_hw *hw,
215*4882a593Smuzhiyun struct ath_rx_status *rx_stats,
216*4882a593Smuzhiyun struct ieee80211_rx_status *rxs)
217*4882a593Smuzhiyun {
218*4882a593Smuzhiyun struct ath_hw *ah = common->ah;
219*4882a593Smuzhiyun int last_rssi;
220*4882a593Smuzhiyun int rssi = rx_stats->rs_rssi;
221*4882a593Smuzhiyun int i, j;
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun /*
224*4882a593Smuzhiyun * RSSI is not available for subframes in an A-MPDU.
225*4882a593Smuzhiyun */
226*4882a593Smuzhiyun if (rx_stats->rs_moreaggr) {
227*4882a593Smuzhiyun rxs->flag |= RX_FLAG_NO_SIGNAL_VAL;
228*4882a593Smuzhiyun return;
229*4882a593Smuzhiyun }
230*4882a593Smuzhiyun
231*4882a593Smuzhiyun /*
232*4882a593Smuzhiyun * Check if the RSSI for the last subframe in an A-MPDU
233*4882a593Smuzhiyun * or an unaggregated frame is valid.
234*4882a593Smuzhiyun */
235*4882a593Smuzhiyun if (rx_stats->rs_rssi == ATH9K_RSSI_BAD) {
236*4882a593Smuzhiyun rxs->flag |= RX_FLAG_NO_SIGNAL_VAL;
237*4882a593Smuzhiyun return;
238*4882a593Smuzhiyun }
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun for (i = 0, j = 0; i < ARRAY_SIZE(rx_stats->rs_rssi_ctl); i++) {
241*4882a593Smuzhiyun s8 rssi;
242*4882a593Smuzhiyun
243*4882a593Smuzhiyun if (!(ah->rxchainmask & BIT(i)))
244*4882a593Smuzhiyun continue;
245*4882a593Smuzhiyun
246*4882a593Smuzhiyun rssi = rx_stats->rs_rssi_ctl[i];
247*4882a593Smuzhiyun if (rssi != ATH9K_RSSI_BAD) {
248*4882a593Smuzhiyun rxs->chains |= BIT(j);
249*4882a593Smuzhiyun rxs->chain_signal[j] = ah->noise + rssi;
250*4882a593Smuzhiyun }
251*4882a593Smuzhiyun j++;
252*4882a593Smuzhiyun }
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun /*
255*4882a593Smuzhiyun * Update Beacon RSSI, this is used by ANI.
256*4882a593Smuzhiyun */
257*4882a593Smuzhiyun if (rx_stats->is_mybeacon &&
258*4882a593Smuzhiyun ((ah->opmode == NL80211_IFTYPE_STATION) ||
259*4882a593Smuzhiyun (ah->opmode == NL80211_IFTYPE_ADHOC))) {
260*4882a593Smuzhiyun ATH_RSSI_LPF(common->last_rssi, rx_stats->rs_rssi);
261*4882a593Smuzhiyun last_rssi = common->last_rssi;
262*4882a593Smuzhiyun
263*4882a593Smuzhiyun if (likely(last_rssi != ATH_RSSI_DUMMY_MARKER))
264*4882a593Smuzhiyun rssi = ATH_EP_RND(last_rssi, ATH_RSSI_EP_MULTIPLIER);
265*4882a593Smuzhiyun if (rssi < 0)
266*4882a593Smuzhiyun rssi = 0;
267*4882a593Smuzhiyun
268*4882a593Smuzhiyun ah->stats.avgbrssi = rssi;
269*4882a593Smuzhiyun }
270*4882a593Smuzhiyun
271*4882a593Smuzhiyun rxs->signal = ah->noise + rx_stats->rs_rssi;
272*4882a593Smuzhiyun }
273*4882a593Smuzhiyun EXPORT_SYMBOL(ath9k_cmn_process_rssi);
274*4882a593Smuzhiyun
ath9k_cmn_get_hw_crypto_keytype(struct sk_buff * skb)275*4882a593Smuzhiyun int ath9k_cmn_get_hw_crypto_keytype(struct sk_buff *skb)
276*4882a593Smuzhiyun {
277*4882a593Smuzhiyun struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
278*4882a593Smuzhiyun
279*4882a593Smuzhiyun if (tx_info->control.hw_key) {
280*4882a593Smuzhiyun switch (tx_info->control.hw_key->cipher) {
281*4882a593Smuzhiyun case WLAN_CIPHER_SUITE_WEP40:
282*4882a593Smuzhiyun case WLAN_CIPHER_SUITE_WEP104:
283*4882a593Smuzhiyun return ATH9K_KEY_TYPE_WEP;
284*4882a593Smuzhiyun case WLAN_CIPHER_SUITE_TKIP:
285*4882a593Smuzhiyun return ATH9K_KEY_TYPE_TKIP;
286*4882a593Smuzhiyun case WLAN_CIPHER_SUITE_CCMP:
287*4882a593Smuzhiyun return ATH9K_KEY_TYPE_AES;
288*4882a593Smuzhiyun default:
289*4882a593Smuzhiyun break;
290*4882a593Smuzhiyun }
291*4882a593Smuzhiyun }
292*4882a593Smuzhiyun
293*4882a593Smuzhiyun return ATH9K_KEY_TYPE_CLEAR;
294*4882a593Smuzhiyun }
295*4882a593Smuzhiyun EXPORT_SYMBOL(ath9k_cmn_get_hw_crypto_keytype);
296*4882a593Smuzhiyun
297*4882a593Smuzhiyun /*
298*4882a593Smuzhiyun * Update internal channel flags.
299*4882a593Smuzhiyun */
ath9k_cmn_update_ichannel(struct ath9k_channel * ichan,struct cfg80211_chan_def * chandef)300*4882a593Smuzhiyun static void ath9k_cmn_update_ichannel(struct ath9k_channel *ichan,
301*4882a593Smuzhiyun struct cfg80211_chan_def *chandef)
302*4882a593Smuzhiyun {
303*4882a593Smuzhiyun struct ieee80211_channel *chan = chandef->chan;
304*4882a593Smuzhiyun u16 flags = 0;
305*4882a593Smuzhiyun
306*4882a593Smuzhiyun ichan->channel = chan->center_freq;
307*4882a593Smuzhiyun ichan->chan = chan;
308*4882a593Smuzhiyun
309*4882a593Smuzhiyun if (chan->band == NL80211_BAND_5GHZ)
310*4882a593Smuzhiyun flags |= CHANNEL_5GHZ;
311*4882a593Smuzhiyun
312*4882a593Smuzhiyun switch (chandef->width) {
313*4882a593Smuzhiyun case NL80211_CHAN_WIDTH_5:
314*4882a593Smuzhiyun flags |= CHANNEL_QUARTER;
315*4882a593Smuzhiyun break;
316*4882a593Smuzhiyun case NL80211_CHAN_WIDTH_10:
317*4882a593Smuzhiyun flags |= CHANNEL_HALF;
318*4882a593Smuzhiyun break;
319*4882a593Smuzhiyun case NL80211_CHAN_WIDTH_20_NOHT:
320*4882a593Smuzhiyun break;
321*4882a593Smuzhiyun case NL80211_CHAN_WIDTH_20:
322*4882a593Smuzhiyun flags |= CHANNEL_HT;
323*4882a593Smuzhiyun break;
324*4882a593Smuzhiyun case NL80211_CHAN_WIDTH_40:
325*4882a593Smuzhiyun if (chandef->center_freq1 > chandef->chan->center_freq)
326*4882a593Smuzhiyun flags |= CHANNEL_HT40PLUS | CHANNEL_HT;
327*4882a593Smuzhiyun else
328*4882a593Smuzhiyun flags |= CHANNEL_HT40MINUS | CHANNEL_HT;
329*4882a593Smuzhiyun break;
330*4882a593Smuzhiyun default:
331*4882a593Smuzhiyun WARN_ON(1);
332*4882a593Smuzhiyun }
333*4882a593Smuzhiyun
334*4882a593Smuzhiyun ichan->channelFlags = flags;
335*4882a593Smuzhiyun }
336*4882a593Smuzhiyun
337*4882a593Smuzhiyun /*
338*4882a593Smuzhiyun * Get the internal channel reference.
339*4882a593Smuzhiyun */
ath9k_cmn_get_channel(struct ieee80211_hw * hw,struct ath_hw * ah,struct cfg80211_chan_def * chandef)340*4882a593Smuzhiyun struct ath9k_channel *ath9k_cmn_get_channel(struct ieee80211_hw *hw,
341*4882a593Smuzhiyun struct ath_hw *ah,
342*4882a593Smuzhiyun struct cfg80211_chan_def *chandef)
343*4882a593Smuzhiyun {
344*4882a593Smuzhiyun struct ieee80211_channel *curchan = chandef->chan;
345*4882a593Smuzhiyun struct ath9k_channel *channel;
346*4882a593Smuzhiyun
347*4882a593Smuzhiyun channel = &ah->channels[curchan->hw_value];
348*4882a593Smuzhiyun ath9k_cmn_update_ichannel(channel, chandef);
349*4882a593Smuzhiyun
350*4882a593Smuzhiyun return channel;
351*4882a593Smuzhiyun }
352*4882a593Smuzhiyun EXPORT_SYMBOL(ath9k_cmn_get_channel);
353*4882a593Smuzhiyun
ath9k_cmn_count_streams(unsigned int chainmask,int max)354*4882a593Smuzhiyun int ath9k_cmn_count_streams(unsigned int chainmask, int max)
355*4882a593Smuzhiyun {
356*4882a593Smuzhiyun int streams = 0;
357*4882a593Smuzhiyun
358*4882a593Smuzhiyun do {
359*4882a593Smuzhiyun if (++streams == max)
360*4882a593Smuzhiyun break;
361*4882a593Smuzhiyun } while ((chainmask = chainmask & (chainmask - 1)));
362*4882a593Smuzhiyun
363*4882a593Smuzhiyun return streams;
364*4882a593Smuzhiyun }
365*4882a593Smuzhiyun EXPORT_SYMBOL(ath9k_cmn_count_streams);
366*4882a593Smuzhiyun
ath9k_cmn_update_txpow(struct ath_hw * ah,u16 cur_txpow,u16 new_txpow,u16 * txpower)367*4882a593Smuzhiyun void ath9k_cmn_update_txpow(struct ath_hw *ah, u16 cur_txpow,
368*4882a593Smuzhiyun u16 new_txpow, u16 *txpower)
369*4882a593Smuzhiyun {
370*4882a593Smuzhiyun struct ath_regulatory *reg = ath9k_hw_regulatory(ah);
371*4882a593Smuzhiyun
372*4882a593Smuzhiyun if (ah->curchan && reg->power_limit != new_txpow)
373*4882a593Smuzhiyun ath9k_hw_set_txpowerlimit(ah, new_txpow, false);
374*4882a593Smuzhiyun
375*4882a593Smuzhiyun /* read back in case value is clamped */
376*4882a593Smuzhiyun *txpower = reg->max_power_level;
377*4882a593Smuzhiyun }
378*4882a593Smuzhiyun EXPORT_SYMBOL(ath9k_cmn_update_txpow);
379*4882a593Smuzhiyun
ath9k_cmn_init_crypto(struct ath_hw * ah)380*4882a593Smuzhiyun void ath9k_cmn_init_crypto(struct ath_hw *ah)
381*4882a593Smuzhiyun {
382*4882a593Smuzhiyun struct ath_common *common = ath9k_hw_common(ah);
383*4882a593Smuzhiyun int i = 0;
384*4882a593Smuzhiyun
385*4882a593Smuzhiyun /* Get the hardware key cache size. */
386*4882a593Smuzhiyun common->keymax = AR_KEYTABLE_SIZE;
387*4882a593Smuzhiyun
388*4882a593Smuzhiyun /*
389*4882a593Smuzhiyun * Check whether the separate key cache entries
390*4882a593Smuzhiyun * are required to handle both tx+rx MIC keys.
391*4882a593Smuzhiyun * With split mic keys the number of stations is limited
392*4882a593Smuzhiyun * to 27 otherwise 59.
393*4882a593Smuzhiyun */
394*4882a593Smuzhiyun if (ah->misc_mode & AR_PCU_MIC_NEW_LOC_ENA)
395*4882a593Smuzhiyun common->crypt_caps |= ATH_CRYPT_CAP_MIC_COMBINED;
396*4882a593Smuzhiyun
397*4882a593Smuzhiyun /*
398*4882a593Smuzhiyun * Reset the key cache since some parts do not
399*4882a593Smuzhiyun * reset the contents on initial power up.
400*4882a593Smuzhiyun */
401*4882a593Smuzhiyun for (i = 0; i < common->keymax; i++)
402*4882a593Smuzhiyun ath_hw_keyreset(common, (u16) i);
403*4882a593Smuzhiyun }
404*4882a593Smuzhiyun EXPORT_SYMBOL(ath9k_cmn_init_crypto);
405*4882a593Smuzhiyun
ath9k_cmn_init(void)406*4882a593Smuzhiyun static int __init ath9k_cmn_init(void)
407*4882a593Smuzhiyun {
408*4882a593Smuzhiyun return 0;
409*4882a593Smuzhiyun }
410*4882a593Smuzhiyun module_init(ath9k_cmn_init);
411*4882a593Smuzhiyun
ath9k_cmn_exit(void)412*4882a593Smuzhiyun static void __exit ath9k_cmn_exit(void)
413*4882a593Smuzhiyun {
414*4882a593Smuzhiyun return;
415*4882a593Smuzhiyun }
416*4882a593Smuzhiyun module_exit(ath9k_cmn_exit);
417