1*4882a593Smuzhiyun /* SPDX-License-Identifier: BSD-3-Clause-Clear */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun #ifndef ATH11K_HAL_TX_H 7*4882a593Smuzhiyun #define ATH11K_HAL_TX_H 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun #include "hal_desc.h" 10*4882a593Smuzhiyun #include "core.h" 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun #define HAL_TX_ADDRX_EN 1 13*4882a593Smuzhiyun #define HAL_TX_ADDRY_EN 2 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun #define HAL_TX_ADDR_SEARCH_DEFAULT 0 16*4882a593Smuzhiyun #define HAL_TX_ADDR_SEARCH_INDEX 1 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun struct hal_tx_info { 19*4882a593Smuzhiyun u16 meta_data_flags; /* %HAL_TCL_DATA_CMD_INFO0_META_ */ 20*4882a593Smuzhiyun u8 ring_id; 21*4882a593Smuzhiyun u32 desc_id; 22*4882a593Smuzhiyun enum hal_tcl_desc_type type; 23*4882a593Smuzhiyun enum hal_tcl_encap_type encap_type; 24*4882a593Smuzhiyun dma_addr_t paddr; 25*4882a593Smuzhiyun u32 data_len; 26*4882a593Smuzhiyun u32 pkt_offset; 27*4882a593Smuzhiyun enum hal_encrypt_type encrypt_type; 28*4882a593Smuzhiyun u32 flags0; /* %HAL_TCL_DATA_CMD_INFO1_ */ 29*4882a593Smuzhiyun u32 flags1; /* %HAL_TCL_DATA_CMD_INFO2_ */ 30*4882a593Smuzhiyun u16 addr_search_flags; /* %HAL_TCL_DATA_CMD_INFO0_ADDR(X/Y)_ */ 31*4882a593Smuzhiyun u16 bss_ast_hash; 32*4882a593Smuzhiyun u8 tid; 33*4882a593Smuzhiyun u8 search_type; /* %HAL_TX_ADDR_SEARCH_ */ 34*4882a593Smuzhiyun u8 lmac_id; 35*4882a593Smuzhiyun u8 dscp_tid_tbl_idx; 36*4882a593Smuzhiyun }; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun /* TODO: Check if the actual desc macros can be used instead */ 39*4882a593Smuzhiyun #define HAL_TX_STATUS_FLAGS_FIRST_MSDU BIT(0) 40*4882a593Smuzhiyun #define HAL_TX_STATUS_FLAGS_LAST_MSDU BIT(1) 41*4882a593Smuzhiyun #define HAL_TX_STATUS_FLAGS_MSDU_IN_AMSDU BIT(2) 42*4882a593Smuzhiyun #define HAL_TX_STATUS_FLAGS_RATE_STATS_VALID BIT(3) 43*4882a593Smuzhiyun #define HAL_TX_STATUS_FLAGS_RATE_LDPC BIT(4) 44*4882a593Smuzhiyun #define HAL_TX_STATUS_FLAGS_RATE_STBC BIT(5) 45*4882a593Smuzhiyun #define HAL_TX_STATUS_FLAGS_OFDMA BIT(6) 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun #define HAL_TX_STATUS_DESC_LEN sizeof(struct hal_wbm_release_ring) 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun /* Tx status parsed from srng desc */ 50*4882a593Smuzhiyun struct hal_tx_status { 51*4882a593Smuzhiyun enum hal_wbm_rel_src_module buf_rel_source; 52*4882a593Smuzhiyun enum hal_wbm_tqm_rel_reason status; 53*4882a593Smuzhiyun u8 ack_rssi; 54*4882a593Smuzhiyun u32 flags; /* %HAL_TX_STATUS_FLAGS_ */ 55*4882a593Smuzhiyun u32 ppdu_id; 56*4882a593Smuzhiyun u8 try_cnt; 57*4882a593Smuzhiyun u8 tid; 58*4882a593Smuzhiyun u16 peer_id; 59*4882a593Smuzhiyun u32 rate_stats; 60*4882a593Smuzhiyun }; 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun void ath11k_hal_tx_cmd_desc_setup(struct ath11k_base *ab, void *cmd, 63*4882a593Smuzhiyun struct hal_tx_info *ti); 64*4882a593Smuzhiyun void ath11k_hal_tx_set_dscp_tid_map(struct ath11k_base *ab, int id); 65*4882a593Smuzhiyun int ath11k_hal_reo_cmd_send(struct ath11k_base *ab, struct hal_srng *srng, 66*4882a593Smuzhiyun enum hal_reo_cmd_type type, 67*4882a593Smuzhiyun struct ath11k_hal_reo_cmd *cmd); 68*4882a593Smuzhiyun void ath11k_hal_tx_init_data_ring(struct ath11k_base *ab, 69*4882a593Smuzhiyun struct hal_srng *srng); 70*4882a593Smuzhiyun #endif 71