1*4882a593Smuzhiyun // SPDX-License-Identifier: ISC
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (c) 2005-2011 Atheros Communications Inc.
4*4882a593Smuzhiyun * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
5*4882a593Smuzhiyun * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun #include <linux/skbuff.h>
9*4882a593Smuzhiyun #include <linux/ctype.h>
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun #include "core.h"
12*4882a593Smuzhiyun #include "htc.h"
13*4882a593Smuzhiyun #include "debug.h"
14*4882a593Smuzhiyun #include "wmi.h"
15*4882a593Smuzhiyun #include "wmi-tlv.h"
16*4882a593Smuzhiyun #include "mac.h"
17*4882a593Smuzhiyun #include "testmode.h"
18*4882a593Smuzhiyun #include "wmi-ops.h"
19*4882a593Smuzhiyun #include "p2p.h"
20*4882a593Smuzhiyun #include "hw.h"
21*4882a593Smuzhiyun #include "hif.h"
22*4882a593Smuzhiyun #include "txrx.h"
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun #define ATH10K_WMI_BARRIER_ECHO_ID 0xBA991E9
25*4882a593Smuzhiyun #define ATH10K_WMI_BARRIER_TIMEOUT_HZ (3 * HZ)
26*4882a593Smuzhiyun #define ATH10K_WMI_DFS_CONF_TIMEOUT_HZ (HZ / 6)
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun /* MAIN WMI cmd track */
29*4882a593Smuzhiyun static struct wmi_cmd_map wmi_cmd_map = {
30*4882a593Smuzhiyun .init_cmdid = WMI_INIT_CMDID,
31*4882a593Smuzhiyun .start_scan_cmdid = WMI_START_SCAN_CMDID,
32*4882a593Smuzhiyun .stop_scan_cmdid = WMI_STOP_SCAN_CMDID,
33*4882a593Smuzhiyun .scan_chan_list_cmdid = WMI_SCAN_CHAN_LIST_CMDID,
34*4882a593Smuzhiyun .scan_sch_prio_tbl_cmdid = WMI_SCAN_SCH_PRIO_TBL_CMDID,
35*4882a593Smuzhiyun .scan_prob_req_oui_cmdid = WMI_CMD_UNSUPPORTED,
36*4882a593Smuzhiyun .pdev_set_regdomain_cmdid = WMI_PDEV_SET_REGDOMAIN_CMDID,
37*4882a593Smuzhiyun .pdev_set_channel_cmdid = WMI_PDEV_SET_CHANNEL_CMDID,
38*4882a593Smuzhiyun .pdev_set_param_cmdid = WMI_PDEV_SET_PARAM_CMDID,
39*4882a593Smuzhiyun .pdev_pktlog_enable_cmdid = WMI_PDEV_PKTLOG_ENABLE_CMDID,
40*4882a593Smuzhiyun .pdev_pktlog_disable_cmdid = WMI_PDEV_PKTLOG_DISABLE_CMDID,
41*4882a593Smuzhiyun .pdev_set_wmm_params_cmdid = WMI_PDEV_SET_WMM_PARAMS_CMDID,
42*4882a593Smuzhiyun .pdev_set_ht_cap_ie_cmdid = WMI_PDEV_SET_HT_CAP_IE_CMDID,
43*4882a593Smuzhiyun .pdev_set_vht_cap_ie_cmdid = WMI_PDEV_SET_VHT_CAP_IE_CMDID,
44*4882a593Smuzhiyun .pdev_set_dscp_tid_map_cmdid = WMI_PDEV_SET_DSCP_TID_MAP_CMDID,
45*4882a593Smuzhiyun .pdev_set_quiet_mode_cmdid = WMI_PDEV_SET_QUIET_MODE_CMDID,
46*4882a593Smuzhiyun .pdev_green_ap_ps_enable_cmdid = WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID,
47*4882a593Smuzhiyun .pdev_get_tpc_config_cmdid = WMI_PDEV_GET_TPC_CONFIG_CMDID,
48*4882a593Smuzhiyun .pdev_set_base_macaddr_cmdid = WMI_PDEV_SET_BASE_MACADDR_CMDID,
49*4882a593Smuzhiyun .vdev_create_cmdid = WMI_VDEV_CREATE_CMDID,
50*4882a593Smuzhiyun .vdev_delete_cmdid = WMI_VDEV_DELETE_CMDID,
51*4882a593Smuzhiyun .vdev_start_request_cmdid = WMI_VDEV_START_REQUEST_CMDID,
52*4882a593Smuzhiyun .vdev_restart_request_cmdid = WMI_VDEV_RESTART_REQUEST_CMDID,
53*4882a593Smuzhiyun .vdev_up_cmdid = WMI_VDEV_UP_CMDID,
54*4882a593Smuzhiyun .vdev_stop_cmdid = WMI_VDEV_STOP_CMDID,
55*4882a593Smuzhiyun .vdev_down_cmdid = WMI_VDEV_DOWN_CMDID,
56*4882a593Smuzhiyun .vdev_set_param_cmdid = WMI_VDEV_SET_PARAM_CMDID,
57*4882a593Smuzhiyun .vdev_install_key_cmdid = WMI_VDEV_INSTALL_KEY_CMDID,
58*4882a593Smuzhiyun .peer_create_cmdid = WMI_PEER_CREATE_CMDID,
59*4882a593Smuzhiyun .peer_delete_cmdid = WMI_PEER_DELETE_CMDID,
60*4882a593Smuzhiyun .peer_flush_tids_cmdid = WMI_PEER_FLUSH_TIDS_CMDID,
61*4882a593Smuzhiyun .peer_set_param_cmdid = WMI_PEER_SET_PARAM_CMDID,
62*4882a593Smuzhiyun .peer_assoc_cmdid = WMI_PEER_ASSOC_CMDID,
63*4882a593Smuzhiyun .peer_add_wds_entry_cmdid = WMI_PEER_ADD_WDS_ENTRY_CMDID,
64*4882a593Smuzhiyun .peer_remove_wds_entry_cmdid = WMI_PEER_REMOVE_WDS_ENTRY_CMDID,
65*4882a593Smuzhiyun .peer_mcast_group_cmdid = WMI_PEER_MCAST_GROUP_CMDID,
66*4882a593Smuzhiyun .bcn_tx_cmdid = WMI_BCN_TX_CMDID,
67*4882a593Smuzhiyun .pdev_send_bcn_cmdid = WMI_PDEV_SEND_BCN_CMDID,
68*4882a593Smuzhiyun .bcn_tmpl_cmdid = WMI_BCN_TMPL_CMDID,
69*4882a593Smuzhiyun .bcn_filter_rx_cmdid = WMI_BCN_FILTER_RX_CMDID,
70*4882a593Smuzhiyun .prb_req_filter_rx_cmdid = WMI_PRB_REQ_FILTER_RX_CMDID,
71*4882a593Smuzhiyun .mgmt_tx_cmdid = WMI_MGMT_TX_CMDID,
72*4882a593Smuzhiyun .prb_tmpl_cmdid = WMI_PRB_TMPL_CMDID,
73*4882a593Smuzhiyun .addba_clear_resp_cmdid = WMI_ADDBA_CLEAR_RESP_CMDID,
74*4882a593Smuzhiyun .addba_send_cmdid = WMI_ADDBA_SEND_CMDID,
75*4882a593Smuzhiyun .addba_status_cmdid = WMI_ADDBA_STATUS_CMDID,
76*4882a593Smuzhiyun .delba_send_cmdid = WMI_DELBA_SEND_CMDID,
77*4882a593Smuzhiyun .addba_set_resp_cmdid = WMI_ADDBA_SET_RESP_CMDID,
78*4882a593Smuzhiyun .send_singleamsdu_cmdid = WMI_SEND_SINGLEAMSDU_CMDID,
79*4882a593Smuzhiyun .sta_powersave_mode_cmdid = WMI_STA_POWERSAVE_MODE_CMDID,
80*4882a593Smuzhiyun .sta_powersave_param_cmdid = WMI_STA_POWERSAVE_PARAM_CMDID,
81*4882a593Smuzhiyun .sta_mimo_ps_mode_cmdid = WMI_STA_MIMO_PS_MODE_CMDID,
82*4882a593Smuzhiyun .pdev_dfs_enable_cmdid = WMI_PDEV_DFS_ENABLE_CMDID,
83*4882a593Smuzhiyun .pdev_dfs_disable_cmdid = WMI_PDEV_DFS_DISABLE_CMDID,
84*4882a593Smuzhiyun .roam_scan_mode = WMI_ROAM_SCAN_MODE,
85*4882a593Smuzhiyun .roam_scan_rssi_threshold = WMI_ROAM_SCAN_RSSI_THRESHOLD,
86*4882a593Smuzhiyun .roam_scan_period = WMI_ROAM_SCAN_PERIOD,
87*4882a593Smuzhiyun .roam_scan_rssi_change_threshold = WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
88*4882a593Smuzhiyun .roam_ap_profile = WMI_ROAM_AP_PROFILE,
89*4882a593Smuzhiyun .ofl_scan_add_ap_profile = WMI_ROAM_AP_PROFILE,
90*4882a593Smuzhiyun .ofl_scan_remove_ap_profile = WMI_OFL_SCAN_REMOVE_AP_PROFILE,
91*4882a593Smuzhiyun .ofl_scan_period = WMI_OFL_SCAN_PERIOD,
92*4882a593Smuzhiyun .p2p_dev_set_device_info = WMI_P2P_DEV_SET_DEVICE_INFO,
93*4882a593Smuzhiyun .p2p_dev_set_discoverability = WMI_P2P_DEV_SET_DISCOVERABILITY,
94*4882a593Smuzhiyun .p2p_go_set_beacon_ie = WMI_P2P_GO_SET_BEACON_IE,
95*4882a593Smuzhiyun .p2p_go_set_probe_resp_ie = WMI_P2P_GO_SET_PROBE_RESP_IE,
96*4882a593Smuzhiyun .p2p_set_vendor_ie_data_cmdid = WMI_P2P_SET_VENDOR_IE_DATA_CMDID,
97*4882a593Smuzhiyun .ap_ps_peer_param_cmdid = WMI_AP_PS_PEER_PARAM_CMDID,
98*4882a593Smuzhiyun .ap_ps_peer_uapsd_coex_cmdid = WMI_AP_PS_PEER_UAPSD_COEX_CMDID,
99*4882a593Smuzhiyun .peer_rate_retry_sched_cmdid = WMI_PEER_RATE_RETRY_SCHED_CMDID,
100*4882a593Smuzhiyun .wlan_profile_trigger_cmdid = WMI_WLAN_PROFILE_TRIGGER_CMDID,
101*4882a593Smuzhiyun .wlan_profile_set_hist_intvl_cmdid =
102*4882a593Smuzhiyun WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
103*4882a593Smuzhiyun .wlan_profile_get_profile_data_cmdid =
104*4882a593Smuzhiyun WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
105*4882a593Smuzhiyun .wlan_profile_enable_profile_id_cmdid =
106*4882a593Smuzhiyun WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
107*4882a593Smuzhiyun .wlan_profile_list_profile_id_cmdid =
108*4882a593Smuzhiyun WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
109*4882a593Smuzhiyun .pdev_suspend_cmdid = WMI_PDEV_SUSPEND_CMDID,
110*4882a593Smuzhiyun .pdev_resume_cmdid = WMI_PDEV_RESUME_CMDID,
111*4882a593Smuzhiyun .add_bcn_filter_cmdid = WMI_ADD_BCN_FILTER_CMDID,
112*4882a593Smuzhiyun .rmv_bcn_filter_cmdid = WMI_RMV_BCN_FILTER_CMDID,
113*4882a593Smuzhiyun .wow_add_wake_pattern_cmdid = WMI_WOW_ADD_WAKE_PATTERN_CMDID,
114*4882a593Smuzhiyun .wow_del_wake_pattern_cmdid = WMI_WOW_DEL_WAKE_PATTERN_CMDID,
115*4882a593Smuzhiyun .wow_enable_disable_wake_event_cmdid =
116*4882a593Smuzhiyun WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
117*4882a593Smuzhiyun .wow_enable_cmdid = WMI_WOW_ENABLE_CMDID,
118*4882a593Smuzhiyun .wow_hostwakeup_from_sleep_cmdid = WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
119*4882a593Smuzhiyun .rtt_measreq_cmdid = WMI_RTT_MEASREQ_CMDID,
120*4882a593Smuzhiyun .rtt_tsf_cmdid = WMI_RTT_TSF_CMDID,
121*4882a593Smuzhiyun .vdev_spectral_scan_configure_cmdid =
122*4882a593Smuzhiyun WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
123*4882a593Smuzhiyun .vdev_spectral_scan_enable_cmdid = WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
124*4882a593Smuzhiyun .request_stats_cmdid = WMI_REQUEST_STATS_CMDID,
125*4882a593Smuzhiyun .set_arp_ns_offload_cmdid = WMI_SET_ARP_NS_OFFLOAD_CMDID,
126*4882a593Smuzhiyun .network_list_offload_config_cmdid =
127*4882a593Smuzhiyun WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID,
128*4882a593Smuzhiyun .gtk_offload_cmdid = WMI_GTK_OFFLOAD_CMDID,
129*4882a593Smuzhiyun .csa_offload_enable_cmdid = WMI_CSA_OFFLOAD_ENABLE_CMDID,
130*4882a593Smuzhiyun .csa_offload_chanswitch_cmdid = WMI_CSA_OFFLOAD_CHANSWITCH_CMDID,
131*4882a593Smuzhiyun .chatter_set_mode_cmdid = WMI_CHATTER_SET_MODE_CMDID,
132*4882a593Smuzhiyun .peer_tid_addba_cmdid = WMI_PEER_TID_ADDBA_CMDID,
133*4882a593Smuzhiyun .peer_tid_delba_cmdid = WMI_PEER_TID_DELBA_CMDID,
134*4882a593Smuzhiyun .sta_dtim_ps_method_cmdid = WMI_STA_DTIM_PS_METHOD_CMDID,
135*4882a593Smuzhiyun .sta_uapsd_auto_trig_cmdid = WMI_STA_UAPSD_AUTO_TRIG_CMDID,
136*4882a593Smuzhiyun .sta_keepalive_cmd = WMI_STA_KEEPALIVE_CMD,
137*4882a593Smuzhiyun .echo_cmdid = WMI_ECHO_CMDID,
138*4882a593Smuzhiyun .pdev_utf_cmdid = WMI_PDEV_UTF_CMDID,
139*4882a593Smuzhiyun .dbglog_cfg_cmdid = WMI_DBGLOG_CFG_CMDID,
140*4882a593Smuzhiyun .pdev_qvit_cmdid = WMI_PDEV_QVIT_CMDID,
141*4882a593Smuzhiyun .pdev_ftm_intg_cmdid = WMI_PDEV_FTM_INTG_CMDID,
142*4882a593Smuzhiyun .vdev_set_keepalive_cmdid = WMI_VDEV_SET_KEEPALIVE_CMDID,
143*4882a593Smuzhiyun .vdev_get_keepalive_cmdid = WMI_VDEV_GET_KEEPALIVE_CMDID,
144*4882a593Smuzhiyun .force_fw_hang_cmdid = WMI_FORCE_FW_HANG_CMDID,
145*4882a593Smuzhiyun .gpio_config_cmdid = WMI_GPIO_CONFIG_CMDID,
146*4882a593Smuzhiyun .gpio_output_cmdid = WMI_GPIO_OUTPUT_CMDID,
147*4882a593Smuzhiyun .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED,
148*4882a593Smuzhiyun .pdev_enable_adaptive_cca_cmdid = WMI_CMD_UNSUPPORTED,
149*4882a593Smuzhiyun .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
150*4882a593Smuzhiyun .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
151*4882a593Smuzhiyun .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
152*4882a593Smuzhiyun .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
153*4882a593Smuzhiyun .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
154*4882a593Smuzhiyun .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
155*4882a593Smuzhiyun .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
156*4882a593Smuzhiyun .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
157*4882a593Smuzhiyun .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
158*4882a593Smuzhiyun .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
159*4882a593Smuzhiyun .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
160*4882a593Smuzhiyun .nan_cmdid = WMI_CMD_UNSUPPORTED,
161*4882a593Smuzhiyun .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
162*4882a593Smuzhiyun .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
163*4882a593Smuzhiyun .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
164*4882a593Smuzhiyun .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
165*4882a593Smuzhiyun .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
166*4882a593Smuzhiyun .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
167*4882a593Smuzhiyun .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
168*4882a593Smuzhiyun .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
169*4882a593Smuzhiyun .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
170*4882a593Smuzhiyun .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
171*4882a593Smuzhiyun .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
172*4882a593Smuzhiyun .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
173*4882a593Smuzhiyun .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
174*4882a593Smuzhiyun .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
175*4882a593Smuzhiyun .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
176*4882a593Smuzhiyun .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
177*4882a593Smuzhiyun .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
178*4882a593Smuzhiyun .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
179*4882a593Smuzhiyun .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
180*4882a593Smuzhiyun .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
181*4882a593Smuzhiyun .pdev_get_nfcal_power_cmdid = WMI_CMD_UNSUPPORTED,
182*4882a593Smuzhiyun .pdev_get_tpc_cmdid = WMI_CMD_UNSUPPORTED,
183*4882a593Smuzhiyun .pdev_get_ast_info_cmdid = WMI_CMD_UNSUPPORTED,
184*4882a593Smuzhiyun .vdev_set_dscp_tid_map_cmdid = WMI_CMD_UNSUPPORTED,
185*4882a593Smuzhiyun .pdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
186*4882a593Smuzhiyun .vdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
187*4882a593Smuzhiyun .vdev_filter_neighbor_rx_packets_cmdid = WMI_CMD_UNSUPPORTED,
188*4882a593Smuzhiyun .mu_cal_start_cmdid = WMI_CMD_UNSUPPORTED,
189*4882a593Smuzhiyun .set_cca_params_cmdid = WMI_CMD_UNSUPPORTED,
190*4882a593Smuzhiyun .pdev_bss_chan_info_request_cmdid = WMI_CMD_UNSUPPORTED,
191*4882a593Smuzhiyun .pdev_get_tpc_table_cmdid = WMI_CMD_UNSUPPORTED,
192*4882a593Smuzhiyun .radar_found_cmdid = WMI_CMD_UNSUPPORTED,
193*4882a593Smuzhiyun };
194*4882a593Smuzhiyun
195*4882a593Smuzhiyun /* 10.X WMI cmd track */
196*4882a593Smuzhiyun static struct wmi_cmd_map wmi_10x_cmd_map = {
197*4882a593Smuzhiyun .init_cmdid = WMI_10X_INIT_CMDID,
198*4882a593Smuzhiyun .start_scan_cmdid = WMI_10X_START_SCAN_CMDID,
199*4882a593Smuzhiyun .stop_scan_cmdid = WMI_10X_STOP_SCAN_CMDID,
200*4882a593Smuzhiyun .scan_chan_list_cmdid = WMI_10X_SCAN_CHAN_LIST_CMDID,
201*4882a593Smuzhiyun .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
202*4882a593Smuzhiyun .scan_prob_req_oui_cmdid = WMI_CMD_UNSUPPORTED,
203*4882a593Smuzhiyun .pdev_set_regdomain_cmdid = WMI_10X_PDEV_SET_REGDOMAIN_CMDID,
204*4882a593Smuzhiyun .pdev_set_channel_cmdid = WMI_10X_PDEV_SET_CHANNEL_CMDID,
205*4882a593Smuzhiyun .pdev_set_param_cmdid = WMI_10X_PDEV_SET_PARAM_CMDID,
206*4882a593Smuzhiyun .pdev_pktlog_enable_cmdid = WMI_10X_PDEV_PKTLOG_ENABLE_CMDID,
207*4882a593Smuzhiyun .pdev_pktlog_disable_cmdid = WMI_10X_PDEV_PKTLOG_DISABLE_CMDID,
208*4882a593Smuzhiyun .pdev_set_wmm_params_cmdid = WMI_10X_PDEV_SET_WMM_PARAMS_CMDID,
209*4882a593Smuzhiyun .pdev_set_ht_cap_ie_cmdid = WMI_10X_PDEV_SET_HT_CAP_IE_CMDID,
210*4882a593Smuzhiyun .pdev_set_vht_cap_ie_cmdid = WMI_10X_PDEV_SET_VHT_CAP_IE_CMDID,
211*4882a593Smuzhiyun .pdev_set_dscp_tid_map_cmdid = WMI_10X_PDEV_SET_DSCP_TID_MAP_CMDID,
212*4882a593Smuzhiyun .pdev_set_quiet_mode_cmdid = WMI_10X_PDEV_SET_QUIET_MODE_CMDID,
213*4882a593Smuzhiyun .pdev_green_ap_ps_enable_cmdid = WMI_10X_PDEV_GREEN_AP_PS_ENABLE_CMDID,
214*4882a593Smuzhiyun .pdev_get_tpc_config_cmdid = WMI_10X_PDEV_GET_TPC_CONFIG_CMDID,
215*4882a593Smuzhiyun .pdev_set_base_macaddr_cmdid = WMI_10X_PDEV_SET_BASE_MACADDR_CMDID,
216*4882a593Smuzhiyun .vdev_create_cmdid = WMI_10X_VDEV_CREATE_CMDID,
217*4882a593Smuzhiyun .vdev_delete_cmdid = WMI_10X_VDEV_DELETE_CMDID,
218*4882a593Smuzhiyun .vdev_start_request_cmdid = WMI_10X_VDEV_START_REQUEST_CMDID,
219*4882a593Smuzhiyun .vdev_restart_request_cmdid = WMI_10X_VDEV_RESTART_REQUEST_CMDID,
220*4882a593Smuzhiyun .vdev_up_cmdid = WMI_10X_VDEV_UP_CMDID,
221*4882a593Smuzhiyun .vdev_stop_cmdid = WMI_10X_VDEV_STOP_CMDID,
222*4882a593Smuzhiyun .vdev_down_cmdid = WMI_10X_VDEV_DOWN_CMDID,
223*4882a593Smuzhiyun .vdev_set_param_cmdid = WMI_10X_VDEV_SET_PARAM_CMDID,
224*4882a593Smuzhiyun .vdev_install_key_cmdid = WMI_10X_VDEV_INSTALL_KEY_CMDID,
225*4882a593Smuzhiyun .peer_create_cmdid = WMI_10X_PEER_CREATE_CMDID,
226*4882a593Smuzhiyun .peer_delete_cmdid = WMI_10X_PEER_DELETE_CMDID,
227*4882a593Smuzhiyun .peer_flush_tids_cmdid = WMI_10X_PEER_FLUSH_TIDS_CMDID,
228*4882a593Smuzhiyun .peer_set_param_cmdid = WMI_10X_PEER_SET_PARAM_CMDID,
229*4882a593Smuzhiyun .peer_assoc_cmdid = WMI_10X_PEER_ASSOC_CMDID,
230*4882a593Smuzhiyun .peer_add_wds_entry_cmdid = WMI_10X_PEER_ADD_WDS_ENTRY_CMDID,
231*4882a593Smuzhiyun .peer_remove_wds_entry_cmdid = WMI_10X_PEER_REMOVE_WDS_ENTRY_CMDID,
232*4882a593Smuzhiyun .peer_mcast_group_cmdid = WMI_10X_PEER_MCAST_GROUP_CMDID,
233*4882a593Smuzhiyun .bcn_tx_cmdid = WMI_10X_BCN_TX_CMDID,
234*4882a593Smuzhiyun .pdev_send_bcn_cmdid = WMI_10X_PDEV_SEND_BCN_CMDID,
235*4882a593Smuzhiyun .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
236*4882a593Smuzhiyun .bcn_filter_rx_cmdid = WMI_10X_BCN_FILTER_RX_CMDID,
237*4882a593Smuzhiyun .prb_req_filter_rx_cmdid = WMI_10X_PRB_REQ_FILTER_RX_CMDID,
238*4882a593Smuzhiyun .mgmt_tx_cmdid = WMI_10X_MGMT_TX_CMDID,
239*4882a593Smuzhiyun .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
240*4882a593Smuzhiyun .addba_clear_resp_cmdid = WMI_10X_ADDBA_CLEAR_RESP_CMDID,
241*4882a593Smuzhiyun .addba_send_cmdid = WMI_10X_ADDBA_SEND_CMDID,
242*4882a593Smuzhiyun .addba_status_cmdid = WMI_10X_ADDBA_STATUS_CMDID,
243*4882a593Smuzhiyun .delba_send_cmdid = WMI_10X_DELBA_SEND_CMDID,
244*4882a593Smuzhiyun .addba_set_resp_cmdid = WMI_10X_ADDBA_SET_RESP_CMDID,
245*4882a593Smuzhiyun .send_singleamsdu_cmdid = WMI_10X_SEND_SINGLEAMSDU_CMDID,
246*4882a593Smuzhiyun .sta_powersave_mode_cmdid = WMI_10X_STA_POWERSAVE_MODE_CMDID,
247*4882a593Smuzhiyun .sta_powersave_param_cmdid = WMI_10X_STA_POWERSAVE_PARAM_CMDID,
248*4882a593Smuzhiyun .sta_mimo_ps_mode_cmdid = WMI_10X_STA_MIMO_PS_MODE_CMDID,
249*4882a593Smuzhiyun .pdev_dfs_enable_cmdid = WMI_10X_PDEV_DFS_ENABLE_CMDID,
250*4882a593Smuzhiyun .pdev_dfs_disable_cmdid = WMI_10X_PDEV_DFS_DISABLE_CMDID,
251*4882a593Smuzhiyun .roam_scan_mode = WMI_10X_ROAM_SCAN_MODE,
252*4882a593Smuzhiyun .roam_scan_rssi_threshold = WMI_10X_ROAM_SCAN_RSSI_THRESHOLD,
253*4882a593Smuzhiyun .roam_scan_period = WMI_10X_ROAM_SCAN_PERIOD,
254*4882a593Smuzhiyun .roam_scan_rssi_change_threshold =
255*4882a593Smuzhiyun WMI_10X_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
256*4882a593Smuzhiyun .roam_ap_profile = WMI_10X_ROAM_AP_PROFILE,
257*4882a593Smuzhiyun .ofl_scan_add_ap_profile = WMI_10X_OFL_SCAN_ADD_AP_PROFILE,
258*4882a593Smuzhiyun .ofl_scan_remove_ap_profile = WMI_10X_OFL_SCAN_REMOVE_AP_PROFILE,
259*4882a593Smuzhiyun .ofl_scan_period = WMI_10X_OFL_SCAN_PERIOD,
260*4882a593Smuzhiyun .p2p_dev_set_device_info = WMI_10X_P2P_DEV_SET_DEVICE_INFO,
261*4882a593Smuzhiyun .p2p_dev_set_discoverability = WMI_10X_P2P_DEV_SET_DISCOVERABILITY,
262*4882a593Smuzhiyun .p2p_go_set_beacon_ie = WMI_10X_P2P_GO_SET_BEACON_IE,
263*4882a593Smuzhiyun .p2p_go_set_probe_resp_ie = WMI_10X_P2P_GO_SET_PROBE_RESP_IE,
264*4882a593Smuzhiyun .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
265*4882a593Smuzhiyun .ap_ps_peer_param_cmdid = WMI_10X_AP_PS_PEER_PARAM_CMDID,
266*4882a593Smuzhiyun .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
267*4882a593Smuzhiyun .peer_rate_retry_sched_cmdid = WMI_10X_PEER_RATE_RETRY_SCHED_CMDID,
268*4882a593Smuzhiyun .wlan_profile_trigger_cmdid = WMI_10X_WLAN_PROFILE_TRIGGER_CMDID,
269*4882a593Smuzhiyun .wlan_profile_set_hist_intvl_cmdid =
270*4882a593Smuzhiyun WMI_10X_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
271*4882a593Smuzhiyun .wlan_profile_get_profile_data_cmdid =
272*4882a593Smuzhiyun WMI_10X_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
273*4882a593Smuzhiyun .wlan_profile_enable_profile_id_cmdid =
274*4882a593Smuzhiyun WMI_10X_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
275*4882a593Smuzhiyun .wlan_profile_list_profile_id_cmdid =
276*4882a593Smuzhiyun WMI_10X_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
277*4882a593Smuzhiyun .pdev_suspend_cmdid = WMI_10X_PDEV_SUSPEND_CMDID,
278*4882a593Smuzhiyun .pdev_resume_cmdid = WMI_10X_PDEV_RESUME_CMDID,
279*4882a593Smuzhiyun .add_bcn_filter_cmdid = WMI_10X_ADD_BCN_FILTER_CMDID,
280*4882a593Smuzhiyun .rmv_bcn_filter_cmdid = WMI_10X_RMV_BCN_FILTER_CMDID,
281*4882a593Smuzhiyun .wow_add_wake_pattern_cmdid = WMI_10X_WOW_ADD_WAKE_PATTERN_CMDID,
282*4882a593Smuzhiyun .wow_del_wake_pattern_cmdid = WMI_10X_WOW_DEL_WAKE_PATTERN_CMDID,
283*4882a593Smuzhiyun .wow_enable_disable_wake_event_cmdid =
284*4882a593Smuzhiyun WMI_10X_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
285*4882a593Smuzhiyun .wow_enable_cmdid = WMI_10X_WOW_ENABLE_CMDID,
286*4882a593Smuzhiyun .wow_hostwakeup_from_sleep_cmdid =
287*4882a593Smuzhiyun WMI_10X_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
288*4882a593Smuzhiyun .rtt_measreq_cmdid = WMI_10X_RTT_MEASREQ_CMDID,
289*4882a593Smuzhiyun .rtt_tsf_cmdid = WMI_10X_RTT_TSF_CMDID,
290*4882a593Smuzhiyun .vdev_spectral_scan_configure_cmdid =
291*4882a593Smuzhiyun WMI_10X_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
292*4882a593Smuzhiyun .vdev_spectral_scan_enable_cmdid =
293*4882a593Smuzhiyun WMI_10X_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
294*4882a593Smuzhiyun .request_stats_cmdid = WMI_10X_REQUEST_STATS_CMDID,
295*4882a593Smuzhiyun .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
296*4882a593Smuzhiyun .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
297*4882a593Smuzhiyun .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
298*4882a593Smuzhiyun .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
299*4882a593Smuzhiyun .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
300*4882a593Smuzhiyun .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
301*4882a593Smuzhiyun .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
302*4882a593Smuzhiyun .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
303*4882a593Smuzhiyun .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
304*4882a593Smuzhiyun .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
305*4882a593Smuzhiyun .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
306*4882a593Smuzhiyun .echo_cmdid = WMI_10X_ECHO_CMDID,
307*4882a593Smuzhiyun .pdev_utf_cmdid = WMI_10X_PDEV_UTF_CMDID,
308*4882a593Smuzhiyun .dbglog_cfg_cmdid = WMI_10X_DBGLOG_CFG_CMDID,
309*4882a593Smuzhiyun .pdev_qvit_cmdid = WMI_10X_PDEV_QVIT_CMDID,
310*4882a593Smuzhiyun .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
311*4882a593Smuzhiyun .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
312*4882a593Smuzhiyun .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
313*4882a593Smuzhiyun .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
314*4882a593Smuzhiyun .gpio_config_cmdid = WMI_10X_GPIO_CONFIG_CMDID,
315*4882a593Smuzhiyun .gpio_output_cmdid = WMI_10X_GPIO_OUTPUT_CMDID,
316*4882a593Smuzhiyun .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED,
317*4882a593Smuzhiyun .pdev_enable_adaptive_cca_cmdid = WMI_CMD_UNSUPPORTED,
318*4882a593Smuzhiyun .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
319*4882a593Smuzhiyun .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
320*4882a593Smuzhiyun .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
321*4882a593Smuzhiyun .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
322*4882a593Smuzhiyun .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
323*4882a593Smuzhiyun .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
324*4882a593Smuzhiyun .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
325*4882a593Smuzhiyun .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
326*4882a593Smuzhiyun .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
327*4882a593Smuzhiyun .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
328*4882a593Smuzhiyun .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
329*4882a593Smuzhiyun .nan_cmdid = WMI_CMD_UNSUPPORTED,
330*4882a593Smuzhiyun .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
331*4882a593Smuzhiyun .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
332*4882a593Smuzhiyun .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
333*4882a593Smuzhiyun .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
334*4882a593Smuzhiyun .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
335*4882a593Smuzhiyun .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
336*4882a593Smuzhiyun .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
337*4882a593Smuzhiyun .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
338*4882a593Smuzhiyun .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
339*4882a593Smuzhiyun .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
340*4882a593Smuzhiyun .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
341*4882a593Smuzhiyun .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
342*4882a593Smuzhiyun .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
343*4882a593Smuzhiyun .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
344*4882a593Smuzhiyun .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
345*4882a593Smuzhiyun .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
346*4882a593Smuzhiyun .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
347*4882a593Smuzhiyun .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
348*4882a593Smuzhiyun .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
349*4882a593Smuzhiyun .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
350*4882a593Smuzhiyun .pdev_get_nfcal_power_cmdid = WMI_CMD_UNSUPPORTED,
351*4882a593Smuzhiyun .pdev_get_tpc_cmdid = WMI_CMD_UNSUPPORTED,
352*4882a593Smuzhiyun .pdev_get_ast_info_cmdid = WMI_CMD_UNSUPPORTED,
353*4882a593Smuzhiyun .vdev_set_dscp_tid_map_cmdid = WMI_CMD_UNSUPPORTED,
354*4882a593Smuzhiyun .pdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
355*4882a593Smuzhiyun .vdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
356*4882a593Smuzhiyun .vdev_filter_neighbor_rx_packets_cmdid = WMI_CMD_UNSUPPORTED,
357*4882a593Smuzhiyun .mu_cal_start_cmdid = WMI_CMD_UNSUPPORTED,
358*4882a593Smuzhiyun .set_cca_params_cmdid = WMI_CMD_UNSUPPORTED,
359*4882a593Smuzhiyun .pdev_bss_chan_info_request_cmdid = WMI_CMD_UNSUPPORTED,
360*4882a593Smuzhiyun .pdev_get_tpc_table_cmdid = WMI_CMD_UNSUPPORTED,
361*4882a593Smuzhiyun .radar_found_cmdid = WMI_CMD_UNSUPPORTED,
362*4882a593Smuzhiyun };
363*4882a593Smuzhiyun
364*4882a593Smuzhiyun /* 10.2.4 WMI cmd track */
365*4882a593Smuzhiyun static struct wmi_cmd_map wmi_10_2_4_cmd_map = {
366*4882a593Smuzhiyun .init_cmdid = WMI_10_2_INIT_CMDID,
367*4882a593Smuzhiyun .start_scan_cmdid = WMI_10_2_START_SCAN_CMDID,
368*4882a593Smuzhiyun .stop_scan_cmdid = WMI_10_2_STOP_SCAN_CMDID,
369*4882a593Smuzhiyun .scan_chan_list_cmdid = WMI_10_2_SCAN_CHAN_LIST_CMDID,
370*4882a593Smuzhiyun .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
371*4882a593Smuzhiyun .scan_prob_req_oui_cmdid = WMI_CMD_UNSUPPORTED,
372*4882a593Smuzhiyun .pdev_set_regdomain_cmdid = WMI_10_2_PDEV_SET_REGDOMAIN_CMDID,
373*4882a593Smuzhiyun .pdev_set_channel_cmdid = WMI_10_2_PDEV_SET_CHANNEL_CMDID,
374*4882a593Smuzhiyun .pdev_set_param_cmdid = WMI_10_2_PDEV_SET_PARAM_CMDID,
375*4882a593Smuzhiyun .pdev_pktlog_enable_cmdid = WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID,
376*4882a593Smuzhiyun .pdev_pktlog_disable_cmdid = WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID,
377*4882a593Smuzhiyun .pdev_set_wmm_params_cmdid = WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID,
378*4882a593Smuzhiyun .pdev_set_ht_cap_ie_cmdid = WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID,
379*4882a593Smuzhiyun .pdev_set_vht_cap_ie_cmdid = WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID,
380*4882a593Smuzhiyun .pdev_set_quiet_mode_cmdid = WMI_10_2_PDEV_SET_QUIET_MODE_CMDID,
381*4882a593Smuzhiyun .pdev_green_ap_ps_enable_cmdid = WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID,
382*4882a593Smuzhiyun .pdev_get_tpc_config_cmdid = WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID,
383*4882a593Smuzhiyun .pdev_set_base_macaddr_cmdid = WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID,
384*4882a593Smuzhiyun .vdev_create_cmdid = WMI_10_2_VDEV_CREATE_CMDID,
385*4882a593Smuzhiyun .vdev_delete_cmdid = WMI_10_2_VDEV_DELETE_CMDID,
386*4882a593Smuzhiyun .vdev_start_request_cmdid = WMI_10_2_VDEV_START_REQUEST_CMDID,
387*4882a593Smuzhiyun .vdev_restart_request_cmdid = WMI_10_2_VDEV_RESTART_REQUEST_CMDID,
388*4882a593Smuzhiyun .vdev_up_cmdid = WMI_10_2_VDEV_UP_CMDID,
389*4882a593Smuzhiyun .vdev_stop_cmdid = WMI_10_2_VDEV_STOP_CMDID,
390*4882a593Smuzhiyun .vdev_down_cmdid = WMI_10_2_VDEV_DOWN_CMDID,
391*4882a593Smuzhiyun .vdev_set_param_cmdid = WMI_10_2_VDEV_SET_PARAM_CMDID,
392*4882a593Smuzhiyun .vdev_install_key_cmdid = WMI_10_2_VDEV_INSTALL_KEY_CMDID,
393*4882a593Smuzhiyun .peer_create_cmdid = WMI_10_2_PEER_CREATE_CMDID,
394*4882a593Smuzhiyun .peer_delete_cmdid = WMI_10_2_PEER_DELETE_CMDID,
395*4882a593Smuzhiyun .peer_flush_tids_cmdid = WMI_10_2_PEER_FLUSH_TIDS_CMDID,
396*4882a593Smuzhiyun .peer_set_param_cmdid = WMI_10_2_PEER_SET_PARAM_CMDID,
397*4882a593Smuzhiyun .peer_assoc_cmdid = WMI_10_2_PEER_ASSOC_CMDID,
398*4882a593Smuzhiyun .peer_add_wds_entry_cmdid = WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID,
399*4882a593Smuzhiyun .peer_remove_wds_entry_cmdid = WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID,
400*4882a593Smuzhiyun .peer_mcast_group_cmdid = WMI_10_2_PEER_MCAST_GROUP_CMDID,
401*4882a593Smuzhiyun .bcn_tx_cmdid = WMI_10_2_BCN_TX_CMDID,
402*4882a593Smuzhiyun .pdev_send_bcn_cmdid = WMI_10_2_PDEV_SEND_BCN_CMDID,
403*4882a593Smuzhiyun .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
404*4882a593Smuzhiyun .bcn_filter_rx_cmdid = WMI_10_2_BCN_FILTER_RX_CMDID,
405*4882a593Smuzhiyun .prb_req_filter_rx_cmdid = WMI_10_2_PRB_REQ_FILTER_RX_CMDID,
406*4882a593Smuzhiyun .mgmt_tx_cmdid = WMI_10_2_MGMT_TX_CMDID,
407*4882a593Smuzhiyun .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
408*4882a593Smuzhiyun .addba_clear_resp_cmdid = WMI_10_2_ADDBA_CLEAR_RESP_CMDID,
409*4882a593Smuzhiyun .addba_send_cmdid = WMI_10_2_ADDBA_SEND_CMDID,
410*4882a593Smuzhiyun .addba_status_cmdid = WMI_10_2_ADDBA_STATUS_CMDID,
411*4882a593Smuzhiyun .delba_send_cmdid = WMI_10_2_DELBA_SEND_CMDID,
412*4882a593Smuzhiyun .addba_set_resp_cmdid = WMI_10_2_ADDBA_SET_RESP_CMDID,
413*4882a593Smuzhiyun .send_singleamsdu_cmdid = WMI_10_2_SEND_SINGLEAMSDU_CMDID,
414*4882a593Smuzhiyun .sta_powersave_mode_cmdid = WMI_10_2_STA_POWERSAVE_MODE_CMDID,
415*4882a593Smuzhiyun .sta_powersave_param_cmdid = WMI_10_2_STA_POWERSAVE_PARAM_CMDID,
416*4882a593Smuzhiyun .sta_mimo_ps_mode_cmdid = WMI_10_2_STA_MIMO_PS_MODE_CMDID,
417*4882a593Smuzhiyun .pdev_dfs_enable_cmdid = WMI_10_2_PDEV_DFS_ENABLE_CMDID,
418*4882a593Smuzhiyun .pdev_dfs_disable_cmdid = WMI_10_2_PDEV_DFS_DISABLE_CMDID,
419*4882a593Smuzhiyun .roam_scan_mode = WMI_10_2_ROAM_SCAN_MODE,
420*4882a593Smuzhiyun .roam_scan_rssi_threshold = WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD,
421*4882a593Smuzhiyun .roam_scan_period = WMI_10_2_ROAM_SCAN_PERIOD,
422*4882a593Smuzhiyun .roam_scan_rssi_change_threshold =
423*4882a593Smuzhiyun WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
424*4882a593Smuzhiyun .roam_ap_profile = WMI_10_2_ROAM_AP_PROFILE,
425*4882a593Smuzhiyun .ofl_scan_add_ap_profile = WMI_10_2_OFL_SCAN_ADD_AP_PROFILE,
426*4882a593Smuzhiyun .ofl_scan_remove_ap_profile = WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE,
427*4882a593Smuzhiyun .ofl_scan_period = WMI_10_2_OFL_SCAN_PERIOD,
428*4882a593Smuzhiyun .p2p_dev_set_device_info = WMI_10_2_P2P_DEV_SET_DEVICE_INFO,
429*4882a593Smuzhiyun .p2p_dev_set_discoverability = WMI_10_2_P2P_DEV_SET_DISCOVERABILITY,
430*4882a593Smuzhiyun .p2p_go_set_beacon_ie = WMI_10_2_P2P_GO_SET_BEACON_IE,
431*4882a593Smuzhiyun .p2p_go_set_probe_resp_ie = WMI_10_2_P2P_GO_SET_PROBE_RESP_IE,
432*4882a593Smuzhiyun .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
433*4882a593Smuzhiyun .ap_ps_peer_param_cmdid = WMI_10_2_AP_PS_PEER_PARAM_CMDID,
434*4882a593Smuzhiyun .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
435*4882a593Smuzhiyun .peer_rate_retry_sched_cmdid = WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID,
436*4882a593Smuzhiyun .wlan_profile_trigger_cmdid = WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID,
437*4882a593Smuzhiyun .wlan_profile_set_hist_intvl_cmdid =
438*4882a593Smuzhiyun WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
439*4882a593Smuzhiyun .wlan_profile_get_profile_data_cmdid =
440*4882a593Smuzhiyun WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
441*4882a593Smuzhiyun .wlan_profile_enable_profile_id_cmdid =
442*4882a593Smuzhiyun WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
443*4882a593Smuzhiyun .wlan_profile_list_profile_id_cmdid =
444*4882a593Smuzhiyun WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
445*4882a593Smuzhiyun .pdev_suspend_cmdid = WMI_10_2_PDEV_SUSPEND_CMDID,
446*4882a593Smuzhiyun .pdev_resume_cmdid = WMI_10_2_PDEV_RESUME_CMDID,
447*4882a593Smuzhiyun .add_bcn_filter_cmdid = WMI_10_2_ADD_BCN_FILTER_CMDID,
448*4882a593Smuzhiyun .rmv_bcn_filter_cmdid = WMI_10_2_RMV_BCN_FILTER_CMDID,
449*4882a593Smuzhiyun .wow_add_wake_pattern_cmdid = WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID,
450*4882a593Smuzhiyun .wow_del_wake_pattern_cmdid = WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID,
451*4882a593Smuzhiyun .wow_enable_disable_wake_event_cmdid =
452*4882a593Smuzhiyun WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
453*4882a593Smuzhiyun .wow_enable_cmdid = WMI_10_2_WOW_ENABLE_CMDID,
454*4882a593Smuzhiyun .wow_hostwakeup_from_sleep_cmdid =
455*4882a593Smuzhiyun WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
456*4882a593Smuzhiyun .rtt_measreq_cmdid = WMI_10_2_RTT_MEASREQ_CMDID,
457*4882a593Smuzhiyun .rtt_tsf_cmdid = WMI_10_2_RTT_TSF_CMDID,
458*4882a593Smuzhiyun .vdev_spectral_scan_configure_cmdid =
459*4882a593Smuzhiyun WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
460*4882a593Smuzhiyun .vdev_spectral_scan_enable_cmdid =
461*4882a593Smuzhiyun WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
462*4882a593Smuzhiyun .request_stats_cmdid = WMI_10_2_REQUEST_STATS_CMDID,
463*4882a593Smuzhiyun .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
464*4882a593Smuzhiyun .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
465*4882a593Smuzhiyun .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
466*4882a593Smuzhiyun .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
467*4882a593Smuzhiyun .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
468*4882a593Smuzhiyun .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
469*4882a593Smuzhiyun .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
470*4882a593Smuzhiyun .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
471*4882a593Smuzhiyun .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
472*4882a593Smuzhiyun .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
473*4882a593Smuzhiyun .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
474*4882a593Smuzhiyun .echo_cmdid = WMI_10_2_ECHO_CMDID,
475*4882a593Smuzhiyun .pdev_utf_cmdid = WMI_10_2_PDEV_UTF_CMDID,
476*4882a593Smuzhiyun .dbglog_cfg_cmdid = WMI_10_2_DBGLOG_CFG_CMDID,
477*4882a593Smuzhiyun .pdev_qvit_cmdid = WMI_10_2_PDEV_QVIT_CMDID,
478*4882a593Smuzhiyun .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
479*4882a593Smuzhiyun .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
480*4882a593Smuzhiyun .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
481*4882a593Smuzhiyun .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
482*4882a593Smuzhiyun .gpio_config_cmdid = WMI_10_2_GPIO_CONFIG_CMDID,
483*4882a593Smuzhiyun .gpio_output_cmdid = WMI_10_2_GPIO_OUTPUT_CMDID,
484*4882a593Smuzhiyun .pdev_get_temperature_cmdid = WMI_10_2_PDEV_GET_TEMPERATURE_CMDID,
485*4882a593Smuzhiyun .pdev_enable_adaptive_cca_cmdid = WMI_10_2_SET_CCA_PARAMS,
486*4882a593Smuzhiyun .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
487*4882a593Smuzhiyun .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
488*4882a593Smuzhiyun .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
489*4882a593Smuzhiyun .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
490*4882a593Smuzhiyun .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
491*4882a593Smuzhiyun .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
492*4882a593Smuzhiyun .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
493*4882a593Smuzhiyun .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
494*4882a593Smuzhiyun .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
495*4882a593Smuzhiyun .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
496*4882a593Smuzhiyun .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
497*4882a593Smuzhiyun .nan_cmdid = WMI_CMD_UNSUPPORTED,
498*4882a593Smuzhiyun .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
499*4882a593Smuzhiyun .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
500*4882a593Smuzhiyun .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
501*4882a593Smuzhiyun .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
502*4882a593Smuzhiyun .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
503*4882a593Smuzhiyun .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
504*4882a593Smuzhiyun .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
505*4882a593Smuzhiyun .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
506*4882a593Smuzhiyun .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
507*4882a593Smuzhiyun .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
508*4882a593Smuzhiyun .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
509*4882a593Smuzhiyun .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
510*4882a593Smuzhiyun .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
511*4882a593Smuzhiyun .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
512*4882a593Smuzhiyun .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
513*4882a593Smuzhiyun .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
514*4882a593Smuzhiyun .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
515*4882a593Smuzhiyun .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
516*4882a593Smuzhiyun .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
517*4882a593Smuzhiyun .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
518*4882a593Smuzhiyun .pdev_get_nfcal_power_cmdid = WMI_CMD_UNSUPPORTED,
519*4882a593Smuzhiyun .pdev_get_tpc_cmdid = WMI_CMD_UNSUPPORTED,
520*4882a593Smuzhiyun .pdev_get_ast_info_cmdid = WMI_CMD_UNSUPPORTED,
521*4882a593Smuzhiyun .vdev_set_dscp_tid_map_cmdid = WMI_CMD_UNSUPPORTED,
522*4882a593Smuzhiyun .pdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
523*4882a593Smuzhiyun .vdev_get_info_cmdid = WMI_CMD_UNSUPPORTED,
524*4882a593Smuzhiyun .vdev_filter_neighbor_rx_packets_cmdid = WMI_CMD_UNSUPPORTED,
525*4882a593Smuzhiyun .mu_cal_start_cmdid = WMI_CMD_UNSUPPORTED,
526*4882a593Smuzhiyun .set_cca_params_cmdid = WMI_CMD_UNSUPPORTED,
527*4882a593Smuzhiyun .pdev_bss_chan_info_request_cmdid =
528*4882a593Smuzhiyun WMI_10_2_PDEV_BSS_CHAN_INFO_REQUEST_CMDID,
529*4882a593Smuzhiyun .pdev_get_tpc_table_cmdid = WMI_CMD_UNSUPPORTED,
530*4882a593Smuzhiyun .radar_found_cmdid = WMI_CMD_UNSUPPORTED,
531*4882a593Smuzhiyun .set_bb_timing_cmdid = WMI_10_2_PDEV_SET_BB_TIMING_CONFIG_CMDID,
532*4882a593Smuzhiyun };
533*4882a593Smuzhiyun
534*4882a593Smuzhiyun /* 10.4 WMI cmd track */
535*4882a593Smuzhiyun static struct wmi_cmd_map wmi_10_4_cmd_map = {
536*4882a593Smuzhiyun .init_cmdid = WMI_10_4_INIT_CMDID,
537*4882a593Smuzhiyun .start_scan_cmdid = WMI_10_4_START_SCAN_CMDID,
538*4882a593Smuzhiyun .stop_scan_cmdid = WMI_10_4_STOP_SCAN_CMDID,
539*4882a593Smuzhiyun .scan_chan_list_cmdid = WMI_10_4_SCAN_CHAN_LIST_CMDID,
540*4882a593Smuzhiyun .scan_sch_prio_tbl_cmdid = WMI_10_4_SCAN_SCH_PRIO_TBL_CMDID,
541*4882a593Smuzhiyun .scan_prob_req_oui_cmdid = WMI_CMD_UNSUPPORTED,
542*4882a593Smuzhiyun .pdev_set_regdomain_cmdid = WMI_10_4_PDEV_SET_REGDOMAIN_CMDID,
543*4882a593Smuzhiyun .pdev_set_channel_cmdid = WMI_10_4_PDEV_SET_CHANNEL_CMDID,
544*4882a593Smuzhiyun .pdev_set_param_cmdid = WMI_10_4_PDEV_SET_PARAM_CMDID,
545*4882a593Smuzhiyun .pdev_pktlog_enable_cmdid = WMI_10_4_PDEV_PKTLOG_ENABLE_CMDID,
546*4882a593Smuzhiyun .pdev_pktlog_disable_cmdid = WMI_10_4_PDEV_PKTLOG_DISABLE_CMDID,
547*4882a593Smuzhiyun .pdev_set_wmm_params_cmdid = WMI_10_4_PDEV_SET_WMM_PARAMS_CMDID,
548*4882a593Smuzhiyun .pdev_set_ht_cap_ie_cmdid = WMI_10_4_PDEV_SET_HT_CAP_IE_CMDID,
549*4882a593Smuzhiyun .pdev_set_vht_cap_ie_cmdid = WMI_10_4_PDEV_SET_VHT_CAP_IE_CMDID,
550*4882a593Smuzhiyun .pdev_set_dscp_tid_map_cmdid = WMI_10_4_PDEV_SET_DSCP_TID_MAP_CMDID,
551*4882a593Smuzhiyun .pdev_set_quiet_mode_cmdid = WMI_10_4_PDEV_SET_QUIET_MODE_CMDID,
552*4882a593Smuzhiyun .pdev_green_ap_ps_enable_cmdid = WMI_10_4_PDEV_GREEN_AP_PS_ENABLE_CMDID,
553*4882a593Smuzhiyun .pdev_get_tpc_config_cmdid = WMI_10_4_PDEV_GET_TPC_CONFIG_CMDID,
554*4882a593Smuzhiyun .pdev_set_base_macaddr_cmdid = WMI_10_4_PDEV_SET_BASE_MACADDR_CMDID,
555*4882a593Smuzhiyun .vdev_create_cmdid = WMI_10_4_VDEV_CREATE_CMDID,
556*4882a593Smuzhiyun .vdev_delete_cmdid = WMI_10_4_VDEV_DELETE_CMDID,
557*4882a593Smuzhiyun .vdev_start_request_cmdid = WMI_10_4_VDEV_START_REQUEST_CMDID,
558*4882a593Smuzhiyun .vdev_restart_request_cmdid = WMI_10_4_VDEV_RESTART_REQUEST_CMDID,
559*4882a593Smuzhiyun .vdev_up_cmdid = WMI_10_4_VDEV_UP_CMDID,
560*4882a593Smuzhiyun .vdev_stop_cmdid = WMI_10_4_VDEV_STOP_CMDID,
561*4882a593Smuzhiyun .vdev_down_cmdid = WMI_10_4_VDEV_DOWN_CMDID,
562*4882a593Smuzhiyun .vdev_set_param_cmdid = WMI_10_4_VDEV_SET_PARAM_CMDID,
563*4882a593Smuzhiyun .vdev_install_key_cmdid = WMI_10_4_VDEV_INSTALL_KEY_CMDID,
564*4882a593Smuzhiyun .peer_create_cmdid = WMI_10_4_PEER_CREATE_CMDID,
565*4882a593Smuzhiyun .peer_delete_cmdid = WMI_10_4_PEER_DELETE_CMDID,
566*4882a593Smuzhiyun .peer_flush_tids_cmdid = WMI_10_4_PEER_FLUSH_TIDS_CMDID,
567*4882a593Smuzhiyun .peer_set_param_cmdid = WMI_10_4_PEER_SET_PARAM_CMDID,
568*4882a593Smuzhiyun .peer_assoc_cmdid = WMI_10_4_PEER_ASSOC_CMDID,
569*4882a593Smuzhiyun .peer_add_wds_entry_cmdid = WMI_10_4_PEER_ADD_WDS_ENTRY_CMDID,
570*4882a593Smuzhiyun .peer_remove_wds_entry_cmdid = WMI_10_4_PEER_REMOVE_WDS_ENTRY_CMDID,
571*4882a593Smuzhiyun .peer_mcast_group_cmdid = WMI_10_4_PEER_MCAST_GROUP_CMDID,
572*4882a593Smuzhiyun .bcn_tx_cmdid = WMI_10_4_BCN_TX_CMDID,
573*4882a593Smuzhiyun .pdev_send_bcn_cmdid = WMI_10_4_PDEV_SEND_BCN_CMDID,
574*4882a593Smuzhiyun .bcn_tmpl_cmdid = WMI_10_4_BCN_PRB_TMPL_CMDID,
575*4882a593Smuzhiyun .bcn_filter_rx_cmdid = WMI_10_4_BCN_FILTER_RX_CMDID,
576*4882a593Smuzhiyun .prb_req_filter_rx_cmdid = WMI_10_4_PRB_REQ_FILTER_RX_CMDID,
577*4882a593Smuzhiyun .mgmt_tx_cmdid = WMI_10_4_MGMT_TX_CMDID,
578*4882a593Smuzhiyun .prb_tmpl_cmdid = WMI_10_4_PRB_TMPL_CMDID,
579*4882a593Smuzhiyun .addba_clear_resp_cmdid = WMI_10_4_ADDBA_CLEAR_RESP_CMDID,
580*4882a593Smuzhiyun .addba_send_cmdid = WMI_10_4_ADDBA_SEND_CMDID,
581*4882a593Smuzhiyun .addba_status_cmdid = WMI_10_4_ADDBA_STATUS_CMDID,
582*4882a593Smuzhiyun .delba_send_cmdid = WMI_10_4_DELBA_SEND_CMDID,
583*4882a593Smuzhiyun .addba_set_resp_cmdid = WMI_10_4_ADDBA_SET_RESP_CMDID,
584*4882a593Smuzhiyun .send_singleamsdu_cmdid = WMI_10_4_SEND_SINGLEAMSDU_CMDID,
585*4882a593Smuzhiyun .sta_powersave_mode_cmdid = WMI_10_4_STA_POWERSAVE_MODE_CMDID,
586*4882a593Smuzhiyun .sta_powersave_param_cmdid = WMI_10_4_STA_POWERSAVE_PARAM_CMDID,
587*4882a593Smuzhiyun .sta_mimo_ps_mode_cmdid = WMI_10_4_STA_MIMO_PS_MODE_CMDID,
588*4882a593Smuzhiyun .pdev_dfs_enable_cmdid = WMI_10_4_PDEV_DFS_ENABLE_CMDID,
589*4882a593Smuzhiyun .pdev_dfs_disable_cmdid = WMI_10_4_PDEV_DFS_DISABLE_CMDID,
590*4882a593Smuzhiyun .roam_scan_mode = WMI_10_4_ROAM_SCAN_MODE,
591*4882a593Smuzhiyun .roam_scan_rssi_threshold = WMI_10_4_ROAM_SCAN_RSSI_THRESHOLD,
592*4882a593Smuzhiyun .roam_scan_period = WMI_10_4_ROAM_SCAN_PERIOD,
593*4882a593Smuzhiyun .roam_scan_rssi_change_threshold =
594*4882a593Smuzhiyun WMI_10_4_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
595*4882a593Smuzhiyun .roam_ap_profile = WMI_10_4_ROAM_AP_PROFILE,
596*4882a593Smuzhiyun .ofl_scan_add_ap_profile = WMI_10_4_OFL_SCAN_ADD_AP_PROFILE,
597*4882a593Smuzhiyun .ofl_scan_remove_ap_profile = WMI_10_4_OFL_SCAN_REMOVE_AP_PROFILE,
598*4882a593Smuzhiyun .ofl_scan_period = WMI_10_4_OFL_SCAN_PERIOD,
599*4882a593Smuzhiyun .p2p_dev_set_device_info = WMI_10_4_P2P_DEV_SET_DEVICE_INFO,
600*4882a593Smuzhiyun .p2p_dev_set_discoverability = WMI_10_4_P2P_DEV_SET_DISCOVERABILITY,
601*4882a593Smuzhiyun .p2p_go_set_beacon_ie = WMI_10_4_P2P_GO_SET_BEACON_IE,
602*4882a593Smuzhiyun .p2p_go_set_probe_resp_ie = WMI_10_4_P2P_GO_SET_PROBE_RESP_IE,
603*4882a593Smuzhiyun .p2p_set_vendor_ie_data_cmdid = WMI_10_4_P2P_SET_VENDOR_IE_DATA_CMDID,
604*4882a593Smuzhiyun .ap_ps_peer_param_cmdid = WMI_10_4_AP_PS_PEER_PARAM_CMDID,
605*4882a593Smuzhiyun .ap_ps_peer_uapsd_coex_cmdid = WMI_10_4_AP_PS_PEER_UAPSD_COEX_CMDID,
606*4882a593Smuzhiyun .peer_rate_retry_sched_cmdid = WMI_10_4_PEER_RATE_RETRY_SCHED_CMDID,
607*4882a593Smuzhiyun .wlan_profile_trigger_cmdid = WMI_10_4_WLAN_PROFILE_TRIGGER_CMDID,
608*4882a593Smuzhiyun .wlan_profile_set_hist_intvl_cmdid =
609*4882a593Smuzhiyun WMI_10_4_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
610*4882a593Smuzhiyun .wlan_profile_get_profile_data_cmdid =
611*4882a593Smuzhiyun WMI_10_4_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
612*4882a593Smuzhiyun .wlan_profile_enable_profile_id_cmdid =
613*4882a593Smuzhiyun WMI_10_4_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
614*4882a593Smuzhiyun .wlan_profile_list_profile_id_cmdid =
615*4882a593Smuzhiyun WMI_10_4_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
616*4882a593Smuzhiyun .pdev_suspend_cmdid = WMI_10_4_PDEV_SUSPEND_CMDID,
617*4882a593Smuzhiyun .pdev_resume_cmdid = WMI_10_4_PDEV_RESUME_CMDID,
618*4882a593Smuzhiyun .add_bcn_filter_cmdid = WMI_10_4_ADD_BCN_FILTER_CMDID,
619*4882a593Smuzhiyun .rmv_bcn_filter_cmdid = WMI_10_4_RMV_BCN_FILTER_CMDID,
620*4882a593Smuzhiyun .wow_add_wake_pattern_cmdid = WMI_10_4_WOW_ADD_WAKE_PATTERN_CMDID,
621*4882a593Smuzhiyun .wow_del_wake_pattern_cmdid = WMI_10_4_WOW_DEL_WAKE_PATTERN_CMDID,
622*4882a593Smuzhiyun .wow_enable_disable_wake_event_cmdid =
623*4882a593Smuzhiyun WMI_10_4_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
624*4882a593Smuzhiyun .wow_enable_cmdid = WMI_10_4_WOW_ENABLE_CMDID,
625*4882a593Smuzhiyun .wow_hostwakeup_from_sleep_cmdid =
626*4882a593Smuzhiyun WMI_10_4_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
627*4882a593Smuzhiyun .rtt_measreq_cmdid = WMI_10_4_RTT_MEASREQ_CMDID,
628*4882a593Smuzhiyun .rtt_tsf_cmdid = WMI_10_4_RTT_TSF_CMDID,
629*4882a593Smuzhiyun .vdev_spectral_scan_configure_cmdid =
630*4882a593Smuzhiyun WMI_10_4_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
631*4882a593Smuzhiyun .vdev_spectral_scan_enable_cmdid =
632*4882a593Smuzhiyun WMI_10_4_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
633*4882a593Smuzhiyun .request_stats_cmdid = WMI_10_4_REQUEST_STATS_CMDID,
634*4882a593Smuzhiyun .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
635*4882a593Smuzhiyun .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
636*4882a593Smuzhiyun .gtk_offload_cmdid = WMI_10_4_GTK_OFFLOAD_CMDID,
637*4882a593Smuzhiyun .csa_offload_enable_cmdid = WMI_10_4_CSA_OFFLOAD_ENABLE_CMDID,
638*4882a593Smuzhiyun .csa_offload_chanswitch_cmdid = WMI_10_4_CSA_OFFLOAD_CHANSWITCH_CMDID,
639*4882a593Smuzhiyun .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
640*4882a593Smuzhiyun .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
641*4882a593Smuzhiyun .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
642*4882a593Smuzhiyun .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
643*4882a593Smuzhiyun .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
644*4882a593Smuzhiyun .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
645*4882a593Smuzhiyun .echo_cmdid = WMI_10_4_ECHO_CMDID,
646*4882a593Smuzhiyun .pdev_utf_cmdid = WMI_10_4_PDEV_UTF_CMDID,
647*4882a593Smuzhiyun .dbglog_cfg_cmdid = WMI_10_4_DBGLOG_CFG_CMDID,
648*4882a593Smuzhiyun .pdev_qvit_cmdid = WMI_10_4_PDEV_QVIT_CMDID,
649*4882a593Smuzhiyun .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
650*4882a593Smuzhiyun .vdev_set_keepalive_cmdid = WMI_10_4_VDEV_SET_KEEPALIVE_CMDID,
651*4882a593Smuzhiyun .vdev_get_keepalive_cmdid = WMI_10_4_VDEV_GET_KEEPALIVE_CMDID,
652*4882a593Smuzhiyun .force_fw_hang_cmdid = WMI_10_4_FORCE_FW_HANG_CMDID,
653*4882a593Smuzhiyun .gpio_config_cmdid = WMI_10_4_GPIO_CONFIG_CMDID,
654*4882a593Smuzhiyun .gpio_output_cmdid = WMI_10_4_GPIO_OUTPUT_CMDID,
655*4882a593Smuzhiyun .pdev_get_temperature_cmdid = WMI_10_4_PDEV_GET_TEMPERATURE_CMDID,
656*4882a593Smuzhiyun .vdev_set_wmm_params_cmdid = WMI_CMD_UNSUPPORTED,
657*4882a593Smuzhiyun .adaptive_qcs_cmdid = WMI_CMD_UNSUPPORTED,
658*4882a593Smuzhiyun .scan_update_request_cmdid = WMI_10_4_SCAN_UPDATE_REQUEST_CMDID,
659*4882a593Smuzhiyun .vdev_standby_response_cmdid = WMI_10_4_VDEV_STANDBY_RESPONSE_CMDID,
660*4882a593Smuzhiyun .vdev_resume_response_cmdid = WMI_10_4_VDEV_RESUME_RESPONSE_CMDID,
661*4882a593Smuzhiyun .wlan_peer_caching_add_peer_cmdid =
662*4882a593Smuzhiyun WMI_10_4_WLAN_PEER_CACHING_ADD_PEER_CMDID,
663*4882a593Smuzhiyun .wlan_peer_caching_evict_peer_cmdid =
664*4882a593Smuzhiyun WMI_10_4_WLAN_PEER_CACHING_EVICT_PEER_CMDID,
665*4882a593Smuzhiyun .wlan_peer_caching_restore_peer_cmdid =
666*4882a593Smuzhiyun WMI_10_4_WLAN_PEER_CACHING_RESTORE_PEER_CMDID,
667*4882a593Smuzhiyun .wlan_peer_caching_print_all_peers_info_cmdid =
668*4882a593Smuzhiyun WMI_10_4_WLAN_PEER_CACHING_PRINT_ALL_PEERS_INFO_CMDID,
669*4882a593Smuzhiyun .peer_update_wds_entry_cmdid = WMI_10_4_PEER_UPDATE_WDS_ENTRY_CMDID,
670*4882a593Smuzhiyun .peer_add_proxy_sta_entry_cmdid =
671*4882a593Smuzhiyun WMI_10_4_PEER_ADD_PROXY_STA_ENTRY_CMDID,
672*4882a593Smuzhiyun .rtt_keepalive_cmdid = WMI_10_4_RTT_KEEPALIVE_CMDID,
673*4882a593Smuzhiyun .oem_req_cmdid = WMI_10_4_OEM_REQ_CMDID,
674*4882a593Smuzhiyun .nan_cmdid = WMI_10_4_NAN_CMDID,
675*4882a593Smuzhiyun .vdev_ratemask_cmdid = WMI_10_4_VDEV_RATEMASK_CMDID,
676*4882a593Smuzhiyun .qboost_cfg_cmdid = WMI_10_4_QBOOST_CFG_CMDID,
677*4882a593Smuzhiyun .pdev_smart_ant_enable_cmdid = WMI_10_4_PDEV_SMART_ANT_ENABLE_CMDID,
678*4882a593Smuzhiyun .pdev_smart_ant_set_rx_antenna_cmdid =
679*4882a593Smuzhiyun WMI_10_4_PDEV_SMART_ANT_SET_RX_ANTENNA_CMDID,
680*4882a593Smuzhiyun .peer_smart_ant_set_tx_antenna_cmdid =
681*4882a593Smuzhiyun WMI_10_4_PEER_SMART_ANT_SET_TX_ANTENNA_CMDID,
682*4882a593Smuzhiyun .peer_smart_ant_set_train_info_cmdid =
683*4882a593Smuzhiyun WMI_10_4_PEER_SMART_ANT_SET_TRAIN_INFO_CMDID,
684*4882a593Smuzhiyun .peer_smart_ant_set_node_config_ops_cmdid =
685*4882a593Smuzhiyun WMI_10_4_PEER_SMART_ANT_SET_NODE_CONFIG_OPS_CMDID,
686*4882a593Smuzhiyun .pdev_set_antenna_switch_table_cmdid =
687*4882a593Smuzhiyun WMI_10_4_PDEV_SET_ANTENNA_SWITCH_TABLE_CMDID,
688*4882a593Smuzhiyun .pdev_set_ctl_table_cmdid = WMI_10_4_PDEV_SET_CTL_TABLE_CMDID,
689*4882a593Smuzhiyun .pdev_set_mimogain_table_cmdid = WMI_10_4_PDEV_SET_MIMOGAIN_TABLE_CMDID,
690*4882a593Smuzhiyun .pdev_ratepwr_table_cmdid = WMI_10_4_PDEV_RATEPWR_TABLE_CMDID,
691*4882a593Smuzhiyun .pdev_ratepwr_chainmsk_table_cmdid =
692*4882a593Smuzhiyun WMI_10_4_PDEV_RATEPWR_CHAINMSK_TABLE_CMDID,
693*4882a593Smuzhiyun .pdev_fips_cmdid = WMI_10_4_PDEV_FIPS_CMDID,
694*4882a593Smuzhiyun .tt_set_conf_cmdid = WMI_10_4_TT_SET_CONF_CMDID,
695*4882a593Smuzhiyun .fwtest_cmdid = WMI_10_4_FWTEST_CMDID,
696*4882a593Smuzhiyun .vdev_atf_request_cmdid = WMI_10_4_VDEV_ATF_REQUEST_CMDID,
697*4882a593Smuzhiyun .peer_atf_request_cmdid = WMI_10_4_PEER_ATF_REQUEST_CMDID,
698*4882a593Smuzhiyun .pdev_get_ani_cck_config_cmdid = WMI_10_4_PDEV_GET_ANI_CCK_CONFIG_CMDID,
699*4882a593Smuzhiyun .pdev_get_ani_ofdm_config_cmdid =
700*4882a593Smuzhiyun WMI_10_4_PDEV_GET_ANI_OFDM_CONFIG_CMDID,
701*4882a593Smuzhiyun .pdev_reserve_ast_entry_cmdid = WMI_10_4_PDEV_RESERVE_AST_ENTRY_CMDID,
702*4882a593Smuzhiyun .pdev_get_nfcal_power_cmdid = WMI_10_4_PDEV_GET_NFCAL_POWER_CMDID,
703*4882a593Smuzhiyun .pdev_get_tpc_cmdid = WMI_10_4_PDEV_GET_TPC_CMDID,
704*4882a593Smuzhiyun .pdev_get_ast_info_cmdid = WMI_10_4_PDEV_GET_AST_INFO_CMDID,
705*4882a593Smuzhiyun .vdev_set_dscp_tid_map_cmdid = WMI_10_4_VDEV_SET_DSCP_TID_MAP_CMDID,
706*4882a593Smuzhiyun .pdev_get_info_cmdid = WMI_10_4_PDEV_GET_INFO_CMDID,
707*4882a593Smuzhiyun .vdev_get_info_cmdid = WMI_10_4_VDEV_GET_INFO_CMDID,
708*4882a593Smuzhiyun .vdev_filter_neighbor_rx_packets_cmdid =
709*4882a593Smuzhiyun WMI_10_4_VDEV_FILTER_NEIGHBOR_RX_PACKETS_CMDID,
710*4882a593Smuzhiyun .mu_cal_start_cmdid = WMI_10_4_MU_CAL_START_CMDID,
711*4882a593Smuzhiyun .set_cca_params_cmdid = WMI_10_4_SET_CCA_PARAMS_CMDID,
712*4882a593Smuzhiyun .pdev_bss_chan_info_request_cmdid =
713*4882a593Smuzhiyun WMI_10_4_PDEV_BSS_CHAN_INFO_REQUEST_CMDID,
714*4882a593Smuzhiyun .ext_resource_cfg_cmdid = WMI_10_4_EXT_RESOURCE_CFG_CMDID,
715*4882a593Smuzhiyun .vdev_set_ie_cmdid = WMI_10_4_VDEV_SET_IE_CMDID,
716*4882a593Smuzhiyun .set_lteu_config_cmdid = WMI_10_4_SET_LTEU_CONFIG_CMDID,
717*4882a593Smuzhiyun .atf_ssid_grouping_request_cmdid =
718*4882a593Smuzhiyun WMI_10_4_ATF_SSID_GROUPING_REQUEST_CMDID,
719*4882a593Smuzhiyun .peer_atf_ext_request_cmdid = WMI_10_4_PEER_ATF_EXT_REQUEST_CMDID,
720*4882a593Smuzhiyun .set_periodic_channel_stats_cfg_cmdid =
721*4882a593Smuzhiyun WMI_10_4_SET_PERIODIC_CHANNEL_STATS_CONFIG,
722*4882a593Smuzhiyun .peer_bwf_request_cmdid = WMI_10_4_PEER_BWF_REQUEST_CMDID,
723*4882a593Smuzhiyun .btcoex_cfg_cmdid = WMI_10_4_BTCOEX_CFG_CMDID,
724*4882a593Smuzhiyun .peer_tx_mu_txmit_count_cmdid = WMI_10_4_PEER_TX_MU_TXMIT_COUNT_CMDID,
725*4882a593Smuzhiyun .peer_tx_mu_txmit_rstcnt_cmdid = WMI_10_4_PEER_TX_MU_TXMIT_RSTCNT_CMDID,
726*4882a593Smuzhiyun .peer_gid_userpos_list_cmdid = WMI_10_4_PEER_GID_USERPOS_LIST_CMDID,
727*4882a593Smuzhiyun .pdev_check_cal_version_cmdid = WMI_10_4_PDEV_CHECK_CAL_VERSION_CMDID,
728*4882a593Smuzhiyun .coex_version_cfg_cmid = WMI_10_4_COEX_VERSION_CFG_CMID,
729*4882a593Smuzhiyun .pdev_get_rx_filter_cmdid = WMI_10_4_PDEV_GET_RX_FILTER_CMDID,
730*4882a593Smuzhiyun .pdev_extended_nss_cfg_cmdid = WMI_10_4_PDEV_EXTENDED_NSS_CFG_CMDID,
731*4882a593Smuzhiyun .vdev_set_scan_nac_rssi_cmdid = WMI_10_4_VDEV_SET_SCAN_NAC_RSSI_CMDID,
732*4882a593Smuzhiyun .prog_gpio_band_select_cmdid = WMI_10_4_PROG_GPIO_BAND_SELECT_CMDID,
733*4882a593Smuzhiyun .config_smart_logging_cmdid = WMI_10_4_CONFIG_SMART_LOGGING_CMDID,
734*4882a593Smuzhiyun .debug_fatal_condition_cmdid = WMI_10_4_DEBUG_FATAL_CONDITION_CMDID,
735*4882a593Smuzhiyun .get_tsf_timer_cmdid = WMI_10_4_GET_TSF_TIMER_CMDID,
736*4882a593Smuzhiyun .pdev_get_tpc_table_cmdid = WMI_10_4_PDEV_GET_TPC_TABLE_CMDID,
737*4882a593Smuzhiyun .vdev_sifs_trigger_time_cmdid = WMI_10_4_VDEV_SIFS_TRIGGER_TIME_CMDID,
738*4882a593Smuzhiyun .pdev_wds_entry_list_cmdid = WMI_10_4_PDEV_WDS_ENTRY_LIST_CMDID,
739*4882a593Smuzhiyun .tdls_set_state_cmdid = WMI_10_4_TDLS_SET_STATE_CMDID,
740*4882a593Smuzhiyun .tdls_peer_update_cmdid = WMI_10_4_TDLS_PEER_UPDATE_CMDID,
741*4882a593Smuzhiyun .tdls_set_offchan_mode_cmdid = WMI_10_4_TDLS_SET_OFFCHAN_MODE_CMDID,
742*4882a593Smuzhiyun .radar_found_cmdid = WMI_10_4_RADAR_FOUND_CMDID,
743*4882a593Smuzhiyun .per_peer_per_tid_config_cmdid = WMI_10_4_PER_PEER_PER_TID_CONFIG_CMDID,
744*4882a593Smuzhiyun };
745*4882a593Smuzhiyun
746*4882a593Smuzhiyun static struct wmi_peer_param_map wmi_peer_param_map = {
747*4882a593Smuzhiyun .smps_state = WMI_PEER_SMPS_STATE,
748*4882a593Smuzhiyun .ampdu = WMI_PEER_AMPDU,
749*4882a593Smuzhiyun .authorize = WMI_PEER_AUTHORIZE,
750*4882a593Smuzhiyun .chan_width = WMI_PEER_CHAN_WIDTH,
751*4882a593Smuzhiyun .nss = WMI_PEER_NSS,
752*4882a593Smuzhiyun .use_4addr = WMI_PEER_USE_4ADDR,
753*4882a593Smuzhiyun .use_fixed_power = WMI_PEER_USE_FIXED_PWR,
754*4882a593Smuzhiyun .debug = WMI_PEER_DEBUG,
755*4882a593Smuzhiyun .phymode = WMI_PEER_PHYMODE,
756*4882a593Smuzhiyun .dummy_var = WMI_PEER_DUMMY_VAR,
757*4882a593Smuzhiyun };
758*4882a593Smuzhiyun
759*4882a593Smuzhiyun /* MAIN WMI VDEV param map */
760*4882a593Smuzhiyun static struct wmi_vdev_param_map wmi_vdev_param_map = {
761*4882a593Smuzhiyun .rts_threshold = WMI_VDEV_PARAM_RTS_THRESHOLD,
762*4882a593Smuzhiyun .fragmentation_threshold = WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
763*4882a593Smuzhiyun .beacon_interval = WMI_VDEV_PARAM_BEACON_INTERVAL,
764*4882a593Smuzhiyun .listen_interval = WMI_VDEV_PARAM_LISTEN_INTERVAL,
765*4882a593Smuzhiyun .multicast_rate = WMI_VDEV_PARAM_MULTICAST_RATE,
766*4882a593Smuzhiyun .mgmt_tx_rate = WMI_VDEV_PARAM_MGMT_TX_RATE,
767*4882a593Smuzhiyun .slot_time = WMI_VDEV_PARAM_SLOT_TIME,
768*4882a593Smuzhiyun .preamble = WMI_VDEV_PARAM_PREAMBLE,
769*4882a593Smuzhiyun .swba_time = WMI_VDEV_PARAM_SWBA_TIME,
770*4882a593Smuzhiyun .wmi_vdev_stats_update_period = WMI_VDEV_STATS_UPDATE_PERIOD,
771*4882a593Smuzhiyun .wmi_vdev_pwrsave_ageout_time = WMI_VDEV_PWRSAVE_AGEOUT_TIME,
772*4882a593Smuzhiyun .wmi_vdev_host_swba_interval = WMI_VDEV_HOST_SWBA_INTERVAL,
773*4882a593Smuzhiyun .dtim_period = WMI_VDEV_PARAM_DTIM_PERIOD,
774*4882a593Smuzhiyun .wmi_vdev_oc_scheduler_air_time_limit =
775*4882a593Smuzhiyun WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
776*4882a593Smuzhiyun .wds = WMI_VDEV_PARAM_WDS,
777*4882a593Smuzhiyun .atim_window = WMI_VDEV_PARAM_ATIM_WINDOW,
778*4882a593Smuzhiyun .bmiss_count_max = WMI_VDEV_PARAM_BMISS_COUNT_MAX,
779*4882a593Smuzhiyun .bmiss_first_bcnt = WMI_VDEV_PARAM_BMISS_FIRST_BCNT,
780*4882a593Smuzhiyun .bmiss_final_bcnt = WMI_VDEV_PARAM_BMISS_FINAL_BCNT,
781*4882a593Smuzhiyun .feature_wmm = WMI_VDEV_PARAM_FEATURE_WMM,
782*4882a593Smuzhiyun .chwidth = WMI_VDEV_PARAM_CHWIDTH,
783*4882a593Smuzhiyun .chextoffset = WMI_VDEV_PARAM_CHEXTOFFSET,
784*4882a593Smuzhiyun .disable_htprotection = WMI_VDEV_PARAM_DISABLE_HTPROTECTION,
785*4882a593Smuzhiyun .sta_quickkickout = WMI_VDEV_PARAM_STA_QUICKKICKOUT,
786*4882a593Smuzhiyun .mgmt_rate = WMI_VDEV_PARAM_MGMT_RATE,
787*4882a593Smuzhiyun .protection_mode = WMI_VDEV_PARAM_PROTECTION_MODE,
788*4882a593Smuzhiyun .fixed_rate = WMI_VDEV_PARAM_FIXED_RATE,
789*4882a593Smuzhiyun .sgi = WMI_VDEV_PARAM_SGI,
790*4882a593Smuzhiyun .ldpc = WMI_VDEV_PARAM_LDPC,
791*4882a593Smuzhiyun .tx_stbc = WMI_VDEV_PARAM_TX_STBC,
792*4882a593Smuzhiyun .rx_stbc = WMI_VDEV_PARAM_RX_STBC,
793*4882a593Smuzhiyun .intra_bss_fwd = WMI_VDEV_PARAM_INTRA_BSS_FWD,
794*4882a593Smuzhiyun .def_keyid = WMI_VDEV_PARAM_DEF_KEYID,
795*4882a593Smuzhiyun .nss = WMI_VDEV_PARAM_NSS,
796*4882a593Smuzhiyun .bcast_data_rate = WMI_VDEV_PARAM_BCAST_DATA_RATE,
797*4882a593Smuzhiyun .mcast_data_rate = WMI_VDEV_PARAM_MCAST_DATA_RATE,
798*4882a593Smuzhiyun .mcast_indicate = WMI_VDEV_PARAM_MCAST_INDICATE,
799*4882a593Smuzhiyun .dhcp_indicate = WMI_VDEV_PARAM_DHCP_INDICATE,
800*4882a593Smuzhiyun .unknown_dest_indicate = WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
801*4882a593Smuzhiyun .ap_keepalive_min_idle_inactive_time_secs =
802*4882a593Smuzhiyun WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
803*4882a593Smuzhiyun .ap_keepalive_max_idle_inactive_time_secs =
804*4882a593Smuzhiyun WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
805*4882a593Smuzhiyun .ap_keepalive_max_unresponsive_time_secs =
806*4882a593Smuzhiyun WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
807*4882a593Smuzhiyun .ap_enable_nawds = WMI_VDEV_PARAM_AP_ENABLE_NAWDS,
808*4882a593Smuzhiyun .mcast2ucast_set = WMI_VDEV_PARAM_UNSUPPORTED,
809*4882a593Smuzhiyun .enable_rtscts = WMI_VDEV_PARAM_ENABLE_RTSCTS,
810*4882a593Smuzhiyun .txbf = WMI_VDEV_PARAM_TXBF,
811*4882a593Smuzhiyun .packet_powersave = WMI_VDEV_PARAM_PACKET_POWERSAVE,
812*4882a593Smuzhiyun .drop_unencry = WMI_VDEV_PARAM_DROP_UNENCRY,
813*4882a593Smuzhiyun .tx_encap_type = WMI_VDEV_PARAM_TX_ENCAP_TYPE,
814*4882a593Smuzhiyun .ap_detect_out_of_sync_sleeping_sta_time_secs =
815*4882a593Smuzhiyun WMI_VDEV_PARAM_UNSUPPORTED,
816*4882a593Smuzhiyun .rc_num_retries = WMI_VDEV_PARAM_UNSUPPORTED,
817*4882a593Smuzhiyun .cabq_maxdur = WMI_VDEV_PARAM_UNSUPPORTED,
818*4882a593Smuzhiyun .mfptest_set = WMI_VDEV_PARAM_UNSUPPORTED,
819*4882a593Smuzhiyun .rts_fixed_rate = WMI_VDEV_PARAM_UNSUPPORTED,
820*4882a593Smuzhiyun .vht_sgimask = WMI_VDEV_PARAM_UNSUPPORTED,
821*4882a593Smuzhiyun .vht80_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
822*4882a593Smuzhiyun .early_rx_adjust_enable = WMI_VDEV_PARAM_UNSUPPORTED,
823*4882a593Smuzhiyun .early_rx_tgt_bmiss_num = WMI_VDEV_PARAM_UNSUPPORTED,
824*4882a593Smuzhiyun .early_rx_bmiss_sample_cycle = WMI_VDEV_PARAM_UNSUPPORTED,
825*4882a593Smuzhiyun .early_rx_slop_step = WMI_VDEV_PARAM_UNSUPPORTED,
826*4882a593Smuzhiyun .early_rx_init_slop = WMI_VDEV_PARAM_UNSUPPORTED,
827*4882a593Smuzhiyun .early_rx_adjust_pause = WMI_VDEV_PARAM_UNSUPPORTED,
828*4882a593Smuzhiyun .proxy_sta = WMI_VDEV_PARAM_UNSUPPORTED,
829*4882a593Smuzhiyun .meru_vc = WMI_VDEV_PARAM_UNSUPPORTED,
830*4882a593Smuzhiyun .rx_decap_type = WMI_VDEV_PARAM_UNSUPPORTED,
831*4882a593Smuzhiyun .bw_nss_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
832*4882a593Smuzhiyun .disable_4addr_src_lrn = WMI_VDEV_PARAM_UNSUPPORTED,
833*4882a593Smuzhiyun .rtt_responder_role = WMI_VDEV_PARAM_UNSUPPORTED,
834*4882a593Smuzhiyun };
835*4882a593Smuzhiyun
836*4882a593Smuzhiyun /* 10.X WMI VDEV param map */
837*4882a593Smuzhiyun static struct wmi_vdev_param_map wmi_10x_vdev_param_map = {
838*4882a593Smuzhiyun .rts_threshold = WMI_10X_VDEV_PARAM_RTS_THRESHOLD,
839*4882a593Smuzhiyun .fragmentation_threshold = WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
840*4882a593Smuzhiyun .beacon_interval = WMI_10X_VDEV_PARAM_BEACON_INTERVAL,
841*4882a593Smuzhiyun .listen_interval = WMI_10X_VDEV_PARAM_LISTEN_INTERVAL,
842*4882a593Smuzhiyun .multicast_rate = WMI_10X_VDEV_PARAM_MULTICAST_RATE,
843*4882a593Smuzhiyun .mgmt_tx_rate = WMI_10X_VDEV_PARAM_MGMT_TX_RATE,
844*4882a593Smuzhiyun .slot_time = WMI_10X_VDEV_PARAM_SLOT_TIME,
845*4882a593Smuzhiyun .preamble = WMI_10X_VDEV_PARAM_PREAMBLE,
846*4882a593Smuzhiyun .swba_time = WMI_10X_VDEV_PARAM_SWBA_TIME,
847*4882a593Smuzhiyun .wmi_vdev_stats_update_period = WMI_10X_VDEV_STATS_UPDATE_PERIOD,
848*4882a593Smuzhiyun .wmi_vdev_pwrsave_ageout_time = WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME,
849*4882a593Smuzhiyun .wmi_vdev_host_swba_interval = WMI_10X_VDEV_HOST_SWBA_INTERVAL,
850*4882a593Smuzhiyun .dtim_period = WMI_10X_VDEV_PARAM_DTIM_PERIOD,
851*4882a593Smuzhiyun .wmi_vdev_oc_scheduler_air_time_limit =
852*4882a593Smuzhiyun WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
853*4882a593Smuzhiyun .wds = WMI_10X_VDEV_PARAM_WDS,
854*4882a593Smuzhiyun .atim_window = WMI_10X_VDEV_PARAM_ATIM_WINDOW,
855*4882a593Smuzhiyun .bmiss_count_max = WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX,
856*4882a593Smuzhiyun .bmiss_first_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
857*4882a593Smuzhiyun .bmiss_final_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
858*4882a593Smuzhiyun .feature_wmm = WMI_10X_VDEV_PARAM_FEATURE_WMM,
859*4882a593Smuzhiyun .chwidth = WMI_10X_VDEV_PARAM_CHWIDTH,
860*4882a593Smuzhiyun .chextoffset = WMI_10X_VDEV_PARAM_CHEXTOFFSET,
861*4882a593Smuzhiyun .disable_htprotection = WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION,
862*4882a593Smuzhiyun .sta_quickkickout = WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT,
863*4882a593Smuzhiyun .mgmt_rate = WMI_10X_VDEV_PARAM_MGMT_RATE,
864*4882a593Smuzhiyun .protection_mode = WMI_10X_VDEV_PARAM_PROTECTION_MODE,
865*4882a593Smuzhiyun .fixed_rate = WMI_10X_VDEV_PARAM_FIXED_RATE,
866*4882a593Smuzhiyun .sgi = WMI_10X_VDEV_PARAM_SGI,
867*4882a593Smuzhiyun .ldpc = WMI_10X_VDEV_PARAM_LDPC,
868*4882a593Smuzhiyun .tx_stbc = WMI_10X_VDEV_PARAM_TX_STBC,
869*4882a593Smuzhiyun .rx_stbc = WMI_10X_VDEV_PARAM_RX_STBC,
870*4882a593Smuzhiyun .intra_bss_fwd = WMI_10X_VDEV_PARAM_INTRA_BSS_FWD,
871*4882a593Smuzhiyun .def_keyid = WMI_10X_VDEV_PARAM_DEF_KEYID,
872*4882a593Smuzhiyun .nss = WMI_10X_VDEV_PARAM_NSS,
873*4882a593Smuzhiyun .bcast_data_rate = WMI_10X_VDEV_PARAM_BCAST_DATA_RATE,
874*4882a593Smuzhiyun .mcast_data_rate = WMI_10X_VDEV_PARAM_MCAST_DATA_RATE,
875*4882a593Smuzhiyun .mcast_indicate = WMI_10X_VDEV_PARAM_MCAST_INDICATE,
876*4882a593Smuzhiyun .dhcp_indicate = WMI_10X_VDEV_PARAM_DHCP_INDICATE,
877*4882a593Smuzhiyun .unknown_dest_indicate = WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
878*4882a593Smuzhiyun .ap_keepalive_min_idle_inactive_time_secs =
879*4882a593Smuzhiyun WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
880*4882a593Smuzhiyun .ap_keepalive_max_idle_inactive_time_secs =
881*4882a593Smuzhiyun WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
882*4882a593Smuzhiyun .ap_keepalive_max_unresponsive_time_secs =
883*4882a593Smuzhiyun WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
884*4882a593Smuzhiyun .ap_enable_nawds = WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS,
885*4882a593Smuzhiyun .mcast2ucast_set = WMI_10X_VDEV_PARAM_MCAST2UCAST_SET,
886*4882a593Smuzhiyun .enable_rtscts = WMI_10X_VDEV_PARAM_ENABLE_RTSCTS,
887*4882a593Smuzhiyun .txbf = WMI_VDEV_PARAM_UNSUPPORTED,
888*4882a593Smuzhiyun .packet_powersave = WMI_VDEV_PARAM_UNSUPPORTED,
889*4882a593Smuzhiyun .drop_unencry = WMI_VDEV_PARAM_UNSUPPORTED,
890*4882a593Smuzhiyun .tx_encap_type = WMI_VDEV_PARAM_UNSUPPORTED,
891*4882a593Smuzhiyun .ap_detect_out_of_sync_sleeping_sta_time_secs =
892*4882a593Smuzhiyun WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
893*4882a593Smuzhiyun .rc_num_retries = WMI_VDEV_PARAM_UNSUPPORTED,
894*4882a593Smuzhiyun .cabq_maxdur = WMI_VDEV_PARAM_UNSUPPORTED,
895*4882a593Smuzhiyun .mfptest_set = WMI_VDEV_PARAM_UNSUPPORTED,
896*4882a593Smuzhiyun .rts_fixed_rate = WMI_VDEV_PARAM_UNSUPPORTED,
897*4882a593Smuzhiyun .vht_sgimask = WMI_VDEV_PARAM_UNSUPPORTED,
898*4882a593Smuzhiyun .vht80_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
899*4882a593Smuzhiyun .early_rx_adjust_enable = WMI_VDEV_PARAM_UNSUPPORTED,
900*4882a593Smuzhiyun .early_rx_tgt_bmiss_num = WMI_VDEV_PARAM_UNSUPPORTED,
901*4882a593Smuzhiyun .early_rx_bmiss_sample_cycle = WMI_VDEV_PARAM_UNSUPPORTED,
902*4882a593Smuzhiyun .early_rx_slop_step = WMI_VDEV_PARAM_UNSUPPORTED,
903*4882a593Smuzhiyun .early_rx_init_slop = WMI_VDEV_PARAM_UNSUPPORTED,
904*4882a593Smuzhiyun .early_rx_adjust_pause = WMI_VDEV_PARAM_UNSUPPORTED,
905*4882a593Smuzhiyun .proxy_sta = WMI_VDEV_PARAM_UNSUPPORTED,
906*4882a593Smuzhiyun .meru_vc = WMI_VDEV_PARAM_UNSUPPORTED,
907*4882a593Smuzhiyun .rx_decap_type = WMI_VDEV_PARAM_UNSUPPORTED,
908*4882a593Smuzhiyun .bw_nss_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
909*4882a593Smuzhiyun .disable_4addr_src_lrn = WMI_VDEV_PARAM_UNSUPPORTED,
910*4882a593Smuzhiyun .rtt_responder_role = WMI_VDEV_PARAM_UNSUPPORTED,
911*4882a593Smuzhiyun };
912*4882a593Smuzhiyun
913*4882a593Smuzhiyun static struct wmi_vdev_param_map wmi_10_2_4_vdev_param_map = {
914*4882a593Smuzhiyun .rts_threshold = WMI_10X_VDEV_PARAM_RTS_THRESHOLD,
915*4882a593Smuzhiyun .fragmentation_threshold = WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
916*4882a593Smuzhiyun .beacon_interval = WMI_10X_VDEV_PARAM_BEACON_INTERVAL,
917*4882a593Smuzhiyun .listen_interval = WMI_10X_VDEV_PARAM_LISTEN_INTERVAL,
918*4882a593Smuzhiyun .multicast_rate = WMI_10X_VDEV_PARAM_MULTICAST_RATE,
919*4882a593Smuzhiyun .mgmt_tx_rate = WMI_10X_VDEV_PARAM_MGMT_TX_RATE,
920*4882a593Smuzhiyun .slot_time = WMI_10X_VDEV_PARAM_SLOT_TIME,
921*4882a593Smuzhiyun .preamble = WMI_10X_VDEV_PARAM_PREAMBLE,
922*4882a593Smuzhiyun .swba_time = WMI_10X_VDEV_PARAM_SWBA_TIME,
923*4882a593Smuzhiyun .wmi_vdev_stats_update_period = WMI_10X_VDEV_STATS_UPDATE_PERIOD,
924*4882a593Smuzhiyun .wmi_vdev_pwrsave_ageout_time = WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME,
925*4882a593Smuzhiyun .wmi_vdev_host_swba_interval = WMI_10X_VDEV_HOST_SWBA_INTERVAL,
926*4882a593Smuzhiyun .dtim_period = WMI_10X_VDEV_PARAM_DTIM_PERIOD,
927*4882a593Smuzhiyun .wmi_vdev_oc_scheduler_air_time_limit =
928*4882a593Smuzhiyun WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
929*4882a593Smuzhiyun .wds = WMI_10X_VDEV_PARAM_WDS,
930*4882a593Smuzhiyun .atim_window = WMI_10X_VDEV_PARAM_ATIM_WINDOW,
931*4882a593Smuzhiyun .bmiss_count_max = WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX,
932*4882a593Smuzhiyun .bmiss_first_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
933*4882a593Smuzhiyun .bmiss_final_bcnt = WMI_VDEV_PARAM_UNSUPPORTED,
934*4882a593Smuzhiyun .feature_wmm = WMI_10X_VDEV_PARAM_FEATURE_WMM,
935*4882a593Smuzhiyun .chwidth = WMI_10X_VDEV_PARAM_CHWIDTH,
936*4882a593Smuzhiyun .chextoffset = WMI_10X_VDEV_PARAM_CHEXTOFFSET,
937*4882a593Smuzhiyun .disable_htprotection = WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION,
938*4882a593Smuzhiyun .sta_quickkickout = WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT,
939*4882a593Smuzhiyun .mgmt_rate = WMI_10X_VDEV_PARAM_MGMT_RATE,
940*4882a593Smuzhiyun .protection_mode = WMI_10X_VDEV_PARAM_PROTECTION_MODE,
941*4882a593Smuzhiyun .fixed_rate = WMI_10X_VDEV_PARAM_FIXED_RATE,
942*4882a593Smuzhiyun .sgi = WMI_10X_VDEV_PARAM_SGI,
943*4882a593Smuzhiyun .ldpc = WMI_10X_VDEV_PARAM_LDPC,
944*4882a593Smuzhiyun .tx_stbc = WMI_10X_VDEV_PARAM_TX_STBC,
945*4882a593Smuzhiyun .rx_stbc = WMI_10X_VDEV_PARAM_RX_STBC,
946*4882a593Smuzhiyun .intra_bss_fwd = WMI_10X_VDEV_PARAM_INTRA_BSS_FWD,
947*4882a593Smuzhiyun .def_keyid = WMI_10X_VDEV_PARAM_DEF_KEYID,
948*4882a593Smuzhiyun .nss = WMI_10X_VDEV_PARAM_NSS,
949*4882a593Smuzhiyun .bcast_data_rate = WMI_10X_VDEV_PARAM_BCAST_DATA_RATE,
950*4882a593Smuzhiyun .mcast_data_rate = WMI_10X_VDEV_PARAM_MCAST_DATA_RATE,
951*4882a593Smuzhiyun .mcast_indicate = WMI_10X_VDEV_PARAM_MCAST_INDICATE,
952*4882a593Smuzhiyun .dhcp_indicate = WMI_10X_VDEV_PARAM_DHCP_INDICATE,
953*4882a593Smuzhiyun .unknown_dest_indicate = WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
954*4882a593Smuzhiyun .ap_keepalive_min_idle_inactive_time_secs =
955*4882a593Smuzhiyun WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
956*4882a593Smuzhiyun .ap_keepalive_max_idle_inactive_time_secs =
957*4882a593Smuzhiyun WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
958*4882a593Smuzhiyun .ap_keepalive_max_unresponsive_time_secs =
959*4882a593Smuzhiyun WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
960*4882a593Smuzhiyun .ap_enable_nawds = WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS,
961*4882a593Smuzhiyun .mcast2ucast_set = WMI_10X_VDEV_PARAM_MCAST2UCAST_SET,
962*4882a593Smuzhiyun .enable_rtscts = WMI_10X_VDEV_PARAM_ENABLE_RTSCTS,
963*4882a593Smuzhiyun .txbf = WMI_VDEV_PARAM_UNSUPPORTED,
964*4882a593Smuzhiyun .packet_powersave = WMI_VDEV_PARAM_UNSUPPORTED,
965*4882a593Smuzhiyun .drop_unencry = WMI_VDEV_PARAM_UNSUPPORTED,
966*4882a593Smuzhiyun .tx_encap_type = WMI_VDEV_PARAM_UNSUPPORTED,
967*4882a593Smuzhiyun .ap_detect_out_of_sync_sleeping_sta_time_secs =
968*4882a593Smuzhiyun WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
969*4882a593Smuzhiyun .rc_num_retries = WMI_VDEV_PARAM_UNSUPPORTED,
970*4882a593Smuzhiyun .cabq_maxdur = WMI_VDEV_PARAM_UNSUPPORTED,
971*4882a593Smuzhiyun .mfptest_set = WMI_VDEV_PARAM_UNSUPPORTED,
972*4882a593Smuzhiyun .rts_fixed_rate = WMI_VDEV_PARAM_UNSUPPORTED,
973*4882a593Smuzhiyun .vht_sgimask = WMI_VDEV_PARAM_UNSUPPORTED,
974*4882a593Smuzhiyun .vht80_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
975*4882a593Smuzhiyun .early_rx_adjust_enable = WMI_VDEV_PARAM_UNSUPPORTED,
976*4882a593Smuzhiyun .early_rx_tgt_bmiss_num = WMI_VDEV_PARAM_UNSUPPORTED,
977*4882a593Smuzhiyun .early_rx_bmiss_sample_cycle = WMI_VDEV_PARAM_UNSUPPORTED,
978*4882a593Smuzhiyun .early_rx_slop_step = WMI_VDEV_PARAM_UNSUPPORTED,
979*4882a593Smuzhiyun .early_rx_init_slop = WMI_VDEV_PARAM_UNSUPPORTED,
980*4882a593Smuzhiyun .early_rx_adjust_pause = WMI_VDEV_PARAM_UNSUPPORTED,
981*4882a593Smuzhiyun .proxy_sta = WMI_VDEV_PARAM_UNSUPPORTED,
982*4882a593Smuzhiyun .meru_vc = WMI_VDEV_PARAM_UNSUPPORTED,
983*4882a593Smuzhiyun .rx_decap_type = WMI_VDEV_PARAM_UNSUPPORTED,
984*4882a593Smuzhiyun .bw_nss_ratemask = WMI_VDEV_PARAM_UNSUPPORTED,
985*4882a593Smuzhiyun .disable_4addr_src_lrn = WMI_VDEV_PARAM_UNSUPPORTED,
986*4882a593Smuzhiyun .rtt_responder_role = WMI_VDEV_PARAM_UNSUPPORTED,
987*4882a593Smuzhiyun };
988*4882a593Smuzhiyun
989*4882a593Smuzhiyun static struct wmi_vdev_param_map wmi_10_4_vdev_param_map = {
990*4882a593Smuzhiyun .rts_threshold = WMI_10_4_VDEV_PARAM_RTS_THRESHOLD,
991*4882a593Smuzhiyun .fragmentation_threshold = WMI_10_4_VDEV_PARAM_FRAGMENTATION_THRESHOLD,
992*4882a593Smuzhiyun .beacon_interval = WMI_10_4_VDEV_PARAM_BEACON_INTERVAL,
993*4882a593Smuzhiyun .listen_interval = WMI_10_4_VDEV_PARAM_LISTEN_INTERVAL,
994*4882a593Smuzhiyun .multicast_rate = WMI_10_4_VDEV_PARAM_MULTICAST_RATE,
995*4882a593Smuzhiyun .mgmt_tx_rate = WMI_10_4_VDEV_PARAM_MGMT_TX_RATE,
996*4882a593Smuzhiyun .slot_time = WMI_10_4_VDEV_PARAM_SLOT_TIME,
997*4882a593Smuzhiyun .preamble = WMI_10_4_VDEV_PARAM_PREAMBLE,
998*4882a593Smuzhiyun .swba_time = WMI_10_4_VDEV_PARAM_SWBA_TIME,
999*4882a593Smuzhiyun .wmi_vdev_stats_update_period = WMI_10_4_VDEV_STATS_UPDATE_PERIOD,
1000*4882a593Smuzhiyun .wmi_vdev_pwrsave_ageout_time = WMI_10_4_VDEV_PWRSAVE_AGEOUT_TIME,
1001*4882a593Smuzhiyun .wmi_vdev_host_swba_interval = WMI_10_4_VDEV_HOST_SWBA_INTERVAL,
1002*4882a593Smuzhiyun .dtim_period = WMI_10_4_VDEV_PARAM_DTIM_PERIOD,
1003*4882a593Smuzhiyun .wmi_vdev_oc_scheduler_air_time_limit =
1004*4882a593Smuzhiyun WMI_10_4_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT,
1005*4882a593Smuzhiyun .wds = WMI_10_4_VDEV_PARAM_WDS,
1006*4882a593Smuzhiyun .atim_window = WMI_10_4_VDEV_PARAM_ATIM_WINDOW,
1007*4882a593Smuzhiyun .bmiss_count_max = WMI_10_4_VDEV_PARAM_BMISS_COUNT_MAX,
1008*4882a593Smuzhiyun .bmiss_first_bcnt = WMI_10_4_VDEV_PARAM_BMISS_FIRST_BCNT,
1009*4882a593Smuzhiyun .bmiss_final_bcnt = WMI_10_4_VDEV_PARAM_BMISS_FINAL_BCNT,
1010*4882a593Smuzhiyun .feature_wmm = WMI_10_4_VDEV_PARAM_FEATURE_WMM,
1011*4882a593Smuzhiyun .chwidth = WMI_10_4_VDEV_PARAM_CHWIDTH,
1012*4882a593Smuzhiyun .chextoffset = WMI_10_4_VDEV_PARAM_CHEXTOFFSET,
1013*4882a593Smuzhiyun .disable_htprotection = WMI_10_4_VDEV_PARAM_DISABLE_HTPROTECTION,
1014*4882a593Smuzhiyun .sta_quickkickout = WMI_10_4_VDEV_PARAM_STA_QUICKKICKOUT,
1015*4882a593Smuzhiyun .mgmt_rate = WMI_10_4_VDEV_PARAM_MGMT_RATE,
1016*4882a593Smuzhiyun .protection_mode = WMI_10_4_VDEV_PARAM_PROTECTION_MODE,
1017*4882a593Smuzhiyun .fixed_rate = WMI_10_4_VDEV_PARAM_FIXED_RATE,
1018*4882a593Smuzhiyun .sgi = WMI_10_4_VDEV_PARAM_SGI,
1019*4882a593Smuzhiyun .ldpc = WMI_10_4_VDEV_PARAM_LDPC,
1020*4882a593Smuzhiyun .tx_stbc = WMI_10_4_VDEV_PARAM_TX_STBC,
1021*4882a593Smuzhiyun .rx_stbc = WMI_10_4_VDEV_PARAM_RX_STBC,
1022*4882a593Smuzhiyun .intra_bss_fwd = WMI_10_4_VDEV_PARAM_INTRA_BSS_FWD,
1023*4882a593Smuzhiyun .def_keyid = WMI_10_4_VDEV_PARAM_DEF_KEYID,
1024*4882a593Smuzhiyun .nss = WMI_10_4_VDEV_PARAM_NSS,
1025*4882a593Smuzhiyun .bcast_data_rate = WMI_10_4_VDEV_PARAM_BCAST_DATA_RATE,
1026*4882a593Smuzhiyun .mcast_data_rate = WMI_10_4_VDEV_PARAM_MCAST_DATA_RATE,
1027*4882a593Smuzhiyun .mcast_indicate = WMI_10_4_VDEV_PARAM_MCAST_INDICATE,
1028*4882a593Smuzhiyun .dhcp_indicate = WMI_10_4_VDEV_PARAM_DHCP_INDICATE,
1029*4882a593Smuzhiyun .unknown_dest_indicate = WMI_10_4_VDEV_PARAM_UNKNOWN_DEST_INDICATE,
1030*4882a593Smuzhiyun .ap_keepalive_min_idle_inactive_time_secs =
1031*4882a593Smuzhiyun WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS,
1032*4882a593Smuzhiyun .ap_keepalive_max_idle_inactive_time_secs =
1033*4882a593Smuzhiyun WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS,
1034*4882a593Smuzhiyun .ap_keepalive_max_unresponsive_time_secs =
1035*4882a593Smuzhiyun WMI_10_4_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS,
1036*4882a593Smuzhiyun .ap_enable_nawds = WMI_10_4_VDEV_PARAM_AP_ENABLE_NAWDS,
1037*4882a593Smuzhiyun .mcast2ucast_set = WMI_10_4_VDEV_PARAM_MCAST2UCAST_SET,
1038*4882a593Smuzhiyun .enable_rtscts = WMI_10_4_VDEV_PARAM_ENABLE_RTSCTS,
1039*4882a593Smuzhiyun .txbf = WMI_10_4_VDEV_PARAM_TXBF,
1040*4882a593Smuzhiyun .packet_powersave = WMI_10_4_VDEV_PARAM_PACKET_POWERSAVE,
1041*4882a593Smuzhiyun .drop_unencry = WMI_10_4_VDEV_PARAM_DROP_UNENCRY,
1042*4882a593Smuzhiyun .tx_encap_type = WMI_10_4_VDEV_PARAM_TX_ENCAP_TYPE,
1043*4882a593Smuzhiyun .ap_detect_out_of_sync_sleeping_sta_time_secs =
1044*4882a593Smuzhiyun WMI_10_4_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS,
1045*4882a593Smuzhiyun .rc_num_retries = WMI_10_4_VDEV_PARAM_RC_NUM_RETRIES,
1046*4882a593Smuzhiyun .cabq_maxdur = WMI_10_4_VDEV_PARAM_CABQ_MAXDUR,
1047*4882a593Smuzhiyun .mfptest_set = WMI_10_4_VDEV_PARAM_MFPTEST_SET,
1048*4882a593Smuzhiyun .rts_fixed_rate = WMI_10_4_VDEV_PARAM_RTS_FIXED_RATE,
1049*4882a593Smuzhiyun .vht_sgimask = WMI_10_4_VDEV_PARAM_VHT_SGIMASK,
1050*4882a593Smuzhiyun .vht80_ratemask = WMI_10_4_VDEV_PARAM_VHT80_RATEMASK,
1051*4882a593Smuzhiyun .early_rx_adjust_enable = WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_ENABLE,
1052*4882a593Smuzhiyun .early_rx_tgt_bmiss_num = WMI_10_4_VDEV_PARAM_EARLY_RX_TGT_BMISS_NUM,
1053*4882a593Smuzhiyun .early_rx_bmiss_sample_cycle =
1054*4882a593Smuzhiyun WMI_10_4_VDEV_PARAM_EARLY_RX_BMISS_SAMPLE_CYCLE,
1055*4882a593Smuzhiyun .early_rx_slop_step = WMI_10_4_VDEV_PARAM_EARLY_RX_SLOP_STEP,
1056*4882a593Smuzhiyun .early_rx_init_slop = WMI_10_4_VDEV_PARAM_EARLY_RX_INIT_SLOP,
1057*4882a593Smuzhiyun .early_rx_adjust_pause = WMI_10_4_VDEV_PARAM_EARLY_RX_ADJUST_PAUSE,
1058*4882a593Smuzhiyun .proxy_sta = WMI_10_4_VDEV_PARAM_PROXY_STA,
1059*4882a593Smuzhiyun .meru_vc = WMI_10_4_VDEV_PARAM_MERU_VC,
1060*4882a593Smuzhiyun .rx_decap_type = WMI_10_4_VDEV_PARAM_RX_DECAP_TYPE,
1061*4882a593Smuzhiyun .bw_nss_ratemask = WMI_10_4_VDEV_PARAM_BW_NSS_RATEMASK,
1062*4882a593Smuzhiyun .inc_tsf = WMI_10_4_VDEV_PARAM_TSF_INCREMENT,
1063*4882a593Smuzhiyun .dec_tsf = WMI_10_4_VDEV_PARAM_TSF_DECREMENT,
1064*4882a593Smuzhiyun .disable_4addr_src_lrn = WMI_10_4_VDEV_PARAM_DISABLE_4_ADDR_SRC_LRN,
1065*4882a593Smuzhiyun .rtt_responder_role = WMI_10_4_VDEV_PARAM_ENABLE_DISABLE_RTT_RESPONDER_ROLE,
1066*4882a593Smuzhiyun };
1067*4882a593Smuzhiyun
1068*4882a593Smuzhiyun static struct wmi_pdev_param_map wmi_pdev_param_map = {
1069*4882a593Smuzhiyun .tx_chain_mask = WMI_PDEV_PARAM_TX_CHAIN_MASK,
1070*4882a593Smuzhiyun .rx_chain_mask = WMI_PDEV_PARAM_RX_CHAIN_MASK,
1071*4882a593Smuzhiyun .txpower_limit2g = WMI_PDEV_PARAM_TXPOWER_LIMIT2G,
1072*4882a593Smuzhiyun .txpower_limit5g = WMI_PDEV_PARAM_TXPOWER_LIMIT5G,
1073*4882a593Smuzhiyun .txpower_scale = WMI_PDEV_PARAM_TXPOWER_SCALE,
1074*4882a593Smuzhiyun .beacon_gen_mode = WMI_PDEV_PARAM_BEACON_GEN_MODE,
1075*4882a593Smuzhiyun .beacon_tx_mode = WMI_PDEV_PARAM_BEACON_TX_MODE,
1076*4882a593Smuzhiyun .resmgr_offchan_mode = WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
1077*4882a593Smuzhiyun .protection_mode = WMI_PDEV_PARAM_PROTECTION_MODE,
1078*4882a593Smuzhiyun .dynamic_bw = WMI_PDEV_PARAM_DYNAMIC_BW,
1079*4882a593Smuzhiyun .non_agg_sw_retry_th = WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
1080*4882a593Smuzhiyun .agg_sw_retry_th = WMI_PDEV_PARAM_AGG_SW_RETRY_TH,
1081*4882a593Smuzhiyun .sta_kickout_th = WMI_PDEV_PARAM_STA_KICKOUT_TH,
1082*4882a593Smuzhiyun .ac_aggrsize_scaling = WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING,
1083*4882a593Smuzhiyun .ltr_enable = WMI_PDEV_PARAM_LTR_ENABLE,
1084*4882a593Smuzhiyun .ltr_ac_latency_be = WMI_PDEV_PARAM_LTR_AC_LATENCY_BE,
1085*4882a593Smuzhiyun .ltr_ac_latency_bk = WMI_PDEV_PARAM_LTR_AC_LATENCY_BK,
1086*4882a593Smuzhiyun .ltr_ac_latency_vi = WMI_PDEV_PARAM_LTR_AC_LATENCY_VI,
1087*4882a593Smuzhiyun .ltr_ac_latency_vo = WMI_PDEV_PARAM_LTR_AC_LATENCY_VO,
1088*4882a593Smuzhiyun .ltr_ac_latency_timeout = WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
1089*4882a593Smuzhiyun .ltr_sleep_override = WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
1090*4882a593Smuzhiyun .ltr_rx_override = WMI_PDEV_PARAM_LTR_RX_OVERRIDE,
1091*4882a593Smuzhiyun .ltr_tx_activity_timeout = WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
1092*4882a593Smuzhiyun .l1ss_enable = WMI_PDEV_PARAM_L1SS_ENABLE,
1093*4882a593Smuzhiyun .dsleep_enable = WMI_PDEV_PARAM_DSLEEP_ENABLE,
1094*4882a593Smuzhiyun .pcielp_txbuf_flush = WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
1095*4882a593Smuzhiyun .pcielp_txbuf_watermark = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
1096*4882a593Smuzhiyun .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
1097*4882a593Smuzhiyun .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
1098*4882a593Smuzhiyun .pdev_stats_update_period = WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
1099*4882a593Smuzhiyun .vdev_stats_update_period = WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
1100*4882a593Smuzhiyun .peer_stats_update_period = WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
1101*4882a593Smuzhiyun .bcnflt_stats_update_period = WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
1102*4882a593Smuzhiyun .pmf_qos = WMI_PDEV_PARAM_PMF_QOS,
1103*4882a593Smuzhiyun .arp_ac_override = WMI_PDEV_PARAM_ARP_AC_OVERRIDE,
1104*4882a593Smuzhiyun .dcs = WMI_PDEV_PARAM_DCS,
1105*4882a593Smuzhiyun .ani_enable = WMI_PDEV_PARAM_ANI_ENABLE,
1106*4882a593Smuzhiyun .ani_poll_period = WMI_PDEV_PARAM_ANI_POLL_PERIOD,
1107*4882a593Smuzhiyun .ani_listen_period = WMI_PDEV_PARAM_ANI_LISTEN_PERIOD,
1108*4882a593Smuzhiyun .ani_ofdm_level = WMI_PDEV_PARAM_ANI_OFDM_LEVEL,
1109*4882a593Smuzhiyun .ani_cck_level = WMI_PDEV_PARAM_ANI_CCK_LEVEL,
1110*4882a593Smuzhiyun .dyntxchain = WMI_PDEV_PARAM_DYNTXCHAIN,
1111*4882a593Smuzhiyun .proxy_sta = WMI_PDEV_PARAM_PROXY_STA,
1112*4882a593Smuzhiyun .idle_ps_config = WMI_PDEV_PARAM_IDLE_PS_CONFIG,
1113*4882a593Smuzhiyun .power_gating_sleep = WMI_PDEV_PARAM_POWER_GATING_SLEEP,
1114*4882a593Smuzhiyun .fast_channel_reset = WMI_PDEV_PARAM_UNSUPPORTED,
1115*4882a593Smuzhiyun .burst_dur = WMI_PDEV_PARAM_UNSUPPORTED,
1116*4882a593Smuzhiyun .burst_enable = WMI_PDEV_PARAM_UNSUPPORTED,
1117*4882a593Smuzhiyun .cal_period = WMI_PDEV_PARAM_UNSUPPORTED,
1118*4882a593Smuzhiyun .aggr_burst = WMI_PDEV_PARAM_UNSUPPORTED,
1119*4882a593Smuzhiyun .rx_decap_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1120*4882a593Smuzhiyun .smart_antenna_default_antenna = WMI_PDEV_PARAM_UNSUPPORTED,
1121*4882a593Smuzhiyun .igmpmld_override = WMI_PDEV_PARAM_UNSUPPORTED,
1122*4882a593Smuzhiyun .igmpmld_tid = WMI_PDEV_PARAM_UNSUPPORTED,
1123*4882a593Smuzhiyun .antenna_gain = WMI_PDEV_PARAM_UNSUPPORTED,
1124*4882a593Smuzhiyun .rx_filter = WMI_PDEV_PARAM_UNSUPPORTED,
1125*4882a593Smuzhiyun .set_mcast_to_ucast_tid = WMI_PDEV_PARAM_UNSUPPORTED,
1126*4882a593Smuzhiyun .proxy_sta_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1127*4882a593Smuzhiyun .set_mcast2ucast_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1128*4882a593Smuzhiyun .set_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
1129*4882a593Smuzhiyun .remove_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
1130*4882a593Smuzhiyun .peer_sta_ps_statechg_enable = WMI_PDEV_PARAM_UNSUPPORTED,
1131*4882a593Smuzhiyun .igmpmld_ac_override = WMI_PDEV_PARAM_UNSUPPORTED,
1132*4882a593Smuzhiyun .block_interbss = WMI_PDEV_PARAM_UNSUPPORTED,
1133*4882a593Smuzhiyun .set_disable_reset_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1134*4882a593Smuzhiyun .set_msdu_ttl_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1135*4882a593Smuzhiyun .set_ppdu_duration_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1136*4882a593Smuzhiyun .txbf_sound_period_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1137*4882a593Smuzhiyun .set_promisc_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1138*4882a593Smuzhiyun .set_burst_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1139*4882a593Smuzhiyun .en_stats = WMI_PDEV_PARAM_UNSUPPORTED,
1140*4882a593Smuzhiyun .mu_group_policy = WMI_PDEV_PARAM_UNSUPPORTED,
1141*4882a593Smuzhiyun .noise_detection = WMI_PDEV_PARAM_UNSUPPORTED,
1142*4882a593Smuzhiyun .noise_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
1143*4882a593Smuzhiyun .dpd_enable = WMI_PDEV_PARAM_UNSUPPORTED,
1144*4882a593Smuzhiyun .set_mcast_bcast_echo = WMI_PDEV_PARAM_UNSUPPORTED,
1145*4882a593Smuzhiyun .atf_strict_sch = WMI_PDEV_PARAM_UNSUPPORTED,
1146*4882a593Smuzhiyun .atf_sched_duration = WMI_PDEV_PARAM_UNSUPPORTED,
1147*4882a593Smuzhiyun .ant_plzn = WMI_PDEV_PARAM_UNSUPPORTED,
1148*4882a593Smuzhiyun .mgmt_retry_limit = WMI_PDEV_PARAM_UNSUPPORTED,
1149*4882a593Smuzhiyun .sensitivity_level = WMI_PDEV_PARAM_UNSUPPORTED,
1150*4882a593Smuzhiyun .signed_txpower_2g = WMI_PDEV_PARAM_UNSUPPORTED,
1151*4882a593Smuzhiyun .signed_txpower_5g = WMI_PDEV_PARAM_UNSUPPORTED,
1152*4882a593Smuzhiyun .enable_per_tid_amsdu = WMI_PDEV_PARAM_UNSUPPORTED,
1153*4882a593Smuzhiyun .enable_per_tid_ampdu = WMI_PDEV_PARAM_UNSUPPORTED,
1154*4882a593Smuzhiyun .cca_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
1155*4882a593Smuzhiyun .rts_fixed_rate = WMI_PDEV_PARAM_UNSUPPORTED,
1156*4882a593Smuzhiyun .pdev_reset = WMI_PDEV_PARAM_UNSUPPORTED,
1157*4882a593Smuzhiyun .wapi_mbssid_offset = WMI_PDEV_PARAM_UNSUPPORTED,
1158*4882a593Smuzhiyun .arp_srcaddr = WMI_PDEV_PARAM_UNSUPPORTED,
1159*4882a593Smuzhiyun .arp_dstaddr = WMI_PDEV_PARAM_UNSUPPORTED,
1160*4882a593Smuzhiyun .enable_btcoex = WMI_PDEV_PARAM_UNSUPPORTED,
1161*4882a593Smuzhiyun };
1162*4882a593Smuzhiyun
1163*4882a593Smuzhiyun static struct wmi_pdev_param_map wmi_10x_pdev_param_map = {
1164*4882a593Smuzhiyun .tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK,
1165*4882a593Smuzhiyun .rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
1166*4882a593Smuzhiyun .txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
1167*4882a593Smuzhiyun .txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
1168*4882a593Smuzhiyun .txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
1169*4882a593Smuzhiyun .beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
1170*4882a593Smuzhiyun .beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
1171*4882a593Smuzhiyun .resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
1172*4882a593Smuzhiyun .protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE,
1173*4882a593Smuzhiyun .dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW,
1174*4882a593Smuzhiyun .non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
1175*4882a593Smuzhiyun .agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
1176*4882a593Smuzhiyun .sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
1177*4882a593Smuzhiyun .ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
1178*4882a593Smuzhiyun .ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE,
1179*4882a593Smuzhiyun .ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
1180*4882a593Smuzhiyun .ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
1181*4882a593Smuzhiyun .ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
1182*4882a593Smuzhiyun .ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
1183*4882a593Smuzhiyun .ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
1184*4882a593Smuzhiyun .ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
1185*4882a593Smuzhiyun .ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
1186*4882a593Smuzhiyun .ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
1187*4882a593Smuzhiyun .l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE,
1188*4882a593Smuzhiyun .dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
1189*4882a593Smuzhiyun .pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED,
1190*4882a593Smuzhiyun .pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED,
1191*4882a593Smuzhiyun .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED,
1192*4882a593Smuzhiyun .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED,
1193*4882a593Smuzhiyun .pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
1194*4882a593Smuzhiyun .vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
1195*4882a593Smuzhiyun .peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
1196*4882a593Smuzhiyun .bcnflt_stats_update_period =
1197*4882a593Smuzhiyun WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
1198*4882a593Smuzhiyun .pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS,
1199*4882a593Smuzhiyun .arp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
1200*4882a593Smuzhiyun .dcs = WMI_10X_PDEV_PARAM_DCS,
1201*4882a593Smuzhiyun .ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE,
1202*4882a593Smuzhiyun .ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
1203*4882a593Smuzhiyun .ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
1204*4882a593Smuzhiyun .ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
1205*4882a593Smuzhiyun .ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
1206*4882a593Smuzhiyun .dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN,
1207*4882a593Smuzhiyun .proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED,
1208*4882a593Smuzhiyun .idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED,
1209*4882a593Smuzhiyun .power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED,
1210*4882a593Smuzhiyun .fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
1211*4882a593Smuzhiyun .burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR,
1212*4882a593Smuzhiyun .burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE,
1213*4882a593Smuzhiyun .cal_period = WMI_10X_PDEV_PARAM_CAL_PERIOD,
1214*4882a593Smuzhiyun .aggr_burst = WMI_PDEV_PARAM_UNSUPPORTED,
1215*4882a593Smuzhiyun .rx_decap_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1216*4882a593Smuzhiyun .smart_antenna_default_antenna = WMI_PDEV_PARAM_UNSUPPORTED,
1217*4882a593Smuzhiyun .igmpmld_override = WMI_PDEV_PARAM_UNSUPPORTED,
1218*4882a593Smuzhiyun .igmpmld_tid = WMI_PDEV_PARAM_UNSUPPORTED,
1219*4882a593Smuzhiyun .antenna_gain = WMI_PDEV_PARAM_UNSUPPORTED,
1220*4882a593Smuzhiyun .rx_filter = WMI_PDEV_PARAM_UNSUPPORTED,
1221*4882a593Smuzhiyun .set_mcast_to_ucast_tid = WMI_PDEV_PARAM_UNSUPPORTED,
1222*4882a593Smuzhiyun .proxy_sta_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1223*4882a593Smuzhiyun .set_mcast2ucast_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1224*4882a593Smuzhiyun .set_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
1225*4882a593Smuzhiyun .remove_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
1226*4882a593Smuzhiyun .peer_sta_ps_statechg_enable = WMI_PDEV_PARAM_UNSUPPORTED,
1227*4882a593Smuzhiyun .igmpmld_ac_override = WMI_PDEV_PARAM_UNSUPPORTED,
1228*4882a593Smuzhiyun .block_interbss = WMI_PDEV_PARAM_UNSUPPORTED,
1229*4882a593Smuzhiyun .set_disable_reset_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1230*4882a593Smuzhiyun .set_msdu_ttl_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1231*4882a593Smuzhiyun .set_ppdu_duration_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1232*4882a593Smuzhiyun .txbf_sound_period_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1233*4882a593Smuzhiyun .set_promisc_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1234*4882a593Smuzhiyun .set_burst_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1235*4882a593Smuzhiyun .en_stats = WMI_PDEV_PARAM_UNSUPPORTED,
1236*4882a593Smuzhiyun .mu_group_policy = WMI_PDEV_PARAM_UNSUPPORTED,
1237*4882a593Smuzhiyun .noise_detection = WMI_PDEV_PARAM_UNSUPPORTED,
1238*4882a593Smuzhiyun .noise_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
1239*4882a593Smuzhiyun .dpd_enable = WMI_PDEV_PARAM_UNSUPPORTED,
1240*4882a593Smuzhiyun .set_mcast_bcast_echo = WMI_PDEV_PARAM_UNSUPPORTED,
1241*4882a593Smuzhiyun .atf_strict_sch = WMI_PDEV_PARAM_UNSUPPORTED,
1242*4882a593Smuzhiyun .atf_sched_duration = WMI_PDEV_PARAM_UNSUPPORTED,
1243*4882a593Smuzhiyun .ant_plzn = WMI_PDEV_PARAM_UNSUPPORTED,
1244*4882a593Smuzhiyun .mgmt_retry_limit = WMI_PDEV_PARAM_UNSUPPORTED,
1245*4882a593Smuzhiyun .sensitivity_level = WMI_PDEV_PARAM_UNSUPPORTED,
1246*4882a593Smuzhiyun .signed_txpower_2g = WMI_PDEV_PARAM_UNSUPPORTED,
1247*4882a593Smuzhiyun .signed_txpower_5g = WMI_PDEV_PARAM_UNSUPPORTED,
1248*4882a593Smuzhiyun .enable_per_tid_amsdu = WMI_PDEV_PARAM_UNSUPPORTED,
1249*4882a593Smuzhiyun .enable_per_tid_ampdu = WMI_PDEV_PARAM_UNSUPPORTED,
1250*4882a593Smuzhiyun .cca_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
1251*4882a593Smuzhiyun .rts_fixed_rate = WMI_PDEV_PARAM_UNSUPPORTED,
1252*4882a593Smuzhiyun .pdev_reset = WMI_PDEV_PARAM_UNSUPPORTED,
1253*4882a593Smuzhiyun .wapi_mbssid_offset = WMI_PDEV_PARAM_UNSUPPORTED,
1254*4882a593Smuzhiyun .arp_srcaddr = WMI_PDEV_PARAM_UNSUPPORTED,
1255*4882a593Smuzhiyun .arp_dstaddr = WMI_PDEV_PARAM_UNSUPPORTED,
1256*4882a593Smuzhiyun .enable_btcoex = WMI_PDEV_PARAM_UNSUPPORTED,
1257*4882a593Smuzhiyun };
1258*4882a593Smuzhiyun
1259*4882a593Smuzhiyun static struct wmi_pdev_param_map wmi_10_2_4_pdev_param_map = {
1260*4882a593Smuzhiyun .tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK,
1261*4882a593Smuzhiyun .rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK,
1262*4882a593Smuzhiyun .txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G,
1263*4882a593Smuzhiyun .txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G,
1264*4882a593Smuzhiyun .txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE,
1265*4882a593Smuzhiyun .beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE,
1266*4882a593Smuzhiyun .beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE,
1267*4882a593Smuzhiyun .resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
1268*4882a593Smuzhiyun .protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE,
1269*4882a593Smuzhiyun .dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW,
1270*4882a593Smuzhiyun .non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
1271*4882a593Smuzhiyun .agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH,
1272*4882a593Smuzhiyun .sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH,
1273*4882a593Smuzhiyun .ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING,
1274*4882a593Smuzhiyun .ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE,
1275*4882a593Smuzhiyun .ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE,
1276*4882a593Smuzhiyun .ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK,
1277*4882a593Smuzhiyun .ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI,
1278*4882a593Smuzhiyun .ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO,
1279*4882a593Smuzhiyun .ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
1280*4882a593Smuzhiyun .ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
1281*4882a593Smuzhiyun .ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE,
1282*4882a593Smuzhiyun .ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
1283*4882a593Smuzhiyun .l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE,
1284*4882a593Smuzhiyun .dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE,
1285*4882a593Smuzhiyun .pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED,
1286*4882a593Smuzhiyun .pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED,
1287*4882a593Smuzhiyun .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED,
1288*4882a593Smuzhiyun .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED,
1289*4882a593Smuzhiyun .pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
1290*4882a593Smuzhiyun .vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
1291*4882a593Smuzhiyun .peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
1292*4882a593Smuzhiyun .bcnflt_stats_update_period =
1293*4882a593Smuzhiyun WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
1294*4882a593Smuzhiyun .pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS,
1295*4882a593Smuzhiyun .arp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE,
1296*4882a593Smuzhiyun .dcs = WMI_10X_PDEV_PARAM_DCS,
1297*4882a593Smuzhiyun .ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE,
1298*4882a593Smuzhiyun .ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD,
1299*4882a593Smuzhiyun .ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD,
1300*4882a593Smuzhiyun .ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL,
1301*4882a593Smuzhiyun .ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL,
1302*4882a593Smuzhiyun .dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN,
1303*4882a593Smuzhiyun .proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED,
1304*4882a593Smuzhiyun .idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED,
1305*4882a593Smuzhiyun .power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED,
1306*4882a593Smuzhiyun .fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET,
1307*4882a593Smuzhiyun .burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR,
1308*4882a593Smuzhiyun .burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE,
1309*4882a593Smuzhiyun .cal_period = WMI_10X_PDEV_PARAM_CAL_PERIOD,
1310*4882a593Smuzhiyun .aggr_burst = WMI_PDEV_PARAM_UNSUPPORTED,
1311*4882a593Smuzhiyun .rx_decap_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1312*4882a593Smuzhiyun .smart_antenna_default_antenna = WMI_PDEV_PARAM_UNSUPPORTED,
1313*4882a593Smuzhiyun .igmpmld_override = WMI_PDEV_PARAM_UNSUPPORTED,
1314*4882a593Smuzhiyun .igmpmld_tid = WMI_PDEV_PARAM_UNSUPPORTED,
1315*4882a593Smuzhiyun .antenna_gain = WMI_PDEV_PARAM_UNSUPPORTED,
1316*4882a593Smuzhiyun .rx_filter = WMI_PDEV_PARAM_UNSUPPORTED,
1317*4882a593Smuzhiyun .set_mcast_to_ucast_tid = WMI_PDEV_PARAM_UNSUPPORTED,
1318*4882a593Smuzhiyun .proxy_sta_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1319*4882a593Smuzhiyun .set_mcast2ucast_mode = WMI_PDEV_PARAM_UNSUPPORTED,
1320*4882a593Smuzhiyun .set_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
1321*4882a593Smuzhiyun .remove_mcast2ucast_buffer = WMI_PDEV_PARAM_UNSUPPORTED,
1322*4882a593Smuzhiyun .peer_sta_ps_statechg_enable =
1323*4882a593Smuzhiyun WMI_10X_PDEV_PARAM_PEER_STA_PS_STATECHG_ENABLE,
1324*4882a593Smuzhiyun .igmpmld_ac_override = WMI_PDEV_PARAM_UNSUPPORTED,
1325*4882a593Smuzhiyun .block_interbss = WMI_PDEV_PARAM_UNSUPPORTED,
1326*4882a593Smuzhiyun .set_disable_reset_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1327*4882a593Smuzhiyun .set_msdu_ttl_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1328*4882a593Smuzhiyun .set_ppdu_duration_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1329*4882a593Smuzhiyun .txbf_sound_period_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1330*4882a593Smuzhiyun .set_promisc_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1331*4882a593Smuzhiyun .set_burst_mode_cmdid = WMI_PDEV_PARAM_UNSUPPORTED,
1332*4882a593Smuzhiyun .en_stats = WMI_PDEV_PARAM_UNSUPPORTED,
1333*4882a593Smuzhiyun .mu_group_policy = WMI_PDEV_PARAM_UNSUPPORTED,
1334*4882a593Smuzhiyun .noise_detection = WMI_PDEV_PARAM_UNSUPPORTED,
1335*4882a593Smuzhiyun .noise_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
1336*4882a593Smuzhiyun .dpd_enable = WMI_PDEV_PARAM_UNSUPPORTED,
1337*4882a593Smuzhiyun .set_mcast_bcast_echo = WMI_PDEV_PARAM_UNSUPPORTED,
1338*4882a593Smuzhiyun .atf_strict_sch = WMI_PDEV_PARAM_UNSUPPORTED,
1339*4882a593Smuzhiyun .atf_sched_duration = WMI_PDEV_PARAM_UNSUPPORTED,
1340*4882a593Smuzhiyun .ant_plzn = WMI_PDEV_PARAM_UNSUPPORTED,
1341*4882a593Smuzhiyun .mgmt_retry_limit = WMI_PDEV_PARAM_UNSUPPORTED,
1342*4882a593Smuzhiyun .sensitivity_level = WMI_PDEV_PARAM_UNSUPPORTED,
1343*4882a593Smuzhiyun .signed_txpower_2g = WMI_PDEV_PARAM_UNSUPPORTED,
1344*4882a593Smuzhiyun .signed_txpower_5g = WMI_PDEV_PARAM_UNSUPPORTED,
1345*4882a593Smuzhiyun .enable_per_tid_amsdu = WMI_PDEV_PARAM_UNSUPPORTED,
1346*4882a593Smuzhiyun .enable_per_tid_ampdu = WMI_PDEV_PARAM_UNSUPPORTED,
1347*4882a593Smuzhiyun .cca_threshold = WMI_PDEV_PARAM_UNSUPPORTED,
1348*4882a593Smuzhiyun .rts_fixed_rate = WMI_PDEV_PARAM_UNSUPPORTED,
1349*4882a593Smuzhiyun .pdev_reset = WMI_10X_PDEV_PARAM_PDEV_RESET,
1350*4882a593Smuzhiyun .wapi_mbssid_offset = WMI_PDEV_PARAM_UNSUPPORTED,
1351*4882a593Smuzhiyun .arp_srcaddr = WMI_PDEV_PARAM_UNSUPPORTED,
1352*4882a593Smuzhiyun .arp_dstaddr = WMI_PDEV_PARAM_UNSUPPORTED,
1353*4882a593Smuzhiyun .enable_btcoex = WMI_PDEV_PARAM_UNSUPPORTED,
1354*4882a593Smuzhiyun };
1355*4882a593Smuzhiyun
1356*4882a593Smuzhiyun /* firmware 10.2 specific mappings */
1357*4882a593Smuzhiyun static struct wmi_cmd_map wmi_10_2_cmd_map = {
1358*4882a593Smuzhiyun .init_cmdid = WMI_10_2_INIT_CMDID,
1359*4882a593Smuzhiyun .start_scan_cmdid = WMI_10_2_START_SCAN_CMDID,
1360*4882a593Smuzhiyun .stop_scan_cmdid = WMI_10_2_STOP_SCAN_CMDID,
1361*4882a593Smuzhiyun .scan_chan_list_cmdid = WMI_10_2_SCAN_CHAN_LIST_CMDID,
1362*4882a593Smuzhiyun .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED,
1363*4882a593Smuzhiyun .scan_prob_req_oui_cmdid = WMI_CMD_UNSUPPORTED,
1364*4882a593Smuzhiyun .pdev_set_regdomain_cmdid = WMI_10_2_PDEV_SET_REGDOMAIN_CMDID,
1365*4882a593Smuzhiyun .pdev_set_channel_cmdid = WMI_10_2_PDEV_SET_CHANNEL_CMDID,
1366*4882a593Smuzhiyun .pdev_set_param_cmdid = WMI_10_2_PDEV_SET_PARAM_CMDID,
1367*4882a593Smuzhiyun .pdev_pktlog_enable_cmdid = WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID,
1368*4882a593Smuzhiyun .pdev_pktlog_disable_cmdid = WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID,
1369*4882a593Smuzhiyun .pdev_set_wmm_params_cmdid = WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID,
1370*4882a593Smuzhiyun .pdev_set_ht_cap_ie_cmdid = WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID,
1371*4882a593Smuzhiyun .pdev_set_vht_cap_ie_cmdid = WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID,
1372*4882a593Smuzhiyun .pdev_set_quiet_mode_cmdid = WMI_10_2_PDEV_SET_QUIET_MODE_CMDID,
1373*4882a593Smuzhiyun .pdev_green_ap_ps_enable_cmdid = WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID,
1374*4882a593Smuzhiyun .pdev_get_tpc_config_cmdid = WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID,
1375*4882a593Smuzhiyun .pdev_set_base_macaddr_cmdid = WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID,
1376*4882a593Smuzhiyun .vdev_create_cmdid = WMI_10_2_VDEV_CREATE_CMDID,
1377*4882a593Smuzhiyun .vdev_delete_cmdid = WMI_10_2_VDEV_DELETE_CMDID,
1378*4882a593Smuzhiyun .vdev_start_request_cmdid = WMI_10_2_VDEV_START_REQUEST_CMDID,
1379*4882a593Smuzhiyun .vdev_restart_request_cmdid = WMI_10_2_VDEV_RESTART_REQUEST_CMDID,
1380*4882a593Smuzhiyun .vdev_up_cmdid = WMI_10_2_VDEV_UP_CMDID,
1381*4882a593Smuzhiyun .vdev_stop_cmdid = WMI_10_2_VDEV_STOP_CMDID,
1382*4882a593Smuzhiyun .vdev_down_cmdid = WMI_10_2_VDEV_DOWN_CMDID,
1383*4882a593Smuzhiyun .vdev_set_param_cmdid = WMI_10_2_VDEV_SET_PARAM_CMDID,
1384*4882a593Smuzhiyun .vdev_install_key_cmdid = WMI_10_2_VDEV_INSTALL_KEY_CMDID,
1385*4882a593Smuzhiyun .peer_create_cmdid = WMI_10_2_PEER_CREATE_CMDID,
1386*4882a593Smuzhiyun .peer_delete_cmdid = WMI_10_2_PEER_DELETE_CMDID,
1387*4882a593Smuzhiyun .peer_flush_tids_cmdid = WMI_10_2_PEER_FLUSH_TIDS_CMDID,
1388*4882a593Smuzhiyun .peer_set_param_cmdid = WMI_10_2_PEER_SET_PARAM_CMDID,
1389*4882a593Smuzhiyun .peer_assoc_cmdid = WMI_10_2_PEER_ASSOC_CMDID,
1390*4882a593Smuzhiyun .peer_add_wds_entry_cmdid = WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID,
1391*4882a593Smuzhiyun .peer_remove_wds_entry_cmdid = WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID,
1392*4882a593Smuzhiyun .peer_mcast_group_cmdid = WMI_10_2_PEER_MCAST_GROUP_CMDID,
1393*4882a593Smuzhiyun .bcn_tx_cmdid = WMI_10_2_BCN_TX_CMDID,
1394*4882a593Smuzhiyun .pdev_send_bcn_cmdid = WMI_10_2_PDEV_SEND_BCN_CMDID,
1395*4882a593Smuzhiyun .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
1396*4882a593Smuzhiyun .bcn_filter_rx_cmdid = WMI_10_2_BCN_FILTER_RX_CMDID,
1397*4882a593Smuzhiyun .prb_req_filter_rx_cmdid = WMI_10_2_PRB_REQ_FILTER_RX_CMDID,
1398*4882a593Smuzhiyun .mgmt_tx_cmdid = WMI_10_2_MGMT_TX_CMDID,
1399*4882a593Smuzhiyun .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED,
1400*4882a593Smuzhiyun .addba_clear_resp_cmdid = WMI_10_2_ADDBA_CLEAR_RESP_CMDID,
1401*4882a593Smuzhiyun .addba_send_cmdid = WMI_10_2_ADDBA_SEND_CMDID,
1402*4882a593Smuzhiyun .addba_status_cmdid = WMI_10_2_ADDBA_STATUS_CMDID,
1403*4882a593Smuzhiyun .delba_send_cmdid = WMI_10_2_DELBA_SEND_CMDID,
1404*4882a593Smuzhiyun .addba_set_resp_cmdid = WMI_10_2_ADDBA_SET_RESP_CMDID,
1405*4882a593Smuzhiyun .send_singleamsdu_cmdid = WMI_10_2_SEND_SINGLEAMSDU_CMDID,
1406*4882a593Smuzhiyun .sta_powersave_mode_cmdid = WMI_10_2_STA_POWERSAVE_MODE_CMDID,
1407*4882a593Smuzhiyun .sta_powersave_param_cmdid = WMI_10_2_STA_POWERSAVE_PARAM_CMDID,
1408*4882a593Smuzhiyun .sta_mimo_ps_mode_cmdid = WMI_10_2_STA_MIMO_PS_MODE_CMDID,
1409*4882a593Smuzhiyun .pdev_dfs_enable_cmdid = WMI_10_2_PDEV_DFS_ENABLE_CMDID,
1410*4882a593Smuzhiyun .pdev_dfs_disable_cmdid = WMI_10_2_PDEV_DFS_DISABLE_CMDID,
1411*4882a593Smuzhiyun .roam_scan_mode = WMI_10_2_ROAM_SCAN_MODE,
1412*4882a593Smuzhiyun .roam_scan_rssi_threshold = WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD,
1413*4882a593Smuzhiyun .roam_scan_period = WMI_10_2_ROAM_SCAN_PERIOD,
1414*4882a593Smuzhiyun .roam_scan_rssi_change_threshold =
1415*4882a593Smuzhiyun WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD,
1416*4882a593Smuzhiyun .roam_ap_profile = WMI_10_2_ROAM_AP_PROFILE,
1417*4882a593Smuzhiyun .ofl_scan_add_ap_profile = WMI_10_2_OFL_SCAN_ADD_AP_PROFILE,
1418*4882a593Smuzhiyun .ofl_scan_remove_ap_profile = WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE,
1419*4882a593Smuzhiyun .ofl_scan_period = WMI_10_2_OFL_SCAN_PERIOD,
1420*4882a593Smuzhiyun .p2p_dev_set_device_info = WMI_10_2_P2P_DEV_SET_DEVICE_INFO,
1421*4882a593Smuzhiyun .p2p_dev_set_discoverability = WMI_10_2_P2P_DEV_SET_DISCOVERABILITY,
1422*4882a593Smuzhiyun .p2p_go_set_beacon_ie = WMI_10_2_P2P_GO_SET_BEACON_IE,
1423*4882a593Smuzhiyun .p2p_go_set_probe_resp_ie = WMI_10_2_P2P_GO_SET_PROBE_RESP_IE,
1424*4882a593Smuzhiyun .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED,
1425*4882a593Smuzhiyun .ap_ps_peer_param_cmdid = WMI_10_2_AP_PS_PEER_PARAM_CMDID,
1426*4882a593Smuzhiyun .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED,
1427*4882a593Smuzhiyun .peer_rate_retry_sched_cmdid = WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID,
1428*4882a593Smuzhiyun .wlan_profile_trigger_cmdid = WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID,
1429*4882a593Smuzhiyun .wlan_profile_set_hist_intvl_cmdid =
1430*4882a593Smuzhiyun WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID,
1431*4882a593Smuzhiyun .wlan_profile_get_profile_data_cmdid =
1432*4882a593Smuzhiyun WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID,
1433*4882a593Smuzhiyun .wlan_profile_enable_profile_id_cmdid =
1434*4882a593Smuzhiyun WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID,
1435*4882a593Smuzhiyun .wlan_profile_list_profile_id_cmdid =
1436*4882a593Smuzhiyun WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID,
1437*4882a593Smuzhiyun .pdev_suspend_cmdid = WMI_10_2_PDEV_SUSPEND_CMDID,
1438*4882a593Smuzhiyun .pdev_resume_cmdid = WMI_10_2_PDEV_RESUME_CMDID,
1439*4882a593Smuzhiyun .add_bcn_filter_cmdid = WMI_10_2_ADD_BCN_FILTER_CMDID,
1440*4882a593Smuzhiyun .rmv_bcn_filter_cmdid = WMI_10_2_RMV_BCN_FILTER_CMDID,
1441*4882a593Smuzhiyun .wow_add_wake_pattern_cmdid = WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID,
1442*4882a593Smuzhiyun .wow_del_wake_pattern_cmdid = WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID,
1443*4882a593Smuzhiyun .wow_enable_disable_wake_event_cmdid =
1444*4882a593Smuzhiyun WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID,
1445*4882a593Smuzhiyun .wow_enable_cmdid = WMI_10_2_WOW_ENABLE_CMDID,
1446*4882a593Smuzhiyun .wow_hostwakeup_from_sleep_cmdid =
1447*4882a593Smuzhiyun WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID,
1448*4882a593Smuzhiyun .rtt_measreq_cmdid = WMI_10_2_RTT_MEASREQ_CMDID,
1449*4882a593Smuzhiyun .rtt_tsf_cmdid = WMI_10_2_RTT_TSF_CMDID,
1450*4882a593Smuzhiyun .vdev_spectral_scan_configure_cmdid =
1451*4882a593Smuzhiyun WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID,
1452*4882a593Smuzhiyun .vdev_spectral_scan_enable_cmdid =
1453*4882a593Smuzhiyun WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID,
1454*4882a593Smuzhiyun .request_stats_cmdid = WMI_10_2_REQUEST_STATS_CMDID,
1455*4882a593Smuzhiyun .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED,
1456*4882a593Smuzhiyun .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED,
1457*4882a593Smuzhiyun .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED,
1458*4882a593Smuzhiyun .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED,
1459*4882a593Smuzhiyun .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED,
1460*4882a593Smuzhiyun .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED,
1461*4882a593Smuzhiyun .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED,
1462*4882a593Smuzhiyun .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED,
1463*4882a593Smuzhiyun .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED,
1464*4882a593Smuzhiyun .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED,
1465*4882a593Smuzhiyun .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED,
1466*4882a593Smuzhiyun .echo_cmdid = WMI_10_2_ECHO_CMDID,
1467*4882a593Smuzhiyun .pdev_utf_cmdid = WMI_10_2_PDEV_UTF_CMDID,
1468*4882a593Smuzhiyun .dbglog_cfg_cmdid = WMI_10_2_DBGLOG_CFG_CMDID,
1469*4882a593Smuzhiyun .pdev_qvit_cmdid = WMI_10_2_PDEV_QVIT_CMDID,
1470*4882a593Smuzhiyun .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED,
1471*4882a593Smuzhiyun .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
1472*4882a593Smuzhiyun .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
1473*4882a593Smuzhiyun .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED,
1474*4882a593Smuzhiyun .gpio_config_cmdid = WMI_10_2_GPIO_CONFIG_CMDID,
1475*4882a593Smuzhiyun .gpio_output_cmdid = WMI_10_2_GPIO_OUTPUT_CMDID,
1476*4882a593Smuzhiyun .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED,
1477*4882a593Smuzhiyun .pdev_enable_adaptive_cca_cmdid = WMI_CMD_UNSUPPORTED,
1478*4882a593Smuzhiyun .scan_update_request_cmdid = WMI_CMD_UNSUPPORTED,
1479*4882a593Smuzhiyun .vdev_standby_response_cmdid = WMI_CMD_UNSUPPORTED,
1480*4882a593Smuzhiyun .vdev_resume_response_cmdid = WMI_CMD_UNSUPPORTED,
1481*4882a593Smuzhiyun .wlan_peer_caching_add_peer_cmdid = WMI_CMD_UNSUPPORTED,
1482*4882a593Smuzhiyun .wlan_peer_caching_evict_peer_cmdid = WMI_CMD_UNSUPPORTED,
1483*4882a593Smuzhiyun .wlan_peer_caching_restore_peer_cmdid = WMI_CMD_UNSUPPORTED,
1484*4882a593Smuzhiyun .wlan_peer_caching_print_all_peers_info_cmdid = WMI_CMD_UNSUPPORTED,
1485*4882a593Smuzhiyun .peer_update_wds_entry_cmdid = WMI_CMD_UNSUPPORTED,
1486*4882a593Smuzhiyun .peer_add_proxy_sta_entry_cmdid = WMI_CMD_UNSUPPORTED,
1487*4882a593Smuzhiyun .rtt_keepalive_cmdid = WMI_CMD_UNSUPPORTED,
1488*4882a593Smuzhiyun .oem_req_cmdid = WMI_CMD_UNSUPPORTED,
1489*4882a593Smuzhiyun .nan_cmdid = WMI_CMD_UNSUPPORTED,
1490*4882a593Smuzhiyun .vdev_ratemask_cmdid = WMI_CMD_UNSUPPORTED,
1491*4882a593Smuzhiyun .qboost_cfg_cmdid = WMI_CMD_UNSUPPORTED,
1492*4882a593Smuzhiyun .pdev_smart_ant_enable_cmdid = WMI_CMD_UNSUPPORTED,
1493*4882a593Smuzhiyun .pdev_smart_ant_set_rx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
1494*4882a593Smuzhiyun .peer_smart_ant_set_tx_antenna_cmdid = WMI_CMD_UNSUPPORTED,
1495*4882a593Smuzhiyun .peer_smart_ant_set_train_info_cmdid = WMI_CMD_UNSUPPORTED,
1496*4882a593Smuzhiyun .peer_smart_ant_set_node_config_ops_cmdid = WMI_CMD_UNSUPPORTED,
1497*4882a593Smuzhiyun .pdev_set_antenna_switch_table_cmdid = WMI_CMD_UNSUPPORTED,
1498*4882a593Smuzhiyun .pdev_set_ctl_table_cmdid = WMI_CMD_UNSUPPORTED,
1499*4882a593Smuzhiyun .pdev_set_mimogain_table_cmdid = WMI_CMD_UNSUPPORTED,
1500*4882a593Smuzhiyun .pdev_ratepwr_table_cmdid = WMI_CMD_UNSUPPORTED,
1501*4882a593Smuzhiyun .pdev_ratepwr_chainmsk_table_cmdid = WMI_CMD_UNSUPPORTED,
1502*4882a593Smuzhiyun .pdev_fips_cmdid = WMI_CMD_UNSUPPORTED,
1503*4882a593Smuzhiyun .tt_set_conf_cmdid = WMI_CMD_UNSUPPORTED,
1504*4882a593Smuzhiyun .fwtest_cmdid = WMI_CMD_UNSUPPORTED,
1505*4882a593Smuzhiyun .vdev_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
1506*4882a593Smuzhiyun .peer_atf_request_cmdid = WMI_CMD_UNSUPPORTED,
1507*4882a593Smuzhiyun .pdev_get_ani_cck_config_cmdid = WMI_CMD_UNSUPPORTED,
1508*4882a593Smuzhiyun .pdev_get_ani_ofdm_config_cmdid = WMI_CMD_UNSUPPORTED,
1509*4882a593Smuzhiyun .pdev_reserve_ast_entry_cmdid = WMI_CMD_UNSUPPORTED,
1510*4882a593Smuzhiyun .pdev_get_tpc_table_cmdid = WMI_CMD_UNSUPPORTED,
1511*4882a593Smuzhiyun .radar_found_cmdid = WMI_CMD_UNSUPPORTED,
1512*4882a593Smuzhiyun };
1513*4882a593Smuzhiyun
1514*4882a593Smuzhiyun static struct wmi_pdev_param_map wmi_10_4_pdev_param_map = {
1515*4882a593Smuzhiyun .tx_chain_mask = WMI_10_4_PDEV_PARAM_TX_CHAIN_MASK,
1516*4882a593Smuzhiyun .rx_chain_mask = WMI_10_4_PDEV_PARAM_RX_CHAIN_MASK,
1517*4882a593Smuzhiyun .txpower_limit2g = WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT2G,
1518*4882a593Smuzhiyun .txpower_limit5g = WMI_10_4_PDEV_PARAM_TXPOWER_LIMIT5G,
1519*4882a593Smuzhiyun .txpower_scale = WMI_10_4_PDEV_PARAM_TXPOWER_SCALE,
1520*4882a593Smuzhiyun .beacon_gen_mode = WMI_10_4_PDEV_PARAM_BEACON_GEN_MODE,
1521*4882a593Smuzhiyun .beacon_tx_mode = WMI_10_4_PDEV_PARAM_BEACON_TX_MODE,
1522*4882a593Smuzhiyun .resmgr_offchan_mode = WMI_10_4_PDEV_PARAM_RESMGR_OFFCHAN_MODE,
1523*4882a593Smuzhiyun .protection_mode = WMI_10_4_PDEV_PARAM_PROTECTION_MODE,
1524*4882a593Smuzhiyun .dynamic_bw = WMI_10_4_PDEV_PARAM_DYNAMIC_BW,
1525*4882a593Smuzhiyun .non_agg_sw_retry_th = WMI_10_4_PDEV_PARAM_NON_AGG_SW_RETRY_TH,
1526*4882a593Smuzhiyun .agg_sw_retry_th = WMI_10_4_PDEV_PARAM_AGG_SW_RETRY_TH,
1527*4882a593Smuzhiyun .sta_kickout_th = WMI_10_4_PDEV_PARAM_STA_KICKOUT_TH,
1528*4882a593Smuzhiyun .ac_aggrsize_scaling = WMI_10_4_PDEV_PARAM_AC_AGGRSIZE_SCALING,
1529*4882a593Smuzhiyun .ltr_enable = WMI_10_4_PDEV_PARAM_LTR_ENABLE,
1530*4882a593Smuzhiyun .ltr_ac_latency_be = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BE,
1531*4882a593Smuzhiyun .ltr_ac_latency_bk = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_BK,
1532*4882a593Smuzhiyun .ltr_ac_latency_vi = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VI,
1533*4882a593Smuzhiyun .ltr_ac_latency_vo = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_VO,
1534*4882a593Smuzhiyun .ltr_ac_latency_timeout = WMI_10_4_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT,
1535*4882a593Smuzhiyun .ltr_sleep_override = WMI_10_4_PDEV_PARAM_LTR_SLEEP_OVERRIDE,
1536*4882a593Smuzhiyun .ltr_rx_override = WMI_10_4_PDEV_PARAM_LTR_RX_OVERRIDE,
1537*4882a593Smuzhiyun .ltr_tx_activity_timeout = WMI_10_4_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT,
1538*4882a593Smuzhiyun .l1ss_enable = WMI_10_4_PDEV_PARAM_L1SS_ENABLE,
1539*4882a593Smuzhiyun .dsleep_enable = WMI_10_4_PDEV_PARAM_DSLEEP_ENABLE,
1540*4882a593Smuzhiyun .pcielp_txbuf_flush = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_FLUSH,
1541*4882a593Smuzhiyun .pcielp_txbuf_watermark = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_WATERMARK,
1542*4882a593Smuzhiyun .pcielp_txbuf_tmo_en = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_EN,
1543*4882a593Smuzhiyun .pcielp_txbuf_tmo_value = WMI_10_4_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE,
1544*4882a593Smuzhiyun .pdev_stats_update_period =
1545*4882a593Smuzhiyun WMI_10_4_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD,
1546*4882a593Smuzhiyun .vdev_stats_update_period =
1547*4882a593Smuzhiyun WMI_10_4_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD,
1548*4882a593Smuzhiyun .peer_stats_update_period =
1549*4882a593Smuzhiyun WMI_10_4_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD,
1550*4882a593Smuzhiyun .bcnflt_stats_update_period =
1551*4882a593Smuzhiyun WMI_10_4_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD,
1552*4882a593Smuzhiyun .pmf_qos = WMI_10_4_PDEV_PARAM_PMF_QOS,
1553*4882a593Smuzhiyun .arp_ac_override = WMI_10_4_PDEV_PARAM_ARP_AC_OVERRIDE,
1554*4882a593Smuzhiyun .dcs = WMI_10_4_PDEV_PARAM_DCS,
1555*4882a593Smuzhiyun .ani_enable = WMI_10_4_PDEV_PARAM_ANI_ENABLE,
1556*4882a593Smuzhiyun .ani_poll_period = WMI_10_4_PDEV_PARAM_ANI_POLL_PERIOD,
1557*4882a593Smuzhiyun .ani_listen_period = WMI_10_4_PDEV_PARAM_ANI_LISTEN_PERIOD,
1558*4882a593Smuzhiyun .ani_ofdm_level = WMI_10_4_PDEV_PARAM_ANI_OFDM_LEVEL,
1559*4882a593Smuzhiyun .ani_cck_level = WMI_10_4_PDEV_PARAM_ANI_CCK_LEVEL,
1560*4882a593Smuzhiyun .dyntxchain = WMI_10_4_PDEV_PARAM_DYNTXCHAIN,
1561*4882a593Smuzhiyun .proxy_sta = WMI_10_4_PDEV_PARAM_PROXY_STA,
1562*4882a593Smuzhiyun .idle_ps_config = WMI_10_4_PDEV_PARAM_IDLE_PS_CONFIG,
1563*4882a593Smuzhiyun .power_gating_sleep = WMI_10_4_PDEV_PARAM_POWER_GATING_SLEEP,
1564*4882a593Smuzhiyun .fast_channel_reset = WMI_10_4_PDEV_PARAM_FAST_CHANNEL_RESET,
1565*4882a593Smuzhiyun .burst_dur = WMI_10_4_PDEV_PARAM_BURST_DUR,
1566*4882a593Smuzhiyun .burst_enable = WMI_10_4_PDEV_PARAM_BURST_ENABLE,
1567*4882a593Smuzhiyun .cal_period = WMI_10_4_PDEV_PARAM_CAL_PERIOD,
1568*4882a593Smuzhiyun .aggr_burst = WMI_10_4_PDEV_PARAM_AGGR_BURST,
1569*4882a593Smuzhiyun .rx_decap_mode = WMI_10_4_PDEV_PARAM_RX_DECAP_MODE,
1570*4882a593Smuzhiyun .smart_antenna_default_antenna =
1571*4882a593Smuzhiyun WMI_10_4_PDEV_PARAM_SMART_ANTENNA_DEFAULT_ANTENNA,
1572*4882a593Smuzhiyun .igmpmld_override = WMI_10_4_PDEV_PARAM_IGMPMLD_OVERRIDE,
1573*4882a593Smuzhiyun .igmpmld_tid = WMI_10_4_PDEV_PARAM_IGMPMLD_TID,
1574*4882a593Smuzhiyun .antenna_gain = WMI_10_4_PDEV_PARAM_ANTENNA_GAIN,
1575*4882a593Smuzhiyun .rx_filter = WMI_10_4_PDEV_PARAM_RX_FILTER,
1576*4882a593Smuzhiyun .set_mcast_to_ucast_tid = WMI_10_4_PDEV_SET_MCAST_TO_UCAST_TID,
1577*4882a593Smuzhiyun .proxy_sta_mode = WMI_10_4_PDEV_PARAM_PROXY_STA_MODE,
1578*4882a593Smuzhiyun .set_mcast2ucast_mode = WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_MODE,
1579*4882a593Smuzhiyun .set_mcast2ucast_buffer = WMI_10_4_PDEV_PARAM_SET_MCAST2UCAST_BUFFER,
1580*4882a593Smuzhiyun .remove_mcast2ucast_buffer =
1581*4882a593Smuzhiyun WMI_10_4_PDEV_PARAM_REMOVE_MCAST2UCAST_BUFFER,
1582*4882a593Smuzhiyun .peer_sta_ps_statechg_enable =
1583*4882a593Smuzhiyun WMI_10_4_PDEV_PEER_STA_PS_STATECHG_ENABLE,
1584*4882a593Smuzhiyun .igmpmld_ac_override = WMI_10_4_PDEV_PARAM_IGMPMLD_AC_OVERRIDE,
1585*4882a593Smuzhiyun .block_interbss = WMI_10_4_PDEV_PARAM_BLOCK_INTERBSS,
1586*4882a593Smuzhiyun .set_disable_reset_cmdid = WMI_10_4_PDEV_PARAM_SET_DISABLE_RESET_CMDID,
1587*4882a593Smuzhiyun .set_msdu_ttl_cmdid = WMI_10_4_PDEV_PARAM_SET_MSDU_TTL_CMDID,
1588*4882a593Smuzhiyun .set_ppdu_duration_cmdid = WMI_10_4_PDEV_PARAM_SET_PPDU_DURATION_CMDID,
1589*4882a593Smuzhiyun .txbf_sound_period_cmdid = WMI_10_4_PDEV_PARAM_TXBF_SOUND_PERIOD_CMDID,
1590*4882a593Smuzhiyun .set_promisc_mode_cmdid = WMI_10_4_PDEV_PARAM_SET_PROMISC_MODE_CMDID,
1591*4882a593Smuzhiyun .set_burst_mode_cmdid = WMI_10_4_PDEV_PARAM_SET_BURST_MODE_CMDID,
1592*4882a593Smuzhiyun .en_stats = WMI_10_4_PDEV_PARAM_EN_STATS,
1593*4882a593Smuzhiyun .mu_group_policy = WMI_10_4_PDEV_PARAM_MU_GROUP_POLICY,
1594*4882a593Smuzhiyun .noise_detection = WMI_10_4_PDEV_PARAM_NOISE_DETECTION,
1595*4882a593Smuzhiyun .noise_threshold = WMI_10_4_PDEV_PARAM_NOISE_THRESHOLD,
1596*4882a593Smuzhiyun .dpd_enable = WMI_10_4_PDEV_PARAM_DPD_ENABLE,
1597*4882a593Smuzhiyun .set_mcast_bcast_echo = WMI_10_4_PDEV_PARAM_SET_MCAST_BCAST_ECHO,
1598*4882a593Smuzhiyun .atf_strict_sch = WMI_10_4_PDEV_PARAM_ATF_STRICT_SCH,
1599*4882a593Smuzhiyun .atf_sched_duration = WMI_10_4_PDEV_PARAM_ATF_SCHED_DURATION,
1600*4882a593Smuzhiyun .ant_plzn = WMI_10_4_PDEV_PARAM_ANT_PLZN,
1601*4882a593Smuzhiyun .mgmt_retry_limit = WMI_10_4_PDEV_PARAM_MGMT_RETRY_LIMIT,
1602*4882a593Smuzhiyun .sensitivity_level = WMI_10_4_PDEV_PARAM_SENSITIVITY_LEVEL,
1603*4882a593Smuzhiyun .signed_txpower_2g = WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_2G,
1604*4882a593Smuzhiyun .signed_txpower_5g = WMI_10_4_PDEV_PARAM_SIGNED_TXPOWER_5G,
1605*4882a593Smuzhiyun .enable_per_tid_amsdu = WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMSDU,
1606*4882a593Smuzhiyun .enable_per_tid_ampdu = WMI_10_4_PDEV_PARAM_ENABLE_PER_TID_AMPDU,
1607*4882a593Smuzhiyun .cca_threshold = WMI_10_4_PDEV_PARAM_CCA_THRESHOLD,
1608*4882a593Smuzhiyun .rts_fixed_rate = WMI_10_4_PDEV_PARAM_RTS_FIXED_RATE,
1609*4882a593Smuzhiyun .pdev_reset = WMI_10_4_PDEV_PARAM_PDEV_RESET,
1610*4882a593Smuzhiyun .wapi_mbssid_offset = WMI_10_4_PDEV_PARAM_WAPI_MBSSID_OFFSET,
1611*4882a593Smuzhiyun .arp_srcaddr = WMI_10_4_PDEV_PARAM_ARP_SRCADDR,
1612*4882a593Smuzhiyun .arp_dstaddr = WMI_10_4_PDEV_PARAM_ARP_DSTADDR,
1613*4882a593Smuzhiyun .enable_btcoex = WMI_10_4_PDEV_PARAM_ENABLE_BTCOEX,
1614*4882a593Smuzhiyun };
1615*4882a593Smuzhiyun
1616*4882a593Smuzhiyun static const u8 wmi_key_cipher_suites[] = {
1617*4882a593Smuzhiyun [WMI_CIPHER_NONE] = WMI_CIPHER_NONE,
1618*4882a593Smuzhiyun [WMI_CIPHER_WEP] = WMI_CIPHER_WEP,
1619*4882a593Smuzhiyun [WMI_CIPHER_TKIP] = WMI_CIPHER_TKIP,
1620*4882a593Smuzhiyun [WMI_CIPHER_AES_OCB] = WMI_CIPHER_AES_OCB,
1621*4882a593Smuzhiyun [WMI_CIPHER_AES_CCM] = WMI_CIPHER_AES_CCM,
1622*4882a593Smuzhiyun [WMI_CIPHER_WAPI] = WMI_CIPHER_WAPI,
1623*4882a593Smuzhiyun [WMI_CIPHER_CKIP] = WMI_CIPHER_CKIP,
1624*4882a593Smuzhiyun [WMI_CIPHER_AES_CMAC] = WMI_CIPHER_AES_CMAC,
1625*4882a593Smuzhiyun [WMI_CIPHER_AES_GCM] = WMI_CIPHER_AES_GCM,
1626*4882a593Smuzhiyun };
1627*4882a593Smuzhiyun
1628*4882a593Smuzhiyun static const u8 wmi_tlv_key_cipher_suites[] = {
1629*4882a593Smuzhiyun [WMI_CIPHER_NONE] = WMI_TLV_CIPHER_NONE,
1630*4882a593Smuzhiyun [WMI_CIPHER_WEP] = WMI_TLV_CIPHER_WEP,
1631*4882a593Smuzhiyun [WMI_CIPHER_TKIP] = WMI_TLV_CIPHER_TKIP,
1632*4882a593Smuzhiyun [WMI_CIPHER_AES_OCB] = WMI_TLV_CIPHER_AES_OCB,
1633*4882a593Smuzhiyun [WMI_CIPHER_AES_CCM] = WMI_TLV_CIPHER_AES_CCM,
1634*4882a593Smuzhiyun [WMI_CIPHER_WAPI] = WMI_TLV_CIPHER_WAPI,
1635*4882a593Smuzhiyun [WMI_CIPHER_CKIP] = WMI_TLV_CIPHER_CKIP,
1636*4882a593Smuzhiyun [WMI_CIPHER_AES_CMAC] = WMI_TLV_CIPHER_AES_CMAC,
1637*4882a593Smuzhiyun [WMI_CIPHER_AES_GCM] = WMI_TLV_CIPHER_AES_GCM,
1638*4882a593Smuzhiyun };
1639*4882a593Smuzhiyun
1640*4882a593Smuzhiyun static const struct wmi_peer_flags_map wmi_peer_flags_map = {
1641*4882a593Smuzhiyun .auth = WMI_PEER_AUTH,
1642*4882a593Smuzhiyun .qos = WMI_PEER_QOS,
1643*4882a593Smuzhiyun .need_ptk_4_way = WMI_PEER_NEED_PTK_4_WAY,
1644*4882a593Smuzhiyun .need_gtk_2_way = WMI_PEER_NEED_GTK_2_WAY,
1645*4882a593Smuzhiyun .apsd = WMI_PEER_APSD,
1646*4882a593Smuzhiyun .ht = WMI_PEER_HT,
1647*4882a593Smuzhiyun .bw40 = WMI_PEER_40MHZ,
1648*4882a593Smuzhiyun .stbc = WMI_PEER_STBC,
1649*4882a593Smuzhiyun .ldbc = WMI_PEER_LDPC,
1650*4882a593Smuzhiyun .dyn_mimops = WMI_PEER_DYN_MIMOPS,
1651*4882a593Smuzhiyun .static_mimops = WMI_PEER_STATIC_MIMOPS,
1652*4882a593Smuzhiyun .spatial_mux = WMI_PEER_SPATIAL_MUX,
1653*4882a593Smuzhiyun .vht = WMI_PEER_VHT,
1654*4882a593Smuzhiyun .bw80 = WMI_PEER_80MHZ,
1655*4882a593Smuzhiyun .vht_2g = WMI_PEER_VHT_2G,
1656*4882a593Smuzhiyun .pmf = WMI_PEER_PMF,
1657*4882a593Smuzhiyun .bw160 = WMI_PEER_160MHZ,
1658*4882a593Smuzhiyun };
1659*4882a593Smuzhiyun
1660*4882a593Smuzhiyun static const struct wmi_peer_flags_map wmi_10x_peer_flags_map = {
1661*4882a593Smuzhiyun .auth = WMI_10X_PEER_AUTH,
1662*4882a593Smuzhiyun .qos = WMI_10X_PEER_QOS,
1663*4882a593Smuzhiyun .need_ptk_4_way = WMI_10X_PEER_NEED_PTK_4_WAY,
1664*4882a593Smuzhiyun .need_gtk_2_way = WMI_10X_PEER_NEED_GTK_2_WAY,
1665*4882a593Smuzhiyun .apsd = WMI_10X_PEER_APSD,
1666*4882a593Smuzhiyun .ht = WMI_10X_PEER_HT,
1667*4882a593Smuzhiyun .bw40 = WMI_10X_PEER_40MHZ,
1668*4882a593Smuzhiyun .stbc = WMI_10X_PEER_STBC,
1669*4882a593Smuzhiyun .ldbc = WMI_10X_PEER_LDPC,
1670*4882a593Smuzhiyun .dyn_mimops = WMI_10X_PEER_DYN_MIMOPS,
1671*4882a593Smuzhiyun .static_mimops = WMI_10X_PEER_STATIC_MIMOPS,
1672*4882a593Smuzhiyun .spatial_mux = WMI_10X_PEER_SPATIAL_MUX,
1673*4882a593Smuzhiyun .vht = WMI_10X_PEER_VHT,
1674*4882a593Smuzhiyun .bw80 = WMI_10X_PEER_80MHZ,
1675*4882a593Smuzhiyun .bw160 = WMI_10X_PEER_160MHZ,
1676*4882a593Smuzhiyun };
1677*4882a593Smuzhiyun
1678*4882a593Smuzhiyun static const struct wmi_peer_flags_map wmi_10_2_peer_flags_map = {
1679*4882a593Smuzhiyun .auth = WMI_10_2_PEER_AUTH,
1680*4882a593Smuzhiyun .qos = WMI_10_2_PEER_QOS,
1681*4882a593Smuzhiyun .need_ptk_4_way = WMI_10_2_PEER_NEED_PTK_4_WAY,
1682*4882a593Smuzhiyun .need_gtk_2_way = WMI_10_2_PEER_NEED_GTK_2_WAY,
1683*4882a593Smuzhiyun .apsd = WMI_10_2_PEER_APSD,
1684*4882a593Smuzhiyun .ht = WMI_10_2_PEER_HT,
1685*4882a593Smuzhiyun .bw40 = WMI_10_2_PEER_40MHZ,
1686*4882a593Smuzhiyun .stbc = WMI_10_2_PEER_STBC,
1687*4882a593Smuzhiyun .ldbc = WMI_10_2_PEER_LDPC,
1688*4882a593Smuzhiyun .dyn_mimops = WMI_10_2_PEER_DYN_MIMOPS,
1689*4882a593Smuzhiyun .static_mimops = WMI_10_2_PEER_STATIC_MIMOPS,
1690*4882a593Smuzhiyun .spatial_mux = WMI_10_2_PEER_SPATIAL_MUX,
1691*4882a593Smuzhiyun .vht = WMI_10_2_PEER_VHT,
1692*4882a593Smuzhiyun .bw80 = WMI_10_2_PEER_80MHZ,
1693*4882a593Smuzhiyun .vht_2g = WMI_10_2_PEER_VHT_2G,
1694*4882a593Smuzhiyun .pmf = WMI_10_2_PEER_PMF,
1695*4882a593Smuzhiyun .bw160 = WMI_10_2_PEER_160MHZ,
1696*4882a593Smuzhiyun };
1697*4882a593Smuzhiyun
ath10k_wmi_put_wmi_channel(struct ath10k * ar,struct wmi_channel * ch,const struct wmi_channel_arg * arg)1698*4882a593Smuzhiyun void ath10k_wmi_put_wmi_channel(struct ath10k *ar, struct wmi_channel *ch,
1699*4882a593Smuzhiyun const struct wmi_channel_arg *arg)
1700*4882a593Smuzhiyun {
1701*4882a593Smuzhiyun u32 flags = 0;
1702*4882a593Smuzhiyun struct ieee80211_channel *chan = NULL;
1703*4882a593Smuzhiyun
1704*4882a593Smuzhiyun memset(ch, 0, sizeof(*ch));
1705*4882a593Smuzhiyun
1706*4882a593Smuzhiyun if (arg->passive)
1707*4882a593Smuzhiyun flags |= WMI_CHAN_FLAG_PASSIVE;
1708*4882a593Smuzhiyun if (arg->allow_ibss)
1709*4882a593Smuzhiyun flags |= WMI_CHAN_FLAG_ADHOC_ALLOWED;
1710*4882a593Smuzhiyun if (arg->allow_ht)
1711*4882a593Smuzhiyun flags |= WMI_CHAN_FLAG_ALLOW_HT;
1712*4882a593Smuzhiyun if (arg->allow_vht)
1713*4882a593Smuzhiyun flags |= WMI_CHAN_FLAG_ALLOW_VHT;
1714*4882a593Smuzhiyun if (arg->ht40plus)
1715*4882a593Smuzhiyun flags |= WMI_CHAN_FLAG_HT40_PLUS;
1716*4882a593Smuzhiyun if (arg->chan_radar)
1717*4882a593Smuzhiyun flags |= WMI_CHAN_FLAG_DFS;
1718*4882a593Smuzhiyun
1719*4882a593Smuzhiyun ch->band_center_freq2 = 0;
1720*4882a593Smuzhiyun ch->mhz = __cpu_to_le32(arg->freq);
1721*4882a593Smuzhiyun ch->band_center_freq1 = __cpu_to_le32(arg->band_center_freq1);
1722*4882a593Smuzhiyun if (arg->mode == MODE_11AC_VHT80_80) {
1723*4882a593Smuzhiyun ch->band_center_freq2 = __cpu_to_le32(arg->band_center_freq2);
1724*4882a593Smuzhiyun chan = ieee80211_get_channel(ar->hw->wiphy,
1725*4882a593Smuzhiyun arg->band_center_freq2 - 10);
1726*4882a593Smuzhiyun }
1727*4882a593Smuzhiyun
1728*4882a593Smuzhiyun if (arg->mode == MODE_11AC_VHT160) {
1729*4882a593Smuzhiyun u32 band_center_freq1;
1730*4882a593Smuzhiyun u32 band_center_freq2;
1731*4882a593Smuzhiyun
1732*4882a593Smuzhiyun if (arg->freq > arg->band_center_freq1) {
1733*4882a593Smuzhiyun band_center_freq1 = arg->band_center_freq1 + 40;
1734*4882a593Smuzhiyun band_center_freq2 = arg->band_center_freq1 - 40;
1735*4882a593Smuzhiyun } else {
1736*4882a593Smuzhiyun band_center_freq1 = arg->band_center_freq1 - 40;
1737*4882a593Smuzhiyun band_center_freq2 = arg->band_center_freq1 + 40;
1738*4882a593Smuzhiyun }
1739*4882a593Smuzhiyun
1740*4882a593Smuzhiyun ch->band_center_freq1 =
1741*4882a593Smuzhiyun __cpu_to_le32(band_center_freq1);
1742*4882a593Smuzhiyun /* Minus 10 to get a defined 5G channel frequency*/
1743*4882a593Smuzhiyun chan = ieee80211_get_channel(ar->hw->wiphy,
1744*4882a593Smuzhiyun band_center_freq2 - 10);
1745*4882a593Smuzhiyun /* The center frequency of the entire VHT160 */
1746*4882a593Smuzhiyun ch->band_center_freq2 = __cpu_to_le32(arg->band_center_freq1);
1747*4882a593Smuzhiyun }
1748*4882a593Smuzhiyun
1749*4882a593Smuzhiyun if (chan && chan->flags & IEEE80211_CHAN_RADAR)
1750*4882a593Smuzhiyun flags |= WMI_CHAN_FLAG_DFS_CFREQ2;
1751*4882a593Smuzhiyun
1752*4882a593Smuzhiyun ch->min_power = arg->min_power;
1753*4882a593Smuzhiyun ch->max_power = arg->max_power;
1754*4882a593Smuzhiyun ch->reg_power = arg->max_reg_power;
1755*4882a593Smuzhiyun ch->antenna_max = arg->max_antenna_gain;
1756*4882a593Smuzhiyun ch->max_tx_power = arg->max_power;
1757*4882a593Smuzhiyun
1758*4882a593Smuzhiyun /* mode & flags share storage */
1759*4882a593Smuzhiyun ch->mode = arg->mode;
1760*4882a593Smuzhiyun ch->flags |= __cpu_to_le32(flags);
1761*4882a593Smuzhiyun }
1762*4882a593Smuzhiyun
ath10k_wmi_wait_for_service_ready(struct ath10k * ar)1763*4882a593Smuzhiyun int ath10k_wmi_wait_for_service_ready(struct ath10k *ar)
1764*4882a593Smuzhiyun {
1765*4882a593Smuzhiyun unsigned long time_left;
1766*4882a593Smuzhiyun
1767*4882a593Smuzhiyun time_left = wait_for_completion_timeout(&ar->wmi.service_ready,
1768*4882a593Smuzhiyun WMI_SERVICE_READY_TIMEOUT_HZ);
1769*4882a593Smuzhiyun if (!time_left)
1770*4882a593Smuzhiyun return -ETIMEDOUT;
1771*4882a593Smuzhiyun return 0;
1772*4882a593Smuzhiyun }
1773*4882a593Smuzhiyun
ath10k_wmi_wait_for_unified_ready(struct ath10k * ar)1774*4882a593Smuzhiyun int ath10k_wmi_wait_for_unified_ready(struct ath10k *ar)
1775*4882a593Smuzhiyun {
1776*4882a593Smuzhiyun unsigned long time_left;
1777*4882a593Smuzhiyun
1778*4882a593Smuzhiyun time_left = wait_for_completion_timeout(&ar->wmi.unified_ready,
1779*4882a593Smuzhiyun WMI_UNIFIED_READY_TIMEOUT_HZ);
1780*4882a593Smuzhiyun if (!time_left)
1781*4882a593Smuzhiyun return -ETIMEDOUT;
1782*4882a593Smuzhiyun return 0;
1783*4882a593Smuzhiyun }
1784*4882a593Smuzhiyun
ath10k_wmi_alloc_skb(struct ath10k * ar,u32 len)1785*4882a593Smuzhiyun struct sk_buff *ath10k_wmi_alloc_skb(struct ath10k *ar, u32 len)
1786*4882a593Smuzhiyun {
1787*4882a593Smuzhiyun struct sk_buff *skb;
1788*4882a593Smuzhiyun u32 round_len = roundup(len, 4);
1789*4882a593Smuzhiyun
1790*4882a593Smuzhiyun skb = ath10k_htc_alloc_skb(ar, WMI_SKB_HEADROOM + round_len);
1791*4882a593Smuzhiyun if (!skb)
1792*4882a593Smuzhiyun return NULL;
1793*4882a593Smuzhiyun
1794*4882a593Smuzhiyun skb_reserve(skb, WMI_SKB_HEADROOM);
1795*4882a593Smuzhiyun if (!IS_ALIGNED((unsigned long)skb->data, 4))
1796*4882a593Smuzhiyun ath10k_warn(ar, "Unaligned WMI skb\n");
1797*4882a593Smuzhiyun
1798*4882a593Smuzhiyun skb_put(skb, round_len);
1799*4882a593Smuzhiyun memset(skb->data, 0, round_len);
1800*4882a593Smuzhiyun
1801*4882a593Smuzhiyun return skb;
1802*4882a593Smuzhiyun }
1803*4882a593Smuzhiyun
ath10k_wmi_htc_tx_complete(struct ath10k * ar,struct sk_buff * skb)1804*4882a593Smuzhiyun static void ath10k_wmi_htc_tx_complete(struct ath10k *ar, struct sk_buff *skb)
1805*4882a593Smuzhiyun {
1806*4882a593Smuzhiyun dev_kfree_skb(skb);
1807*4882a593Smuzhiyun }
1808*4882a593Smuzhiyun
ath10k_wmi_cmd_send_nowait(struct ath10k * ar,struct sk_buff * skb,u32 cmd_id)1809*4882a593Smuzhiyun int ath10k_wmi_cmd_send_nowait(struct ath10k *ar, struct sk_buff *skb,
1810*4882a593Smuzhiyun u32 cmd_id)
1811*4882a593Smuzhiyun {
1812*4882a593Smuzhiyun struct ath10k_skb_cb *skb_cb = ATH10K_SKB_CB(skb);
1813*4882a593Smuzhiyun struct wmi_cmd_hdr *cmd_hdr;
1814*4882a593Smuzhiyun int ret;
1815*4882a593Smuzhiyun u32 cmd = 0;
1816*4882a593Smuzhiyun
1817*4882a593Smuzhiyun if (skb_push(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
1818*4882a593Smuzhiyun return -ENOMEM;
1819*4882a593Smuzhiyun
1820*4882a593Smuzhiyun cmd |= SM(cmd_id, WMI_CMD_HDR_CMD_ID);
1821*4882a593Smuzhiyun
1822*4882a593Smuzhiyun cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
1823*4882a593Smuzhiyun cmd_hdr->cmd_id = __cpu_to_le32(cmd);
1824*4882a593Smuzhiyun
1825*4882a593Smuzhiyun memset(skb_cb, 0, sizeof(*skb_cb));
1826*4882a593Smuzhiyun trace_ath10k_wmi_cmd(ar, cmd_id, skb->data, skb->len);
1827*4882a593Smuzhiyun ret = ath10k_htc_send(&ar->htc, ar->wmi.eid, skb);
1828*4882a593Smuzhiyun
1829*4882a593Smuzhiyun if (ret)
1830*4882a593Smuzhiyun goto err_pull;
1831*4882a593Smuzhiyun
1832*4882a593Smuzhiyun return 0;
1833*4882a593Smuzhiyun
1834*4882a593Smuzhiyun err_pull:
1835*4882a593Smuzhiyun skb_pull(skb, sizeof(struct wmi_cmd_hdr));
1836*4882a593Smuzhiyun return ret;
1837*4882a593Smuzhiyun }
1838*4882a593Smuzhiyun
ath10k_wmi_tx_beacon_nowait(struct ath10k_vif * arvif)1839*4882a593Smuzhiyun static void ath10k_wmi_tx_beacon_nowait(struct ath10k_vif *arvif)
1840*4882a593Smuzhiyun {
1841*4882a593Smuzhiyun struct ath10k *ar = arvif->ar;
1842*4882a593Smuzhiyun struct ath10k_skb_cb *cb;
1843*4882a593Smuzhiyun struct sk_buff *bcn;
1844*4882a593Smuzhiyun bool dtim_zero;
1845*4882a593Smuzhiyun bool deliver_cab;
1846*4882a593Smuzhiyun int ret;
1847*4882a593Smuzhiyun
1848*4882a593Smuzhiyun spin_lock_bh(&ar->data_lock);
1849*4882a593Smuzhiyun
1850*4882a593Smuzhiyun bcn = arvif->beacon;
1851*4882a593Smuzhiyun
1852*4882a593Smuzhiyun if (!bcn)
1853*4882a593Smuzhiyun goto unlock;
1854*4882a593Smuzhiyun
1855*4882a593Smuzhiyun cb = ATH10K_SKB_CB(bcn);
1856*4882a593Smuzhiyun
1857*4882a593Smuzhiyun switch (arvif->beacon_state) {
1858*4882a593Smuzhiyun case ATH10K_BEACON_SENDING:
1859*4882a593Smuzhiyun case ATH10K_BEACON_SENT:
1860*4882a593Smuzhiyun break;
1861*4882a593Smuzhiyun case ATH10K_BEACON_SCHEDULED:
1862*4882a593Smuzhiyun arvif->beacon_state = ATH10K_BEACON_SENDING;
1863*4882a593Smuzhiyun spin_unlock_bh(&ar->data_lock);
1864*4882a593Smuzhiyun
1865*4882a593Smuzhiyun dtim_zero = !!(cb->flags & ATH10K_SKB_F_DTIM_ZERO);
1866*4882a593Smuzhiyun deliver_cab = !!(cb->flags & ATH10K_SKB_F_DELIVER_CAB);
1867*4882a593Smuzhiyun ret = ath10k_wmi_beacon_send_ref_nowait(arvif->ar,
1868*4882a593Smuzhiyun arvif->vdev_id,
1869*4882a593Smuzhiyun bcn->data, bcn->len,
1870*4882a593Smuzhiyun cb->paddr,
1871*4882a593Smuzhiyun dtim_zero,
1872*4882a593Smuzhiyun deliver_cab);
1873*4882a593Smuzhiyun
1874*4882a593Smuzhiyun spin_lock_bh(&ar->data_lock);
1875*4882a593Smuzhiyun
1876*4882a593Smuzhiyun if (ret == 0)
1877*4882a593Smuzhiyun arvif->beacon_state = ATH10K_BEACON_SENT;
1878*4882a593Smuzhiyun else
1879*4882a593Smuzhiyun arvif->beacon_state = ATH10K_BEACON_SCHEDULED;
1880*4882a593Smuzhiyun }
1881*4882a593Smuzhiyun
1882*4882a593Smuzhiyun unlock:
1883*4882a593Smuzhiyun spin_unlock_bh(&ar->data_lock);
1884*4882a593Smuzhiyun }
1885*4882a593Smuzhiyun
ath10k_wmi_tx_beacons_iter(void * data,u8 * mac,struct ieee80211_vif * vif)1886*4882a593Smuzhiyun static void ath10k_wmi_tx_beacons_iter(void *data, u8 *mac,
1887*4882a593Smuzhiyun struct ieee80211_vif *vif)
1888*4882a593Smuzhiyun {
1889*4882a593Smuzhiyun struct ath10k_vif *arvif = (void *)vif->drv_priv;
1890*4882a593Smuzhiyun
1891*4882a593Smuzhiyun ath10k_wmi_tx_beacon_nowait(arvif);
1892*4882a593Smuzhiyun }
1893*4882a593Smuzhiyun
ath10k_wmi_tx_beacons_nowait(struct ath10k * ar)1894*4882a593Smuzhiyun static void ath10k_wmi_tx_beacons_nowait(struct ath10k *ar)
1895*4882a593Smuzhiyun {
1896*4882a593Smuzhiyun ieee80211_iterate_active_interfaces_atomic(ar->hw,
1897*4882a593Smuzhiyun IEEE80211_IFACE_ITER_NORMAL,
1898*4882a593Smuzhiyun ath10k_wmi_tx_beacons_iter,
1899*4882a593Smuzhiyun NULL);
1900*4882a593Smuzhiyun }
1901*4882a593Smuzhiyun
ath10k_wmi_op_ep_tx_credits(struct ath10k * ar)1902*4882a593Smuzhiyun static void ath10k_wmi_op_ep_tx_credits(struct ath10k *ar)
1903*4882a593Smuzhiyun {
1904*4882a593Smuzhiyun /* try to send pending beacons first. they take priority */
1905*4882a593Smuzhiyun ath10k_wmi_tx_beacons_nowait(ar);
1906*4882a593Smuzhiyun
1907*4882a593Smuzhiyun wake_up(&ar->wmi.tx_credits_wq);
1908*4882a593Smuzhiyun }
1909*4882a593Smuzhiyun
ath10k_wmi_cmd_send(struct ath10k * ar,struct sk_buff * skb,u32 cmd_id)1910*4882a593Smuzhiyun int ath10k_wmi_cmd_send(struct ath10k *ar, struct sk_buff *skb, u32 cmd_id)
1911*4882a593Smuzhiyun {
1912*4882a593Smuzhiyun int ret = -EOPNOTSUPP;
1913*4882a593Smuzhiyun
1914*4882a593Smuzhiyun might_sleep();
1915*4882a593Smuzhiyun
1916*4882a593Smuzhiyun if (cmd_id == WMI_CMD_UNSUPPORTED) {
1917*4882a593Smuzhiyun ath10k_warn(ar, "wmi command %d is not supported by firmware\n",
1918*4882a593Smuzhiyun cmd_id);
1919*4882a593Smuzhiyun return ret;
1920*4882a593Smuzhiyun }
1921*4882a593Smuzhiyun
1922*4882a593Smuzhiyun wait_event_timeout(ar->wmi.tx_credits_wq, ({
1923*4882a593Smuzhiyun /* try to send pending beacons first. they take priority */
1924*4882a593Smuzhiyun ath10k_wmi_tx_beacons_nowait(ar);
1925*4882a593Smuzhiyun
1926*4882a593Smuzhiyun ret = ath10k_wmi_cmd_send_nowait(ar, skb, cmd_id);
1927*4882a593Smuzhiyun
1928*4882a593Smuzhiyun if (ret && test_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags))
1929*4882a593Smuzhiyun ret = -ESHUTDOWN;
1930*4882a593Smuzhiyun
1931*4882a593Smuzhiyun (ret != -EAGAIN);
1932*4882a593Smuzhiyun }), 3 * HZ);
1933*4882a593Smuzhiyun
1934*4882a593Smuzhiyun if (ret)
1935*4882a593Smuzhiyun dev_kfree_skb_any(skb);
1936*4882a593Smuzhiyun
1937*4882a593Smuzhiyun if (ret == -EAGAIN) {
1938*4882a593Smuzhiyun ath10k_warn(ar, "wmi command %d timeout, restarting hardware\n",
1939*4882a593Smuzhiyun cmd_id);
1940*4882a593Smuzhiyun queue_work(ar->workqueue, &ar->restart_work);
1941*4882a593Smuzhiyun }
1942*4882a593Smuzhiyun
1943*4882a593Smuzhiyun return ret;
1944*4882a593Smuzhiyun }
1945*4882a593Smuzhiyun
1946*4882a593Smuzhiyun static struct sk_buff *
ath10k_wmi_op_gen_mgmt_tx(struct ath10k * ar,struct sk_buff * msdu)1947*4882a593Smuzhiyun ath10k_wmi_op_gen_mgmt_tx(struct ath10k *ar, struct sk_buff *msdu)
1948*4882a593Smuzhiyun {
1949*4882a593Smuzhiyun struct ath10k_skb_cb *cb = ATH10K_SKB_CB(msdu);
1950*4882a593Smuzhiyun struct ath10k_vif *arvif;
1951*4882a593Smuzhiyun struct wmi_mgmt_tx_cmd *cmd;
1952*4882a593Smuzhiyun struct ieee80211_hdr *hdr;
1953*4882a593Smuzhiyun struct sk_buff *skb;
1954*4882a593Smuzhiyun int len;
1955*4882a593Smuzhiyun u32 vdev_id;
1956*4882a593Smuzhiyun u32 buf_len = msdu->len;
1957*4882a593Smuzhiyun u16 fc;
1958*4882a593Smuzhiyun const u8 *peer_addr;
1959*4882a593Smuzhiyun
1960*4882a593Smuzhiyun hdr = (struct ieee80211_hdr *)msdu->data;
1961*4882a593Smuzhiyun fc = le16_to_cpu(hdr->frame_control);
1962*4882a593Smuzhiyun
1963*4882a593Smuzhiyun if (cb->vif) {
1964*4882a593Smuzhiyun arvif = (void *)cb->vif->drv_priv;
1965*4882a593Smuzhiyun vdev_id = arvif->vdev_id;
1966*4882a593Smuzhiyun } else {
1967*4882a593Smuzhiyun vdev_id = 0;
1968*4882a593Smuzhiyun }
1969*4882a593Smuzhiyun
1970*4882a593Smuzhiyun if (WARN_ON_ONCE(!ieee80211_is_mgmt(hdr->frame_control)))
1971*4882a593Smuzhiyun return ERR_PTR(-EINVAL);
1972*4882a593Smuzhiyun
1973*4882a593Smuzhiyun len = sizeof(cmd->hdr) + msdu->len;
1974*4882a593Smuzhiyun
1975*4882a593Smuzhiyun if ((ieee80211_is_action(hdr->frame_control) ||
1976*4882a593Smuzhiyun ieee80211_is_deauth(hdr->frame_control) ||
1977*4882a593Smuzhiyun ieee80211_is_disassoc(hdr->frame_control)) &&
1978*4882a593Smuzhiyun ieee80211_has_protected(hdr->frame_control)) {
1979*4882a593Smuzhiyun peer_addr = hdr->addr1;
1980*4882a593Smuzhiyun if (is_multicast_ether_addr(peer_addr)) {
1981*4882a593Smuzhiyun len += sizeof(struct ieee80211_mmie_16);
1982*4882a593Smuzhiyun buf_len += sizeof(struct ieee80211_mmie_16);
1983*4882a593Smuzhiyun } else {
1984*4882a593Smuzhiyun if (cb->ucast_cipher == WLAN_CIPHER_SUITE_GCMP ||
1985*4882a593Smuzhiyun cb->ucast_cipher == WLAN_CIPHER_SUITE_GCMP_256) {
1986*4882a593Smuzhiyun len += IEEE80211_GCMP_MIC_LEN;
1987*4882a593Smuzhiyun buf_len += IEEE80211_GCMP_MIC_LEN;
1988*4882a593Smuzhiyun } else {
1989*4882a593Smuzhiyun len += IEEE80211_CCMP_MIC_LEN;
1990*4882a593Smuzhiyun buf_len += IEEE80211_CCMP_MIC_LEN;
1991*4882a593Smuzhiyun }
1992*4882a593Smuzhiyun }
1993*4882a593Smuzhiyun }
1994*4882a593Smuzhiyun
1995*4882a593Smuzhiyun len = round_up(len, 4);
1996*4882a593Smuzhiyun
1997*4882a593Smuzhiyun skb = ath10k_wmi_alloc_skb(ar, len);
1998*4882a593Smuzhiyun if (!skb)
1999*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
2000*4882a593Smuzhiyun
2001*4882a593Smuzhiyun cmd = (struct wmi_mgmt_tx_cmd *)skb->data;
2002*4882a593Smuzhiyun
2003*4882a593Smuzhiyun cmd->hdr.vdev_id = __cpu_to_le32(vdev_id);
2004*4882a593Smuzhiyun cmd->hdr.tx_rate = 0;
2005*4882a593Smuzhiyun cmd->hdr.tx_power = 0;
2006*4882a593Smuzhiyun cmd->hdr.buf_len = __cpu_to_le32(buf_len);
2007*4882a593Smuzhiyun
2008*4882a593Smuzhiyun ether_addr_copy(cmd->hdr.peer_macaddr.addr, ieee80211_get_DA(hdr));
2009*4882a593Smuzhiyun memcpy(cmd->buf, msdu->data, msdu->len);
2010*4882a593Smuzhiyun
2011*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi mgmt tx skb %pK len %d ftype %02x stype %02x\n",
2012*4882a593Smuzhiyun msdu, skb->len, fc & IEEE80211_FCTL_FTYPE,
2013*4882a593Smuzhiyun fc & IEEE80211_FCTL_STYPE);
2014*4882a593Smuzhiyun trace_ath10k_tx_hdr(ar, skb->data, skb->len);
2015*4882a593Smuzhiyun trace_ath10k_tx_payload(ar, skb->data, skb->len);
2016*4882a593Smuzhiyun
2017*4882a593Smuzhiyun return skb;
2018*4882a593Smuzhiyun }
2019*4882a593Smuzhiyun
ath10k_wmi_event_scan_started(struct ath10k * ar)2020*4882a593Smuzhiyun static void ath10k_wmi_event_scan_started(struct ath10k *ar)
2021*4882a593Smuzhiyun {
2022*4882a593Smuzhiyun lockdep_assert_held(&ar->data_lock);
2023*4882a593Smuzhiyun
2024*4882a593Smuzhiyun switch (ar->scan.state) {
2025*4882a593Smuzhiyun case ATH10K_SCAN_IDLE:
2026*4882a593Smuzhiyun case ATH10K_SCAN_RUNNING:
2027*4882a593Smuzhiyun case ATH10K_SCAN_ABORTING:
2028*4882a593Smuzhiyun ath10k_warn(ar, "received scan started event in an invalid scan state: %s (%d)\n",
2029*4882a593Smuzhiyun ath10k_scan_state_str(ar->scan.state),
2030*4882a593Smuzhiyun ar->scan.state);
2031*4882a593Smuzhiyun break;
2032*4882a593Smuzhiyun case ATH10K_SCAN_STARTING:
2033*4882a593Smuzhiyun ar->scan.state = ATH10K_SCAN_RUNNING;
2034*4882a593Smuzhiyun
2035*4882a593Smuzhiyun if (ar->scan.is_roc)
2036*4882a593Smuzhiyun ieee80211_ready_on_channel(ar->hw);
2037*4882a593Smuzhiyun
2038*4882a593Smuzhiyun complete(&ar->scan.started);
2039*4882a593Smuzhiyun break;
2040*4882a593Smuzhiyun }
2041*4882a593Smuzhiyun }
2042*4882a593Smuzhiyun
ath10k_wmi_event_scan_start_failed(struct ath10k * ar)2043*4882a593Smuzhiyun static void ath10k_wmi_event_scan_start_failed(struct ath10k *ar)
2044*4882a593Smuzhiyun {
2045*4882a593Smuzhiyun lockdep_assert_held(&ar->data_lock);
2046*4882a593Smuzhiyun
2047*4882a593Smuzhiyun switch (ar->scan.state) {
2048*4882a593Smuzhiyun case ATH10K_SCAN_IDLE:
2049*4882a593Smuzhiyun case ATH10K_SCAN_RUNNING:
2050*4882a593Smuzhiyun case ATH10K_SCAN_ABORTING:
2051*4882a593Smuzhiyun ath10k_warn(ar, "received scan start failed event in an invalid scan state: %s (%d)\n",
2052*4882a593Smuzhiyun ath10k_scan_state_str(ar->scan.state),
2053*4882a593Smuzhiyun ar->scan.state);
2054*4882a593Smuzhiyun break;
2055*4882a593Smuzhiyun case ATH10K_SCAN_STARTING:
2056*4882a593Smuzhiyun complete(&ar->scan.started);
2057*4882a593Smuzhiyun __ath10k_scan_finish(ar);
2058*4882a593Smuzhiyun break;
2059*4882a593Smuzhiyun }
2060*4882a593Smuzhiyun }
2061*4882a593Smuzhiyun
ath10k_wmi_event_scan_completed(struct ath10k * ar)2062*4882a593Smuzhiyun static void ath10k_wmi_event_scan_completed(struct ath10k *ar)
2063*4882a593Smuzhiyun {
2064*4882a593Smuzhiyun lockdep_assert_held(&ar->data_lock);
2065*4882a593Smuzhiyun
2066*4882a593Smuzhiyun switch (ar->scan.state) {
2067*4882a593Smuzhiyun case ATH10K_SCAN_IDLE:
2068*4882a593Smuzhiyun case ATH10K_SCAN_STARTING:
2069*4882a593Smuzhiyun /* One suspected reason scan can be completed while starting is
2070*4882a593Smuzhiyun * if firmware fails to deliver all scan events to the host,
2071*4882a593Smuzhiyun * e.g. when transport pipe is full. This has been observed
2072*4882a593Smuzhiyun * with spectral scan phyerr events starving wmi transport
2073*4882a593Smuzhiyun * pipe. In such case the "scan completed" event should be (and
2074*4882a593Smuzhiyun * is) ignored by the host as it may be just firmware's scan
2075*4882a593Smuzhiyun * state machine recovering.
2076*4882a593Smuzhiyun */
2077*4882a593Smuzhiyun ath10k_warn(ar, "received scan completed event in an invalid scan state: %s (%d)\n",
2078*4882a593Smuzhiyun ath10k_scan_state_str(ar->scan.state),
2079*4882a593Smuzhiyun ar->scan.state);
2080*4882a593Smuzhiyun break;
2081*4882a593Smuzhiyun case ATH10K_SCAN_RUNNING:
2082*4882a593Smuzhiyun case ATH10K_SCAN_ABORTING:
2083*4882a593Smuzhiyun __ath10k_scan_finish(ar);
2084*4882a593Smuzhiyun break;
2085*4882a593Smuzhiyun }
2086*4882a593Smuzhiyun }
2087*4882a593Smuzhiyun
ath10k_wmi_event_scan_bss_chan(struct ath10k * ar)2088*4882a593Smuzhiyun static void ath10k_wmi_event_scan_bss_chan(struct ath10k *ar)
2089*4882a593Smuzhiyun {
2090*4882a593Smuzhiyun lockdep_assert_held(&ar->data_lock);
2091*4882a593Smuzhiyun
2092*4882a593Smuzhiyun switch (ar->scan.state) {
2093*4882a593Smuzhiyun case ATH10K_SCAN_IDLE:
2094*4882a593Smuzhiyun case ATH10K_SCAN_STARTING:
2095*4882a593Smuzhiyun ath10k_warn(ar, "received scan bss chan event in an invalid scan state: %s (%d)\n",
2096*4882a593Smuzhiyun ath10k_scan_state_str(ar->scan.state),
2097*4882a593Smuzhiyun ar->scan.state);
2098*4882a593Smuzhiyun break;
2099*4882a593Smuzhiyun case ATH10K_SCAN_RUNNING:
2100*4882a593Smuzhiyun case ATH10K_SCAN_ABORTING:
2101*4882a593Smuzhiyun ar->scan_channel = NULL;
2102*4882a593Smuzhiyun break;
2103*4882a593Smuzhiyun }
2104*4882a593Smuzhiyun }
2105*4882a593Smuzhiyun
ath10k_wmi_event_scan_foreign_chan(struct ath10k * ar,u32 freq)2106*4882a593Smuzhiyun static void ath10k_wmi_event_scan_foreign_chan(struct ath10k *ar, u32 freq)
2107*4882a593Smuzhiyun {
2108*4882a593Smuzhiyun lockdep_assert_held(&ar->data_lock);
2109*4882a593Smuzhiyun
2110*4882a593Smuzhiyun switch (ar->scan.state) {
2111*4882a593Smuzhiyun case ATH10K_SCAN_IDLE:
2112*4882a593Smuzhiyun case ATH10K_SCAN_STARTING:
2113*4882a593Smuzhiyun ath10k_warn(ar, "received scan foreign chan event in an invalid scan state: %s (%d)\n",
2114*4882a593Smuzhiyun ath10k_scan_state_str(ar->scan.state),
2115*4882a593Smuzhiyun ar->scan.state);
2116*4882a593Smuzhiyun break;
2117*4882a593Smuzhiyun case ATH10K_SCAN_RUNNING:
2118*4882a593Smuzhiyun case ATH10K_SCAN_ABORTING:
2119*4882a593Smuzhiyun ar->scan_channel = ieee80211_get_channel(ar->hw->wiphy, freq);
2120*4882a593Smuzhiyun
2121*4882a593Smuzhiyun if (ar->scan.is_roc && ar->scan.roc_freq == freq)
2122*4882a593Smuzhiyun complete(&ar->scan.on_channel);
2123*4882a593Smuzhiyun break;
2124*4882a593Smuzhiyun }
2125*4882a593Smuzhiyun }
2126*4882a593Smuzhiyun
2127*4882a593Smuzhiyun static const char *
ath10k_wmi_event_scan_type_str(enum wmi_scan_event_type type,enum wmi_scan_completion_reason reason)2128*4882a593Smuzhiyun ath10k_wmi_event_scan_type_str(enum wmi_scan_event_type type,
2129*4882a593Smuzhiyun enum wmi_scan_completion_reason reason)
2130*4882a593Smuzhiyun {
2131*4882a593Smuzhiyun switch (type) {
2132*4882a593Smuzhiyun case WMI_SCAN_EVENT_STARTED:
2133*4882a593Smuzhiyun return "started";
2134*4882a593Smuzhiyun case WMI_SCAN_EVENT_COMPLETED:
2135*4882a593Smuzhiyun switch (reason) {
2136*4882a593Smuzhiyun case WMI_SCAN_REASON_COMPLETED:
2137*4882a593Smuzhiyun return "completed";
2138*4882a593Smuzhiyun case WMI_SCAN_REASON_CANCELLED:
2139*4882a593Smuzhiyun return "completed [cancelled]";
2140*4882a593Smuzhiyun case WMI_SCAN_REASON_PREEMPTED:
2141*4882a593Smuzhiyun return "completed [preempted]";
2142*4882a593Smuzhiyun case WMI_SCAN_REASON_TIMEDOUT:
2143*4882a593Smuzhiyun return "completed [timedout]";
2144*4882a593Smuzhiyun case WMI_SCAN_REASON_INTERNAL_FAILURE:
2145*4882a593Smuzhiyun return "completed [internal err]";
2146*4882a593Smuzhiyun case WMI_SCAN_REASON_MAX:
2147*4882a593Smuzhiyun break;
2148*4882a593Smuzhiyun }
2149*4882a593Smuzhiyun return "completed [unknown]";
2150*4882a593Smuzhiyun case WMI_SCAN_EVENT_BSS_CHANNEL:
2151*4882a593Smuzhiyun return "bss channel";
2152*4882a593Smuzhiyun case WMI_SCAN_EVENT_FOREIGN_CHANNEL:
2153*4882a593Smuzhiyun return "foreign channel";
2154*4882a593Smuzhiyun case WMI_SCAN_EVENT_DEQUEUED:
2155*4882a593Smuzhiyun return "dequeued";
2156*4882a593Smuzhiyun case WMI_SCAN_EVENT_PREEMPTED:
2157*4882a593Smuzhiyun return "preempted";
2158*4882a593Smuzhiyun case WMI_SCAN_EVENT_START_FAILED:
2159*4882a593Smuzhiyun return "start failed";
2160*4882a593Smuzhiyun case WMI_SCAN_EVENT_RESTARTED:
2161*4882a593Smuzhiyun return "restarted";
2162*4882a593Smuzhiyun case WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT:
2163*4882a593Smuzhiyun return "foreign channel exit";
2164*4882a593Smuzhiyun default:
2165*4882a593Smuzhiyun return "unknown";
2166*4882a593Smuzhiyun }
2167*4882a593Smuzhiyun }
2168*4882a593Smuzhiyun
ath10k_wmi_op_pull_scan_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_scan_ev_arg * arg)2169*4882a593Smuzhiyun static int ath10k_wmi_op_pull_scan_ev(struct ath10k *ar, struct sk_buff *skb,
2170*4882a593Smuzhiyun struct wmi_scan_ev_arg *arg)
2171*4882a593Smuzhiyun {
2172*4882a593Smuzhiyun struct wmi_scan_event *ev = (void *)skb->data;
2173*4882a593Smuzhiyun
2174*4882a593Smuzhiyun if (skb->len < sizeof(*ev))
2175*4882a593Smuzhiyun return -EPROTO;
2176*4882a593Smuzhiyun
2177*4882a593Smuzhiyun skb_pull(skb, sizeof(*ev));
2178*4882a593Smuzhiyun arg->event_type = ev->event_type;
2179*4882a593Smuzhiyun arg->reason = ev->reason;
2180*4882a593Smuzhiyun arg->channel_freq = ev->channel_freq;
2181*4882a593Smuzhiyun arg->scan_req_id = ev->scan_req_id;
2182*4882a593Smuzhiyun arg->scan_id = ev->scan_id;
2183*4882a593Smuzhiyun arg->vdev_id = ev->vdev_id;
2184*4882a593Smuzhiyun
2185*4882a593Smuzhiyun return 0;
2186*4882a593Smuzhiyun }
2187*4882a593Smuzhiyun
ath10k_wmi_event_scan(struct ath10k * ar,struct sk_buff * skb)2188*4882a593Smuzhiyun int ath10k_wmi_event_scan(struct ath10k *ar, struct sk_buff *skb)
2189*4882a593Smuzhiyun {
2190*4882a593Smuzhiyun struct wmi_scan_ev_arg arg = {};
2191*4882a593Smuzhiyun enum wmi_scan_event_type event_type;
2192*4882a593Smuzhiyun enum wmi_scan_completion_reason reason;
2193*4882a593Smuzhiyun u32 freq;
2194*4882a593Smuzhiyun u32 req_id;
2195*4882a593Smuzhiyun u32 scan_id;
2196*4882a593Smuzhiyun u32 vdev_id;
2197*4882a593Smuzhiyun int ret;
2198*4882a593Smuzhiyun
2199*4882a593Smuzhiyun ret = ath10k_wmi_pull_scan(ar, skb, &arg);
2200*4882a593Smuzhiyun if (ret) {
2201*4882a593Smuzhiyun ath10k_warn(ar, "failed to parse scan event: %d\n", ret);
2202*4882a593Smuzhiyun return ret;
2203*4882a593Smuzhiyun }
2204*4882a593Smuzhiyun
2205*4882a593Smuzhiyun event_type = __le32_to_cpu(arg.event_type);
2206*4882a593Smuzhiyun reason = __le32_to_cpu(arg.reason);
2207*4882a593Smuzhiyun freq = __le32_to_cpu(arg.channel_freq);
2208*4882a593Smuzhiyun req_id = __le32_to_cpu(arg.scan_req_id);
2209*4882a593Smuzhiyun scan_id = __le32_to_cpu(arg.scan_id);
2210*4882a593Smuzhiyun vdev_id = __le32_to_cpu(arg.vdev_id);
2211*4882a593Smuzhiyun
2212*4882a593Smuzhiyun spin_lock_bh(&ar->data_lock);
2213*4882a593Smuzhiyun
2214*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI,
2215*4882a593Smuzhiyun "scan event %s type %d reason %d freq %d req_id %d scan_id %d vdev_id %d state %s (%d)\n",
2216*4882a593Smuzhiyun ath10k_wmi_event_scan_type_str(event_type, reason),
2217*4882a593Smuzhiyun event_type, reason, freq, req_id, scan_id, vdev_id,
2218*4882a593Smuzhiyun ath10k_scan_state_str(ar->scan.state), ar->scan.state);
2219*4882a593Smuzhiyun
2220*4882a593Smuzhiyun switch (event_type) {
2221*4882a593Smuzhiyun case WMI_SCAN_EVENT_STARTED:
2222*4882a593Smuzhiyun ath10k_wmi_event_scan_started(ar);
2223*4882a593Smuzhiyun break;
2224*4882a593Smuzhiyun case WMI_SCAN_EVENT_COMPLETED:
2225*4882a593Smuzhiyun ath10k_wmi_event_scan_completed(ar);
2226*4882a593Smuzhiyun break;
2227*4882a593Smuzhiyun case WMI_SCAN_EVENT_BSS_CHANNEL:
2228*4882a593Smuzhiyun ath10k_wmi_event_scan_bss_chan(ar);
2229*4882a593Smuzhiyun break;
2230*4882a593Smuzhiyun case WMI_SCAN_EVENT_FOREIGN_CHANNEL:
2231*4882a593Smuzhiyun ath10k_wmi_event_scan_foreign_chan(ar, freq);
2232*4882a593Smuzhiyun break;
2233*4882a593Smuzhiyun case WMI_SCAN_EVENT_START_FAILED:
2234*4882a593Smuzhiyun ath10k_warn(ar, "received scan start failure event\n");
2235*4882a593Smuzhiyun ath10k_wmi_event_scan_start_failed(ar);
2236*4882a593Smuzhiyun break;
2237*4882a593Smuzhiyun case WMI_SCAN_EVENT_DEQUEUED:
2238*4882a593Smuzhiyun case WMI_SCAN_EVENT_PREEMPTED:
2239*4882a593Smuzhiyun case WMI_SCAN_EVENT_RESTARTED:
2240*4882a593Smuzhiyun case WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT:
2241*4882a593Smuzhiyun default:
2242*4882a593Smuzhiyun break;
2243*4882a593Smuzhiyun }
2244*4882a593Smuzhiyun
2245*4882a593Smuzhiyun spin_unlock_bh(&ar->data_lock);
2246*4882a593Smuzhiyun return 0;
2247*4882a593Smuzhiyun }
2248*4882a593Smuzhiyun
2249*4882a593Smuzhiyun /* If keys are configured, HW decrypts all frames
2250*4882a593Smuzhiyun * with protected bit set. Mark such frames as decrypted.
2251*4882a593Smuzhiyun */
ath10k_wmi_handle_wep_reauth(struct ath10k * ar,struct sk_buff * skb,struct ieee80211_rx_status * status)2252*4882a593Smuzhiyun static void ath10k_wmi_handle_wep_reauth(struct ath10k *ar,
2253*4882a593Smuzhiyun struct sk_buff *skb,
2254*4882a593Smuzhiyun struct ieee80211_rx_status *status)
2255*4882a593Smuzhiyun {
2256*4882a593Smuzhiyun struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
2257*4882a593Smuzhiyun unsigned int hdrlen;
2258*4882a593Smuzhiyun bool peer_key;
2259*4882a593Smuzhiyun u8 *addr, keyidx;
2260*4882a593Smuzhiyun
2261*4882a593Smuzhiyun if (!ieee80211_is_auth(hdr->frame_control) ||
2262*4882a593Smuzhiyun !ieee80211_has_protected(hdr->frame_control))
2263*4882a593Smuzhiyun return;
2264*4882a593Smuzhiyun
2265*4882a593Smuzhiyun hdrlen = ieee80211_hdrlen(hdr->frame_control);
2266*4882a593Smuzhiyun if (skb->len < (hdrlen + IEEE80211_WEP_IV_LEN))
2267*4882a593Smuzhiyun return;
2268*4882a593Smuzhiyun
2269*4882a593Smuzhiyun keyidx = skb->data[hdrlen + (IEEE80211_WEP_IV_LEN - 1)] >> WEP_KEYID_SHIFT;
2270*4882a593Smuzhiyun addr = ieee80211_get_SA(hdr);
2271*4882a593Smuzhiyun
2272*4882a593Smuzhiyun spin_lock_bh(&ar->data_lock);
2273*4882a593Smuzhiyun peer_key = ath10k_mac_is_peer_wep_key_set(ar, addr, keyidx);
2274*4882a593Smuzhiyun spin_unlock_bh(&ar->data_lock);
2275*4882a593Smuzhiyun
2276*4882a593Smuzhiyun if (peer_key) {
2277*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_MAC,
2278*4882a593Smuzhiyun "mac wep key present for peer %pM\n", addr);
2279*4882a593Smuzhiyun status->flag |= RX_FLAG_DECRYPTED;
2280*4882a593Smuzhiyun }
2281*4882a593Smuzhiyun }
2282*4882a593Smuzhiyun
ath10k_wmi_op_pull_mgmt_rx_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_mgmt_rx_ev_arg * arg)2283*4882a593Smuzhiyun static int ath10k_wmi_op_pull_mgmt_rx_ev(struct ath10k *ar, struct sk_buff *skb,
2284*4882a593Smuzhiyun struct wmi_mgmt_rx_ev_arg *arg)
2285*4882a593Smuzhiyun {
2286*4882a593Smuzhiyun struct wmi_mgmt_rx_event_v1 *ev_v1;
2287*4882a593Smuzhiyun struct wmi_mgmt_rx_event_v2 *ev_v2;
2288*4882a593Smuzhiyun struct wmi_mgmt_rx_hdr_v1 *ev_hdr;
2289*4882a593Smuzhiyun struct wmi_mgmt_rx_ext_info *ext_info;
2290*4882a593Smuzhiyun size_t pull_len;
2291*4882a593Smuzhiyun u32 msdu_len;
2292*4882a593Smuzhiyun u32 len;
2293*4882a593Smuzhiyun
2294*4882a593Smuzhiyun if (test_bit(ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX,
2295*4882a593Smuzhiyun ar->running_fw->fw_file.fw_features)) {
2296*4882a593Smuzhiyun ev_v2 = (struct wmi_mgmt_rx_event_v2 *)skb->data;
2297*4882a593Smuzhiyun ev_hdr = &ev_v2->hdr.v1;
2298*4882a593Smuzhiyun pull_len = sizeof(*ev_v2);
2299*4882a593Smuzhiyun } else {
2300*4882a593Smuzhiyun ev_v1 = (struct wmi_mgmt_rx_event_v1 *)skb->data;
2301*4882a593Smuzhiyun ev_hdr = &ev_v1->hdr;
2302*4882a593Smuzhiyun pull_len = sizeof(*ev_v1);
2303*4882a593Smuzhiyun }
2304*4882a593Smuzhiyun
2305*4882a593Smuzhiyun if (skb->len < pull_len)
2306*4882a593Smuzhiyun return -EPROTO;
2307*4882a593Smuzhiyun
2308*4882a593Smuzhiyun skb_pull(skb, pull_len);
2309*4882a593Smuzhiyun arg->channel = ev_hdr->channel;
2310*4882a593Smuzhiyun arg->buf_len = ev_hdr->buf_len;
2311*4882a593Smuzhiyun arg->status = ev_hdr->status;
2312*4882a593Smuzhiyun arg->snr = ev_hdr->snr;
2313*4882a593Smuzhiyun arg->phy_mode = ev_hdr->phy_mode;
2314*4882a593Smuzhiyun arg->rate = ev_hdr->rate;
2315*4882a593Smuzhiyun
2316*4882a593Smuzhiyun msdu_len = __le32_to_cpu(arg->buf_len);
2317*4882a593Smuzhiyun if (skb->len < msdu_len)
2318*4882a593Smuzhiyun return -EPROTO;
2319*4882a593Smuzhiyun
2320*4882a593Smuzhiyun if (le32_to_cpu(arg->status) & WMI_RX_STATUS_EXT_INFO) {
2321*4882a593Smuzhiyun len = ALIGN(le32_to_cpu(arg->buf_len), 4);
2322*4882a593Smuzhiyun ext_info = (struct wmi_mgmt_rx_ext_info *)(skb->data + len);
2323*4882a593Smuzhiyun memcpy(&arg->ext_info, ext_info,
2324*4882a593Smuzhiyun sizeof(struct wmi_mgmt_rx_ext_info));
2325*4882a593Smuzhiyun }
2326*4882a593Smuzhiyun /* the WMI buffer might've ended up being padded to 4 bytes due to HTC
2327*4882a593Smuzhiyun * trailer with credit update. Trim the excess garbage.
2328*4882a593Smuzhiyun */
2329*4882a593Smuzhiyun skb_trim(skb, msdu_len);
2330*4882a593Smuzhiyun
2331*4882a593Smuzhiyun return 0;
2332*4882a593Smuzhiyun }
2333*4882a593Smuzhiyun
ath10k_wmi_10_4_op_pull_mgmt_rx_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_mgmt_rx_ev_arg * arg)2334*4882a593Smuzhiyun static int ath10k_wmi_10_4_op_pull_mgmt_rx_ev(struct ath10k *ar,
2335*4882a593Smuzhiyun struct sk_buff *skb,
2336*4882a593Smuzhiyun struct wmi_mgmt_rx_ev_arg *arg)
2337*4882a593Smuzhiyun {
2338*4882a593Smuzhiyun struct wmi_10_4_mgmt_rx_event *ev;
2339*4882a593Smuzhiyun struct wmi_10_4_mgmt_rx_hdr *ev_hdr;
2340*4882a593Smuzhiyun size_t pull_len;
2341*4882a593Smuzhiyun u32 msdu_len;
2342*4882a593Smuzhiyun struct wmi_mgmt_rx_ext_info *ext_info;
2343*4882a593Smuzhiyun u32 len;
2344*4882a593Smuzhiyun
2345*4882a593Smuzhiyun ev = (struct wmi_10_4_mgmt_rx_event *)skb->data;
2346*4882a593Smuzhiyun ev_hdr = &ev->hdr;
2347*4882a593Smuzhiyun pull_len = sizeof(*ev);
2348*4882a593Smuzhiyun
2349*4882a593Smuzhiyun if (skb->len < pull_len)
2350*4882a593Smuzhiyun return -EPROTO;
2351*4882a593Smuzhiyun
2352*4882a593Smuzhiyun skb_pull(skb, pull_len);
2353*4882a593Smuzhiyun arg->channel = ev_hdr->channel;
2354*4882a593Smuzhiyun arg->buf_len = ev_hdr->buf_len;
2355*4882a593Smuzhiyun arg->status = ev_hdr->status;
2356*4882a593Smuzhiyun arg->snr = ev_hdr->snr;
2357*4882a593Smuzhiyun arg->phy_mode = ev_hdr->phy_mode;
2358*4882a593Smuzhiyun arg->rate = ev_hdr->rate;
2359*4882a593Smuzhiyun
2360*4882a593Smuzhiyun msdu_len = __le32_to_cpu(arg->buf_len);
2361*4882a593Smuzhiyun if (skb->len < msdu_len)
2362*4882a593Smuzhiyun return -EPROTO;
2363*4882a593Smuzhiyun
2364*4882a593Smuzhiyun if (le32_to_cpu(arg->status) & WMI_RX_STATUS_EXT_INFO) {
2365*4882a593Smuzhiyun len = ALIGN(le32_to_cpu(arg->buf_len), 4);
2366*4882a593Smuzhiyun ext_info = (struct wmi_mgmt_rx_ext_info *)(skb->data + len);
2367*4882a593Smuzhiyun memcpy(&arg->ext_info, ext_info,
2368*4882a593Smuzhiyun sizeof(struct wmi_mgmt_rx_ext_info));
2369*4882a593Smuzhiyun }
2370*4882a593Smuzhiyun
2371*4882a593Smuzhiyun /* Make sure bytes added for padding are removed. */
2372*4882a593Smuzhiyun skb_trim(skb, msdu_len);
2373*4882a593Smuzhiyun
2374*4882a593Smuzhiyun return 0;
2375*4882a593Smuzhiyun }
2376*4882a593Smuzhiyun
ath10k_wmi_rx_is_decrypted(struct ath10k * ar,struct ieee80211_hdr * hdr)2377*4882a593Smuzhiyun static bool ath10k_wmi_rx_is_decrypted(struct ath10k *ar,
2378*4882a593Smuzhiyun struct ieee80211_hdr *hdr)
2379*4882a593Smuzhiyun {
2380*4882a593Smuzhiyun if (!ieee80211_has_protected(hdr->frame_control))
2381*4882a593Smuzhiyun return false;
2382*4882a593Smuzhiyun
2383*4882a593Smuzhiyun /* FW delivers WEP Shared Auth frame with Protected Bit set and
2384*4882a593Smuzhiyun * encrypted payload. However in case of PMF it delivers decrypted
2385*4882a593Smuzhiyun * frames with Protected Bit set.
2386*4882a593Smuzhiyun */
2387*4882a593Smuzhiyun if (ieee80211_is_auth(hdr->frame_control))
2388*4882a593Smuzhiyun return false;
2389*4882a593Smuzhiyun
2390*4882a593Smuzhiyun /* qca99x0 based FW delivers broadcast or multicast management frames
2391*4882a593Smuzhiyun * (ex: group privacy action frames in mesh) as encrypted payload.
2392*4882a593Smuzhiyun */
2393*4882a593Smuzhiyun if (is_multicast_ether_addr(ieee80211_get_DA(hdr)) &&
2394*4882a593Smuzhiyun ar->hw_params.sw_decrypt_mcast_mgmt)
2395*4882a593Smuzhiyun return false;
2396*4882a593Smuzhiyun
2397*4882a593Smuzhiyun return true;
2398*4882a593Smuzhiyun }
2399*4882a593Smuzhiyun
2400*4882a593Smuzhiyun static int
wmi_process_mgmt_tx_comp(struct ath10k * ar,struct mgmt_tx_compl_params * param)2401*4882a593Smuzhiyun wmi_process_mgmt_tx_comp(struct ath10k *ar, struct mgmt_tx_compl_params *param)
2402*4882a593Smuzhiyun {
2403*4882a593Smuzhiyun struct ath10k_mgmt_tx_pkt_addr *pkt_addr;
2404*4882a593Smuzhiyun struct ath10k_wmi *wmi = &ar->wmi;
2405*4882a593Smuzhiyun struct ieee80211_tx_info *info;
2406*4882a593Smuzhiyun struct sk_buff *msdu;
2407*4882a593Smuzhiyun int ret;
2408*4882a593Smuzhiyun
2409*4882a593Smuzhiyun spin_lock_bh(&ar->data_lock);
2410*4882a593Smuzhiyun
2411*4882a593Smuzhiyun pkt_addr = idr_find(&wmi->mgmt_pending_tx, param->desc_id);
2412*4882a593Smuzhiyun if (!pkt_addr) {
2413*4882a593Smuzhiyun ath10k_warn(ar, "received mgmt tx completion for invalid msdu_id: %d\n",
2414*4882a593Smuzhiyun param->desc_id);
2415*4882a593Smuzhiyun ret = -ENOENT;
2416*4882a593Smuzhiyun goto out;
2417*4882a593Smuzhiyun }
2418*4882a593Smuzhiyun
2419*4882a593Smuzhiyun msdu = pkt_addr->vaddr;
2420*4882a593Smuzhiyun dma_unmap_single(ar->dev, pkt_addr->paddr,
2421*4882a593Smuzhiyun msdu->len, DMA_TO_DEVICE);
2422*4882a593Smuzhiyun info = IEEE80211_SKB_CB(msdu);
2423*4882a593Smuzhiyun
2424*4882a593Smuzhiyun if (param->status) {
2425*4882a593Smuzhiyun info->flags &= ~IEEE80211_TX_STAT_ACK;
2426*4882a593Smuzhiyun } else {
2427*4882a593Smuzhiyun info->flags |= IEEE80211_TX_STAT_ACK;
2428*4882a593Smuzhiyun info->status.ack_signal = ATH10K_DEFAULT_NOISE_FLOOR +
2429*4882a593Smuzhiyun param->ack_rssi;
2430*4882a593Smuzhiyun info->status.is_valid_ack_signal = true;
2431*4882a593Smuzhiyun }
2432*4882a593Smuzhiyun
2433*4882a593Smuzhiyun ieee80211_tx_status_irqsafe(ar->hw, msdu);
2434*4882a593Smuzhiyun
2435*4882a593Smuzhiyun ret = 0;
2436*4882a593Smuzhiyun
2437*4882a593Smuzhiyun out:
2438*4882a593Smuzhiyun idr_remove(&wmi->mgmt_pending_tx, param->desc_id);
2439*4882a593Smuzhiyun spin_unlock_bh(&ar->data_lock);
2440*4882a593Smuzhiyun return ret;
2441*4882a593Smuzhiyun }
2442*4882a593Smuzhiyun
ath10k_wmi_event_mgmt_tx_compl(struct ath10k * ar,struct sk_buff * skb)2443*4882a593Smuzhiyun int ath10k_wmi_event_mgmt_tx_compl(struct ath10k *ar, struct sk_buff *skb)
2444*4882a593Smuzhiyun {
2445*4882a593Smuzhiyun struct wmi_tlv_mgmt_tx_compl_ev_arg arg;
2446*4882a593Smuzhiyun struct mgmt_tx_compl_params param;
2447*4882a593Smuzhiyun int ret;
2448*4882a593Smuzhiyun
2449*4882a593Smuzhiyun ret = ath10k_wmi_pull_mgmt_tx_compl(ar, skb, &arg);
2450*4882a593Smuzhiyun if (ret) {
2451*4882a593Smuzhiyun ath10k_warn(ar, "failed to parse mgmt comp event: %d\n", ret);
2452*4882a593Smuzhiyun return ret;
2453*4882a593Smuzhiyun }
2454*4882a593Smuzhiyun
2455*4882a593Smuzhiyun memset(¶m, 0, sizeof(struct mgmt_tx_compl_params));
2456*4882a593Smuzhiyun param.desc_id = __le32_to_cpu(arg.desc_id);
2457*4882a593Smuzhiyun param.status = __le32_to_cpu(arg.status);
2458*4882a593Smuzhiyun
2459*4882a593Smuzhiyun if (test_bit(WMI_SERVICE_TX_DATA_ACK_RSSI, ar->wmi.svc_map))
2460*4882a593Smuzhiyun param.ack_rssi = __le32_to_cpu(arg.ack_rssi);
2461*4882a593Smuzhiyun
2462*4882a593Smuzhiyun wmi_process_mgmt_tx_comp(ar, ¶m);
2463*4882a593Smuzhiyun
2464*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi tlv evnt mgmt tx completion\n");
2465*4882a593Smuzhiyun
2466*4882a593Smuzhiyun return 0;
2467*4882a593Smuzhiyun }
2468*4882a593Smuzhiyun
ath10k_wmi_event_mgmt_tx_bundle_compl(struct ath10k * ar,struct sk_buff * skb)2469*4882a593Smuzhiyun int ath10k_wmi_event_mgmt_tx_bundle_compl(struct ath10k *ar, struct sk_buff *skb)
2470*4882a593Smuzhiyun {
2471*4882a593Smuzhiyun struct wmi_tlv_mgmt_tx_bundle_compl_ev_arg arg;
2472*4882a593Smuzhiyun struct mgmt_tx_compl_params param;
2473*4882a593Smuzhiyun u32 num_reports;
2474*4882a593Smuzhiyun int i, ret;
2475*4882a593Smuzhiyun
2476*4882a593Smuzhiyun ret = ath10k_wmi_pull_mgmt_tx_bundle_compl(ar, skb, &arg);
2477*4882a593Smuzhiyun if (ret) {
2478*4882a593Smuzhiyun ath10k_warn(ar, "failed to parse bundle mgmt compl event: %d\n", ret);
2479*4882a593Smuzhiyun return ret;
2480*4882a593Smuzhiyun }
2481*4882a593Smuzhiyun
2482*4882a593Smuzhiyun num_reports = __le32_to_cpu(arg.num_reports);
2483*4882a593Smuzhiyun
2484*4882a593Smuzhiyun for (i = 0; i < num_reports; i++) {
2485*4882a593Smuzhiyun memset(¶m, 0, sizeof(struct mgmt_tx_compl_params));
2486*4882a593Smuzhiyun param.desc_id = __le32_to_cpu(arg.desc_ids[i]);
2487*4882a593Smuzhiyun param.status = __le32_to_cpu(arg.desc_ids[i]);
2488*4882a593Smuzhiyun
2489*4882a593Smuzhiyun if (test_bit(WMI_SERVICE_TX_DATA_ACK_RSSI, ar->wmi.svc_map))
2490*4882a593Smuzhiyun param.ack_rssi = __le32_to_cpu(arg.ack_rssi[i]);
2491*4882a593Smuzhiyun wmi_process_mgmt_tx_comp(ar, ¶m);
2492*4882a593Smuzhiyun }
2493*4882a593Smuzhiyun
2494*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi tlv event bundle mgmt tx completion\n");
2495*4882a593Smuzhiyun
2496*4882a593Smuzhiyun return 0;
2497*4882a593Smuzhiyun }
2498*4882a593Smuzhiyun
ath10k_wmi_event_mgmt_rx(struct ath10k * ar,struct sk_buff * skb)2499*4882a593Smuzhiyun int ath10k_wmi_event_mgmt_rx(struct ath10k *ar, struct sk_buff *skb)
2500*4882a593Smuzhiyun {
2501*4882a593Smuzhiyun struct wmi_mgmt_rx_ev_arg arg = {};
2502*4882a593Smuzhiyun struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb);
2503*4882a593Smuzhiyun struct ieee80211_hdr *hdr;
2504*4882a593Smuzhiyun struct ieee80211_supported_band *sband;
2505*4882a593Smuzhiyun u32 rx_status;
2506*4882a593Smuzhiyun u32 channel;
2507*4882a593Smuzhiyun u32 phy_mode;
2508*4882a593Smuzhiyun u32 snr, rssi;
2509*4882a593Smuzhiyun u32 rate;
2510*4882a593Smuzhiyun u16 fc;
2511*4882a593Smuzhiyun int ret, i;
2512*4882a593Smuzhiyun
2513*4882a593Smuzhiyun ret = ath10k_wmi_pull_mgmt_rx(ar, skb, &arg);
2514*4882a593Smuzhiyun if (ret) {
2515*4882a593Smuzhiyun ath10k_warn(ar, "failed to parse mgmt rx event: %d\n", ret);
2516*4882a593Smuzhiyun dev_kfree_skb(skb);
2517*4882a593Smuzhiyun return ret;
2518*4882a593Smuzhiyun }
2519*4882a593Smuzhiyun
2520*4882a593Smuzhiyun channel = __le32_to_cpu(arg.channel);
2521*4882a593Smuzhiyun rx_status = __le32_to_cpu(arg.status);
2522*4882a593Smuzhiyun snr = __le32_to_cpu(arg.snr);
2523*4882a593Smuzhiyun phy_mode = __le32_to_cpu(arg.phy_mode);
2524*4882a593Smuzhiyun rate = __le32_to_cpu(arg.rate);
2525*4882a593Smuzhiyun
2526*4882a593Smuzhiyun memset(status, 0, sizeof(*status));
2527*4882a593Smuzhiyun
2528*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_MGMT,
2529*4882a593Smuzhiyun "event mgmt rx status %08x\n", rx_status);
2530*4882a593Smuzhiyun
2531*4882a593Smuzhiyun if ((test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags)) ||
2532*4882a593Smuzhiyun (rx_status & (WMI_RX_STATUS_ERR_DECRYPT |
2533*4882a593Smuzhiyun WMI_RX_STATUS_ERR_KEY_CACHE_MISS | WMI_RX_STATUS_ERR_CRC))) {
2534*4882a593Smuzhiyun dev_kfree_skb(skb);
2535*4882a593Smuzhiyun return 0;
2536*4882a593Smuzhiyun }
2537*4882a593Smuzhiyun
2538*4882a593Smuzhiyun if (rx_status & WMI_RX_STATUS_ERR_MIC)
2539*4882a593Smuzhiyun status->flag |= RX_FLAG_MMIC_ERROR;
2540*4882a593Smuzhiyun
2541*4882a593Smuzhiyun if (rx_status & WMI_RX_STATUS_EXT_INFO) {
2542*4882a593Smuzhiyun status->mactime =
2543*4882a593Smuzhiyun __le64_to_cpu(arg.ext_info.rx_mac_timestamp);
2544*4882a593Smuzhiyun status->flag |= RX_FLAG_MACTIME_END;
2545*4882a593Smuzhiyun }
2546*4882a593Smuzhiyun /* Hardware can Rx CCK rates on 5GHz. In that case phy_mode is set to
2547*4882a593Smuzhiyun * MODE_11B. This means phy_mode is not a reliable source for the band
2548*4882a593Smuzhiyun * of mgmt rx.
2549*4882a593Smuzhiyun */
2550*4882a593Smuzhiyun if (channel >= 1 && channel <= 14) {
2551*4882a593Smuzhiyun status->band = NL80211_BAND_2GHZ;
2552*4882a593Smuzhiyun } else if (channel >= 36 && channel <= ATH10K_MAX_5G_CHAN) {
2553*4882a593Smuzhiyun status->band = NL80211_BAND_5GHZ;
2554*4882a593Smuzhiyun } else {
2555*4882a593Smuzhiyun /* Shouldn't happen unless list of advertised channels to
2556*4882a593Smuzhiyun * mac80211 has been changed.
2557*4882a593Smuzhiyun */
2558*4882a593Smuzhiyun WARN_ON_ONCE(1);
2559*4882a593Smuzhiyun dev_kfree_skb(skb);
2560*4882a593Smuzhiyun return 0;
2561*4882a593Smuzhiyun }
2562*4882a593Smuzhiyun
2563*4882a593Smuzhiyun if (phy_mode == MODE_11B && status->band == NL80211_BAND_5GHZ)
2564*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_MGMT, "wmi mgmt rx 11b (CCK) on 5GHz\n");
2565*4882a593Smuzhiyun
2566*4882a593Smuzhiyun sband = &ar->mac.sbands[status->band];
2567*4882a593Smuzhiyun
2568*4882a593Smuzhiyun status->freq = ieee80211_channel_to_frequency(channel, status->band);
2569*4882a593Smuzhiyun status->signal = snr + ATH10K_DEFAULT_NOISE_FLOOR;
2570*4882a593Smuzhiyun
2571*4882a593Smuzhiyun BUILD_BUG_ON(ARRAY_SIZE(status->chain_signal) != ARRAY_SIZE(arg.rssi));
2572*4882a593Smuzhiyun
2573*4882a593Smuzhiyun for (i = 0; i < ARRAY_SIZE(status->chain_signal); i++) {
2574*4882a593Smuzhiyun status->chains &= ~BIT(i);
2575*4882a593Smuzhiyun rssi = __le32_to_cpu(arg.rssi[i]);
2576*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_MGMT, "mgmt rssi[%d]:%d\n", i, arg.rssi[i]);
2577*4882a593Smuzhiyun
2578*4882a593Smuzhiyun if (rssi != ATH10K_INVALID_RSSI && rssi != 0) {
2579*4882a593Smuzhiyun status->chain_signal[i] = ATH10K_DEFAULT_NOISE_FLOOR + rssi;
2580*4882a593Smuzhiyun status->chains |= BIT(i);
2581*4882a593Smuzhiyun }
2582*4882a593Smuzhiyun }
2583*4882a593Smuzhiyun
2584*4882a593Smuzhiyun status->rate_idx = ath10k_mac_bitrate_to_idx(sband, rate / 100);
2585*4882a593Smuzhiyun
2586*4882a593Smuzhiyun hdr = (struct ieee80211_hdr *)skb->data;
2587*4882a593Smuzhiyun fc = le16_to_cpu(hdr->frame_control);
2588*4882a593Smuzhiyun
2589*4882a593Smuzhiyun /* Firmware is guaranteed to report all essential management frames via
2590*4882a593Smuzhiyun * WMI while it can deliver some extra via HTT. Since there can be
2591*4882a593Smuzhiyun * duplicates split the reporting wrt monitor/sniffing.
2592*4882a593Smuzhiyun */
2593*4882a593Smuzhiyun status->flag |= RX_FLAG_SKIP_MONITOR;
2594*4882a593Smuzhiyun
2595*4882a593Smuzhiyun ath10k_wmi_handle_wep_reauth(ar, skb, status);
2596*4882a593Smuzhiyun
2597*4882a593Smuzhiyun if (ath10k_wmi_rx_is_decrypted(ar, hdr)) {
2598*4882a593Smuzhiyun status->flag |= RX_FLAG_DECRYPTED;
2599*4882a593Smuzhiyun
2600*4882a593Smuzhiyun if (!ieee80211_is_action(hdr->frame_control) &&
2601*4882a593Smuzhiyun !ieee80211_is_deauth(hdr->frame_control) &&
2602*4882a593Smuzhiyun !ieee80211_is_disassoc(hdr->frame_control)) {
2603*4882a593Smuzhiyun status->flag |= RX_FLAG_IV_STRIPPED |
2604*4882a593Smuzhiyun RX_FLAG_MMIC_STRIPPED;
2605*4882a593Smuzhiyun hdr->frame_control = __cpu_to_le16(fc &
2606*4882a593Smuzhiyun ~IEEE80211_FCTL_PROTECTED);
2607*4882a593Smuzhiyun }
2608*4882a593Smuzhiyun }
2609*4882a593Smuzhiyun
2610*4882a593Smuzhiyun if (ieee80211_is_beacon(hdr->frame_control))
2611*4882a593Smuzhiyun ath10k_mac_handle_beacon(ar, skb);
2612*4882a593Smuzhiyun
2613*4882a593Smuzhiyun if (ieee80211_is_beacon(hdr->frame_control) ||
2614*4882a593Smuzhiyun ieee80211_is_probe_resp(hdr->frame_control))
2615*4882a593Smuzhiyun status->boottime_ns = ktime_get_boottime_ns();
2616*4882a593Smuzhiyun
2617*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_MGMT,
2618*4882a593Smuzhiyun "event mgmt rx skb %pK len %d ftype %02x stype %02x\n",
2619*4882a593Smuzhiyun skb, skb->len,
2620*4882a593Smuzhiyun fc & IEEE80211_FCTL_FTYPE, fc & IEEE80211_FCTL_STYPE);
2621*4882a593Smuzhiyun
2622*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_MGMT,
2623*4882a593Smuzhiyun "event mgmt rx freq %d band %d snr %d, rate_idx %d\n",
2624*4882a593Smuzhiyun status->freq, status->band, status->signal,
2625*4882a593Smuzhiyun status->rate_idx);
2626*4882a593Smuzhiyun
2627*4882a593Smuzhiyun ieee80211_rx_ni(ar->hw, skb);
2628*4882a593Smuzhiyun
2629*4882a593Smuzhiyun return 0;
2630*4882a593Smuzhiyun }
2631*4882a593Smuzhiyun
freq_to_idx(struct ath10k * ar,int freq)2632*4882a593Smuzhiyun static int freq_to_idx(struct ath10k *ar, int freq)
2633*4882a593Smuzhiyun {
2634*4882a593Smuzhiyun struct ieee80211_supported_band *sband;
2635*4882a593Smuzhiyun int band, ch, idx = 0;
2636*4882a593Smuzhiyun
2637*4882a593Smuzhiyun for (band = NL80211_BAND_2GHZ; band < NUM_NL80211_BANDS; band++) {
2638*4882a593Smuzhiyun sband = ar->hw->wiphy->bands[band];
2639*4882a593Smuzhiyun if (!sband)
2640*4882a593Smuzhiyun continue;
2641*4882a593Smuzhiyun
2642*4882a593Smuzhiyun for (ch = 0; ch < sband->n_channels; ch++, idx++)
2643*4882a593Smuzhiyun if (sband->channels[ch].center_freq == freq)
2644*4882a593Smuzhiyun goto exit;
2645*4882a593Smuzhiyun }
2646*4882a593Smuzhiyun
2647*4882a593Smuzhiyun exit:
2648*4882a593Smuzhiyun return idx;
2649*4882a593Smuzhiyun }
2650*4882a593Smuzhiyun
ath10k_wmi_op_pull_ch_info_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_ch_info_ev_arg * arg)2651*4882a593Smuzhiyun static int ath10k_wmi_op_pull_ch_info_ev(struct ath10k *ar, struct sk_buff *skb,
2652*4882a593Smuzhiyun struct wmi_ch_info_ev_arg *arg)
2653*4882a593Smuzhiyun {
2654*4882a593Smuzhiyun struct wmi_chan_info_event *ev = (void *)skb->data;
2655*4882a593Smuzhiyun
2656*4882a593Smuzhiyun if (skb->len < sizeof(*ev))
2657*4882a593Smuzhiyun return -EPROTO;
2658*4882a593Smuzhiyun
2659*4882a593Smuzhiyun skb_pull(skb, sizeof(*ev));
2660*4882a593Smuzhiyun arg->err_code = ev->err_code;
2661*4882a593Smuzhiyun arg->freq = ev->freq;
2662*4882a593Smuzhiyun arg->cmd_flags = ev->cmd_flags;
2663*4882a593Smuzhiyun arg->noise_floor = ev->noise_floor;
2664*4882a593Smuzhiyun arg->rx_clear_count = ev->rx_clear_count;
2665*4882a593Smuzhiyun arg->cycle_count = ev->cycle_count;
2666*4882a593Smuzhiyun
2667*4882a593Smuzhiyun return 0;
2668*4882a593Smuzhiyun }
2669*4882a593Smuzhiyun
ath10k_wmi_10_4_op_pull_ch_info_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_ch_info_ev_arg * arg)2670*4882a593Smuzhiyun static int ath10k_wmi_10_4_op_pull_ch_info_ev(struct ath10k *ar,
2671*4882a593Smuzhiyun struct sk_buff *skb,
2672*4882a593Smuzhiyun struct wmi_ch_info_ev_arg *arg)
2673*4882a593Smuzhiyun {
2674*4882a593Smuzhiyun struct wmi_10_4_chan_info_event *ev = (void *)skb->data;
2675*4882a593Smuzhiyun
2676*4882a593Smuzhiyun if (skb->len < sizeof(*ev))
2677*4882a593Smuzhiyun return -EPROTO;
2678*4882a593Smuzhiyun
2679*4882a593Smuzhiyun skb_pull(skb, sizeof(*ev));
2680*4882a593Smuzhiyun arg->err_code = ev->err_code;
2681*4882a593Smuzhiyun arg->freq = ev->freq;
2682*4882a593Smuzhiyun arg->cmd_flags = ev->cmd_flags;
2683*4882a593Smuzhiyun arg->noise_floor = ev->noise_floor;
2684*4882a593Smuzhiyun arg->rx_clear_count = ev->rx_clear_count;
2685*4882a593Smuzhiyun arg->cycle_count = ev->cycle_count;
2686*4882a593Smuzhiyun arg->chan_tx_pwr_range = ev->chan_tx_pwr_range;
2687*4882a593Smuzhiyun arg->chan_tx_pwr_tp = ev->chan_tx_pwr_tp;
2688*4882a593Smuzhiyun arg->rx_frame_count = ev->rx_frame_count;
2689*4882a593Smuzhiyun
2690*4882a593Smuzhiyun return 0;
2691*4882a593Smuzhiyun }
2692*4882a593Smuzhiyun
2693*4882a593Smuzhiyun /*
2694*4882a593Smuzhiyun * Handle the channel info event for firmware which only sends one
2695*4882a593Smuzhiyun * chan_info event per scanned channel.
2696*4882a593Smuzhiyun */
ath10k_wmi_event_chan_info_unpaired(struct ath10k * ar,struct chan_info_params * params)2697*4882a593Smuzhiyun static void ath10k_wmi_event_chan_info_unpaired(struct ath10k *ar,
2698*4882a593Smuzhiyun struct chan_info_params *params)
2699*4882a593Smuzhiyun {
2700*4882a593Smuzhiyun struct survey_info *survey;
2701*4882a593Smuzhiyun int idx;
2702*4882a593Smuzhiyun
2703*4882a593Smuzhiyun if (params->cmd_flags & WMI_CHAN_INFO_FLAG_COMPLETE) {
2704*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI, "chan info report completed\n");
2705*4882a593Smuzhiyun return;
2706*4882a593Smuzhiyun }
2707*4882a593Smuzhiyun
2708*4882a593Smuzhiyun idx = freq_to_idx(ar, params->freq);
2709*4882a593Smuzhiyun if (idx >= ARRAY_SIZE(ar->survey)) {
2710*4882a593Smuzhiyun ath10k_warn(ar, "chan info: invalid frequency %d (idx %d out of bounds)\n",
2711*4882a593Smuzhiyun params->freq, idx);
2712*4882a593Smuzhiyun return;
2713*4882a593Smuzhiyun }
2714*4882a593Smuzhiyun
2715*4882a593Smuzhiyun survey = &ar->survey[idx];
2716*4882a593Smuzhiyun
2717*4882a593Smuzhiyun if (!params->mac_clk_mhz)
2718*4882a593Smuzhiyun return;
2719*4882a593Smuzhiyun
2720*4882a593Smuzhiyun memset(survey, 0, sizeof(*survey));
2721*4882a593Smuzhiyun
2722*4882a593Smuzhiyun survey->noise = params->noise_floor;
2723*4882a593Smuzhiyun survey->time = (params->cycle_count / params->mac_clk_mhz) / 1000;
2724*4882a593Smuzhiyun survey->time_busy = (params->rx_clear_count / params->mac_clk_mhz) / 1000;
2725*4882a593Smuzhiyun survey->filled |= SURVEY_INFO_NOISE_DBM | SURVEY_INFO_TIME |
2726*4882a593Smuzhiyun SURVEY_INFO_TIME_BUSY;
2727*4882a593Smuzhiyun }
2728*4882a593Smuzhiyun
2729*4882a593Smuzhiyun /*
2730*4882a593Smuzhiyun * Handle the channel info event for firmware which sends chan_info
2731*4882a593Smuzhiyun * event in pairs(start and stop events) for every scanned channel.
2732*4882a593Smuzhiyun */
ath10k_wmi_event_chan_info_paired(struct ath10k * ar,struct chan_info_params * params)2733*4882a593Smuzhiyun static void ath10k_wmi_event_chan_info_paired(struct ath10k *ar,
2734*4882a593Smuzhiyun struct chan_info_params *params)
2735*4882a593Smuzhiyun {
2736*4882a593Smuzhiyun struct survey_info *survey;
2737*4882a593Smuzhiyun int idx;
2738*4882a593Smuzhiyun
2739*4882a593Smuzhiyun idx = freq_to_idx(ar, params->freq);
2740*4882a593Smuzhiyun if (idx >= ARRAY_SIZE(ar->survey)) {
2741*4882a593Smuzhiyun ath10k_warn(ar, "chan info: invalid frequency %d (idx %d out of bounds)\n",
2742*4882a593Smuzhiyun params->freq, idx);
2743*4882a593Smuzhiyun return;
2744*4882a593Smuzhiyun }
2745*4882a593Smuzhiyun
2746*4882a593Smuzhiyun if (params->cmd_flags & WMI_CHAN_INFO_FLAG_COMPLETE) {
2747*4882a593Smuzhiyun if (ar->ch_info_can_report_survey) {
2748*4882a593Smuzhiyun survey = &ar->survey[idx];
2749*4882a593Smuzhiyun survey->noise = params->noise_floor;
2750*4882a593Smuzhiyun survey->filled = SURVEY_INFO_NOISE_DBM;
2751*4882a593Smuzhiyun
2752*4882a593Smuzhiyun ath10k_hw_fill_survey_time(ar,
2753*4882a593Smuzhiyun survey,
2754*4882a593Smuzhiyun params->cycle_count,
2755*4882a593Smuzhiyun params->rx_clear_count,
2756*4882a593Smuzhiyun ar->survey_last_cycle_count,
2757*4882a593Smuzhiyun ar->survey_last_rx_clear_count);
2758*4882a593Smuzhiyun }
2759*4882a593Smuzhiyun
2760*4882a593Smuzhiyun ar->ch_info_can_report_survey = false;
2761*4882a593Smuzhiyun } else {
2762*4882a593Smuzhiyun ar->ch_info_can_report_survey = true;
2763*4882a593Smuzhiyun }
2764*4882a593Smuzhiyun
2765*4882a593Smuzhiyun if (!(params->cmd_flags & WMI_CHAN_INFO_FLAG_PRE_COMPLETE)) {
2766*4882a593Smuzhiyun ar->survey_last_rx_clear_count = params->rx_clear_count;
2767*4882a593Smuzhiyun ar->survey_last_cycle_count = params->cycle_count;
2768*4882a593Smuzhiyun }
2769*4882a593Smuzhiyun }
2770*4882a593Smuzhiyun
ath10k_wmi_event_chan_info(struct ath10k * ar,struct sk_buff * skb)2771*4882a593Smuzhiyun void ath10k_wmi_event_chan_info(struct ath10k *ar, struct sk_buff *skb)
2772*4882a593Smuzhiyun {
2773*4882a593Smuzhiyun struct chan_info_params ch_info_param;
2774*4882a593Smuzhiyun struct wmi_ch_info_ev_arg arg = {};
2775*4882a593Smuzhiyun int ret;
2776*4882a593Smuzhiyun
2777*4882a593Smuzhiyun ret = ath10k_wmi_pull_ch_info(ar, skb, &arg);
2778*4882a593Smuzhiyun if (ret) {
2779*4882a593Smuzhiyun ath10k_warn(ar, "failed to parse chan info event: %d\n", ret);
2780*4882a593Smuzhiyun return;
2781*4882a593Smuzhiyun }
2782*4882a593Smuzhiyun
2783*4882a593Smuzhiyun ch_info_param.err_code = __le32_to_cpu(arg.err_code);
2784*4882a593Smuzhiyun ch_info_param.freq = __le32_to_cpu(arg.freq);
2785*4882a593Smuzhiyun ch_info_param.cmd_flags = __le32_to_cpu(arg.cmd_flags);
2786*4882a593Smuzhiyun ch_info_param.noise_floor = __le32_to_cpu(arg.noise_floor);
2787*4882a593Smuzhiyun ch_info_param.rx_clear_count = __le32_to_cpu(arg.rx_clear_count);
2788*4882a593Smuzhiyun ch_info_param.cycle_count = __le32_to_cpu(arg.cycle_count);
2789*4882a593Smuzhiyun ch_info_param.mac_clk_mhz = __le32_to_cpu(arg.mac_clk_mhz);
2790*4882a593Smuzhiyun
2791*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI,
2792*4882a593Smuzhiyun "chan info err_code %d freq %d cmd_flags %d noise_floor %d rx_clear_count %d cycle_count %d\n",
2793*4882a593Smuzhiyun ch_info_param.err_code, ch_info_param.freq, ch_info_param.cmd_flags,
2794*4882a593Smuzhiyun ch_info_param.noise_floor, ch_info_param.rx_clear_count,
2795*4882a593Smuzhiyun ch_info_param.cycle_count);
2796*4882a593Smuzhiyun
2797*4882a593Smuzhiyun spin_lock_bh(&ar->data_lock);
2798*4882a593Smuzhiyun
2799*4882a593Smuzhiyun switch (ar->scan.state) {
2800*4882a593Smuzhiyun case ATH10K_SCAN_IDLE:
2801*4882a593Smuzhiyun case ATH10K_SCAN_STARTING:
2802*4882a593Smuzhiyun ath10k_warn(ar, "received chan info event without a scan request, ignoring\n");
2803*4882a593Smuzhiyun goto exit;
2804*4882a593Smuzhiyun case ATH10K_SCAN_RUNNING:
2805*4882a593Smuzhiyun case ATH10K_SCAN_ABORTING:
2806*4882a593Smuzhiyun break;
2807*4882a593Smuzhiyun }
2808*4882a593Smuzhiyun
2809*4882a593Smuzhiyun if (test_bit(ATH10K_FW_FEATURE_SINGLE_CHAN_INFO_PER_CHANNEL,
2810*4882a593Smuzhiyun ar->running_fw->fw_file.fw_features))
2811*4882a593Smuzhiyun ath10k_wmi_event_chan_info_unpaired(ar, &ch_info_param);
2812*4882a593Smuzhiyun else
2813*4882a593Smuzhiyun ath10k_wmi_event_chan_info_paired(ar, &ch_info_param);
2814*4882a593Smuzhiyun
2815*4882a593Smuzhiyun exit:
2816*4882a593Smuzhiyun spin_unlock_bh(&ar->data_lock);
2817*4882a593Smuzhiyun }
2818*4882a593Smuzhiyun
ath10k_wmi_event_echo(struct ath10k * ar,struct sk_buff * skb)2819*4882a593Smuzhiyun void ath10k_wmi_event_echo(struct ath10k *ar, struct sk_buff *skb)
2820*4882a593Smuzhiyun {
2821*4882a593Smuzhiyun struct wmi_echo_ev_arg arg = {};
2822*4882a593Smuzhiyun int ret;
2823*4882a593Smuzhiyun
2824*4882a593Smuzhiyun ret = ath10k_wmi_pull_echo_ev(ar, skb, &arg);
2825*4882a593Smuzhiyun if (ret) {
2826*4882a593Smuzhiyun ath10k_warn(ar, "failed to parse echo: %d\n", ret);
2827*4882a593Smuzhiyun return;
2828*4882a593Smuzhiyun }
2829*4882a593Smuzhiyun
2830*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI,
2831*4882a593Smuzhiyun "wmi event echo value 0x%08x\n",
2832*4882a593Smuzhiyun le32_to_cpu(arg.value));
2833*4882a593Smuzhiyun
2834*4882a593Smuzhiyun if (le32_to_cpu(arg.value) == ATH10K_WMI_BARRIER_ECHO_ID)
2835*4882a593Smuzhiyun complete(&ar->wmi.barrier);
2836*4882a593Smuzhiyun }
2837*4882a593Smuzhiyun
ath10k_wmi_event_debug_mesg(struct ath10k * ar,struct sk_buff * skb)2838*4882a593Smuzhiyun int ath10k_wmi_event_debug_mesg(struct ath10k *ar, struct sk_buff *skb)
2839*4882a593Smuzhiyun {
2840*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event debug mesg len %d\n",
2841*4882a593Smuzhiyun skb->len);
2842*4882a593Smuzhiyun
2843*4882a593Smuzhiyun trace_ath10k_wmi_dbglog(ar, skb->data, skb->len);
2844*4882a593Smuzhiyun
2845*4882a593Smuzhiyun return 0;
2846*4882a593Smuzhiyun }
2847*4882a593Smuzhiyun
ath10k_wmi_pull_pdev_stats_base(const struct wmi_pdev_stats_base * src,struct ath10k_fw_stats_pdev * dst)2848*4882a593Smuzhiyun void ath10k_wmi_pull_pdev_stats_base(const struct wmi_pdev_stats_base *src,
2849*4882a593Smuzhiyun struct ath10k_fw_stats_pdev *dst)
2850*4882a593Smuzhiyun {
2851*4882a593Smuzhiyun dst->ch_noise_floor = __le32_to_cpu(src->chan_nf);
2852*4882a593Smuzhiyun dst->tx_frame_count = __le32_to_cpu(src->tx_frame_count);
2853*4882a593Smuzhiyun dst->rx_frame_count = __le32_to_cpu(src->rx_frame_count);
2854*4882a593Smuzhiyun dst->rx_clear_count = __le32_to_cpu(src->rx_clear_count);
2855*4882a593Smuzhiyun dst->cycle_count = __le32_to_cpu(src->cycle_count);
2856*4882a593Smuzhiyun dst->phy_err_count = __le32_to_cpu(src->phy_err_count);
2857*4882a593Smuzhiyun dst->chan_tx_power = __le32_to_cpu(src->chan_tx_pwr);
2858*4882a593Smuzhiyun }
2859*4882a593Smuzhiyun
ath10k_wmi_pull_pdev_stats_tx(const struct wmi_pdev_stats_tx * src,struct ath10k_fw_stats_pdev * dst)2860*4882a593Smuzhiyun void ath10k_wmi_pull_pdev_stats_tx(const struct wmi_pdev_stats_tx *src,
2861*4882a593Smuzhiyun struct ath10k_fw_stats_pdev *dst)
2862*4882a593Smuzhiyun {
2863*4882a593Smuzhiyun dst->comp_queued = __le32_to_cpu(src->comp_queued);
2864*4882a593Smuzhiyun dst->comp_delivered = __le32_to_cpu(src->comp_delivered);
2865*4882a593Smuzhiyun dst->msdu_enqued = __le32_to_cpu(src->msdu_enqued);
2866*4882a593Smuzhiyun dst->mpdu_enqued = __le32_to_cpu(src->mpdu_enqued);
2867*4882a593Smuzhiyun dst->wmm_drop = __le32_to_cpu(src->wmm_drop);
2868*4882a593Smuzhiyun dst->local_enqued = __le32_to_cpu(src->local_enqued);
2869*4882a593Smuzhiyun dst->local_freed = __le32_to_cpu(src->local_freed);
2870*4882a593Smuzhiyun dst->hw_queued = __le32_to_cpu(src->hw_queued);
2871*4882a593Smuzhiyun dst->hw_reaped = __le32_to_cpu(src->hw_reaped);
2872*4882a593Smuzhiyun dst->underrun = __le32_to_cpu(src->underrun);
2873*4882a593Smuzhiyun dst->tx_abort = __le32_to_cpu(src->tx_abort);
2874*4882a593Smuzhiyun dst->mpdus_requed = __le32_to_cpu(src->mpdus_requed);
2875*4882a593Smuzhiyun dst->tx_ko = __le32_to_cpu(src->tx_ko);
2876*4882a593Smuzhiyun dst->data_rc = __le32_to_cpu(src->data_rc);
2877*4882a593Smuzhiyun dst->self_triggers = __le32_to_cpu(src->self_triggers);
2878*4882a593Smuzhiyun dst->sw_retry_failure = __le32_to_cpu(src->sw_retry_failure);
2879*4882a593Smuzhiyun dst->illgl_rate_phy_err = __le32_to_cpu(src->illgl_rate_phy_err);
2880*4882a593Smuzhiyun dst->pdev_cont_xretry = __le32_to_cpu(src->pdev_cont_xretry);
2881*4882a593Smuzhiyun dst->pdev_tx_timeout = __le32_to_cpu(src->pdev_tx_timeout);
2882*4882a593Smuzhiyun dst->pdev_resets = __le32_to_cpu(src->pdev_resets);
2883*4882a593Smuzhiyun dst->phy_underrun = __le32_to_cpu(src->phy_underrun);
2884*4882a593Smuzhiyun dst->txop_ovf = __le32_to_cpu(src->txop_ovf);
2885*4882a593Smuzhiyun }
2886*4882a593Smuzhiyun
2887*4882a593Smuzhiyun static void
ath10k_wmi_10_4_pull_pdev_stats_tx(const struct wmi_10_4_pdev_stats_tx * src,struct ath10k_fw_stats_pdev * dst)2888*4882a593Smuzhiyun ath10k_wmi_10_4_pull_pdev_stats_tx(const struct wmi_10_4_pdev_stats_tx *src,
2889*4882a593Smuzhiyun struct ath10k_fw_stats_pdev *dst)
2890*4882a593Smuzhiyun {
2891*4882a593Smuzhiyun dst->comp_queued = __le32_to_cpu(src->comp_queued);
2892*4882a593Smuzhiyun dst->comp_delivered = __le32_to_cpu(src->comp_delivered);
2893*4882a593Smuzhiyun dst->msdu_enqued = __le32_to_cpu(src->msdu_enqued);
2894*4882a593Smuzhiyun dst->mpdu_enqued = __le32_to_cpu(src->mpdu_enqued);
2895*4882a593Smuzhiyun dst->wmm_drop = __le32_to_cpu(src->wmm_drop);
2896*4882a593Smuzhiyun dst->local_enqued = __le32_to_cpu(src->local_enqued);
2897*4882a593Smuzhiyun dst->local_freed = __le32_to_cpu(src->local_freed);
2898*4882a593Smuzhiyun dst->hw_queued = __le32_to_cpu(src->hw_queued);
2899*4882a593Smuzhiyun dst->hw_reaped = __le32_to_cpu(src->hw_reaped);
2900*4882a593Smuzhiyun dst->underrun = __le32_to_cpu(src->underrun);
2901*4882a593Smuzhiyun dst->tx_abort = __le32_to_cpu(src->tx_abort);
2902*4882a593Smuzhiyun dst->mpdus_requed = __le32_to_cpu(src->mpdus_requed);
2903*4882a593Smuzhiyun dst->tx_ko = __le32_to_cpu(src->tx_ko);
2904*4882a593Smuzhiyun dst->data_rc = __le32_to_cpu(src->data_rc);
2905*4882a593Smuzhiyun dst->self_triggers = __le32_to_cpu(src->self_triggers);
2906*4882a593Smuzhiyun dst->sw_retry_failure = __le32_to_cpu(src->sw_retry_failure);
2907*4882a593Smuzhiyun dst->illgl_rate_phy_err = __le32_to_cpu(src->illgl_rate_phy_err);
2908*4882a593Smuzhiyun dst->pdev_cont_xretry = __le32_to_cpu(src->pdev_cont_xretry);
2909*4882a593Smuzhiyun dst->pdev_tx_timeout = __le32_to_cpu(src->pdev_tx_timeout);
2910*4882a593Smuzhiyun dst->pdev_resets = __le32_to_cpu(src->pdev_resets);
2911*4882a593Smuzhiyun dst->phy_underrun = __le32_to_cpu(src->phy_underrun);
2912*4882a593Smuzhiyun dst->txop_ovf = __le32_to_cpu(src->txop_ovf);
2913*4882a593Smuzhiyun dst->hw_paused = __le32_to_cpu(src->hw_paused);
2914*4882a593Smuzhiyun dst->seq_posted = __le32_to_cpu(src->seq_posted);
2915*4882a593Smuzhiyun dst->seq_failed_queueing =
2916*4882a593Smuzhiyun __le32_to_cpu(src->seq_failed_queueing);
2917*4882a593Smuzhiyun dst->seq_completed = __le32_to_cpu(src->seq_completed);
2918*4882a593Smuzhiyun dst->seq_restarted = __le32_to_cpu(src->seq_restarted);
2919*4882a593Smuzhiyun dst->mu_seq_posted = __le32_to_cpu(src->mu_seq_posted);
2920*4882a593Smuzhiyun dst->mpdus_sw_flush = __le32_to_cpu(src->mpdus_sw_flush);
2921*4882a593Smuzhiyun dst->mpdus_hw_filter = __le32_to_cpu(src->mpdus_hw_filter);
2922*4882a593Smuzhiyun dst->mpdus_truncated = __le32_to_cpu(src->mpdus_truncated);
2923*4882a593Smuzhiyun dst->mpdus_ack_failed = __le32_to_cpu(src->mpdus_ack_failed);
2924*4882a593Smuzhiyun dst->mpdus_hw_filter = __le32_to_cpu(src->mpdus_hw_filter);
2925*4882a593Smuzhiyun dst->mpdus_expired = __le32_to_cpu(src->mpdus_expired);
2926*4882a593Smuzhiyun }
2927*4882a593Smuzhiyun
ath10k_wmi_pull_pdev_stats_rx(const struct wmi_pdev_stats_rx * src,struct ath10k_fw_stats_pdev * dst)2928*4882a593Smuzhiyun void ath10k_wmi_pull_pdev_stats_rx(const struct wmi_pdev_stats_rx *src,
2929*4882a593Smuzhiyun struct ath10k_fw_stats_pdev *dst)
2930*4882a593Smuzhiyun {
2931*4882a593Smuzhiyun dst->mid_ppdu_route_change = __le32_to_cpu(src->mid_ppdu_route_change);
2932*4882a593Smuzhiyun dst->status_rcvd = __le32_to_cpu(src->status_rcvd);
2933*4882a593Smuzhiyun dst->r0_frags = __le32_to_cpu(src->r0_frags);
2934*4882a593Smuzhiyun dst->r1_frags = __le32_to_cpu(src->r1_frags);
2935*4882a593Smuzhiyun dst->r2_frags = __le32_to_cpu(src->r2_frags);
2936*4882a593Smuzhiyun dst->r3_frags = __le32_to_cpu(src->r3_frags);
2937*4882a593Smuzhiyun dst->htt_msdus = __le32_to_cpu(src->htt_msdus);
2938*4882a593Smuzhiyun dst->htt_mpdus = __le32_to_cpu(src->htt_mpdus);
2939*4882a593Smuzhiyun dst->loc_msdus = __le32_to_cpu(src->loc_msdus);
2940*4882a593Smuzhiyun dst->loc_mpdus = __le32_to_cpu(src->loc_mpdus);
2941*4882a593Smuzhiyun dst->oversize_amsdu = __le32_to_cpu(src->oversize_amsdu);
2942*4882a593Smuzhiyun dst->phy_errs = __le32_to_cpu(src->phy_errs);
2943*4882a593Smuzhiyun dst->phy_err_drop = __le32_to_cpu(src->phy_err_drop);
2944*4882a593Smuzhiyun dst->mpdu_errs = __le32_to_cpu(src->mpdu_errs);
2945*4882a593Smuzhiyun }
2946*4882a593Smuzhiyun
ath10k_wmi_pull_pdev_stats_extra(const struct wmi_pdev_stats_extra * src,struct ath10k_fw_stats_pdev * dst)2947*4882a593Smuzhiyun void ath10k_wmi_pull_pdev_stats_extra(const struct wmi_pdev_stats_extra *src,
2948*4882a593Smuzhiyun struct ath10k_fw_stats_pdev *dst)
2949*4882a593Smuzhiyun {
2950*4882a593Smuzhiyun dst->ack_rx_bad = __le32_to_cpu(src->ack_rx_bad);
2951*4882a593Smuzhiyun dst->rts_bad = __le32_to_cpu(src->rts_bad);
2952*4882a593Smuzhiyun dst->rts_good = __le32_to_cpu(src->rts_good);
2953*4882a593Smuzhiyun dst->fcs_bad = __le32_to_cpu(src->fcs_bad);
2954*4882a593Smuzhiyun dst->no_beacons = __le32_to_cpu(src->no_beacons);
2955*4882a593Smuzhiyun dst->mib_int_count = __le32_to_cpu(src->mib_int_count);
2956*4882a593Smuzhiyun }
2957*4882a593Smuzhiyun
ath10k_wmi_pull_peer_stats(const struct wmi_peer_stats * src,struct ath10k_fw_stats_peer * dst)2958*4882a593Smuzhiyun void ath10k_wmi_pull_peer_stats(const struct wmi_peer_stats *src,
2959*4882a593Smuzhiyun struct ath10k_fw_stats_peer *dst)
2960*4882a593Smuzhiyun {
2961*4882a593Smuzhiyun ether_addr_copy(dst->peer_macaddr, src->peer_macaddr.addr);
2962*4882a593Smuzhiyun dst->peer_rssi = __le32_to_cpu(src->peer_rssi);
2963*4882a593Smuzhiyun dst->peer_tx_rate = __le32_to_cpu(src->peer_tx_rate);
2964*4882a593Smuzhiyun }
2965*4882a593Smuzhiyun
2966*4882a593Smuzhiyun static void
ath10k_wmi_10_4_pull_peer_stats(const struct wmi_10_4_peer_stats * src,struct ath10k_fw_stats_peer * dst)2967*4882a593Smuzhiyun ath10k_wmi_10_4_pull_peer_stats(const struct wmi_10_4_peer_stats *src,
2968*4882a593Smuzhiyun struct ath10k_fw_stats_peer *dst)
2969*4882a593Smuzhiyun {
2970*4882a593Smuzhiyun ether_addr_copy(dst->peer_macaddr, src->peer_macaddr.addr);
2971*4882a593Smuzhiyun dst->peer_rssi = __le32_to_cpu(src->peer_rssi);
2972*4882a593Smuzhiyun dst->peer_tx_rate = __le32_to_cpu(src->peer_tx_rate);
2973*4882a593Smuzhiyun dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate);
2974*4882a593Smuzhiyun }
2975*4882a593Smuzhiyun
2976*4882a593Smuzhiyun static void
ath10k_wmi_10_4_pull_vdev_stats(const struct wmi_vdev_stats_extd * src,struct ath10k_fw_stats_vdev_extd * dst)2977*4882a593Smuzhiyun ath10k_wmi_10_4_pull_vdev_stats(const struct wmi_vdev_stats_extd *src,
2978*4882a593Smuzhiyun struct ath10k_fw_stats_vdev_extd *dst)
2979*4882a593Smuzhiyun {
2980*4882a593Smuzhiyun dst->vdev_id = __le32_to_cpu(src->vdev_id);
2981*4882a593Smuzhiyun dst->ppdu_aggr_cnt = __le32_to_cpu(src->ppdu_aggr_cnt);
2982*4882a593Smuzhiyun dst->ppdu_noack = __le32_to_cpu(src->ppdu_noack);
2983*4882a593Smuzhiyun dst->mpdu_queued = __le32_to_cpu(src->mpdu_queued);
2984*4882a593Smuzhiyun dst->ppdu_nonaggr_cnt = __le32_to_cpu(src->ppdu_nonaggr_cnt);
2985*4882a593Smuzhiyun dst->mpdu_sw_requeued = __le32_to_cpu(src->mpdu_sw_requeued);
2986*4882a593Smuzhiyun dst->mpdu_suc_retry = __le32_to_cpu(src->mpdu_suc_retry);
2987*4882a593Smuzhiyun dst->mpdu_suc_multitry = __le32_to_cpu(src->mpdu_suc_multitry);
2988*4882a593Smuzhiyun dst->mpdu_fail_retry = __le32_to_cpu(src->mpdu_fail_retry);
2989*4882a593Smuzhiyun dst->tx_ftm_suc = __le32_to_cpu(src->tx_ftm_suc);
2990*4882a593Smuzhiyun dst->tx_ftm_suc_retry = __le32_to_cpu(src->tx_ftm_suc_retry);
2991*4882a593Smuzhiyun dst->tx_ftm_fail = __le32_to_cpu(src->tx_ftm_fail);
2992*4882a593Smuzhiyun dst->rx_ftmr_cnt = __le32_to_cpu(src->rx_ftmr_cnt);
2993*4882a593Smuzhiyun dst->rx_ftmr_dup_cnt = __le32_to_cpu(src->rx_ftmr_dup_cnt);
2994*4882a593Smuzhiyun dst->rx_iftmr_cnt = __le32_to_cpu(src->rx_iftmr_cnt);
2995*4882a593Smuzhiyun dst->rx_iftmr_dup_cnt = __le32_to_cpu(src->rx_iftmr_dup_cnt);
2996*4882a593Smuzhiyun }
2997*4882a593Smuzhiyun
ath10k_wmi_main_op_pull_fw_stats(struct ath10k * ar,struct sk_buff * skb,struct ath10k_fw_stats * stats)2998*4882a593Smuzhiyun static int ath10k_wmi_main_op_pull_fw_stats(struct ath10k *ar,
2999*4882a593Smuzhiyun struct sk_buff *skb,
3000*4882a593Smuzhiyun struct ath10k_fw_stats *stats)
3001*4882a593Smuzhiyun {
3002*4882a593Smuzhiyun const struct wmi_stats_event *ev = (void *)skb->data;
3003*4882a593Smuzhiyun u32 num_pdev_stats, num_peer_stats;
3004*4882a593Smuzhiyun int i;
3005*4882a593Smuzhiyun
3006*4882a593Smuzhiyun if (!skb_pull(skb, sizeof(*ev)))
3007*4882a593Smuzhiyun return -EPROTO;
3008*4882a593Smuzhiyun
3009*4882a593Smuzhiyun num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
3010*4882a593Smuzhiyun num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
3011*4882a593Smuzhiyun
3012*4882a593Smuzhiyun for (i = 0; i < num_pdev_stats; i++) {
3013*4882a593Smuzhiyun const struct wmi_pdev_stats *src;
3014*4882a593Smuzhiyun struct ath10k_fw_stats_pdev *dst;
3015*4882a593Smuzhiyun
3016*4882a593Smuzhiyun src = (void *)skb->data;
3017*4882a593Smuzhiyun if (!skb_pull(skb, sizeof(*src)))
3018*4882a593Smuzhiyun return -EPROTO;
3019*4882a593Smuzhiyun
3020*4882a593Smuzhiyun dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
3021*4882a593Smuzhiyun if (!dst)
3022*4882a593Smuzhiyun continue;
3023*4882a593Smuzhiyun
3024*4882a593Smuzhiyun ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
3025*4882a593Smuzhiyun ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
3026*4882a593Smuzhiyun ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
3027*4882a593Smuzhiyun
3028*4882a593Smuzhiyun list_add_tail(&dst->list, &stats->pdevs);
3029*4882a593Smuzhiyun }
3030*4882a593Smuzhiyun
3031*4882a593Smuzhiyun /* fw doesn't implement vdev stats */
3032*4882a593Smuzhiyun
3033*4882a593Smuzhiyun for (i = 0; i < num_peer_stats; i++) {
3034*4882a593Smuzhiyun const struct wmi_peer_stats *src;
3035*4882a593Smuzhiyun struct ath10k_fw_stats_peer *dst;
3036*4882a593Smuzhiyun
3037*4882a593Smuzhiyun src = (void *)skb->data;
3038*4882a593Smuzhiyun if (!skb_pull(skb, sizeof(*src)))
3039*4882a593Smuzhiyun return -EPROTO;
3040*4882a593Smuzhiyun
3041*4882a593Smuzhiyun dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
3042*4882a593Smuzhiyun if (!dst)
3043*4882a593Smuzhiyun continue;
3044*4882a593Smuzhiyun
3045*4882a593Smuzhiyun ath10k_wmi_pull_peer_stats(src, dst);
3046*4882a593Smuzhiyun list_add_tail(&dst->list, &stats->peers);
3047*4882a593Smuzhiyun }
3048*4882a593Smuzhiyun
3049*4882a593Smuzhiyun return 0;
3050*4882a593Smuzhiyun }
3051*4882a593Smuzhiyun
ath10k_wmi_10x_op_pull_fw_stats(struct ath10k * ar,struct sk_buff * skb,struct ath10k_fw_stats * stats)3052*4882a593Smuzhiyun static int ath10k_wmi_10x_op_pull_fw_stats(struct ath10k *ar,
3053*4882a593Smuzhiyun struct sk_buff *skb,
3054*4882a593Smuzhiyun struct ath10k_fw_stats *stats)
3055*4882a593Smuzhiyun {
3056*4882a593Smuzhiyun const struct wmi_stats_event *ev = (void *)skb->data;
3057*4882a593Smuzhiyun u32 num_pdev_stats, num_peer_stats;
3058*4882a593Smuzhiyun int i;
3059*4882a593Smuzhiyun
3060*4882a593Smuzhiyun if (!skb_pull(skb, sizeof(*ev)))
3061*4882a593Smuzhiyun return -EPROTO;
3062*4882a593Smuzhiyun
3063*4882a593Smuzhiyun num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
3064*4882a593Smuzhiyun num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
3065*4882a593Smuzhiyun
3066*4882a593Smuzhiyun for (i = 0; i < num_pdev_stats; i++) {
3067*4882a593Smuzhiyun const struct wmi_10x_pdev_stats *src;
3068*4882a593Smuzhiyun struct ath10k_fw_stats_pdev *dst;
3069*4882a593Smuzhiyun
3070*4882a593Smuzhiyun src = (void *)skb->data;
3071*4882a593Smuzhiyun if (!skb_pull(skb, sizeof(*src)))
3072*4882a593Smuzhiyun return -EPROTO;
3073*4882a593Smuzhiyun
3074*4882a593Smuzhiyun dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
3075*4882a593Smuzhiyun if (!dst)
3076*4882a593Smuzhiyun continue;
3077*4882a593Smuzhiyun
3078*4882a593Smuzhiyun ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
3079*4882a593Smuzhiyun ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
3080*4882a593Smuzhiyun ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
3081*4882a593Smuzhiyun ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
3082*4882a593Smuzhiyun
3083*4882a593Smuzhiyun list_add_tail(&dst->list, &stats->pdevs);
3084*4882a593Smuzhiyun }
3085*4882a593Smuzhiyun
3086*4882a593Smuzhiyun /* fw doesn't implement vdev stats */
3087*4882a593Smuzhiyun
3088*4882a593Smuzhiyun for (i = 0; i < num_peer_stats; i++) {
3089*4882a593Smuzhiyun const struct wmi_10x_peer_stats *src;
3090*4882a593Smuzhiyun struct ath10k_fw_stats_peer *dst;
3091*4882a593Smuzhiyun
3092*4882a593Smuzhiyun src = (void *)skb->data;
3093*4882a593Smuzhiyun if (!skb_pull(skb, sizeof(*src)))
3094*4882a593Smuzhiyun return -EPROTO;
3095*4882a593Smuzhiyun
3096*4882a593Smuzhiyun dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
3097*4882a593Smuzhiyun if (!dst)
3098*4882a593Smuzhiyun continue;
3099*4882a593Smuzhiyun
3100*4882a593Smuzhiyun ath10k_wmi_pull_peer_stats(&src->old, dst);
3101*4882a593Smuzhiyun
3102*4882a593Smuzhiyun dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate);
3103*4882a593Smuzhiyun
3104*4882a593Smuzhiyun list_add_tail(&dst->list, &stats->peers);
3105*4882a593Smuzhiyun }
3106*4882a593Smuzhiyun
3107*4882a593Smuzhiyun return 0;
3108*4882a593Smuzhiyun }
3109*4882a593Smuzhiyun
ath10k_wmi_10_2_op_pull_fw_stats(struct ath10k * ar,struct sk_buff * skb,struct ath10k_fw_stats * stats)3110*4882a593Smuzhiyun static int ath10k_wmi_10_2_op_pull_fw_stats(struct ath10k *ar,
3111*4882a593Smuzhiyun struct sk_buff *skb,
3112*4882a593Smuzhiyun struct ath10k_fw_stats *stats)
3113*4882a593Smuzhiyun {
3114*4882a593Smuzhiyun const struct wmi_10_2_stats_event *ev = (void *)skb->data;
3115*4882a593Smuzhiyun u32 num_pdev_stats;
3116*4882a593Smuzhiyun u32 num_pdev_ext_stats;
3117*4882a593Smuzhiyun u32 num_peer_stats;
3118*4882a593Smuzhiyun int i;
3119*4882a593Smuzhiyun
3120*4882a593Smuzhiyun if (!skb_pull(skb, sizeof(*ev)))
3121*4882a593Smuzhiyun return -EPROTO;
3122*4882a593Smuzhiyun
3123*4882a593Smuzhiyun num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
3124*4882a593Smuzhiyun num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats);
3125*4882a593Smuzhiyun num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
3126*4882a593Smuzhiyun
3127*4882a593Smuzhiyun for (i = 0; i < num_pdev_stats; i++) {
3128*4882a593Smuzhiyun const struct wmi_10_2_pdev_stats *src;
3129*4882a593Smuzhiyun struct ath10k_fw_stats_pdev *dst;
3130*4882a593Smuzhiyun
3131*4882a593Smuzhiyun src = (void *)skb->data;
3132*4882a593Smuzhiyun if (!skb_pull(skb, sizeof(*src)))
3133*4882a593Smuzhiyun return -EPROTO;
3134*4882a593Smuzhiyun
3135*4882a593Smuzhiyun dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
3136*4882a593Smuzhiyun if (!dst)
3137*4882a593Smuzhiyun continue;
3138*4882a593Smuzhiyun
3139*4882a593Smuzhiyun ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
3140*4882a593Smuzhiyun ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
3141*4882a593Smuzhiyun ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
3142*4882a593Smuzhiyun ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
3143*4882a593Smuzhiyun /* FIXME: expose 10.2 specific values */
3144*4882a593Smuzhiyun
3145*4882a593Smuzhiyun list_add_tail(&dst->list, &stats->pdevs);
3146*4882a593Smuzhiyun }
3147*4882a593Smuzhiyun
3148*4882a593Smuzhiyun for (i = 0; i < num_pdev_ext_stats; i++) {
3149*4882a593Smuzhiyun const struct wmi_10_2_pdev_ext_stats *src;
3150*4882a593Smuzhiyun
3151*4882a593Smuzhiyun src = (void *)skb->data;
3152*4882a593Smuzhiyun if (!skb_pull(skb, sizeof(*src)))
3153*4882a593Smuzhiyun return -EPROTO;
3154*4882a593Smuzhiyun
3155*4882a593Smuzhiyun /* FIXME: expose values to userspace
3156*4882a593Smuzhiyun *
3157*4882a593Smuzhiyun * Note: Even though this loop seems to do nothing it is
3158*4882a593Smuzhiyun * required to parse following sub-structures properly.
3159*4882a593Smuzhiyun */
3160*4882a593Smuzhiyun }
3161*4882a593Smuzhiyun
3162*4882a593Smuzhiyun /* fw doesn't implement vdev stats */
3163*4882a593Smuzhiyun
3164*4882a593Smuzhiyun for (i = 0; i < num_peer_stats; i++) {
3165*4882a593Smuzhiyun const struct wmi_10_2_peer_stats *src;
3166*4882a593Smuzhiyun struct ath10k_fw_stats_peer *dst;
3167*4882a593Smuzhiyun
3168*4882a593Smuzhiyun src = (void *)skb->data;
3169*4882a593Smuzhiyun if (!skb_pull(skb, sizeof(*src)))
3170*4882a593Smuzhiyun return -EPROTO;
3171*4882a593Smuzhiyun
3172*4882a593Smuzhiyun dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
3173*4882a593Smuzhiyun if (!dst)
3174*4882a593Smuzhiyun continue;
3175*4882a593Smuzhiyun
3176*4882a593Smuzhiyun ath10k_wmi_pull_peer_stats(&src->old, dst);
3177*4882a593Smuzhiyun
3178*4882a593Smuzhiyun dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate);
3179*4882a593Smuzhiyun /* FIXME: expose 10.2 specific values */
3180*4882a593Smuzhiyun
3181*4882a593Smuzhiyun list_add_tail(&dst->list, &stats->peers);
3182*4882a593Smuzhiyun }
3183*4882a593Smuzhiyun
3184*4882a593Smuzhiyun return 0;
3185*4882a593Smuzhiyun }
3186*4882a593Smuzhiyun
ath10k_wmi_10_2_4_op_pull_fw_stats(struct ath10k * ar,struct sk_buff * skb,struct ath10k_fw_stats * stats)3187*4882a593Smuzhiyun static int ath10k_wmi_10_2_4_op_pull_fw_stats(struct ath10k *ar,
3188*4882a593Smuzhiyun struct sk_buff *skb,
3189*4882a593Smuzhiyun struct ath10k_fw_stats *stats)
3190*4882a593Smuzhiyun {
3191*4882a593Smuzhiyun const struct wmi_10_2_stats_event *ev = (void *)skb->data;
3192*4882a593Smuzhiyun u32 num_pdev_stats;
3193*4882a593Smuzhiyun u32 num_pdev_ext_stats;
3194*4882a593Smuzhiyun u32 num_peer_stats;
3195*4882a593Smuzhiyun int i;
3196*4882a593Smuzhiyun
3197*4882a593Smuzhiyun if (!skb_pull(skb, sizeof(*ev)))
3198*4882a593Smuzhiyun return -EPROTO;
3199*4882a593Smuzhiyun
3200*4882a593Smuzhiyun num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
3201*4882a593Smuzhiyun num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats);
3202*4882a593Smuzhiyun num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
3203*4882a593Smuzhiyun
3204*4882a593Smuzhiyun for (i = 0; i < num_pdev_stats; i++) {
3205*4882a593Smuzhiyun const struct wmi_10_2_pdev_stats *src;
3206*4882a593Smuzhiyun struct ath10k_fw_stats_pdev *dst;
3207*4882a593Smuzhiyun
3208*4882a593Smuzhiyun src = (void *)skb->data;
3209*4882a593Smuzhiyun if (!skb_pull(skb, sizeof(*src)))
3210*4882a593Smuzhiyun return -EPROTO;
3211*4882a593Smuzhiyun
3212*4882a593Smuzhiyun dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
3213*4882a593Smuzhiyun if (!dst)
3214*4882a593Smuzhiyun continue;
3215*4882a593Smuzhiyun
3216*4882a593Smuzhiyun ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
3217*4882a593Smuzhiyun ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst);
3218*4882a593Smuzhiyun ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
3219*4882a593Smuzhiyun ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
3220*4882a593Smuzhiyun /* FIXME: expose 10.2 specific values */
3221*4882a593Smuzhiyun
3222*4882a593Smuzhiyun list_add_tail(&dst->list, &stats->pdevs);
3223*4882a593Smuzhiyun }
3224*4882a593Smuzhiyun
3225*4882a593Smuzhiyun for (i = 0; i < num_pdev_ext_stats; i++) {
3226*4882a593Smuzhiyun const struct wmi_10_2_pdev_ext_stats *src;
3227*4882a593Smuzhiyun
3228*4882a593Smuzhiyun src = (void *)skb->data;
3229*4882a593Smuzhiyun if (!skb_pull(skb, sizeof(*src)))
3230*4882a593Smuzhiyun return -EPROTO;
3231*4882a593Smuzhiyun
3232*4882a593Smuzhiyun /* FIXME: expose values to userspace
3233*4882a593Smuzhiyun *
3234*4882a593Smuzhiyun * Note: Even though this loop seems to do nothing it is
3235*4882a593Smuzhiyun * required to parse following sub-structures properly.
3236*4882a593Smuzhiyun */
3237*4882a593Smuzhiyun }
3238*4882a593Smuzhiyun
3239*4882a593Smuzhiyun /* fw doesn't implement vdev stats */
3240*4882a593Smuzhiyun
3241*4882a593Smuzhiyun for (i = 0; i < num_peer_stats; i++) {
3242*4882a593Smuzhiyun const struct wmi_10_2_4_ext_peer_stats *src;
3243*4882a593Smuzhiyun struct ath10k_fw_stats_peer *dst;
3244*4882a593Smuzhiyun int stats_len;
3245*4882a593Smuzhiyun
3246*4882a593Smuzhiyun if (test_bit(WMI_SERVICE_PEER_STATS, ar->wmi.svc_map))
3247*4882a593Smuzhiyun stats_len = sizeof(struct wmi_10_2_4_ext_peer_stats);
3248*4882a593Smuzhiyun else
3249*4882a593Smuzhiyun stats_len = sizeof(struct wmi_10_2_4_peer_stats);
3250*4882a593Smuzhiyun
3251*4882a593Smuzhiyun src = (void *)skb->data;
3252*4882a593Smuzhiyun if (!skb_pull(skb, stats_len))
3253*4882a593Smuzhiyun return -EPROTO;
3254*4882a593Smuzhiyun
3255*4882a593Smuzhiyun dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
3256*4882a593Smuzhiyun if (!dst)
3257*4882a593Smuzhiyun continue;
3258*4882a593Smuzhiyun
3259*4882a593Smuzhiyun ath10k_wmi_pull_peer_stats(&src->common.old, dst);
3260*4882a593Smuzhiyun
3261*4882a593Smuzhiyun dst->peer_rx_rate = __le32_to_cpu(src->common.peer_rx_rate);
3262*4882a593Smuzhiyun
3263*4882a593Smuzhiyun if (ath10k_peer_stats_enabled(ar))
3264*4882a593Smuzhiyun dst->rx_duration = __le32_to_cpu(src->rx_duration);
3265*4882a593Smuzhiyun /* FIXME: expose 10.2 specific values */
3266*4882a593Smuzhiyun
3267*4882a593Smuzhiyun list_add_tail(&dst->list, &stats->peers);
3268*4882a593Smuzhiyun }
3269*4882a593Smuzhiyun
3270*4882a593Smuzhiyun return 0;
3271*4882a593Smuzhiyun }
3272*4882a593Smuzhiyun
ath10k_wmi_10_4_op_pull_fw_stats(struct ath10k * ar,struct sk_buff * skb,struct ath10k_fw_stats * stats)3273*4882a593Smuzhiyun static int ath10k_wmi_10_4_op_pull_fw_stats(struct ath10k *ar,
3274*4882a593Smuzhiyun struct sk_buff *skb,
3275*4882a593Smuzhiyun struct ath10k_fw_stats *stats)
3276*4882a593Smuzhiyun {
3277*4882a593Smuzhiyun const struct wmi_10_2_stats_event *ev = (void *)skb->data;
3278*4882a593Smuzhiyun u32 num_pdev_stats;
3279*4882a593Smuzhiyun u32 num_pdev_ext_stats;
3280*4882a593Smuzhiyun u32 num_vdev_stats;
3281*4882a593Smuzhiyun u32 num_peer_stats;
3282*4882a593Smuzhiyun u32 num_bcnflt_stats;
3283*4882a593Smuzhiyun u32 stats_id;
3284*4882a593Smuzhiyun int i;
3285*4882a593Smuzhiyun
3286*4882a593Smuzhiyun if (!skb_pull(skb, sizeof(*ev)))
3287*4882a593Smuzhiyun return -EPROTO;
3288*4882a593Smuzhiyun
3289*4882a593Smuzhiyun num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats);
3290*4882a593Smuzhiyun num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats);
3291*4882a593Smuzhiyun num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats);
3292*4882a593Smuzhiyun num_peer_stats = __le32_to_cpu(ev->num_peer_stats);
3293*4882a593Smuzhiyun num_bcnflt_stats = __le32_to_cpu(ev->num_bcnflt_stats);
3294*4882a593Smuzhiyun stats_id = __le32_to_cpu(ev->stats_id);
3295*4882a593Smuzhiyun
3296*4882a593Smuzhiyun for (i = 0; i < num_pdev_stats; i++) {
3297*4882a593Smuzhiyun const struct wmi_10_4_pdev_stats *src;
3298*4882a593Smuzhiyun struct ath10k_fw_stats_pdev *dst;
3299*4882a593Smuzhiyun
3300*4882a593Smuzhiyun src = (void *)skb->data;
3301*4882a593Smuzhiyun if (!skb_pull(skb, sizeof(*src)))
3302*4882a593Smuzhiyun return -EPROTO;
3303*4882a593Smuzhiyun
3304*4882a593Smuzhiyun dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
3305*4882a593Smuzhiyun if (!dst)
3306*4882a593Smuzhiyun continue;
3307*4882a593Smuzhiyun
3308*4882a593Smuzhiyun ath10k_wmi_pull_pdev_stats_base(&src->base, dst);
3309*4882a593Smuzhiyun ath10k_wmi_10_4_pull_pdev_stats_tx(&src->tx, dst);
3310*4882a593Smuzhiyun ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst);
3311*4882a593Smuzhiyun dst->rx_ovfl_errs = __le32_to_cpu(src->rx_ovfl_errs);
3312*4882a593Smuzhiyun ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst);
3313*4882a593Smuzhiyun
3314*4882a593Smuzhiyun list_add_tail(&dst->list, &stats->pdevs);
3315*4882a593Smuzhiyun }
3316*4882a593Smuzhiyun
3317*4882a593Smuzhiyun for (i = 0; i < num_pdev_ext_stats; i++) {
3318*4882a593Smuzhiyun const struct wmi_10_2_pdev_ext_stats *src;
3319*4882a593Smuzhiyun
3320*4882a593Smuzhiyun src = (void *)skb->data;
3321*4882a593Smuzhiyun if (!skb_pull(skb, sizeof(*src)))
3322*4882a593Smuzhiyun return -EPROTO;
3323*4882a593Smuzhiyun
3324*4882a593Smuzhiyun /* FIXME: expose values to userspace
3325*4882a593Smuzhiyun *
3326*4882a593Smuzhiyun * Note: Even though this loop seems to do nothing it is
3327*4882a593Smuzhiyun * required to parse following sub-structures properly.
3328*4882a593Smuzhiyun */
3329*4882a593Smuzhiyun }
3330*4882a593Smuzhiyun
3331*4882a593Smuzhiyun for (i = 0; i < num_vdev_stats; i++) {
3332*4882a593Smuzhiyun const struct wmi_vdev_stats *src;
3333*4882a593Smuzhiyun
3334*4882a593Smuzhiyun /* Ignore vdev stats here as it has only vdev id. Actual vdev
3335*4882a593Smuzhiyun * stats will be retrieved from vdev extended stats.
3336*4882a593Smuzhiyun */
3337*4882a593Smuzhiyun src = (void *)skb->data;
3338*4882a593Smuzhiyun if (!skb_pull(skb, sizeof(*src)))
3339*4882a593Smuzhiyun return -EPROTO;
3340*4882a593Smuzhiyun }
3341*4882a593Smuzhiyun
3342*4882a593Smuzhiyun for (i = 0; i < num_peer_stats; i++) {
3343*4882a593Smuzhiyun const struct wmi_10_4_peer_stats *src;
3344*4882a593Smuzhiyun struct ath10k_fw_stats_peer *dst;
3345*4882a593Smuzhiyun
3346*4882a593Smuzhiyun src = (void *)skb->data;
3347*4882a593Smuzhiyun if (!skb_pull(skb, sizeof(*src)))
3348*4882a593Smuzhiyun return -EPROTO;
3349*4882a593Smuzhiyun
3350*4882a593Smuzhiyun dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
3351*4882a593Smuzhiyun if (!dst)
3352*4882a593Smuzhiyun continue;
3353*4882a593Smuzhiyun
3354*4882a593Smuzhiyun ath10k_wmi_10_4_pull_peer_stats(src, dst);
3355*4882a593Smuzhiyun list_add_tail(&dst->list, &stats->peers);
3356*4882a593Smuzhiyun }
3357*4882a593Smuzhiyun
3358*4882a593Smuzhiyun for (i = 0; i < num_bcnflt_stats; i++) {
3359*4882a593Smuzhiyun const struct wmi_10_4_bss_bcn_filter_stats *src;
3360*4882a593Smuzhiyun
3361*4882a593Smuzhiyun src = (void *)skb->data;
3362*4882a593Smuzhiyun if (!skb_pull(skb, sizeof(*src)))
3363*4882a593Smuzhiyun return -EPROTO;
3364*4882a593Smuzhiyun
3365*4882a593Smuzhiyun /* FIXME: expose values to userspace
3366*4882a593Smuzhiyun *
3367*4882a593Smuzhiyun * Note: Even though this loop seems to do nothing it is
3368*4882a593Smuzhiyun * required to parse following sub-structures properly.
3369*4882a593Smuzhiyun */
3370*4882a593Smuzhiyun }
3371*4882a593Smuzhiyun
3372*4882a593Smuzhiyun if (stats_id & WMI_10_4_STAT_PEER_EXTD) {
3373*4882a593Smuzhiyun stats->extended = true;
3374*4882a593Smuzhiyun
3375*4882a593Smuzhiyun for (i = 0; i < num_peer_stats; i++) {
3376*4882a593Smuzhiyun const struct wmi_10_4_peer_extd_stats *src;
3377*4882a593Smuzhiyun struct ath10k_fw_extd_stats_peer *dst;
3378*4882a593Smuzhiyun
3379*4882a593Smuzhiyun src = (void *)skb->data;
3380*4882a593Smuzhiyun if (!skb_pull(skb, sizeof(*src)))
3381*4882a593Smuzhiyun return -EPROTO;
3382*4882a593Smuzhiyun
3383*4882a593Smuzhiyun dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
3384*4882a593Smuzhiyun if (!dst)
3385*4882a593Smuzhiyun continue;
3386*4882a593Smuzhiyun
3387*4882a593Smuzhiyun ether_addr_copy(dst->peer_macaddr,
3388*4882a593Smuzhiyun src->peer_macaddr.addr);
3389*4882a593Smuzhiyun dst->rx_duration = __le32_to_cpu(src->rx_duration);
3390*4882a593Smuzhiyun list_add_tail(&dst->list, &stats->peers_extd);
3391*4882a593Smuzhiyun }
3392*4882a593Smuzhiyun }
3393*4882a593Smuzhiyun
3394*4882a593Smuzhiyun if (stats_id & WMI_10_4_STAT_VDEV_EXTD) {
3395*4882a593Smuzhiyun for (i = 0; i < num_vdev_stats; i++) {
3396*4882a593Smuzhiyun const struct wmi_vdev_stats_extd *src;
3397*4882a593Smuzhiyun struct ath10k_fw_stats_vdev_extd *dst;
3398*4882a593Smuzhiyun
3399*4882a593Smuzhiyun src = (void *)skb->data;
3400*4882a593Smuzhiyun if (!skb_pull(skb, sizeof(*src)))
3401*4882a593Smuzhiyun return -EPROTO;
3402*4882a593Smuzhiyun
3403*4882a593Smuzhiyun dst = kzalloc(sizeof(*dst), GFP_ATOMIC);
3404*4882a593Smuzhiyun if (!dst)
3405*4882a593Smuzhiyun continue;
3406*4882a593Smuzhiyun ath10k_wmi_10_4_pull_vdev_stats(src, dst);
3407*4882a593Smuzhiyun list_add_tail(&dst->list, &stats->vdevs);
3408*4882a593Smuzhiyun }
3409*4882a593Smuzhiyun }
3410*4882a593Smuzhiyun
3411*4882a593Smuzhiyun return 0;
3412*4882a593Smuzhiyun }
3413*4882a593Smuzhiyun
ath10k_wmi_event_update_stats(struct ath10k * ar,struct sk_buff * skb)3414*4882a593Smuzhiyun void ath10k_wmi_event_update_stats(struct ath10k *ar, struct sk_buff *skb)
3415*4882a593Smuzhiyun {
3416*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_UPDATE_STATS_EVENTID\n");
3417*4882a593Smuzhiyun ath10k_debug_fw_stats_process(ar, skb);
3418*4882a593Smuzhiyun }
3419*4882a593Smuzhiyun
3420*4882a593Smuzhiyun static int
ath10k_wmi_op_pull_vdev_start_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_vdev_start_ev_arg * arg)3421*4882a593Smuzhiyun ath10k_wmi_op_pull_vdev_start_ev(struct ath10k *ar, struct sk_buff *skb,
3422*4882a593Smuzhiyun struct wmi_vdev_start_ev_arg *arg)
3423*4882a593Smuzhiyun {
3424*4882a593Smuzhiyun struct wmi_vdev_start_response_event *ev = (void *)skb->data;
3425*4882a593Smuzhiyun
3426*4882a593Smuzhiyun if (skb->len < sizeof(*ev))
3427*4882a593Smuzhiyun return -EPROTO;
3428*4882a593Smuzhiyun
3429*4882a593Smuzhiyun skb_pull(skb, sizeof(*ev));
3430*4882a593Smuzhiyun arg->vdev_id = ev->vdev_id;
3431*4882a593Smuzhiyun arg->req_id = ev->req_id;
3432*4882a593Smuzhiyun arg->resp_type = ev->resp_type;
3433*4882a593Smuzhiyun arg->status = ev->status;
3434*4882a593Smuzhiyun
3435*4882a593Smuzhiyun return 0;
3436*4882a593Smuzhiyun }
3437*4882a593Smuzhiyun
ath10k_wmi_event_vdev_start_resp(struct ath10k * ar,struct sk_buff * skb)3438*4882a593Smuzhiyun void ath10k_wmi_event_vdev_start_resp(struct ath10k *ar, struct sk_buff *skb)
3439*4882a593Smuzhiyun {
3440*4882a593Smuzhiyun struct wmi_vdev_start_ev_arg arg = {};
3441*4882a593Smuzhiyun int ret;
3442*4882a593Smuzhiyun u32 status;
3443*4882a593Smuzhiyun
3444*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_START_RESP_EVENTID\n");
3445*4882a593Smuzhiyun
3446*4882a593Smuzhiyun ar->last_wmi_vdev_start_status = 0;
3447*4882a593Smuzhiyun
3448*4882a593Smuzhiyun ret = ath10k_wmi_pull_vdev_start(ar, skb, &arg);
3449*4882a593Smuzhiyun if (ret) {
3450*4882a593Smuzhiyun ath10k_warn(ar, "failed to parse vdev start event: %d\n", ret);
3451*4882a593Smuzhiyun ar->last_wmi_vdev_start_status = ret;
3452*4882a593Smuzhiyun goto out;
3453*4882a593Smuzhiyun }
3454*4882a593Smuzhiyun
3455*4882a593Smuzhiyun status = __le32_to_cpu(arg.status);
3456*4882a593Smuzhiyun if (WARN_ON_ONCE(status)) {
3457*4882a593Smuzhiyun ath10k_warn(ar, "vdev-start-response reports status error: %d (%s)\n",
3458*4882a593Smuzhiyun status, (status == WMI_VDEV_START_CHAN_INVALID) ?
3459*4882a593Smuzhiyun "chan-invalid" : "unknown");
3460*4882a593Smuzhiyun /* Setup is done one way or another though, so we should still
3461*4882a593Smuzhiyun * do the completion, so don't return here.
3462*4882a593Smuzhiyun */
3463*4882a593Smuzhiyun ar->last_wmi_vdev_start_status = -EINVAL;
3464*4882a593Smuzhiyun }
3465*4882a593Smuzhiyun
3466*4882a593Smuzhiyun out:
3467*4882a593Smuzhiyun complete(&ar->vdev_setup_done);
3468*4882a593Smuzhiyun }
3469*4882a593Smuzhiyun
ath10k_wmi_event_vdev_stopped(struct ath10k * ar,struct sk_buff * skb)3470*4882a593Smuzhiyun void ath10k_wmi_event_vdev_stopped(struct ath10k *ar, struct sk_buff *skb)
3471*4882a593Smuzhiyun {
3472*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STOPPED_EVENTID\n");
3473*4882a593Smuzhiyun complete(&ar->vdev_setup_done);
3474*4882a593Smuzhiyun }
3475*4882a593Smuzhiyun
3476*4882a593Smuzhiyun static int
ath10k_wmi_op_pull_peer_kick_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_peer_kick_ev_arg * arg)3477*4882a593Smuzhiyun ath10k_wmi_op_pull_peer_kick_ev(struct ath10k *ar, struct sk_buff *skb,
3478*4882a593Smuzhiyun struct wmi_peer_kick_ev_arg *arg)
3479*4882a593Smuzhiyun {
3480*4882a593Smuzhiyun struct wmi_peer_sta_kickout_event *ev = (void *)skb->data;
3481*4882a593Smuzhiyun
3482*4882a593Smuzhiyun if (skb->len < sizeof(*ev))
3483*4882a593Smuzhiyun return -EPROTO;
3484*4882a593Smuzhiyun
3485*4882a593Smuzhiyun skb_pull(skb, sizeof(*ev));
3486*4882a593Smuzhiyun arg->mac_addr = ev->peer_macaddr.addr;
3487*4882a593Smuzhiyun
3488*4882a593Smuzhiyun return 0;
3489*4882a593Smuzhiyun }
3490*4882a593Smuzhiyun
ath10k_wmi_event_peer_sta_kickout(struct ath10k * ar,struct sk_buff * skb)3491*4882a593Smuzhiyun void ath10k_wmi_event_peer_sta_kickout(struct ath10k *ar, struct sk_buff *skb)
3492*4882a593Smuzhiyun {
3493*4882a593Smuzhiyun struct wmi_peer_kick_ev_arg arg = {};
3494*4882a593Smuzhiyun struct ieee80211_sta *sta;
3495*4882a593Smuzhiyun int ret;
3496*4882a593Smuzhiyun
3497*4882a593Smuzhiyun ret = ath10k_wmi_pull_peer_kick(ar, skb, &arg);
3498*4882a593Smuzhiyun if (ret) {
3499*4882a593Smuzhiyun ath10k_warn(ar, "failed to parse peer kickout event: %d\n",
3500*4882a593Smuzhiyun ret);
3501*4882a593Smuzhiyun return;
3502*4882a593Smuzhiyun }
3503*4882a593Smuzhiyun
3504*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event peer sta kickout %pM\n",
3505*4882a593Smuzhiyun arg.mac_addr);
3506*4882a593Smuzhiyun
3507*4882a593Smuzhiyun rcu_read_lock();
3508*4882a593Smuzhiyun
3509*4882a593Smuzhiyun sta = ieee80211_find_sta_by_ifaddr(ar->hw, arg.mac_addr, NULL);
3510*4882a593Smuzhiyun if (!sta) {
3511*4882a593Smuzhiyun ath10k_warn(ar, "Spurious quick kickout for STA %pM\n",
3512*4882a593Smuzhiyun arg.mac_addr);
3513*4882a593Smuzhiyun goto exit;
3514*4882a593Smuzhiyun }
3515*4882a593Smuzhiyun
3516*4882a593Smuzhiyun ieee80211_report_low_ack(sta, 10);
3517*4882a593Smuzhiyun
3518*4882a593Smuzhiyun exit:
3519*4882a593Smuzhiyun rcu_read_unlock();
3520*4882a593Smuzhiyun }
3521*4882a593Smuzhiyun
3522*4882a593Smuzhiyun /*
3523*4882a593Smuzhiyun * FIXME
3524*4882a593Smuzhiyun *
3525*4882a593Smuzhiyun * We don't report to mac80211 sleep state of connected
3526*4882a593Smuzhiyun * stations. Due to this mac80211 can't fill in TIM IE
3527*4882a593Smuzhiyun * correctly.
3528*4882a593Smuzhiyun *
3529*4882a593Smuzhiyun * I know of no way of getting nullfunc frames that contain
3530*4882a593Smuzhiyun * sleep transition from connected stations - these do not
3531*4882a593Smuzhiyun * seem to be sent from the target to the host. There also
3532*4882a593Smuzhiyun * doesn't seem to be a dedicated event for that. So the
3533*4882a593Smuzhiyun * only way left to do this would be to read tim_bitmap
3534*4882a593Smuzhiyun * during SWBA.
3535*4882a593Smuzhiyun *
3536*4882a593Smuzhiyun * We could probably try using tim_bitmap from SWBA to tell
3537*4882a593Smuzhiyun * mac80211 which stations are asleep and which are not. The
3538*4882a593Smuzhiyun * problem here is calling mac80211 functions so many times
3539*4882a593Smuzhiyun * could take too long and make us miss the time to submit
3540*4882a593Smuzhiyun * the beacon to the target.
3541*4882a593Smuzhiyun *
3542*4882a593Smuzhiyun * So as a workaround we try to extend the TIM IE if there
3543*4882a593Smuzhiyun * is unicast buffered for stations with aid > 7 and fill it
3544*4882a593Smuzhiyun * in ourselves.
3545*4882a593Smuzhiyun */
ath10k_wmi_update_tim(struct ath10k * ar,struct ath10k_vif * arvif,struct sk_buff * bcn,const struct wmi_tim_info_arg * tim_info)3546*4882a593Smuzhiyun static void ath10k_wmi_update_tim(struct ath10k *ar,
3547*4882a593Smuzhiyun struct ath10k_vif *arvif,
3548*4882a593Smuzhiyun struct sk_buff *bcn,
3549*4882a593Smuzhiyun const struct wmi_tim_info_arg *tim_info)
3550*4882a593Smuzhiyun {
3551*4882a593Smuzhiyun struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)bcn->data;
3552*4882a593Smuzhiyun struct ieee80211_tim_ie *tim;
3553*4882a593Smuzhiyun u8 *ies, *ie;
3554*4882a593Smuzhiyun u8 ie_len, pvm_len;
3555*4882a593Smuzhiyun __le32 t;
3556*4882a593Smuzhiyun u32 v, tim_len;
3557*4882a593Smuzhiyun
3558*4882a593Smuzhiyun /* When FW reports 0 in tim_len, ensure atleast first byte
3559*4882a593Smuzhiyun * in tim_bitmap is considered for pvm calculation.
3560*4882a593Smuzhiyun */
3561*4882a593Smuzhiyun tim_len = tim_info->tim_len ? __le32_to_cpu(tim_info->tim_len) : 1;
3562*4882a593Smuzhiyun
3563*4882a593Smuzhiyun /* if next SWBA has no tim_changed the tim_bitmap is garbage.
3564*4882a593Smuzhiyun * we must copy the bitmap upon change and reuse it later
3565*4882a593Smuzhiyun */
3566*4882a593Smuzhiyun if (__le32_to_cpu(tim_info->tim_changed)) {
3567*4882a593Smuzhiyun int i;
3568*4882a593Smuzhiyun
3569*4882a593Smuzhiyun if (sizeof(arvif->u.ap.tim_bitmap) < tim_len) {
3570*4882a593Smuzhiyun ath10k_warn(ar, "SWBA TIM field is too big (%u), truncated it to %zu",
3571*4882a593Smuzhiyun tim_len, sizeof(arvif->u.ap.tim_bitmap));
3572*4882a593Smuzhiyun tim_len = sizeof(arvif->u.ap.tim_bitmap);
3573*4882a593Smuzhiyun }
3574*4882a593Smuzhiyun
3575*4882a593Smuzhiyun for (i = 0; i < tim_len; i++) {
3576*4882a593Smuzhiyun t = tim_info->tim_bitmap[i / 4];
3577*4882a593Smuzhiyun v = __le32_to_cpu(t);
3578*4882a593Smuzhiyun arvif->u.ap.tim_bitmap[i] = (v >> ((i % 4) * 8)) & 0xFF;
3579*4882a593Smuzhiyun }
3580*4882a593Smuzhiyun
3581*4882a593Smuzhiyun /* FW reports either length 0 or length based on max supported
3582*4882a593Smuzhiyun * station. so we calculate this on our own
3583*4882a593Smuzhiyun */
3584*4882a593Smuzhiyun arvif->u.ap.tim_len = 0;
3585*4882a593Smuzhiyun for (i = 0; i < tim_len; i++)
3586*4882a593Smuzhiyun if (arvif->u.ap.tim_bitmap[i])
3587*4882a593Smuzhiyun arvif->u.ap.tim_len = i;
3588*4882a593Smuzhiyun
3589*4882a593Smuzhiyun arvif->u.ap.tim_len++;
3590*4882a593Smuzhiyun }
3591*4882a593Smuzhiyun
3592*4882a593Smuzhiyun ies = bcn->data;
3593*4882a593Smuzhiyun ies += ieee80211_hdrlen(hdr->frame_control);
3594*4882a593Smuzhiyun ies += 12; /* fixed parameters */
3595*4882a593Smuzhiyun
3596*4882a593Smuzhiyun ie = (u8 *)cfg80211_find_ie(WLAN_EID_TIM, ies,
3597*4882a593Smuzhiyun (u8 *)skb_tail_pointer(bcn) - ies);
3598*4882a593Smuzhiyun if (!ie) {
3599*4882a593Smuzhiyun if (arvif->vdev_type != WMI_VDEV_TYPE_IBSS)
3600*4882a593Smuzhiyun ath10k_warn(ar, "no tim ie found;\n");
3601*4882a593Smuzhiyun return;
3602*4882a593Smuzhiyun }
3603*4882a593Smuzhiyun
3604*4882a593Smuzhiyun tim = (void *)ie + 2;
3605*4882a593Smuzhiyun ie_len = ie[1];
3606*4882a593Smuzhiyun pvm_len = ie_len - 3; /* exclude dtim count, dtim period, bmap ctl */
3607*4882a593Smuzhiyun
3608*4882a593Smuzhiyun if (pvm_len < arvif->u.ap.tim_len) {
3609*4882a593Smuzhiyun int expand_size = tim_len - pvm_len;
3610*4882a593Smuzhiyun int move_size = skb_tail_pointer(bcn) - (ie + 2 + ie_len);
3611*4882a593Smuzhiyun void *next_ie = ie + 2 + ie_len;
3612*4882a593Smuzhiyun
3613*4882a593Smuzhiyun if (skb_put(bcn, expand_size)) {
3614*4882a593Smuzhiyun memmove(next_ie + expand_size, next_ie, move_size);
3615*4882a593Smuzhiyun
3616*4882a593Smuzhiyun ie[1] += expand_size;
3617*4882a593Smuzhiyun ie_len += expand_size;
3618*4882a593Smuzhiyun pvm_len += expand_size;
3619*4882a593Smuzhiyun } else {
3620*4882a593Smuzhiyun ath10k_warn(ar, "tim expansion failed\n");
3621*4882a593Smuzhiyun }
3622*4882a593Smuzhiyun }
3623*4882a593Smuzhiyun
3624*4882a593Smuzhiyun if (pvm_len > tim_len) {
3625*4882a593Smuzhiyun ath10k_warn(ar, "tim pvm length is too great (%d)\n", pvm_len);
3626*4882a593Smuzhiyun return;
3627*4882a593Smuzhiyun }
3628*4882a593Smuzhiyun
3629*4882a593Smuzhiyun tim->bitmap_ctrl = !!__le32_to_cpu(tim_info->tim_mcast);
3630*4882a593Smuzhiyun memcpy(tim->virtual_map, arvif->u.ap.tim_bitmap, pvm_len);
3631*4882a593Smuzhiyun
3632*4882a593Smuzhiyun if (tim->dtim_count == 0) {
3633*4882a593Smuzhiyun ATH10K_SKB_CB(bcn)->flags |= ATH10K_SKB_F_DTIM_ZERO;
3634*4882a593Smuzhiyun
3635*4882a593Smuzhiyun if (__le32_to_cpu(tim_info->tim_mcast) == 1)
3636*4882a593Smuzhiyun ATH10K_SKB_CB(bcn)->flags |= ATH10K_SKB_F_DELIVER_CAB;
3637*4882a593Smuzhiyun }
3638*4882a593Smuzhiyun
3639*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_MGMT, "dtim %d/%d mcast %d pvmlen %d\n",
3640*4882a593Smuzhiyun tim->dtim_count, tim->dtim_period,
3641*4882a593Smuzhiyun tim->bitmap_ctrl, pvm_len);
3642*4882a593Smuzhiyun }
3643*4882a593Smuzhiyun
ath10k_wmi_update_noa(struct ath10k * ar,struct ath10k_vif * arvif,struct sk_buff * bcn,const struct wmi_p2p_noa_info * noa)3644*4882a593Smuzhiyun static void ath10k_wmi_update_noa(struct ath10k *ar, struct ath10k_vif *arvif,
3645*4882a593Smuzhiyun struct sk_buff *bcn,
3646*4882a593Smuzhiyun const struct wmi_p2p_noa_info *noa)
3647*4882a593Smuzhiyun {
3648*4882a593Smuzhiyun if (!arvif->vif->p2p)
3649*4882a593Smuzhiyun return;
3650*4882a593Smuzhiyun
3651*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_MGMT, "noa changed: %d\n", noa->changed);
3652*4882a593Smuzhiyun
3653*4882a593Smuzhiyun if (noa->changed & WMI_P2P_NOA_CHANGED_BIT)
3654*4882a593Smuzhiyun ath10k_p2p_noa_update(arvif, noa);
3655*4882a593Smuzhiyun
3656*4882a593Smuzhiyun if (arvif->u.ap.noa_data)
3657*4882a593Smuzhiyun if (!pskb_expand_head(bcn, 0, arvif->u.ap.noa_len, GFP_ATOMIC))
3658*4882a593Smuzhiyun skb_put_data(bcn, arvif->u.ap.noa_data,
3659*4882a593Smuzhiyun arvif->u.ap.noa_len);
3660*4882a593Smuzhiyun }
3661*4882a593Smuzhiyun
ath10k_wmi_op_pull_swba_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_swba_ev_arg * arg)3662*4882a593Smuzhiyun static int ath10k_wmi_op_pull_swba_ev(struct ath10k *ar, struct sk_buff *skb,
3663*4882a593Smuzhiyun struct wmi_swba_ev_arg *arg)
3664*4882a593Smuzhiyun {
3665*4882a593Smuzhiyun struct wmi_host_swba_event *ev = (void *)skb->data;
3666*4882a593Smuzhiyun u32 map;
3667*4882a593Smuzhiyun size_t i;
3668*4882a593Smuzhiyun
3669*4882a593Smuzhiyun if (skb->len < sizeof(*ev))
3670*4882a593Smuzhiyun return -EPROTO;
3671*4882a593Smuzhiyun
3672*4882a593Smuzhiyun skb_pull(skb, sizeof(*ev));
3673*4882a593Smuzhiyun arg->vdev_map = ev->vdev_map;
3674*4882a593Smuzhiyun
3675*4882a593Smuzhiyun for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) {
3676*4882a593Smuzhiyun if (!(map & BIT(0)))
3677*4882a593Smuzhiyun continue;
3678*4882a593Smuzhiyun
3679*4882a593Smuzhiyun /* If this happens there were some changes in firmware and
3680*4882a593Smuzhiyun * ath10k should update the max size of tim_info array.
3681*4882a593Smuzhiyun */
3682*4882a593Smuzhiyun if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info)))
3683*4882a593Smuzhiyun break;
3684*4882a593Smuzhiyun
3685*4882a593Smuzhiyun if (__le32_to_cpu(ev->bcn_info[i].tim_info.tim_len) >
3686*4882a593Smuzhiyun sizeof(ev->bcn_info[i].tim_info.tim_bitmap)) {
3687*4882a593Smuzhiyun ath10k_warn(ar, "refusing to parse invalid swba structure\n");
3688*4882a593Smuzhiyun return -EPROTO;
3689*4882a593Smuzhiyun }
3690*4882a593Smuzhiyun
3691*4882a593Smuzhiyun arg->tim_info[i].tim_len = ev->bcn_info[i].tim_info.tim_len;
3692*4882a593Smuzhiyun arg->tim_info[i].tim_mcast = ev->bcn_info[i].tim_info.tim_mcast;
3693*4882a593Smuzhiyun arg->tim_info[i].tim_bitmap =
3694*4882a593Smuzhiyun ev->bcn_info[i].tim_info.tim_bitmap;
3695*4882a593Smuzhiyun arg->tim_info[i].tim_changed =
3696*4882a593Smuzhiyun ev->bcn_info[i].tim_info.tim_changed;
3697*4882a593Smuzhiyun arg->tim_info[i].tim_num_ps_pending =
3698*4882a593Smuzhiyun ev->bcn_info[i].tim_info.tim_num_ps_pending;
3699*4882a593Smuzhiyun
3700*4882a593Smuzhiyun arg->noa_info[i] = &ev->bcn_info[i].p2p_noa_info;
3701*4882a593Smuzhiyun i++;
3702*4882a593Smuzhiyun }
3703*4882a593Smuzhiyun
3704*4882a593Smuzhiyun return 0;
3705*4882a593Smuzhiyun }
3706*4882a593Smuzhiyun
ath10k_wmi_10_2_4_op_pull_swba_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_swba_ev_arg * arg)3707*4882a593Smuzhiyun static int ath10k_wmi_10_2_4_op_pull_swba_ev(struct ath10k *ar,
3708*4882a593Smuzhiyun struct sk_buff *skb,
3709*4882a593Smuzhiyun struct wmi_swba_ev_arg *arg)
3710*4882a593Smuzhiyun {
3711*4882a593Smuzhiyun struct wmi_10_2_4_host_swba_event *ev = (void *)skb->data;
3712*4882a593Smuzhiyun u32 map;
3713*4882a593Smuzhiyun size_t i;
3714*4882a593Smuzhiyun
3715*4882a593Smuzhiyun if (skb->len < sizeof(*ev))
3716*4882a593Smuzhiyun return -EPROTO;
3717*4882a593Smuzhiyun
3718*4882a593Smuzhiyun skb_pull(skb, sizeof(*ev));
3719*4882a593Smuzhiyun arg->vdev_map = ev->vdev_map;
3720*4882a593Smuzhiyun
3721*4882a593Smuzhiyun for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) {
3722*4882a593Smuzhiyun if (!(map & BIT(0)))
3723*4882a593Smuzhiyun continue;
3724*4882a593Smuzhiyun
3725*4882a593Smuzhiyun /* If this happens there were some changes in firmware and
3726*4882a593Smuzhiyun * ath10k should update the max size of tim_info array.
3727*4882a593Smuzhiyun */
3728*4882a593Smuzhiyun if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info)))
3729*4882a593Smuzhiyun break;
3730*4882a593Smuzhiyun
3731*4882a593Smuzhiyun if (__le32_to_cpu(ev->bcn_info[i].tim_info.tim_len) >
3732*4882a593Smuzhiyun sizeof(ev->bcn_info[i].tim_info.tim_bitmap)) {
3733*4882a593Smuzhiyun ath10k_warn(ar, "refusing to parse invalid swba structure\n");
3734*4882a593Smuzhiyun return -EPROTO;
3735*4882a593Smuzhiyun }
3736*4882a593Smuzhiyun
3737*4882a593Smuzhiyun arg->tim_info[i].tim_len = ev->bcn_info[i].tim_info.tim_len;
3738*4882a593Smuzhiyun arg->tim_info[i].tim_mcast = ev->bcn_info[i].tim_info.tim_mcast;
3739*4882a593Smuzhiyun arg->tim_info[i].tim_bitmap =
3740*4882a593Smuzhiyun ev->bcn_info[i].tim_info.tim_bitmap;
3741*4882a593Smuzhiyun arg->tim_info[i].tim_changed =
3742*4882a593Smuzhiyun ev->bcn_info[i].tim_info.tim_changed;
3743*4882a593Smuzhiyun arg->tim_info[i].tim_num_ps_pending =
3744*4882a593Smuzhiyun ev->bcn_info[i].tim_info.tim_num_ps_pending;
3745*4882a593Smuzhiyun i++;
3746*4882a593Smuzhiyun }
3747*4882a593Smuzhiyun
3748*4882a593Smuzhiyun return 0;
3749*4882a593Smuzhiyun }
3750*4882a593Smuzhiyun
ath10k_wmi_10_4_op_pull_swba_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_swba_ev_arg * arg)3751*4882a593Smuzhiyun static int ath10k_wmi_10_4_op_pull_swba_ev(struct ath10k *ar,
3752*4882a593Smuzhiyun struct sk_buff *skb,
3753*4882a593Smuzhiyun struct wmi_swba_ev_arg *arg)
3754*4882a593Smuzhiyun {
3755*4882a593Smuzhiyun struct wmi_10_4_host_swba_event *ev = (void *)skb->data;
3756*4882a593Smuzhiyun u32 map, tim_len;
3757*4882a593Smuzhiyun size_t i;
3758*4882a593Smuzhiyun
3759*4882a593Smuzhiyun if (skb->len < sizeof(*ev))
3760*4882a593Smuzhiyun return -EPROTO;
3761*4882a593Smuzhiyun
3762*4882a593Smuzhiyun skb_pull(skb, sizeof(*ev));
3763*4882a593Smuzhiyun arg->vdev_map = ev->vdev_map;
3764*4882a593Smuzhiyun
3765*4882a593Smuzhiyun for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) {
3766*4882a593Smuzhiyun if (!(map & BIT(0)))
3767*4882a593Smuzhiyun continue;
3768*4882a593Smuzhiyun
3769*4882a593Smuzhiyun /* If this happens there were some changes in firmware and
3770*4882a593Smuzhiyun * ath10k should update the max size of tim_info array.
3771*4882a593Smuzhiyun */
3772*4882a593Smuzhiyun if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info)))
3773*4882a593Smuzhiyun break;
3774*4882a593Smuzhiyun
3775*4882a593Smuzhiyun if (__le32_to_cpu(ev->bcn_info[i].tim_info.tim_len) >
3776*4882a593Smuzhiyun sizeof(ev->bcn_info[i].tim_info.tim_bitmap)) {
3777*4882a593Smuzhiyun ath10k_warn(ar, "refusing to parse invalid swba structure\n");
3778*4882a593Smuzhiyun return -EPROTO;
3779*4882a593Smuzhiyun }
3780*4882a593Smuzhiyun
3781*4882a593Smuzhiyun tim_len = __le32_to_cpu(ev->bcn_info[i].tim_info.tim_len);
3782*4882a593Smuzhiyun if (tim_len) {
3783*4882a593Smuzhiyun /* Exclude 4 byte guard length */
3784*4882a593Smuzhiyun tim_len -= 4;
3785*4882a593Smuzhiyun arg->tim_info[i].tim_len = __cpu_to_le32(tim_len);
3786*4882a593Smuzhiyun } else {
3787*4882a593Smuzhiyun arg->tim_info[i].tim_len = 0;
3788*4882a593Smuzhiyun }
3789*4882a593Smuzhiyun
3790*4882a593Smuzhiyun arg->tim_info[i].tim_mcast = ev->bcn_info[i].tim_info.tim_mcast;
3791*4882a593Smuzhiyun arg->tim_info[i].tim_bitmap =
3792*4882a593Smuzhiyun ev->bcn_info[i].tim_info.tim_bitmap;
3793*4882a593Smuzhiyun arg->tim_info[i].tim_changed =
3794*4882a593Smuzhiyun ev->bcn_info[i].tim_info.tim_changed;
3795*4882a593Smuzhiyun arg->tim_info[i].tim_num_ps_pending =
3796*4882a593Smuzhiyun ev->bcn_info[i].tim_info.tim_num_ps_pending;
3797*4882a593Smuzhiyun
3798*4882a593Smuzhiyun /* 10.4 firmware doesn't have p2p support. notice of absence
3799*4882a593Smuzhiyun * info can be ignored for now.
3800*4882a593Smuzhiyun */
3801*4882a593Smuzhiyun
3802*4882a593Smuzhiyun i++;
3803*4882a593Smuzhiyun }
3804*4882a593Smuzhiyun
3805*4882a593Smuzhiyun return 0;
3806*4882a593Smuzhiyun }
3807*4882a593Smuzhiyun
ath10k_wmi_10_4_txbf_conf_scheme(struct ath10k * ar)3808*4882a593Smuzhiyun static enum wmi_txbf_conf ath10k_wmi_10_4_txbf_conf_scheme(struct ath10k *ar)
3809*4882a593Smuzhiyun {
3810*4882a593Smuzhiyun return WMI_TXBF_CONF_BEFORE_ASSOC;
3811*4882a593Smuzhiyun }
3812*4882a593Smuzhiyun
ath10k_wmi_event_host_swba(struct ath10k * ar,struct sk_buff * skb)3813*4882a593Smuzhiyun void ath10k_wmi_event_host_swba(struct ath10k *ar, struct sk_buff *skb)
3814*4882a593Smuzhiyun {
3815*4882a593Smuzhiyun struct wmi_swba_ev_arg arg = {};
3816*4882a593Smuzhiyun u32 map;
3817*4882a593Smuzhiyun int i = -1;
3818*4882a593Smuzhiyun const struct wmi_tim_info_arg *tim_info;
3819*4882a593Smuzhiyun const struct wmi_p2p_noa_info *noa_info;
3820*4882a593Smuzhiyun struct ath10k_vif *arvif;
3821*4882a593Smuzhiyun struct sk_buff *bcn;
3822*4882a593Smuzhiyun dma_addr_t paddr;
3823*4882a593Smuzhiyun int ret, vdev_id = 0;
3824*4882a593Smuzhiyun
3825*4882a593Smuzhiyun ret = ath10k_wmi_pull_swba(ar, skb, &arg);
3826*4882a593Smuzhiyun if (ret) {
3827*4882a593Smuzhiyun ath10k_warn(ar, "failed to parse swba event: %d\n", ret);
3828*4882a593Smuzhiyun return;
3829*4882a593Smuzhiyun }
3830*4882a593Smuzhiyun
3831*4882a593Smuzhiyun map = __le32_to_cpu(arg.vdev_map);
3832*4882a593Smuzhiyun
3833*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_MGMT, "mgmt swba vdev_map 0x%x\n",
3834*4882a593Smuzhiyun map);
3835*4882a593Smuzhiyun
3836*4882a593Smuzhiyun for (; map; map >>= 1, vdev_id++) {
3837*4882a593Smuzhiyun if (!(map & 0x1))
3838*4882a593Smuzhiyun continue;
3839*4882a593Smuzhiyun
3840*4882a593Smuzhiyun i++;
3841*4882a593Smuzhiyun
3842*4882a593Smuzhiyun if (i >= WMI_MAX_AP_VDEV) {
3843*4882a593Smuzhiyun ath10k_warn(ar, "swba has corrupted vdev map\n");
3844*4882a593Smuzhiyun break;
3845*4882a593Smuzhiyun }
3846*4882a593Smuzhiyun
3847*4882a593Smuzhiyun tim_info = &arg.tim_info[i];
3848*4882a593Smuzhiyun noa_info = arg.noa_info[i];
3849*4882a593Smuzhiyun
3850*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_MGMT,
3851*4882a593Smuzhiyun "mgmt event bcn_info %d tim_len %d mcast %d changed %d num_ps_pending %d bitmap 0x%08x%08x%08x%08x\n",
3852*4882a593Smuzhiyun i,
3853*4882a593Smuzhiyun __le32_to_cpu(tim_info->tim_len),
3854*4882a593Smuzhiyun __le32_to_cpu(tim_info->tim_mcast),
3855*4882a593Smuzhiyun __le32_to_cpu(tim_info->tim_changed),
3856*4882a593Smuzhiyun __le32_to_cpu(tim_info->tim_num_ps_pending),
3857*4882a593Smuzhiyun __le32_to_cpu(tim_info->tim_bitmap[3]),
3858*4882a593Smuzhiyun __le32_to_cpu(tim_info->tim_bitmap[2]),
3859*4882a593Smuzhiyun __le32_to_cpu(tim_info->tim_bitmap[1]),
3860*4882a593Smuzhiyun __le32_to_cpu(tim_info->tim_bitmap[0]));
3861*4882a593Smuzhiyun
3862*4882a593Smuzhiyun /* TODO: Only first 4 word from tim_bitmap is dumped.
3863*4882a593Smuzhiyun * Extend debug code to dump full tim_bitmap.
3864*4882a593Smuzhiyun */
3865*4882a593Smuzhiyun
3866*4882a593Smuzhiyun arvif = ath10k_get_arvif(ar, vdev_id);
3867*4882a593Smuzhiyun if (arvif == NULL) {
3868*4882a593Smuzhiyun ath10k_warn(ar, "no vif for vdev_id %d found\n",
3869*4882a593Smuzhiyun vdev_id);
3870*4882a593Smuzhiyun continue;
3871*4882a593Smuzhiyun }
3872*4882a593Smuzhiyun
3873*4882a593Smuzhiyun /* mac80211 would have already asked us to stop beaconing and
3874*4882a593Smuzhiyun * bring the vdev down, so continue in that case
3875*4882a593Smuzhiyun */
3876*4882a593Smuzhiyun if (!arvif->is_up)
3877*4882a593Smuzhiyun continue;
3878*4882a593Smuzhiyun
3879*4882a593Smuzhiyun /* There are no completions for beacons so wait for next SWBA
3880*4882a593Smuzhiyun * before telling mac80211 to decrement CSA counter
3881*4882a593Smuzhiyun *
3882*4882a593Smuzhiyun * Once CSA counter is completed stop sending beacons until
3883*4882a593Smuzhiyun * actual channel switch is done
3884*4882a593Smuzhiyun */
3885*4882a593Smuzhiyun if (arvif->vif->csa_active &&
3886*4882a593Smuzhiyun ieee80211_beacon_cntdwn_is_complete(arvif->vif)) {
3887*4882a593Smuzhiyun ieee80211_csa_finish(arvif->vif);
3888*4882a593Smuzhiyun continue;
3889*4882a593Smuzhiyun }
3890*4882a593Smuzhiyun
3891*4882a593Smuzhiyun bcn = ieee80211_beacon_get(ar->hw, arvif->vif);
3892*4882a593Smuzhiyun if (!bcn) {
3893*4882a593Smuzhiyun ath10k_warn(ar, "could not get mac80211 beacon\n");
3894*4882a593Smuzhiyun continue;
3895*4882a593Smuzhiyun }
3896*4882a593Smuzhiyun
3897*4882a593Smuzhiyun ath10k_tx_h_seq_no(arvif->vif, bcn);
3898*4882a593Smuzhiyun ath10k_wmi_update_tim(ar, arvif, bcn, tim_info);
3899*4882a593Smuzhiyun ath10k_wmi_update_noa(ar, arvif, bcn, noa_info);
3900*4882a593Smuzhiyun
3901*4882a593Smuzhiyun spin_lock_bh(&ar->data_lock);
3902*4882a593Smuzhiyun
3903*4882a593Smuzhiyun if (arvif->beacon) {
3904*4882a593Smuzhiyun switch (arvif->beacon_state) {
3905*4882a593Smuzhiyun case ATH10K_BEACON_SENT:
3906*4882a593Smuzhiyun break;
3907*4882a593Smuzhiyun case ATH10K_BEACON_SCHEDULED:
3908*4882a593Smuzhiyun ath10k_warn(ar, "SWBA overrun on vdev %d, skipped old beacon\n",
3909*4882a593Smuzhiyun arvif->vdev_id);
3910*4882a593Smuzhiyun break;
3911*4882a593Smuzhiyun case ATH10K_BEACON_SENDING:
3912*4882a593Smuzhiyun ath10k_warn(ar, "SWBA overrun on vdev %d, skipped new beacon\n",
3913*4882a593Smuzhiyun arvif->vdev_id);
3914*4882a593Smuzhiyun dev_kfree_skb(bcn);
3915*4882a593Smuzhiyun goto skip;
3916*4882a593Smuzhiyun }
3917*4882a593Smuzhiyun
3918*4882a593Smuzhiyun ath10k_mac_vif_beacon_free(arvif);
3919*4882a593Smuzhiyun }
3920*4882a593Smuzhiyun
3921*4882a593Smuzhiyun if (!arvif->beacon_buf) {
3922*4882a593Smuzhiyun paddr = dma_map_single(arvif->ar->dev, bcn->data,
3923*4882a593Smuzhiyun bcn->len, DMA_TO_DEVICE);
3924*4882a593Smuzhiyun ret = dma_mapping_error(arvif->ar->dev, paddr);
3925*4882a593Smuzhiyun if (ret) {
3926*4882a593Smuzhiyun ath10k_warn(ar, "failed to map beacon: %d\n",
3927*4882a593Smuzhiyun ret);
3928*4882a593Smuzhiyun dev_kfree_skb_any(bcn);
3929*4882a593Smuzhiyun goto skip;
3930*4882a593Smuzhiyun }
3931*4882a593Smuzhiyun
3932*4882a593Smuzhiyun ATH10K_SKB_CB(bcn)->paddr = paddr;
3933*4882a593Smuzhiyun } else {
3934*4882a593Smuzhiyun if (bcn->len > IEEE80211_MAX_FRAME_LEN) {
3935*4882a593Smuzhiyun ath10k_warn(ar, "trimming beacon %d -> %d bytes!\n",
3936*4882a593Smuzhiyun bcn->len, IEEE80211_MAX_FRAME_LEN);
3937*4882a593Smuzhiyun skb_trim(bcn, IEEE80211_MAX_FRAME_LEN);
3938*4882a593Smuzhiyun }
3939*4882a593Smuzhiyun memcpy(arvif->beacon_buf, bcn->data, bcn->len);
3940*4882a593Smuzhiyun ATH10K_SKB_CB(bcn)->paddr = arvif->beacon_paddr;
3941*4882a593Smuzhiyun }
3942*4882a593Smuzhiyun
3943*4882a593Smuzhiyun arvif->beacon = bcn;
3944*4882a593Smuzhiyun arvif->beacon_state = ATH10K_BEACON_SCHEDULED;
3945*4882a593Smuzhiyun
3946*4882a593Smuzhiyun trace_ath10k_tx_hdr(ar, bcn->data, bcn->len);
3947*4882a593Smuzhiyun trace_ath10k_tx_payload(ar, bcn->data, bcn->len);
3948*4882a593Smuzhiyun
3949*4882a593Smuzhiyun skip:
3950*4882a593Smuzhiyun spin_unlock_bh(&ar->data_lock);
3951*4882a593Smuzhiyun }
3952*4882a593Smuzhiyun
3953*4882a593Smuzhiyun ath10k_wmi_tx_beacons_nowait(ar);
3954*4882a593Smuzhiyun }
3955*4882a593Smuzhiyun
ath10k_wmi_event_tbttoffset_update(struct ath10k * ar,struct sk_buff * skb)3956*4882a593Smuzhiyun void ath10k_wmi_event_tbttoffset_update(struct ath10k *ar, struct sk_buff *skb)
3957*4882a593Smuzhiyun {
3958*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TBTTOFFSET_UPDATE_EVENTID\n");
3959*4882a593Smuzhiyun }
3960*4882a593Smuzhiyun
ath10k_radar_detected(struct ath10k * ar)3961*4882a593Smuzhiyun static void ath10k_radar_detected(struct ath10k *ar)
3962*4882a593Smuzhiyun {
3963*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_REGULATORY, "dfs radar detected\n");
3964*4882a593Smuzhiyun ATH10K_DFS_STAT_INC(ar, radar_detected);
3965*4882a593Smuzhiyun
3966*4882a593Smuzhiyun /* Control radar events reporting in debugfs file
3967*4882a593Smuzhiyun * dfs_block_radar_events
3968*4882a593Smuzhiyun */
3969*4882a593Smuzhiyun if (ar->dfs_block_radar_events)
3970*4882a593Smuzhiyun ath10k_info(ar, "DFS Radar detected, but ignored as requested\n");
3971*4882a593Smuzhiyun else
3972*4882a593Smuzhiyun ieee80211_radar_detected(ar->hw);
3973*4882a593Smuzhiyun }
3974*4882a593Smuzhiyun
ath10k_radar_confirmation_work(struct work_struct * work)3975*4882a593Smuzhiyun static void ath10k_radar_confirmation_work(struct work_struct *work)
3976*4882a593Smuzhiyun {
3977*4882a593Smuzhiyun struct ath10k *ar = container_of(work, struct ath10k,
3978*4882a593Smuzhiyun radar_confirmation_work);
3979*4882a593Smuzhiyun struct ath10k_radar_found_info radar_info;
3980*4882a593Smuzhiyun int ret, time_left;
3981*4882a593Smuzhiyun
3982*4882a593Smuzhiyun reinit_completion(&ar->wmi.radar_confirm);
3983*4882a593Smuzhiyun
3984*4882a593Smuzhiyun spin_lock_bh(&ar->data_lock);
3985*4882a593Smuzhiyun memcpy(&radar_info, &ar->last_radar_info, sizeof(radar_info));
3986*4882a593Smuzhiyun spin_unlock_bh(&ar->data_lock);
3987*4882a593Smuzhiyun
3988*4882a593Smuzhiyun ret = ath10k_wmi_report_radar_found(ar, &radar_info);
3989*4882a593Smuzhiyun if (ret) {
3990*4882a593Smuzhiyun ath10k_warn(ar, "failed to send radar found %d\n", ret);
3991*4882a593Smuzhiyun goto wait_complete;
3992*4882a593Smuzhiyun }
3993*4882a593Smuzhiyun
3994*4882a593Smuzhiyun time_left = wait_for_completion_timeout(&ar->wmi.radar_confirm,
3995*4882a593Smuzhiyun ATH10K_WMI_DFS_CONF_TIMEOUT_HZ);
3996*4882a593Smuzhiyun if (time_left) {
3997*4882a593Smuzhiyun /* DFS Confirmation status event received and
3998*4882a593Smuzhiyun * necessary action completed.
3999*4882a593Smuzhiyun */
4000*4882a593Smuzhiyun goto wait_complete;
4001*4882a593Smuzhiyun } else {
4002*4882a593Smuzhiyun /* DFS Confirmation event not received from FW.Considering this
4003*4882a593Smuzhiyun * as real radar.
4004*4882a593Smuzhiyun */
4005*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
4006*4882a593Smuzhiyun "dfs confirmation not received from fw, considering as radar\n");
4007*4882a593Smuzhiyun goto radar_detected;
4008*4882a593Smuzhiyun }
4009*4882a593Smuzhiyun
4010*4882a593Smuzhiyun radar_detected:
4011*4882a593Smuzhiyun ath10k_radar_detected(ar);
4012*4882a593Smuzhiyun
4013*4882a593Smuzhiyun /* Reset state to allow sending confirmation on consecutive radar
4014*4882a593Smuzhiyun * detections, unless radar confirmation is disabled/stopped.
4015*4882a593Smuzhiyun */
4016*4882a593Smuzhiyun wait_complete:
4017*4882a593Smuzhiyun spin_lock_bh(&ar->data_lock);
4018*4882a593Smuzhiyun if (ar->radar_conf_state != ATH10K_RADAR_CONFIRMATION_STOPPED)
4019*4882a593Smuzhiyun ar->radar_conf_state = ATH10K_RADAR_CONFIRMATION_IDLE;
4020*4882a593Smuzhiyun spin_unlock_bh(&ar->data_lock);
4021*4882a593Smuzhiyun }
4022*4882a593Smuzhiyun
ath10k_dfs_radar_report(struct ath10k * ar,struct wmi_phyerr_ev_arg * phyerr,const struct phyerr_radar_report * rr,u64 tsf)4023*4882a593Smuzhiyun static void ath10k_dfs_radar_report(struct ath10k *ar,
4024*4882a593Smuzhiyun struct wmi_phyerr_ev_arg *phyerr,
4025*4882a593Smuzhiyun const struct phyerr_radar_report *rr,
4026*4882a593Smuzhiyun u64 tsf)
4027*4882a593Smuzhiyun {
4028*4882a593Smuzhiyun u32 reg0, reg1, tsf32l;
4029*4882a593Smuzhiyun struct ieee80211_channel *ch;
4030*4882a593Smuzhiyun struct pulse_event pe;
4031*4882a593Smuzhiyun struct radar_detector_specs rs;
4032*4882a593Smuzhiyun u64 tsf64;
4033*4882a593Smuzhiyun u8 rssi, width;
4034*4882a593Smuzhiyun struct ath10k_radar_found_info *radar_info;
4035*4882a593Smuzhiyun
4036*4882a593Smuzhiyun reg0 = __le32_to_cpu(rr->reg0);
4037*4882a593Smuzhiyun reg1 = __le32_to_cpu(rr->reg1);
4038*4882a593Smuzhiyun
4039*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
4040*4882a593Smuzhiyun "wmi phyerr radar report chirp %d max_width %d agc_total_gain %d pulse_delta_diff %d\n",
4041*4882a593Smuzhiyun MS(reg0, RADAR_REPORT_REG0_PULSE_IS_CHIRP),
4042*4882a593Smuzhiyun MS(reg0, RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH),
4043*4882a593Smuzhiyun MS(reg0, RADAR_REPORT_REG0_AGC_TOTAL_GAIN),
4044*4882a593Smuzhiyun MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_DIFF));
4045*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
4046*4882a593Smuzhiyun "wmi phyerr radar report pulse_delta_pean %d pulse_sidx %d fft_valid %d agc_mb_gain %d subchan_mask %d\n",
4047*4882a593Smuzhiyun MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_PEAK),
4048*4882a593Smuzhiyun MS(reg0, RADAR_REPORT_REG0_PULSE_SIDX),
4049*4882a593Smuzhiyun MS(reg1, RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID),
4050*4882a593Smuzhiyun MS(reg1, RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN),
4051*4882a593Smuzhiyun MS(reg1, RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK));
4052*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
4053*4882a593Smuzhiyun "wmi phyerr radar report pulse_tsf_offset 0x%X pulse_dur: %d\n",
4054*4882a593Smuzhiyun MS(reg1, RADAR_REPORT_REG1_PULSE_TSF_OFFSET),
4055*4882a593Smuzhiyun MS(reg1, RADAR_REPORT_REG1_PULSE_DUR));
4056*4882a593Smuzhiyun
4057*4882a593Smuzhiyun if (!ar->dfs_detector)
4058*4882a593Smuzhiyun return;
4059*4882a593Smuzhiyun
4060*4882a593Smuzhiyun spin_lock_bh(&ar->data_lock);
4061*4882a593Smuzhiyun ch = ar->rx_channel;
4062*4882a593Smuzhiyun
4063*4882a593Smuzhiyun /* fetch target operating channel during channel change */
4064*4882a593Smuzhiyun if (!ch)
4065*4882a593Smuzhiyun ch = ar->tgt_oper_chan;
4066*4882a593Smuzhiyun
4067*4882a593Smuzhiyun spin_unlock_bh(&ar->data_lock);
4068*4882a593Smuzhiyun
4069*4882a593Smuzhiyun if (!ch) {
4070*4882a593Smuzhiyun ath10k_warn(ar, "failed to derive channel for radar pulse, treating as radar\n");
4071*4882a593Smuzhiyun goto radar_detected;
4072*4882a593Smuzhiyun }
4073*4882a593Smuzhiyun
4074*4882a593Smuzhiyun /* report event to DFS pattern detector */
4075*4882a593Smuzhiyun tsf32l = phyerr->tsf_timestamp;
4076*4882a593Smuzhiyun tsf64 = tsf & (~0xFFFFFFFFULL);
4077*4882a593Smuzhiyun tsf64 |= tsf32l;
4078*4882a593Smuzhiyun
4079*4882a593Smuzhiyun width = MS(reg1, RADAR_REPORT_REG1_PULSE_DUR);
4080*4882a593Smuzhiyun rssi = phyerr->rssi_combined;
4081*4882a593Smuzhiyun
4082*4882a593Smuzhiyun /* hardware store this as 8 bit signed value,
4083*4882a593Smuzhiyun * set to zero if negative number
4084*4882a593Smuzhiyun */
4085*4882a593Smuzhiyun if (rssi & 0x80)
4086*4882a593Smuzhiyun rssi = 0;
4087*4882a593Smuzhiyun
4088*4882a593Smuzhiyun pe.ts = tsf64;
4089*4882a593Smuzhiyun pe.freq = ch->center_freq;
4090*4882a593Smuzhiyun pe.width = width;
4091*4882a593Smuzhiyun pe.rssi = rssi;
4092*4882a593Smuzhiyun pe.chirp = (MS(reg0, RADAR_REPORT_REG0_PULSE_IS_CHIRP) != 0);
4093*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
4094*4882a593Smuzhiyun "dfs add pulse freq: %d, width: %d, rssi %d, tsf: %llX\n",
4095*4882a593Smuzhiyun pe.freq, pe.width, pe.rssi, pe.ts);
4096*4882a593Smuzhiyun
4097*4882a593Smuzhiyun ATH10K_DFS_STAT_INC(ar, pulses_detected);
4098*4882a593Smuzhiyun
4099*4882a593Smuzhiyun if (!ar->dfs_detector->add_pulse(ar->dfs_detector, &pe, &rs)) {
4100*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
4101*4882a593Smuzhiyun "dfs no pulse pattern detected, yet\n");
4102*4882a593Smuzhiyun return;
4103*4882a593Smuzhiyun }
4104*4882a593Smuzhiyun
4105*4882a593Smuzhiyun if ((test_bit(WMI_SERVICE_HOST_DFS_CHECK_SUPPORT, ar->wmi.svc_map)) &&
4106*4882a593Smuzhiyun ar->dfs_detector->region == NL80211_DFS_FCC) {
4107*4882a593Smuzhiyun /* Consecutive radar indications need not be
4108*4882a593Smuzhiyun * sent to the firmware until we get confirmation
4109*4882a593Smuzhiyun * for the previous detected radar.
4110*4882a593Smuzhiyun */
4111*4882a593Smuzhiyun spin_lock_bh(&ar->data_lock);
4112*4882a593Smuzhiyun if (ar->radar_conf_state != ATH10K_RADAR_CONFIRMATION_IDLE) {
4113*4882a593Smuzhiyun spin_unlock_bh(&ar->data_lock);
4114*4882a593Smuzhiyun return;
4115*4882a593Smuzhiyun }
4116*4882a593Smuzhiyun ar->radar_conf_state = ATH10K_RADAR_CONFIRMATION_INPROGRESS;
4117*4882a593Smuzhiyun radar_info = &ar->last_radar_info;
4118*4882a593Smuzhiyun
4119*4882a593Smuzhiyun radar_info->pri_min = rs.pri_min;
4120*4882a593Smuzhiyun radar_info->pri_max = rs.pri_max;
4121*4882a593Smuzhiyun radar_info->width_min = rs.width_min;
4122*4882a593Smuzhiyun radar_info->width_max = rs.width_max;
4123*4882a593Smuzhiyun /*TODO Find sidx_min and sidx_max */
4124*4882a593Smuzhiyun radar_info->sidx_min = MS(reg0, RADAR_REPORT_REG0_PULSE_SIDX);
4125*4882a593Smuzhiyun radar_info->sidx_max = MS(reg0, RADAR_REPORT_REG0_PULSE_SIDX);
4126*4882a593Smuzhiyun
4127*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
4128*4882a593Smuzhiyun "sending wmi radar found cmd pri_min %d pri_max %d width_min %d width_max %d sidx_min %d sidx_max %d\n",
4129*4882a593Smuzhiyun radar_info->pri_min, radar_info->pri_max,
4130*4882a593Smuzhiyun radar_info->width_min, radar_info->width_max,
4131*4882a593Smuzhiyun radar_info->sidx_min, radar_info->sidx_max);
4132*4882a593Smuzhiyun ieee80211_queue_work(ar->hw, &ar->radar_confirmation_work);
4133*4882a593Smuzhiyun spin_unlock_bh(&ar->data_lock);
4134*4882a593Smuzhiyun return;
4135*4882a593Smuzhiyun }
4136*4882a593Smuzhiyun
4137*4882a593Smuzhiyun radar_detected:
4138*4882a593Smuzhiyun ath10k_radar_detected(ar);
4139*4882a593Smuzhiyun }
4140*4882a593Smuzhiyun
ath10k_dfs_fft_report(struct ath10k * ar,struct wmi_phyerr_ev_arg * phyerr,const struct phyerr_fft_report * fftr,u64 tsf)4141*4882a593Smuzhiyun static int ath10k_dfs_fft_report(struct ath10k *ar,
4142*4882a593Smuzhiyun struct wmi_phyerr_ev_arg *phyerr,
4143*4882a593Smuzhiyun const struct phyerr_fft_report *fftr,
4144*4882a593Smuzhiyun u64 tsf)
4145*4882a593Smuzhiyun {
4146*4882a593Smuzhiyun u32 reg0, reg1;
4147*4882a593Smuzhiyun u8 rssi, peak_mag;
4148*4882a593Smuzhiyun
4149*4882a593Smuzhiyun reg0 = __le32_to_cpu(fftr->reg0);
4150*4882a593Smuzhiyun reg1 = __le32_to_cpu(fftr->reg1);
4151*4882a593Smuzhiyun rssi = phyerr->rssi_combined;
4152*4882a593Smuzhiyun
4153*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
4154*4882a593Smuzhiyun "wmi phyerr fft report total_gain_db %d base_pwr_db %d fft_chn_idx %d peak_sidx %d\n",
4155*4882a593Smuzhiyun MS(reg0, SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB),
4156*4882a593Smuzhiyun MS(reg0, SEARCH_FFT_REPORT_REG0_BASE_PWR_DB),
4157*4882a593Smuzhiyun MS(reg0, SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX),
4158*4882a593Smuzhiyun MS(reg0, SEARCH_FFT_REPORT_REG0_PEAK_SIDX));
4159*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
4160*4882a593Smuzhiyun "wmi phyerr fft report rel_pwr_db %d avgpwr_db %d peak_mag %d num_store_bin %d\n",
4161*4882a593Smuzhiyun MS(reg1, SEARCH_FFT_REPORT_REG1_RELPWR_DB),
4162*4882a593Smuzhiyun MS(reg1, SEARCH_FFT_REPORT_REG1_AVGPWR_DB),
4163*4882a593Smuzhiyun MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG),
4164*4882a593Smuzhiyun MS(reg1, SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB));
4165*4882a593Smuzhiyun
4166*4882a593Smuzhiyun peak_mag = MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG);
4167*4882a593Smuzhiyun
4168*4882a593Smuzhiyun /* false event detection */
4169*4882a593Smuzhiyun if (rssi == DFS_RSSI_POSSIBLY_FALSE &&
4170*4882a593Smuzhiyun peak_mag < 2 * DFS_PEAK_MAG_THOLD_POSSIBLY_FALSE) {
4171*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_REGULATORY, "dfs false pulse detected\n");
4172*4882a593Smuzhiyun ATH10K_DFS_STAT_INC(ar, pulses_discarded);
4173*4882a593Smuzhiyun return -EINVAL;
4174*4882a593Smuzhiyun }
4175*4882a593Smuzhiyun
4176*4882a593Smuzhiyun return 0;
4177*4882a593Smuzhiyun }
4178*4882a593Smuzhiyun
ath10k_wmi_event_dfs(struct ath10k * ar,struct wmi_phyerr_ev_arg * phyerr,u64 tsf)4179*4882a593Smuzhiyun void ath10k_wmi_event_dfs(struct ath10k *ar,
4180*4882a593Smuzhiyun struct wmi_phyerr_ev_arg *phyerr,
4181*4882a593Smuzhiyun u64 tsf)
4182*4882a593Smuzhiyun {
4183*4882a593Smuzhiyun int buf_len, tlv_len, res, i = 0;
4184*4882a593Smuzhiyun const struct phyerr_tlv *tlv;
4185*4882a593Smuzhiyun const struct phyerr_radar_report *rr;
4186*4882a593Smuzhiyun const struct phyerr_fft_report *fftr;
4187*4882a593Smuzhiyun const u8 *tlv_buf;
4188*4882a593Smuzhiyun
4189*4882a593Smuzhiyun buf_len = phyerr->buf_len;
4190*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
4191*4882a593Smuzhiyun "wmi event dfs err_code %d rssi %d tsfl 0x%X tsf64 0x%llX len %d\n",
4192*4882a593Smuzhiyun phyerr->phy_err_code, phyerr->rssi_combined,
4193*4882a593Smuzhiyun phyerr->tsf_timestamp, tsf, buf_len);
4194*4882a593Smuzhiyun
4195*4882a593Smuzhiyun /* Skip event if DFS disabled */
4196*4882a593Smuzhiyun if (!IS_ENABLED(CONFIG_ATH10K_DFS_CERTIFIED))
4197*4882a593Smuzhiyun return;
4198*4882a593Smuzhiyun
4199*4882a593Smuzhiyun ATH10K_DFS_STAT_INC(ar, pulses_total);
4200*4882a593Smuzhiyun
4201*4882a593Smuzhiyun while (i < buf_len) {
4202*4882a593Smuzhiyun if (i + sizeof(*tlv) > buf_len) {
4203*4882a593Smuzhiyun ath10k_warn(ar, "too short buf for tlv header (%d)\n",
4204*4882a593Smuzhiyun i);
4205*4882a593Smuzhiyun return;
4206*4882a593Smuzhiyun }
4207*4882a593Smuzhiyun
4208*4882a593Smuzhiyun tlv = (struct phyerr_tlv *)&phyerr->buf[i];
4209*4882a593Smuzhiyun tlv_len = __le16_to_cpu(tlv->len);
4210*4882a593Smuzhiyun tlv_buf = &phyerr->buf[i + sizeof(*tlv)];
4211*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
4212*4882a593Smuzhiyun "wmi event dfs tlv_len %d tlv_tag 0x%02X tlv_sig 0x%02X\n",
4213*4882a593Smuzhiyun tlv_len, tlv->tag, tlv->sig);
4214*4882a593Smuzhiyun
4215*4882a593Smuzhiyun switch (tlv->tag) {
4216*4882a593Smuzhiyun case PHYERR_TLV_TAG_RADAR_PULSE_SUMMARY:
4217*4882a593Smuzhiyun if (i + sizeof(*tlv) + sizeof(*rr) > buf_len) {
4218*4882a593Smuzhiyun ath10k_warn(ar, "too short radar pulse summary (%d)\n",
4219*4882a593Smuzhiyun i);
4220*4882a593Smuzhiyun return;
4221*4882a593Smuzhiyun }
4222*4882a593Smuzhiyun
4223*4882a593Smuzhiyun rr = (struct phyerr_radar_report *)tlv_buf;
4224*4882a593Smuzhiyun ath10k_dfs_radar_report(ar, phyerr, rr, tsf);
4225*4882a593Smuzhiyun break;
4226*4882a593Smuzhiyun case PHYERR_TLV_TAG_SEARCH_FFT_REPORT:
4227*4882a593Smuzhiyun if (i + sizeof(*tlv) + sizeof(*fftr) > buf_len) {
4228*4882a593Smuzhiyun ath10k_warn(ar, "too short fft report (%d)\n",
4229*4882a593Smuzhiyun i);
4230*4882a593Smuzhiyun return;
4231*4882a593Smuzhiyun }
4232*4882a593Smuzhiyun
4233*4882a593Smuzhiyun fftr = (struct phyerr_fft_report *)tlv_buf;
4234*4882a593Smuzhiyun res = ath10k_dfs_fft_report(ar, phyerr, fftr, tsf);
4235*4882a593Smuzhiyun if (res)
4236*4882a593Smuzhiyun return;
4237*4882a593Smuzhiyun break;
4238*4882a593Smuzhiyun }
4239*4882a593Smuzhiyun
4240*4882a593Smuzhiyun i += sizeof(*tlv) + tlv_len;
4241*4882a593Smuzhiyun }
4242*4882a593Smuzhiyun }
4243*4882a593Smuzhiyun
ath10k_wmi_event_spectral_scan(struct ath10k * ar,struct wmi_phyerr_ev_arg * phyerr,u64 tsf)4244*4882a593Smuzhiyun void ath10k_wmi_event_spectral_scan(struct ath10k *ar,
4245*4882a593Smuzhiyun struct wmi_phyerr_ev_arg *phyerr,
4246*4882a593Smuzhiyun u64 tsf)
4247*4882a593Smuzhiyun {
4248*4882a593Smuzhiyun int buf_len, tlv_len, res, i = 0;
4249*4882a593Smuzhiyun struct phyerr_tlv *tlv;
4250*4882a593Smuzhiyun const void *tlv_buf;
4251*4882a593Smuzhiyun const struct phyerr_fft_report *fftr;
4252*4882a593Smuzhiyun size_t fftr_len;
4253*4882a593Smuzhiyun
4254*4882a593Smuzhiyun buf_len = phyerr->buf_len;
4255*4882a593Smuzhiyun
4256*4882a593Smuzhiyun while (i < buf_len) {
4257*4882a593Smuzhiyun if (i + sizeof(*tlv) > buf_len) {
4258*4882a593Smuzhiyun ath10k_warn(ar, "failed to parse phyerr tlv header at byte %d\n",
4259*4882a593Smuzhiyun i);
4260*4882a593Smuzhiyun return;
4261*4882a593Smuzhiyun }
4262*4882a593Smuzhiyun
4263*4882a593Smuzhiyun tlv = (struct phyerr_tlv *)&phyerr->buf[i];
4264*4882a593Smuzhiyun tlv_len = __le16_to_cpu(tlv->len);
4265*4882a593Smuzhiyun tlv_buf = &phyerr->buf[i + sizeof(*tlv)];
4266*4882a593Smuzhiyun
4267*4882a593Smuzhiyun if (i + sizeof(*tlv) + tlv_len > buf_len) {
4268*4882a593Smuzhiyun ath10k_warn(ar, "failed to parse phyerr tlv payload at byte %d\n",
4269*4882a593Smuzhiyun i);
4270*4882a593Smuzhiyun return;
4271*4882a593Smuzhiyun }
4272*4882a593Smuzhiyun
4273*4882a593Smuzhiyun switch (tlv->tag) {
4274*4882a593Smuzhiyun case PHYERR_TLV_TAG_SEARCH_FFT_REPORT:
4275*4882a593Smuzhiyun if (sizeof(*fftr) > tlv_len) {
4276*4882a593Smuzhiyun ath10k_warn(ar, "failed to parse fft report at byte %d\n",
4277*4882a593Smuzhiyun i);
4278*4882a593Smuzhiyun return;
4279*4882a593Smuzhiyun }
4280*4882a593Smuzhiyun
4281*4882a593Smuzhiyun fftr_len = tlv_len - sizeof(*fftr);
4282*4882a593Smuzhiyun fftr = tlv_buf;
4283*4882a593Smuzhiyun res = ath10k_spectral_process_fft(ar, phyerr,
4284*4882a593Smuzhiyun fftr, fftr_len,
4285*4882a593Smuzhiyun tsf);
4286*4882a593Smuzhiyun if (res < 0) {
4287*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI, "failed to process fft report: %d\n",
4288*4882a593Smuzhiyun res);
4289*4882a593Smuzhiyun return;
4290*4882a593Smuzhiyun }
4291*4882a593Smuzhiyun break;
4292*4882a593Smuzhiyun }
4293*4882a593Smuzhiyun
4294*4882a593Smuzhiyun i += sizeof(*tlv) + tlv_len;
4295*4882a593Smuzhiyun }
4296*4882a593Smuzhiyun }
4297*4882a593Smuzhiyun
ath10k_wmi_op_pull_phyerr_ev_hdr(struct ath10k * ar,struct sk_buff * skb,struct wmi_phyerr_hdr_arg * arg)4298*4882a593Smuzhiyun static int ath10k_wmi_op_pull_phyerr_ev_hdr(struct ath10k *ar,
4299*4882a593Smuzhiyun struct sk_buff *skb,
4300*4882a593Smuzhiyun struct wmi_phyerr_hdr_arg *arg)
4301*4882a593Smuzhiyun {
4302*4882a593Smuzhiyun struct wmi_phyerr_event *ev = (void *)skb->data;
4303*4882a593Smuzhiyun
4304*4882a593Smuzhiyun if (skb->len < sizeof(*ev))
4305*4882a593Smuzhiyun return -EPROTO;
4306*4882a593Smuzhiyun
4307*4882a593Smuzhiyun arg->num_phyerrs = __le32_to_cpu(ev->num_phyerrs);
4308*4882a593Smuzhiyun arg->tsf_l32 = __le32_to_cpu(ev->tsf_l32);
4309*4882a593Smuzhiyun arg->tsf_u32 = __le32_to_cpu(ev->tsf_u32);
4310*4882a593Smuzhiyun arg->buf_len = skb->len - sizeof(*ev);
4311*4882a593Smuzhiyun arg->phyerrs = ev->phyerrs;
4312*4882a593Smuzhiyun
4313*4882a593Smuzhiyun return 0;
4314*4882a593Smuzhiyun }
4315*4882a593Smuzhiyun
ath10k_wmi_10_4_op_pull_phyerr_ev_hdr(struct ath10k * ar,struct sk_buff * skb,struct wmi_phyerr_hdr_arg * arg)4316*4882a593Smuzhiyun static int ath10k_wmi_10_4_op_pull_phyerr_ev_hdr(struct ath10k *ar,
4317*4882a593Smuzhiyun struct sk_buff *skb,
4318*4882a593Smuzhiyun struct wmi_phyerr_hdr_arg *arg)
4319*4882a593Smuzhiyun {
4320*4882a593Smuzhiyun struct wmi_10_4_phyerr_event *ev = (void *)skb->data;
4321*4882a593Smuzhiyun
4322*4882a593Smuzhiyun if (skb->len < sizeof(*ev))
4323*4882a593Smuzhiyun return -EPROTO;
4324*4882a593Smuzhiyun
4325*4882a593Smuzhiyun /* 10.4 firmware always reports only one phyerr */
4326*4882a593Smuzhiyun arg->num_phyerrs = 1;
4327*4882a593Smuzhiyun
4328*4882a593Smuzhiyun arg->tsf_l32 = __le32_to_cpu(ev->tsf_l32);
4329*4882a593Smuzhiyun arg->tsf_u32 = __le32_to_cpu(ev->tsf_u32);
4330*4882a593Smuzhiyun arg->buf_len = skb->len;
4331*4882a593Smuzhiyun arg->phyerrs = skb->data;
4332*4882a593Smuzhiyun
4333*4882a593Smuzhiyun return 0;
4334*4882a593Smuzhiyun }
4335*4882a593Smuzhiyun
ath10k_wmi_op_pull_phyerr_ev(struct ath10k * ar,const void * phyerr_buf,int left_len,struct wmi_phyerr_ev_arg * arg)4336*4882a593Smuzhiyun int ath10k_wmi_op_pull_phyerr_ev(struct ath10k *ar,
4337*4882a593Smuzhiyun const void *phyerr_buf,
4338*4882a593Smuzhiyun int left_len,
4339*4882a593Smuzhiyun struct wmi_phyerr_ev_arg *arg)
4340*4882a593Smuzhiyun {
4341*4882a593Smuzhiyun const struct wmi_phyerr *phyerr = phyerr_buf;
4342*4882a593Smuzhiyun int i;
4343*4882a593Smuzhiyun
4344*4882a593Smuzhiyun if (left_len < sizeof(*phyerr)) {
4345*4882a593Smuzhiyun ath10k_warn(ar, "wrong phyerr event head len %d (need: >=%zd)\n",
4346*4882a593Smuzhiyun left_len, sizeof(*phyerr));
4347*4882a593Smuzhiyun return -EINVAL;
4348*4882a593Smuzhiyun }
4349*4882a593Smuzhiyun
4350*4882a593Smuzhiyun arg->tsf_timestamp = __le32_to_cpu(phyerr->tsf_timestamp);
4351*4882a593Smuzhiyun arg->freq1 = __le16_to_cpu(phyerr->freq1);
4352*4882a593Smuzhiyun arg->freq2 = __le16_to_cpu(phyerr->freq2);
4353*4882a593Smuzhiyun arg->rssi_combined = phyerr->rssi_combined;
4354*4882a593Smuzhiyun arg->chan_width_mhz = phyerr->chan_width_mhz;
4355*4882a593Smuzhiyun arg->buf_len = __le32_to_cpu(phyerr->buf_len);
4356*4882a593Smuzhiyun arg->buf = phyerr->buf;
4357*4882a593Smuzhiyun arg->hdr_len = sizeof(*phyerr);
4358*4882a593Smuzhiyun
4359*4882a593Smuzhiyun for (i = 0; i < 4; i++)
4360*4882a593Smuzhiyun arg->nf_chains[i] = __le16_to_cpu(phyerr->nf_chains[i]);
4361*4882a593Smuzhiyun
4362*4882a593Smuzhiyun switch (phyerr->phy_err_code) {
4363*4882a593Smuzhiyun case PHY_ERROR_GEN_SPECTRAL_SCAN:
4364*4882a593Smuzhiyun arg->phy_err_code = PHY_ERROR_SPECTRAL_SCAN;
4365*4882a593Smuzhiyun break;
4366*4882a593Smuzhiyun case PHY_ERROR_GEN_FALSE_RADAR_EXT:
4367*4882a593Smuzhiyun arg->phy_err_code = PHY_ERROR_FALSE_RADAR_EXT;
4368*4882a593Smuzhiyun break;
4369*4882a593Smuzhiyun case PHY_ERROR_GEN_RADAR:
4370*4882a593Smuzhiyun arg->phy_err_code = PHY_ERROR_RADAR;
4371*4882a593Smuzhiyun break;
4372*4882a593Smuzhiyun default:
4373*4882a593Smuzhiyun arg->phy_err_code = PHY_ERROR_UNKNOWN;
4374*4882a593Smuzhiyun break;
4375*4882a593Smuzhiyun }
4376*4882a593Smuzhiyun
4377*4882a593Smuzhiyun return 0;
4378*4882a593Smuzhiyun }
4379*4882a593Smuzhiyun
ath10k_wmi_10_4_op_pull_phyerr_ev(struct ath10k * ar,const void * phyerr_buf,int left_len,struct wmi_phyerr_ev_arg * arg)4380*4882a593Smuzhiyun static int ath10k_wmi_10_4_op_pull_phyerr_ev(struct ath10k *ar,
4381*4882a593Smuzhiyun const void *phyerr_buf,
4382*4882a593Smuzhiyun int left_len,
4383*4882a593Smuzhiyun struct wmi_phyerr_ev_arg *arg)
4384*4882a593Smuzhiyun {
4385*4882a593Smuzhiyun const struct wmi_10_4_phyerr_event *phyerr = phyerr_buf;
4386*4882a593Smuzhiyun u32 phy_err_mask;
4387*4882a593Smuzhiyun int i;
4388*4882a593Smuzhiyun
4389*4882a593Smuzhiyun if (left_len < sizeof(*phyerr)) {
4390*4882a593Smuzhiyun ath10k_warn(ar, "wrong phyerr event head len %d (need: >=%zd)\n",
4391*4882a593Smuzhiyun left_len, sizeof(*phyerr));
4392*4882a593Smuzhiyun return -EINVAL;
4393*4882a593Smuzhiyun }
4394*4882a593Smuzhiyun
4395*4882a593Smuzhiyun arg->tsf_timestamp = __le32_to_cpu(phyerr->tsf_timestamp);
4396*4882a593Smuzhiyun arg->freq1 = __le16_to_cpu(phyerr->freq1);
4397*4882a593Smuzhiyun arg->freq2 = __le16_to_cpu(phyerr->freq2);
4398*4882a593Smuzhiyun arg->rssi_combined = phyerr->rssi_combined;
4399*4882a593Smuzhiyun arg->chan_width_mhz = phyerr->chan_width_mhz;
4400*4882a593Smuzhiyun arg->buf_len = __le32_to_cpu(phyerr->buf_len);
4401*4882a593Smuzhiyun arg->buf = phyerr->buf;
4402*4882a593Smuzhiyun arg->hdr_len = sizeof(*phyerr);
4403*4882a593Smuzhiyun
4404*4882a593Smuzhiyun for (i = 0; i < 4; i++)
4405*4882a593Smuzhiyun arg->nf_chains[i] = __le16_to_cpu(phyerr->nf_chains[i]);
4406*4882a593Smuzhiyun
4407*4882a593Smuzhiyun phy_err_mask = __le32_to_cpu(phyerr->phy_err_mask[0]);
4408*4882a593Smuzhiyun
4409*4882a593Smuzhiyun if (phy_err_mask & PHY_ERROR_10_4_SPECTRAL_SCAN_MASK)
4410*4882a593Smuzhiyun arg->phy_err_code = PHY_ERROR_SPECTRAL_SCAN;
4411*4882a593Smuzhiyun else if (phy_err_mask & PHY_ERROR_10_4_RADAR_MASK)
4412*4882a593Smuzhiyun arg->phy_err_code = PHY_ERROR_RADAR;
4413*4882a593Smuzhiyun else
4414*4882a593Smuzhiyun arg->phy_err_code = PHY_ERROR_UNKNOWN;
4415*4882a593Smuzhiyun
4416*4882a593Smuzhiyun return 0;
4417*4882a593Smuzhiyun }
4418*4882a593Smuzhiyun
ath10k_wmi_event_phyerr(struct ath10k * ar,struct sk_buff * skb)4419*4882a593Smuzhiyun void ath10k_wmi_event_phyerr(struct ath10k *ar, struct sk_buff *skb)
4420*4882a593Smuzhiyun {
4421*4882a593Smuzhiyun struct wmi_phyerr_hdr_arg hdr_arg = {};
4422*4882a593Smuzhiyun struct wmi_phyerr_ev_arg phyerr_arg = {};
4423*4882a593Smuzhiyun const void *phyerr;
4424*4882a593Smuzhiyun u32 count, i, buf_len, phy_err_code;
4425*4882a593Smuzhiyun u64 tsf;
4426*4882a593Smuzhiyun int left_len, ret;
4427*4882a593Smuzhiyun
4428*4882a593Smuzhiyun ATH10K_DFS_STAT_INC(ar, phy_errors);
4429*4882a593Smuzhiyun
4430*4882a593Smuzhiyun ret = ath10k_wmi_pull_phyerr_hdr(ar, skb, &hdr_arg);
4431*4882a593Smuzhiyun if (ret) {
4432*4882a593Smuzhiyun ath10k_warn(ar, "failed to parse phyerr event hdr: %d\n", ret);
4433*4882a593Smuzhiyun return;
4434*4882a593Smuzhiyun }
4435*4882a593Smuzhiyun
4436*4882a593Smuzhiyun /* Check number of included events */
4437*4882a593Smuzhiyun count = hdr_arg.num_phyerrs;
4438*4882a593Smuzhiyun
4439*4882a593Smuzhiyun left_len = hdr_arg.buf_len;
4440*4882a593Smuzhiyun
4441*4882a593Smuzhiyun tsf = hdr_arg.tsf_u32;
4442*4882a593Smuzhiyun tsf <<= 32;
4443*4882a593Smuzhiyun tsf |= hdr_arg.tsf_l32;
4444*4882a593Smuzhiyun
4445*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI,
4446*4882a593Smuzhiyun "wmi event phyerr count %d tsf64 0x%llX\n",
4447*4882a593Smuzhiyun count, tsf);
4448*4882a593Smuzhiyun
4449*4882a593Smuzhiyun phyerr = hdr_arg.phyerrs;
4450*4882a593Smuzhiyun for (i = 0; i < count; i++) {
4451*4882a593Smuzhiyun ret = ath10k_wmi_pull_phyerr(ar, phyerr, left_len, &phyerr_arg);
4452*4882a593Smuzhiyun if (ret) {
4453*4882a593Smuzhiyun ath10k_warn(ar, "failed to parse phyerr event (%d)\n",
4454*4882a593Smuzhiyun i);
4455*4882a593Smuzhiyun return;
4456*4882a593Smuzhiyun }
4457*4882a593Smuzhiyun
4458*4882a593Smuzhiyun left_len -= phyerr_arg.hdr_len;
4459*4882a593Smuzhiyun buf_len = phyerr_arg.buf_len;
4460*4882a593Smuzhiyun phy_err_code = phyerr_arg.phy_err_code;
4461*4882a593Smuzhiyun
4462*4882a593Smuzhiyun if (left_len < buf_len) {
4463*4882a593Smuzhiyun ath10k_warn(ar, "single event (%d) wrong buf len\n", i);
4464*4882a593Smuzhiyun return;
4465*4882a593Smuzhiyun }
4466*4882a593Smuzhiyun
4467*4882a593Smuzhiyun left_len -= buf_len;
4468*4882a593Smuzhiyun
4469*4882a593Smuzhiyun switch (phy_err_code) {
4470*4882a593Smuzhiyun case PHY_ERROR_RADAR:
4471*4882a593Smuzhiyun ath10k_wmi_event_dfs(ar, &phyerr_arg, tsf);
4472*4882a593Smuzhiyun break;
4473*4882a593Smuzhiyun case PHY_ERROR_SPECTRAL_SCAN:
4474*4882a593Smuzhiyun ath10k_wmi_event_spectral_scan(ar, &phyerr_arg, tsf);
4475*4882a593Smuzhiyun break;
4476*4882a593Smuzhiyun case PHY_ERROR_FALSE_RADAR_EXT:
4477*4882a593Smuzhiyun ath10k_wmi_event_dfs(ar, &phyerr_arg, tsf);
4478*4882a593Smuzhiyun ath10k_wmi_event_spectral_scan(ar, &phyerr_arg, tsf);
4479*4882a593Smuzhiyun break;
4480*4882a593Smuzhiyun default:
4481*4882a593Smuzhiyun break;
4482*4882a593Smuzhiyun }
4483*4882a593Smuzhiyun
4484*4882a593Smuzhiyun phyerr = phyerr + phyerr_arg.hdr_len + buf_len;
4485*4882a593Smuzhiyun }
4486*4882a593Smuzhiyun }
4487*4882a593Smuzhiyun
4488*4882a593Smuzhiyun static int
ath10k_wmi_10_4_op_pull_dfs_status_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_dfs_status_ev_arg * arg)4489*4882a593Smuzhiyun ath10k_wmi_10_4_op_pull_dfs_status_ev(struct ath10k *ar, struct sk_buff *skb,
4490*4882a593Smuzhiyun struct wmi_dfs_status_ev_arg *arg)
4491*4882a593Smuzhiyun {
4492*4882a593Smuzhiyun struct wmi_dfs_status_ev_arg *ev = (void *)skb->data;
4493*4882a593Smuzhiyun
4494*4882a593Smuzhiyun if (skb->len < sizeof(*ev))
4495*4882a593Smuzhiyun return -EPROTO;
4496*4882a593Smuzhiyun
4497*4882a593Smuzhiyun arg->status = ev->status;
4498*4882a593Smuzhiyun
4499*4882a593Smuzhiyun return 0;
4500*4882a593Smuzhiyun }
4501*4882a593Smuzhiyun
4502*4882a593Smuzhiyun static void
ath10k_wmi_event_dfs_status_check(struct ath10k * ar,struct sk_buff * skb)4503*4882a593Smuzhiyun ath10k_wmi_event_dfs_status_check(struct ath10k *ar, struct sk_buff *skb)
4504*4882a593Smuzhiyun {
4505*4882a593Smuzhiyun struct wmi_dfs_status_ev_arg status_arg = {};
4506*4882a593Smuzhiyun int ret;
4507*4882a593Smuzhiyun
4508*4882a593Smuzhiyun ret = ath10k_wmi_pull_dfs_status(ar, skb, &status_arg);
4509*4882a593Smuzhiyun
4510*4882a593Smuzhiyun if (ret) {
4511*4882a593Smuzhiyun ath10k_warn(ar, "failed to parse dfs status event: %d\n", ret);
4512*4882a593Smuzhiyun return;
4513*4882a593Smuzhiyun }
4514*4882a593Smuzhiyun
4515*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_REGULATORY,
4516*4882a593Smuzhiyun "dfs status event received from fw: %d\n",
4517*4882a593Smuzhiyun status_arg.status);
4518*4882a593Smuzhiyun
4519*4882a593Smuzhiyun /* Even in case of radar detection failure we follow the same
4520*4882a593Smuzhiyun * behaviour as if radar is detected i.e to switch to a different
4521*4882a593Smuzhiyun * channel.
4522*4882a593Smuzhiyun */
4523*4882a593Smuzhiyun if (status_arg.status == WMI_HW_RADAR_DETECTED ||
4524*4882a593Smuzhiyun status_arg.status == WMI_RADAR_DETECTION_FAIL)
4525*4882a593Smuzhiyun ath10k_radar_detected(ar);
4526*4882a593Smuzhiyun complete(&ar->wmi.radar_confirm);
4527*4882a593Smuzhiyun }
4528*4882a593Smuzhiyun
ath10k_wmi_event_roam(struct ath10k * ar,struct sk_buff * skb)4529*4882a593Smuzhiyun void ath10k_wmi_event_roam(struct ath10k *ar, struct sk_buff *skb)
4530*4882a593Smuzhiyun {
4531*4882a593Smuzhiyun struct wmi_roam_ev_arg arg = {};
4532*4882a593Smuzhiyun int ret;
4533*4882a593Smuzhiyun u32 vdev_id;
4534*4882a593Smuzhiyun u32 reason;
4535*4882a593Smuzhiyun s32 rssi;
4536*4882a593Smuzhiyun
4537*4882a593Smuzhiyun ret = ath10k_wmi_pull_roam_ev(ar, skb, &arg);
4538*4882a593Smuzhiyun if (ret) {
4539*4882a593Smuzhiyun ath10k_warn(ar, "failed to parse roam event: %d\n", ret);
4540*4882a593Smuzhiyun return;
4541*4882a593Smuzhiyun }
4542*4882a593Smuzhiyun
4543*4882a593Smuzhiyun vdev_id = __le32_to_cpu(arg.vdev_id);
4544*4882a593Smuzhiyun reason = __le32_to_cpu(arg.reason);
4545*4882a593Smuzhiyun rssi = __le32_to_cpu(arg.rssi);
4546*4882a593Smuzhiyun rssi += WMI_SPECTRAL_NOISE_FLOOR_REF_DEFAULT;
4547*4882a593Smuzhiyun
4548*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI,
4549*4882a593Smuzhiyun "wmi roam event vdev %u reason 0x%08x rssi %d\n",
4550*4882a593Smuzhiyun vdev_id, reason, rssi);
4551*4882a593Smuzhiyun
4552*4882a593Smuzhiyun if (reason >= WMI_ROAM_REASON_MAX)
4553*4882a593Smuzhiyun ath10k_warn(ar, "ignoring unknown roam event reason %d on vdev %i\n",
4554*4882a593Smuzhiyun reason, vdev_id);
4555*4882a593Smuzhiyun
4556*4882a593Smuzhiyun switch (reason) {
4557*4882a593Smuzhiyun case WMI_ROAM_REASON_BEACON_MISS:
4558*4882a593Smuzhiyun ath10k_mac_handle_beacon_miss(ar, vdev_id);
4559*4882a593Smuzhiyun break;
4560*4882a593Smuzhiyun case WMI_ROAM_REASON_BETTER_AP:
4561*4882a593Smuzhiyun case WMI_ROAM_REASON_LOW_RSSI:
4562*4882a593Smuzhiyun case WMI_ROAM_REASON_SUITABLE_AP_FOUND:
4563*4882a593Smuzhiyun case WMI_ROAM_REASON_HO_FAILED:
4564*4882a593Smuzhiyun ath10k_warn(ar, "ignoring not implemented roam event reason %d on vdev %i\n",
4565*4882a593Smuzhiyun reason, vdev_id);
4566*4882a593Smuzhiyun break;
4567*4882a593Smuzhiyun }
4568*4882a593Smuzhiyun }
4569*4882a593Smuzhiyun
ath10k_wmi_event_profile_match(struct ath10k * ar,struct sk_buff * skb)4570*4882a593Smuzhiyun void ath10k_wmi_event_profile_match(struct ath10k *ar, struct sk_buff *skb)
4571*4882a593Smuzhiyun {
4572*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PROFILE_MATCH\n");
4573*4882a593Smuzhiyun }
4574*4882a593Smuzhiyun
ath10k_wmi_event_debug_print(struct ath10k * ar,struct sk_buff * skb)4575*4882a593Smuzhiyun void ath10k_wmi_event_debug_print(struct ath10k *ar, struct sk_buff *skb)
4576*4882a593Smuzhiyun {
4577*4882a593Smuzhiyun char buf[101], c;
4578*4882a593Smuzhiyun int i;
4579*4882a593Smuzhiyun
4580*4882a593Smuzhiyun for (i = 0; i < sizeof(buf) - 1; i++) {
4581*4882a593Smuzhiyun if (i >= skb->len)
4582*4882a593Smuzhiyun break;
4583*4882a593Smuzhiyun
4584*4882a593Smuzhiyun c = skb->data[i];
4585*4882a593Smuzhiyun
4586*4882a593Smuzhiyun if (c == '\0')
4587*4882a593Smuzhiyun break;
4588*4882a593Smuzhiyun
4589*4882a593Smuzhiyun if (isascii(c) && isprint(c))
4590*4882a593Smuzhiyun buf[i] = c;
4591*4882a593Smuzhiyun else
4592*4882a593Smuzhiyun buf[i] = '.';
4593*4882a593Smuzhiyun }
4594*4882a593Smuzhiyun
4595*4882a593Smuzhiyun if (i == sizeof(buf) - 1)
4596*4882a593Smuzhiyun ath10k_warn(ar, "wmi debug print truncated: %d\n", skb->len);
4597*4882a593Smuzhiyun
4598*4882a593Smuzhiyun /* for some reason the debug prints end with \n, remove that */
4599*4882a593Smuzhiyun if (skb->data[i - 1] == '\n')
4600*4882a593Smuzhiyun i--;
4601*4882a593Smuzhiyun
4602*4882a593Smuzhiyun /* the last byte is always reserved for the null character */
4603*4882a593Smuzhiyun buf[i] = '\0';
4604*4882a593Smuzhiyun
4605*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI_PRINT, "wmi print '%s'\n", buf);
4606*4882a593Smuzhiyun }
4607*4882a593Smuzhiyun
ath10k_wmi_event_pdev_qvit(struct ath10k * ar,struct sk_buff * skb)4608*4882a593Smuzhiyun void ath10k_wmi_event_pdev_qvit(struct ath10k *ar, struct sk_buff *skb)
4609*4882a593Smuzhiyun {
4610*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_QVIT_EVENTID\n");
4611*4882a593Smuzhiyun }
4612*4882a593Smuzhiyun
ath10k_wmi_event_wlan_profile_data(struct ath10k * ar,struct sk_buff * skb)4613*4882a593Smuzhiyun void ath10k_wmi_event_wlan_profile_data(struct ath10k *ar, struct sk_buff *skb)
4614*4882a593Smuzhiyun {
4615*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_WLAN_PROFILE_DATA_EVENTID\n");
4616*4882a593Smuzhiyun }
4617*4882a593Smuzhiyun
ath10k_wmi_event_rtt_measurement_report(struct ath10k * ar,struct sk_buff * skb)4618*4882a593Smuzhiyun void ath10k_wmi_event_rtt_measurement_report(struct ath10k *ar,
4619*4882a593Smuzhiyun struct sk_buff *skb)
4620*4882a593Smuzhiyun {
4621*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_MEASUREMENT_REPORT_EVENTID\n");
4622*4882a593Smuzhiyun }
4623*4882a593Smuzhiyun
ath10k_wmi_event_tsf_measurement_report(struct ath10k * ar,struct sk_buff * skb)4624*4882a593Smuzhiyun void ath10k_wmi_event_tsf_measurement_report(struct ath10k *ar,
4625*4882a593Smuzhiyun struct sk_buff *skb)
4626*4882a593Smuzhiyun {
4627*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TSF_MEASUREMENT_REPORT_EVENTID\n");
4628*4882a593Smuzhiyun }
4629*4882a593Smuzhiyun
ath10k_wmi_event_rtt_error_report(struct ath10k * ar,struct sk_buff * skb)4630*4882a593Smuzhiyun void ath10k_wmi_event_rtt_error_report(struct ath10k *ar, struct sk_buff *skb)
4631*4882a593Smuzhiyun {
4632*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_ERROR_REPORT_EVENTID\n");
4633*4882a593Smuzhiyun }
4634*4882a593Smuzhiyun
ath10k_wmi_event_wow_wakeup_host(struct ath10k * ar,struct sk_buff * skb)4635*4882a593Smuzhiyun void ath10k_wmi_event_wow_wakeup_host(struct ath10k *ar, struct sk_buff *skb)
4636*4882a593Smuzhiyun {
4637*4882a593Smuzhiyun struct wmi_wow_ev_arg ev = {};
4638*4882a593Smuzhiyun int ret;
4639*4882a593Smuzhiyun
4640*4882a593Smuzhiyun complete(&ar->wow.wakeup_completed);
4641*4882a593Smuzhiyun
4642*4882a593Smuzhiyun ret = ath10k_wmi_pull_wow_event(ar, skb, &ev);
4643*4882a593Smuzhiyun if (ret) {
4644*4882a593Smuzhiyun ath10k_warn(ar, "failed to parse wow wakeup event: %d\n", ret);
4645*4882a593Smuzhiyun return;
4646*4882a593Smuzhiyun }
4647*4882a593Smuzhiyun
4648*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI, "wow wakeup host reason %s\n",
4649*4882a593Smuzhiyun wow_reason(ev.wake_reason));
4650*4882a593Smuzhiyun }
4651*4882a593Smuzhiyun
ath10k_wmi_event_dcs_interference(struct ath10k * ar,struct sk_buff * skb)4652*4882a593Smuzhiyun void ath10k_wmi_event_dcs_interference(struct ath10k *ar, struct sk_buff *skb)
4653*4882a593Smuzhiyun {
4654*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_DCS_INTERFERENCE_EVENTID\n");
4655*4882a593Smuzhiyun }
4656*4882a593Smuzhiyun
ath10k_tpc_config_get_rate(struct ath10k * ar,struct wmi_pdev_tpc_config_event * ev,u32 rate_idx,u32 num_chains,u32 rate_code,u8 type)4657*4882a593Smuzhiyun static u8 ath10k_tpc_config_get_rate(struct ath10k *ar,
4658*4882a593Smuzhiyun struct wmi_pdev_tpc_config_event *ev,
4659*4882a593Smuzhiyun u32 rate_idx, u32 num_chains,
4660*4882a593Smuzhiyun u32 rate_code, u8 type)
4661*4882a593Smuzhiyun {
4662*4882a593Smuzhiyun u8 tpc, num_streams, preamble, ch, stm_idx;
4663*4882a593Smuzhiyun
4664*4882a593Smuzhiyun num_streams = ATH10K_HW_NSS(rate_code);
4665*4882a593Smuzhiyun preamble = ATH10K_HW_PREAMBLE(rate_code);
4666*4882a593Smuzhiyun ch = num_chains - 1;
4667*4882a593Smuzhiyun
4668*4882a593Smuzhiyun tpc = min_t(u8, ev->rates_array[rate_idx], ev->max_reg_allow_pow[ch]);
4669*4882a593Smuzhiyun
4670*4882a593Smuzhiyun if (__le32_to_cpu(ev->num_tx_chain) <= 1)
4671*4882a593Smuzhiyun goto out;
4672*4882a593Smuzhiyun
4673*4882a593Smuzhiyun if (preamble == WMI_RATE_PREAMBLE_CCK)
4674*4882a593Smuzhiyun goto out;
4675*4882a593Smuzhiyun
4676*4882a593Smuzhiyun stm_idx = num_streams - 1;
4677*4882a593Smuzhiyun if (num_chains <= num_streams)
4678*4882a593Smuzhiyun goto out;
4679*4882a593Smuzhiyun
4680*4882a593Smuzhiyun switch (type) {
4681*4882a593Smuzhiyun case WMI_TPC_TABLE_TYPE_STBC:
4682*4882a593Smuzhiyun tpc = min_t(u8, tpc,
4683*4882a593Smuzhiyun ev->max_reg_allow_pow_agstbc[ch - 1][stm_idx]);
4684*4882a593Smuzhiyun break;
4685*4882a593Smuzhiyun case WMI_TPC_TABLE_TYPE_TXBF:
4686*4882a593Smuzhiyun tpc = min_t(u8, tpc,
4687*4882a593Smuzhiyun ev->max_reg_allow_pow_agtxbf[ch - 1][stm_idx]);
4688*4882a593Smuzhiyun break;
4689*4882a593Smuzhiyun case WMI_TPC_TABLE_TYPE_CDD:
4690*4882a593Smuzhiyun tpc = min_t(u8, tpc,
4691*4882a593Smuzhiyun ev->max_reg_allow_pow_agcdd[ch - 1][stm_idx]);
4692*4882a593Smuzhiyun break;
4693*4882a593Smuzhiyun default:
4694*4882a593Smuzhiyun ath10k_warn(ar, "unknown wmi tpc table type: %d\n", type);
4695*4882a593Smuzhiyun tpc = 0;
4696*4882a593Smuzhiyun break;
4697*4882a593Smuzhiyun }
4698*4882a593Smuzhiyun
4699*4882a593Smuzhiyun out:
4700*4882a593Smuzhiyun return tpc;
4701*4882a593Smuzhiyun }
4702*4882a593Smuzhiyun
ath10k_tpc_config_disp_tables(struct ath10k * ar,struct wmi_pdev_tpc_config_event * ev,struct ath10k_tpc_stats * tpc_stats,u8 * rate_code,u16 * pream_table,u8 type)4703*4882a593Smuzhiyun static void ath10k_tpc_config_disp_tables(struct ath10k *ar,
4704*4882a593Smuzhiyun struct wmi_pdev_tpc_config_event *ev,
4705*4882a593Smuzhiyun struct ath10k_tpc_stats *tpc_stats,
4706*4882a593Smuzhiyun u8 *rate_code, u16 *pream_table, u8 type)
4707*4882a593Smuzhiyun {
4708*4882a593Smuzhiyun u32 i, j, pream_idx, flags;
4709*4882a593Smuzhiyun u8 tpc[WMI_TPC_TX_N_CHAIN];
4710*4882a593Smuzhiyun char tpc_value[WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE];
4711*4882a593Smuzhiyun char buff[WMI_TPC_BUF_SIZE];
4712*4882a593Smuzhiyun
4713*4882a593Smuzhiyun flags = __le32_to_cpu(ev->flags);
4714*4882a593Smuzhiyun
4715*4882a593Smuzhiyun switch (type) {
4716*4882a593Smuzhiyun case WMI_TPC_TABLE_TYPE_CDD:
4717*4882a593Smuzhiyun if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_CDD)) {
4718*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI, "CDD not supported\n");
4719*4882a593Smuzhiyun tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
4720*4882a593Smuzhiyun return;
4721*4882a593Smuzhiyun }
4722*4882a593Smuzhiyun break;
4723*4882a593Smuzhiyun case WMI_TPC_TABLE_TYPE_STBC:
4724*4882a593Smuzhiyun if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_STBC)) {
4725*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI, "STBC not supported\n");
4726*4882a593Smuzhiyun tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
4727*4882a593Smuzhiyun return;
4728*4882a593Smuzhiyun }
4729*4882a593Smuzhiyun break;
4730*4882a593Smuzhiyun case WMI_TPC_TABLE_TYPE_TXBF:
4731*4882a593Smuzhiyun if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_TXBF)) {
4732*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI, "TXBF not supported\n");
4733*4882a593Smuzhiyun tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
4734*4882a593Smuzhiyun return;
4735*4882a593Smuzhiyun }
4736*4882a593Smuzhiyun break;
4737*4882a593Smuzhiyun default:
4738*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI,
4739*4882a593Smuzhiyun "invalid table type in wmi tpc event: %d\n", type);
4740*4882a593Smuzhiyun return;
4741*4882a593Smuzhiyun }
4742*4882a593Smuzhiyun
4743*4882a593Smuzhiyun pream_idx = 0;
4744*4882a593Smuzhiyun for (i = 0; i < tpc_stats->rate_max; i++) {
4745*4882a593Smuzhiyun memset(tpc_value, 0, sizeof(tpc_value));
4746*4882a593Smuzhiyun memset(buff, 0, sizeof(buff));
4747*4882a593Smuzhiyun if (i == pream_table[pream_idx])
4748*4882a593Smuzhiyun pream_idx++;
4749*4882a593Smuzhiyun
4750*4882a593Smuzhiyun for (j = 0; j < tpc_stats->num_tx_chain; j++) {
4751*4882a593Smuzhiyun tpc[j] = ath10k_tpc_config_get_rate(ar, ev, i, j + 1,
4752*4882a593Smuzhiyun rate_code[i],
4753*4882a593Smuzhiyun type);
4754*4882a593Smuzhiyun snprintf(buff, sizeof(buff), "%8d ", tpc[j]);
4755*4882a593Smuzhiyun strlcat(tpc_value, buff, sizeof(tpc_value));
4756*4882a593Smuzhiyun }
4757*4882a593Smuzhiyun tpc_stats->tpc_table[type].pream_idx[i] = pream_idx;
4758*4882a593Smuzhiyun tpc_stats->tpc_table[type].rate_code[i] = rate_code[i];
4759*4882a593Smuzhiyun memcpy(tpc_stats->tpc_table[type].tpc_value[i],
4760*4882a593Smuzhiyun tpc_value, sizeof(tpc_value));
4761*4882a593Smuzhiyun }
4762*4882a593Smuzhiyun }
4763*4882a593Smuzhiyun
ath10k_wmi_tpc_config_get_rate_code(u8 * rate_code,u16 * pream_table,u32 num_tx_chain)4764*4882a593Smuzhiyun void ath10k_wmi_tpc_config_get_rate_code(u8 *rate_code, u16 *pream_table,
4765*4882a593Smuzhiyun u32 num_tx_chain)
4766*4882a593Smuzhiyun {
4767*4882a593Smuzhiyun u32 i, j, pream_idx;
4768*4882a593Smuzhiyun u8 rate_idx;
4769*4882a593Smuzhiyun
4770*4882a593Smuzhiyun /* Create the rate code table based on the chains supported */
4771*4882a593Smuzhiyun rate_idx = 0;
4772*4882a593Smuzhiyun pream_idx = 0;
4773*4882a593Smuzhiyun
4774*4882a593Smuzhiyun /* Fill CCK rate code */
4775*4882a593Smuzhiyun for (i = 0; i < 4; i++) {
4776*4882a593Smuzhiyun rate_code[rate_idx] =
4777*4882a593Smuzhiyun ATH10K_HW_RATECODE(i, 0, WMI_RATE_PREAMBLE_CCK);
4778*4882a593Smuzhiyun rate_idx++;
4779*4882a593Smuzhiyun }
4780*4882a593Smuzhiyun pream_table[pream_idx] = rate_idx;
4781*4882a593Smuzhiyun pream_idx++;
4782*4882a593Smuzhiyun
4783*4882a593Smuzhiyun /* Fill OFDM rate code */
4784*4882a593Smuzhiyun for (i = 0; i < 8; i++) {
4785*4882a593Smuzhiyun rate_code[rate_idx] =
4786*4882a593Smuzhiyun ATH10K_HW_RATECODE(i, 0, WMI_RATE_PREAMBLE_OFDM);
4787*4882a593Smuzhiyun rate_idx++;
4788*4882a593Smuzhiyun }
4789*4882a593Smuzhiyun pream_table[pream_idx] = rate_idx;
4790*4882a593Smuzhiyun pream_idx++;
4791*4882a593Smuzhiyun
4792*4882a593Smuzhiyun /* Fill HT20 rate code */
4793*4882a593Smuzhiyun for (i = 0; i < num_tx_chain; i++) {
4794*4882a593Smuzhiyun for (j = 0; j < 8; j++) {
4795*4882a593Smuzhiyun rate_code[rate_idx] =
4796*4882a593Smuzhiyun ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_HT);
4797*4882a593Smuzhiyun rate_idx++;
4798*4882a593Smuzhiyun }
4799*4882a593Smuzhiyun }
4800*4882a593Smuzhiyun pream_table[pream_idx] = rate_idx;
4801*4882a593Smuzhiyun pream_idx++;
4802*4882a593Smuzhiyun
4803*4882a593Smuzhiyun /* Fill HT40 rate code */
4804*4882a593Smuzhiyun for (i = 0; i < num_tx_chain; i++) {
4805*4882a593Smuzhiyun for (j = 0; j < 8; j++) {
4806*4882a593Smuzhiyun rate_code[rate_idx] =
4807*4882a593Smuzhiyun ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_HT);
4808*4882a593Smuzhiyun rate_idx++;
4809*4882a593Smuzhiyun }
4810*4882a593Smuzhiyun }
4811*4882a593Smuzhiyun pream_table[pream_idx] = rate_idx;
4812*4882a593Smuzhiyun pream_idx++;
4813*4882a593Smuzhiyun
4814*4882a593Smuzhiyun /* Fill VHT20 rate code */
4815*4882a593Smuzhiyun for (i = 0; i < num_tx_chain; i++) {
4816*4882a593Smuzhiyun for (j = 0; j < 10; j++) {
4817*4882a593Smuzhiyun rate_code[rate_idx] =
4818*4882a593Smuzhiyun ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_VHT);
4819*4882a593Smuzhiyun rate_idx++;
4820*4882a593Smuzhiyun }
4821*4882a593Smuzhiyun }
4822*4882a593Smuzhiyun pream_table[pream_idx] = rate_idx;
4823*4882a593Smuzhiyun pream_idx++;
4824*4882a593Smuzhiyun
4825*4882a593Smuzhiyun /* Fill VHT40 rate code */
4826*4882a593Smuzhiyun for (i = 0; i < num_tx_chain; i++) {
4827*4882a593Smuzhiyun for (j = 0; j < 10; j++) {
4828*4882a593Smuzhiyun rate_code[rate_idx] =
4829*4882a593Smuzhiyun ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_VHT);
4830*4882a593Smuzhiyun rate_idx++;
4831*4882a593Smuzhiyun }
4832*4882a593Smuzhiyun }
4833*4882a593Smuzhiyun pream_table[pream_idx] = rate_idx;
4834*4882a593Smuzhiyun pream_idx++;
4835*4882a593Smuzhiyun
4836*4882a593Smuzhiyun /* Fill VHT80 rate code */
4837*4882a593Smuzhiyun for (i = 0; i < num_tx_chain; i++) {
4838*4882a593Smuzhiyun for (j = 0; j < 10; j++) {
4839*4882a593Smuzhiyun rate_code[rate_idx] =
4840*4882a593Smuzhiyun ATH10K_HW_RATECODE(j, i, WMI_RATE_PREAMBLE_VHT);
4841*4882a593Smuzhiyun rate_idx++;
4842*4882a593Smuzhiyun }
4843*4882a593Smuzhiyun }
4844*4882a593Smuzhiyun pream_table[pream_idx] = rate_idx;
4845*4882a593Smuzhiyun pream_idx++;
4846*4882a593Smuzhiyun
4847*4882a593Smuzhiyun rate_code[rate_idx++] =
4848*4882a593Smuzhiyun ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_CCK);
4849*4882a593Smuzhiyun rate_code[rate_idx++] =
4850*4882a593Smuzhiyun ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_OFDM);
4851*4882a593Smuzhiyun rate_code[rate_idx++] =
4852*4882a593Smuzhiyun ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_CCK);
4853*4882a593Smuzhiyun rate_code[rate_idx++] =
4854*4882a593Smuzhiyun ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_OFDM);
4855*4882a593Smuzhiyun rate_code[rate_idx++] =
4856*4882a593Smuzhiyun ATH10K_HW_RATECODE(0, 0, WMI_RATE_PREAMBLE_OFDM);
4857*4882a593Smuzhiyun
4858*4882a593Smuzhiyun pream_table[pream_idx] = ATH10K_TPC_PREAM_TABLE_END;
4859*4882a593Smuzhiyun }
4860*4882a593Smuzhiyun
ath10k_wmi_event_pdev_tpc_config(struct ath10k * ar,struct sk_buff * skb)4861*4882a593Smuzhiyun void ath10k_wmi_event_pdev_tpc_config(struct ath10k *ar, struct sk_buff *skb)
4862*4882a593Smuzhiyun {
4863*4882a593Smuzhiyun u32 num_tx_chain, rate_max;
4864*4882a593Smuzhiyun u8 rate_code[WMI_TPC_RATE_MAX];
4865*4882a593Smuzhiyun u16 pream_table[WMI_TPC_PREAM_TABLE_MAX];
4866*4882a593Smuzhiyun struct wmi_pdev_tpc_config_event *ev;
4867*4882a593Smuzhiyun struct ath10k_tpc_stats *tpc_stats;
4868*4882a593Smuzhiyun
4869*4882a593Smuzhiyun ev = (struct wmi_pdev_tpc_config_event *)skb->data;
4870*4882a593Smuzhiyun
4871*4882a593Smuzhiyun num_tx_chain = __le32_to_cpu(ev->num_tx_chain);
4872*4882a593Smuzhiyun
4873*4882a593Smuzhiyun if (num_tx_chain > WMI_TPC_TX_N_CHAIN) {
4874*4882a593Smuzhiyun ath10k_warn(ar, "number of tx chain is %d greater than TPC configured tx chain %d\n",
4875*4882a593Smuzhiyun num_tx_chain, WMI_TPC_TX_N_CHAIN);
4876*4882a593Smuzhiyun return;
4877*4882a593Smuzhiyun }
4878*4882a593Smuzhiyun
4879*4882a593Smuzhiyun rate_max = __le32_to_cpu(ev->rate_max);
4880*4882a593Smuzhiyun if (rate_max > WMI_TPC_RATE_MAX) {
4881*4882a593Smuzhiyun ath10k_warn(ar, "number of rate is %d greater than TPC configured rate %d\n",
4882*4882a593Smuzhiyun rate_max, WMI_TPC_RATE_MAX);
4883*4882a593Smuzhiyun rate_max = WMI_TPC_RATE_MAX;
4884*4882a593Smuzhiyun }
4885*4882a593Smuzhiyun
4886*4882a593Smuzhiyun tpc_stats = kzalloc(sizeof(*tpc_stats), GFP_ATOMIC);
4887*4882a593Smuzhiyun if (!tpc_stats)
4888*4882a593Smuzhiyun return;
4889*4882a593Smuzhiyun
4890*4882a593Smuzhiyun ath10k_wmi_tpc_config_get_rate_code(rate_code, pream_table,
4891*4882a593Smuzhiyun num_tx_chain);
4892*4882a593Smuzhiyun
4893*4882a593Smuzhiyun tpc_stats->chan_freq = __le32_to_cpu(ev->chan_freq);
4894*4882a593Smuzhiyun tpc_stats->phy_mode = __le32_to_cpu(ev->phy_mode);
4895*4882a593Smuzhiyun tpc_stats->ctl = __le32_to_cpu(ev->ctl);
4896*4882a593Smuzhiyun tpc_stats->reg_domain = __le32_to_cpu(ev->reg_domain);
4897*4882a593Smuzhiyun tpc_stats->twice_antenna_gain = a_sle32_to_cpu(ev->twice_antenna_gain);
4898*4882a593Smuzhiyun tpc_stats->twice_antenna_reduction =
4899*4882a593Smuzhiyun __le32_to_cpu(ev->twice_antenna_reduction);
4900*4882a593Smuzhiyun tpc_stats->power_limit = __le32_to_cpu(ev->power_limit);
4901*4882a593Smuzhiyun tpc_stats->twice_max_rd_power = __le32_to_cpu(ev->twice_max_rd_power);
4902*4882a593Smuzhiyun tpc_stats->num_tx_chain = num_tx_chain;
4903*4882a593Smuzhiyun tpc_stats->rate_max = rate_max;
4904*4882a593Smuzhiyun
4905*4882a593Smuzhiyun ath10k_tpc_config_disp_tables(ar, ev, tpc_stats,
4906*4882a593Smuzhiyun rate_code, pream_table,
4907*4882a593Smuzhiyun WMI_TPC_TABLE_TYPE_CDD);
4908*4882a593Smuzhiyun ath10k_tpc_config_disp_tables(ar, ev, tpc_stats,
4909*4882a593Smuzhiyun rate_code, pream_table,
4910*4882a593Smuzhiyun WMI_TPC_TABLE_TYPE_STBC);
4911*4882a593Smuzhiyun ath10k_tpc_config_disp_tables(ar, ev, tpc_stats,
4912*4882a593Smuzhiyun rate_code, pream_table,
4913*4882a593Smuzhiyun WMI_TPC_TABLE_TYPE_TXBF);
4914*4882a593Smuzhiyun
4915*4882a593Smuzhiyun ath10k_debug_tpc_stats_process(ar, tpc_stats);
4916*4882a593Smuzhiyun
4917*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI,
4918*4882a593Smuzhiyun "wmi event tpc config channel %d mode %d ctl %d regd %d gain %d %d limit %d max_power %d tx_chanins %d rates %d\n",
4919*4882a593Smuzhiyun __le32_to_cpu(ev->chan_freq),
4920*4882a593Smuzhiyun __le32_to_cpu(ev->phy_mode),
4921*4882a593Smuzhiyun __le32_to_cpu(ev->ctl),
4922*4882a593Smuzhiyun __le32_to_cpu(ev->reg_domain),
4923*4882a593Smuzhiyun a_sle32_to_cpu(ev->twice_antenna_gain),
4924*4882a593Smuzhiyun __le32_to_cpu(ev->twice_antenna_reduction),
4925*4882a593Smuzhiyun __le32_to_cpu(ev->power_limit),
4926*4882a593Smuzhiyun __le32_to_cpu(ev->twice_max_rd_power) / 2,
4927*4882a593Smuzhiyun __le32_to_cpu(ev->num_tx_chain),
4928*4882a593Smuzhiyun __le32_to_cpu(ev->rate_max));
4929*4882a593Smuzhiyun }
4930*4882a593Smuzhiyun
4931*4882a593Smuzhiyun static u8
ath10k_wmi_tpc_final_get_rate(struct ath10k * ar,struct wmi_pdev_tpc_final_table_event * ev,u32 rate_idx,u32 num_chains,u32 rate_code,u8 type,u32 pream_idx)4932*4882a593Smuzhiyun ath10k_wmi_tpc_final_get_rate(struct ath10k *ar,
4933*4882a593Smuzhiyun struct wmi_pdev_tpc_final_table_event *ev,
4934*4882a593Smuzhiyun u32 rate_idx, u32 num_chains,
4935*4882a593Smuzhiyun u32 rate_code, u8 type, u32 pream_idx)
4936*4882a593Smuzhiyun {
4937*4882a593Smuzhiyun u8 tpc, num_streams, preamble, ch, stm_idx;
4938*4882a593Smuzhiyun s8 pow_agcdd, pow_agstbc, pow_agtxbf;
4939*4882a593Smuzhiyun int pream;
4940*4882a593Smuzhiyun
4941*4882a593Smuzhiyun num_streams = ATH10K_HW_NSS(rate_code);
4942*4882a593Smuzhiyun preamble = ATH10K_HW_PREAMBLE(rate_code);
4943*4882a593Smuzhiyun ch = num_chains - 1;
4944*4882a593Smuzhiyun stm_idx = num_streams - 1;
4945*4882a593Smuzhiyun pream = -1;
4946*4882a593Smuzhiyun
4947*4882a593Smuzhiyun if (__le32_to_cpu(ev->chan_freq) <= 2483) {
4948*4882a593Smuzhiyun switch (pream_idx) {
4949*4882a593Smuzhiyun case WMI_TPC_PREAM_2GHZ_CCK:
4950*4882a593Smuzhiyun pream = 0;
4951*4882a593Smuzhiyun break;
4952*4882a593Smuzhiyun case WMI_TPC_PREAM_2GHZ_OFDM:
4953*4882a593Smuzhiyun pream = 1;
4954*4882a593Smuzhiyun break;
4955*4882a593Smuzhiyun case WMI_TPC_PREAM_2GHZ_HT20:
4956*4882a593Smuzhiyun case WMI_TPC_PREAM_2GHZ_VHT20:
4957*4882a593Smuzhiyun pream = 2;
4958*4882a593Smuzhiyun break;
4959*4882a593Smuzhiyun case WMI_TPC_PREAM_2GHZ_HT40:
4960*4882a593Smuzhiyun case WMI_TPC_PREAM_2GHZ_VHT40:
4961*4882a593Smuzhiyun pream = 3;
4962*4882a593Smuzhiyun break;
4963*4882a593Smuzhiyun case WMI_TPC_PREAM_2GHZ_VHT80:
4964*4882a593Smuzhiyun pream = 4;
4965*4882a593Smuzhiyun break;
4966*4882a593Smuzhiyun default:
4967*4882a593Smuzhiyun pream = -1;
4968*4882a593Smuzhiyun break;
4969*4882a593Smuzhiyun }
4970*4882a593Smuzhiyun }
4971*4882a593Smuzhiyun
4972*4882a593Smuzhiyun if (__le32_to_cpu(ev->chan_freq) >= 5180) {
4973*4882a593Smuzhiyun switch (pream_idx) {
4974*4882a593Smuzhiyun case WMI_TPC_PREAM_5GHZ_OFDM:
4975*4882a593Smuzhiyun pream = 0;
4976*4882a593Smuzhiyun break;
4977*4882a593Smuzhiyun case WMI_TPC_PREAM_5GHZ_HT20:
4978*4882a593Smuzhiyun case WMI_TPC_PREAM_5GHZ_VHT20:
4979*4882a593Smuzhiyun pream = 1;
4980*4882a593Smuzhiyun break;
4981*4882a593Smuzhiyun case WMI_TPC_PREAM_5GHZ_HT40:
4982*4882a593Smuzhiyun case WMI_TPC_PREAM_5GHZ_VHT40:
4983*4882a593Smuzhiyun pream = 2;
4984*4882a593Smuzhiyun break;
4985*4882a593Smuzhiyun case WMI_TPC_PREAM_5GHZ_VHT80:
4986*4882a593Smuzhiyun pream = 3;
4987*4882a593Smuzhiyun break;
4988*4882a593Smuzhiyun case WMI_TPC_PREAM_5GHZ_HTCUP:
4989*4882a593Smuzhiyun pream = 4;
4990*4882a593Smuzhiyun break;
4991*4882a593Smuzhiyun default:
4992*4882a593Smuzhiyun pream = -1;
4993*4882a593Smuzhiyun break;
4994*4882a593Smuzhiyun }
4995*4882a593Smuzhiyun }
4996*4882a593Smuzhiyun
4997*4882a593Smuzhiyun if (pream == -1) {
4998*4882a593Smuzhiyun ath10k_warn(ar, "unknown wmi tpc final index and frequency: %u, %u\n",
4999*4882a593Smuzhiyun pream_idx, __le32_to_cpu(ev->chan_freq));
5000*4882a593Smuzhiyun tpc = 0;
5001*4882a593Smuzhiyun goto out;
5002*4882a593Smuzhiyun }
5003*4882a593Smuzhiyun
5004*4882a593Smuzhiyun if (pream == 4)
5005*4882a593Smuzhiyun tpc = min_t(u8, ev->rates_array[rate_idx],
5006*4882a593Smuzhiyun ev->max_reg_allow_pow[ch]);
5007*4882a593Smuzhiyun else
5008*4882a593Smuzhiyun tpc = min_t(u8, min_t(u8, ev->rates_array[rate_idx],
5009*4882a593Smuzhiyun ev->max_reg_allow_pow[ch]),
5010*4882a593Smuzhiyun ev->ctl_power_table[0][pream][stm_idx]);
5011*4882a593Smuzhiyun
5012*4882a593Smuzhiyun if (__le32_to_cpu(ev->num_tx_chain) <= 1)
5013*4882a593Smuzhiyun goto out;
5014*4882a593Smuzhiyun
5015*4882a593Smuzhiyun if (preamble == WMI_RATE_PREAMBLE_CCK)
5016*4882a593Smuzhiyun goto out;
5017*4882a593Smuzhiyun
5018*4882a593Smuzhiyun if (num_chains <= num_streams)
5019*4882a593Smuzhiyun goto out;
5020*4882a593Smuzhiyun
5021*4882a593Smuzhiyun switch (type) {
5022*4882a593Smuzhiyun case WMI_TPC_TABLE_TYPE_STBC:
5023*4882a593Smuzhiyun pow_agstbc = ev->max_reg_allow_pow_agstbc[ch - 1][stm_idx];
5024*4882a593Smuzhiyun if (pream == 4)
5025*4882a593Smuzhiyun tpc = min_t(u8, tpc, pow_agstbc);
5026*4882a593Smuzhiyun else
5027*4882a593Smuzhiyun tpc = min_t(u8, min_t(u8, tpc, pow_agstbc),
5028*4882a593Smuzhiyun ev->ctl_power_table[0][pream][stm_idx]);
5029*4882a593Smuzhiyun break;
5030*4882a593Smuzhiyun case WMI_TPC_TABLE_TYPE_TXBF:
5031*4882a593Smuzhiyun pow_agtxbf = ev->max_reg_allow_pow_agtxbf[ch - 1][stm_idx];
5032*4882a593Smuzhiyun if (pream == 4)
5033*4882a593Smuzhiyun tpc = min_t(u8, tpc, pow_agtxbf);
5034*4882a593Smuzhiyun else
5035*4882a593Smuzhiyun tpc = min_t(u8, min_t(u8, tpc, pow_agtxbf),
5036*4882a593Smuzhiyun ev->ctl_power_table[1][pream][stm_idx]);
5037*4882a593Smuzhiyun break;
5038*4882a593Smuzhiyun case WMI_TPC_TABLE_TYPE_CDD:
5039*4882a593Smuzhiyun pow_agcdd = ev->max_reg_allow_pow_agcdd[ch - 1][stm_idx];
5040*4882a593Smuzhiyun if (pream == 4)
5041*4882a593Smuzhiyun tpc = min_t(u8, tpc, pow_agcdd);
5042*4882a593Smuzhiyun else
5043*4882a593Smuzhiyun tpc = min_t(u8, min_t(u8, tpc, pow_agcdd),
5044*4882a593Smuzhiyun ev->ctl_power_table[0][pream][stm_idx]);
5045*4882a593Smuzhiyun break;
5046*4882a593Smuzhiyun default:
5047*4882a593Smuzhiyun ath10k_warn(ar, "unknown wmi tpc final table type: %d\n", type);
5048*4882a593Smuzhiyun tpc = 0;
5049*4882a593Smuzhiyun break;
5050*4882a593Smuzhiyun }
5051*4882a593Smuzhiyun
5052*4882a593Smuzhiyun out:
5053*4882a593Smuzhiyun return tpc;
5054*4882a593Smuzhiyun }
5055*4882a593Smuzhiyun
5056*4882a593Smuzhiyun static void
ath10k_wmi_tpc_stats_final_disp_tables(struct ath10k * ar,struct wmi_pdev_tpc_final_table_event * ev,struct ath10k_tpc_stats_final * tpc_stats,u8 * rate_code,u16 * pream_table,u8 type)5057*4882a593Smuzhiyun ath10k_wmi_tpc_stats_final_disp_tables(struct ath10k *ar,
5058*4882a593Smuzhiyun struct wmi_pdev_tpc_final_table_event *ev,
5059*4882a593Smuzhiyun struct ath10k_tpc_stats_final *tpc_stats,
5060*4882a593Smuzhiyun u8 *rate_code, u16 *pream_table, u8 type)
5061*4882a593Smuzhiyun {
5062*4882a593Smuzhiyun u32 i, j, pream_idx, flags;
5063*4882a593Smuzhiyun u8 tpc[WMI_TPC_TX_N_CHAIN];
5064*4882a593Smuzhiyun char tpc_value[WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE];
5065*4882a593Smuzhiyun char buff[WMI_TPC_BUF_SIZE];
5066*4882a593Smuzhiyun
5067*4882a593Smuzhiyun flags = __le32_to_cpu(ev->flags);
5068*4882a593Smuzhiyun
5069*4882a593Smuzhiyun switch (type) {
5070*4882a593Smuzhiyun case WMI_TPC_TABLE_TYPE_CDD:
5071*4882a593Smuzhiyun if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_CDD)) {
5072*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI, "CDD not supported\n");
5073*4882a593Smuzhiyun tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
5074*4882a593Smuzhiyun return;
5075*4882a593Smuzhiyun }
5076*4882a593Smuzhiyun break;
5077*4882a593Smuzhiyun case WMI_TPC_TABLE_TYPE_STBC:
5078*4882a593Smuzhiyun if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_STBC)) {
5079*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI, "STBC not supported\n");
5080*4882a593Smuzhiyun tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
5081*4882a593Smuzhiyun return;
5082*4882a593Smuzhiyun }
5083*4882a593Smuzhiyun break;
5084*4882a593Smuzhiyun case WMI_TPC_TABLE_TYPE_TXBF:
5085*4882a593Smuzhiyun if (!(flags & WMI_TPC_CONFIG_EVENT_FLAG_TABLE_TXBF)) {
5086*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI, "TXBF not supported\n");
5087*4882a593Smuzhiyun tpc_stats->flag[type] = ATH10K_TPC_TABLE_TYPE_FLAG;
5088*4882a593Smuzhiyun return;
5089*4882a593Smuzhiyun }
5090*4882a593Smuzhiyun break;
5091*4882a593Smuzhiyun default:
5092*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI,
5093*4882a593Smuzhiyun "invalid table type in wmi tpc event: %d\n", type);
5094*4882a593Smuzhiyun return;
5095*4882a593Smuzhiyun }
5096*4882a593Smuzhiyun
5097*4882a593Smuzhiyun pream_idx = 0;
5098*4882a593Smuzhiyun for (i = 0; i < tpc_stats->rate_max; i++) {
5099*4882a593Smuzhiyun memset(tpc_value, 0, sizeof(tpc_value));
5100*4882a593Smuzhiyun memset(buff, 0, sizeof(buff));
5101*4882a593Smuzhiyun if (i == pream_table[pream_idx])
5102*4882a593Smuzhiyun pream_idx++;
5103*4882a593Smuzhiyun
5104*4882a593Smuzhiyun for (j = 0; j < tpc_stats->num_tx_chain; j++) {
5105*4882a593Smuzhiyun tpc[j] = ath10k_wmi_tpc_final_get_rate(ar, ev, i, j + 1,
5106*4882a593Smuzhiyun rate_code[i],
5107*4882a593Smuzhiyun type, pream_idx);
5108*4882a593Smuzhiyun snprintf(buff, sizeof(buff), "%8d ", tpc[j]);
5109*4882a593Smuzhiyun strlcat(tpc_value, buff, sizeof(tpc_value));
5110*4882a593Smuzhiyun }
5111*4882a593Smuzhiyun tpc_stats->tpc_table_final[type].pream_idx[i] = pream_idx;
5112*4882a593Smuzhiyun tpc_stats->tpc_table_final[type].rate_code[i] = rate_code[i];
5113*4882a593Smuzhiyun memcpy(tpc_stats->tpc_table_final[type].tpc_value[i],
5114*4882a593Smuzhiyun tpc_value, sizeof(tpc_value));
5115*4882a593Smuzhiyun }
5116*4882a593Smuzhiyun }
5117*4882a593Smuzhiyun
ath10k_wmi_event_tpc_final_table(struct ath10k * ar,struct sk_buff * skb)5118*4882a593Smuzhiyun void ath10k_wmi_event_tpc_final_table(struct ath10k *ar, struct sk_buff *skb)
5119*4882a593Smuzhiyun {
5120*4882a593Smuzhiyun u32 num_tx_chain, rate_max;
5121*4882a593Smuzhiyun u8 rate_code[WMI_TPC_FINAL_RATE_MAX];
5122*4882a593Smuzhiyun u16 pream_table[WMI_TPC_PREAM_TABLE_MAX];
5123*4882a593Smuzhiyun struct wmi_pdev_tpc_final_table_event *ev;
5124*4882a593Smuzhiyun struct ath10k_tpc_stats_final *tpc_stats;
5125*4882a593Smuzhiyun
5126*4882a593Smuzhiyun ev = (struct wmi_pdev_tpc_final_table_event *)skb->data;
5127*4882a593Smuzhiyun
5128*4882a593Smuzhiyun num_tx_chain = __le32_to_cpu(ev->num_tx_chain);
5129*4882a593Smuzhiyun if (num_tx_chain > WMI_TPC_TX_N_CHAIN) {
5130*4882a593Smuzhiyun ath10k_warn(ar, "number of tx chain is %d greater than TPC final configured tx chain %d\n",
5131*4882a593Smuzhiyun num_tx_chain, WMI_TPC_TX_N_CHAIN);
5132*4882a593Smuzhiyun return;
5133*4882a593Smuzhiyun }
5134*4882a593Smuzhiyun
5135*4882a593Smuzhiyun rate_max = __le32_to_cpu(ev->rate_max);
5136*4882a593Smuzhiyun if (rate_max > WMI_TPC_FINAL_RATE_MAX) {
5137*4882a593Smuzhiyun ath10k_warn(ar, "number of rate is %d greater than TPC final configured rate %d\n",
5138*4882a593Smuzhiyun rate_max, WMI_TPC_FINAL_RATE_MAX);
5139*4882a593Smuzhiyun rate_max = WMI_TPC_FINAL_RATE_MAX;
5140*4882a593Smuzhiyun }
5141*4882a593Smuzhiyun
5142*4882a593Smuzhiyun tpc_stats = kzalloc(sizeof(*tpc_stats), GFP_ATOMIC);
5143*4882a593Smuzhiyun if (!tpc_stats)
5144*4882a593Smuzhiyun return;
5145*4882a593Smuzhiyun
5146*4882a593Smuzhiyun ath10k_wmi_tpc_config_get_rate_code(rate_code, pream_table,
5147*4882a593Smuzhiyun num_tx_chain);
5148*4882a593Smuzhiyun
5149*4882a593Smuzhiyun tpc_stats->chan_freq = __le32_to_cpu(ev->chan_freq);
5150*4882a593Smuzhiyun tpc_stats->phy_mode = __le32_to_cpu(ev->phy_mode);
5151*4882a593Smuzhiyun tpc_stats->ctl = __le32_to_cpu(ev->ctl);
5152*4882a593Smuzhiyun tpc_stats->reg_domain = __le32_to_cpu(ev->reg_domain);
5153*4882a593Smuzhiyun tpc_stats->twice_antenna_gain = a_sle32_to_cpu(ev->twice_antenna_gain);
5154*4882a593Smuzhiyun tpc_stats->twice_antenna_reduction =
5155*4882a593Smuzhiyun __le32_to_cpu(ev->twice_antenna_reduction);
5156*4882a593Smuzhiyun tpc_stats->power_limit = __le32_to_cpu(ev->power_limit);
5157*4882a593Smuzhiyun tpc_stats->twice_max_rd_power = __le32_to_cpu(ev->twice_max_rd_power);
5158*4882a593Smuzhiyun tpc_stats->num_tx_chain = num_tx_chain;
5159*4882a593Smuzhiyun tpc_stats->rate_max = rate_max;
5160*4882a593Smuzhiyun
5161*4882a593Smuzhiyun ath10k_wmi_tpc_stats_final_disp_tables(ar, ev, tpc_stats,
5162*4882a593Smuzhiyun rate_code, pream_table,
5163*4882a593Smuzhiyun WMI_TPC_TABLE_TYPE_CDD);
5164*4882a593Smuzhiyun ath10k_wmi_tpc_stats_final_disp_tables(ar, ev, tpc_stats,
5165*4882a593Smuzhiyun rate_code, pream_table,
5166*4882a593Smuzhiyun WMI_TPC_TABLE_TYPE_STBC);
5167*4882a593Smuzhiyun ath10k_wmi_tpc_stats_final_disp_tables(ar, ev, tpc_stats,
5168*4882a593Smuzhiyun rate_code, pream_table,
5169*4882a593Smuzhiyun WMI_TPC_TABLE_TYPE_TXBF);
5170*4882a593Smuzhiyun
5171*4882a593Smuzhiyun ath10k_debug_tpc_stats_final_process(ar, tpc_stats);
5172*4882a593Smuzhiyun
5173*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI,
5174*4882a593Smuzhiyun "wmi event tpc final table channel %d mode %d ctl %d regd %d gain %d %d limit %d max_power %d tx_chanins %d rates %d\n",
5175*4882a593Smuzhiyun __le32_to_cpu(ev->chan_freq),
5176*4882a593Smuzhiyun __le32_to_cpu(ev->phy_mode),
5177*4882a593Smuzhiyun __le32_to_cpu(ev->ctl),
5178*4882a593Smuzhiyun __le32_to_cpu(ev->reg_domain),
5179*4882a593Smuzhiyun a_sle32_to_cpu(ev->twice_antenna_gain),
5180*4882a593Smuzhiyun __le32_to_cpu(ev->twice_antenna_reduction),
5181*4882a593Smuzhiyun __le32_to_cpu(ev->power_limit),
5182*4882a593Smuzhiyun __le32_to_cpu(ev->twice_max_rd_power) / 2,
5183*4882a593Smuzhiyun __le32_to_cpu(ev->num_tx_chain),
5184*4882a593Smuzhiyun __le32_to_cpu(ev->rate_max));
5185*4882a593Smuzhiyun }
5186*4882a593Smuzhiyun
5187*4882a593Smuzhiyun static void
ath10k_wmi_handle_tdls_peer_event(struct ath10k * ar,struct sk_buff * skb)5188*4882a593Smuzhiyun ath10k_wmi_handle_tdls_peer_event(struct ath10k *ar, struct sk_buff *skb)
5189*4882a593Smuzhiyun {
5190*4882a593Smuzhiyun struct wmi_tdls_peer_event *ev;
5191*4882a593Smuzhiyun struct ath10k_peer *peer;
5192*4882a593Smuzhiyun struct ath10k_vif *arvif;
5193*4882a593Smuzhiyun int vdev_id;
5194*4882a593Smuzhiyun int peer_status;
5195*4882a593Smuzhiyun int peer_reason;
5196*4882a593Smuzhiyun u8 reason;
5197*4882a593Smuzhiyun
5198*4882a593Smuzhiyun if (skb->len < sizeof(*ev)) {
5199*4882a593Smuzhiyun ath10k_err(ar, "received tdls peer event with invalid size (%d bytes)\n",
5200*4882a593Smuzhiyun skb->len);
5201*4882a593Smuzhiyun return;
5202*4882a593Smuzhiyun }
5203*4882a593Smuzhiyun
5204*4882a593Smuzhiyun ev = (struct wmi_tdls_peer_event *)skb->data;
5205*4882a593Smuzhiyun vdev_id = __le32_to_cpu(ev->vdev_id);
5206*4882a593Smuzhiyun peer_status = __le32_to_cpu(ev->peer_status);
5207*4882a593Smuzhiyun peer_reason = __le32_to_cpu(ev->peer_reason);
5208*4882a593Smuzhiyun
5209*4882a593Smuzhiyun spin_lock_bh(&ar->data_lock);
5210*4882a593Smuzhiyun peer = ath10k_peer_find(ar, vdev_id, ev->peer_macaddr.addr);
5211*4882a593Smuzhiyun spin_unlock_bh(&ar->data_lock);
5212*4882a593Smuzhiyun
5213*4882a593Smuzhiyun if (!peer) {
5214*4882a593Smuzhiyun ath10k_warn(ar, "failed to find peer entry for %pM\n",
5215*4882a593Smuzhiyun ev->peer_macaddr.addr);
5216*4882a593Smuzhiyun return;
5217*4882a593Smuzhiyun }
5218*4882a593Smuzhiyun
5219*4882a593Smuzhiyun switch (peer_status) {
5220*4882a593Smuzhiyun case WMI_TDLS_SHOULD_TEARDOWN:
5221*4882a593Smuzhiyun switch (peer_reason) {
5222*4882a593Smuzhiyun case WMI_TDLS_TEARDOWN_REASON_PTR_TIMEOUT:
5223*4882a593Smuzhiyun case WMI_TDLS_TEARDOWN_REASON_NO_RESPONSE:
5224*4882a593Smuzhiyun case WMI_TDLS_TEARDOWN_REASON_RSSI:
5225*4882a593Smuzhiyun reason = WLAN_REASON_TDLS_TEARDOWN_UNREACHABLE;
5226*4882a593Smuzhiyun break;
5227*4882a593Smuzhiyun default:
5228*4882a593Smuzhiyun reason = WLAN_REASON_TDLS_TEARDOWN_UNSPECIFIED;
5229*4882a593Smuzhiyun break;
5230*4882a593Smuzhiyun }
5231*4882a593Smuzhiyun
5232*4882a593Smuzhiyun arvif = ath10k_get_arvif(ar, vdev_id);
5233*4882a593Smuzhiyun if (!arvif) {
5234*4882a593Smuzhiyun ath10k_warn(ar, "received tdls peer event for invalid vdev id %u\n",
5235*4882a593Smuzhiyun vdev_id);
5236*4882a593Smuzhiyun return;
5237*4882a593Smuzhiyun }
5238*4882a593Smuzhiyun
5239*4882a593Smuzhiyun ieee80211_tdls_oper_request(arvif->vif, ev->peer_macaddr.addr,
5240*4882a593Smuzhiyun NL80211_TDLS_TEARDOWN, reason,
5241*4882a593Smuzhiyun GFP_ATOMIC);
5242*4882a593Smuzhiyun
5243*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI,
5244*4882a593Smuzhiyun "received tdls teardown event for peer %pM reason %u\n",
5245*4882a593Smuzhiyun ev->peer_macaddr.addr, peer_reason);
5246*4882a593Smuzhiyun break;
5247*4882a593Smuzhiyun default:
5248*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI,
5249*4882a593Smuzhiyun "received unknown tdls peer event %u\n",
5250*4882a593Smuzhiyun peer_status);
5251*4882a593Smuzhiyun break;
5252*4882a593Smuzhiyun }
5253*4882a593Smuzhiyun }
5254*4882a593Smuzhiyun
5255*4882a593Smuzhiyun static void
ath10k_wmi_event_peer_sta_ps_state_chg(struct ath10k * ar,struct sk_buff * skb)5256*4882a593Smuzhiyun ath10k_wmi_event_peer_sta_ps_state_chg(struct ath10k *ar, struct sk_buff *skb)
5257*4882a593Smuzhiyun {
5258*4882a593Smuzhiyun struct wmi_peer_sta_ps_state_chg_event *ev;
5259*4882a593Smuzhiyun struct ieee80211_sta *sta;
5260*4882a593Smuzhiyun struct ath10k_sta *arsta;
5261*4882a593Smuzhiyun u8 peer_addr[ETH_ALEN];
5262*4882a593Smuzhiyun
5263*4882a593Smuzhiyun lockdep_assert_held(&ar->data_lock);
5264*4882a593Smuzhiyun
5265*4882a593Smuzhiyun ev = (struct wmi_peer_sta_ps_state_chg_event *)skb->data;
5266*4882a593Smuzhiyun ether_addr_copy(peer_addr, ev->peer_macaddr.addr);
5267*4882a593Smuzhiyun
5268*4882a593Smuzhiyun rcu_read_lock();
5269*4882a593Smuzhiyun
5270*4882a593Smuzhiyun sta = ieee80211_find_sta_by_ifaddr(ar->hw, peer_addr, NULL);
5271*4882a593Smuzhiyun
5272*4882a593Smuzhiyun if (!sta) {
5273*4882a593Smuzhiyun ath10k_warn(ar, "failed to find station entry %pM\n",
5274*4882a593Smuzhiyun peer_addr);
5275*4882a593Smuzhiyun goto exit;
5276*4882a593Smuzhiyun }
5277*4882a593Smuzhiyun
5278*4882a593Smuzhiyun arsta = (struct ath10k_sta *)sta->drv_priv;
5279*4882a593Smuzhiyun arsta->peer_ps_state = __le32_to_cpu(ev->peer_ps_state);
5280*4882a593Smuzhiyun
5281*4882a593Smuzhiyun exit:
5282*4882a593Smuzhiyun rcu_read_unlock();
5283*4882a593Smuzhiyun }
5284*4882a593Smuzhiyun
ath10k_wmi_event_pdev_ftm_intg(struct ath10k * ar,struct sk_buff * skb)5285*4882a593Smuzhiyun void ath10k_wmi_event_pdev_ftm_intg(struct ath10k *ar, struct sk_buff *skb)
5286*4882a593Smuzhiyun {
5287*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_FTM_INTG_EVENTID\n");
5288*4882a593Smuzhiyun }
5289*4882a593Smuzhiyun
ath10k_wmi_event_gtk_offload_status(struct ath10k * ar,struct sk_buff * skb)5290*4882a593Smuzhiyun void ath10k_wmi_event_gtk_offload_status(struct ath10k *ar, struct sk_buff *skb)
5291*4882a593Smuzhiyun {
5292*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_OFFLOAD_STATUS_EVENTID\n");
5293*4882a593Smuzhiyun }
5294*4882a593Smuzhiyun
ath10k_wmi_event_gtk_rekey_fail(struct ath10k * ar,struct sk_buff * skb)5295*4882a593Smuzhiyun void ath10k_wmi_event_gtk_rekey_fail(struct ath10k *ar, struct sk_buff *skb)
5296*4882a593Smuzhiyun {
5297*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_REKEY_FAIL_EVENTID\n");
5298*4882a593Smuzhiyun }
5299*4882a593Smuzhiyun
ath10k_wmi_event_delba_complete(struct ath10k * ar,struct sk_buff * skb)5300*4882a593Smuzhiyun void ath10k_wmi_event_delba_complete(struct ath10k *ar, struct sk_buff *skb)
5301*4882a593Smuzhiyun {
5302*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_DELBA_COMPLETE_EVENTID\n");
5303*4882a593Smuzhiyun }
5304*4882a593Smuzhiyun
ath10k_wmi_event_addba_complete(struct ath10k * ar,struct sk_buff * skb)5305*4882a593Smuzhiyun void ath10k_wmi_event_addba_complete(struct ath10k *ar, struct sk_buff *skb)
5306*4882a593Smuzhiyun {
5307*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_ADDBA_COMPLETE_EVENTID\n");
5308*4882a593Smuzhiyun }
5309*4882a593Smuzhiyun
ath10k_wmi_event_vdev_install_key_complete(struct ath10k * ar,struct sk_buff * skb)5310*4882a593Smuzhiyun void ath10k_wmi_event_vdev_install_key_complete(struct ath10k *ar,
5311*4882a593Smuzhiyun struct sk_buff *skb)
5312*4882a593Smuzhiyun {
5313*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID\n");
5314*4882a593Smuzhiyun }
5315*4882a593Smuzhiyun
ath10k_wmi_event_inst_rssi_stats(struct ath10k * ar,struct sk_buff * skb)5316*4882a593Smuzhiyun void ath10k_wmi_event_inst_rssi_stats(struct ath10k *ar, struct sk_buff *skb)
5317*4882a593Smuzhiyun {
5318*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_INST_RSSI_STATS_EVENTID\n");
5319*4882a593Smuzhiyun }
5320*4882a593Smuzhiyun
ath10k_wmi_event_vdev_standby_req(struct ath10k * ar,struct sk_buff * skb)5321*4882a593Smuzhiyun void ath10k_wmi_event_vdev_standby_req(struct ath10k *ar, struct sk_buff *skb)
5322*4882a593Smuzhiyun {
5323*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STANDBY_REQ_EVENTID\n");
5324*4882a593Smuzhiyun }
5325*4882a593Smuzhiyun
ath10k_wmi_event_vdev_resume_req(struct ath10k * ar,struct sk_buff * skb)5326*4882a593Smuzhiyun void ath10k_wmi_event_vdev_resume_req(struct ath10k *ar, struct sk_buff *skb)
5327*4882a593Smuzhiyun {
5328*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_RESUME_REQ_EVENTID\n");
5329*4882a593Smuzhiyun }
5330*4882a593Smuzhiyun
ath10k_wmi_alloc_chunk(struct ath10k * ar,u32 req_id,u32 num_units,u32 unit_len)5331*4882a593Smuzhiyun static int ath10k_wmi_alloc_chunk(struct ath10k *ar, u32 req_id,
5332*4882a593Smuzhiyun u32 num_units, u32 unit_len)
5333*4882a593Smuzhiyun {
5334*4882a593Smuzhiyun dma_addr_t paddr;
5335*4882a593Smuzhiyun u32 pool_size;
5336*4882a593Smuzhiyun int idx = ar->wmi.num_mem_chunks;
5337*4882a593Smuzhiyun void *vaddr;
5338*4882a593Smuzhiyun
5339*4882a593Smuzhiyun pool_size = num_units * round_up(unit_len, 4);
5340*4882a593Smuzhiyun vaddr = dma_alloc_coherent(ar->dev, pool_size, &paddr, GFP_KERNEL);
5341*4882a593Smuzhiyun
5342*4882a593Smuzhiyun if (!vaddr)
5343*4882a593Smuzhiyun return -ENOMEM;
5344*4882a593Smuzhiyun
5345*4882a593Smuzhiyun ar->wmi.mem_chunks[idx].vaddr = vaddr;
5346*4882a593Smuzhiyun ar->wmi.mem_chunks[idx].paddr = paddr;
5347*4882a593Smuzhiyun ar->wmi.mem_chunks[idx].len = pool_size;
5348*4882a593Smuzhiyun ar->wmi.mem_chunks[idx].req_id = req_id;
5349*4882a593Smuzhiyun ar->wmi.num_mem_chunks++;
5350*4882a593Smuzhiyun
5351*4882a593Smuzhiyun return num_units;
5352*4882a593Smuzhiyun }
5353*4882a593Smuzhiyun
ath10k_wmi_alloc_host_mem(struct ath10k * ar,u32 req_id,u32 num_units,u32 unit_len)5354*4882a593Smuzhiyun static int ath10k_wmi_alloc_host_mem(struct ath10k *ar, u32 req_id,
5355*4882a593Smuzhiyun u32 num_units, u32 unit_len)
5356*4882a593Smuzhiyun {
5357*4882a593Smuzhiyun int ret;
5358*4882a593Smuzhiyun
5359*4882a593Smuzhiyun while (num_units) {
5360*4882a593Smuzhiyun ret = ath10k_wmi_alloc_chunk(ar, req_id, num_units, unit_len);
5361*4882a593Smuzhiyun if (ret < 0)
5362*4882a593Smuzhiyun return ret;
5363*4882a593Smuzhiyun
5364*4882a593Smuzhiyun num_units -= ret;
5365*4882a593Smuzhiyun }
5366*4882a593Smuzhiyun
5367*4882a593Smuzhiyun return 0;
5368*4882a593Smuzhiyun }
5369*4882a593Smuzhiyun
5370*4882a593Smuzhiyun static bool
ath10k_wmi_is_host_mem_allocated(struct ath10k * ar,const struct wlan_host_mem_req ** mem_reqs,u32 num_mem_reqs)5371*4882a593Smuzhiyun ath10k_wmi_is_host_mem_allocated(struct ath10k *ar,
5372*4882a593Smuzhiyun const struct wlan_host_mem_req **mem_reqs,
5373*4882a593Smuzhiyun u32 num_mem_reqs)
5374*4882a593Smuzhiyun {
5375*4882a593Smuzhiyun u32 req_id, num_units, unit_size, num_unit_info;
5376*4882a593Smuzhiyun u32 pool_size;
5377*4882a593Smuzhiyun int i, j;
5378*4882a593Smuzhiyun bool found;
5379*4882a593Smuzhiyun
5380*4882a593Smuzhiyun if (ar->wmi.num_mem_chunks != num_mem_reqs)
5381*4882a593Smuzhiyun return false;
5382*4882a593Smuzhiyun
5383*4882a593Smuzhiyun for (i = 0; i < num_mem_reqs; ++i) {
5384*4882a593Smuzhiyun req_id = __le32_to_cpu(mem_reqs[i]->req_id);
5385*4882a593Smuzhiyun num_units = __le32_to_cpu(mem_reqs[i]->num_units);
5386*4882a593Smuzhiyun unit_size = __le32_to_cpu(mem_reqs[i]->unit_size);
5387*4882a593Smuzhiyun num_unit_info = __le32_to_cpu(mem_reqs[i]->num_unit_info);
5388*4882a593Smuzhiyun
5389*4882a593Smuzhiyun if (num_unit_info & NUM_UNITS_IS_NUM_ACTIVE_PEERS) {
5390*4882a593Smuzhiyun if (ar->num_active_peers)
5391*4882a593Smuzhiyun num_units = ar->num_active_peers + 1;
5392*4882a593Smuzhiyun else
5393*4882a593Smuzhiyun num_units = ar->max_num_peers + 1;
5394*4882a593Smuzhiyun } else if (num_unit_info & NUM_UNITS_IS_NUM_PEERS) {
5395*4882a593Smuzhiyun num_units = ar->max_num_peers + 1;
5396*4882a593Smuzhiyun } else if (num_unit_info & NUM_UNITS_IS_NUM_VDEVS) {
5397*4882a593Smuzhiyun num_units = ar->max_num_vdevs + 1;
5398*4882a593Smuzhiyun }
5399*4882a593Smuzhiyun
5400*4882a593Smuzhiyun found = false;
5401*4882a593Smuzhiyun for (j = 0; j < ar->wmi.num_mem_chunks; j++) {
5402*4882a593Smuzhiyun if (ar->wmi.mem_chunks[j].req_id == req_id) {
5403*4882a593Smuzhiyun pool_size = num_units * round_up(unit_size, 4);
5404*4882a593Smuzhiyun if (ar->wmi.mem_chunks[j].len == pool_size) {
5405*4882a593Smuzhiyun found = true;
5406*4882a593Smuzhiyun break;
5407*4882a593Smuzhiyun }
5408*4882a593Smuzhiyun }
5409*4882a593Smuzhiyun }
5410*4882a593Smuzhiyun if (!found)
5411*4882a593Smuzhiyun return false;
5412*4882a593Smuzhiyun }
5413*4882a593Smuzhiyun
5414*4882a593Smuzhiyun return true;
5415*4882a593Smuzhiyun }
5416*4882a593Smuzhiyun
5417*4882a593Smuzhiyun static int
ath10k_wmi_main_op_pull_svc_rdy_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_svc_rdy_ev_arg * arg)5418*4882a593Smuzhiyun ath10k_wmi_main_op_pull_svc_rdy_ev(struct ath10k *ar, struct sk_buff *skb,
5419*4882a593Smuzhiyun struct wmi_svc_rdy_ev_arg *arg)
5420*4882a593Smuzhiyun {
5421*4882a593Smuzhiyun struct wmi_service_ready_event *ev;
5422*4882a593Smuzhiyun size_t i, n;
5423*4882a593Smuzhiyun
5424*4882a593Smuzhiyun if (skb->len < sizeof(*ev))
5425*4882a593Smuzhiyun return -EPROTO;
5426*4882a593Smuzhiyun
5427*4882a593Smuzhiyun ev = (void *)skb->data;
5428*4882a593Smuzhiyun skb_pull(skb, sizeof(*ev));
5429*4882a593Smuzhiyun arg->min_tx_power = ev->hw_min_tx_power;
5430*4882a593Smuzhiyun arg->max_tx_power = ev->hw_max_tx_power;
5431*4882a593Smuzhiyun arg->ht_cap = ev->ht_cap_info;
5432*4882a593Smuzhiyun arg->vht_cap = ev->vht_cap_info;
5433*4882a593Smuzhiyun arg->vht_supp_mcs = ev->vht_supp_mcs;
5434*4882a593Smuzhiyun arg->sw_ver0 = ev->sw_version;
5435*4882a593Smuzhiyun arg->sw_ver1 = ev->sw_version_1;
5436*4882a593Smuzhiyun arg->phy_capab = ev->phy_capability;
5437*4882a593Smuzhiyun arg->num_rf_chains = ev->num_rf_chains;
5438*4882a593Smuzhiyun arg->eeprom_rd = ev->hal_reg_capabilities.eeprom_rd;
5439*4882a593Smuzhiyun arg->low_2ghz_chan = ev->hal_reg_capabilities.low_2ghz_chan;
5440*4882a593Smuzhiyun arg->high_2ghz_chan = ev->hal_reg_capabilities.high_2ghz_chan;
5441*4882a593Smuzhiyun arg->low_5ghz_chan = ev->hal_reg_capabilities.low_5ghz_chan;
5442*4882a593Smuzhiyun arg->high_5ghz_chan = ev->hal_reg_capabilities.high_5ghz_chan;
5443*4882a593Smuzhiyun arg->num_mem_reqs = ev->num_mem_reqs;
5444*4882a593Smuzhiyun arg->service_map = ev->wmi_service_bitmap;
5445*4882a593Smuzhiyun arg->service_map_len = sizeof(ev->wmi_service_bitmap);
5446*4882a593Smuzhiyun
5447*4882a593Smuzhiyun n = min_t(size_t, __le32_to_cpu(arg->num_mem_reqs),
5448*4882a593Smuzhiyun ARRAY_SIZE(arg->mem_reqs));
5449*4882a593Smuzhiyun for (i = 0; i < n; i++)
5450*4882a593Smuzhiyun arg->mem_reqs[i] = &ev->mem_reqs[i];
5451*4882a593Smuzhiyun
5452*4882a593Smuzhiyun if (skb->len <
5453*4882a593Smuzhiyun __le32_to_cpu(arg->num_mem_reqs) * sizeof(arg->mem_reqs[0]))
5454*4882a593Smuzhiyun return -EPROTO;
5455*4882a593Smuzhiyun
5456*4882a593Smuzhiyun return 0;
5457*4882a593Smuzhiyun }
5458*4882a593Smuzhiyun
5459*4882a593Smuzhiyun static int
ath10k_wmi_10x_op_pull_svc_rdy_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_svc_rdy_ev_arg * arg)5460*4882a593Smuzhiyun ath10k_wmi_10x_op_pull_svc_rdy_ev(struct ath10k *ar, struct sk_buff *skb,
5461*4882a593Smuzhiyun struct wmi_svc_rdy_ev_arg *arg)
5462*4882a593Smuzhiyun {
5463*4882a593Smuzhiyun struct wmi_10x_service_ready_event *ev;
5464*4882a593Smuzhiyun int i, n;
5465*4882a593Smuzhiyun
5466*4882a593Smuzhiyun if (skb->len < sizeof(*ev))
5467*4882a593Smuzhiyun return -EPROTO;
5468*4882a593Smuzhiyun
5469*4882a593Smuzhiyun ev = (void *)skb->data;
5470*4882a593Smuzhiyun skb_pull(skb, sizeof(*ev));
5471*4882a593Smuzhiyun arg->min_tx_power = ev->hw_min_tx_power;
5472*4882a593Smuzhiyun arg->max_tx_power = ev->hw_max_tx_power;
5473*4882a593Smuzhiyun arg->ht_cap = ev->ht_cap_info;
5474*4882a593Smuzhiyun arg->vht_cap = ev->vht_cap_info;
5475*4882a593Smuzhiyun arg->vht_supp_mcs = ev->vht_supp_mcs;
5476*4882a593Smuzhiyun arg->sw_ver0 = ev->sw_version;
5477*4882a593Smuzhiyun arg->phy_capab = ev->phy_capability;
5478*4882a593Smuzhiyun arg->num_rf_chains = ev->num_rf_chains;
5479*4882a593Smuzhiyun arg->eeprom_rd = ev->hal_reg_capabilities.eeprom_rd;
5480*4882a593Smuzhiyun arg->low_2ghz_chan = ev->hal_reg_capabilities.low_2ghz_chan;
5481*4882a593Smuzhiyun arg->high_2ghz_chan = ev->hal_reg_capabilities.high_2ghz_chan;
5482*4882a593Smuzhiyun arg->low_5ghz_chan = ev->hal_reg_capabilities.low_5ghz_chan;
5483*4882a593Smuzhiyun arg->high_5ghz_chan = ev->hal_reg_capabilities.high_5ghz_chan;
5484*4882a593Smuzhiyun arg->num_mem_reqs = ev->num_mem_reqs;
5485*4882a593Smuzhiyun arg->service_map = ev->wmi_service_bitmap;
5486*4882a593Smuzhiyun arg->service_map_len = sizeof(ev->wmi_service_bitmap);
5487*4882a593Smuzhiyun
5488*4882a593Smuzhiyun /* Deliberately skipping ev->sys_cap_info as WMI and WMI-TLV have
5489*4882a593Smuzhiyun * different values. We would need a translation to handle that,
5490*4882a593Smuzhiyun * but as we don't currently need anything from sys_cap_info from
5491*4882a593Smuzhiyun * WMI interface (only from WMI-TLV) safest it to skip it.
5492*4882a593Smuzhiyun */
5493*4882a593Smuzhiyun
5494*4882a593Smuzhiyun n = min_t(size_t, __le32_to_cpu(arg->num_mem_reqs),
5495*4882a593Smuzhiyun ARRAY_SIZE(arg->mem_reqs));
5496*4882a593Smuzhiyun for (i = 0; i < n; i++)
5497*4882a593Smuzhiyun arg->mem_reqs[i] = &ev->mem_reqs[i];
5498*4882a593Smuzhiyun
5499*4882a593Smuzhiyun if (skb->len <
5500*4882a593Smuzhiyun __le32_to_cpu(arg->num_mem_reqs) * sizeof(arg->mem_reqs[0]))
5501*4882a593Smuzhiyun return -EPROTO;
5502*4882a593Smuzhiyun
5503*4882a593Smuzhiyun return 0;
5504*4882a593Smuzhiyun }
5505*4882a593Smuzhiyun
ath10k_wmi_event_service_ready_work(struct work_struct * work)5506*4882a593Smuzhiyun static void ath10k_wmi_event_service_ready_work(struct work_struct *work)
5507*4882a593Smuzhiyun {
5508*4882a593Smuzhiyun struct ath10k *ar = container_of(work, struct ath10k, svc_rdy_work);
5509*4882a593Smuzhiyun struct sk_buff *skb = ar->svc_rdy_skb;
5510*4882a593Smuzhiyun struct wmi_svc_rdy_ev_arg arg = {};
5511*4882a593Smuzhiyun u32 num_units, req_id, unit_size, num_mem_reqs, num_unit_info, i;
5512*4882a593Smuzhiyun int ret;
5513*4882a593Smuzhiyun bool allocated;
5514*4882a593Smuzhiyun
5515*4882a593Smuzhiyun if (!skb) {
5516*4882a593Smuzhiyun ath10k_warn(ar, "invalid service ready event skb\n");
5517*4882a593Smuzhiyun return;
5518*4882a593Smuzhiyun }
5519*4882a593Smuzhiyun
5520*4882a593Smuzhiyun ret = ath10k_wmi_pull_svc_rdy(ar, skb, &arg);
5521*4882a593Smuzhiyun if (ret) {
5522*4882a593Smuzhiyun ath10k_warn(ar, "failed to parse service ready: %d\n", ret);
5523*4882a593Smuzhiyun return;
5524*4882a593Smuzhiyun }
5525*4882a593Smuzhiyun
5526*4882a593Smuzhiyun ath10k_wmi_map_svc(ar, arg.service_map, ar->wmi.svc_map,
5527*4882a593Smuzhiyun arg.service_map_len);
5528*4882a593Smuzhiyun
5529*4882a593Smuzhiyun ar->hw_min_tx_power = __le32_to_cpu(arg.min_tx_power);
5530*4882a593Smuzhiyun ar->hw_max_tx_power = __le32_to_cpu(arg.max_tx_power);
5531*4882a593Smuzhiyun ar->ht_cap_info = __le32_to_cpu(arg.ht_cap);
5532*4882a593Smuzhiyun ar->vht_cap_info = __le32_to_cpu(arg.vht_cap);
5533*4882a593Smuzhiyun ar->vht_supp_mcs = __le32_to_cpu(arg.vht_supp_mcs);
5534*4882a593Smuzhiyun ar->fw_version_major =
5535*4882a593Smuzhiyun (__le32_to_cpu(arg.sw_ver0) & 0xff000000) >> 24;
5536*4882a593Smuzhiyun ar->fw_version_minor = (__le32_to_cpu(arg.sw_ver0) & 0x00ffffff);
5537*4882a593Smuzhiyun ar->fw_version_release =
5538*4882a593Smuzhiyun (__le32_to_cpu(arg.sw_ver1) & 0xffff0000) >> 16;
5539*4882a593Smuzhiyun ar->fw_version_build = (__le32_to_cpu(arg.sw_ver1) & 0x0000ffff);
5540*4882a593Smuzhiyun ar->phy_capability = __le32_to_cpu(arg.phy_capab);
5541*4882a593Smuzhiyun ar->num_rf_chains = __le32_to_cpu(arg.num_rf_chains);
5542*4882a593Smuzhiyun ar->hw_eeprom_rd = __le32_to_cpu(arg.eeprom_rd);
5543*4882a593Smuzhiyun ar->low_2ghz_chan = __le32_to_cpu(arg.low_2ghz_chan);
5544*4882a593Smuzhiyun ar->high_2ghz_chan = __le32_to_cpu(arg.high_2ghz_chan);
5545*4882a593Smuzhiyun ar->low_5ghz_chan = __le32_to_cpu(arg.low_5ghz_chan);
5546*4882a593Smuzhiyun ar->high_5ghz_chan = __le32_to_cpu(arg.high_5ghz_chan);
5547*4882a593Smuzhiyun ar->sys_cap_info = __le32_to_cpu(arg.sys_cap_info);
5548*4882a593Smuzhiyun
5549*4882a593Smuzhiyun ath10k_dbg_dump(ar, ATH10K_DBG_WMI, NULL, "wmi svc: ",
5550*4882a593Smuzhiyun arg.service_map, arg.service_map_len);
5551*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi sys_cap_info 0x%x\n",
5552*4882a593Smuzhiyun ar->sys_cap_info);
5553*4882a593Smuzhiyun
5554*4882a593Smuzhiyun if (ar->num_rf_chains > ar->max_spatial_stream) {
5555*4882a593Smuzhiyun ath10k_warn(ar, "hardware advertises support for more spatial streams than it should (%d > %d)\n",
5556*4882a593Smuzhiyun ar->num_rf_chains, ar->max_spatial_stream);
5557*4882a593Smuzhiyun ar->num_rf_chains = ar->max_spatial_stream;
5558*4882a593Smuzhiyun }
5559*4882a593Smuzhiyun
5560*4882a593Smuzhiyun if (!ar->cfg_tx_chainmask) {
5561*4882a593Smuzhiyun ar->cfg_tx_chainmask = (1 << ar->num_rf_chains) - 1;
5562*4882a593Smuzhiyun ar->cfg_rx_chainmask = (1 << ar->num_rf_chains) - 1;
5563*4882a593Smuzhiyun }
5564*4882a593Smuzhiyun
5565*4882a593Smuzhiyun if (strlen(ar->hw->wiphy->fw_version) == 0) {
5566*4882a593Smuzhiyun snprintf(ar->hw->wiphy->fw_version,
5567*4882a593Smuzhiyun sizeof(ar->hw->wiphy->fw_version),
5568*4882a593Smuzhiyun "%u.%u.%u.%u",
5569*4882a593Smuzhiyun ar->fw_version_major,
5570*4882a593Smuzhiyun ar->fw_version_minor,
5571*4882a593Smuzhiyun ar->fw_version_release,
5572*4882a593Smuzhiyun ar->fw_version_build);
5573*4882a593Smuzhiyun }
5574*4882a593Smuzhiyun
5575*4882a593Smuzhiyun num_mem_reqs = __le32_to_cpu(arg.num_mem_reqs);
5576*4882a593Smuzhiyun if (num_mem_reqs > WMI_MAX_MEM_REQS) {
5577*4882a593Smuzhiyun ath10k_warn(ar, "requested memory chunks number (%d) exceeds the limit\n",
5578*4882a593Smuzhiyun num_mem_reqs);
5579*4882a593Smuzhiyun return;
5580*4882a593Smuzhiyun }
5581*4882a593Smuzhiyun
5582*4882a593Smuzhiyun if (test_bit(WMI_SERVICE_PEER_CACHING, ar->wmi.svc_map)) {
5583*4882a593Smuzhiyun if (test_bit(ATH10K_FW_FEATURE_PEER_FLOW_CONTROL,
5584*4882a593Smuzhiyun ar->running_fw->fw_file.fw_features))
5585*4882a593Smuzhiyun ar->num_active_peers = TARGET_10_4_QCACHE_ACTIVE_PEERS_PFC +
5586*4882a593Smuzhiyun ar->max_num_vdevs;
5587*4882a593Smuzhiyun else
5588*4882a593Smuzhiyun ar->num_active_peers = TARGET_10_4_QCACHE_ACTIVE_PEERS +
5589*4882a593Smuzhiyun ar->max_num_vdevs;
5590*4882a593Smuzhiyun
5591*4882a593Smuzhiyun ar->max_num_peers = TARGET_10_4_NUM_QCACHE_PEERS_MAX +
5592*4882a593Smuzhiyun ar->max_num_vdevs;
5593*4882a593Smuzhiyun ar->num_tids = ar->num_active_peers * 2;
5594*4882a593Smuzhiyun ar->max_num_stations = TARGET_10_4_NUM_QCACHE_PEERS_MAX;
5595*4882a593Smuzhiyun }
5596*4882a593Smuzhiyun
5597*4882a593Smuzhiyun /* TODO: Adjust max peer count for cases like WMI_SERVICE_RATECTRL_CACHE
5598*4882a593Smuzhiyun * and WMI_SERVICE_IRAM_TIDS, etc.
5599*4882a593Smuzhiyun */
5600*4882a593Smuzhiyun
5601*4882a593Smuzhiyun allocated = ath10k_wmi_is_host_mem_allocated(ar, arg.mem_reqs,
5602*4882a593Smuzhiyun num_mem_reqs);
5603*4882a593Smuzhiyun if (allocated)
5604*4882a593Smuzhiyun goto skip_mem_alloc;
5605*4882a593Smuzhiyun
5606*4882a593Smuzhiyun /* Either this event is received during boot time or there is a change
5607*4882a593Smuzhiyun * in memory requirement from firmware when compared to last request.
5608*4882a593Smuzhiyun * Free any old memory and do a fresh allocation based on the current
5609*4882a593Smuzhiyun * memory requirement.
5610*4882a593Smuzhiyun */
5611*4882a593Smuzhiyun ath10k_wmi_free_host_mem(ar);
5612*4882a593Smuzhiyun
5613*4882a593Smuzhiyun for (i = 0; i < num_mem_reqs; ++i) {
5614*4882a593Smuzhiyun req_id = __le32_to_cpu(arg.mem_reqs[i]->req_id);
5615*4882a593Smuzhiyun num_units = __le32_to_cpu(arg.mem_reqs[i]->num_units);
5616*4882a593Smuzhiyun unit_size = __le32_to_cpu(arg.mem_reqs[i]->unit_size);
5617*4882a593Smuzhiyun num_unit_info = __le32_to_cpu(arg.mem_reqs[i]->num_unit_info);
5618*4882a593Smuzhiyun
5619*4882a593Smuzhiyun if (num_unit_info & NUM_UNITS_IS_NUM_ACTIVE_PEERS) {
5620*4882a593Smuzhiyun if (ar->num_active_peers)
5621*4882a593Smuzhiyun num_units = ar->num_active_peers + 1;
5622*4882a593Smuzhiyun else
5623*4882a593Smuzhiyun num_units = ar->max_num_peers + 1;
5624*4882a593Smuzhiyun } else if (num_unit_info & NUM_UNITS_IS_NUM_PEERS) {
5625*4882a593Smuzhiyun /* number of units to allocate is number of
5626*4882a593Smuzhiyun * peers, 1 extra for self peer on target
5627*4882a593Smuzhiyun * this needs to be tied, host and target
5628*4882a593Smuzhiyun * can get out of sync
5629*4882a593Smuzhiyun */
5630*4882a593Smuzhiyun num_units = ar->max_num_peers + 1;
5631*4882a593Smuzhiyun } else if (num_unit_info & NUM_UNITS_IS_NUM_VDEVS) {
5632*4882a593Smuzhiyun num_units = ar->max_num_vdevs + 1;
5633*4882a593Smuzhiyun }
5634*4882a593Smuzhiyun
5635*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI,
5636*4882a593Smuzhiyun "wmi mem_req_id %d num_units %d num_unit_info %d unit size %d actual units %d\n",
5637*4882a593Smuzhiyun req_id,
5638*4882a593Smuzhiyun __le32_to_cpu(arg.mem_reqs[i]->num_units),
5639*4882a593Smuzhiyun num_unit_info,
5640*4882a593Smuzhiyun unit_size,
5641*4882a593Smuzhiyun num_units);
5642*4882a593Smuzhiyun
5643*4882a593Smuzhiyun ret = ath10k_wmi_alloc_host_mem(ar, req_id, num_units,
5644*4882a593Smuzhiyun unit_size);
5645*4882a593Smuzhiyun if (ret)
5646*4882a593Smuzhiyun return;
5647*4882a593Smuzhiyun }
5648*4882a593Smuzhiyun
5649*4882a593Smuzhiyun skip_mem_alloc:
5650*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI,
5651*4882a593Smuzhiyun "wmi event service ready min_tx_power 0x%08x max_tx_power 0x%08x ht_cap 0x%08x vht_cap 0x%08x vht_supp_mcs 0x%08x sw_ver0 0x%08x sw_ver1 0x%08x fw_build 0x%08x phy_capab 0x%08x num_rf_chains 0x%08x eeprom_rd 0x%08x low_2ghz_chan %d high_2ghz_chan %d low_5ghz_chan %d high_5ghz_chan %d num_mem_reqs 0x%08x\n",
5652*4882a593Smuzhiyun __le32_to_cpu(arg.min_tx_power),
5653*4882a593Smuzhiyun __le32_to_cpu(arg.max_tx_power),
5654*4882a593Smuzhiyun __le32_to_cpu(arg.ht_cap),
5655*4882a593Smuzhiyun __le32_to_cpu(arg.vht_cap),
5656*4882a593Smuzhiyun __le32_to_cpu(arg.vht_supp_mcs),
5657*4882a593Smuzhiyun __le32_to_cpu(arg.sw_ver0),
5658*4882a593Smuzhiyun __le32_to_cpu(arg.sw_ver1),
5659*4882a593Smuzhiyun __le32_to_cpu(arg.fw_build),
5660*4882a593Smuzhiyun __le32_to_cpu(arg.phy_capab),
5661*4882a593Smuzhiyun __le32_to_cpu(arg.num_rf_chains),
5662*4882a593Smuzhiyun __le32_to_cpu(arg.eeprom_rd),
5663*4882a593Smuzhiyun __le32_to_cpu(arg.low_2ghz_chan),
5664*4882a593Smuzhiyun __le32_to_cpu(arg.high_2ghz_chan),
5665*4882a593Smuzhiyun __le32_to_cpu(arg.low_5ghz_chan),
5666*4882a593Smuzhiyun __le32_to_cpu(arg.high_5ghz_chan),
5667*4882a593Smuzhiyun __le32_to_cpu(arg.num_mem_reqs));
5668*4882a593Smuzhiyun
5669*4882a593Smuzhiyun dev_kfree_skb(skb);
5670*4882a593Smuzhiyun ar->svc_rdy_skb = NULL;
5671*4882a593Smuzhiyun complete(&ar->wmi.service_ready);
5672*4882a593Smuzhiyun }
5673*4882a593Smuzhiyun
ath10k_wmi_event_service_ready(struct ath10k * ar,struct sk_buff * skb)5674*4882a593Smuzhiyun void ath10k_wmi_event_service_ready(struct ath10k *ar, struct sk_buff *skb)
5675*4882a593Smuzhiyun {
5676*4882a593Smuzhiyun ar->svc_rdy_skb = skb;
5677*4882a593Smuzhiyun queue_work(ar->workqueue_aux, &ar->svc_rdy_work);
5678*4882a593Smuzhiyun }
5679*4882a593Smuzhiyun
ath10k_wmi_op_pull_rdy_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_rdy_ev_arg * arg)5680*4882a593Smuzhiyun static int ath10k_wmi_op_pull_rdy_ev(struct ath10k *ar, struct sk_buff *skb,
5681*4882a593Smuzhiyun struct wmi_rdy_ev_arg *arg)
5682*4882a593Smuzhiyun {
5683*4882a593Smuzhiyun struct wmi_ready_event *ev = (void *)skb->data;
5684*4882a593Smuzhiyun
5685*4882a593Smuzhiyun if (skb->len < sizeof(*ev))
5686*4882a593Smuzhiyun return -EPROTO;
5687*4882a593Smuzhiyun
5688*4882a593Smuzhiyun skb_pull(skb, sizeof(*ev));
5689*4882a593Smuzhiyun arg->sw_version = ev->sw_version;
5690*4882a593Smuzhiyun arg->abi_version = ev->abi_version;
5691*4882a593Smuzhiyun arg->status = ev->status;
5692*4882a593Smuzhiyun arg->mac_addr = ev->mac_addr.addr;
5693*4882a593Smuzhiyun
5694*4882a593Smuzhiyun return 0;
5695*4882a593Smuzhiyun }
5696*4882a593Smuzhiyun
ath10k_wmi_op_pull_roam_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_roam_ev_arg * arg)5697*4882a593Smuzhiyun static int ath10k_wmi_op_pull_roam_ev(struct ath10k *ar, struct sk_buff *skb,
5698*4882a593Smuzhiyun struct wmi_roam_ev_arg *arg)
5699*4882a593Smuzhiyun {
5700*4882a593Smuzhiyun struct wmi_roam_ev *ev = (void *)skb->data;
5701*4882a593Smuzhiyun
5702*4882a593Smuzhiyun if (skb->len < sizeof(*ev))
5703*4882a593Smuzhiyun return -EPROTO;
5704*4882a593Smuzhiyun
5705*4882a593Smuzhiyun skb_pull(skb, sizeof(*ev));
5706*4882a593Smuzhiyun arg->vdev_id = ev->vdev_id;
5707*4882a593Smuzhiyun arg->reason = ev->reason;
5708*4882a593Smuzhiyun
5709*4882a593Smuzhiyun return 0;
5710*4882a593Smuzhiyun }
5711*4882a593Smuzhiyun
ath10k_wmi_op_pull_echo_ev(struct ath10k * ar,struct sk_buff * skb,struct wmi_echo_ev_arg * arg)5712*4882a593Smuzhiyun static int ath10k_wmi_op_pull_echo_ev(struct ath10k *ar,
5713*4882a593Smuzhiyun struct sk_buff *skb,
5714*4882a593Smuzhiyun struct wmi_echo_ev_arg *arg)
5715*4882a593Smuzhiyun {
5716*4882a593Smuzhiyun struct wmi_echo_event *ev = (void *)skb->data;
5717*4882a593Smuzhiyun
5718*4882a593Smuzhiyun arg->value = ev->value;
5719*4882a593Smuzhiyun
5720*4882a593Smuzhiyun return 0;
5721*4882a593Smuzhiyun }
5722*4882a593Smuzhiyun
ath10k_wmi_event_ready(struct ath10k * ar,struct sk_buff * skb)5723*4882a593Smuzhiyun int ath10k_wmi_event_ready(struct ath10k *ar, struct sk_buff *skb)
5724*4882a593Smuzhiyun {
5725*4882a593Smuzhiyun struct wmi_rdy_ev_arg arg = {};
5726*4882a593Smuzhiyun int ret;
5727*4882a593Smuzhiyun
5728*4882a593Smuzhiyun ret = ath10k_wmi_pull_rdy(ar, skb, &arg);
5729*4882a593Smuzhiyun if (ret) {
5730*4882a593Smuzhiyun ath10k_warn(ar, "failed to parse ready event: %d\n", ret);
5731*4882a593Smuzhiyun return ret;
5732*4882a593Smuzhiyun }
5733*4882a593Smuzhiyun
5734*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI,
5735*4882a593Smuzhiyun "wmi event ready sw_version 0x%08x abi_version %u mac_addr %pM status %d\n",
5736*4882a593Smuzhiyun __le32_to_cpu(arg.sw_version),
5737*4882a593Smuzhiyun __le32_to_cpu(arg.abi_version),
5738*4882a593Smuzhiyun arg.mac_addr,
5739*4882a593Smuzhiyun __le32_to_cpu(arg.status));
5740*4882a593Smuzhiyun
5741*4882a593Smuzhiyun if (is_zero_ether_addr(ar->mac_addr))
5742*4882a593Smuzhiyun ether_addr_copy(ar->mac_addr, arg.mac_addr);
5743*4882a593Smuzhiyun complete(&ar->wmi.unified_ready);
5744*4882a593Smuzhiyun return 0;
5745*4882a593Smuzhiyun }
5746*4882a593Smuzhiyun
ath10k_wmi_event_service_available(struct ath10k * ar,struct sk_buff * skb)5747*4882a593Smuzhiyun void ath10k_wmi_event_service_available(struct ath10k *ar, struct sk_buff *skb)
5748*4882a593Smuzhiyun {
5749*4882a593Smuzhiyun int ret;
5750*4882a593Smuzhiyun struct wmi_svc_avail_ev_arg arg = {};
5751*4882a593Smuzhiyun
5752*4882a593Smuzhiyun ret = ath10k_wmi_pull_svc_avail(ar, skb, &arg);
5753*4882a593Smuzhiyun if (ret) {
5754*4882a593Smuzhiyun ath10k_warn(ar, "failed to parse service available event: %d\n",
5755*4882a593Smuzhiyun ret);
5756*4882a593Smuzhiyun }
5757*4882a593Smuzhiyun
5758*4882a593Smuzhiyun /*
5759*4882a593Smuzhiyun * Initialization of "arg.service_map_ext_valid" to ZERO is necessary
5760*4882a593Smuzhiyun * for the below logic to work.
5761*4882a593Smuzhiyun */
5762*4882a593Smuzhiyun if (arg.service_map_ext_valid)
5763*4882a593Smuzhiyun ath10k_wmi_map_svc_ext(ar, arg.service_map_ext, ar->wmi.svc_map,
5764*4882a593Smuzhiyun __le32_to_cpu(arg.service_map_ext_len));
5765*4882a593Smuzhiyun }
5766*4882a593Smuzhiyun
ath10k_wmi_event_temperature(struct ath10k * ar,struct sk_buff * skb)5767*4882a593Smuzhiyun static int ath10k_wmi_event_temperature(struct ath10k *ar, struct sk_buff *skb)
5768*4882a593Smuzhiyun {
5769*4882a593Smuzhiyun const struct wmi_pdev_temperature_event *ev;
5770*4882a593Smuzhiyun
5771*4882a593Smuzhiyun ev = (struct wmi_pdev_temperature_event *)skb->data;
5772*4882a593Smuzhiyun if (WARN_ON(skb->len < sizeof(*ev)))
5773*4882a593Smuzhiyun return -EPROTO;
5774*4882a593Smuzhiyun
5775*4882a593Smuzhiyun ath10k_thermal_event_temperature(ar, __le32_to_cpu(ev->temperature));
5776*4882a593Smuzhiyun return 0;
5777*4882a593Smuzhiyun }
5778*4882a593Smuzhiyun
ath10k_wmi_event_pdev_bss_chan_info(struct ath10k * ar,struct sk_buff * skb)5779*4882a593Smuzhiyun static int ath10k_wmi_event_pdev_bss_chan_info(struct ath10k *ar,
5780*4882a593Smuzhiyun struct sk_buff *skb)
5781*4882a593Smuzhiyun {
5782*4882a593Smuzhiyun struct wmi_pdev_bss_chan_info_event *ev;
5783*4882a593Smuzhiyun struct survey_info *survey;
5784*4882a593Smuzhiyun u64 busy, total, tx, rx, rx_bss;
5785*4882a593Smuzhiyun u32 freq, noise_floor;
5786*4882a593Smuzhiyun u32 cc_freq_hz = ar->hw_params.channel_counters_freq_hz;
5787*4882a593Smuzhiyun int idx;
5788*4882a593Smuzhiyun
5789*4882a593Smuzhiyun ev = (struct wmi_pdev_bss_chan_info_event *)skb->data;
5790*4882a593Smuzhiyun if (WARN_ON(skb->len < sizeof(*ev)))
5791*4882a593Smuzhiyun return -EPROTO;
5792*4882a593Smuzhiyun
5793*4882a593Smuzhiyun freq = __le32_to_cpu(ev->freq);
5794*4882a593Smuzhiyun noise_floor = __le32_to_cpu(ev->noise_floor);
5795*4882a593Smuzhiyun busy = __le64_to_cpu(ev->cycle_busy);
5796*4882a593Smuzhiyun total = __le64_to_cpu(ev->cycle_total);
5797*4882a593Smuzhiyun tx = __le64_to_cpu(ev->cycle_tx);
5798*4882a593Smuzhiyun rx = __le64_to_cpu(ev->cycle_rx);
5799*4882a593Smuzhiyun rx_bss = __le64_to_cpu(ev->cycle_rx_bss);
5800*4882a593Smuzhiyun
5801*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI,
5802*4882a593Smuzhiyun "wmi event pdev bss chan info:\n freq: %d noise: %d cycle: busy %llu total %llu tx %llu rx %llu rx_bss %llu\n",
5803*4882a593Smuzhiyun freq, noise_floor, busy, total, tx, rx, rx_bss);
5804*4882a593Smuzhiyun
5805*4882a593Smuzhiyun spin_lock_bh(&ar->data_lock);
5806*4882a593Smuzhiyun idx = freq_to_idx(ar, freq);
5807*4882a593Smuzhiyun if (idx >= ARRAY_SIZE(ar->survey)) {
5808*4882a593Smuzhiyun ath10k_warn(ar, "bss chan info: invalid frequency %d (idx %d out of bounds)\n",
5809*4882a593Smuzhiyun freq, idx);
5810*4882a593Smuzhiyun goto exit;
5811*4882a593Smuzhiyun }
5812*4882a593Smuzhiyun
5813*4882a593Smuzhiyun survey = &ar->survey[idx];
5814*4882a593Smuzhiyun
5815*4882a593Smuzhiyun survey->noise = noise_floor;
5816*4882a593Smuzhiyun survey->time = div_u64(total, cc_freq_hz);
5817*4882a593Smuzhiyun survey->time_busy = div_u64(busy, cc_freq_hz);
5818*4882a593Smuzhiyun survey->time_rx = div_u64(rx_bss, cc_freq_hz);
5819*4882a593Smuzhiyun survey->time_tx = div_u64(tx, cc_freq_hz);
5820*4882a593Smuzhiyun survey->filled |= (SURVEY_INFO_NOISE_DBM |
5821*4882a593Smuzhiyun SURVEY_INFO_TIME |
5822*4882a593Smuzhiyun SURVEY_INFO_TIME_BUSY |
5823*4882a593Smuzhiyun SURVEY_INFO_TIME_RX |
5824*4882a593Smuzhiyun SURVEY_INFO_TIME_TX);
5825*4882a593Smuzhiyun exit:
5826*4882a593Smuzhiyun spin_unlock_bh(&ar->data_lock);
5827*4882a593Smuzhiyun complete(&ar->bss_survey_done);
5828*4882a593Smuzhiyun return 0;
5829*4882a593Smuzhiyun }
5830*4882a593Smuzhiyun
ath10k_wmi_queue_set_coverage_class_work(struct ath10k * ar)5831*4882a593Smuzhiyun static inline void ath10k_wmi_queue_set_coverage_class_work(struct ath10k *ar)
5832*4882a593Smuzhiyun {
5833*4882a593Smuzhiyun if (ar->hw_params.hw_ops->set_coverage_class) {
5834*4882a593Smuzhiyun spin_lock_bh(&ar->data_lock);
5835*4882a593Smuzhiyun
5836*4882a593Smuzhiyun /* This call only ensures that the modified coverage class
5837*4882a593Smuzhiyun * persists in case the firmware sets the registers back to
5838*4882a593Smuzhiyun * their default value. So calling it is only necessary if the
5839*4882a593Smuzhiyun * coverage class has a non-zero value.
5840*4882a593Smuzhiyun */
5841*4882a593Smuzhiyun if (ar->fw_coverage.coverage_class)
5842*4882a593Smuzhiyun queue_work(ar->workqueue, &ar->set_coverage_class_work);
5843*4882a593Smuzhiyun
5844*4882a593Smuzhiyun spin_unlock_bh(&ar->data_lock);
5845*4882a593Smuzhiyun }
5846*4882a593Smuzhiyun }
5847*4882a593Smuzhiyun
ath10k_wmi_op_rx(struct ath10k * ar,struct sk_buff * skb)5848*4882a593Smuzhiyun static void ath10k_wmi_op_rx(struct ath10k *ar, struct sk_buff *skb)
5849*4882a593Smuzhiyun {
5850*4882a593Smuzhiyun struct wmi_cmd_hdr *cmd_hdr;
5851*4882a593Smuzhiyun enum wmi_event_id id;
5852*4882a593Smuzhiyun
5853*4882a593Smuzhiyun cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
5854*4882a593Smuzhiyun id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
5855*4882a593Smuzhiyun
5856*4882a593Smuzhiyun if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
5857*4882a593Smuzhiyun goto out;
5858*4882a593Smuzhiyun
5859*4882a593Smuzhiyun trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
5860*4882a593Smuzhiyun
5861*4882a593Smuzhiyun switch (id) {
5862*4882a593Smuzhiyun case WMI_MGMT_RX_EVENTID:
5863*4882a593Smuzhiyun ath10k_wmi_event_mgmt_rx(ar, skb);
5864*4882a593Smuzhiyun /* mgmt_rx() owns the skb now! */
5865*4882a593Smuzhiyun return;
5866*4882a593Smuzhiyun case WMI_SCAN_EVENTID:
5867*4882a593Smuzhiyun ath10k_wmi_event_scan(ar, skb);
5868*4882a593Smuzhiyun ath10k_wmi_queue_set_coverage_class_work(ar);
5869*4882a593Smuzhiyun break;
5870*4882a593Smuzhiyun case WMI_CHAN_INFO_EVENTID:
5871*4882a593Smuzhiyun ath10k_wmi_event_chan_info(ar, skb);
5872*4882a593Smuzhiyun break;
5873*4882a593Smuzhiyun case WMI_ECHO_EVENTID:
5874*4882a593Smuzhiyun ath10k_wmi_event_echo(ar, skb);
5875*4882a593Smuzhiyun break;
5876*4882a593Smuzhiyun case WMI_DEBUG_MESG_EVENTID:
5877*4882a593Smuzhiyun ath10k_wmi_event_debug_mesg(ar, skb);
5878*4882a593Smuzhiyun ath10k_wmi_queue_set_coverage_class_work(ar);
5879*4882a593Smuzhiyun break;
5880*4882a593Smuzhiyun case WMI_UPDATE_STATS_EVENTID:
5881*4882a593Smuzhiyun ath10k_wmi_event_update_stats(ar, skb);
5882*4882a593Smuzhiyun break;
5883*4882a593Smuzhiyun case WMI_VDEV_START_RESP_EVENTID:
5884*4882a593Smuzhiyun ath10k_wmi_event_vdev_start_resp(ar, skb);
5885*4882a593Smuzhiyun ath10k_wmi_queue_set_coverage_class_work(ar);
5886*4882a593Smuzhiyun break;
5887*4882a593Smuzhiyun case WMI_VDEV_STOPPED_EVENTID:
5888*4882a593Smuzhiyun ath10k_wmi_event_vdev_stopped(ar, skb);
5889*4882a593Smuzhiyun ath10k_wmi_queue_set_coverage_class_work(ar);
5890*4882a593Smuzhiyun break;
5891*4882a593Smuzhiyun case WMI_PEER_STA_KICKOUT_EVENTID:
5892*4882a593Smuzhiyun ath10k_wmi_event_peer_sta_kickout(ar, skb);
5893*4882a593Smuzhiyun break;
5894*4882a593Smuzhiyun case WMI_HOST_SWBA_EVENTID:
5895*4882a593Smuzhiyun ath10k_wmi_event_host_swba(ar, skb);
5896*4882a593Smuzhiyun break;
5897*4882a593Smuzhiyun case WMI_TBTTOFFSET_UPDATE_EVENTID:
5898*4882a593Smuzhiyun ath10k_wmi_event_tbttoffset_update(ar, skb);
5899*4882a593Smuzhiyun break;
5900*4882a593Smuzhiyun case WMI_PHYERR_EVENTID:
5901*4882a593Smuzhiyun ath10k_wmi_event_phyerr(ar, skb);
5902*4882a593Smuzhiyun break;
5903*4882a593Smuzhiyun case WMI_ROAM_EVENTID:
5904*4882a593Smuzhiyun ath10k_wmi_event_roam(ar, skb);
5905*4882a593Smuzhiyun ath10k_wmi_queue_set_coverage_class_work(ar);
5906*4882a593Smuzhiyun break;
5907*4882a593Smuzhiyun case WMI_PROFILE_MATCH:
5908*4882a593Smuzhiyun ath10k_wmi_event_profile_match(ar, skb);
5909*4882a593Smuzhiyun break;
5910*4882a593Smuzhiyun case WMI_DEBUG_PRINT_EVENTID:
5911*4882a593Smuzhiyun ath10k_wmi_event_debug_print(ar, skb);
5912*4882a593Smuzhiyun ath10k_wmi_queue_set_coverage_class_work(ar);
5913*4882a593Smuzhiyun break;
5914*4882a593Smuzhiyun case WMI_PDEV_QVIT_EVENTID:
5915*4882a593Smuzhiyun ath10k_wmi_event_pdev_qvit(ar, skb);
5916*4882a593Smuzhiyun break;
5917*4882a593Smuzhiyun case WMI_WLAN_PROFILE_DATA_EVENTID:
5918*4882a593Smuzhiyun ath10k_wmi_event_wlan_profile_data(ar, skb);
5919*4882a593Smuzhiyun break;
5920*4882a593Smuzhiyun case WMI_RTT_MEASUREMENT_REPORT_EVENTID:
5921*4882a593Smuzhiyun ath10k_wmi_event_rtt_measurement_report(ar, skb);
5922*4882a593Smuzhiyun break;
5923*4882a593Smuzhiyun case WMI_TSF_MEASUREMENT_REPORT_EVENTID:
5924*4882a593Smuzhiyun ath10k_wmi_event_tsf_measurement_report(ar, skb);
5925*4882a593Smuzhiyun break;
5926*4882a593Smuzhiyun case WMI_RTT_ERROR_REPORT_EVENTID:
5927*4882a593Smuzhiyun ath10k_wmi_event_rtt_error_report(ar, skb);
5928*4882a593Smuzhiyun break;
5929*4882a593Smuzhiyun case WMI_WOW_WAKEUP_HOST_EVENTID:
5930*4882a593Smuzhiyun ath10k_wmi_event_wow_wakeup_host(ar, skb);
5931*4882a593Smuzhiyun break;
5932*4882a593Smuzhiyun case WMI_DCS_INTERFERENCE_EVENTID:
5933*4882a593Smuzhiyun ath10k_wmi_event_dcs_interference(ar, skb);
5934*4882a593Smuzhiyun break;
5935*4882a593Smuzhiyun case WMI_PDEV_TPC_CONFIG_EVENTID:
5936*4882a593Smuzhiyun ath10k_wmi_event_pdev_tpc_config(ar, skb);
5937*4882a593Smuzhiyun break;
5938*4882a593Smuzhiyun case WMI_PDEV_FTM_INTG_EVENTID:
5939*4882a593Smuzhiyun ath10k_wmi_event_pdev_ftm_intg(ar, skb);
5940*4882a593Smuzhiyun break;
5941*4882a593Smuzhiyun case WMI_GTK_OFFLOAD_STATUS_EVENTID:
5942*4882a593Smuzhiyun ath10k_wmi_event_gtk_offload_status(ar, skb);
5943*4882a593Smuzhiyun break;
5944*4882a593Smuzhiyun case WMI_GTK_REKEY_FAIL_EVENTID:
5945*4882a593Smuzhiyun ath10k_wmi_event_gtk_rekey_fail(ar, skb);
5946*4882a593Smuzhiyun break;
5947*4882a593Smuzhiyun case WMI_TX_DELBA_COMPLETE_EVENTID:
5948*4882a593Smuzhiyun ath10k_wmi_event_delba_complete(ar, skb);
5949*4882a593Smuzhiyun break;
5950*4882a593Smuzhiyun case WMI_TX_ADDBA_COMPLETE_EVENTID:
5951*4882a593Smuzhiyun ath10k_wmi_event_addba_complete(ar, skb);
5952*4882a593Smuzhiyun break;
5953*4882a593Smuzhiyun case WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID:
5954*4882a593Smuzhiyun ath10k_wmi_event_vdev_install_key_complete(ar, skb);
5955*4882a593Smuzhiyun break;
5956*4882a593Smuzhiyun case WMI_SERVICE_READY_EVENTID:
5957*4882a593Smuzhiyun ath10k_wmi_event_service_ready(ar, skb);
5958*4882a593Smuzhiyun return;
5959*4882a593Smuzhiyun case WMI_READY_EVENTID:
5960*4882a593Smuzhiyun ath10k_wmi_event_ready(ar, skb);
5961*4882a593Smuzhiyun ath10k_wmi_queue_set_coverage_class_work(ar);
5962*4882a593Smuzhiyun break;
5963*4882a593Smuzhiyun case WMI_SERVICE_AVAILABLE_EVENTID:
5964*4882a593Smuzhiyun ath10k_wmi_event_service_available(ar, skb);
5965*4882a593Smuzhiyun break;
5966*4882a593Smuzhiyun default:
5967*4882a593Smuzhiyun ath10k_warn(ar, "Unknown eventid: %d\n", id);
5968*4882a593Smuzhiyun break;
5969*4882a593Smuzhiyun }
5970*4882a593Smuzhiyun
5971*4882a593Smuzhiyun out:
5972*4882a593Smuzhiyun dev_kfree_skb(skb);
5973*4882a593Smuzhiyun }
5974*4882a593Smuzhiyun
ath10k_wmi_10_1_op_rx(struct ath10k * ar,struct sk_buff * skb)5975*4882a593Smuzhiyun static void ath10k_wmi_10_1_op_rx(struct ath10k *ar, struct sk_buff *skb)
5976*4882a593Smuzhiyun {
5977*4882a593Smuzhiyun struct wmi_cmd_hdr *cmd_hdr;
5978*4882a593Smuzhiyun enum wmi_10x_event_id id;
5979*4882a593Smuzhiyun bool consumed;
5980*4882a593Smuzhiyun
5981*4882a593Smuzhiyun cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
5982*4882a593Smuzhiyun id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
5983*4882a593Smuzhiyun
5984*4882a593Smuzhiyun if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
5985*4882a593Smuzhiyun goto out;
5986*4882a593Smuzhiyun
5987*4882a593Smuzhiyun trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
5988*4882a593Smuzhiyun
5989*4882a593Smuzhiyun consumed = ath10k_tm_event_wmi(ar, id, skb);
5990*4882a593Smuzhiyun
5991*4882a593Smuzhiyun /* Ready event must be handled normally also in UTF mode so that we
5992*4882a593Smuzhiyun * know the UTF firmware has booted, others we are just bypass WMI
5993*4882a593Smuzhiyun * events to testmode.
5994*4882a593Smuzhiyun */
5995*4882a593Smuzhiyun if (consumed && id != WMI_10X_READY_EVENTID) {
5996*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI,
5997*4882a593Smuzhiyun "wmi testmode consumed 0x%x\n", id);
5998*4882a593Smuzhiyun goto out;
5999*4882a593Smuzhiyun }
6000*4882a593Smuzhiyun
6001*4882a593Smuzhiyun switch (id) {
6002*4882a593Smuzhiyun case WMI_10X_MGMT_RX_EVENTID:
6003*4882a593Smuzhiyun ath10k_wmi_event_mgmt_rx(ar, skb);
6004*4882a593Smuzhiyun /* mgmt_rx() owns the skb now! */
6005*4882a593Smuzhiyun return;
6006*4882a593Smuzhiyun case WMI_10X_SCAN_EVENTID:
6007*4882a593Smuzhiyun ath10k_wmi_event_scan(ar, skb);
6008*4882a593Smuzhiyun ath10k_wmi_queue_set_coverage_class_work(ar);
6009*4882a593Smuzhiyun break;
6010*4882a593Smuzhiyun case WMI_10X_CHAN_INFO_EVENTID:
6011*4882a593Smuzhiyun ath10k_wmi_event_chan_info(ar, skb);
6012*4882a593Smuzhiyun break;
6013*4882a593Smuzhiyun case WMI_10X_ECHO_EVENTID:
6014*4882a593Smuzhiyun ath10k_wmi_event_echo(ar, skb);
6015*4882a593Smuzhiyun break;
6016*4882a593Smuzhiyun case WMI_10X_DEBUG_MESG_EVENTID:
6017*4882a593Smuzhiyun ath10k_wmi_event_debug_mesg(ar, skb);
6018*4882a593Smuzhiyun ath10k_wmi_queue_set_coverage_class_work(ar);
6019*4882a593Smuzhiyun break;
6020*4882a593Smuzhiyun case WMI_10X_UPDATE_STATS_EVENTID:
6021*4882a593Smuzhiyun ath10k_wmi_event_update_stats(ar, skb);
6022*4882a593Smuzhiyun break;
6023*4882a593Smuzhiyun case WMI_10X_VDEV_START_RESP_EVENTID:
6024*4882a593Smuzhiyun ath10k_wmi_event_vdev_start_resp(ar, skb);
6025*4882a593Smuzhiyun ath10k_wmi_queue_set_coverage_class_work(ar);
6026*4882a593Smuzhiyun break;
6027*4882a593Smuzhiyun case WMI_10X_VDEV_STOPPED_EVENTID:
6028*4882a593Smuzhiyun ath10k_wmi_event_vdev_stopped(ar, skb);
6029*4882a593Smuzhiyun ath10k_wmi_queue_set_coverage_class_work(ar);
6030*4882a593Smuzhiyun break;
6031*4882a593Smuzhiyun case WMI_10X_PEER_STA_KICKOUT_EVENTID:
6032*4882a593Smuzhiyun ath10k_wmi_event_peer_sta_kickout(ar, skb);
6033*4882a593Smuzhiyun break;
6034*4882a593Smuzhiyun case WMI_10X_HOST_SWBA_EVENTID:
6035*4882a593Smuzhiyun ath10k_wmi_event_host_swba(ar, skb);
6036*4882a593Smuzhiyun break;
6037*4882a593Smuzhiyun case WMI_10X_TBTTOFFSET_UPDATE_EVENTID:
6038*4882a593Smuzhiyun ath10k_wmi_event_tbttoffset_update(ar, skb);
6039*4882a593Smuzhiyun break;
6040*4882a593Smuzhiyun case WMI_10X_PHYERR_EVENTID:
6041*4882a593Smuzhiyun ath10k_wmi_event_phyerr(ar, skb);
6042*4882a593Smuzhiyun break;
6043*4882a593Smuzhiyun case WMI_10X_ROAM_EVENTID:
6044*4882a593Smuzhiyun ath10k_wmi_event_roam(ar, skb);
6045*4882a593Smuzhiyun ath10k_wmi_queue_set_coverage_class_work(ar);
6046*4882a593Smuzhiyun break;
6047*4882a593Smuzhiyun case WMI_10X_PROFILE_MATCH:
6048*4882a593Smuzhiyun ath10k_wmi_event_profile_match(ar, skb);
6049*4882a593Smuzhiyun break;
6050*4882a593Smuzhiyun case WMI_10X_DEBUG_PRINT_EVENTID:
6051*4882a593Smuzhiyun ath10k_wmi_event_debug_print(ar, skb);
6052*4882a593Smuzhiyun ath10k_wmi_queue_set_coverage_class_work(ar);
6053*4882a593Smuzhiyun break;
6054*4882a593Smuzhiyun case WMI_10X_PDEV_QVIT_EVENTID:
6055*4882a593Smuzhiyun ath10k_wmi_event_pdev_qvit(ar, skb);
6056*4882a593Smuzhiyun break;
6057*4882a593Smuzhiyun case WMI_10X_WLAN_PROFILE_DATA_EVENTID:
6058*4882a593Smuzhiyun ath10k_wmi_event_wlan_profile_data(ar, skb);
6059*4882a593Smuzhiyun break;
6060*4882a593Smuzhiyun case WMI_10X_RTT_MEASUREMENT_REPORT_EVENTID:
6061*4882a593Smuzhiyun ath10k_wmi_event_rtt_measurement_report(ar, skb);
6062*4882a593Smuzhiyun break;
6063*4882a593Smuzhiyun case WMI_10X_TSF_MEASUREMENT_REPORT_EVENTID:
6064*4882a593Smuzhiyun ath10k_wmi_event_tsf_measurement_report(ar, skb);
6065*4882a593Smuzhiyun break;
6066*4882a593Smuzhiyun case WMI_10X_RTT_ERROR_REPORT_EVENTID:
6067*4882a593Smuzhiyun ath10k_wmi_event_rtt_error_report(ar, skb);
6068*4882a593Smuzhiyun break;
6069*4882a593Smuzhiyun case WMI_10X_WOW_WAKEUP_HOST_EVENTID:
6070*4882a593Smuzhiyun ath10k_wmi_event_wow_wakeup_host(ar, skb);
6071*4882a593Smuzhiyun break;
6072*4882a593Smuzhiyun case WMI_10X_DCS_INTERFERENCE_EVENTID:
6073*4882a593Smuzhiyun ath10k_wmi_event_dcs_interference(ar, skb);
6074*4882a593Smuzhiyun break;
6075*4882a593Smuzhiyun case WMI_10X_PDEV_TPC_CONFIG_EVENTID:
6076*4882a593Smuzhiyun ath10k_wmi_event_pdev_tpc_config(ar, skb);
6077*4882a593Smuzhiyun break;
6078*4882a593Smuzhiyun case WMI_10X_INST_RSSI_STATS_EVENTID:
6079*4882a593Smuzhiyun ath10k_wmi_event_inst_rssi_stats(ar, skb);
6080*4882a593Smuzhiyun break;
6081*4882a593Smuzhiyun case WMI_10X_VDEV_STANDBY_REQ_EVENTID:
6082*4882a593Smuzhiyun ath10k_wmi_event_vdev_standby_req(ar, skb);
6083*4882a593Smuzhiyun break;
6084*4882a593Smuzhiyun case WMI_10X_VDEV_RESUME_REQ_EVENTID:
6085*4882a593Smuzhiyun ath10k_wmi_event_vdev_resume_req(ar, skb);
6086*4882a593Smuzhiyun break;
6087*4882a593Smuzhiyun case WMI_10X_SERVICE_READY_EVENTID:
6088*4882a593Smuzhiyun ath10k_wmi_event_service_ready(ar, skb);
6089*4882a593Smuzhiyun return;
6090*4882a593Smuzhiyun case WMI_10X_READY_EVENTID:
6091*4882a593Smuzhiyun ath10k_wmi_event_ready(ar, skb);
6092*4882a593Smuzhiyun ath10k_wmi_queue_set_coverage_class_work(ar);
6093*4882a593Smuzhiyun break;
6094*4882a593Smuzhiyun case WMI_10X_PDEV_UTF_EVENTID:
6095*4882a593Smuzhiyun /* ignore utf events */
6096*4882a593Smuzhiyun break;
6097*4882a593Smuzhiyun default:
6098*4882a593Smuzhiyun ath10k_warn(ar, "Unknown eventid: %d\n", id);
6099*4882a593Smuzhiyun break;
6100*4882a593Smuzhiyun }
6101*4882a593Smuzhiyun
6102*4882a593Smuzhiyun out:
6103*4882a593Smuzhiyun dev_kfree_skb(skb);
6104*4882a593Smuzhiyun }
6105*4882a593Smuzhiyun
ath10k_wmi_10_2_op_rx(struct ath10k * ar,struct sk_buff * skb)6106*4882a593Smuzhiyun static void ath10k_wmi_10_2_op_rx(struct ath10k *ar, struct sk_buff *skb)
6107*4882a593Smuzhiyun {
6108*4882a593Smuzhiyun struct wmi_cmd_hdr *cmd_hdr;
6109*4882a593Smuzhiyun enum wmi_10_2_event_id id;
6110*4882a593Smuzhiyun bool consumed;
6111*4882a593Smuzhiyun
6112*4882a593Smuzhiyun cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
6113*4882a593Smuzhiyun id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
6114*4882a593Smuzhiyun
6115*4882a593Smuzhiyun if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL)
6116*4882a593Smuzhiyun goto out;
6117*4882a593Smuzhiyun
6118*4882a593Smuzhiyun trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
6119*4882a593Smuzhiyun
6120*4882a593Smuzhiyun consumed = ath10k_tm_event_wmi(ar, id, skb);
6121*4882a593Smuzhiyun
6122*4882a593Smuzhiyun /* Ready event must be handled normally also in UTF mode so that we
6123*4882a593Smuzhiyun * know the UTF firmware has booted, others we are just bypass WMI
6124*4882a593Smuzhiyun * events to testmode.
6125*4882a593Smuzhiyun */
6126*4882a593Smuzhiyun if (consumed && id != WMI_10_2_READY_EVENTID) {
6127*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI,
6128*4882a593Smuzhiyun "wmi testmode consumed 0x%x\n", id);
6129*4882a593Smuzhiyun goto out;
6130*4882a593Smuzhiyun }
6131*4882a593Smuzhiyun
6132*4882a593Smuzhiyun switch (id) {
6133*4882a593Smuzhiyun case WMI_10_2_MGMT_RX_EVENTID:
6134*4882a593Smuzhiyun ath10k_wmi_event_mgmt_rx(ar, skb);
6135*4882a593Smuzhiyun /* mgmt_rx() owns the skb now! */
6136*4882a593Smuzhiyun return;
6137*4882a593Smuzhiyun case WMI_10_2_SCAN_EVENTID:
6138*4882a593Smuzhiyun ath10k_wmi_event_scan(ar, skb);
6139*4882a593Smuzhiyun ath10k_wmi_queue_set_coverage_class_work(ar);
6140*4882a593Smuzhiyun break;
6141*4882a593Smuzhiyun case WMI_10_2_CHAN_INFO_EVENTID:
6142*4882a593Smuzhiyun ath10k_wmi_event_chan_info(ar, skb);
6143*4882a593Smuzhiyun break;
6144*4882a593Smuzhiyun case WMI_10_2_ECHO_EVENTID:
6145*4882a593Smuzhiyun ath10k_wmi_event_echo(ar, skb);
6146*4882a593Smuzhiyun break;
6147*4882a593Smuzhiyun case WMI_10_2_DEBUG_MESG_EVENTID:
6148*4882a593Smuzhiyun ath10k_wmi_event_debug_mesg(ar, skb);
6149*4882a593Smuzhiyun ath10k_wmi_queue_set_coverage_class_work(ar);
6150*4882a593Smuzhiyun break;
6151*4882a593Smuzhiyun case WMI_10_2_UPDATE_STATS_EVENTID:
6152*4882a593Smuzhiyun ath10k_wmi_event_update_stats(ar, skb);
6153*4882a593Smuzhiyun break;
6154*4882a593Smuzhiyun case WMI_10_2_VDEV_START_RESP_EVENTID:
6155*4882a593Smuzhiyun ath10k_wmi_event_vdev_start_resp(ar, skb);
6156*4882a593Smuzhiyun ath10k_wmi_queue_set_coverage_class_work(ar);
6157*4882a593Smuzhiyun break;
6158*4882a593Smuzhiyun case WMI_10_2_VDEV_STOPPED_EVENTID:
6159*4882a593Smuzhiyun ath10k_wmi_event_vdev_stopped(ar, skb);
6160*4882a593Smuzhiyun ath10k_wmi_queue_set_coverage_class_work(ar);
6161*4882a593Smuzhiyun break;
6162*4882a593Smuzhiyun case WMI_10_2_PEER_STA_KICKOUT_EVENTID:
6163*4882a593Smuzhiyun ath10k_wmi_event_peer_sta_kickout(ar, skb);
6164*4882a593Smuzhiyun break;
6165*4882a593Smuzhiyun case WMI_10_2_HOST_SWBA_EVENTID:
6166*4882a593Smuzhiyun ath10k_wmi_event_host_swba(ar, skb);
6167*4882a593Smuzhiyun break;
6168*4882a593Smuzhiyun case WMI_10_2_TBTTOFFSET_UPDATE_EVENTID:
6169*4882a593Smuzhiyun ath10k_wmi_event_tbttoffset_update(ar, skb);
6170*4882a593Smuzhiyun break;
6171*4882a593Smuzhiyun case WMI_10_2_PHYERR_EVENTID:
6172*4882a593Smuzhiyun ath10k_wmi_event_phyerr(ar, skb);
6173*4882a593Smuzhiyun break;
6174*4882a593Smuzhiyun case WMI_10_2_ROAM_EVENTID:
6175*4882a593Smuzhiyun ath10k_wmi_event_roam(ar, skb);
6176*4882a593Smuzhiyun ath10k_wmi_queue_set_coverage_class_work(ar);
6177*4882a593Smuzhiyun break;
6178*4882a593Smuzhiyun case WMI_10_2_PROFILE_MATCH:
6179*4882a593Smuzhiyun ath10k_wmi_event_profile_match(ar, skb);
6180*4882a593Smuzhiyun break;
6181*4882a593Smuzhiyun case WMI_10_2_DEBUG_PRINT_EVENTID:
6182*4882a593Smuzhiyun ath10k_wmi_event_debug_print(ar, skb);
6183*4882a593Smuzhiyun ath10k_wmi_queue_set_coverage_class_work(ar);
6184*4882a593Smuzhiyun break;
6185*4882a593Smuzhiyun case WMI_10_2_PDEV_QVIT_EVENTID:
6186*4882a593Smuzhiyun ath10k_wmi_event_pdev_qvit(ar, skb);
6187*4882a593Smuzhiyun break;
6188*4882a593Smuzhiyun case WMI_10_2_WLAN_PROFILE_DATA_EVENTID:
6189*4882a593Smuzhiyun ath10k_wmi_event_wlan_profile_data(ar, skb);
6190*4882a593Smuzhiyun break;
6191*4882a593Smuzhiyun case WMI_10_2_RTT_MEASUREMENT_REPORT_EVENTID:
6192*4882a593Smuzhiyun ath10k_wmi_event_rtt_measurement_report(ar, skb);
6193*4882a593Smuzhiyun break;
6194*4882a593Smuzhiyun case WMI_10_2_TSF_MEASUREMENT_REPORT_EVENTID:
6195*4882a593Smuzhiyun ath10k_wmi_event_tsf_measurement_report(ar, skb);
6196*4882a593Smuzhiyun break;
6197*4882a593Smuzhiyun case WMI_10_2_RTT_ERROR_REPORT_EVENTID:
6198*4882a593Smuzhiyun ath10k_wmi_event_rtt_error_report(ar, skb);
6199*4882a593Smuzhiyun break;
6200*4882a593Smuzhiyun case WMI_10_2_WOW_WAKEUP_HOST_EVENTID:
6201*4882a593Smuzhiyun ath10k_wmi_event_wow_wakeup_host(ar, skb);
6202*4882a593Smuzhiyun break;
6203*4882a593Smuzhiyun case WMI_10_2_DCS_INTERFERENCE_EVENTID:
6204*4882a593Smuzhiyun ath10k_wmi_event_dcs_interference(ar, skb);
6205*4882a593Smuzhiyun break;
6206*4882a593Smuzhiyun case WMI_10_2_PDEV_TPC_CONFIG_EVENTID:
6207*4882a593Smuzhiyun ath10k_wmi_event_pdev_tpc_config(ar, skb);
6208*4882a593Smuzhiyun break;
6209*4882a593Smuzhiyun case WMI_10_2_INST_RSSI_STATS_EVENTID:
6210*4882a593Smuzhiyun ath10k_wmi_event_inst_rssi_stats(ar, skb);
6211*4882a593Smuzhiyun break;
6212*4882a593Smuzhiyun case WMI_10_2_VDEV_STANDBY_REQ_EVENTID:
6213*4882a593Smuzhiyun ath10k_wmi_event_vdev_standby_req(ar, skb);
6214*4882a593Smuzhiyun ath10k_wmi_queue_set_coverage_class_work(ar);
6215*4882a593Smuzhiyun break;
6216*4882a593Smuzhiyun case WMI_10_2_VDEV_RESUME_REQ_EVENTID:
6217*4882a593Smuzhiyun ath10k_wmi_event_vdev_resume_req(ar, skb);
6218*4882a593Smuzhiyun ath10k_wmi_queue_set_coverage_class_work(ar);
6219*4882a593Smuzhiyun break;
6220*4882a593Smuzhiyun case WMI_10_2_SERVICE_READY_EVENTID:
6221*4882a593Smuzhiyun ath10k_wmi_event_service_ready(ar, skb);
6222*4882a593Smuzhiyun return;
6223*4882a593Smuzhiyun case WMI_10_2_READY_EVENTID:
6224*4882a593Smuzhiyun ath10k_wmi_event_ready(ar, skb);
6225*4882a593Smuzhiyun ath10k_wmi_queue_set_coverage_class_work(ar);
6226*4882a593Smuzhiyun break;
6227*4882a593Smuzhiyun case WMI_10_2_PDEV_TEMPERATURE_EVENTID:
6228*4882a593Smuzhiyun ath10k_wmi_event_temperature(ar, skb);
6229*4882a593Smuzhiyun break;
6230*4882a593Smuzhiyun case WMI_10_2_PDEV_BSS_CHAN_INFO_EVENTID:
6231*4882a593Smuzhiyun ath10k_wmi_event_pdev_bss_chan_info(ar, skb);
6232*4882a593Smuzhiyun break;
6233*4882a593Smuzhiyun case WMI_10_2_RTT_KEEPALIVE_EVENTID:
6234*4882a593Smuzhiyun case WMI_10_2_GPIO_INPUT_EVENTID:
6235*4882a593Smuzhiyun case WMI_10_2_PEER_RATECODE_LIST_EVENTID:
6236*4882a593Smuzhiyun case WMI_10_2_GENERIC_BUFFER_EVENTID:
6237*4882a593Smuzhiyun case WMI_10_2_MCAST_BUF_RELEASE_EVENTID:
6238*4882a593Smuzhiyun case WMI_10_2_MCAST_LIST_AGEOUT_EVENTID:
6239*4882a593Smuzhiyun case WMI_10_2_WDS_PEER_EVENTID:
6240*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI,
6241*4882a593Smuzhiyun "received event id %d not implemented\n", id);
6242*4882a593Smuzhiyun break;
6243*4882a593Smuzhiyun case WMI_10_2_PEER_STA_PS_STATECHG_EVENTID:
6244*4882a593Smuzhiyun ath10k_wmi_event_peer_sta_ps_state_chg(ar, skb);
6245*4882a593Smuzhiyun break;
6246*4882a593Smuzhiyun default:
6247*4882a593Smuzhiyun ath10k_warn(ar, "Unknown eventid: %d\n", id);
6248*4882a593Smuzhiyun break;
6249*4882a593Smuzhiyun }
6250*4882a593Smuzhiyun
6251*4882a593Smuzhiyun out:
6252*4882a593Smuzhiyun dev_kfree_skb(skb);
6253*4882a593Smuzhiyun }
6254*4882a593Smuzhiyun
ath10k_wmi_10_4_op_rx(struct ath10k * ar,struct sk_buff * skb)6255*4882a593Smuzhiyun static void ath10k_wmi_10_4_op_rx(struct ath10k *ar, struct sk_buff *skb)
6256*4882a593Smuzhiyun {
6257*4882a593Smuzhiyun struct wmi_cmd_hdr *cmd_hdr;
6258*4882a593Smuzhiyun enum wmi_10_4_event_id id;
6259*4882a593Smuzhiyun bool consumed;
6260*4882a593Smuzhiyun
6261*4882a593Smuzhiyun cmd_hdr = (struct wmi_cmd_hdr *)skb->data;
6262*4882a593Smuzhiyun id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID);
6263*4882a593Smuzhiyun
6264*4882a593Smuzhiyun if (!skb_pull(skb, sizeof(struct wmi_cmd_hdr)))
6265*4882a593Smuzhiyun goto out;
6266*4882a593Smuzhiyun
6267*4882a593Smuzhiyun trace_ath10k_wmi_event(ar, id, skb->data, skb->len);
6268*4882a593Smuzhiyun
6269*4882a593Smuzhiyun consumed = ath10k_tm_event_wmi(ar, id, skb);
6270*4882a593Smuzhiyun
6271*4882a593Smuzhiyun /* Ready event must be handled normally also in UTF mode so that we
6272*4882a593Smuzhiyun * know the UTF firmware has booted, others we are just bypass WMI
6273*4882a593Smuzhiyun * events to testmode.
6274*4882a593Smuzhiyun */
6275*4882a593Smuzhiyun if (consumed && id != WMI_10_4_READY_EVENTID) {
6276*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI,
6277*4882a593Smuzhiyun "wmi testmode consumed 0x%x\n", id);
6278*4882a593Smuzhiyun goto out;
6279*4882a593Smuzhiyun }
6280*4882a593Smuzhiyun
6281*4882a593Smuzhiyun switch (id) {
6282*4882a593Smuzhiyun case WMI_10_4_MGMT_RX_EVENTID:
6283*4882a593Smuzhiyun ath10k_wmi_event_mgmt_rx(ar, skb);
6284*4882a593Smuzhiyun /* mgmt_rx() owns the skb now! */
6285*4882a593Smuzhiyun return;
6286*4882a593Smuzhiyun case WMI_10_4_ECHO_EVENTID:
6287*4882a593Smuzhiyun ath10k_wmi_event_echo(ar, skb);
6288*4882a593Smuzhiyun break;
6289*4882a593Smuzhiyun case WMI_10_4_DEBUG_MESG_EVENTID:
6290*4882a593Smuzhiyun ath10k_wmi_event_debug_mesg(ar, skb);
6291*4882a593Smuzhiyun ath10k_wmi_queue_set_coverage_class_work(ar);
6292*4882a593Smuzhiyun break;
6293*4882a593Smuzhiyun case WMI_10_4_SERVICE_READY_EVENTID:
6294*4882a593Smuzhiyun ath10k_wmi_event_service_ready(ar, skb);
6295*4882a593Smuzhiyun return;
6296*4882a593Smuzhiyun case WMI_10_4_SCAN_EVENTID:
6297*4882a593Smuzhiyun ath10k_wmi_event_scan(ar, skb);
6298*4882a593Smuzhiyun ath10k_wmi_queue_set_coverage_class_work(ar);
6299*4882a593Smuzhiyun break;
6300*4882a593Smuzhiyun case WMI_10_4_CHAN_INFO_EVENTID:
6301*4882a593Smuzhiyun ath10k_wmi_event_chan_info(ar, skb);
6302*4882a593Smuzhiyun break;
6303*4882a593Smuzhiyun case WMI_10_4_PHYERR_EVENTID:
6304*4882a593Smuzhiyun ath10k_wmi_event_phyerr(ar, skb);
6305*4882a593Smuzhiyun break;
6306*4882a593Smuzhiyun case WMI_10_4_READY_EVENTID:
6307*4882a593Smuzhiyun ath10k_wmi_event_ready(ar, skb);
6308*4882a593Smuzhiyun ath10k_wmi_queue_set_coverage_class_work(ar);
6309*4882a593Smuzhiyun break;
6310*4882a593Smuzhiyun case WMI_10_4_PEER_STA_KICKOUT_EVENTID:
6311*4882a593Smuzhiyun ath10k_wmi_event_peer_sta_kickout(ar, skb);
6312*4882a593Smuzhiyun break;
6313*4882a593Smuzhiyun case WMI_10_4_ROAM_EVENTID:
6314*4882a593Smuzhiyun ath10k_wmi_event_roam(ar, skb);
6315*4882a593Smuzhiyun ath10k_wmi_queue_set_coverage_class_work(ar);
6316*4882a593Smuzhiyun break;
6317*4882a593Smuzhiyun case WMI_10_4_HOST_SWBA_EVENTID:
6318*4882a593Smuzhiyun ath10k_wmi_event_host_swba(ar, skb);
6319*4882a593Smuzhiyun break;
6320*4882a593Smuzhiyun case WMI_10_4_TBTTOFFSET_UPDATE_EVENTID:
6321*4882a593Smuzhiyun ath10k_wmi_event_tbttoffset_update(ar, skb);
6322*4882a593Smuzhiyun break;
6323*4882a593Smuzhiyun case WMI_10_4_DEBUG_PRINT_EVENTID:
6324*4882a593Smuzhiyun ath10k_wmi_event_debug_print(ar, skb);
6325*4882a593Smuzhiyun ath10k_wmi_queue_set_coverage_class_work(ar);
6326*4882a593Smuzhiyun break;
6327*4882a593Smuzhiyun case WMI_10_4_VDEV_START_RESP_EVENTID:
6328*4882a593Smuzhiyun ath10k_wmi_event_vdev_start_resp(ar, skb);
6329*4882a593Smuzhiyun ath10k_wmi_queue_set_coverage_class_work(ar);
6330*4882a593Smuzhiyun break;
6331*4882a593Smuzhiyun case WMI_10_4_VDEV_STOPPED_EVENTID:
6332*4882a593Smuzhiyun ath10k_wmi_event_vdev_stopped(ar, skb);
6333*4882a593Smuzhiyun ath10k_wmi_queue_set_coverage_class_work(ar);
6334*4882a593Smuzhiyun break;
6335*4882a593Smuzhiyun case WMI_10_4_WOW_WAKEUP_HOST_EVENTID:
6336*4882a593Smuzhiyun case WMI_10_4_PEER_RATECODE_LIST_EVENTID:
6337*4882a593Smuzhiyun case WMI_10_4_WDS_PEER_EVENTID:
6338*4882a593Smuzhiyun case WMI_10_4_DEBUG_FATAL_CONDITION_EVENTID:
6339*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI,
6340*4882a593Smuzhiyun "received event id %d not implemented\n", id);
6341*4882a593Smuzhiyun break;
6342*4882a593Smuzhiyun case WMI_10_4_UPDATE_STATS_EVENTID:
6343*4882a593Smuzhiyun ath10k_wmi_event_update_stats(ar, skb);
6344*4882a593Smuzhiyun break;
6345*4882a593Smuzhiyun case WMI_10_4_PDEV_TEMPERATURE_EVENTID:
6346*4882a593Smuzhiyun ath10k_wmi_event_temperature(ar, skb);
6347*4882a593Smuzhiyun break;
6348*4882a593Smuzhiyun case WMI_10_4_PDEV_BSS_CHAN_INFO_EVENTID:
6349*4882a593Smuzhiyun ath10k_wmi_event_pdev_bss_chan_info(ar, skb);
6350*4882a593Smuzhiyun break;
6351*4882a593Smuzhiyun case WMI_10_4_PDEV_TPC_CONFIG_EVENTID:
6352*4882a593Smuzhiyun ath10k_wmi_event_pdev_tpc_config(ar, skb);
6353*4882a593Smuzhiyun break;
6354*4882a593Smuzhiyun case WMI_10_4_TDLS_PEER_EVENTID:
6355*4882a593Smuzhiyun ath10k_wmi_handle_tdls_peer_event(ar, skb);
6356*4882a593Smuzhiyun break;
6357*4882a593Smuzhiyun case WMI_10_4_PDEV_TPC_TABLE_EVENTID:
6358*4882a593Smuzhiyun ath10k_wmi_event_tpc_final_table(ar, skb);
6359*4882a593Smuzhiyun break;
6360*4882a593Smuzhiyun case WMI_10_4_DFS_STATUS_CHECK_EVENTID:
6361*4882a593Smuzhiyun ath10k_wmi_event_dfs_status_check(ar, skb);
6362*4882a593Smuzhiyun break;
6363*4882a593Smuzhiyun case WMI_10_4_PEER_STA_PS_STATECHG_EVENTID:
6364*4882a593Smuzhiyun ath10k_wmi_event_peer_sta_ps_state_chg(ar, skb);
6365*4882a593Smuzhiyun break;
6366*4882a593Smuzhiyun default:
6367*4882a593Smuzhiyun ath10k_warn(ar, "Unknown eventid: %d\n", id);
6368*4882a593Smuzhiyun break;
6369*4882a593Smuzhiyun }
6370*4882a593Smuzhiyun
6371*4882a593Smuzhiyun out:
6372*4882a593Smuzhiyun dev_kfree_skb(skb);
6373*4882a593Smuzhiyun }
6374*4882a593Smuzhiyun
ath10k_wmi_process_rx(struct ath10k * ar,struct sk_buff * skb)6375*4882a593Smuzhiyun static void ath10k_wmi_process_rx(struct ath10k *ar, struct sk_buff *skb)
6376*4882a593Smuzhiyun {
6377*4882a593Smuzhiyun int ret;
6378*4882a593Smuzhiyun
6379*4882a593Smuzhiyun ret = ath10k_wmi_rx(ar, skb);
6380*4882a593Smuzhiyun if (ret)
6381*4882a593Smuzhiyun ath10k_warn(ar, "failed to process wmi rx: %d\n", ret);
6382*4882a593Smuzhiyun }
6383*4882a593Smuzhiyun
ath10k_wmi_connect(struct ath10k * ar)6384*4882a593Smuzhiyun int ath10k_wmi_connect(struct ath10k *ar)
6385*4882a593Smuzhiyun {
6386*4882a593Smuzhiyun int status;
6387*4882a593Smuzhiyun struct ath10k_htc_svc_conn_req conn_req;
6388*4882a593Smuzhiyun struct ath10k_htc_svc_conn_resp conn_resp;
6389*4882a593Smuzhiyun
6390*4882a593Smuzhiyun memset(&ar->wmi.svc_map, 0, sizeof(ar->wmi.svc_map));
6391*4882a593Smuzhiyun
6392*4882a593Smuzhiyun memset(&conn_req, 0, sizeof(conn_req));
6393*4882a593Smuzhiyun memset(&conn_resp, 0, sizeof(conn_resp));
6394*4882a593Smuzhiyun
6395*4882a593Smuzhiyun /* these fields are the same for all service endpoints */
6396*4882a593Smuzhiyun conn_req.ep_ops.ep_tx_complete = ath10k_wmi_htc_tx_complete;
6397*4882a593Smuzhiyun conn_req.ep_ops.ep_rx_complete = ath10k_wmi_process_rx;
6398*4882a593Smuzhiyun conn_req.ep_ops.ep_tx_credits = ath10k_wmi_op_ep_tx_credits;
6399*4882a593Smuzhiyun
6400*4882a593Smuzhiyun /* connect to control service */
6401*4882a593Smuzhiyun conn_req.service_id = ATH10K_HTC_SVC_ID_WMI_CONTROL;
6402*4882a593Smuzhiyun
6403*4882a593Smuzhiyun status = ath10k_htc_connect_service(&ar->htc, &conn_req, &conn_resp);
6404*4882a593Smuzhiyun if (status) {
6405*4882a593Smuzhiyun ath10k_warn(ar, "failed to connect to WMI CONTROL service status: %d\n",
6406*4882a593Smuzhiyun status);
6407*4882a593Smuzhiyun return status;
6408*4882a593Smuzhiyun }
6409*4882a593Smuzhiyun
6410*4882a593Smuzhiyun ar->wmi.eid = conn_resp.eid;
6411*4882a593Smuzhiyun return 0;
6412*4882a593Smuzhiyun }
6413*4882a593Smuzhiyun
6414*4882a593Smuzhiyun static struct sk_buff *
ath10k_wmi_op_gen_pdev_set_base_macaddr(struct ath10k * ar,const u8 macaddr[ETH_ALEN])6415*4882a593Smuzhiyun ath10k_wmi_op_gen_pdev_set_base_macaddr(struct ath10k *ar,
6416*4882a593Smuzhiyun const u8 macaddr[ETH_ALEN])
6417*4882a593Smuzhiyun {
6418*4882a593Smuzhiyun struct wmi_pdev_set_base_macaddr_cmd *cmd;
6419*4882a593Smuzhiyun struct sk_buff *skb;
6420*4882a593Smuzhiyun
6421*4882a593Smuzhiyun skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
6422*4882a593Smuzhiyun if (!skb)
6423*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
6424*4882a593Smuzhiyun
6425*4882a593Smuzhiyun cmd = (struct wmi_pdev_set_base_macaddr_cmd *)skb->data;
6426*4882a593Smuzhiyun ether_addr_copy(cmd->mac_addr.addr, macaddr);
6427*4882a593Smuzhiyun
6428*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI,
6429*4882a593Smuzhiyun "wmi pdev basemac %pM\n", macaddr);
6430*4882a593Smuzhiyun return skb;
6431*4882a593Smuzhiyun }
6432*4882a593Smuzhiyun
6433*4882a593Smuzhiyun static struct sk_buff *
ath10k_wmi_op_gen_pdev_set_rd(struct ath10k * ar,u16 rd,u16 rd2g,u16 rd5g,u16 ctl2g,u16 ctl5g,enum wmi_dfs_region dfs_reg)6434*4882a593Smuzhiyun ath10k_wmi_op_gen_pdev_set_rd(struct ath10k *ar, u16 rd, u16 rd2g, u16 rd5g,
6435*4882a593Smuzhiyun u16 ctl2g, u16 ctl5g,
6436*4882a593Smuzhiyun enum wmi_dfs_region dfs_reg)
6437*4882a593Smuzhiyun {
6438*4882a593Smuzhiyun struct wmi_pdev_set_regdomain_cmd *cmd;
6439*4882a593Smuzhiyun struct sk_buff *skb;
6440*4882a593Smuzhiyun
6441*4882a593Smuzhiyun skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
6442*4882a593Smuzhiyun if (!skb)
6443*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
6444*4882a593Smuzhiyun
6445*4882a593Smuzhiyun cmd = (struct wmi_pdev_set_regdomain_cmd *)skb->data;
6446*4882a593Smuzhiyun cmd->reg_domain = __cpu_to_le32(rd);
6447*4882a593Smuzhiyun cmd->reg_domain_2G = __cpu_to_le32(rd2g);
6448*4882a593Smuzhiyun cmd->reg_domain_5G = __cpu_to_le32(rd5g);
6449*4882a593Smuzhiyun cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g);
6450*4882a593Smuzhiyun cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g);
6451*4882a593Smuzhiyun
6452*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI,
6453*4882a593Smuzhiyun "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x\n",
6454*4882a593Smuzhiyun rd, rd2g, rd5g, ctl2g, ctl5g);
6455*4882a593Smuzhiyun return skb;
6456*4882a593Smuzhiyun }
6457*4882a593Smuzhiyun
6458*4882a593Smuzhiyun static struct sk_buff *
ath10k_wmi_10x_op_gen_pdev_set_rd(struct ath10k * ar,u16 rd,u16 rd2g,u16 rd5g,u16 ctl2g,u16 ctl5g,enum wmi_dfs_region dfs_reg)6459*4882a593Smuzhiyun ath10k_wmi_10x_op_gen_pdev_set_rd(struct ath10k *ar, u16 rd, u16 rd2g, u16
6460*4882a593Smuzhiyun rd5g, u16 ctl2g, u16 ctl5g,
6461*4882a593Smuzhiyun enum wmi_dfs_region dfs_reg)
6462*4882a593Smuzhiyun {
6463*4882a593Smuzhiyun struct wmi_pdev_set_regdomain_cmd_10x *cmd;
6464*4882a593Smuzhiyun struct sk_buff *skb;
6465*4882a593Smuzhiyun
6466*4882a593Smuzhiyun skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
6467*4882a593Smuzhiyun if (!skb)
6468*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
6469*4882a593Smuzhiyun
6470*4882a593Smuzhiyun cmd = (struct wmi_pdev_set_regdomain_cmd_10x *)skb->data;
6471*4882a593Smuzhiyun cmd->reg_domain = __cpu_to_le32(rd);
6472*4882a593Smuzhiyun cmd->reg_domain_2G = __cpu_to_le32(rd2g);
6473*4882a593Smuzhiyun cmd->reg_domain_5G = __cpu_to_le32(rd5g);
6474*4882a593Smuzhiyun cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g);
6475*4882a593Smuzhiyun cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g);
6476*4882a593Smuzhiyun cmd->dfs_domain = __cpu_to_le32(dfs_reg);
6477*4882a593Smuzhiyun
6478*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI,
6479*4882a593Smuzhiyun "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x dfs_region %x\n",
6480*4882a593Smuzhiyun rd, rd2g, rd5g, ctl2g, ctl5g, dfs_reg);
6481*4882a593Smuzhiyun return skb;
6482*4882a593Smuzhiyun }
6483*4882a593Smuzhiyun
6484*4882a593Smuzhiyun static struct sk_buff *
ath10k_wmi_op_gen_pdev_suspend(struct ath10k * ar,u32 suspend_opt)6485*4882a593Smuzhiyun ath10k_wmi_op_gen_pdev_suspend(struct ath10k *ar, u32 suspend_opt)
6486*4882a593Smuzhiyun {
6487*4882a593Smuzhiyun struct wmi_pdev_suspend_cmd *cmd;
6488*4882a593Smuzhiyun struct sk_buff *skb;
6489*4882a593Smuzhiyun
6490*4882a593Smuzhiyun skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
6491*4882a593Smuzhiyun if (!skb)
6492*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
6493*4882a593Smuzhiyun
6494*4882a593Smuzhiyun cmd = (struct wmi_pdev_suspend_cmd *)skb->data;
6495*4882a593Smuzhiyun cmd->suspend_opt = __cpu_to_le32(suspend_opt);
6496*4882a593Smuzhiyun
6497*4882a593Smuzhiyun return skb;
6498*4882a593Smuzhiyun }
6499*4882a593Smuzhiyun
6500*4882a593Smuzhiyun static struct sk_buff *
ath10k_wmi_op_gen_pdev_resume(struct ath10k * ar)6501*4882a593Smuzhiyun ath10k_wmi_op_gen_pdev_resume(struct ath10k *ar)
6502*4882a593Smuzhiyun {
6503*4882a593Smuzhiyun struct sk_buff *skb;
6504*4882a593Smuzhiyun
6505*4882a593Smuzhiyun skb = ath10k_wmi_alloc_skb(ar, 0);
6506*4882a593Smuzhiyun if (!skb)
6507*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
6508*4882a593Smuzhiyun
6509*4882a593Smuzhiyun return skb;
6510*4882a593Smuzhiyun }
6511*4882a593Smuzhiyun
6512*4882a593Smuzhiyun static struct sk_buff *
ath10k_wmi_op_gen_pdev_set_param(struct ath10k * ar,u32 id,u32 value)6513*4882a593Smuzhiyun ath10k_wmi_op_gen_pdev_set_param(struct ath10k *ar, u32 id, u32 value)
6514*4882a593Smuzhiyun {
6515*4882a593Smuzhiyun struct wmi_pdev_set_param_cmd *cmd;
6516*4882a593Smuzhiyun struct sk_buff *skb;
6517*4882a593Smuzhiyun
6518*4882a593Smuzhiyun if (id == WMI_PDEV_PARAM_UNSUPPORTED) {
6519*4882a593Smuzhiyun ath10k_warn(ar, "pdev param %d not supported by firmware\n",
6520*4882a593Smuzhiyun id);
6521*4882a593Smuzhiyun return ERR_PTR(-EOPNOTSUPP);
6522*4882a593Smuzhiyun }
6523*4882a593Smuzhiyun
6524*4882a593Smuzhiyun skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
6525*4882a593Smuzhiyun if (!skb)
6526*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
6527*4882a593Smuzhiyun
6528*4882a593Smuzhiyun cmd = (struct wmi_pdev_set_param_cmd *)skb->data;
6529*4882a593Smuzhiyun cmd->param_id = __cpu_to_le32(id);
6530*4882a593Smuzhiyun cmd->param_value = __cpu_to_le32(value);
6531*4882a593Smuzhiyun
6532*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set param %d value %d\n",
6533*4882a593Smuzhiyun id, value);
6534*4882a593Smuzhiyun return skb;
6535*4882a593Smuzhiyun }
6536*4882a593Smuzhiyun
ath10k_wmi_put_host_mem_chunks(struct ath10k * ar,struct wmi_host_mem_chunks * chunks)6537*4882a593Smuzhiyun void ath10k_wmi_put_host_mem_chunks(struct ath10k *ar,
6538*4882a593Smuzhiyun struct wmi_host_mem_chunks *chunks)
6539*4882a593Smuzhiyun {
6540*4882a593Smuzhiyun struct host_memory_chunk *chunk;
6541*4882a593Smuzhiyun int i;
6542*4882a593Smuzhiyun
6543*4882a593Smuzhiyun chunks->count = __cpu_to_le32(ar->wmi.num_mem_chunks);
6544*4882a593Smuzhiyun
6545*4882a593Smuzhiyun for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
6546*4882a593Smuzhiyun chunk = &chunks->items[i];
6547*4882a593Smuzhiyun chunk->ptr = __cpu_to_le32(ar->wmi.mem_chunks[i].paddr);
6548*4882a593Smuzhiyun chunk->size = __cpu_to_le32(ar->wmi.mem_chunks[i].len);
6549*4882a593Smuzhiyun chunk->req_id = __cpu_to_le32(ar->wmi.mem_chunks[i].req_id);
6550*4882a593Smuzhiyun
6551*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI,
6552*4882a593Smuzhiyun "wmi chunk %d len %d requested, addr 0x%llx\n",
6553*4882a593Smuzhiyun i,
6554*4882a593Smuzhiyun ar->wmi.mem_chunks[i].len,
6555*4882a593Smuzhiyun (unsigned long long)ar->wmi.mem_chunks[i].paddr);
6556*4882a593Smuzhiyun }
6557*4882a593Smuzhiyun }
6558*4882a593Smuzhiyun
ath10k_wmi_op_gen_init(struct ath10k * ar)6559*4882a593Smuzhiyun static struct sk_buff *ath10k_wmi_op_gen_init(struct ath10k *ar)
6560*4882a593Smuzhiyun {
6561*4882a593Smuzhiyun struct wmi_init_cmd *cmd;
6562*4882a593Smuzhiyun struct sk_buff *buf;
6563*4882a593Smuzhiyun struct wmi_resource_config config = {};
6564*4882a593Smuzhiyun u32 val;
6565*4882a593Smuzhiyun
6566*4882a593Smuzhiyun config.num_vdevs = __cpu_to_le32(TARGET_NUM_VDEVS);
6567*4882a593Smuzhiyun config.num_peers = __cpu_to_le32(TARGET_NUM_PEERS);
6568*4882a593Smuzhiyun config.num_offload_peers = __cpu_to_le32(TARGET_NUM_OFFLOAD_PEERS);
6569*4882a593Smuzhiyun
6570*4882a593Smuzhiyun config.num_offload_reorder_bufs =
6571*4882a593Smuzhiyun __cpu_to_le32(TARGET_NUM_OFFLOAD_REORDER_BUFS);
6572*4882a593Smuzhiyun
6573*4882a593Smuzhiyun config.num_peer_keys = __cpu_to_le32(TARGET_NUM_PEER_KEYS);
6574*4882a593Smuzhiyun config.num_tids = __cpu_to_le32(TARGET_NUM_TIDS);
6575*4882a593Smuzhiyun config.ast_skid_limit = __cpu_to_le32(TARGET_AST_SKID_LIMIT);
6576*4882a593Smuzhiyun config.tx_chain_mask = __cpu_to_le32(TARGET_TX_CHAIN_MASK);
6577*4882a593Smuzhiyun config.rx_chain_mask = __cpu_to_le32(TARGET_RX_CHAIN_MASK);
6578*4882a593Smuzhiyun config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
6579*4882a593Smuzhiyun config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
6580*4882a593Smuzhiyun config.rx_timeout_pri_be = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI);
6581*4882a593Smuzhiyun config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_RX_TIMEOUT_HI_PRI);
6582*4882a593Smuzhiyun config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
6583*4882a593Smuzhiyun config.scan_max_pending_reqs =
6584*4882a593Smuzhiyun __cpu_to_le32(TARGET_SCAN_MAX_PENDING_REQS);
6585*4882a593Smuzhiyun
6586*4882a593Smuzhiyun config.bmiss_offload_max_vdev =
6587*4882a593Smuzhiyun __cpu_to_le32(TARGET_BMISS_OFFLOAD_MAX_VDEV);
6588*4882a593Smuzhiyun
6589*4882a593Smuzhiyun config.roam_offload_max_vdev =
6590*4882a593Smuzhiyun __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_VDEV);
6591*4882a593Smuzhiyun
6592*4882a593Smuzhiyun config.roam_offload_max_ap_profiles =
6593*4882a593Smuzhiyun __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES);
6594*4882a593Smuzhiyun
6595*4882a593Smuzhiyun config.num_mcast_groups = __cpu_to_le32(TARGET_NUM_MCAST_GROUPS);
6596*4882a593Smuzhiyun config.num_mcast_table_elems =
6597*4882a593Smuzhiyun __cpu_to_le32(TARGET_NUM_MCAST_TABLE_ELEMS);
6598*4882a593Smuzhiyun
6599*4882a593Smuzhiyun config.mcast2ucast_mode = __cpu_to_le32(TARGET_MCAST2UCAST_MODE);
6600*4882a593Smuzhiyun config.tx_dbg_log_size = __cpu_to_le32(TARGET_TX_DBG_LOG_SIZE);
6601*4882a593Smuzhiyun config.num_wds_entries = __cpu_to_le32(TARGET_NUM_WDS_ENTRIES);
6602*4882a593Smuzhiyun config.dma_burst_size = __cpu_to_le32(TARGET_DMA_BURST_SIZE);
6603*4882a593Smuzhiyun config.mac_aggr_delim = __cpu_to_le32(TARGET_MAC_AGGR_DELIM);
6604*4882a593Smuzhiyun
6605*4882a593Smuzhiyun val = TARGET_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
6606*4882a593Smuzhiyun config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
6607*4882a593Smuzhiyun
6608*4882a593Smuzhiyun config.vow_config = __cpu_to_le32(TARGET_VOW_CONFIG);
6609*4882a593Smuzhiyun
6610*4882a593Smuzhiyun config.gtk_offload_max_vdev =
6611*4882a593Smuzhiyun __cpu_to_le32(TARGET_GTK_OFFLOAD_MAX_VDEV);
6612*4882a593Smuzhiyun
6613*4882a593Smuzhiyun config.num_msdu_desc = __cpu_to_le32(TARGET_NUM_MSDU_DESC);
6614*4882a593Smuzhiyun config.max_frag_entries = __cpu_to_le32(TARGET_MAX_FRAG_ENTRIES);
6615*4882a593Smuzhiyun
6616*4882a593Smuzhiyun buf = ath10k_wmi_alloc_skb(ar, struct_size(cmd, mem_chunks.items,
6617*4882a593Smuzhiyun ar->wmi.num_mem_chunks));
6618*4882a593Smuzhiyun if (!buf)
6619*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
6620*4882a593Smuzhiyun
6621*4882a593Smuzhiyun cmd = (struct wmi_init_cmd *)buf->data;
6622*4882a593Smuzhiyun
6623*4882a593Smuzhiyun memcpy(&cmd->resource_config, &config, sizeof(config));
6624*4882a593Smuzhiyun ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
6625*4882a593Smuzhiyun
6626*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init\n");
6627*4882a593Smuzhiyun return buf;
6628*4882a593Smuzhiyun }
6629*4882a593Smuzhiyun
ath10k_wmi_10_1_op_gen_init(struct ath10k * ar)6630*4882a593Smuzhiyun static struct sk_buff *ath10k_wmi_10_1_op_gen_init(struct ath10k *ar)
6631*4882a593Smuzhiyun {
6632*4882a593Smuzhiyun struct wmi_init_cmd_10x *cmd;
6633*4882a593Smuzhiyun struct sk_buff *buf;
6634*4882a593Smuzhiyun struct wmi_resource_config_10x config = {};
6635*4882a593Smuzhiyun u32 val;
6636*4882a593Smuzhiyun
6637*4882a593Smuzhiyun config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS);
6638*4882a593Smuzhiyun config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS);
6639*4882a593Smuzhiyun config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS);
6640*4882a593Smuzhiyun config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS);
6641*4882a593Smuzhiyun config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT);
6642*4882a593Smuzhiyun config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK);
6643*4882a593Smuzhiyun config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK);
6644*4882a593Smuzhiyun config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
6645*4882a593Smuzhiyun config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
6646*4882a593Smuzhiyun config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
6647*4882a593Smuzhiyun config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI);
6648*4882a593Smuzhiyun config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
6649*4882a593Smuzhiyun config.scan_max_pending_reqs =
6650*4882a593Smuzhiyun __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS);
6651*4882a593Smuzhiyun
6652*4882a593Smuzhiyun config.bmiss_offload_max_vdev =
6653*4882a593Smuzhiyun __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV);
6654*4882a593Smuzhiyun
6655*4882a593Smuzhiyun config.roam_offload_max_vdev =
6656*4882a593Smuzhiyun __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV);
6657*4882a593Smuzhiyun
6658*4882a593Smuzhiyun config.roam_offload_max_ap_profiles =
6659*4882a593Smuzhiyun __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES);
6660*4882a593Smuzhiyun
6661*4882a593Smuzhiyun config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS);
6662*4882a593Smuzhiyun config.num_mcast_table_elems =
6663*4882a593Smuzhiyun __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS);
6664*4882a593Smuzhiyun
6665*4882a593Smuzhiyun config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE);
6666*4882a593Smuzhiyun config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE);
6667*4882a593Smuzhiyun config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES);
6668*4882a593Smuzhiyun config.dma_burst_size = __cpu_to_le32(TARGET_10X_DMA_BURST_SIZE);
6669*4882a593Smuzhiyun config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM);
6670*4882a593Smuzhiyun
6671*4882a593Smuzhiyun val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
6672*4882a593Smuzhiyun config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
6673*4882a593Smuzhiyun
6674*4882a593Smuzhiyun config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG);
6675*4882a593Smuzhiyun
6676*4882a593Smuzhiyun config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC);
6677*4882a593Smuzhiyun config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES);
6678*4882a593Smuzhiyun
6679*4882a593Smuzhiyun buf = ath10k_wmi_alloc_skb(ar, struct_size(cmd, mem_chunks.items,
6680*4882a593Smuzhiyun ar->wmi.num_mem_chunks));
6681*4882a593Smuzhiyun if (!buf)
6682*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
6683*4882a593Smuzhiyun
6684*4882a593Smuzhiyun cmd = (struct wmi_init_cmd_10x *)buf->data;
6685*4882a593Smuzhiyun
6686*4882a593Smuzhiyun memcpy(&cmd->resource_config, &config, sizeof(config));
6687*4882a593Smuzhiyun ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
6688*4882a593Smuzhiyun
6689*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10x\n");
6690*4882a593Smuzhiyun return buf;
6691*4882a593Smuzhiyun }
6692*4882a593Smuzhiyun
ath10k_wmi_10_2_op_gen_init(struct ath10k * ar)6693*4882a593Smuzhiyun static struct sk_buff *ath10k_wmi_10_2_op_gen_init(struct ath10k *ar)
6694*4882a593Smuzhiyun {
6695*4882a593Smuzhiyun struct wmi_init_cmd_10_2 *cmd;
6696*4882a593Smuzhiyun struct sk_buff *buf;
6697*4882a593Smuzhiyun struct wmi_resource_config_10x config = {};
6698*4882a593Smuzhiyun u32 val, features;
6699*4882a593Smuzhiyun
6700*4882a593Smuzhiyun config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS);
6701*4882a593Smuzhiyun config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS);
6702*4882a593Smuzhiyun
6703*4882a593Smuzhiyun if (ath10k_peer_stats_enabled(ar)) {
6704*4882a593Smuzhiyun config.num_peers = __cpu_to_le32(TARGET_10X_TX_STATS_NUM_PEERS);
6705*4882a593Smuzhiyun config.num_tids = __cpu_to_le32(TARGET_10X_TX_STATS_NUM_TIDS);
6706*4882a593Smuzhiyun } else {
6707*4882a593Smuzhiyun config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS);
6708*4882a593Smuzhiyun config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS);
6709*4882a593Smuzhiyun }
6710*4882a593Smuzhiyun
6711*4882a593Smuzhiyun config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT);
6712*4882a593Smuzhiyun config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK);
6713*4882a593Smuzhiyun config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK);
6714*4882a593Smuzhiyun config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
6715*4882a593Smuzhiyun config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
6716*4882a593Smuzhiyun config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI);
6717*4882a593Smuzhiyun config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI);
6718*4882a593Smuzhiyun config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
6719*4882a593Smuzhiyun
6720*4882a593Smuzhiyun config.scan_max_pending_reqs =
6721*4882a593Smuzhiyun __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS);
6722*4882a593Smuzhiyun
6723*4882a593Smuzhiyun config.bmiss_offload_max_vdev =
6724*4882a593Smuzhiyun __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV);
6725*4882a593Smuzhiyun
6726*4882a593Smuzhiyun config.roam_offload_max_vdev =
6727*4882a593Smuzhiyun __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV);
6728*4882a593Smuzhiyun
6729*4882a593Smuzhiyun config.roam_offload_max_ap_profiles =
6730*4882a593Smuzhiyun __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES);
6731*4882a593Smuzhiyun
6732*4882a593Smuzhiyun config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS);
6733*4882a593Smuzhiyun config.num_mcast_table_elems =
6734*4882a593Smuzhiyun __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS);
6735*4882a593Smuzhiyun
6736*4882a593Smuzhiyun config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE);
6737*4882a593Smuzhiyun config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE);
6738*4882a593Smuzhiyun config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES);
6739*4882a593Smuzhiyun config.dma_burst_size = __cpu_to_le32(TARGET_10_2_DMA_BURST_SIZE);
6740*4882a593Smuzhiyun config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM);
6741*4882a593Smuzhiyun
6742*4882a593Smuzhiyun val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK;
6743*4882a593Smuzhiyun config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val);
6744*4882a593Smuzhiyun
6745*4882a593Smuzhiyun config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG);
6746*4882a593Smuzhiyun
6747*4882a593Smuzhiyun config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC);
6748*4882a593Smuzhiyun config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES);
6749*4882a593Smuzhiyun
6750*4882a593Smuzhiyun buf = ath10k_wmi_alloc_skb(ar, struct_size(cmd, mem_chunks.items,
6751*4882a593Smuzhiyun ar->wmi.num_mem_chunks));
6752*4882a593Smuzhiyun if (!buf)
6753*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
6754*4882a593Smuzhiyun
6755*4882a593Smuzhiyun cmd = (struct wmi_init_cmd_10_2 *)buf->data;
6756*4882a593Smuzhiyun
6757*4882a593Smuzhiyun features = WMI_10_2_RX_BATCH_MODE;
6758*4882a593Smuzhiyun
6759*4882a593Smuzhiyun if (test_bit(ATH10K_FLAG_BTCOEX, &ar->dev_flags) &&
6760*4882a593Smuzhiyun test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map))
6761*4882a593Smuzhiyun features |= WMI_10_2_COEX_GPIO;
6762*4882a593Smuzhiyun
6763*4882a593Smuzhiyun if (ath10k_peer_stats_enabled(ar))
6764*4882a593Smuzhiyun features |= WMI_10_2_PEER_STATS;
6765*4882a593Smuzhiyun
6766*4882a593Smuzhiyun if (test_bit(WMI_SERVICE_BSS_CHANNEL_INFO_64, ar->wmi.svc_map))
6767*4882a593Smuzhiyun features |= WMI_10_2_BSS_CHAN_INFO;
6768*4882a593Smuzhiyun
6769*4882a593Smuzhiyun cmd->resource_config.feature_mask = __cpu_to_le32(features);
6770*4882a593Smuzhiyun
6771*4882a593Smuzhiyun memcpy(&cmd->resource_config.common, &config, sizeof(config));
6772*4882a593Smuzhiyun ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
6773*4882a593Smuzhiyun
6774*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10.2\n");
6775*4882a593Smuzhiyun return buf;
6776*4882a593Smuzhiyun }
6777*4882a593Smuzhiyun
ath10k_wmi_10_4_op_gen_init(struct ath10k * ar)6778*4882a593Smuzhiyun static struct sk_buff *ath10k_wmi_10_4_op_gen_init(struct ath10k *ar)
6779*4882a593Smuzhiyun {
6780*4882a593Smuzhiyun struct wmi_init_cmd_10_4 *cmd;
6781*4882a593Smuzhiyun struct sk_buff *buf;
6782*4882a593Smuzhiyun struct wmi_resource_config_10_4 config = {};
6783*4882a593Smuzhiyun
6784*4882a593Smuzhiyun config.num_vdevs = __cpu_to_le32(ar->max_num_vdevs);
6785*4882a593Smuzhiyun config.num_peers = __cpu_to_le32(ar->max_num_peers);
6786*4882a593Smuzhiyun config.num_active_peers = __cpu_to_le32(ar->num_active_peers);
6787*4882a593Smuzhiyun config.num_tids = __cpu_to_le32(ar->num_tids);
6788*4882a593Smuzhiyun
6789*4882a593Smuzhiyun config.num_offload_peers = __cpu_to_le32(TARGET_10_4_NUM_OFFLOAD_PEERS);
6790*4882a593Smuzhiyun config.num_offload_reorder_buffs =
6791*4882a593Smuzhiyun __cpu_to_le32(TARGET_10_4_NUM_OFFLOAD_REORDER_BUFFS);
6792*4882a593Smuzhiyun config.num_peer_keys = __cpu_to_le32(TARGET_10_4_NUM_PEER_KEYS);
6793*4882a593Smuzhiyun config.ast_skid_limit = __cpu_to_le32(TARGET_10_4_AST_SKID_LIMIT);
6794*4882a593Smuzhiyun config.tx_chain_mask = __cpu_to_le32(ar->hw_params.tx_chain_mask);
6795*4882a593Smuzhiyun config.rx_chain_mask = __cpu_to_le32(ar->hw_params.rx_chain_mask);
6796*4882a593Smuzhiyun
6797*4882a593Smuzhiyun config.rx_timeout_pri[0] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_LO_PRI);
6798*4882a593Smuzhiyun config.rx_timeout_pri[1] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_LO_PRI);
6799*4882a593Smuzhiyun config.rx_timeout_pri[2] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_LO_PRI);
6800*4882a593Smuzhiyun config.rx_timeout_pri[3] = __cpu_to_le32(TARGET_10_4_RX_TIMEOUT_HI_PRI);
6801*4882a593Smuzhiyun
6802*4882a593Smuzhiyun config.rx_decap_mode = __cpu_to_le32(ar->wmi.rx_decap_mode);
6803*4882a593Smuzhiyun config.scan_max_pending_req = __cpu_to_le32(TARGET_10_4_SCAN_MAX_REQS);
6804*4882a593Smuzhiyun config.bmiss_offload_max_vdev =
6805*4882a593Smuzhiyun __cpu_to_le32(TARGET_10_4_BMISS_OFFLOAD_MAX_VDEV);
6806*4882a593Smuzhiyun config.roam_offload_max_vdev =
6807*4882a593Smuzhiyun __cpu_to_le32(TARGET_10_4_ROAM_OFFLOAD_MAX_VDEV);
6808*4882a593Smuzhiyun config.roam_offload_max_ap_profiles =
6809*4882a593Smuzhiyun __cpu_to_le32(TARGET_10_4_ROAM_OFFLOAD_MAX_PROFILES);
6810*4882a593Smuzhiyun config.num_mcast_groups = __cpu_to_le32(TARGET_10_4_NUM_MCAST_GROUPS);
6811*4882a593Smuzhiyun config.num_mcast_table_elems =
6812*4882a593Smuzhiyun __cpu_to_le32(TARGET_10_4_NUM_MCAST_TABLE_ELEMS);
6813*4882a593Smuzhiyun
6814*4882a593Smuzhiyun config.mcast2ucast_mode = __cpu_to_le32(TARGET_10_4_MCAST2UCAST_MODE);
6815*4882a593Smuzhiyun config.tx_dbg_log_size = __cpu_to_le32(TARGET_10_4_TX_DBG_LOG_SIZE);
6816*4882a593Smuzhiyun config.num_wds_entries = __cpu_to_le32(TARGET_10_4_NUM_WDS_ENTRIES);
6817*4882a593Smuzhiyun config.dma_burst_size = __cpu_to_le32(TARGET_10_4_DMA_BURST_SIZE);
6818*4882a593Smuzhiyun config.mac_aggr_delim = __cpu_to_le32(TARGET_10_4_MAC_AGGR_DELIM);
6819*4882a593Smuzhiyun
6820*4882a593Smuzhiyun config.rx_skip_defrag_timeout_dup_detection_check =
6821*4882a593Smuzhiyun __cpu_to_le32(TARGET_10_4_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK);
6822*4882a593Smuzhiyun
6823*4882a593Smuzhiyun config.vow_config = __cpu_to_le32(TARGET_10_4_VOW_CONFIG);
6824*4882a593Smuzhiyun config.gtk_offload_max_vdev =
6825*4882a593Smuzhiyun __cpu_to_le32(TARGET_10_4_GTK_OFFLOAD_MAX_VDEV);
6826*4882a593Smuzhiyun config.num_msdu_desc = __cpu_to_le32(ar->htt.max_num_pending_tx);
6827*4882a593Smuzhiyun config.max_frag_entries = __cpu_to_le32(TARGET_10_4_11AC_TX_MAX_FRAGS);
6828*4882a593Smuzhiyun config.max_peer_ext_stats =
6829*4882a593Smuzhiyun __cpu_to_le32(TARGET_10_4_MAX_PEER_EXT_STATS);
6830*4882a593Smuzhiyun config.smart_ant_cap = __cpu_to_le32(TARGET_10_4_SMART_ANT_CAP);
6831*4882a593Smuzhiyun
6832*4882a593Smuzhiyun config.bk_minfree = __cpu_to_le32(TARGET_10_4_BK_MIN_FREE);
6833*4882a593Smuzhiyun config.be_minfree = __cpu_to_le32(TARGET_10_4_BE_MIN_FREE);
6834*4882a593Smuzhiyun config.vi_minfree = __cpu_to_le32(TARGET_10_4_VI_MIN_FREE);
6835*4882a593Smuzhiyun config.vo_minfree = __cpu_to_le32(TARGET_10_4_VO_MIN_FREE);
6836*4882a593Smuzhiyun
6837*4882a593Smuzhiyun config.rx_batchmode = __cpu_to_le32(TARGET_10_4_RX_BATCH_MODE);
6838*4882a593Smuzhiyun config.tt_support =
6839*4882a593Smuzhiyun __cpu_to_le32(TARGET_10_4_THERMAL_THROTTLING_CONFIG);
6840*4882a593Smuzhiyun config.atf_config = __cpu_to_le32(TARGET_10_4_ATF_CONFIG);
6841*4882a593Smuzhiyun config.iphdr_pad_config = __cpu_to_le32(TARGET_10_4_IPHDR_PAD_CONFIG);
6842*4882a593Smuzhiyun config.qwrap_config = __cpu_to_le32(TARGET_10_4_QWRAP_CONFIG);
6843*4882a593Smuzhiyun
6844*4882a593Smuzhiyun buf = ath10k_wmi_alloc_skb(ar, struct_size(cmd, mem_chunks.items,
6845*4882a593Smuzhiyun ar->wmi.num_mem_chunks));
6846*4882a593Smuzhiyun if (!buf)
6847*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
6848*4882a593Smuzhiyun
6849*4882a593Smuzhiyun cmd = (struct wmi_init_cmd_10_4 *)buf->data;
6850*4882a593Smuzhiyun memcpy(&cmd->resource_config, &config, sizeof(config));
6851*4882a593Smuzhiyun ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks);
6852*4882a593Smuzhiyun
6853*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10.4\n");
6854*4882a593Smuzhiyun return buf;
6855*4882a593Smuzhiyun }
6856*4882a593Smuzhiyun
ath10k_wmi_start_scan_verify(const struct wmi_start_scan_arg * arg)6857*4882a593Smuzhiyun int ath10k_wmi_start_scan_verify(const struct wmi_start_scan_arg *arg)
6858*4882a593Smuzhiyun {
6859*4882a593Smuzhiyun if (arg->ie_len > WLAN_SCAN_PARAMS_MAX_IE_LEN)
6860*4882a593Smuzhiyun return -EINVAL;
6861*4882a593Smuzhiyun if (arg->n_channels > ARRAY_SIZE(arg->channels))
6862*4882a593Smuzhiyun return -EINVAL;
6863*4882a593Smuzhiyun if (arg->n_ssids > WLAN_SCAN_PARAMS_MAX_SSID)
6864*4882a593Smuzhiyun return -EINVAL;
6865*4882a593Smuzhiyun if (arg->n_bssids > WLAN_SCAN_PARAMS_MAX_BSSID)
6866*4882a593Smuzhiyun return -EINVAL;
6867*4882a593Smuzhiyun
6868*4882a593Smuzhiyun return 0;
6869*4882a593Smuzhiyun }
6870*4882a593Smuzhiyun
6871*4882a593Smuzhiyun static size_t
ath10k_wmi_start_scan_tlvs_len(const struct wmi_start_scan_arg * arg)6872*4882a593Smuzhiyun ath10k_wmi_start_scan_tlvs_len(const struct wmi_start_scan_arg *arg)
6873*4882a593Smuzhiyun {
6874*4882a593Smuzhiyun int len = 0;
6875*4882a593Smuzhiyun
6876*4882a593Smuzhiyun if (arg->ie_len) {
6877*4882a593Smuzhiyun len += sizeof(struct wmi_ie_data);
6878*4882a593Smuzhiyun len += roundup(arg->ie_len, 4);
6879*4882a593Smuzhiyun }
6880*4882a593Smuzhiyun
6881*4882a593Smuzhiyun if (arg->n_channels) {
6882*4882a593Smuzhiyun len += sizeof(struct wmi_chan_list);
6883*4882a593Smuzhiyun len += sizeof(__le32) * arg->n_channels;
6884*4882a593Smuzhiyun }
6885*4882a593Smuzhiyun
6886*4882a593Smuzhiyun if (arg->n_ssids) {
6887*4882a593Smuzhiyun len += sizeof(struct wmi_ssid_list);
6888*4882a593Smuzhiyun len += sizeof(struct wmi_ssid) * arg->n_ssids;
6889*4882a593Smuzhiyun }
6890*4882a593Smuzhiyun
6891*4882a593Smuzhiyun if (arg->n_bssids) {
6892*4882a593Smuzhiyun len += sizeof(struct wmi_bssid_list);
6893*4882a593Smuzhiyun len += sizeof(struct wmi_mac_addr) * arg->n_bssids;
6894*4882a593Smuzhiyun }
6895*4882a593Smuzhiyun
6896*4882a593Smuzhiyun return len;
6897*4882a593Smuzhiyun }
6898*4882a593Smuzhiyun
ath10k_wmi_put_start_scan_common(struct wmi_start_scan_common * cmn,const struct wmi_start_scan_arg * arg)6899*4882a593Smuzhiyun void ath10k_wmi_put_start_scan_common(struct wmi_start_scan_common *cmn,
6900*4882a593Smuzhiyun const struct wmi_start_scan_arg *arg)
6901*4882a593Smuzhiyun {
6902*4882a593Smuzhiyun u32 scan_id;
6903*4882a593Smuzhiyun u32 scan_req_id;
6904*4882a593Smuzhiyun
6905*4882a593Smuzhiyun scan_id = WMI_HOST_SCAN_REQ_ID_PREFIX;
6906*4882a593Smuzhiyun scan_id |= arg->scan_id;
6907*4882a593Smuzhiyun
6908*4882a593Smuzhiyun scan_req_id = WMI_HOST_SCAN_REQUESTOR_ID_PREFIX;
6909*4882a593Smuzhiyun scan_req_id |= arg->scan_req_id;
6910*4882a593Smuzhiyun
6911*4882a593Smuzhiyun cmn->scan_id = __cpu_to_le32(scan_id);
6912*4882a593Smuzhiyun cmn->scan_req_id = __cpu_to_le32(scan_req_id);
6913*4882a593Smuzhiyun cmn->vdev_id = __cpu_to_le32(arg->vdev_id);
6914*4882a593Smuzhiyun cmn->scan_priority = __cpu_to_le32(arg->scan_priority);
6915*4882a593Smuzhiyun cmn->notify_scan_events = __cpu_to_le32(arg->notify_scan_events);
6916*4882a593Smuzhiyun cmn->dwell_time_active = __cpu_to_le32(arg->dwell_time_active);
6917*4882a593Smuzhiyun cmn->dwell_time_passive = __cpu_to_le32(arg->dwell_time_passive);
6918*4882a593Smuzhiyun cmn->min_rest_time = __cpu_to_le32(arg->min_rest_time);
6919*4882a593Smuzhiyun cmn->max_rest_time = __cpu_to_le32(arg->max_rest_time);
6920*4882a593Smuzhiyun cmn->repeat_probe_time = __cpu_to_le32(arg->repeat_probe_time);
6921*4882a593Smuzhiyun cmn->probe_spacing_time = __cpu_to_le32(arg->probe_spacing_time);
6922*4882a593Smuzhiyun cmn->idle_time = __cpu_to_le32(arg->idle_time);
6923*4882a593Smuzhiyun cmn->max_scan_time = __cpu_to_le32(arg->max_scan_time);
6924*4882a593Smuzhiyun cmn->probe_delay = __cpu_to_le32(arg->probe_delay);
6925*4882a593Smuzhiyun cmn->scan_ctrl_flags = __cpu_to_le32(arg->scan_ctrl_flags);
6926*4882a593Smuzhiyun }
6927*4882a593Smuzhiyun
6928*4882a593Smuzhiyun static void
ath10k_wmi_put_start_scan_tlvs(struct wmi_start_scan_tlvs * tlvs,const struct wmi_start_scan_arg * arg)6929*4882a593Smuzhiyun ath10k_wmi_put_start_scan_tlvs(struct wmi_start_scan_tlvs *tlvs,
6930*4882a593Smuzhiyun const struct wmi_start_scan_arg *arg)
6931*4882a593Smuzhiyun {
6932*4882a593Smuzhiyun struct wmi_ie_data *ie;
6933*4882a593Smuzhiyun struct wmi_chan_list *channels;
6934*4882a593Smuzhiyun struct wmi_ssid_list *ssids;
6935*4882a593Smuzhiyun struct wmi_bssid_list *bssids;
6936*4882a593Smuzhiyun void *ptr = tlvs->tlvs;
6937*4882a593Smuzhiyun int i;
6938*4882a593Smuzhiyun
6939*4882a593Smuzhiyun if (arg->n_channels) {
6940*4882a593Smuzhiyun channels = ptr;
6941*4882a593Smuzhiyun channels->tag = __cpu_to_le32(WMI_CHAN_LIST_TAG);
6942*4882a593Smuzhiyun channels->num_chan = __cpu_to_le32(arg->n_channels);
6943*4882a593Smuzhiyun
6944*4882a593Smuzhiyun for (i = 0; i < arg->n_channels; i++)
6945*4882a593Smuzhiyun channels->channel_list[i].freq =
6946*4882a593Smuzhiyun __cpu_to_le16(arg->channels[i]);
6947*4882a593Smuzhiyun
6948*4882a593Smuzhiyun ptr += sizeof(*channels);
6949*4882a593Smuzhiyun ptr += sizeof(__le32) * arg->n_channels;
6950*4882a593Smuzhiyun }
6951*4882a593Smuzhiyun
6952*4882a593Smuzhiyun if (arg->n_ssids) {
6953*4882a593Smuzhiyun ssids = ptr;
6954*4882a593Smuzhiyun ssids->tag = __cpu_to_le32(WMI_SSID_LIST_TAG);
6955*4882a593Smuzhiyun ssids->num_ssids = __cpu_to_le32(arg->n_ssids);
6956*4882a593Smuzhiyun
6957*4882a593Smuzhiyun for (i = 0; i < arg->n_ssids; i++) {
6958*4882a593Smuzhiyun ssids->ssids[i].ssid_len =
6959*4882a593Smuzhiyun __cpu_to_le32(arg->ssids[i].len);
6960*4882a593Smuzhiyun memcpy(&ssids->ssids[i].ssid,
6961*4882a593Smuzhiyun arg->ssids[i].ssid,
6962*4882a593Smuzhiyun arg->ssids[i].len);
6963*4882a593Smuzhiyun }
6964*4882a593Smuzhiyun
6965*4882a593Smuzhiyun ptr += sizeof(*ssids);
6966*4882a593Smuzhiyun ptr += sizeof(struct wmi_ssid) * arg->n_ssids;
6967*4882a593Smuzhiyun }
6968*4882a593Smuzhiyun
6969*4882a593Smuzhiyun if (arg->n_bssids) {
6970*4882a593Smuzhiyun bssids = ptr;
6971*4882a593Smuzhiyun bssids->tag = __cpu_to_le32(WMI_BSSID_LIST_TAG);
6972*4882a593Smuzhiyun bssids->num_bssid = __cpu_to_le32(arg->n_bssids);
6973*4882a593Smuzhiyun
6974*4882a593Smuzhiyun for (i = 0; i < arg->n_bssids; i++)
6975*4882a593Smuzhiyun ether_addr_copy(bssids->bssid_list[i].addr,
6976*4882a593Smuzhiyun arg->bssids[i].bssid);
6977*4882a593Smuzhiyun
6978*4882a593Smuzhiyun ptr += sizeof(*bssids);
6979*4882a593Smuzhiyun ptr += sizeof(struct wmi_mac_addr) * arg->n_bssids;
6980*4882a593Smuzhiyun }
6981*4882a593Smuzhiyun
6982*4882a593Smuzhiyun if (arg->ie_len) {
6983*4882a593Smuzhiyun ie = ptr;
6984*4882a593Smuzhiyun ie->tag = __cpu_to_le32(WMI_IE_TAG);
6985*4882a593Smuzhiyun ie->ie_len = __cpu_to_le32(arg->ie_len);
6986*4882a593Smuzhiyun memcpy(ie->ie_data, arg->ie, arg->ie_len);
6987*4882a593Smuzhiyun
6988*4882a593Smuzhiyun ptr += sizeof(*ie);
6989*4882a593Smuzhiyun ptr += roundup(arg->ie_len, 4);
6990*4882a593Smuzhiyun }
6991*4882a593Smuzhiyun }
6992*4882a593Smuzhiyun
6993*4882a593Smuzhiyun static struct sk_buff *
ath10k_wmi_op_gen_start_scan(struct ath10k * ar,const struct wmi_start_scan_arg * arg)6994*4882a593Smuzhiyun ath10k_wmi_op_gen_start_scan(struct ath10k *ar,
6995*4882a593Smuzhiyun const struct wmi_start_scan_arg *arg)
6996*4882a593Smuzhiyun {
6997*4882a593Smuzhiyun struct wmi_start_scan_cmd *cmd;
6998*4882a593Smuzhiyun struct sk_buff *skb;
6999*4882a593Smuzhiyun size_t len;
7000*4882a593Smuzhiyun int ret;
7001*4882a593Smuzhiyun
7002*4882a593Smuzhiyun ret = ath10k_wmi_start_scan_verify(arg);
7003*4882a593Smuzhiyun if (ret)
7004*4882a593Smuzhiyun return ERR_PTR(ret);
7005*4882a593Smuzhiyun
7006*4882a593Smuzhiyun len = sizeof(*cmd) + ath10k_wmi_start_scan_tlvs_len(arg);
7007*4882a593Smuzhiyun skb = ath10k_wmi_alloc_skb(ar, len);
7008*4882a593Smuzhiyun if (!skb)
7009*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
7010*4882a593Smuzhiyun
7011*4882a593Smuzhiyun cmd = (struct wmi_start_scan_cmd *)skb->data;
7012*4882a593Smuzhiyun
7013*4882a593Smuzhiyun ath10k_wmi_put_start_scan_common(&cmd->common, arg);
7014*4882a593Smuzhiyun ath10k_wmi_put_start_scan_tlvs(&cmd->tlvs, arg);
7015*4882a593Smuzhiyun
7016*4882a593Smuzhiyun cmd->burst_duration_ms = __cpu_to_le32(0);
7017*4882a593Smuzhiyun
7018*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi start scan\n");
7019*4882a593Smuzhiyun return skb;
7020*4882a593Smuzhiyun }
7021*4882a593Smuzhiyun
7022*4882a593Smuzhiyun static struct sk_buff *
ath10k_wmi_10x_op_gen_start_scan(struct ath10k * ar,const struct wmi_start_scan_arg * arg)7023*4882a593Smuzhiyun ath10k_wmi_10x_op_gen_start_scan(struct ath10k *ar,
7024*4882a593Smuzhiyun const struct wmi_start_scan_arg *arg)
7025*4882a593Smuzhiyun {
7026*4882a593Smuzhiyun struct wmi_10x_start_scan_cmd *cmd;
7027*4882a593Smuzhiyun struct sk_buff *skb;
7028*4882a593Smuzhiyun size_t len;
7029*4882a593Smuzhiyun int ret;
7030*4882a593Smuzhiyun
7031*4882a593Smuzhiyun ret = ath10k_wmi_start_scan_verify(arg);
7032*4882a593Smuzhiyun if (ret)
7033*4882a593Smuzhiyun return ERR_PTR(ret);
7034*4882a593Smuzhiyun
7035*4882a593Smuzhiyun len = sizeof(*cmd) + ath10k_wmi_start_scan_tlvs_len(arg);
7036*4882a593Smuzhiyun skb = ath10k_wmi_alloc_skb(ar, len);
7037*4882a593Smuzhiyun if (!skb)
7038*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
7039*4882a593Smuzhiyun
7040*4882a593Smuzhiyun cmd = (struct wmi_10x_start_scan_cmd *)skb->data;
7041*4882a593Smuzhiyun
7042*4882a593Smuzhiyun ath10k_wmi_put_start_scan_common(&cmd->common, arg);
7043*4882a593Smuzhiyun ath10k_wmi_put_start_scan_tlvs(&cmd->tlvs, arg);
7044*4882a593Smuzhiyun
7045*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi 10x start scan\n");
7046*4882a593Smuzhiyun return skb;
7047*4882a593Smuzhiyun }
7048*4882a593Smuzhiyun
ath10k_wmi_start_scan_init(struct ath10k * ar,struct wmi_start_scan_arg * arg)7049*4882a593Smuzhiyun void ath10k_wmi_start_scan_init(struct ath10k *ar,
7050*4882a593Smuzhiyun struct wmi_start_scan_arg *arg)
7051*4882a593Smuzhiyun {
7052*4882a593Smuzhiyun /* setup commonly used values */
7053*4882a593Smuzhiyun arg->scan_req_id = 1;
7054*4882a593Smuzhiyun arg->scan_priority = WMI_SCAN_PRIORITY_LOW;
7055*4882a593Smuzhiyun arg->dwell_time_active = 50;
7056*4882a593Smuzhiyun arg->dwell_time_passive = 150;
7057*4882a593Smuzhiyun arg->min_rest_time = 50;
7058*4882a593Smuzhiyun arg->max_rest_time = 500;
7059*4882a593Smuzhiyun arg->repeat_probe_time = 0;
7060*4882a593Smuzhiyun arg->probe_spacing_time = 0;
7061*4882a593Smuzhiyun arg->idle_time = 0;
7062*4882a593Smuzhiyun arg->max_scan_time = 20000;
7063*4882a593Smuzhiyun arg->probe_delay = 5;
7064*4882a593Smuzhiyun arg->notify_scan_events = WMI_SCAN_EVENT_STARTED
7065*4882a593Smuzhiyun | WMI_SCAN_EVENT_COMPLETED
7066*4882a593Smuzhiyun | WMI_SCAN_EVENT_BSS_CHANNEL
7067*4882a593Smuzhiyun | WMI_SCAN_EVENT_FOREIGN_CHANNEL
7068*4882a593Smuzhiyun | WMI_SCAN_EVENT_FOREIGN_CHANNEL_EXIT
7069*4882a593Smuzhiyun | WMI_SCAN_EVENT_DEQUEUED;
7070*4882a593Smuzhiyun arg->scan_ctrl_flags |= WMI_SCAN_CHAN_STAT_EVENT;
7071*4882a593Smuzhiyun arg->n_bssids = 1;
7072*4882a593Smuzhiyun arg->bssids[0].bssid = "\xFF\xFF\xFF\xFF\xFF\xFF";
7073*4882a593Smuzhiyun }
7074*4882a593Smuzhiyun
7075*4882a593Smuzhiyun static struct sk_buff *
ath10k_wmi_op_gen_stop_scan(struct ath10k * ar,const struct wmi_stop_scan_arg * arg)7076*4882a593Smuzhiyun ath10k_wmi_op_gen_stop_scan(struct ath10k *ar,
7077*4882a593Smuzhiyun const struct wmi_stop_scan_arg *arg)
7078*4882a593Smuzhiyun {
7079*4882a593Smuzhiyun struct wmi_stop_scan_cmd *cmd;
7080*4882a593Smuzhiyun struct sk_buff *skb;
7081*4882a593Smuzhiyun u32 scan_id;
7082*4882a593Smuzhiyun u32 req_id;
7083*4882a593Smuzhiyun
7084*4882a593Smuzhiyun if (arg->req_id > 0xFFF)
7085*4882a593Smuzhiyun return ERR_PTR(-EINVAL);
7086*4882a593Smuzhiyun if (arg->req_type == WMI_SCAN_STOP_ONE && arg->u.scan_id > 0xFFF)
7087*4882a593Smuzhiyun return ERR_PTR(-EINVAL);
7088*4882a593Smuzhiyun
7089*4882a593Smuzhiyun skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7090*4882a593Smuzhiyun if (!skb)
7091*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
7092*4882a593Smuzhiyun
7093*4882a593Smuzhiyun scan_id = arg->u.scan_id;
7094*4882a593Smuzhiyun scan_id |= WMI_HOST_SCAN_REQ_ID_PREFIX;
7095*4882a593Smuzhiyun
7096*4882a593Smuzhiyun req_id = arg->req_id;
7097*4882a593Smuzhiyun req_id |= WMI_HOST_SCAN_REQUESTOR_ID_PREFIX;
7098*4882a593Smuzhiyun
7099*4882a593Smuzhiyun cmd = (struct wmi_stop_scan_cmd *)skb->data;
7100*4882a593Smuzhiyun cmd->req_type = __cpu_to_le32(arg->req_type);
7101*4882a593Smuzhiyun cmd->vdev_id = __cpu_to_le32(arg->u.vdev_id);
7102*4882a593Smuzhiyun cmd->scan_id = __cpu_to_le32(scan_id);
7103*4882a593Smuzhiyun cmd->scan_req_id = __cpu_to_le32(req_id);
7104*4882a593Smuzhiyun
7105*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI,
7106*4882a593Smuzhiyun "wmi stop scan reqid %d req_type %d vdev/scan_id %d\n",
7107*4882a593Smuzhiyun arg->req_id, arg->req_type, arg->u.scan_id);
7108*4882a593Smuzhiyun return skb;
7109*4882a593Smuzhiyun }
7110*4882a593Smuzhiyun
7111*4882a593Smuzhiyun static struct sk_buff *
ath10k_wmi_op_gen_vdev_create(struct ath10k * ar,u32 vdev_id,enum wmi_vdev_type type,enum wmi_vdev_subtype subtype,const u8 macaddr[ETH_ALEN])7112*4882a593Smuzhiyun ath10k_wmi_op_gen_vdev_create(struct ath10k *ar, u32 vdev_id,
7113*4882a593Smuzhiyun enum wmi_vdev_type type,
7114*4882a593Smuzhiyun enum wmi_vdev_subtype subtype,
7115*4882a593Smuzhiyun const u8 macaddr[ETH_ALEN])
7116*4882a593Smuzhiyun {
7117*4882a593Smuzhiyun struct wmi_vdev_create_cmd *cmd;
7118*4882a593Smuzhiyun struct sk_buff *skb;
7119*4882a593Smuzhiyun
7120*4882a593Smuzhiyun skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7121*4882a593Smuzhiyun if (!skb)
7122*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
7123*4882a593Smuzhiyun
7124*4882a593Smuzhiyun cmd = (struct wmi_vdev_create_cmd *)skb->data;
7125*4882a593Smuzhiyun cmd->vdev_id = __cpu_to_le32(vdev_id);
7126*4882a593Smuzhiyun cmd->vdev_type = __cpu_to_le32(type);
7127*4882a593Smuzhiyun cmd->vdev_subtype = __cpu_to_le32(subtype);
7128*4882a593Smuzhiyun ether_addr_copy(cmd->vdev_macaddr.addr, macaddr);
7129*4882a593Smuzhiyun
7130*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI,
7131*4882a593Smuzhiyun "WMI vdev create: id %d type %d subtype %d macaddr %pM\n",
7132*4882a593Smuzhiyun vdev_id, type, subtype, macaddr);
7133*4882a593Smuzhiyun return skb;
7134*4882a593Smuzhiyun }
7135*4882a593Smuzhiyun
7136*4882a593Smuzhiyun static struct sk_buff *
ath10k_wmi_op_gen_vdev_delete(struct ath10k * ar,u32 vdev_id)7137*4882a593Smuzhiyun ath10k_wmi_op_gen_vdev_delete(struct ath10k *ar, u32 vdev_id)
7138*4882a593Smuzhiyun {
7139*4882a593Smuzhiyun struct wmi_vdev_delete_cmd *cmd;
7140*4882a593Smuzhiyun struct sk_buff *skb;
7141*4882a593Smuzhiyun
7142*4882a593Smuzhiyun skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7143*4882a593Smuzhiyun if (!skb)
7144*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
7145*4882a593Smuzhiyun
7146*4882a593Smuzhiyun cmd = (struct wmi_vdev_delete_cmd *)skb->data;
7147*4882a593Smuzhiyun cmd->vdev_id = __cpu_to_le32(vdev_id);
7148*4882a593Smuzhiyun
7149*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI,
7150*4882a593Smuzhiyun "WMI vdev delete id %d\n", vdev_id);
7151*4882a593Smuzhiyun return skb;
7152*4882a593Smuzhiyun }
7153*4882a593Smuzhiyun
7154*4882a593Smuzhiyun static struct sk_buff *
ath10k_wmi_op_gen_vdev_start(struct ath10k * ar,const struct wmi_vdev_start_request_arg * arg,bool restart)7155*4882a593Smuzhiyun ath10k_wmi_op_gen_vdev_start(struct ath10k *ar,
7156*4882a593Smuzhiyun const struct wmi_vdev_start_request_arg *arg,
7157*4882a593Smuzhiyun bool restart)
7158*4882a593Smuzhiyun {
7159*4882a593Smuzhiyun struct wmi_vdev_start_request_cmd *cmd;
7160*4882a593Smuzhiyun struct sk_buff *skb;
7161*4882a593Smuzhiyun const char *cmdname;
7162*4882a593Smuzhiyun u32 flags = 0;
7163*4882a593Smuzhiyun
7164*4882a593Smuzhiyun if (WARN_ON(arg->hidden_ssid && !arg->ssid))
7165*4882a593Smuzhiyun return ERR_PTR(-EINVAL);
7166*4882a593Smuzhiyun if (WARN_ON(arg->ssid_len > sizeof(cmd->ssid.ssid)))
7167*4882a593Smuzhiyun return ERR_PTR(-EINVAL);
7168*4882a593Smuzhiyun
7169*4882a593Smuzhiyun if (restart)
7170*4882a593Smuzhiyun cmdname = "restart";
7171*4882a593Smuzhiyun else
7172*4882a593Smuzhiyun cmdname = "start";
7173*4882a593Smuzhiyun
7174*4882a593Smuzhiyun skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7175*4882a593Smuzhiyun if (!skb)
7176*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
7177*4882a593Smuzhiyun
7178*4882a593Smuzhiyun if (arg->hidden_ssid)
7179*4882a593Smuzhiyun flags |= WMI_VDEV_START_HIDDEN_SSID;
7180*4882a593Smuzhiyun if (arg->pmf_enabled)
7181*4882a593Smuzhiyun flags |= WMI_VDEV_START_PMF_ENABLED;
7182*4882a593Smuzhiyun
7183*4882a593Smuzhiyun cmd = (struct wmi_vdev_start_request_cmd *)skb->data;
7184*4882a593Smuzhiyun cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
7185*4882a593Smuzhiyun cmd->disable_hw_ack = __cpu_to_le32(arg->disable_hw_ack);
7186*4882a593Smuzhiyun cmd->beacon_interval = __cpu_to_le32(arg->bcn_intval);
7187*4882a593Smuzhiyun cmd->dtim_period = __cpu_to_le32(arg->dtim_period);
7188*4882a593Smuzhiyun cmd->flags = __cpu_to_le32(flags);
7189*4882a593Smuzhiyun cmd->bcn_tx_rate = __cpu_to_le32(arg->bcn_tx_rate);
7190*4882a593Smuzhiyun cmd->bcn_tx_power = __cpu_to_le32(arg->bcn_tx_power);
7191*4882a593Smuzhiyun
7192*4882a593Smuzhiyun if (arg->ssid) {
7193*4882a593Smuzhiyun cmd->ssid.ssid_len = __cpu_to_le32(arg->ssid_len);
7194*4882a593Smuzhiyun memcpy(cmd->ssid.ssid, arg->ssid, arg->ssid_len);
7195*4882a593Smuzhiyun }
7196*4882a593Smuzhiyun
7197*4882a593Smuzhiyun ath10k_wmi_put_wmi_channel(ar, &cmd->chan, &arg->channel);
7198*4882a593Smuzhiyun
7199*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI,
7200*4882a593Smuzhiyun "wmi vdev %s id 0x%x flags: 0x%0X, freq %d, mode %d, ch_flags: 0x%0X, max_power: %d\n",
7201*4882a593Smuzhiyun cmdname, arg->vdev_id,
7202*4882a593Smuzhiyun flags, arg->channel.freq, arg->channel.mode,
7203*4882a593Smuzhiyun cmd->chan.flags, arg->channel.max_power);
7204*4882a593Smuzhiyun
7205*4882a593Smuzhiyun return skb;
7206*4882a593Smuzhiyun }
7207*4882a593Smuzhiyun
7208*4882a593Smuzhiyun static struct sk_buff *
ath10k_wmi_op_gen_vdev_stop(struct ath10k * ar,u32 vdev_id)7209*4882a593Smuzhiyun ath10k_wmi_op_gen_vdev_stop(struct ath10k *ar, u32 vdev_id)
7210*4882a593Smuzhiyun {
7211*4882a593Smuzhiyun struct wmi_vdev_stop_cmd *cmd;
7212*4882a593Smuzhiyun struct sk_buff *skb;
7213*4882a593Smuzhiyun
7214*4882a593Smuzhiyun skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7215*4882a593Smuzhiyun if (!skb)
7216*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
7217*4882a593Smuzhiyun
7218*4882a593Smuzhiyun cmd = (struct wmi_vdev_stop_cmd *)skb->data;
7219*4882a593Smuzhiyun cmd->vdev_id = __cpu_to_le32(vdev_id);
7220*4882a593Smuzhiyun
7221*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi vdev stop id 0x%x\n", vdev_id);
7222*4882a593Smuzhiyun return skb;
7223*4882a593Smuzhiyun }
7224*4882a593Smuzhiyun
7225*4882a593Smuzhiyun static struct sk_buff *
ath10k_wmi_op_gen_vdev_up(struct ath10k * ar,u32 vdev_id,u32 aid,const u8 * bssid)7226*4882a593Smuzhiyun ath10k_wmi_op_gen_vdev_up(struct ath10k *ar, u32 vdev_id, u32 aid,
7227*4882a593Smuzhiyun const u8 *bssid)
7228*4882a593Smuzhiyun {
7229*4882a593Smuzhiyun struct wmi_vdev_up_cmd *cmd;
7230*4882a593Smuzhiyun struct sk_buff *skb;
7231*4882a593Smuzhiyun
7232*4882a593Smuzhiyun skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7233*4882a593Smuzhiyun if (!skb)
7234*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
7235*4882a593Smuzhiyun
7236*4882a593Smuzhiyun cmd = (struct wmi_vdev_up_cmd *)skb->data;
7237*4882a593Smuzhiyun cmd->vdev_id = __cpu_to_le32(vdev_id);
7238*4882a593Smuzhiyun cmd->vdev_assoc_id = __cpu_to_le32(aid);
7239*4882a593Smuzhiyun ether_addr_copy(cmd->vdev_bssid.addr, bssid);
7240*4882a593Smuzhiyun
7241*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI,
7242*4882a593Smuzhiyun "wmi mgmt vdev up id 0x%x assoc id %d bssid %pM\n",
7243*4882a593Smuzhiyun vdev_id, aid, bssid);
7244*4882a593Smuzhiyun return skb;
7245*4882a593Smuzhiyun }
7246*4882a593Smuzhiyun
7247*4882a593Smuzhiyun static struct sk_buff *
ath10k_wmi_op_gen_vdev_down(struct ath10k * ar,u32 vdev_id)7248*4882a593Smuzhiyun ath10k_wmi_op_gen_vdev_down(struct ath10k *ar, u32 vdev_id)
7249*4882a593Smuzhiyun {
7250*4882a593Smuzhiyun struct wmi_vdev_down_cmd *cmd;
7251*4882a593Smuzhiyun struct sk_buff *skb;
7252*4882a593Smuzhiyun
7253*4882a593Smuzhiyun skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7254*4882a593Smuzhiyun if (!skb)
7255*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
7256*4882a593Smuzhiyun
7257*4882a593Smuzhiyun cmd = (struct wmi_vdev_down_cmd *)skb->data;
7258*4882a593Smuzhiyun cmd->vdev_id = __cpu_to_le32(vdev_id);
7259*4882a593Smuzhiyun
7260*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI,
7261*4882a593Smuzhiyun "wmi mgmt vdev down id 0x%x\n", vdev_id);
7262*4882a593Smuzhiyun return skb;
7263*4882a593Smuzhiyun }
7264*4882a593Smuzhiyun
7265*4882a593Smuzhiyun static struct sk_buff *
ath10k_wmi_op_gen_vdev_set_param(struct ath10k * ar,u32 vdev_id,u32 param_id,u32 param_value)7266*4882a593Smuzhiyun ath10k_wmi_op_gen_vdev_set_param(struct ath10k *ar, u32 vdev_id,
7267*4882a593Smuzhiyun u32 param_id, u32 param_value)
7268*4882a593Smuzhiyun {
7269*4882a593Smuzhiyun struct wmi_vdev_set_param_cmd *cmd;
7270*4882a593Smuzhiyun struct sk_buff *skb;
7271*4882a593Smuzhiyun
7272*4882a593Smuzhiyun if (param_id == WMI_VDEV_PARAM_UNSUPPORTED) {
7273*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI,
7274*4882a593Smuzhiyun "vdev param %d not supported by firmware\n",
7275*4882a593Smuzhiyun param_id);
7276*4882a593Smuzhiyun return ERR_PTR(-EOPNOTSUPP);
7277*4882a593Smuzhiyun }
7278*4882a593Smuzhiyun
7279*4882a593Smuzhiyun skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7280*4882a593Smuzhiyun if (!skb)
7281*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
7282*4882a593Smuzhiyun
7283*4882a593Smuzhiyun cmd = (struct wmi_vdev_set_param_cmd *)skb->data;
7284*4882a593Smuzhiyun cmd->vdev_id = __cpu_to_le32(vdev_id);
7285*4882a593Smuzhiyun cmd->param_id = __cpu_to_le32(param_id);
7286*4882a593Smuzhiyun cmd->param_value = __cpu_to_le32(param_value);
7287*4882a593Smuzhiyun
7288*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI,
7289*4882a593Smuzhiyun "wmi vdev id 0x%x set param %d value %d\n",
7290*4882a593Smuzhiyun vdev_id, param_id, param_value);
7291*4882a593Smuzhiyun return skb;
7292*4882a593Smuzhiyun }
7293*4882a593Smuzhiyun
7294*4882a593Smuzhiyun static struct sk_buff *
ath10k_wmi_op_gen_vdev_install_key(struct ath10k * ar,const struct wmi_vdev_install_key_arg * arg)7295*4882a593Smuzhiyun ath10k_wmi_op_gen_vdev_install_key(struct ath10k *ar,
7296*4882a593Smuzhiyun const struct wmi_vdev_install_key_arg *arg)
7297*4882a593Smuzhiyun {
7298*4882a593Smuzhiyun struct wmi_vdev_install_key_cmd *cmd;
7299*4882a593Smuzhiyun struct sk_buff *skb;
7300*4882a593Smuzhiyun
7301*4882a593Smuzhiyun if (arg->key_cipher == WMI_CIPHER_NONE && arg->key_data != NULL)
7302*4882a593Smuzhiyun return ERR_PTR(-EINVAL);
7303*4882a593Smuzhiyun if (arg->key_cipher != WMI_CIPHER_NONE && arg->key_data == NULL)
7304*4882a593Smuzhiyun return ERR_PTR(-EINVAL);
7305*4882a593Smuzhiyun
7306*4882a593Smuzhiyun skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd) + arg->key_len);
7307*4882a593Smuzhiyun if (!skb)
7308*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
7309*4882a593Smuzhiyun
7310*4882a593Smuzhiyun cmd = (struct wmi_vdev_install_key_cmd *)skb->data;
7311*4882a593Smuzhiyun cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
7312*4882a593Smuzhiyun cmd->key_idx = __cpu_to_le32(arg->key_idx);
7313*4882a593Smuzhiyun cmd->key_flags = __cpu_to_le32(arg->key_flags);
7314*4882a593Smuzhiyun cmd->key_cipher = __cpu_to_le32(arg->key_cipher);
7315*4882a593Smuzhiyun cmd->key_len = __cpu_to_le32(arg->key_len);
7316*4882a593Smuzhiyun cmd->key_txmic_len = __cpu_to_le32(arg->key_txmic_len);
7317*4882a593Smuzhiyun cmd->key_rxmic_len = __cpu_to_le32(arg->key_rxmic_len);
7318*4882a593Smuzhiyun
7319*4882a593Smuzhiyun if (arg->macaddr)
7320*4882a593Smuzhiyun ether_addr_copy(cmd->peer_macaddr.addr, arg->macaddr);
7321*4882a593Smuzhiyun if (arg->key_data)
7322*4882a593Smuzhiyun memcpy(cmd->key_data, arg->key_data, arg->key_len);
7323*4882a593Smuzhiyun
7324*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI,
7325*4882a593Smuzhiyun "wmi vdev install key idx %d cipher %d len %d\n",
7326*4882a593Smuzhiyun arg->key_idx, arg->key_cipher, arg->key_len);
7327*4882a593Smuzhiyun return skb;
7328*4882a593Smuzhiyun }
7329*4882a593Smuzhiyun
7330*4882a593Smuzhiyun static struct sk_buff *
ath10k_wmi_op_gen_vdev_spectral_conf(struct ath10k * ar,const struct wmi_vdev_spectral_conf_arg * arg)7331*4882a593Smuzhiyun ath10k_wmi_op_gen_vdev_spectral_conf(struct ath10k *ar,
7332*4882a593Smuzhiyun const struct wmi_vdev_spectral_conf_arg *arg)
7333*4882a593Smuzhiyun {
7334*4882a593Smuzhiyun struct wmi_vdev_spectral_conf_cmd *cmd;
7335*4882a593Smuzhiyun struct sk_buff *skb;
7336*4882a593Smuzhiyun
7337*4882a593Smuzhiyun skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7338*4882a593Smuzhiyun if (!skb)
7339*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
7340*4882a593Smuzhiyun
7341*4882a593Smuzhiyun cmd = (struct wmi_vdev_spectral_conf_cmd *)skb->data;
7342*4882a593Smuzhiyun cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
7343*4882a593Smuzhiyun cmd->scan_count = __cpu_to_le32(arg->scan_count);
7344*4882a593Smuzhiyun cmd->scan_period = __cpu_to_le32(arg->scan_period);
7345*4882a593Smuzhiyun cmd->scan_priority = __cpu_to_le32(arg->scan_priority);
7346*4882a593Smuzhiyun cmd->scan_fft_size = __cpu_to_le32(arg->scan_fft_size);
7347*4882a593Smuzhiyun cmd->scan_gc_ena = __cpu_to_le32(arg->scan_gc_ena);
7348*4882a593Smuzhiyun cmd->scan_restart_ena = __cpu_to_le32(arg->scan_restart_ena);
7349*4882a593Smuzhiyun cmd->scan_noise_floor_ref = __cpu_to_le32(arg->scan_noise_floor_ref);
7350*4882a593Smuzhiyun cmd->scan_init_delay = __cpu_to_le32(arg->scan_init_delay);
7351*4882a593Smuzhiyun cmd->scan_nb_tone_thr = __cpu_to_le32(arg->scan_nb_tone_thr);
7352*4882a593Smuzhiyun cmd->scan_str_bin_thr = __cpu_to_le32(arg->scan_str_bin_thr);
7353*4882a593Smuzhiyun cmd->scan_wb_rpt_mode = __cpu_to_le32(arg->scan_wb_rpt_mode);
7354*4882a593Smuzhiyun cmd->scan_rssi_rpt_mode = __cpu_to_le32(arg->scan_rssi_rpt_mode);
7355*4882a593Smuzhiyun cmd->scan_rssi_thr = __cpu_to_le32(arg->scan_rssi_thr);
7356*4882a593Smuzhiyun cmd->scan_pwr_format = __cpu_to_le32(arg->scan_pwr_format);
7357*4882a593Smuzhiyun cmd->scan_rpt_mode = __cpu_to_le32(arg->scan_rpt_mode);
7358*4882a593Smuzhiyun cmd->scan_bin_scale = __cpu_to_le32(arg->scan_bin_scale);
7359*4882a593Smuzhiyun cmd->scan_dbm_adj = __cpu_to_le32(arg->scan_dbm_adj);
7360*4882a593Smuzhiyun cmd->scan_chn_mask = __cpu_to_le32(arg->scan_chn_mask);
7361*4882a593Smuzhiyun
7362*4882a593Smuzhiyun return skb;
7363*4882a593Smuzhiyun }
7364*4882a593Smuzhiyun
7365*4882a593Smuzhiyun static struct sk_buff *
ath10k_wmi_op_gen_vdev_spectral_enable(struct ath10k * ar,u32 vdev_id,u32 trigger,u32 enable)7366*4882a593Smuzhiyun ath10k_wmi_op_gen_vdev_spectral_enable(struct ath10k *ar, u32 vdev_id,
7367*4882a593Smuzhiyun u32 trigger, u32 enable)
7368*4882a593Smuzhiyun {
7369*4882a593Smuzhiyun struct wmi_vdev_spectral_enable_cmd *cmd;
7370*4882a593Smuzhiyun struct sk_buff *skb;
7371*4882a593Smuzhiyun
7372*4882a593Smuzhiyun skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7373*4882a593Smuzhiyun if (!skb)
7374*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
7375*4882a593Smuzhiyun
7376*4882a593Smuzhiyun cmd = (struct wmi_vdev_spectral_enable_cmd *)skb->data;
7377*4882a593Smuzhiyun cmd->vdev_id = __cpu_to_le32(vdev_id);
7378*4882a593Smuzhiyun cmd->trigger_cmd = __cpu_to_le32(trigger);
7379*4882a593Smuzhiyun cmd->enable_cmd = __cpu_to_le32(enable);
7380*4882a593Smuzhiyun
7381*4882a593Smuzhiyun return skb;
7382*4882a593Smuzhiyun }
7383*4882a593Smuzhiyun
7384*4882a593Smuzhiyun static struct sk_buff *
ath10k_wmi_op_gen_peer_create(struct ath10k * ar,u32 vdev_id,const u8 peer_addr[ETH_ALEN],enum wmi_peer_type peer_type)7385*4882a593Smuzhiyun ath10k_wmi_op_gen_peer_create(struct ath10k *ar, u32 vdev_id,
7386*4882a593Smuzhiyun const u8 peer_addr[ETH_ALEN],
7387*4882a593Smuzhiyun enum wmi_peer_type peer_type)
7388*4882a593Smuzhiyun {
7389*4882a593Smuzhiyun struct wmi_peer_create_cmd *cmd;
7390*4882a593Smuzhiyun struct sk_buff *skb;
7391*4882a593Smuzhiyun
7392*4882a593Smuzhiyun skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7393*4882a593Smuzhiyun if (!skb)
7394*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
7395*4882a593Smuzhiyun
7396*4882a593Smuzhiyun cmd = (struct wmi_peer_create_cmd *)skb->data;
7397*4882a593Smuzhiyun cmd->vdev_id = __cpu_to_le32(vdev_id);
7398*4882a593Smuzhiyun ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
7399*4882a593Smuzhiyun cmd->peer_type = __cpu_to_le32(peer_type);
7400*4882a593Smuzhiyun
7401*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI,
7402*4882a593Smuzhiyun "wmi peer create vdev_id %d peer_addr %pM\n",
7403*4882a593Smuzhiyun vdev_id, peer_addr);
7404*4882a593Smuzhiyun return skb;
7405*4882a593Smuzhiyun }
7406*4882a593Smuzhiyun
7407*4882a593Smuzhiyun static struct sk_buff *
ath10k_wmi_op_gen_peer_delete(struct ath10k * ar,u32 vdev_id,const u8 peer_addr[ETH_ALEN])7408*4882a593Smuzhiyun ath10k_wmi_op_gen_peer_delete(struct ath10k *ar, u32 vdev_id,
7409*4882a593Smuzhiyun const u8 peer_addr[ETH_ALEN])
7410*4882a593Smuzhiyun {
7411*4882a593Smuzhiyun struct wmi_peer_delete_cmd *cmd;
7412*4882a593Smuzhiyun struct sk_buff *skb;
7413*4882a593Smuzhiyun
7414*4882a593Smuzhiyun skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7415*4882a593Smuzhiyun if (!skb)
7416*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
7417*4882a593Smuzhiyun
7418*4882a593Smuzhiyun cmd = (struct wmi_peer_delete_cmd *)skb->data;
7419*4882a593Smuzhiyun cmd->vdev_id = __cpu_to_le32(vdev_id);
7420*4882a593Smuzhiyun ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
7421*4882a593Smuzhiyun
7422*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI,
7423*4882a593Smuzhiyun "wmi peer delete vdev_id %d peer_addr %pM\n",
7424*4882a593Smuzhiyun vdev_id, peer_addr);
7425*4882a593Smuzhiyun return skb;
7426*4882a593Smuzhiyun }
7427*4882a593Smuzhiyun
7428*4882a593Smuzhiyun static struct sk_buff *
ath10k_wmi_op_gen_peer_flush(struct ath10k * ar,u32 vdev_id,const u8 peer_addr[ETH_ALEN],u32 tid_bitmap)7429*4882a593Smuzhiyun ath10k_wmi_op_gen_peer_flush(struct ath10k *ar, u32 vdev_id,
7430*4882a593Smuzhiyun const u8 peer_addr[ETH_ALEN], u32 tid_bitmap)
7431*4882a593Smuzhiyun {
7432*4882a593Smuzhiyun struct wmi_peer_flush_tids_cmd *cmd;
7433*4882a593Smuzhiyun struct sk_buff *skb;
7434*4882a593Smuzhiyun
7435*4882a593Smuzhiyun skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7436*4882a593Smuzhiyun if (!skb)
7437*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
7438*4882a593Smuzhiyun
7439*4882a593Smuzhiyun cmd = (struct wmi_peer_flush_tids_cmd *)skb->data;
7440*4882a593Smuzhiyun cmd->vdev_id = __cpu_to_le32(vdev_id);
7441*4882a593Smuzhiyun cmd->peer_tid_bitmap = __cpu_to_le32(tid_bitmap);
7442*4882a593Smuzhiyun ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
7443*4882a593Smuzhiyun
7444*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI,
7445*4882a593Smuzhiyun "wmi peer flush vdev_id %d peer_addr %pM tids %08x\n",
7446*4882a593Smuzhiyun vdev_id, peer_addr, tid_bitmap);
7447*4882a593Smuzhiyun return skb;
7448*4882a593Smuzhiyun }
7449*4882a593Smuzhiyun
7450*4882a593Smuzhiyun static struct sk_buff *
ath10k_wmi_op_gen_peer_set_param(struct ath10k * ar,u32 vdev_id,const u8 * peer_addr,enum wmi_peer_param param_id,u32 param_value)7451*4882a593Smuzhiyun ath10k_wmi_op_gen_peer_set_param(struct ath10k *ar, u32 vdev_id,
7452*4882a593Smuzhiyun const u8 *peer_addr,
7453*4882a593Smuzhiyun enum wmi_peer_param param_id,
7454*4882a593Smuzhiyun u32 param_value)
7455*4882a593Smuzhiyun {
7456*4882a593Smuzhiyun struct wmi_peer_set_param_cmd *cmd;
7457*4882a593Smuzhiyun struct sk_buff *skb;
7458*4882a593Smuzhiyun
7459*4882a593Smuzhiyun skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7460*4882a593Smuzhiyun if (!skb)
7461*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
7462*4882a593Smuzhiyun
7463*4882a593Smuzhiyun cmd = (struct wmi_peer_set_param_cmd *)skb->data;
7464*4882a593Smuzhiyun cmd->vdev_id = __cpu_to_le32(vdev_id);
7465*4882a593Smuzhiyun cmd->param_id = __cpu_to_le32(param_id);
7466*4882a593Smuzhiyun cmd->param_value = __cpu_to_le32(param_value);
7467*4882a593Smuzhiyun ether_addr_copy(cmd->peer_macaddr.addr, peer_addr);
7468*4882a593Smuzhiyun
7469*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI,
7470*4882a593Smuzhiyun "wmi vdev %d peer 0x%pM set param %d value %d\n",
7471*4882a593Smuzhiyun vdev_id, peer_addr, param_id, param_value);
7472*4882a593Smuzhiyun return skb;
7473*4882a593Smuzhiyun }
7474*4882a593Smuzhiyun
7475*4882a593Smuzhiyun static struct sk_buff *
ath10k_wmi_op_gen_set_psmode(struct ath10k * ar,u32 vdev_id,enum wmi_sta_ps_mode psmode)7476*4882a593Smuzhiyun ath10k_wmi_op_gen_set_psmode(struct ath10k *ar, u32 vdev_id,
7477*4882a593Smuzhiyun enum wmi_sta_ps_mode psmode)
7478*4882a593Smuzhiyun {
7479*4882a593Smuzhiyun struct wmi_sta_powersave_mode_cmd *cmd;
7480*4882a593Smuzhiyun struct sk_buff *skb;
7481*4882a593Smuzhiyun
7482*4882a593Smuzhiyun skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7483*4882a593Smuzhiyun if (!skb)
7484*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
7485*4882a593Smuzhiyun
7486*4882a593Smuzhiyun cmd = (struct wmi_sta_powersave_mode_cmd *)skb->data;
7487*4882a593Smuzhiyun cmd->vdev_id = __cpu_to_le32(vdev_id);
7488*4882a593Smuzhiyun cmd->sta_ps_mode = __cpu_to_le32(psmode);
7489*4882a593Smuzhiyun
7490*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI,
7491*4882a593Smuzhiyun "wmi set powersave id 0x%x mode %d\n",
7492*4882a593Smuzhiyun vdev_id, psmode);
7493*4882a593Smuzhiyun return skb;
7494*4882a593Smuzhiyun }
7495*4882a593Smuzhiyun
7496*4882a593Smuzhiyun static struct sk_buff *
ath10k_wmi_op_gen_set_sta_ps(struct ath10k * ar,u32 vdev_id,enum wmi_sta_powersave_param param_id,u32 value)7497*4882a593Smuzhiyun ath10k_wmi_op_gen_set_sta_ps(struct ath10k *ar, u32 vdev_id,
7498*4882a593Smuzhiyun enum wmi_sta_powersave_param param_id,
7499*4882a593Smuzhiyun u32 value)
7500*4882a593Smuzhiyun {
7501*4882a593Smuzhiyun struct wmi_sta_powersave_param_cmd *cmd;
7502*4882a593Smuzhiyun struct sk_buff *skb;
7503*4882a593Smuzhiyun
7504*4882a593Smuzhiyun skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7505*4882a593Smuzhiyun if (!skb)
7506*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
7507*4882a593Smuzhiyun
7508*4882a593Smuzhiyun cmd = (struct wmi_sta_powersave_param_cmd *)skb->data;
7509*4882a593Smuzhiyun cmd->vdev_id = __cpu_to_le32(vdev_id);
7510*4882a593Smuzhiyun cmd->param_id = __cpu_to_le32(param_id);
7511*4882a593Smuzhiyun cmd->param_value = __cpu_to_le32(value);
7512*4882a593Smuzhiyun
7513*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI,
7514*4882a593Smuzhiyun "wmi sta ps param vdev_id 0x%x param %d value %d\n",
7515*4882a593Smuzhiyun vdev_id, param_id, value);
7516*4882a593Smuzhiyun return skb;
7517*4882a593Smuzhiyun }
7518*4882a593Smuzhiyun
7519*4882a593Smuzhiyun static struct sk_buff *
ath10k_wmi_op_gen_set_ap_ps(struct ath10k * ar,u32 vdev_id,const u8 * mac,enum wmi_ap_ps_peer_param param_id,u32 value)7520*4882a593Smuzhiyun ath10k_wmi_op_gen_set_ap_ps(struct ath10k *ar, u32 vdev_id, const u8 *mac,
7521*4882a593Smuzhiyun enum wmi_ap_ps_peer_param param_id, u32 value)
7522*4882a593Smuzhiyun {
7523*4882a593Smuzhiyun struct wmi_ap_ps_peer_cmd *cmd;
7524*4882a593Smuzhiyun struct sk_buff *skb;
7525*4882a593Smuzhiyun
7526*4882a593Smuzhiyun if (!mac)
7527*4882a593Smuzhiyun return ERR_PTR(-EINVAL);
7528*4882a593Smuzhiyun
7529*4882a593Smuzhiyun skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7530*4882a593Smuzhiyun if (!skb)
7531*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
7532*4882a593Smuzhiyun
7533*4882a593Smuzhiyun cmd = (struct wmi_ap_ps_peer_cmd *)skb->data;
7534*4882a593Smuzhiyun cmd->vdev_id = __cpu_to_le32(vdev_id);
7535*4882a593Smuzhiyun cmd->param_id = __cpu_to_le32(param_id);
7536*4882a593Smuzhiyun cmd->param_value = __cpu_to_le32(value);
7537*4882a593Smuzhiyun ether_addr_copy(cmd->peer_macaddr.addr, mac);
7538*4882a593Smuzhiyun
7539*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI,
7540*4882a593Smuzhiyun "wmi ap ps param vdev_id 0x%X param %d value %d mac_addr %pM\n",
7541*4882a593Smuzhiyun vdev_id, param_id, value, mac);
7542*4882a593Smuzhiyun return skb;
7543*4882a593Smuzhiyun }
7544*4882a593Smuzhiyun
7545*4882a593Smuzhiyun static struct sk_buff *
ath10k_wmi_op_gen_scan_chan_list(struct ath10k * ar,const struct wmi_scan_chan_list_arg * arg)7546*4882a593Smuzhiyun ath10k_wmi_op_gen_scan_chan_list(struct ath10k *ar,
7547*4882a593Smuzhiyun const struct wmi_scan_chan_list_arg *arg)
7548*4882a593Smuzhiyun {
7549*4882a593Smuzhiyun struct wmi_scan_chan_list_cmd *cmd;
7550*4882a593Smuzhiyun struct sk_buff *skb;
7551*4882a593Smuzhiyun struct wmi_channel_arg *ch;
7552*4882a593Smuzhiyun struct wmi_channel *ci;
7553*4882a593Smuzhiyun int i;
7554*4882a593Smuzhiyun
7555*4882a593Smuzhiyun skb = ath10k_wmi_alloc_skb(ar, struct_size(cmd, chan_info, arg->n_channels));
7556*4882a593Smuzhiyun if (!skb)
7557*4882a593Smuzhiyun return ERR_PTR(-EINVAL);
7558*4882a593Smuzhiyun
7559*4882a593Smuzhiyun cmd = (struct wmi_scan_chan_list_cmd *)skb->data;
7560*4882a593Smuzhiyun cmd->num_scan_chans = __cpu_to_le32(arg->n_channels);
7561*4882a593Smuzhiyun
7562*4882a593Smuzhiyun for (i = 0; i < arg->n_channels; i++) {
7563*4882a593Smuzhiyun ch = &arg->channels[i];
7564*4882a593Smuzhiyun ci = &cmd->chan_info[i];
7565*4882a593Smuzhiyun
7566*4882a593Smuzhiyun ath10k_wmi_put_wmi_channel(ar, ci, ch);
7567*4882a593Smuzhiyun }
7568*4882a593Smuzhiyun
7569*4882a593Smuzhiyun return skb;
7570*4882a593Smuzhiyun }
7571*4882a593Smuzhiyun
7572*4882a593Smuzhiyun static void
ath10k_wmi_peer_assoc_fill(struct ath10k * ar,void * buf,const struct wmi_peer_assoc_complete_arg * arg)7573*4882a593Smuzhiyun ath10k_wmi_peer_assoc_fill(struct ath10k *ar, void *buf,
7574*4882a593Smuzhiyun const struct wmi_peer_assoc_complete_arg *arg)
7575*4882a593Smuzhiyun {
7576*4882a593Smuzhiyun struct wmi_common_peer_assoc_complete_cmd *cmd = buf;
7577*4882a593Smuzhiyun
7578*4882a593Smuzhiyun cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
7579*4882a593Smuzhiyun cmd->peer_new_assoc = __cpu_to_le32(arg->peer_reassoc ? 0 : 1);
7580*4882a593Smuzhiyun cmd->peer_associd = __cpu_to_le32(arg->peer_aid);
7581*4882a593Smuzhiyun cmd->peer_flags = __cpu_to_le32(arg->peer_flags);
7582*4882a593Smuzhiyun cmd->peer_caps = __cpu_to_le32(arg->peer_caps);
7583*4882a593Smuzhiyun cmd->peer_listen_intval = __cpu_to_le32(arg->peer_listen_intval);
7584*4882a593Smuzhiyun cmd->peer_ht_caps = __cpu_to_le32(arg->peer_ht_caps);
7585*4882a593Smuzhiyun cmd->peer_max_mpdu = __cpu_to_le32(arg->peer_max_mpdu);
7586*4882a593Smuzhiyun cmd->peer_mpdu_density = __cpu_to_le32(arg->peer_mpdu_density);
7587*4882a593Smuzhiyun cmd->peer_rate_caps = __cpu_to_le32(arg->peer_rate_caps);
7588*4882a593Smuzhiyun cmd->peer_nss = __cpu_to_le32(arg->peer_num_spatial_streams);
7589*4882a593Smuzhiyun cmd->peer_vht_caps = __cpu_to_le32(arg->peer_vht_caps);
7590*4882a593Smuzhiyun cmd->peer_phymode = __cpu_to_le32(arg->peer_phymode);
7591*4882a593Smuzhiyun
7592*4882a593Smuzhiyun ether_addr_copy(cmd->peer_macaddr.addr, arg->addr);
7593*4882a593Smuzhiyun
7594*4882a593Smuzhiyun cmd->peer_legacy_rates.num_rates =
7595*4882a593Smuzhiyun __cpu_to_le32(arg->peer_legacy_rates.num_rates);
7596*4882a593Smuzhiyun memcpy(cmd->peer_legacy_rates.rates, arg->peer_legacy_rates.rates,
7597*4882a593Smuzhiyun arg->peer_legacy_rates.num_rates);
7598*4882a593Smuzhiyun
7599*4882a593Smuzhiyun cmd->peer_ht_rates.num_rates =
7600*4882a593Smuzhiyun __cpu_to_le32(arg->peer_ht_rates.num_rates);
7601*4882a593Smuzhiyun memcpy(cmd->peer_ht_rates.rates, arg->peer_ht_rates.rates,
7602*4882a593Smuzhiyun arg->peer_ht_rates.num_rates);
7603*4882a593Smuzhiyun
7604*4882a593Smuzhiyun cmd->peer_vht_rates.rx_max_rate =
7605*4882a593Smuzhiyun __cpu_to_le32(arg->peer_vht_rates.rx_max_rate);
7606*4882a593Smuzhiyun cmd->peer_vht_rates.rx_mcs_set =
7607*4882a593Smuzhiyun __cpu_to_le32(arg->peer_vht_rates.rx_mcs_set);
7608*4882a593Smuzhiyun cmd->peer_vht_rates.tx_max_rate =
7609*4882a593Smuzhiyun __cpu_to_le32(arg->peer_vht_rates.tx_max_rate);
7610*4882a593Smuzhiyun cmd->peer_vht_rates.tx_mcs_set =
7611*4882a593Smuzhiyun __cpu_to_le32(arg->peer_vht_rates.tx_mcs_set);
7612*4882a593Smuzhiyun }
7613*4882a593Smuzhiyun
7614*4882a593Smuzhiyun static void
ath10k_wmi_peer_assoc_fill_main(struct ath10k * ar,void * buf,const struct wmi_peer_assoc_complete_arg * arg)7615*4882a593Smuzhiyun ath10k_wmi_peer_assoc_fill_main(struct ath10k *ar, void *buf,
7616*4882a593Smuzhiyun const struct wmi_peer_assoc_complete_arg *arg)
7617*4882a593Smuzhiyun {
7618*4882a593Smuzhiyun struct wmi_main_peer_assoc_complete_cmd *cmd = buf;
7619*4882a593Smuzhiyun
7620*4882a593Smuzhiyun ath10k_wmi_peer_assoc_fill(ar, buf, arg);
7621*4882a593Smuzhiyun memset(cmd->peer_ht_info, 0, sizeof(cmd->peer_ht_info));
7622*4882a593Smuzhiyun }
7623*4882a593Smuzhiyun
7624*4882a593Smuzhiyun static void
ath10k_wmi_peer_assoc_fill_10_1(struct ath10k * ar,void * buf,const struct wmi_peer_assoc_complete_arg * arg)7625*4882a593Smuzhiyun ath10k_wmi_peer_assoc_fill_10_1(struct ath10k *ar, void *buf,
7626*4882a593Smuzhiyun const struct wmi_peer_assoc_complete_arg *arg)
7627*4882a593Smuzhiyun {
7628*4882a593Smuzhiyun ath10k_wmi_peer_assoc_fill(ar, buf, arg);
7629*4882a593Smuzhiyun }
7630*4882a593Smuzhiyun
7631*4882a593Smuzhiyun static void
ath10k_wmi_peer_assoc_fill_10_2(struct ath10k * ar,void * buf,const struct wmi_peer_assoc_complete_arg * arg)7632*4882a593Smuzhiyun ath10k_wmi_peer_assoc_fill_10_2(struct ath10k *ar, void *buf,
7633*4882a593Smuzhiyun const struct wmi_peer_assoc_complete_arg *arg)
7634*4882a593Smuzhiyun {
7635*4882a593Smuzhiyun struct wmi_10_2_peer_assoc_complete_cmd *cmd = buf;
7636*4882a593Smuzhiyun int max_mcs, max_nss;
7637*4882a593Smuzhiyun u32 info0;
7638*4882a593Smuzhiyun
7639*4882a593Smuzhiyun /* TODO: Is using max values okay with firmware? */
7640*4882a593Smuzhiyun max_mcs = 0xf;
7641*4882a593Smuzhiyun max_nss = 0xf;
7642*4882a593Smuzhiyun
7643*4882a593Smuzhiyun info0 = SM(max_mcs, WMI_PEER_ASSOC_INFO0_MAX_MCS_IDX) |
7644*4882a593Smuzhiyun SM(max_nss, WMI_PEER_ASSOC_INFO0_MAX_NSS);
7645*4882a593Smuzhiyun
7646*4882a593Smuzhiyun ath10k_wmi_peer_assoc_fill(ar, buf, arg);
7647*4882a593Smuzhiyun cmd->info0 = __cpu_to_le32(info0);
7648*4882a593Smuzhiyun }
7649*4882a593Smuzhiyun
7650*4882a593Smuzhiyun static void
ath10k_wmi_peer_assoc_fill_10_4(struct ath10k * ar,void * buf,const struct wmi_peer_assoc_complete_arg * arg)7651*4882a593Smuzhiyun ath10k_wmi_peer_assoc_fill_10_4(struct ath10k *ar, void *buf,
7652*4882a593Smuzhiyun const struct wmi_peer_assoc_complete_arg *arg)
7653*4882a593Smuzhiyun {
7654*4882a593Smuzhiyun struct wmi_10_4_peer_assoc_complete_cmd *cmd = buf;
7655*4882a593Smuzhiyun
7656*4882a593Smuzhiyun ath10k_wmi_peer_assoc_fill_10_2(ar, buf, arg);
7657*4882a593Smuzhiyun cmd->peer_bw_rxnss_override =
7658*4882a593Smuzhiyun __cpu_to_le32(arg->peer_bw_rxnss_override);
7659*4882a593Smuzhiyun }
7660*4882a593Smuzhiyun
7661*4882a593Smuzhiyun static int
ath10k_wmi_peer_assoc_check_arg(const struct wmi_peer_assoc_complete_arg * arg)7662*4882a593Smuzhiyun ath10k_wmi_peer_assoc_check_arg(const struct wmi_peer_assoc_complete_arg *arg)
7663*4882a593Smuzhiyun {
7664*4882a593Smuzhiyun if (arg->peer_mpdu_density > 16)
7665*4882a593Smuzhiyun return -EINVAL;
7666*4882a593Smuzhiyun if (arg->peer_legacy_rates.num_rates > MAX_SUPPORTED_RATES)
7667*4882a593Smuzhiyun return -EINVAL;
7668*4882a593Smuzhiyun if (arg->peer_ht_rates.num_rates > MAX_SUPPORTED_RATES)
7669*4882a593Smuzhiyun return -EINVAL;
7670*4882a593Smuzhiyun
7671*4882a593Smuzhiyun return 0;
7672*4882a593Smuzhiyun }
7673*4882a593Smuzhiyun
7674*4882a593Smuzhiyun static struct sk_buff *
ath10k_wmi_op_gen_peer_assoc(struct ath10k * ar,const struct wmi_peer_assoc_complete_arg * arg)7675*4882a593Smuzhiyun ath10k_wmi_op_gen_peer_assoc(struct ath10k *ar,
7676*4882a593Smuzhiyun const struct wmi_peer_assoc_complete_arg *arg)
7677*4882a593Smuzhiyun {
7678*4882a593Smuzhiyun size_t len = sizeof(struct wmi_main_peer_assoc_complete_cmd);
7679*4882a593Smuzhiyun struct sk_buff *skb;
7680*4882a593Smuzhiyun int ret;
7681*4882a593Smuzhiyun
7682*4882a593Smuzhiyun ret = ath10k_wmi_peer_assoc_check_arg(arg);
7683*4882a593Smuzhiyun if (ret)
7684*4882a593Smuzhiyun return ERR_PTR(ret);
7685*4882a593Smuzhiyun
7686*4882a593Smuzhiyun skb = ath10k_wmi_alloc_skb(ar, len);
7687*4882a593Smuzhiyun if (!skb)
7688*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
7689*4882a593Smuzhiyun
7690*4882a593Smuzhiyun ath10k_wmi_peer_assoc_fill_main(ar, skb->data, arg);
7691*4882a593Smuzhiyun
7692*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI,
7693*4882a593Smuzhiyun "wmi peer assoc vdev %d addr %pM (%s)\n",
7694*4882a593Smuzhiyun arg->vdev_id, arg->addr,
7695*4882a593Smuzhiyun arg->peer_reassoc ? "reassociate" : "new");
7696*4882a593Smuzhiyun return skb;
7697*4882a593Smuzhiyun }
7698*4882a593Smuzhiyun
7699*4882a593Smuzhiyun static struct sk_buff *
ath10k_wmi_10_1_op_gen_peer_assoc(struct ath10k * ar,const struct wmi_peer_assoc_complete_arg * arg)7700*4882a593Smuzhiyun ath10k_wmi_10_1_op_gen_peer_assoc(struct ath10k *ar,
7701*4882a593Smuzhiyun const struct wmi_peer_assoc_complete_arg *arg)
7702*4882a593Smuzhiyun {
7703*4882a593Smuzhiyun size_t len = sizeof(struct wmi_10_1_peer_assoc_complete_cmd);
7704*4882a593Smuzhiyun struct sk_buff *skb;
7705*4882a593Smuzhiyun int ret;
7706*4882a593Smuzhiyun
7707*4882a593Smuzhiyun ret = ath10k_wmi_peer_assoc_check_arg(arg);
7708*4882a593Smuzhiyun if (ret)
7709*4882a593Smuzhiyun return ERR_PTR(ret);
7710*4882a593Smuzhiyun
7711*4882a593Smuzhiyun skb = ath10k_wmi_alloc_skb(ar, len);
7712*4882a593Smuzhiyun if (!skb)
7713*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
7714*4882a593Smuzhiyun
7715*4882a593Smuzhiyun ath10k_wmi_peer_assoc_fill_10_1(ar, skb->data, arg);
7716*4882a593Smuzhiyun
7717*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI,
7718*4882a593Smuzhiyun "wmi peer assoc vdev %d addr %pM (%s)\n",
7719*4882a593Smuzhiyun arg->vdev_id, arg->addr,
7720*4882a593Smuzhiyun arg->peer_reassoc ? "reassociate" : "new");
7721*4882a593Smuzhiyun return skb;
7722*4882a593Smuzhiyun }
7723*4882a593Smuzhiyun
7724*4882a593Smuzhiyun static struct sk_buff *
ath10k_wmi_10_2_op_gen_peer_assoc(struct ath10k * ar,const struct wmi_peer_assoc_complete_arg * arg)7725*4882a593Smuzhiyun ath10k_wmi_10_2_op_gen_peer_assoc(struct ath10k *ar,
7726*4882a593Smuzhiyun const struct wmi_peer_assoc_complete_arg *arg)
7727*4882a593Smuzhiyun {
7728*4882a593Smuzhiyun size_t len = sizeof(struct wmi_10_2_peer_assoc_complete_cmd);
7729*4882a593Smuzhiyun struct sk_buff *skb;
7730*4882a593Smuzhiyun int ret;
7731*4882a593Smuzhiyun
7732*4882a593Smuzhiyun ret = ath10k_wmi_peer_assoc_check_arg(arg);
7733*4882a593Smuzhiyun if (ret)
7734*4882a593Smuzhiyun return ERR_PTR(ret);
7735*4882a593Smuzhiyun
7736*4882a593Smuzhiyun skb = ath10k_wmi_alloc_skb(ar, len);
7737*4882a593Smuzhiyun if (!skb)
7738*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
7739*4882a593Smuzhiyun
7740*4882a593Smuzhiyun ath10k_wmi_peer_assoc_fill_10_2(ar, skb->data, arg);
7741*4882a593Smuzhiyun
7742*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI,
7743*4882a593Smuzhiyun "wmi peer assoc vdev %d addr %pM (%s)\n",
7744*4882a593Smuzhiyun arg->vdev_id, arg->addr,
7745*4882a593Smuzhiyun arg->peer_reassoc ? "reassociate" : "new");
7746*4882a593Smuzhiyun return skb;
7747*4882a593Smuzhiyun }
7748*4882a593Smuzhiyun
7749*4882a593Smuzhiyun static struct sk_buff *
ath10k_wmi_10_4_op_gen_peer_assoc(struct ath10k * ar,const struct wmi_peer_assoc_complete_arg * arg)7750*4882a593Smuzhiyun ath10k_wmi_10_4_op_gen_peer_assoc(struct ath10k *ar,
7751*4882a593Smuzhiyun const struct wmi_peer_assoc_complete_arg *arg)
7752*4882a593Smuzhiyun {
7753*4882a593Smuzhiyun size_t len = sizeof(struct wmi_10_4_peer_assoc_complete_cmd);
7754*4882a593Smuzhiyun struct sk_buff *skb;
7755*4882a593Smuzhiyun int ret;
7756*4882a593Smuzhiyun
7757*4882a593Smuzhiyun ret = ath10k_wmi_peer_assoc_check_arg(arg);
7758*4882a593Smuzhiyun if (ret)
7759*4882a593Smuzhiyun return ERR_PTR(ret);
7760*4882a593Smuzhiyun
7761*4882a593Smuzhiyun skb = ath10k_wmi_alloc_skb(ar, len);
7762*4882a593Smuzhiyun if (!skb)
7763*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
7764*4882a593Smuzhiyun
7765*4882a593Smuzhiyun ath10k_wmi_peer_assoc_fill_10_4(ar, skb->data, arg);
7766*4882a593Smuzhiyun
7767*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI,
7768*4882a593Smuzhiyun "wmi peer assoc vdev %d addr %pM (%s)\n",
7769*4882a593Smuzhiyun arg->vdev_id, arg->addr,
7770*4882a593Smuzhiyun arg->peer_reassoc ? "reassociate" : "new");
7771*4882a593Smuzhiyun return skb;
7772*4882a593Smuzhiyun }
7773*4882a593Smuzhiyun
7774*4882a593Smuzhiyun static struct sk_buff *
ath10k_wmi_10_2_op_gen_pdev_get_temperature(struct ath10k * ar)7775*4882a593Smuzhiyun ath10k_wmi_10_2_op_gen_pdev_get_temperature(struct ath10k *ar)
7776*4882a593Smuzhiyun {
7777*4882a593Smuzhiyun struct sk_buff *skb;
7778*4882a593Smuzhiyun
7779*4882a593Smuzhiyun skb = ath10k_wmi_alloc_skb(ar, 0);
7780*4882a593Smuzhiyun if (!skb)
7781*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
7782*4882a593Smuzhiyun
7783*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev get temperature\n");
7784*4882a593Smuzhiyun return skb;
7785*4882a593Smuzhiyun }
7786*4882a593Smuzhiyun
7787*4882a593Smuzhiyun static struct sk_buff *
ath10k_wmi_10_2_op_gen_pdev_bss_chan_info(struct ath10k * ar,enum wmi_bss_survey_req_type type)7788*4882a593Smuzhiyun ath10k_wmi_10_2_op_gen_pdev_bss_chan_info(struct ath10k *ar,
7789*4882a593Smuzhiyun enum wmi_bss_survey_req_type type)
7790*4882a593Smuzhiyun {
7791*4882a593Smuzhiyun struct wmi_pdev_chan_info_req_cmd *cmd;
7792*4882a593Smuzhiyun struct sk_buff *skb;
7793*4882a593Smuzhiyun
7794*4882a593Smuzhiyun skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7795*4882a593Smuzhiyun if (!skb)
7796*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
7797*4882a593Smuzhiyun
7798*4882a593Smuzhiyun cmd = (struct wmi_pdev_chan_info_req_cmd *)skb->data;
7799*4882a593Smuzhiyun cmd->type = __cpu_to_le32(type);
7800*4882a593Smuzhiyun
7801*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI,
7802*4882a593Smuzhiyun "wmi pdev bss info request type %d\n", type);
7803*4882a593Smuzhiyun
7804*4882a593Smuzhiyun return skb;
7805*4882a593Smuzhiyun }
7806*4882a593Smuzhiyun
7807*4882a593Smuzhiyun /* This function assumes the beacon is already DMA mapped */
7808*4882a593Smuzhiyun static struct sk_buff *
ath10k_wmi_op_gen_beacon_dma(struct ath10k * ar,u32 vdev_id,const void * bcn,size_t bcn_len,u32 bcn_paddr,bool dtim_zero,bool deliver_cab)7809*4882a593Smuzhiyun ath10k_wmi_op_gen_beacon_dma(struct ath10k *ar, u32 vdev_id, const void *bcn,
7810*4882a593Smuzhiyun size_t bcn_len, u32 bcn_paddr, bool dtim_zero,
7811*4882a593Smuzhiyun bool deliver_cab)
7812*4882a593Smuzhiyun {
7813*4882a593Smuzhiyun struct wmi_bcn_tx_ref_cmd *cmd;
7814*4882a593Smuzhiyun struct sk_buff *skb;
7815*4882a593Smuzhiyun struct ieee80211_hdr *hdr;
7816*4882a593Smuzhiyun u16 fc;
7817*4882a593Smuzhiyun
7818*4882a593Smuzhiyun skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7819*4882a593Smuzhiyun if (!skb)
7820*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
7821*4882a593Smuzhiyun
7822*4882a593Smuzhiyun hdr = (struct ieee80211_hdr *)bcn;
7823*4882a593Smuzhiyun fc = le16_to_cpu(hdr->frame_control);
7824*4882a593Smuzhiyun
7825*4882a593Smuzhiyun cmd = (struct wmi_bcn_tx_ref_cmd *)skb->data;
7826*4882a593Smuzhiyun cmd->vdev_id = __cpu_to_le32(vdev_id);
7827*4882a593Smuzhiyun cmd->data_len = __cpu_to_le32(bcn_len);
7828*4882a593Smuzhiyun cmd->data_ptr = __cpu_to_le32(bcn_paddr);
7829*4882a593Smuzhiyun cmd->msdu_id = 0;
7830*4882a593Smuzhiyun cmd->frame_control = __cpu_to_le32(fc);
7831*4882a593Smuzhiyun cmd->flags = 0;
7832*4882a593Smuzhiyun cmd->antenna_mask = __cpu_to_le32(WMI_BCN_TX_REF_DEF_ANTENNA);
7833*4882a593Smuzhiyun
7834*4882a593Smuzhiyun if (dtim_zero)
7835*4882a593Smuzhiyun cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DTIM_ZERO);
7836*4882a593Smuzhiyun
7837*4882a593Smuzhiyun if (deliver_cab)
7838*4882a593Smuzhiyun cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DELIVER_CAB);
7839*4882a593Smuzhiyun
7840*4882a593Smuzhiyun return skb;
7841*4882a593Smuzhiyun }
7842*4882a593Smuzhiyun
ath10k_wmi_set_wmm_param(struct wmi_wmm_params * params,const struct wmi_wmm_params_arg * arg)7843*4882a593Smuzhiyun void ath10k_wmi_set_wmm_param(struct wmi_wmm_params *params,
7844*4882a593Smuzhiyun const struct wmi_wmm_params_arg *arg)
7845*4882a593Smuzhiyun {
7846*4882a593Smuzhiyun params->cwmin = __cpu_to_le32(arg->cwmin);
7847*4882a593Smuzhiyun params->cwmax = __cpu_to_le32(arg->cwmax);
7848*4882a593Smuzhiyun params->aifs = __cpu_to_le32(arg->aifs);
7849*4882a593Smuzhiyun params->txop = __cpu_to_le32(arg->txop);
7850*4882a593Smuzhiyun params->acm = __cpu_to_le32(arg->acm);
7851*4882a593Smuzhiyun params->no_ack = __cpu_to_le32(arg->no_ack);
7852*4882a593Smuzhiyun }
7853*4882a593Smuzhiyun
7854*4882a593Smuzhiyun static struct sk_buff *
ath10k_wmi_op_gen_pdev_set_wmm(struct ath10k * ar,const struct wmi_wmm_params_all_arg * arg)7855*4882a593Smuzhiyun ath10k_wmi_op_gen_pdev_set_wmm(struct ath10k *ar,
7856*4882a593Smuzhiyun const struct wmi_wmm_params_all_arg *arg)
7857*4882a593Smuzhiyun {
7858*4882a593Smuzhiyun struct wmi_pdev_set_wmm_params *cmd;
7859*4882a593Smuzhiyun struct sk_buff *skb;
7860*4882a593Smuzhiyun
7861*4882a593Smuzhiyun skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7862*4882a593Smuzhiyun if (!skb)
7863*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
7864*4882a593Smuzhiyun
7865*4882a593Smuzhiyun cmd = (struct wmi_pdev_set_wmm_params *)skb->data;
7866*4882a593Smuzhiyun ath10k_wmi_set_wmm_param(&cmd->ac_be, &arg->ac_be);
7867*4882a593Smuzhiyun ath10k_wmi_set_wmm_param(&cmd->ac_bk, &arg->ac_bk);
7868*4882a593Smuzhiyun ath10k_wmi_set_wmm_param(&cmd->ac_vi, &arg->ac_vi);
7869*4882a593Smuzhiyun ath10k_wmi_set_wmm_param(&cmd->ac_vo, &arg->ac_vo);
7870*4882a593Smuzhiyun
7871*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set wmm params\n");
7872*4882a593Smuzhiyun return skb;
7873*4882a593Smuzhiyun }
7874*4882a593Smuzhiyun
7875*4882a593Smuzhiyun static struct sk_buff *
ath10k_wmi_op_gen_request_stats(struct ath10k * ar,u32 stats_mask)7876*4882a593Smuzhiyun ath10k_wmi_op_gen_request_stats(struct ath10k *ar, u32 stats_mask)
7877*4882a593Smuzhiyun {
7878*4882a593Smuzhiyun struct wmi_request_stats_cmd *cmd;
7879*4882a593Smuzhiyun struct sk_buff *skb;
7880*4882a593Smuzhiyun
7881*4882a593Smuzhiyun skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7882*4882a593Smuzhiyun if (!skb)
7883*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
7884*4882a593Smuzhiyun
7885*4882a593Smuzhiyun cmd = (struct wmi_request_stats_cmd *)skb->data;
7886*4882a593Smuzhiyun cmd->stats_id = __cpu_to_le32(stats_mask);
7887*4882a593Smuzhiyun
7888*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi request stats 0x%08x\n",
7889*4882a593Smuzhiyun stats_mask);
7890*4882a593Smuzhiyun return skb;
7891*4882a593Smuzhiyun }
7892*4882a593Smuzhiyun
7893*4882a593Smuzhiyun static struct sk_buff *
ath10k_wmi_op_gen_force_fw_hang(struct ath10k * ar,enum wmi_force_fw_hang_type type,u32 delay_ms)7894*4882a593Smuzhiyun ath10k_wmi_op_gen_force_fw_hang(struct ath10k *ar,
7895*4882a593Smuzhiyun enum wmi_force_fw_hang_type type, u32 delay_ms)
7896*4882a593Smuzhiyun {
7897*4882a593Smuzhiyun struct wmi_force_fw_hang_cmd *cmd;
7898*4882a593Smuzhiyun struct sk_buff *skb;
7899*4882a593Smuzhiyun
7900*4882a593Smuzhiyun skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7901*4882a593Smuzhiyun if (!skb)
7902*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
7903*4882a593Smuzhiyun
7904*4882a593Smuzhiyun cmd = (struct wmi_force_fw_hang_cmd *)skb->data;
7905*4882a593Smuzhiyun cmd->type = __cpu_to_le32(type);
7906*4882a593Smuzhiyun cmd->delay_ms = __cpu_to_le32(delay_ms);
7907*4882a593Smuzhiyun
7908*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi force fw hang %d delay %d\n",
7909*4882a593Smuzhiyun type, delay_ms);
7910*4882a593Smuzhiyun return skb;
7911*4882a593Smuzhiyun }
7912*4882a593Smuzhiyun
7913*4882a593Smuzhiyun static struct sk_buff *
ath10k_wmi_op_gen_dbglog_cfg(struct ath10k * ar,u64 module_enable,u32 log_level)7914*4882a593Smuzhiyun ath10k_wmi_op_gen_dbglog_cfg(struct ath10k *ar, u64 module_enable,
7915*4882a593Smuzhiyun u32 log_level)
7916*4882a593Smuzhiyun {
7917*4882a593Smuzhiyun struct wmi_dbglog_cfg_cmd *cmd;
7918*4882a593Smuzhiyun struct sk_buff *skb;
7919*4882a593Smuzhiyun u32 cfg;
7920*4882a593Smuzhiyun
7921*4882a593Smuzhiyun skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7922*4882a593Smuzhiyun if (!skb)
7923*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
7924*4882a593Smuzhiyun
7925*4882a593Smuzhiyun cmd = (struct wmi_dbglog_cfg_cmd *)skb->data;
7926*4882a593Smuzhiyun
7927*4882a593Smuzhiyun if (module_enable) {
7928*4882a593Smuzhiyun cfg = SM(log_level,
7929*4882a593Smuzhiyun ATH10K_DBGLOG_CFG_LOG_LVL);
7930*4882a593Smuzhiyun } else {
7931*4882a593Smuzhiyun /* set back defaults, all modules with WARN level */
7932*4882a593Smuzhiyun cfg = SM(ATH10K_DBGLOG_LEVEL_WARN,
7933*4882a593Smuzhiyun ATH10K_DBGLOG_CFG_LOG_LVL);
7934*4882a593Smuzhiyun module_enable = ~0;
7935*4882a593Smuzhiyun }
7936*4882a593Smuzhiyun
7937*4882a593Smuzhiyun cmd->module_enable = __cpu_to_le32(module_enable);
7938*4882a593Smuzhiyun cmd->module_valid = __cpu_to_le32(~0);
7939*4882a593Smuzhiyun cmd->config_enable = __cpu_to_le32(cfg);
7940*4882a593Smuzhiyun cmd->config_valid = __cpu_to_le32(ATH10K_DBGLOG_CFG_LOG_LVL_MASK);
7941*4882a593Smuzhiyun
7942*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI,
7943*4882a593Smuzhiyun "wmi dbglog cfg modules %08x %08x config %08x %08x\n",
7944*4882a593Smuzhiyun __le32_to_cpu(cmd->module_enable),
7945*4882a593Smuzhiyun __le32_to_cpu(cmd->module_valid),
7946*4882a593Smuzhiyun __le32_to_cpu(cmd->config_enable),
7947*4882a593Smuzhiyun __le32_to_cpu(cmd->config_valid));
7948*4882a593Smuzhiyun return skb;
7949*4882a593Smuzhiyun }
7950*4882a593Smuzhiyun
7951*4882a593Smuzhiyun static struct sk_buff *
ath10k_wmi_10_4_op_gen_dbglog_cfg(struct ath10k * ar,u64 module_enable,u32 log_level)7952*4882a593Smuzhiyun ath10k_wmi_10_4_op_gen_dbglog_cfg(struct ath10k *ar, u64 module_enable,
7953*4882a593Smuzhiyun u32 log_level)
7954*4882a593Smuzhiyun {
7955*4882a593Smuzhiyun struct wmi_10_4_dbglog_cfg_cmd *cmd;
7956*4882a593Smuzhiyun struct sk_buff *skb;
7957*4882a593Smuzhiyun u32 cfg;
7958*4882a593Smuzhiyun
7959*4882a593Smuzhiyun skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7960*4882a593Smuzhiyun if (!skb)
7961*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
7962*4882a593Smuzhiyun
7963*4882a593Smuzhiyun cmd = (struct wmi_10_4_dbglog_cfg_cmd *)skb->data;
7964*4882a593Smuzhiyun
7965*4882a593Smuzhiyun if (module_enable) {
7966*4882a593Smuzhiyun cfg = SM(log_level,
7967*4882a593Smuzhiyun ATH10K_DBGLOG_CFG_LOG_LVL);
7968*4882a593Smuzhiyun } else {
7969*4882a593Smuzhiyun /* set back defaults, all modules with WARN level */
7970*4882a593Smuzhiyun cfg = SM(ATH10K_DBGLOG_LEVEL_WARN,
7971*4882a593Smuzhiyun ATH10K_DBGLOG_CFG_LOG_LVL);
7972*4882a593Smuzhiyun module_enable = ~0;
7973*4882a593Smuzhiyun }
7974*4882a593Smuzhiyun
7975*4882a593Smuzhiyun cmd->module_enable = __cpu_to_le64(module_enable);
7976*4882a593Smuzhiyun cmd->module_valid = __cpu_to_le64(~0);
7977*4882a593Smuzhiyun cmd->config_enable = __cpu_to_le32(cfg);
7978*4882a593Smuzhiyun cmd->config_valid = __cpu_to_le32(ATH10K_DBGLOG_CFG_LOG_LVL_MASK);
7979*4882a593Smuzhiyun
7980*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI,
7981*4882a593Smuzhiyun "wmi dbglog cfg modules 0x%016llx 0x%016llx config %08x %08x\n",
7982*4882a593Smuzhiyun __le64_to_cpu(cmd->module_enable),
7983*4882a593Smuzhiyun __le64_to_cpu(cmd->module_valid),
7984*4882a593Smuzhiyun __le32_to_cpu(cmd->config_enable),
7985*4882a593Smuzhiyun __le32_to_cpu(cmd->config_valid));
7986*4882a593Smuzhiyun return skb;
7987*4882a593Smuzhiyun }
7988*4882a593Smuzhiyun
7989*4882a593Smuzhiyun static struct sk_buff *
ath10k_wmi_op_gen_pktlog_enable(struct ath10k * ar,u32 ev_bitmap)7990*4882a593Smuzhiyun ath10k_wmi_op_gen_pktlog_enable(struct ath10k *ar, u32 ev_bitmap)
7991*4882a593Smuzhiyun {
7992*4882a593Smuzhiyun struct wmi_pdev_pktlog_enable_cmd *cmd;
7993*4882a593Smuzhiyun struct sk_buff *skb;
7994*4882a593Smuzhiyun
7995*4882a593Smuzhiyun skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
7996*4882a593Smuzhiyun if (!skb)
7997*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
7998*4882a593Smuzhiyun
7999*4882a593Smuzhiyun ev_bitmap &= ATH10K_PKTLOG_ANY;
8000*4882a593Smuzhiyun
8001*4882a593Smuzhiyun cmd = (struct wmi_pdev_pktlog_enable_cmd *)skb->data;
8002*4882a593Smuzhiyun cmd->ev_bitmap = __cpu_to_le32(ev_bitmap);
8003*4882a593Smuzhiyun
8004*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi enable pktlog filter 0x%08x\n",
8005*4882a593Smuzhiyun ev_bitmap);
8006*4882a593Smuzhiyun return skb;
8007*4882a593Smuzhiyun }
8008*4882a593Smuzhiyun
8009*4882a593Smuzhiyun static struct sk_buff *
ath10k_wmi_op_gen_pktlog_disable(struct ath10k * ar)8010*4882a593Smuzhiyun ath10k_wmi_op_gen_pktlog_disable(struct ath10k *ar)
8011*4882a593Smuzhiyun {
8012*4882a593Smuzhiyun struct sk_buff *skb;
8013*4882a593Smuzhiyun
8014*4882a593Smuzhiyun skb = ath10k_wmi_alloc_skb(ar, 0);
8015*4882a593Smuzhiyun if (!skb)
8016*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
8017*4882a593Smuzhiyun
8018*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi disable pktlog\n");
8019*4882a593Smuzhiyun return skb;
8020*4882a593Smuzhiyun }
8021*4882a593Smuzhiyun
8022*4882a593Smuzhiyun static struct sk_buff *
ath10k_wmi_op_gen_pdev_set_quiet_mode(struct ath10k * ar,u32 period,u32 duration,u32 next_offset,u32 enabled)8023*4882a593Smuzhiyun ath10k_wmi_op_gen_pdev_set_quiet_mode(struct ath10k *ar, u32 period,
8024*4882a593Smuzhiyun u32 duration, u32 next_offset,
8025*4882a593Smuzhiyun u32 enabled)
8026*4882a593Smuzhiyun {
8027*4882a593Smuzhiyun struct wmi_pdev_set_quiet_cmd *cmd;
8028*4882a593Smuzhiyun struct sk_buff *skb;
8029*4882a593Smuzhiyun
8030*4882a593Smuzhiyun skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
8031*4882a593Smuzhiyun if (!skb)
8032*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
8033*4882a593Smuzhiyun
8034*4882a593Smuzhiyun cmd = (struct wmi_pdev_set_quiet_cmd *)skb->data;
8035*4882a593Smuzhiyun cmd->period = __cpu_to_le32(period);
8036*4882a593Smuzhiyun cmd->duration = __cpu_to_le32(duration);
8037*4882a593Smuzhiyun cmd->next_start = __cpu_to_le32(next_offset);
8038*4882a593Smuzhiyun cmd->enabled = __cpu_to_le32(enabled);
8039*4882a593Smuzhiyun
8040*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI,
8041*4882a593Smuzhiyun "wmi quiet param: period %u duration %u enabled %d\n",
8042*4882a593Smuzhiyun period, duration, enabled);
8043*4882a593Smuzhiyun return skb;
8044*4882a593Smuzhiyun }
8045*4882a593Smuzhiyun
8046*4882a593Smuzhiyun static struct sk_buff *
ath10k_wmi_op_gen_addba_clear_resp(struct ath10k * ar,u32 vdev_id,const u8 * mac)8047*4882a593Smuzhiyun ath10k_wmi_op_gen_addba_clear_resp(struct ath10k *ar, u32 vdev_id,
8048*4882a593Smuzhiyun const u8 *mac)
8049*4882a593Smuzhiyun {
8050*4882a593Smuzhiyun struct wmi_addba_clear_resp_cmd *cmd;
8051*4882a593Smuzhiyun struct sk_buff *skb;
8052*4882a593Smuzhiyun
8053*4882a593Smuzhiyun if (!mac)
8054*4882a593Smuzhiyun return ERR_PTR(-EINVAL);
8055*4882a593Smuzhiyun
8056*4882a593Smuzhiyun skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
8057*4882a593Smuzhiyun if (!skb)
8058*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
8059*4882a593Smuzhiyun
8060*4882a593Smuzhiyun cmd = (struct wmi_addba_clear_resp_cmd *)skb->data;
8061*4882a593Smuzhiyun cmd->vdev_id = __cpu_to_le32(vdev_id);
8062*4882a593Smuzhiyun ether_addr_copy(cmd->peer_macaddr.addr, mac);
8063*4882a593Smuzhiyun
8064*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI,
8065*4882a593Smuzhiyun "wmi addba clear resp vdev_id 0x%X mac_addr %pM\n",
8066*4882a593Smuzhiyun vdev_id, mac);
8067*4882a593Smuzhiyun return skb;
8068*4882a593Smuzhiyun }
8069*4882a593Smuzhiyun
8070*4882a593Smuzhiyun static struct sk_buff *
ath10k_wmi_op_gen_addba_send(struct ath10k * ar,u32 vdev_id,const u8 * mac,u32 tid,u32 buf_size)8071*4882a593Smuzhiyun ath10k_wmi_op_gen_addba_send(struct ath10k *ar, u32 vdev_id, const u8 *mac,
8072*4882a593Smuzhiyun u32 tid, u32 buf_size)
8073*4882a593Smuzhiyun {
8074*4882a593Smuzhiyun struct wmi_addba_send_cmd *cmd;
8075*4882a593Smuzhiyun struct sk_buff *skb;
8076*4882a593Smuzhiyun
8077*4882a593Smuzhiyun if (!mac)
8078*4882a593Smuzhiyun return ERR_PTR(-EINVAL);
8079*4882a593Smuzhiyun
8080*4882a593Smuzhiyun skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
8081*4882a593Smuzhiyun if (!skb)
8082*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
8083*4882a593Smuzhiyun
8084*4882a593Smuzhiyun cmd = (struct wmi_addba_send_cmd *)skb->data;
8085*4882a593Smuzhiyun cmd->vdev_id = __cpu_to_le32(vdev_id);
8086*4882a593Smuzhiyun ether_addr_copy(cmd->peer_macaddr.addr, mac);
8087*4882a593Smuzhiyun cmd->tid = __cpu_to_le32(tid);
8088*4882a593Smuzhiyun cmd->buffersize = __cpu_to_le32(buf_size);
8089*4882a593Smuzhiyun
8090*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI,
8091*4882a593Smuzhiyun "wmi addba send vdev_id 0x%X mac_addr %pM tid %u bufsize %u\n",
8092*4882a593Smuzhiyun vdev_id, mac, tid, buf_size);
8093*4882a593Smuzhiyun return skb;
8094*4882a593Smuzhiyun }
8095*4882a593Smuzhiyun
8096*4882a593Smuzhiyun static struct sk_buff *
ath10k_wmi_op_gen_addba_set_resp(struct ath10k * ar,u32 vdev_id,const u8 * mac,u32 tid,u32 status)8097*4882a593Smuzhiyun ath10k_wmi_op_gen_addba_set_resp(struct ath10k *ar, u32 vdev_id, const u8 *mac,
8098*4882a593Smuzhiyun u32 tid, u32 status)
8099*4882a593Smuzhiyun {
8100*4882a593Smuzhiyun struct wmi_addba_setresponse_cmd *cmd;
8101*4882a593Smuzhiyun struct sk_buff *skb;
8102*4882a593Smuzhiyun
8103*4882a593Smuzhiyun if (!mac)
8104*4882a593Smuzhiyun return ERR_PTR(-EINVAL);
8105*4882a593Smuzhiyun
8106*4882a593Smuzhiyun skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
8107*4882a593Smuzhiyun if (!skb)
8108*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
8109*4882a593Smuzhiyun
8110*4882a593Smuzhiyun cmd = (struct wmi_addba_setresponse_cmd *)skb->data;
8111*4882a593Smuzhiyun cmd->vdev_id = __cpu_to_le32(vdev_id);
8112*4882a593Smuzhiyun ether_addr_copy(cmd->peer_macaddr.addr, mac);
8113*4882a593Smuzhiyun cmd->tid = __cpu_to_le32(tid);
8114*4882a593Smuzhiyun cmd->statuscode = __cpu_to_le32(status);
8115*4882a593Smuzhiyun
8116*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI,
8117*4882a593Smuzhiyun "wmi addba set resp vdev_id 0x%X mac_addr %pM tid %u status %u\n",
8118*4882a593Smuzhiyun vdev_id, mac, tid, status);
8119*4882a593Smuzhiyun return skb;
8120*4882a593Smuzhiyun }
8121*4882a593Smuzhiyun
8122*4882a593Smuzhiyun static struct sk_buff *
ath10k_wmi_op_gen_delba_send(struct ath10k * ar,u32 vdev_id,const u8 * mac,u32 tid,u32 initiator,u32 reason)8123*4882a593Smuzhiyun ath10k_wmi_op_gen_delba_send(struct ath10k *ar, u32 vdev_id, const u8 *mac,
8124*4882a593Smuzhiyun u32 tid, u32 initiator, u32 reason)
8125*4882a593Smuzhiyun {
8126*4882a593Smuzhiyun struct wmi_delba_send_cmd *cmd;
8127*4882a593Smuzhiyun struct sk_buff *skb;
8128*4882a593Smuzhiyun
8129*4882a593Smuzhiyun if (!mac)
8130*4882a593Smuzhiyun return ERR_PTR(-EINVAL);
8131*4882a593Smuzhiyun
8132*4882a593Smuzhiyun skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
8133*4882a593Smuzhiyun if (!skb)
8134*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
8135*4882a593Smuzhiyun
8136*4882a593Smuzhiyun cmd = (struct wmi_delba_send_cmd *)skb->data;
8137*4882a593Smuzhiyun cmd->vdev_id = __cpu_to_le32(vdev_id);
8138*4882a593Smuzhiyun ether_addr_copy(cmd->peer_macaddr.addr, mac);
8139*4882a593Smuzhiyun cmd->tid = __cpu_to_le32(tid);
8140*4882a593Smuzhiyun cmd->initiator = __cpu_to_le32(initiator);
8141*4882a593Smuzhiyun cmd->reasoncode = __cpu_to_le32(reason);
8142*4882a593Smuzhiyun
8143*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI,
8144*4882a593Smuzhiyun "wmi delba send vdev_id 0x%X mac_addr %pM tid %u initiator %u reason %u\n",
8145*4882a593Smuzhiyun vdev_id, mac, tid, initiator, reason);
8146*4882a593Smuzhiyun return skb;
8147*4882a593Smuzhiyun }
8148*4882a593Smuzhiyun
8149*4882a593Smuzhiyun static struct sk_buff *
ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config(struct ath10k * ar,u32 param)8150*4882a593Smuzhiyun ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config(struct ath10k *ar, u32 param)
8151*4882a593Smuzhiyun {
8152*4882a593Smuzhiyun struct wmi_pdev_get_tpc_config_cmd *cmd;
8153*4882a593Smuzhiyun struct sk_buff *skb;
8154*4882a593Smuzhiyun
8155*4882a593Smuzhiyun skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
8156*4882a593Smuzhiyun if (!skb)
8157*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
8158*4882a593Smuzhiyun
8159*4882a593Smuzhiyun cmd = (struct wmi_pdev_get_tpc_config_cmd *)skb->data;
8160*4882a593Smuzhiyun cmd->param = __cpu_to_le32(param);
8161*4882a593Smuzhiyun
8162*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI,
8163*4882a593Smuzhiyun "wmi pdev get tpc config param %d\n", param);
8164*4882a593Smuzhiyun return skb;
8165*4882a593Smuzhiyun }
8166*4882a593Smuzhiyun
ath10k_wmi_fw_stats_num_peers(struct list_head * head)8167*4882a593Smuzhiyun size_t ath10k_wmi_fw_stats_num_peers(struct list_head *head)
8168*4882a593Smuzhiyun {
8169*4882a593Smuzhiyun struct ath10k_fw_stats_peer *i;
8170*4882a593Smuzhiyun size_t num = 0;
8171*4882a593Smuzhiyun
8172*4882a593Smuzhiyun list_for_each_entry(i, head, list)
8173*4882a593Smuzhiyun ++num;
8174*4882a593Smuzhiyun
8175*4882a593Smuzhiyun return num;
8176*4882a593Smuzhiyun }
8177*4882a593Smuzhiyun
ath10k_wmi_fw_stats_num_vdevs(struct list_head * head)8178*4882a593Smuzhiyun size_t ath10k_wmi_fw_stats_num_vdevs(struct list_head *head)
8179*4882a593Smuzhiyun {
8180*4882a593Smuzhiyun struct ath10k_fw_stats_vdev *i;
8181*4882a593Smuzhiyun size_t num = 0;
8182*4882a593Smuzhiyun
8183*4882a593Smuzhiyun list_for_each_entry(i, head, list)
8184*4882a593Smuzhiyun ++num;
8185*4882a593Smuzhiyun
8186*4882a593Smuzhiyun return num;
8187*4882a593Smuzhiyun }
8188*4882a593Smuzhiyun
8189*4882a593Smuzhiyun static void
ath10k_wmi_fw_pdev_base_stats_fill(const struct ath10k_fw_stats_pdev * pdev,char * buf,u32 * length)8190*4882a593Smuzhiyun ath10k_wmi_fw_pdev_base_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
8191*4882a593Smuzhiyun char *buf, u32 *length)
8192*4882a593Smuzhiyun {
8193*4882a593Smuzhiyun u32 len = *length;
8194*4882a593Smuzhiyun u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
8195*4882a593Smuzhiyun
8196*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "\n");
8197*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s\n",
8198*4882a593Smuzhiyun "ath10k PDEV stats");
8199*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
8200*4882a593Smuzhiyun "=================");
8201*4882a593Smuzhiyun
8202*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8203*4882a593Smuzhiyun "Channel noise floor", pdev->ch_noise_floor);
8204*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8205*4882a593Smuzhiyun "Channel TX power", pdev->chan_tx_power);
8206*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8207*4882a593Smuzhiyun "TX frame count", pdev->tx_frame_count);
8208*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8209*4882a593Smuzhiyun "RX frame count", pdev->rx_frame_count);
8210*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8211*4882a593Smuzhiyun "RX clear count", pdev->rx_clear_count);
8212*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8213*4882a593Smuzhiyun "Cycle count", pdev->cycle_count);
8214*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8215*4882a593Smuzhiyun "PHY error count", pdev->phy_err_count);
8216*4882a593Smuzhiyun
8217*4882a593Smuzhiyun *length = len;
8218*4882a593Smuzhiyun }
8219*4882a593Smuzhiyun
8220*4882a593Smuzhiyun static void
ath10k_wmi_fw_pdev_extra_stats_fill(const struct ath10k_fw_stats_pdev * pdev,char * buf,u32 * length)8221*4882a593Smuzhiyun ath10k_wmi_fw_pdev_extra_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
8222*4882a593Smuzhiyun char *buf, u32 *length)
8223*4882a593Smuzhiyun {
8224*4882a593Smuzhiyun u32 len = *length;
8225*4882a593Smuzhiyun u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
8226*4882a593Smuzhiyun
8227*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8228*4882a593Smuzhiyun "RTS bad count", pdev->rts_bad);
8229*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8230*4882a593Smuzhiyun "RTS good count", pdev->rts_good);
8231*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8232*4882a593Smuzhiyun "FCS bad count", pdev->fcs_bad);
8233*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8234*4882a593Smuzhiyun "No beacon count", pdev->no_beacons);
8235*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %10u\n",
8236*4882a593Smuzhiyun "MIB int count", pdev->mib_int_count);
8237*4882a593Smuzhiyun
8238*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "\n");
8239*4882a593Smuzhiyun *length = len;
8240*4882a593Smuzhiyun }
8241*4882a593Smuzhiyun
8242*4882a593Smuzhiyun static void
ath10k_wmi_fw_pdev_tx_stats_fill(const struct ath10k_fw_stats_pdev * pdev,char * buf,u32 * length)8243*4882a593Smuzhiyun ath10k_wmi_fw_pdev_tx_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
8244*4882a593Smuzhiyun char *buf, u32 *length)
8245*4882a593Smuzhiyun {
8246*4882a593Smuzhiyun u32 len = *length;
8247*4882a593Smuzhiyun u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
8248*4882a593Smuzhiyun
8249*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "\n%30s\n",
8250*4882a593Smuzhiyun "ath10k PDEV TX stats");
8251*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
8252*4882a593Smuzhiyun "=================");
8253*4882a593Smuzhiyun
8254*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8255*4882a593Smuzhiyun "HTT cookies queued", pdev->comp_queued);
8256*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8257*4882a593Smuzhiyun "HTT cookies disp.", pdev->comp_delivered);
8258*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8259*4882a593Smuzhiyun "MSDU queued", pdev->msdu_enqued);
8260*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8261*4882a593Smuzhiyun "MPDU queued", pdev->mpdu_enqued);
8262*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8263*4882a593Smuzhiyun "MSDUs dropped", pdev->wmm_drop);
8264*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8265*4882a593Smuzhiyun "Local enqued", pdev->local_enqued);
8266*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8267*4882a593Smuzhiyun "Local freed", pdev->local_freed);
8268*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8269*4882a593Smuzhiyun "HW queued", pdev->hw_queued);
8270*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8271*4882a593Smuzhiyun "PPDUs reaped", pdev->hw_reaped);
8272*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8273*4882a593Smuzhiyun "Num underruns", pdev->underrun);
8274*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8275*4882a593Smuzhiyun "PPDUs cleaned", pdev->tx_abort);
8276*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8277*4882a593Smuzhiyun "MPDUs requed", pdev->mpdus_requed);
8278*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8279*4882a593Smuzhiyun "Excessive retries", pdev->tx_ko);
8280*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8281*4882a593Smuzhiyun "HW rate", pdev->data_rc);
8282*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8283*4882a593Smuzhiyun "Sched self triggers", pdev->self_triggers);
8284*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8285*4882a593Smuzhiyun "Dropped due to SW retries",
8286*4882a593Smuzhiyun pdev->sw_retry_failure);
8287*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8288*4882a593Smuzhiyun "Illegal rate phy errors",
8289*4882a593Smuzhiyun pdev->illgl_rate_phy_err);
8290*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8291*4882a593Smuzhiyun "Pdev continuous xretry", pdev->pdev_cont_xretry);
8292*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8293*4882a593Smuzhiyun "TX timeout", pdev->pdev_tx_timeout);
8294*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8295*4882a593Smuzhiyun "PDEV resets", pdev->pdev_resets);
8296*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8297*4882a593Smuzhiyun "PHY underrun", pdev->phy_underrun);
8298*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8299*4882a593Smuzhiyun "MPDU is more than txop limit", pdev->txop_ovf);
8300*4882a593Smuzhiyun *length = len;
8301*4882a593Smuzhiyun }
8302*4882a593Smuzhiyun
8303*4882a593Smuzhiyun static void
ath10k_wmi_fw_pdev_rx_stats_fill(const struct ath10k_fw_stats_pdev * pdev,char * buf,u32 * length)8304*4882a593Smuzhiyun ath10k_wmi_fw_pdev_rx_stats_fill(const struct ath10k_fw_stats_pdev *pdev,
8305*4882a593Smuzhiyun char *buf, u32 *length)
8306*4882a593Smuzhiyun {
8307*4882a593Smuzhiyun u32 len = *length;
8308*4882a593Smuzhiyun u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
8309*4882a593Smuzhiyun
8310*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "\n%30s\n",
8311*4882a593Smuzhiyun "ath10k PDEV RX stats");
8312*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
8313*4882a593Smuzhiyun "=================");
8314*4882a593Smuzhiyun
8315*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8316*4882a593Smuzhiyun "Mid PPDU route change",
8317*4882a593Smuzhiyun pdev->mid_ppdu_route_change);
8318*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8319*4882a593Smuzhiyun "Tot. number of statuses", pdev->status_rcvd);
8320*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8321*4882a593Smuzhiyun "Extra frags on rings 0", pdev->r0_frags);
8322*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8323*4882a593Smuzhiyun "Extra frags on rings 1", pdev->r1_frags);
8324*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8325*4882a593Smuzhiyun "Extra frags on rings 2", pdev->r2_frags);
8326*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8327*4882a593Smuzhiyun "Extra frags on rings 3", pdev->r3_frags);
8328*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8329*4882a593Smuzhiyun "MSDUs delivered to HTT", pdev->htt_msdus);
8330*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8331*4882a593Smuzhiyun "MPDUs delivered to HTT", pdev->htt_mpdus);
8332*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8333*4882a593Smuzhiyun "MSDUs delivered to stack", pdev->loc_msdus);
8334*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8335*4882a593Smuzhiyun "MPDUs delivered to stack", pdev->loc_mpdus);
8336*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8337*4882a593Smuzhiyun "Oversized AMSDUs", pdev->oversize_amsdu);
8338*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8339*4882a593Smuzhiyun "PHY errors", pdev->phy_errs);
8340*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8341*4882a593Smuzhiyun "PHY errors drops", pdev->phy_err_drop);
8342*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8343*4882a593Smuzhiyun "MPDU errors (FCS, MIC, ENC)", pdev->mpdu_errs);
8344*4882a593Smuzhiyun *length = len;
8345*4882a593Smuzhiyun }
8346*4882a593Smuzhiyun
8347*4882a593Smuzhiyun static void
ath10k_wmi_fw_vdev_stats_fill(const struct ath10k_fw_stats_vdev * vdev,char * buf,u32 * length)8348*4882a593Smuzhiyun ath10k_wmi_fw_vdev_stats_fill(const struct ath10k_fw_stats_vdev *vdev,
8349*4882a593Smuzhiyun char *buf, u32 *length)
8350*4882a593Smuzhiyun {
8351*4882a593Smuzhiyun u32 len = *length;
8352*4882a593Smuzhiyun u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
8353*4882a593Smuzhiyun int i;
8354*4882a593Smuzhiyun
8355*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8356*4882a593Smuzhiyun "vdev id", vdev->vdev_id);
8357*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8358*4882a593Smuzhiyun "beacon snr", vdev->beacon_snr);
8359*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8360*4882a593Smuzhiyun "data snr", vdev->data_snr);
8361*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8362*4882a593Smuzhiyun "num rx frames", vdev->num_rx_frames);
8363*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8364*4882a593Smuzhiyun "num rts fail", vdev->num_rts_fail);
8365*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8366*4882a593Smuzhiyun "num rts success", vdev->num_rts_success);
8367*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8368*4882a593Smuzhiyun "num rx err", vdev->num_rx_err);
8369*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8370*4882a593Smuzhiyun "num rx discard", vdev->num_rx_discard);
8371*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8372*4882a593Smuzhiyun "num tx not acked", vdev->num_tx_not_acked);
8373*4882a593Smuzhiyun
8374*4882a593Smuzhiyun for (i = 0 ; i < ARRAY_SIZE(vdev->num_tx_frames); i++)
8375*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len,
8376*4882a593Smuzhiyun "%25s [%02d] %u\n",
8377*4882a593Smuzhiyun "num tx frames", i,
8378*4882a593Smuzhiyun vdev->num_tx_frames[i]);
8379*4882a593Smuzhiyun
8380*4882a593Smuzhiyun for (i = 0 ; i < ARRAY_SIZE(vdev->num_tx_frames_retries); i++)
8381*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len,
8382*4882a593Smuzhiyun "%25s [%02d] %u\n",
8383*4882a593Smuzhiyun "num tx frames retries", i,
8384*4882a593Smuzhiyun vdev->num_tx_frames_retries[i]);
8385*4882a593Smuzhiyun
8386*4882a593Smuzhiyun for (i = 0 ; i < ARRAY_SIZE(vdev->num_tx_frames_failures); i++)
8387*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len,
8388*4882a593Smuzhiyun "%25s [%02d] %u\n",
8389*4882a593Smuzhiyun "num tx frames failures", i,
8390*4882a593Smuzhiyun vdev->num_tx_frames_failures[i]);
8391*4882a593Smuzhiyun
8392*4882a593Smuzhiyun for (i = 0 ; i < ARRAY_SIZE(vdev->tx_rate_history); i++)
8393*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len,
8394*4882a593Smuzhiyun "%25s [%02d] 0x%08x\n",
8395*4882a593Smuzhiyun "tx rate history", i,
8396*4882a593Smuzhiyun vdev->tx_rate_history[i]);
8397*4882a593Smuzhiyun
8398*4882a593Smuzhiyun for (i = 0 ; i < ARRAY_SIZE(vdev->beacon_rssi_history); i++)
8399*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len,
8400*4882a593Smuzhiyun "%25s [%02d] %u\n",
8401*4882a593Smuzhiyun "beacon rssi history", i,
8402*4882a593Smuzhiyun vdev->beacon_rssi_history[i]);
8403*4882a593Smuzhiyun
8404*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "\n");
8405*4882a593Smuzhiyun *length = len;
8406*4882a593Smuzhiyun }
8407*4882a593Smuzhiyun
8408*4882a593Smuzhiyun static void
ath10k_wmi_fw_peer_stats_fill(const struct ath10k_fw_stats_peer * peer,char * buf,u32 * length,bool extended_peer)8409*4882a593Smuzhiyun ath10k_wmi_fw_peer_stats_fill(const struct ath10k_fw_stats_peer *peer,
8410*4882a593Smuzhiyun char *buf, u32 *length, bool extended_peer)
8411*4882a593Smuzhiyun {
8412*4882a593Smuzhiyun u32 len = *length;
8413*4882a593Smuzhiyun u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
8414*4882a593Smuzhiyun
8415*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %pM\n",
8416*4882a593Smuzhiyun "Peer MAC address", peer->peer_macaddr);
8417*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8418*4882a593Smuzhiyun "Peer RSSI", peer->peer_rssi);
8419*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8420*4882a593Smuzhiyun "Peer TX rate", peer->peer_tx_rate);
8421*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8422*4882a593Smuzhiyun "Peer RX rate", peer->peer_rx_rate);
8423*4882a593Smuzhiyun if (!extended_peer)
8424*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %llu\n",
8425*4882a593Smuzhiyun "Peer RX duration", peer->rx_duration);
8426*4882a593Smuzhiyun
8427*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "\n");
8428*4882a593Smuzhiyun *length = len;
8429*4882a593Smuzhiyun }
8430*4882a593Smuzhiyun
8431*4882a593Smuzhiyun static void
ath10k_wmi_fw_extd_peer_stats_fill(const struct ath10k_fw_extd_stats_peer * peer,char * buf,u32 * length)8432*4882a593Smuzhiyun ath10k_wmi_fw_extd_peer_stats_fill(const struct ath10k_fw_extd_stats_peer *peer,
8433*4882a593Smuzhiyun char *buf, u32 *length)
8434*4882a593Smuzhiyun {
8435*4882a593Smuzhiyun u32 len = *length;
8436*4882a593Smuzhiyun u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
8437*4882a593Smuzhiyun
8438*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %pM\n",
8439*4882a593Smuzhiyun "Peer MAC address", peer->peer_macaddr);
8440*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %llu\n",
8441*4882a593Smuzhiyun "Peer RX duration", peer->rx_duration);
8442*4882a593Smuzhiyun }
8443*4882a593Smuzhiyun
ath10k_wmi_main_op_fw_stats_fill(struct ath10k * ar,struct ath10k_fw_stats * fw_stats,char * buf)8444*4882a593Smuzhiyun void ath10k_wmi_main_op_fw_stats_fill(struct ath10k *ar,
8445*4882a593Smuzhiyun struct ath10k_fw_stats *fw_stats,
8446*4882a593Smuzhiyun char *buf)
8447*4882a593Smuzhiyun {
8448*4882a593Smuzhiyun u32 len = 0;
8449*4882a593Smuzhiyun u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
8450*4882a593Smuzhiyun const struct ath10k_fw_stats_pdev *pdev;
8451*4882a593Smuzhiyun const struct ath10k_fw_stats_vdev *vdev;
8452*4882a593Smuzhiyun const struct ath10k_fw_stats_peer *peer;
8453*4882a593Smuzhiyun size_t num_peers;
8454*4882a593Smuzhiyun size_t num_vdevs;
8455*4882a593Smuzhiyun
8456*4882a593Smuzhiyun spin_lock_bh(&ar->data_lock);
8457*4882a593Smuzhiyun
8458*4882a593Smuzhiyun pdev = list_first_entry_or_null(&fw_stats->pdevs,
8459*4882a593Smuzhiyun struct ath10k_fw_stats_pdev, list);
8460*4882a593Smuzhiyun if (!pdev) {
8461*4882a593Smuzhiyun ath10k_warn(ar, "failed to get pdev stats\n");
8462*4882a593Smuzhiyun goto unlock;
8463*4882a593Smuzhiyun }
8464*4882a593Smuzhiyun
8465*4882a593Smuzhiyun num_peers = ath10k_wmi_fw_stats_num_peers(&fw_stats->peers);
8466*4882a593Smuzhiyun num_vdevs = ath10k_wmi_fw_stats_num_vdevs(&fw_stats->vdevs);
8467*4882a593Smuzhiyun
8468*4882a593Smuzhiyun ath10k_wmi_fw_pdev_base_stats_fill(pdev, buf, &len);
8469*4882a593Smuzhiyun ath10k_wmi_fw_pdev_tx_stats_fill(pdev, buf, &len);
8470*4882a593Smuzhiyun ath10k_wmi_fw_pdev_rx_stats_fill(pdev, buf, &len);
8471*4882a593Smuzhiyun
8472*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "\n");
8473*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
8474*4882a593Smuzhiyun "ath10k VDEV stats", num_vdevs);
8475*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
8476*4882a593Smuzhiyun "=================");
8477*4882a593Smuzhiyun
8478*4882a593Smuzhiyun list_for_each_entry(vdev, &fw_stats->vdevs, list) {
8479*4882a593Smuzhiyun ath10k_wmi_fw_vdev_stats_fill(vdev, buf, &len);
8480*4882a593Smuzhiyun }
8481*4882a593Smuzhiyun
8482*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "\n");
8483*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
8484*4882a593Smuzhiyun "ath10k PEER stats", num_peers);
8485*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
8486*4882a593Smuzhiyun "=================");
8487*4882a593Smuzhiyun
8488*4882a593Smuzhiyun list_for_each_entry(peer, &fw_stats->peers, list) {
8489*4882a593Smuzhiyun ath10k_wmi_fw_peer_stats_fill(peer, buf, &len,
8490*4882a593Smuzhiyun fw_stats->extended);
8491*4882a593Smuzhiyun }
8492*4882a593Smuzhiyun
8493*4882a593Smuzhiyun unlock:
8494*4882a593Smuzhiyun spin_unlock_bh(&ar->data_lock);
8495*4882a593Smuzhiyun
8496*4882a593Smuzhiyun if (len >= buf_len)
8497*4882a593Smuzhiyun buf[len - 1] = 0;
8498*4882a593Smuzhiyun else
8499*4882a593Smuzhiyun buf[len] = 0;
8500*4882a593Smuzhiyun }
8501*4882a593Smuzhiyun
ath10k_wmi_10x_op_fw_stats_fill(struct ath10k * ar,struct ath10k_fw_stats * fw_stats,char * buf)8502*4882a593Smuzhiyun void ath10k_wmi_10x_op_fw_stats_fill(struct ath10k *ar,
8503*4882a593Smuzhiyun struct ath10k_fw_stats *fw_stats,
8504*4882a593Smuzhiyun char *buf)
8505*4882a593Smuzhiyun {
8506*4882a593Smuzhiyun unsigned int len = 0;
8507*4882a593Smuzhiyun unsigned int buf_len = ATH10K_FW_STATS_BUF_SIZE;
8508*4882a593Smuzhiyun const struct ath10k_fw_stats_pdev *pdev;
8509*4882a593Smuzhiyun const struct ath10k_fw_stats_vdev *vdev;
8510*4882a593Smuzhiyun const struct ath10k_fw_stats_peer *peer;
8511*4882a593Smuzhiyun size_t num_peers;
8512*4882a593Smuzhiyun size_t num_vdevs;
8513*4882a593Smuzhiyun
8514*4882a593Smuzhiyun spin_lock_bh(&ar->data_lock);
8515*4882a593Smuzhiyun
8516*4882a593Smuzhiyun pdev = list_first_entry_or_null(&fw_stats->pdevs,
8517*4882a593Smuzhiyun struct ath10k_fw_stats_pdev, list);
8518*4882a593Smuzhiyun if (!pdev) {
8519*4882a593Smuzhiyun ath10k_warn(ar, "failed to get pdev stats\n");
8520*4882a593Smuzhiyun goto unlock;
8521*4882a593Smuzhiyun }
8522*4882a593Smuzhiyun
8523*4882a593Smuzhiyun num_peers = ath10k_wmi_fw_stats_num_peers(&fw_stats->peers);
8524*4882a593Smuzhiyun num_vdevs = ath10k_wmi_fw_stats_num_vdevs(&fw_stats->vdevs);
8525*4882a593Smuzhiyun
8526*4882a593Smuzhiyun ath10k_wmi_fw_pdev_base_stats_fill(pdev, buf, &len);
8527*4882a593Smuzhiyun ath10k_wmi_fw_pdev_extra_stats_fill(pdev, buf, &len);
8528*4882a593Smuzhiyun ath10k_wmi_fw_pdev_tx_stats_fill(pdev, buf, &len);
8529*4882a593Smuzhiyun ath10k_wmi_fw_pdev_rx_stats_fill(pdev, buf, &len);
8530*4882a593Smuzhiyun
8531*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "\n");
8532*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
8533*4882a593Smuzhiyun "ath10k VDEV stats", num_vdevs);
8534*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
8535*4882a593Smuzhiyun "=================");
8536*4882a593Smuzhiyun
8537*4882a593Smuzhiyun list_for_each_entry(vdev, &fw_stats->vdevs, list) {
8538*4882a593Smuzhiyun ath10k_wmi_fw_vdev_stats_fill(vdev, buf, &len);
8539*4882a593Smuzhiyun }
8540*4882a593Smuzhiyun
8541*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "\n");
8542*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
8543*4882a593Smuzhiyun "ath10k PEER stats", num_peers);
8544*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
8545*4882a593Smuzhiyun "=================");
8546*4882a593Smuzhiyun
8547*4882a593Smuzhiyun list_for_each_entry(peer, &fw_stats->peers, list) {
8548*4882a593Smuzhiyun ath10k_wmi_fw_peer_stats_fill(peer, buf, &len,
8549*4882a593Smuzhiyun fw_stats->extended);
8550*4882a593Smuzhiyun }
8551*4882a593Smuzhiyun
8552*4882a593Smuzhiyun unlock:
8553*4882a593Smuzhiyun spin_unlock_bh(&ar->data_lock);
8554*4882a593Smuzhiyun
8555*4882a593Smuzhiyun if (len >= buf_len)
8556*4882a593Smuzhiyun buf[len - 1] = 0;
8557*4882a593Smuzhiyun else
8558*4882a593Smuzhiyun buf[len] = 0;
8559*4882a593Smuzhiyun }
8560*4882a593Smuzhiyun
8561*4882a593Smuzhiyun static struct sk_buff *
ath10k_wmi_op_gen_pdev_enable_adaptive_cca(struct ath10k * ar,u8 enable,u32 detect_level,u32 detect_margin)8562*4882a593Smuzhiyun ath10k_wmi_op_gen_pdev_enable_adaptive_cca(struct ath10k *ar, u8 enable,
8563*4882a593Smuzhiyun u32 detect_level, u32 detect_margin)
8564*4882a593Smuzhiyun {
8565*4882a593Smuzhiyun struct wmi_pdev_set_adaptive_cca_params *cmd;
8566*4882a593Smuzhiyun struct sk_buff *skb;
8567*4882a593Smuzhiyun
8568*4882a593Smuzhiyun skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
8569*4882a593Smuzhiyun if (!skb)
8570*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
8571*4882a593Smuzhiyun
8572*4882a593Smuzhiyun cmd = (struct wmi_pdev_set_adaptive_cca_params *)skb->data;
8573*4882a593Smuzhiyun cmd->enable = __cpu_to_le32(enable);
8574*4882a593Smuzhiyun cmd->cca_detect_level = __cpu_to_le32(detect_level);
8575*4882a593Smuzhiyun cmd->cca_detect_margin = __cpu_to_le32(detect_margin);
8576*4882a593Smuzhiyun
8577*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI,
8578*4882a593Smuzhiyun "wmi pdev set adaptive cca params enable:%d detection level:%d detection margin:%d\n",
8579*4882a593Smuzhiyun enable, detect_level, detect_margin);
8580*4882a593Smuzhiyun return skb;
8581*4882a593Smuzhiyun }
8582*4882a593Smuzhiyun
8583*4882a593Smuzhiyun static void
ath10k_wmi_fw_vdev_stats_extd_fill(const struct ath10k_fw_stats_vdev_extd * vdev,char * buf,u32 * length)8584*4882a593Smuzhiyun ath10k_wmi_fw_vdev_stats_extd_fill(const struct ath10k_fw_stats_vdev_extd *vdev,
8585*4882a593Smuzhiyun char *buf, u32 *length)
8586*4882a593Smuzhiyun {
8587*4882a593Smuzhiyun u32 len = *length;
8588*4882a593Smuzhiyun u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
8589*4882a593Smuzhiyun u32 val;
8590*4882a593Smuzhiyun
8591*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8592*4882a593Smuzhiyun "vdev id", vdev->vdev_id);
8593*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8594*4882a593Smuzhiyun "ppdu aggr count", vdev->ppdu_aggr_cnt);
8595*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8596*4882a593Smuzhiyun "ppdu noack", vdev->ppdu_noack);
8597*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8598*4882a593Smuzhiyun "mpdu queued", vdev->mpdu_queued);
8599*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8600*4882a593Smuzhiyun "ppdu nonaggr count", vdev->ppdu_nonaggr_cnt);
8601*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8602*4882a593Smuzhiyun "mpdu sw requeued", vdev->mpdu_sw_requeued);
8603*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8604*4882a593Smuzhiyun "mpdu success retry", vdev->mpdu_suc_retry);
8605*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8606*4882a593Smuzhiyun "mpdu success multitry", vdev->mpdu_suc_multitry);
8607*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8608*4882a593Smuzhiyun "mpdu fail retry", vdev->mpdu_fail_retry);
8609*4882a593Smuzhiyun val = vdev->tx_ftm_suc;
8610*4882a593Smuzhiyun if (val & WMI_VDEV_STATS_FTM_COUNT_VALID)
8611*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8612*4882a593Smuzhiyun "tx ftm success",
8613*4882a593Smuzhiyun MS(val, WMI_VDEV_STATS_FTM_COUNT));
8614*4882a593Smuzhiyun val = vdev->tx_ftm_suc_retry;
8615*4882a593Smuzhiyun if (val & WMI_VDEV_STATS_FTM_COUNT_VALID)
8616*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8617*4882a593Smuzhiyun "tx ftm success retry",
8618*4882a593Smuzhiyun MS(val, WMI_VDEV_STATS_FTM_COUNT));
8619*4882a593Smuzhiyun val = vdev->tx_ftm_fail;
8620*4882a593Smuzhiyun if (val & WMI_VDEV_STATS_FTM_COUNT_VALID)
8621*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8622*4882a593Smuzhiyun "tx ftm fail",
8623*4882a593Smuzhiyun MS(val, WMI_VDEV_STATS_FTM_COUNT));
8624*4882a593Smuzhiyun val = vdev->rx_ftmr_cnt;
8625*4882a593Smuzhiyun if (val & WMI_VDEV_STATS_FTM_COUNT_VALID)
8626*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8627*4882a593Smuzhiyun "rx ftm request count",
8628*4882a593Smuzhiyun MS(val, WMI_VDEV_STATS_FTM_COUNT));
8629*4882a593Smuzhiyun val = vdev->rx_ftmr_dup_cnt;
8630*4882a593Smuzhiyun if (val & WMI_VDEV_STATS_FTM_COUNT_VALID)
8631*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8632*4882a593Smuzhiyun "rx ftm request dup count",
8633*4882a593Smuzhiyun MS(val, WMI_VDEV_STATS_FTM_COUNT));
8634*4882a593Smuzhiyun val = vdev->rx_iftmr_cnt;
8635*4882a593Smuzhiyun if (val & WMI_VDEV_STATS_FTM_COUNT_VALID)
8636*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8637*4882a593Smuzhiyun "rx initial ftm req count",
8638*4882a593Smuzhiyun MS(val, WMI_VDEV_STATS_FTM_COUNT));
8639*4882a593Smuzhiyun val = vdev->rx_iftmr_dup_cnt;
8640*4882a593Smuzhiyun if (val & WMI_VDEV_STATS_FTM_COUNT_VALID)
8641*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %u\n",
8642*4882a593Smuzhiyun "rx initial ftm req dup cnt",
8643*4882a593Smuzhiyun MS(val, WMI_VDEV_STATS_FTM_COUNT));
8644*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "\n");
8645*4882a593Smuzhiyun
8646*4882a593Smuzhiyun *length = len;
8647*4882a593Smuzhiyun }
8648*4882a593Smuzhiyun
ath10k_wmi_10_4_op_fw_stats_fill(struct ath10k * ar,struct ath10k_fw_stats * fw_stats,char * buf)8649*4882a593Smuzhiyun void ath10k_wmi_10_4_op_fw_stats_fill(struct ath10k *ar,
8650*4882a593Smuzhiyun struct ath10k_fw_stats *fw_stats,
8651*4882a593Smuzhiyun char *buf)
8652*4882a593Smuzhiyun {
8653*4882a593Smuzhiyun u32 len = 0;
8654*4882a593Smuzhiyun u32 buf_len = ATH10K_FW_STATS_BUF_SIZE;
8655*4882a593Smuzhiyun const struct ath10k_fw_stats_pdev *pdev;
8656*4882a593Smuzhiyun const struct ath10k_fw_stats_vdev_extd *vdev;
8657*4882a593Smuzhiyun const struct ath10k_fw_stats_peer *peer;
8658*4882a593Smuzhiyun const struct ath10k_fw_extd_stats_peer *extd_peer;
8659*4882a593Smuzhiyun size_t num_peers;
8660*4882a593Smuzhiyun size_t num_vdevs;
8661*4882a593Smuzhiyun
8662*4882a593Smuzhiyun spin_lock_bh(&ar->data_lock);
8663*4882a593Smuzhiyun
8664*4882a593Smuzhiyun pdev = list_first_entry_or_null(&fw_stats->pdevs,
8665*4882a593Smuzhiyun struct ath10k_fw_stats_pdev, list);
8666*4882a593Smuzhiyun if (!pdev) {
8667*4882a593Smuzhiyun ath10k_warn(ar, "failed to get pdev stats\n");
8668*4882a593Smuzhiyun goto unlock;
8669*4882a593Smuzhiyun }
8670*4882a593Smuzhiyun
8671*4882a593Smuzhiyun num_peers = ath10k_wmi_fw_stats_num_peers(&fw_stats->peers);
8672*4882a593Smuzhiyun num_vdevs = ath10k_wmi_fw_stats_num_vdevs(&fw_stats->vdevs);
8673*4882a593Smuzhiyun
8674*4882a593Smuzhiyun ath10k_wmi_fw_pdev_base_stats_fill(pdev, buf, &len);
8675*4882a593Smuzhiyun ath10k_wmi_fw_pdev_extra_stats_fill(pdev, buf, &len);
8676*4882a593Smuzhiyun ath10k_wmi_fw_pdev_tx_stats_fill(pdev, buf, &len);
8677*4882a593Smuzhiyun
8678*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8679*4882a593Smuzhiyun "HW paused", pdev->hw_paused);
8680*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8681*4882a593Smuzhiyun "Seqs posted", pdev->seq_posted);
8682*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8683*4882a593Smuzhiyun "Seqs failed queueing", pdev->seq_failed_queueing);
8684*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8685*4882a593Smuzhiyun "Seqs completed", pdev->seq_completed);
8686*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8687*4882a593Smuzhiyun "Seqs restarted", pdev->seq_restarted);
8688*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8689*4882a593Smuzhiyun "MU Seqs posted", pdev->mu_seq_posted);
8690*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8691*4882a593Smuzhiyun "MPDUs SW flushed", pdev->mpdus_sw_flush);
8692*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8693*4882a593Smuzhiyun "MPDUs HW filtered", pdev->mpdus_hw_filter);
8694*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8695*4882a593Smuzhiyun "MPDUs truncated", pdev->mpdus_truncated);
8696*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8697*4882a593Smuzhiyun "MPDUs receive no ACK", pdev->mpdus_ack_failed);
8698*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8699*4882a593Smuzhiyun "MPDUs expired", pdev->mpdus_expired);
8700*4882a593Smuzhiyun
8701*4882a593Smuzhiyun ath10k_wmi_fw_pdev_rx_stats_fill(pdev, buf, &len);
8702*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s %10d\n",
8703*4882a593Smuzhiyun "Num Rx Overflow errors", pdev->rx_ovfl_errs);
8704*4882a593Smuzhiyun
8705*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "\n");
8706*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
8707*4882a593Smuzhiyun "ath10k VDEV stats", num_vdevs);
8708*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
8709*4882a593Smuzhiyun "=================");
8710*4882a593Smuzhiyun list_for_each_entry(vdev, &fw_stats->vdevs, list) {
8711*4882a593Smuzhiyun ath10k_wmi_fw_vdev_stats_extd_fill(vdev, buf, &len);
8712*4882a593Smuzhiyun }
8713*4882a593Smuzhiyun
8714*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "\n");
8715*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s (%zu)\n",
8716*4882a593Smuzhiyun "ath10k PEER stats", num_peers);
8717*4882a593Smuzhiyun len += scnprintf(buf + len, buf_len - len, "%30s\n\n",
8718*4882a593Smuzhiyun "=================");
8719*4882a593Smuzhiyun
8720*4882a593Smuzhiyun list_for_each_entry(peer, &fw_stats->peers, list) {
8721*4882a593Smuzhiyun ath10k_wmi_fw_peer_stats_fill(peer, buf, &len,
8722*4882a593Smuzhiyun fw_stats->extended);
8723*4882a593Smuzhiyun }
8724*4882a593Smuzhiyun
8725*4882a593Smuzhiyun if (fw_stats->extended) {
8726*4882a593Smuzhiyun list_for_each_entry(extd_peer, &fw_stats->peers_extd, list) {
8727*4882a593Smuzhiyun ath10k_wmi_fw_extd_peer_stats_fill(extd_peer, buf,
8728*4882a593Smuzhiyun &len);
8729*4882a593Smuzhiyun }
8730*4882a593Smuzhiyun }
8731*4882a593Smuzhiyun
8732*4882a593Smuzhiyun unlock:
8733*4882a593Smuzhiyun spin_unlock_bh(&ar->data_lock);
8734*4882a593Smuzhiyun
8735*4882a593Smuzhiyun if (len >= buf_len)
8736*4882a593Smuzhiyun buf[len - 1] = 0;
8737*4882a593Smuzhiyun else
8738*4882a593Smuzhiyun buf[len] = 0;
8739*4882a593Smuzhiyun }
8740*4882a593Smuzhiyun
ath10k_wmi_op_get_vdev_subtype(struct ath10k * ar,enum wmi_vdev_subtype subtype)8741*4882a593Smuzhiyun int ath10k_wmi_op_get_vdev_subtype(struct ath10k *ar,
8742*4882a593Smuzhiyun enum wmi_vdev_subtype subtype)
8743*4882a593Smuzhiyun {
8744*4882a593Smuzhiyun switch (subtype) {
8745*4882a593Smuzhiyun case WMI_VDEV_SUBTYPE_NONE:
8746*4882a593Smuzhiyun return WMI_VDEV_SUBTYPE_LEGACY_NONE;
8747*4882a593Smuzhiyun case WMI_VDEV_SUBTYPE_P2P_DEVICE:
8748*4882a593Smuzhiyun return WMI_VDEV_SUBTYPE_LEGACY_P2P_DEV;
8749*4882a593Smuzhiyun case WMI_VDEV_SUBTYPE_P2P_CLIENT:
8750*4882a593Smuzhiyun return WMI_VDEV_SUBTYPE_LEGACY_P2P_CLI;
8751*4882a593Smuzhiyun case WMI_VDEV_SUBTYPE_P2P_GO:
8752*4882a593Smuzhiyun return WMI_VDEV_SUBTYPE_LEGACY_P2P_GO;
8753*4882a593Smuzhiyun case WMI_VDEV_SUBTYPE_PROXY_STA:
8754*4882a593Smuzhiyun return WMI_VDEV_SUBTYPE_LEGACY_PROXY_STA;
8755*4882a593Smuzhiyun case WMI_VDEV_SUBTYPE_MESH_11S:
8756*4882a593Smuzhiyun case WMI_VDEV_SUBTYPE_MESH_NON_11S:
8757*4882a593Smuzhiyun return -ENOTSUPP;
8758*4882a593Smuzhiyun }
8759*4882a593Smuzhiyun return -ENOTSUPP;
8760*4882a593Smuzhiyun }
8761*4882a593Smuzhiyun
ath10k_wmi_10_2_4_op_get_vdev_subtype(struct ath10k * ar,enum wmi_vdev_subtype subtype)8762*4882a593Smuzhiyun static int ath10k_wmi_10_2_4_op_get_vdev_subtype(struct ath10k *ar,
8763*4882a593Smuzhiyun enum wmi_vdev_subtype subtype)
8764*4882a593Smuzhiyun {
8765*4882a593Smuzhiyun switch (subtype) {
8766*4882a593Smuzhiyun case WMI_VDEV_SUBTYPE_NONE:
8767*4882a593Smuzhiyun return WMI_VDEV_SUBTYPE_10_2_4_NONE;
8768*4882a593Smuzhiyun case WMI_VDEV_SUBTYPE_P2P_DEVICE:
8769*4882a593Smuzhiyun return WMI_VDEV_SUBTYPE_10_2_4_P2P_DEV;
8770*4882a593Smuzhiyun case WMI_VDEV_SUBTYPE_P2P_CLIENT:
8771*4882a593Smuzhiyun return WMI_VDEV_SUBTYPE_10_2_4_P2P_CLI;
8772*4882a593Smuzhiyun case WMI_VDEV_SUBTYPE_P2P_GO:
8773*4882a593Smuzhiyun return WMI_VDEV_SUBTYPE_10_2_4_P2P_GO;
8774*4882a593Smuzhiyun case WMI_VDEV_SUBTYPE_PROXY_STA:
8775*4882a593Smuzhiyun return WMI_VDEV_SUBTYPE_10_2_4_PROXY_STA;
8776*4882a593Smuzhiyun case WMI_VDEV_SUBTYPE_MESH_11S:
8777*4882a593Smuzhiyun return WMI_VDEV_SUBTYPE_10_2_4_MESH_11S;
8778*4882a593Smuzhiyun case WMI_VDEV_SUBTYPE_MESH_NON_11S:
8779*4882a593Smuzhiyun return -ENOTSUPP;
8780*4882a593Smuzhiyun }
8781*4882a593Smuzhiyun return -ENOTSUPP;
8782*4882a593Smuzhiyun }
8783*4882a593Smuzhiyun
ath10k_wmi_10_4_op_get_vdev_subtype(struct ath10k * ar,enum wmi_vdev_subtype subtype)8784*4882a593Smuzhiyun static int ath10k_wmi_10_4_op_get_vdev_subtype(struct ath10k *ar,
8785*4882a593Smuzhiyun enum wmi_vdev_subtype subtype)
8786*4882a593Smuzhiyun {
8787*4882a593Smuzhiyun switch (subtype) {
8788*4882a593Smuzhiyun case WMI_VDEV_SUBTYPE_NONE:
8789*4882a593Smuzhiyun return WMI_VDEV_SUBTYPE_10_4_NONE;
8790*4882a593Smuzhiyun case WMI_VDEV_SUBTYPE_P2P_DEVICE:
8791*4882a593Smuzhiyun return WMI_VDEV_SUBTYPE_10_4_P2P_DEV;
8792*4882a593Smuzhiyun case WMI_VDEV_SUBTYPE_P2P_CLIENT:
8793*4882a593Smuzhiyun return WMI_VDEV_SUBTYPE_10_4_P2P_CLI;
8794*4882a593Smuzhiyun case WMI_VDEV_SUBTYPE_P2P_GO:
8795*4882a593Smuzhiyun return WMI_VDEV_SUBTYPE_10_4_P2P_GO;
8796*4882a593Smuzhiyun case WMI_VDEV_SUBTYPE_PROXY_STA:
8797*4882a593Smuzhiyun return WMI_VDEV_SUBTYPE_10_4_PROXY_STA;
8798*4882a593Smuzhiyun case WMI_VDEV_SUBTYPE_MESH_11S:
8799*4882a593Smuzhiyun return WMI_VDEV_SUBTYPE_10_4_MESH_11S;
8800*4882a593Smuzhiyun case WMI_VDEV_SUBTYPE_MESH_NON_11S:
8801*4882a593Smuzhiyun return WMI_VDEV_SUBTYPE_10_4_MESH_NON_11S;
8802*4882a593Smuzhiyun }
8803*4882a593Smuzhiyun return -ENOTSUPP;
8804*4882a593Smuzhiyun }
8805*4882a593Smuzhiyun
8806*4882a593Smuzhiyun static struct sk_buff *
ath10k_wmi_10_4_ext_resource_config(struct ath10k * ar,enum wmi_host_platform_type type,u32 fw_feature_bitmap)8807*4882a593Smuzhiyun ath10k_wmi_10_4_ext_resource_config(struct ath10k *ar,
8808*4882a593Smuzhiyun enum wmi_host_platform_type type,
8809*4882a593Smuzhiyun u32 fw_feature_bitmap)
8810*4882a593Smuzhiyun {
8811*4882a593Smuzhiyun struct wmi_ext_resource_config_10_4_cmd *cmd;
8812*4882a593Smuzhiyun struct sk_buff *skb;
8813*4882a593Smuzhiyun u32 num_tdls_sleep_sta = 0;
8814*4882a593Smuzhiyun
8815*4882a593Smuzhiyun skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
8816*4882a593Smuzhiyun if (!skb)
8817*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
8818*4882a593Smuzhiyun
8819*4882a593Smuzhiyun if (test_bit(WMI_SERVICE_TDLS_UAPSD_SLEEP_STA, ar->wmi.svc_map))
8820*4882a593Smuzhiyun num_tdls_sleep_sta = TARGET_10_4_NUM_TDLS_SLEEP_STA;
8821*4882a593Smuzhiyun
8822*4882a593Smuzhiyun cmd = (struct wmi_ext_resource_config_10_4_cmd *)skb->data;
8823*4882a593Smuzhiyun cmd->host_platform_config = __cpu_to_le32(type);
8824*4882a593Smuzhiyun cmd->fw_feature_bitmap = __cpu_to_le32(fw_feature_bitmap);
8825*4882a593Smuzhiyun cmd->wlan_gpio_priority = __cpu_to_le32(ar->coex_gpio_pin);
8826*4882a593Smuzhiyun cmd->coex_version = __cpu_to_le32(WMI_NO_COEX_VERSION_SUPPORT);
8827*4882a593Smuzhiyun cmd->coex_gpio_pin1 = __cpu_to_le32(-1);
8828*4882a593Smuzhiyun cmd->coex_gpio_pin2 = __cpu_to_le32(-1);
8829*4882a593Smuzhiyun cmd->coex_gpio_pin3 = __cpu_to_le32(-1);
8830*4882a593Smuzhiyun cmd->num_tdls_vdevs = __cpu_to_le32(TARGET_10_4_NUM_TDLS_VDEVS);
8831*4882a593Smuzhiyun cmd->num_tdls_conn_table_entries = __cpu_to_le32(20);
8832*4882a593Smuzhiyun cmd->max_tdls_concurrent_sleep_sta = __cpu_to_le32(num_tdls_sleep_sta);
8833*4882a593Smuzhiyun cmd->max_tdls_concurrent_buffer_sta =
8834*4882a593Smuzhiyun __cpu_to_le32(TARGET_10_4_NUM_TDLS_BUFFER_STA);
8835*4882a593Smuzhiyun
8836*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI,
8837*4882a593Smuzhiyun "wmi ext resource config host type %d firmware feature bitmap %08x\n",
8838*4882a593Smuzhiyun type, fw_feature_bitmap);
8839*4882a593Smuzhiyun return skb;
8840*4882a593Smuzhiyun }
8841*4882a593Smuzhiyun
8842*4882a593Smuzhiyun static struct sk_buff *
ath10k_wmi_10_4_gen_update_fw_tdls_state(struct ath10k * ar,u32 vdev_id,enum wmi_tdls_state state)8843*4882a593Smuzhiyun ath10k_wmi_10_4_gen_update_fw_tdls_state(struct ath10k *ar, u32 vdev_id,
8844*4882a593Smuzhiyun enum wmi_tdls_state state)
8845*4882a593Smuzhiyun {
8846*4882a593Smuzhiyun struct wmi_10_4_tdls_set_state_cmd *cmd;
8847*4882a593Smuzhiyun struct sk_buff *skb;
8848*4882a593Smuzhiyun u32 options = 0;
8849*4882a593Smuzhiyun
8850*4882a593Smuzhiyun skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
8851*4882a593Smuzhiyun if (!skb)
8852*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
8853*4882a593Smuzhiyun
8854*4882a593Smuzhiyun if (test_bit(WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY, ar->wmi.svc_map) &&
8855*4882a593Smuzhiyun state == WMI_TDLS_ENABLE_ACTIVE)
8856*4882a593Smuzhiyun state = WMI_TDLS_ENABLE_PASSIVE;
8857*4882a593Smuzhiyun
8858*4882a593Smuzhiyun if (test_bit(WMI_SERVICE_TDLS_UAPSD_BUFFER_STA, ar->wmi.svc_map))
8859*4882a593Smuzhiyun options |= WMI_TDLS_BUFFER_STA_EN;
8860*4882a593Smuzhiyun
8861*4882a593Smuzhiyun cmd = (struct wmi_10_4_tdls_set_state_cmd *)skb->data;
8862*4882a593Smuzhiyun cmd->vdev_id = __cpu_to_le32(vdev_id);
8863*4882a593Smuzhiyun cmd->state = __cpu_to_le32(state);
8864*4882a593Smuzhiyun cmd->notification_interval_ms = __cpu_to_le32(5000);
8865*4882a593Smuzhiyun cmd->tx_discovery_threshold = __cpu_to_le32(100);
8866*4882a593Smuzhiyun cmd->tx_teardown_threshold = __cpu_to_le32(5);
8867*4882a593Smuzhiyun cmd->rssi_teardown_threshold = __cpu_to_le32(-75);
8868*4882a593Smuzhiyun cmd->rssi_delta = __cpu_to_le32(-20);
8869*4882a593Smuzhiyun cmd->tdls_options = __cpu_to_le32(options);
8870*4882a593Smuzhiyun cmd->tdls_peer_traffic_ind_window = __cpu_to_le32(2);
8871*4882a593Smuzhiyun cmd->tdls_peer_traffic_response_timeout_ms = __cpu_to_le32(5000);
8872*4882a593Smuzhiyun cmd->tdls_puapsd_mask = __cpu_to_le32(0xf);
8873*4882a593Smuzhiyun cmd->tdls_puapsd_inactivity_time_ms = __cpu_to_le32(0);
8874*4882a593Smuzhiyun cmd->tdls_puapsd_rx_frame_threshold = __cpu_to_le32(10);
8875*4882a593Smuzhiyun cmd->teardown_notification_ms = __cpu_to_le32(10);
8876*4882a593Smuzhiyun cmd->tdls_peer_kickout_threshold = __cpu_to_le32(96);
8877*4882a593Smuzhiyun
8878*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi update fw tdls state %d for vdev %i\n",
8879*4882a593Smuzhiyun state, vdev_id);
8880*4882a593Smuzhiyun return skb;
8881*4882a593Smuzhiyun }
8882*4882a593Smuzhiyun
ath10k_wmi_prepare_peer_qos(u8 uapsd_queues,u8 sp)8883*4882a593Smuzhiyun static u32 ath10k_wmi_prepare_peer_qos(u8 uapsd_queues, u8 sp)
8884*4882a593Smuzhiyun {
8885*4882a593Smuzhiyun u32 peer_qos = 0;
8886*4882a593Smuzhiyun
8887*4882a593Smuzhiyun if (uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_VO)
8888*4882a593Smuzhiyun peer_qos |= WMI_TDLS_PEER_QOS_AC_VO;
8889*4882a593Smuzhiyun if (uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_VI)
8890*4882a593Smuzhiyun peer_qos |= WMI_TDLS_PEER_QOS_AC_VI;
8891*4882a593Smuzhiyun if (uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_BK)
8892*4882a593Smuzhiyun peer_qos |= WMI_TDLS_PEER_QOS_AC_BK;
8893*4882a593Smuzhiyun if (uapsd_queues & IEEE80211_WMM_IE_STA_QOSINFO_AC_BE)
8894*4882a593Smuzhiyun peer_qos |= WMI_TDLS_PEER_QOS_AC_BE;
8895*4882a593Smuzhiyun
8896*4882a593Smuzhiyun peer_qos |= SM(sp, WMI_TDLS_PEER_SP);
8897*4882a593Smuzhiyun
8898*4882a593Smuzhiyun return peer_qos;
8899*4882a593Smuzhiyun }
8900*4882a593Smuzhiyun
8901*4882a593Smuzhiyun static struct sk_buff *
ath10k_wmi_10_4_op_gen_pdev_get_tpc_table_cmdid(struct ath10k * ar,u32 param)8902*4882a593Smuzhiyun ath10k_wmi_10_4_op_gen_pdev_get_tpc_table_cmdid(struct ath10k *ar, u32 param)
8903*4882a593Smuzhiyun {
8904*4882a593Smuzhiyun struct wmi_pdev_get_tpc_table_cmd *cmd;
8905*4882a593Smuzhiyun struct sk_buff *skb;
8906*4882a593Smuzhiyun
8907*4882a593Smuzhiyun skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
8908*4882a593Smuzhiyun if (!skb)
8909*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
8910*4882a593Smuzhiyun
8911*4882a593Smuzhiyun cmd = (struct wmi_pdev_get_tpc_table_cmd *)skb->data;
8912*4882a593Smuzhiyun cmd->param = __cpu_to_le32(param);
8913*4882a593Smuzhiyun
8914*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI,
8915*4882a593Smuzhiyun "wmi pdev get tpc table param:%d\n", param);
8916*4882a593Smuzhiyun return skb;
8917*4882a593Smuzhiyun }
8918*4882a593Smuzhiyun
8919*4882a593Smuzhiyun static struct sk_buff *
ath10k_wmi_10_4_gen_tdls_peer_update(struct ath10k * ar,const struct wmi_tdls_peer_update_cmd_arg * arg,const struct wmi_tdls_peer_capab_arg * cap,const struct wmi_channel_arg * chan_arg)8920*4882a593Smuzhiyun ath10k_wmi_10_4_gen_tdls_peer_update(struct ath10k *ar,
8921*4882a593Smuzhiyun const struct wmi_tdls_peer_update_cmd_arg *arg,
8922*4882a593Smuzhiyun const struct wmi_tdls_peer_capab_arg *cap,
8923*4882a593Smuzhiyun const struct wmi_channel_arg *chan_arg)
8924*4882a593Smuzhiyun {
8925*4882a593Smuzhiyun struct wmi_10_4_tdls_peer_update_cmd *cmd;
8926*4882a593Smuzhiyun struct wmi_tdls_peer_capabilities *peer_cap;
8927*4882a593Smuzhiyun struct wmi_channel *chan;
8928*4882a593Smuzhiyun struct sk_buff *skb;
8929*4882a593Smuzhiyun u32 peer_qos;
8930*4882a593Smuzhiyun int len, chan_len;
8931*4882a593Smuzhiyun int i;
8932*4882a593Smuzhiyun
8933*4882a593Smuzhiyun /* tdls peer update cmd has place holder for one channel*/
8934*4882a593Smuzhiyun chan_len = cap->peer_chan_len ? (cap->peer_chan_len - 1) : 0;
8935*4882a593Smuzhiyun
8936*4882a593Smuzhiyun len = sizeof(*cmd) + chan_len * sizeof(*chan);
8937*4882a593Smuzhiyun
8938*4882a593Smuzhiyun skb = ath10k_wmi_alloc_skb(ar, len);
8939*4882a593Smuzhiyun if (!skb)
8940*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
8941*4882a593Smuzhiyun
8942*4882a593Smuzhiyun memset(skb->data, 0, sizeof(*cmd));
8943*4882a593Smuzhiyun
8944*4882a593Smuzhiyun cmd = (struct wmi_10_4_tdls_peer_update_cmd *)skb->data;
8945*4882a593Smuzhiyun cmd->vdev_id = __cpu_to_le32(arg->vdev_id);
8946*4882a593Smuzhiyun ether_addr_copy(cmd->peer_macaddr.addr, arg->addr);
8947*4882a593Smuzhiyun cmd->peer_state = __cpu_to_le32(arg->peer_state);
8948*4882a593Smuzhiyun
8949*4882a593Smuzhiyun peer_qos = ath10k_wmi_prepare_peer_qos(cap->peer_uapsd_queues,
8950*4882a593Smuzhiyun cap->peer_max_sp);
8951*4882a593Smuzhiyun
8952*4882a593Smuzhiyun peer_cap = &cmd->peer_capab;
8953*4882a593Smuzhiyun peer_cap->peer_qos = __cpu_to_le32(peer_qos);
8954*4882a593Smuzhiyun peer_cap->buff_sta_support = __cpu_to_le32(cap->buff_sta_support);
8955*4882a593Smuzhiyun peer_cap->off_chan_support = __cpu_to_le32(cap->off_chan_support);
8956*4882a593Smuzhiyun peer_cap->peer_curr_operclass = __cpu_to_le32(cap->peer_curr_operclass);
8957*4882a593Smuzhiyun peer_cap->self_curr_operclass = __cpu_to_le32(cap->self_curr_operclass);
8958*4882a593Smuzhiyun peer_cap->peer_chan_len = __cpu_to_le32(cap->peer_chan_len);
8959*4882a593Smuzhiyun peer_cap->peer_operclass_len = __cpu_to_le32(cap->peer_operclass_len);
8960*4882a593Smuzhiyun
8961*4882a593Smuzhiyun for (i = 0; i < WMI_TDLS_MAX_SUPP_OPER_CLASSES; i++)
8962*4882a593Smuzhiyun peer_cap->peer_operclass[i] = cap->peer_operclass[i];
8963*4882a593Smuzhiyun
8964*4882a593Smuzhiyun peer_cap->is_peer_responder = __cpu_to_le32(cap->is_peer_responder);
8965*4882a593Smuzhiyun peer_cap->pref_offchan_num = __cpu_to_le32(cap->pref_offchan_num);
8966*4882a593Smuzhiyun peer_cap->pref_offchan_bw = __cpu_to_le32(cap->pref_offchan_bw);
8967*4882a593Smuzhiyun
8968*4882a593Smuzhiyun for (i = 0; i < cap->peer_chan_len; i++) {
8969*4882a593Smuzhiyun chan = (struct wmi_channel *)&peer_cap->peer_chan_list[i];
8970*4882a593Smuzhiyun ath10k_wmi_put_wmi_channel(ar, chan, &chan_arg[i]);
8971*4882a593Smuzhiyun }
8972*4882a593Smuzhiyun
8973*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI,
8974*4882a593Smuzhiyun "wmi tdls peer update vdev %i state %d n_chans %u\n",
8975*4882a593Smuzhiyun arg->vdev_id, arg->peer_state, cap->peer_chan_len);
8976*4882a593Smuzhiyun return skb;
8977*4882a593Smuzhiyun }
8978*4882a593Smuzhiyun
8979*4882a593Smuzhiyun static struct sk_buff *
ath10k_wmi_10_4_gen_radar_found(struct ath10k * ar,const struct ath10k_radar_found_info * arg)8980*4882a593Smuzhiyun ath10k_wmi_10_4_gen_radar_found(struct ath10k *ar,
8981*4882a593Smuzhiyun const struct ath10k_radar_found_info *arg)
8982*4882a593Smuzhiyun {
8983*4882a593Smuzhiyun struct wmi_radar_found_info *cmd;
8984*4882a593Smuzhiyun struct sk_buff *skb;
8985*4882a593Smuzhiyun
8986*4882a593Smuzhiyun skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
8987*4882a593Smuzhiyun if (!skb)
8988*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
8989*4882a593Smuzhiyun
8990*4882a593Smuzhiyun cmd = (struct wmi_radar_found_info *)skb->data;
8991*4882a593Smuzhiyun cmd->pri_min = __cpu_to_le32(arg->pri_min);
8992*4882a593Smuzhiyun cmd->pri_max = __cpu_to_le32(arg->pri_max);
8993*4882a593Smuzhiyun cmd->width_min = __cpu_to_le32(arg->width_min);
8994*4882a593Smuzhiyun cmd->width_max = __cpu_to_le32(arg->width_max);
8995*4882a593Smuzhiyun cmd->sidx_min = __cpu_to_le32(arg->sidx_min);
8996*4882a593Smuzhiyun cmd->sidx_max = __cpu_to_le32(arg->sidx_max);
8997*4882a593Smuzhiyun
8998*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI,
8999*4882a593Smuzhiyun "wmi radar found pri_min %d pri_max %d width_min %d width_max %d sidx_min %d sidx_max %d\n",
9000*4882a593Smuzhiyun arg->pri_min, arg->pri_max, arg->width_min,
9001*4882a593Smuzhiyun arg->width_max, arg->sidx_min, arg->sidx_max);
9002*4882a593Smuzhiyun return skb;
9003*4882a593Smuzhiyun }
9004*4882a593Smuzhiyun
9005*4882a593Smuzhiyun static struct sk_buff *
ath10k_wmi_10_4_gen_per_peer_per_tid_cfg(struct ath10k * ar,const struct wmi_per_peer_per_tid_cfg_arg * arg)9006*4882a593Smuzhiyun ath10k_wmi_10_4_gen_per_peer_per_tid_cfg(struct ath10k *ar,
9007*4882a593Smuzhiyun const struct wmi_per_peer_per_tid_cfg_arg *arg)
9008*4882a593Smuzhiyun {
9009*4882a593Smuzhiyun struct wmi_peer_per_tid_cfg_cmd *cmd;
9010*4882a593Smuzhiyun struct sk_buff *skb;
9011*4882a593Smuzhiyun
9012*4882a593Smuzhiyun skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
9013*4882a593Smuzhiyun if (!skb)
9014*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
9015*4882a593Smuzhiyun
9016*4882a593Smuzhiyun memset(skb->data, 0, sizeof(*cmd));
9017*4882a593Smuzhiyun
9018*4882a593Smuzhiyun cmd = (struct wmi_peer_per_tid_cfg_cmd *)skb->data;
9019*4882a593Smuzhiyun cmd->vdev_id = cpu_to_le32(arg->vdev_id);
9020*4882a593Smuzhiyun ether_addr_copy(cmd->peer_macaddr.addr, arg->peer_macaddr.addr);
9021*4882a593Smuzhiyun cmd->tid = cpu_to_le32(arg->tid);
9022*4882a593Smuzhiyun cmd->ack_policy = cpu_to_le32(arg->ack_policy);
9023*4882a593Smuzhiyun cmd->aggr_control = cpu_to_le32(arg->aggr_control);
9024*4882a593Smuzhiyun cmd->rate_control = cpu_to_le32(arg->rate_ctrl);
9025*4882a593Smuzhiyun cmd->retry_count = cpu_to_le32(arg->retry_count);
9026*4882a593Smuzhiyun cmd->rcode_flags = cpu_to_le32(arg->rcode_flags);
9027*4882a593Smuzhiyun cmd->ext_tid_cfg_bitmap = cpu_to_le32(arg->ext_tid_cfg_bitmap);
9028*4882a593Smuzhiyun cmd->rtscts_ctrl = cpu_to_le32(arg->rtscts_ctrl);
9029*4882a593Smuzhiyun
9030*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI,
9031*4882a593Smuzhiyun "wmi noack tid %d vdev id %d ack_policy %d aggr %u rate_ctrl %u rcflag %u retry_count %d rtscts %d ext_tid_cfg_bitmap %d mac_addr %pM\n",
9032*4882a593Smuzhiyun arg->tid, arg->vdev_id, arg->ack_policy, arg->aggr_control,
9033*4882a593Smuzhiyun arg->rate_ctrl, arg->rcode_flags, arg->retry_count,
9034*4882a593Smuzhiyun arg->rtscts_ctrl, arg->ext_tid_cfg_bitmap, arg->peer_macaddr.addr);
9035*4882a593Smuzhiyun return skb;
9036*4882a593Smuzhiyun }
9037*4882a593Smuzhiyun
9038*4882a593Smuzhiyun static struct sk_buff *
ath10k_wmi_op_gen_echo(struct ath10k * ar,u32 value)9039*4882a593Smuzhiyun ath10k_wmi_op_gen_echo(struct ath10k *ar, u32 value)
9040*4882a593Smuzhiyun {
9041*4882a593Smuzhiyun struct wmi_echo_cmd *cmd;
9042*4882a593Smuzhiyun struct sk_buff *skb;
9043*4882a593Smuzhiyun
9044*4882a593Smuzhiyun skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
9045*4882a593Smuzhiyun if (!skb)
9046*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
9047*4882a593Smuzhiyun
9048*4882a593Smuzhiyun cmd = (struct wmi_echo_cmd *)skb->data;
9049*4882a593Smuzhiyun cmd->value = cpu_to_le32(value);
9050*4882a593Smuzhiyun
9051*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI,
9052*4882a593Smuzhiyun "wmi echo value 0x%08x\n", value);
9053*4882a593Smuzhiyun return skb;
9054*4882a593Smuzhiyun }
9055*4882a593Smuzhiyun
9056*4882a593Smuzhiyun int
ath10k_wmi_barrier(struct ath10k * ar)9057*4882a593Smuzhiyun ath10k_wmi_barrier(struct ath10k *ar)
9058*4882a593Smuzhiyun {
9059*4882a593Smuzhiyun int ret;
9060*4882a593Smuzhiyun int time_left;
9061*4882a593Smuzhiyun
9062*4882a593Smuzhiyun spin_lock_bh(&ar->data_lock);
9063*4882a593Smuzhiyun reinit_completion(&ar->wmi.barrier);
9064*4882a593Smuzhiyun spin_unlock_bh(&ar->data_lock);
9065*4882a593Smuzhiyun
9066*4882a593Smuzhiyun ret = ath10k_wmi_echo(ar, ATH10K_WMI_BARRIER_ECHO_ID);
9067*4882a593Smuzhiyun if (ret) {
9068*4882a593Smuzhiyun ath10k_warn(ar, "failed to submit wmi echo: %d\n", ret);
9069*4882a593Smuzhiyun return ret;
9070*4882a593Smuzhiyun }
9071*4882a593Smuzhiyun
9072*4882a593Smuzhiyun time_left = wait_for_completion_timeout(&ar->wmi.barrier,
9073*4882a593Smuzhiyun ATH10K_WMI_BARRIER_TIMEOUT_HZ);
9074*4882a593Smuzhiyun if (!time_left)
9075*4882a593Smuzhiyun return -ETIMEDOUT;
9076*4882a593Smuzhiyun
9077*4882a593Smuzhiyun return 0;
9078*4882a593Smuzhiyun }
9079*4882a593Smuzhiyun
9080*4882a593Smuzhiyun static struct sk_buff *
ath10k_wmi_10_2_4_op_gen_bb_timing(struct ath10k * ar,const struct wmi_bb_timing_cfg_arg * arg)9081*4882a593Smuzhiyun ath10k_wmi_10_2_4_op_gen_bb_timing(struct ath10k *ar,
9082*4882a593Smuzhiyun const struct wmi_bb_timing_cfg_arg *arg)
9083*4882a593Smuzhiyun {
9084*4882a593Smuzhiyun struct wmi_pdev_bb_timing_cfg_cmd *cmd;
9085*4882a593Smuzhiyun struct sk_buff *skb;
9086*4882a593Smuzhiyun
9087*4882a593Smuzhiyun skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd));
9088*4882a593Smuzhiyun if (!skb)
9089*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
9090*4882a593Smuzhiyun
9091*4882a593Smuzhiyun cmd = (struct wmi_pdev_bb_timing_cfg_cmd *)skb->data;
9092*4882a593Smuzhiyun cmd->bb_tx_timing = __cpu_to_le32(arg->bb_tx_timing);
9093*4882a593Smuzhiyun cmd->bb_xpa_timing = __cpu_to_le32(arg->bb_xpa_timing);
9094*4882a593Smuzhiyun
9095*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI,
9096*4882a593Smuzhiyun "wmi pdev bb_tx_timing 0x%x bb_xpa_timing 0x%x\n",
9097*4882a593Smuzhiyun arg->bb_tx_timing, arg->bb_xpa_timing);
9098*4882a593Smuzhiyun return skb;
9099*4882a593Smuzhiyun }
9100*4882a593Smuzhiyun
9101*4882a593Smuzhiyun static const struct wmi_ops wmi_ops = {
9102*4882a593Smuzhiyun .rx = ath10k_wmi_op_rx,
9103*4882a593Smuzhiyun .map_svc = wmi_main_svc_map,
9104*4882a593Smuzhiyun
9105*4882a593Smuzhiyun .pull_scan = ath10k_wmi_op_pull_scan_ev,
9106*4882a593Smuzhiyun .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
9107*4882a593Smuzhiyun .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
9108*4882a593Smuzhiyun .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
9109*4882a593Smuzhiyun .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
9110*4882a593Smuzhiyun .pull_swba = ath10k_wmi_op_pull_swba_ev,
9111*4882a593Smuzhiyun .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
9112*4882a593Smuzhiyun .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
9113*4882a593Smuzhiyun .pull_svc_rdy = ath10k_wmi_main_op_pull_svc_rdy_ev,
9114*4882a593Smuzhiyun .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
9115*4882a593Smuzhiyun .pull_fw_stats = ath10k_wmi_main_op_pull_fw_stats,
9116*4882a593Smuzhiyun .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
9117*4882a593Smuzhiyun .pull_echo_ev = ath10k_wmi_op_pull_echo_ev,
9118*4882a593Smuzhiyun
9119*4882a593Smuzhiyun .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
9120*4882a593Smuzhiyun .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
9121*4882a593Smuzhiyun .gen_pdev_set_rd = ath10k_wmi_op_gen_pdev_set_rd,
9122*4882a593Smuzhiyun .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
9123*4882a593Smuzhiyun .gen_init = ath10k_wmi_op_gen_init,
9124*4882a593Smuzhiyun .gen_start_scan = ath10k_wmi_op_gen_start_scan,
9125*4882a593Smuzhiyun .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
9126*4882a593Smuzhiyun .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
9127*4882a593Smuzhiyun .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
9128*4882a593Smuzhiyun .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
9129*4882a593Smuzhiyun .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
9130*4882a593Smuzhiyun .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
9131*4882a593Smuzhiyun .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
9132*4882a593Smuzhiyun .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
9133*4882a593Smuzhiyun .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
9134*4882a593Smuzhiyun .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
9135*4882a593Smuzhiyun .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
9136*4882a593Smuzhiyun /* .gen_vdev_wmm_conf not implemented */
9137*4882a593Smuzhiyun .gen_peer_create = ath10k_wmi_op_gen_peer_create,
9138*4882a593Smuzhiyun .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
9139*4882a593Smuzhiyun .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
9140*4882a593Smuzhiyun .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
9141*4882a593Smuzhiyun .gen_peer_assoc = ath10k_wmi_op_gen_peer_assoc,
9142*4882a593Smuzhiyun .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
9143*4882a593Smuzhiyun .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
9144*4882a593Smuzhiyun .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
9145*4882a593Smuzhiyun .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
9146*4882a593Smuzhiyun .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
9147*4882a593Smuzhiyun .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
9148*4882a593Smuzhiyun .gen_request_stats = ath10k_wmi_op_gen_request_stats,
9149*4882a593Smuzhiyun .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
9150*4882a593Smuzhiyun .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
9151*4882a593Smuzhiyun .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
9152*4882a593Smuzhiyun .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
9153*4882a593Smuzhiyun .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
9154*4882a593Smuzhiyun .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
9155*4882a593Smuzhiyun /* .gen_pdev_get_temperature not implemented */
9156*4882a593Smuzhiyun .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
9157*4882a593Smuzhiyun .gen_addba_send = ath10k_wmi_op_gen_addba_send,
9158*4882a593Smuzhiyun .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
9159*4882a593Smuzhiyun .gen_delba_send = ath10k_wmi_op_gen_delba_send,
9160*4882a593Smuzhiyun .fw_stats_fill = ath10k_wmi_main_op_fw_stats_fill,
9161*4882a593Smuzhiyun .get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype,
9162*4882a593Smuzhiyun .gen_echo = ath10k_wmi_op_gen_echo,
9163*4882a593Smuzhiyun /* .gen_bcn_tmpl not implemented */
9164*4882a593Smuzhiyun /* .gen_prb_tmpl not implemented */
9165*4882a593Smuzhiyun /* .gen_p2p_go_bcn_ie not implemented */
9166*4882a593Smuzhiyun /* .gen_adaptive_qcs not implemented */
9167*4882a593Smuzhiyun /* .gen_pdev_enable_adaptive_cca not implemented */
9168*4882a593Smuzhiyun };
9169*4882a593Smuzhiyun
9170*4882a593Smuzhiyun static const struct wmi_ops wmi_10_1_ops = {
9171*4882a593Smuzhiyun .rx = ath10k_wmi_10_1_op_rx,
9172*4882a593Smuzhiyun .map_svc = wmi_10x_svc_map,
9173*4882a593Smuzhiyun .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev,
9174*4882a593Smuzhiyun .pull_fw_stats = ath10k_wmi_10x_op_pull_fw_stats,
9175*4882a593Smuzhiyun .gen_init = ath10k_wmi_10_1_op_gen_init,
9176*4882a593Smuzhiyun .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
9177*4882a593Smuzhiyun .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan,
9178*4882a593Smuzhiyun .gen_peer_assoc = ath10k_wmi_10_1_op_gen_peer_assoc,
9179*4882a593Smuzhiyun /* .gen_pdev_get_temperature not implemented */
9180*4882a593Smuzhiyun
9181*4882a593Smuzhiyun /* shared with main branch */
9182*4882a593Smuzhiyun .pull_scan = ath10k_wmi_op_pull_scan_ev,
9183*4882a593Smuzhiyun .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
9184*4882a593Smuzhiyun .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
9185*4882a593Smuzhiyun .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
9186*4882a593Smuzhiyun .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
9187*4882a593Smuzhiyun .pull_swba = ath10k_wmi_op_pull_swba_ev,
9188*4882a593Smuzhiyun .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
9189*4882a593Smuzhiyun .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
9190*4882a593Smuzhiyun .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
9191*4882a593Smuzhiyun .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
9192*4882a593Smuzhiyun .pull_echo_ev = ath10k_wmi_op_pull_echo_ev,
9193*4882a593Smuzhiyun
9194*4882a593Smuzhiyun .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
9195*4882a593Smuzhiyun .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
9196*4882a593Smuzhiyun .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
9197*4882a593Smuzhiyun .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
9198*4882a593Smuzhiyun .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
9199*4882a593Smuzhiyun .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
9200*4882a593Smuzhiyun .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
9201*4882a593Smuzhiyun .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
9202*4882a593Smuzhiyun .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
9203*4882a593Smuzhiyun .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
9204*4882a593Smuzhiyun .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
9205*4882a593Smuzhiyun .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
9206*4882a593Smuzhiyun .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
9207*4882a593Smuzhiyun .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
9208*4882a593Smuzhiyun /* .gen_vdev_wmm_conf not implemented */
9209*4882a593Smuzhiyun .gen_peer_create = ath10k_wmi_op_gen_peer_create,
9210*4882a593Smuzhiyun .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
9211*4882a593Smuzhiyun .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
9212*4882a593Smuzhiyun .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
9213*4882a593Smuzhiyun .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
9214*4882a593Smuzhiyun .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
9215*4882a593Smuzhiyun .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
9216*4882a593Smuzhiyun .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
9217*4882a593Smuzhiyun .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
9218*4882a593Smuzhiyun .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
9219*4882a593Smuzhiyun .gen_request_stats = ath10k_wmi_op_gen_request_stats,
9220*4882a593Smuzhiyun .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
9221*4882a593Smuzhiyun .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
9222*4882a593Smuzhiyun .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
9223*4882a593Smuzhiyun .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
9224*4882a593Smuzhiyun .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
9225*4882a593Smuzhiyun .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
9226*4882a593Smuzhiyun .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
9227*4882a593Smuzhiyun .gen_addba_send = ath10k_wmi_op_gen_addba_send,
9228*4882a593Smuzhiyun .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
9229*4882a593Smuzhiyun .gen_delba_send = ath10k_wmi_op_gen_delba_send,
9230*4882a593Smuzhiyun .fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill,
9231*4882a593Smuzhiyun .get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype,
9232*4882a593Smuzhiyun .gen_echo = ath10k_wmi_op_gen_echo,
9233*4882a593Smuzhiyun /* .gen_bcn_tmpl not implemented */
9234*4882a593Smuzhiyun /* .gen_prb_tmpl not implemented */
9235*4882a593Smuzhiyun /* .gen_p2p_go_bcn_ie not implemented */
9236*4882a593Smuzhiyun /* .gen_adaptive_qcs not implemented */
9237*4882a593Smuzhiyun /* .gen_pdev_enable_adaptive_cca not implemented */
9238*4882a593Smuzhiyun };
9239*4882a593Smuzhiyun
9240*4882a593Smuzhiyun static const struct wmi_ops wmi_10_2_ops = {
9241*4882a593Smuzhiyun .rx = ath10k_wmi_10_2_op_rx,
9242*4882a593Smuzhiyun .pull_fw_stats = ath10k_wmi_10_2_op_pull_fw_stats,
9243*4882a593Smuzhiyun .gen_init = ath10k_wmi_10_2_op_gen_init,
9244*4882a593Smuzhiyun .gen_peer_assoc = ath10k_wmi_10_2_op_gen_peer_assoc,
9245*4882a593Smuzhiyun /* .gen_pdev_get_temperature not implemented */
9246*4882a593Smuzhiyun
9247*4882a593Smuzhiyun /* shared with 10.1 */
9248*4882a593Smuzhiyun .map_svc = wmi_10x_svc_map,
9249*4882a593Smuzhiyun .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev,
9250*4882a593Smuzhiyun .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
9251*4882a593Smuzhiyun .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan,
9252*4882a593Smuzhiyun .gen_echo = ath10k_wmi_op_gen_echo,
9253*4882a593Smuzhiyun
9254*4882a593Smuzhiyun .pull_scan = ath10k_wmi_op_pull_scan_ev,
9255*4882a593Smuzhiyun .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
9256*4882a593Smuzhiyun .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
9257*4882a593Smuzhiyun .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
9258*4882a593Smuzhiyun .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
9259*4882a593Smuzhiyun .pull_swba = ath10k_wmi_op_pull_swba_ev,
9260*4882a593Smuzhiyun .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
9261*4882a593Smuzhiyun .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
9262*4882a593Smuzhiyun .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
9263*4882a593Smuzhiyun .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
9264*4882a593Smuzhiyun .pull_echo_ev = ath10k_wmi_op_pull_echo_ev,
9265*4882a593Smuzhiyun
9266*4882a593Smuzhiyun .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
9267*4882a593Smuzhiyun .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
9268*4882a593Smuzhiyun .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
9269*4882a593Smuzhiyun .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
9270*4882a593Smuzhiyun .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
9271*4882a593Smuzhiyun .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
9272*4882a593Smuzhiyun .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
9273*4882a593Smuzhiyun .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
9274*4882a593Smuzhiyun .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
9275*4882a593Smuzhiyun .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
9276*4882a593Smuzhiyun .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
9277*4882a593Smuzhiyun .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
9278*4882a593Smuzhiyun .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
9279*4882a593Smuzhiyun .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
9280*4882a593Smuzhiyun /* .gen_vdev_wmm_conf not implemented */
9281*4882a593Smuzhiyun .gen_peer_create = ath10k_wmi_op_gen_peer_create,
9282*4882a593Smuzhiyun .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
9283*4882a593Smuzhiyun .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
9284*4882a593Smuzhiyun .gen_pdev_set_base_macaddr = ath10k_wmi_op_gen_pdev_set_base_macaddr,
9285*4882a593Smuzhiyun .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
9286*4882a593Smuzhiyun .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
9287*4882a593Smuzhiyun .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
9288*4882a593Smuzhiyun .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
9289*4882a593Smuzhiyun .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
9290*4882a593Smuzhiyun .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
9291*4882a593Smuzhiyun .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
9292*4882a593Smuzhiyun .gen_request_stats = ath10k_wmi_op_gen_request_stats,
9293*4882a593Smuzhiyun .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
9294*4882a593Smuzhiyun .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
9295*4882a593Smuzhiyun .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
9296*4882a593Smuzhiyun .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
9297*4882a593Smuzhiyun .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
9298*4882a593Smuzhiyun .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
9299*4882a593Smuzhiyun .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
9300*4882a593Smuzhiyun .gen_addba_send = ath10k_wmi_op_gen_addba_send,
9301*4882a593Smuzhiyun .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
9302*4882a593Smuzhiyun .gen_delba_send = ath10k_wmi_op_gen_delba_send,
9303*4882a593Smuzhiyun .fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill,
9304*4882a593Smuzhiyun .get_vdev_subtype = ath10k_wmi_op_get_vdev_subtype,
9305*4882a593Smuzhiyun /* .gen_pdev_enable_adaptive_cca not implemented */
9306*4882a593Smuzhiyun };
9307*4882a593Smuzhiyun
9308*4882a593Smuzhiyun static const struct wmi_ops wmi_10_2_4_ops = {
9309*4882a593Smuzhiyun .rx = ath10k_wmi_10_2_op_rx,
9310*4882a593Smuzhiyun .pull_fw_stats = ath10k_wmi_10_2_4_op_pull_fw_stats,
9311*4882a593Smuzhiyun .gen_init = ath10k_wmi_10_2_op_gen_init,
9312*4882a593Smuzhiyun .gen_peer_assoc = ath10k_wmi_10_2_op_gen_peer_assoc,
9313*4882a593Smuzhiyun .gen_pdev_get_temperature = ath10k_wmi_10_2_op_gen_pdev_get_temperature,
9314*4882a593Smuzhiyun .gen_pdev_bss_chan_info_req = ath10k_wmi_10_2_op_gen_pdev_bss_chan_info,
9315*4882a593Smuzhiyun
9316*4882a593Smuzhiyun /* shared with 10.1 */
9317*4882a593Smuzhiyun .map_svc = wmi_10x_svc_map,
9318*4882a593Smuzhiyun .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev,
9319*4882a593Smuzhiyun .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
9320*4882a593Smuzhiyun .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan,
9321*4882a593Smuzhiyun .gen_echo = ath10k_wmi_op_gen_echo,
9322*4882a593Smuzhiyun
9323*4882a593Smuzhiyun .pull_scan = ath10k_wmi_op_pull_scan_ev,
9324*4882a593Smuzhiyun .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev,
9325*4882a593Smuzhiyun .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev,
9326*4882a593Smuzhiyun .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
9327*4882a593Smuzhiyun .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
9328*4882a593Smuzhiyun .pull_swba = ath10k_wmi_10_2_4_op_pull_swba_ev,
9329*4882a593Smuzhiyun .pull_phyerr_hdr = ath10k_wmi_op_pull_phyerr_ev_hdr,
9330*4882a593Smuzhiyun .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev,
9331*4882a593Smuzhiyun .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
9332*4882a593Smuzhiyun .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
9333*4882a593Smuzhiyun .pull_echo_ev = ath10k_wmi_op_pull_echo_ev,
9334*4882a593Smuzhiyun
9335*4882a593Smuzhiyun .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
9336*4882a593Smuzhiyun .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
9337*4882a593Smuzhiyun .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
9338*4882a593Smuzhiyun .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
9339*4882a593Smuzhiyun .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
9340*4882a593Smuzhiyun .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
9341*4882a593Smuzhiyun .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
9342*4882a593Smuzhiyun .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
9343*4882a593Smuzhiyun .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
9344*4882a593Smuzhiyun .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
9345*4882a593Smuzhiyun .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
9346*4882a593Smuzhiyun .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
9347*4882a593Smuzhiyun .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
9348*4882a593Smuzhiyun .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
9349*4882a593Smuzhiyun .gen_peer_create = ath10k_wmi_op_gen_peer_create,
9350*4882a593Smuzhiyun .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
9351*4882a593Smuzhiyun .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
9352*4882a593Smuzhiyun .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
9353*4882a593Smuzhiyun .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
9354*4882a593Smuzhiyun .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
9355*4882a593Smuzhiyun .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
9356*4882a593Smuzhiyun .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
9357*4882a593Smuzhiyun .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
9358*4882a593Smuzhiyun .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
9359*4882a593Smuzhiyun .gen_request_stats = ath10k_wmi_op_gen_request_stats,
9360*4882a593Smuzhiyun .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
9361*4882a593Smuzhiyun .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
9362*4882a593Smuzhiyun .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg,
9363*4882a593Smuzhiyun .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
9364*4882a593Smuzhiyun .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
9365*4882a593Smuzhiyun .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
9366*4882a593Smuzhiyun .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
9367*4882a593Smuzhiyun .gen_addba_send = ath10k_wmi_op_gen_addba_send,
9368*4882a593Smuzhiyun .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
9369*4882a593Smuzhiyun .gen_delba_send = ath10k_wmi_op_gen_delba_send,
9370*4882a593Smuzhiyun .gen_pdev_get_tpc_config = ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config,
9371*4882a593Smuzhiyun .fw_stats_fill = ath10k_wmi_10x_op_fw_stats_fill,
9372*4882a593Smuzhiyun .gen_pdev_enable_adaptive_cca =
9373*4882a593Smuzhiyun ath10k_wmi_op_gen_pdev_enable_adaptive_cca,
9374*4882a593Smuzhiyun .get_vdev_subtype = ath10k_wmi_10_2_4_op_get_vdev_subtype,
9375*4882a593Smuzhiyun .gen_bb_timing = ath10k_wmi_10_2_4_op_gen_bb_timing,
9376*4882a593Smuzhiyun /* .gen_bcn_tmpl not implemented */
9377*4882a593Smuzhiyun /* .gen_prb_tmpl not implemented */
9378*4882a593Smuzhiyun /* .gen_p2p_go_bcn_ie not implemented */
9379*4882a593Smuzhiyun /* .gen_adaptive_qcs not implemented */
9380*4882a593Smuzhiyun };
9381*4882a593Smuzhiyun
9382*4882a593Smuzhiyun static const struct wmi_ops wmi_10_4_ops = {
9383*4882a593Smuzhiyun .rx = ath10k_wmi_10_4_op_rx,
9384*4882a593Smuzhiyun .map_svc = wmi_10_4_svc_map,
9385*4882a593Smuzhiyun
9386*4882a593Smuzhiyun .pull_fw_stats = ath10k_wmi_10_4_op_pull_fw_stats,
9387*4882a593Smuzhiyun .pull_scan = ath10k_wmi_op_pull_scan_ev,
9388*4882a593Smuzhiyun .pull_mgmt_rx = ath10k_wmi_10_4_op_pull_mgmt_rx_ev,
9389*4882a593Smuzhiyun .pull_ch_info = ath10k_wmi_10_4_op_pull_ch_info_ev,
9390*4882a593Smuzhiyun .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev,
9391*4882a593Smuzhiyun .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev,
9392*4882a593Smuzhiyun .pull_swba = ath10k_wmi_10_4_op_pull_swba_ev,
9393*4882a593Smuzhiyun .pull_phyerr_hdr = ath10k_wmi_10_4_op_pull_phyerr_ev_hdr,
9394*4882a593Smuzhiyun .pull_phyerr = ath10k_wmi_10_4_op_pull_phyerr_ev,
9395*4882a593Smuzhiyun .pull_svc_rdy = ath10k_wmi_main_op_pull_svc_rdy_ev,
9396*4882a593Smuzhiyun .pull_rdy = ath10k_wmi_op_pull_rdy_ev,
9397*4882a593Smuzhiyun .pull_roam_ev = ath10k_wmi_op_pull_roam_ev,
9398*4882a593Smuzhiyun .pull_dfs_status_ev = ath10k_wmi_10_4_op_pull_dfs_status_ev,
9399*4882a593Smuzhiyun .get_txbf_conf_scheme = ath10k_wmi_10_4_txbf_conf_scheme,
9400*4882a593Smuzhiyun
9401*4882a593Smuzhiyun .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend,
9402*4882a593Smuzhiyun .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume,
9403*4882a593Smuzhiyun .gen_pdev_set_base_macaddr = ath10k_wmi_op_gen_pdev_set_base_macaddr,
9404*4882a593Smuzhiyun .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd,
9405*4882a593Smuzhiyun .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param,
9406*4882a593Smuzhiyun .gen_init = ath10k_wmi_10_4_op_gen_init,
9407*4882a593Smuzhiyun .gen_start_scan = ath10k_wmi_op_gen_start_scan,
9408*4882a593Smuzhiyun .gen_stop_scan = ath10k_wmi_op_gen_stop_scan,
9409*4882a593Smuzhiyun .gen_vdev_create = ath10k_wmi_op_gen_vdev_create,
9410*4882a593Smuzhiyun .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete,
9411*4882a593Smuzhiyun .gen_vdev_start = ath10k_wmi_op_gen_vdev_start,
9412*4882a593Smuzhiyun .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop,
9413*4882a593Smuzhiyun .gen_vdev_up = ath10k_wmi_op_gen_vdev_up,
9414*4882a593Smuzhiyun .gen_vdev_down = ath10k_wmi_op_gen_vdev_down,
9415*4882a593Smuzhiyun .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param,
9416*4882a593Smuzhiyun .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key,
9417*4882a593Smuzhiyun .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf,
9418*4882a593Smuzhiyun .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable,
9419*4882a593Smuzhiyun .gen_peer_create = ath10k_wmi_op_gen_peer_create,
9420*4882a593Smuzhiyun .gen_peer_delete = ath10k_wmi_op_gen_peer_delete,
9421*4882a593Smuzhiyun .gen_peer_flush = ath10k_wmi_op_gen_peer_flush,
9422*4882a593Smuzhiyun .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param,
9423*4882a593Smuzhiyun .gen_peer_assoc = ath10k_wmi_10_4_op_gen_peer_assoc,
9424*4882a593Smuzhiyun .gen_set_psmode = ath10k_wmi_op_gen_set_psmode,
9425*4882a593Smuzhiyun .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps,
9426*4882a593Smuzhiyun .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps,
9427*4882a593Smuzhiyun .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list,
9428*4882a593Smuzhiyun .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma,
9429*4882a593Smuzhiyun .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm,
9430*4882a593Smuzhiyun .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang,
9431*4882a593Smuzhiyun .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx,
9432*4882a593Smuzhiyun .gen_dbglog_cfg = ath10k_wmi_10_4_op_gen_dbglog_cfg,
9433*4882a593Smuzhiyun .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable,
9434*4882a593Smuzhiyun .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable,
9435*4882a593Smuzhiyun .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode,
9436*4882a593Smuzhiyun .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp,
9437*4882a593Smuzhiyun .gen_addba_send = ath10k_wmi_op_gen_addba_send,
9438*4882a593Smuzhiyun .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp,
9439*4882a593Smuzhiyun .gen_delba_send = ath10k_wmi_op_gen_delba_send,
9440*4882a593Smuzhiyun .fw_stats_fill = ath10k_wmi_10_4_op_fw_stats_fill,
9441*4882a593Smuzhiyun .ext_resource_config = ath10k_wmi_10_4_ext_resource_config,
9442*4882a593Smuzhiyun .gen_update_fw_tdls_state = ath10k_wmi_10_4_gen_update_fw_tdls_state,
9443*4882a593Smuzhiyun .gen_tdls_peer_update = ath10k_wmi_10_4_gen_tdls_peer_update,
9444*4882a593Smuzhiyun .gen_pdev_get_tpc_table_cmdid =
9445*4882a593Smuzhiyun ath10k_wmi_10_4_op_gen_pdev_get_tpc_table_cmdid,
9446*4882a593Smuzhiyun .gen_radar_found = ath10k_wmi_10_4_gen_radar_found,
9447*4882a593Smuzhiyun .gen_per_peer_per_tid_cfg = ath10k_wmi_10_4_gen_per_peer_per_tid_cfg,
9448*4882a593Smuzhiyun
9449*4882a593Smuzhiyun /* shared with 10.2 */
9450*4882a593Smuzhiyun .pull_echo_ev = ath10k_wmi_op_pull_echo_ev,
9451*4882a593Smuzhiyun .gen_request_stats = ath10k_wmi_op_gen_request_stats,
9452*4882a593Smuzhiyun .gen_pdev_get_temperature = ath10k_wmi_10_2_op_gen_pdev_get_temperature,
9453*4882a593Smuzhiyun .get_vdev_subtype = ath10k_wmi_10_4_op_get_vdev_subtype,
9454*4882a593Smuzhiyun .gen_pdev_bss_chan_info_req = ath10k_wmi_10_2_op_gen_pdev_bss_chan_info,
9455*4882a593Smuzhiyun .gen_echo = ath10k_wmi_op_gen_echo,
9456*4882a593Smuzhiyun .gen_pdev_get_tpc_config = ath10k_wmi_10_2_4_op_gen_pdev_get_tpc_config,
9457*4882a593Smuzhiyun };
9458*4882a593Smuzhiyun
ath10k_wmi_attach(struct ath10k * ar)9459*4882a593Smuzhiyun int ath10k_wmi_attach(struct ath10k *ar)
9460*4882a593Smuzhiyun {
9461*4882a593Smuzhiyun switch (ar->running_fw->fw_file.wmi_op_version) {
9462*4882a593Smuzhiyun case ATH10K_FW_WMI_OP_VERSION_10_4:
9463*4882a593Smuzhiyun ar->wmi.ops = &wmi_10_4_ops;
9464*4882a593Smuzhiyun ar->wmi.cmd = &wmi_10_4_cmd_map;
9465*4882a593Smuzhiyun ar->wmi.vdev_param = &wmi_10_4_vdev_param_map;
9466*4882a593Smuzhiyun ar->wmi.pdev_param = &wmi_10_4_pdev_param_map;
9467*4882a593Smuzhiyun ar->wmi.peer_param = &wmi_peer_param_map;
9468*4882a593Smuzhiyun ar->wmi.peer_flags = &wmi_10_2_peer_flags_map;
9469*4882a593Smuzhiyun ar->wmi_key_cipher = wmi_key_cipher_suites;
9470*4882a593Smuzhiyun break;
9471*4882a593Smuzhiyun case ATH10K_FW_WMI_OP_VERSION_10_2_4:
9472*4882a593Smuzhiyun ar->wmi.cmd = &wmi_10_2_4_cmd_map;
9473*4882a593Smuzhiyun ar->wmi.ops = &wmi_10_2_4_ops;
9474*4882a593Smuzhiyun ar->wmi.vdev_param = &wmi_10_2_4_vdev_param_map;
9475*4882a593Smuzhiyun ar->wmi.pdev_param = &wmi_10_2_4_pdev_param_map;
9476*4882a593Smuzhiyun ar->wmi.peer_param = &wmi_peer_param_map;
9477*4882a593Smuzhiyun ar->wmi.peer_flags = &wmi_10_2_peer_flags_map;
9478*4882a593Smuzhiyun ar->wmi_key_cipher = wmi_key_cipher_suites;
9479*4882a593Smuzhiyun break;
9480*4882a593Smuzhiyun case ATH10K_FW_WMI_OP_VERSION_10_2:
9481*4882a593Smuzhiyun ar->wmi.cmd = &wmi_10_2_cmd_map;
9482*4882a593Smuzhiyun ar->wmi.ops = &wmi_10_2_ops;
9483*4882a593Smuzhiyun ar->wmi.vdev_param = &wmi_10x_vdev_param_map;
9484*4882a593Smuzhiyun ar->wmi.pdev_param = &wmi_10x_pdev_param_map;
9485*4882a593Smuzhiyun ar->wmi.peer_param = &wmi_peer_param_map;
9486*4882a593Smuzhiyun ar->wmi.peer_flags = &wmi_10_2_peer_flags_map;
9487*4882a593Smuzhiyun ar->wmi_key_cipher = wmi_key_cipher_suites;
9488*4882a593Smuzhiyun break;
9489*4882a593Smuzhiyun case ATH10K_FW_WMI_OP_VERSION_10_1:
9490*4882a593Smuzhiyun ar->wmi.cmd = &wmi_10x_cmd_map;
9491*4882a593Smuzhiyun ar->wmi.ops = &wmi_10_1_ops;
9492*4882a593Smuzhiyun ar->wmi.vdev_param = &wmi_10x_vdev_param_map;
9493*4882a593Smuzhiyun ar->wmi.pdev_param = &wmi_10x_pdev_param_map;
9494*4882a593Smuzhiyun ar->wmi.peer_param = &wmi_peer_param_map;
9495*4882a593Smuzhiyun ar->wmi.peer_flags = &wmi_10x_peer_flags_map;
9496*4882a593Smuzhiyun ar->wmi_key_cipher = wmi_key_cipher_suites;
9497*4882a593Smuzhiyun break;
9498*4882a593Smuzhiyun case ATH10K_FW_WMI_OP_VERSION_MAIN:
9499*4882a593Smuzhiyun ar->wmi.cmd = &wmi_cmd_map;
9500*4882a593Smuzhiyun ar->wmi.ops = &wmi_ops;
9501*4882a593Smuzhiyun ar->wmi.vdev_param = &wmi_vdev_param_map;
9502*4882a593Smuzhiyun ar->wmi.pdev_param = &wmi_pdev_param_map;
9503*4882a593Smuzhiyun ar->wmi.peer_param = &wmi_peer_param_map;
9504*4882a593Smuzhiyun ar->wmi.peer_flags = &wmi_peer_flags_map;
9505*4882a593Smuzhiyun ar->wmi_key_cipher = wmi_key_cipher_suites;
9506*4882a593Smuzhiyun break;
9507*4882a593Smuzhiyun case ATH10K_FW_WMI_OP_VERSION_TLV:
9508*4882a593Smuzhiyun ath10k_wmi_tlv_attach(ar);
9509*4882a593Smuzhiyun ar->wmi_key_cipher = wmi_tlv_key_cipher_suites;
9510*4882a593Smuzhiyun break;
9511*4882a593Smuzhiyun case ATH10K_FW_WMI_OP_VERSION_UNSET:
9512*4882a593Smuzhiyun case ATH10K_FW_WMI_OP_VERSION_MAX:
9513*4882a593Smuzhiyun ath10k_err(ar, "unsupported WMI op version: %d\n",
9514*4882a593Smuzhiyun ar->running_fw->fw_file.wmi_op_version);
9515*4882a593Smuzhiyun return -EINVAL;
9516*4882a593Smuzhiyun }
9517*4882a593Smuzhiyun
9518*4882a593Smuzhiyun init_completion(&ar->wmi.service_ready);
9519*4882a593Smuzhiyun init_completion(&ar->wmi.unified_ready);
9520*4882a593Smuzhiyun init_completion(&ar->wmi.barrier);
9521*4882a593Smuzhiyun init_completion(&ar->wmi.radar_confirm);
9522*4882a593Smuzhiyun
9523*4882a593Smuzhiyun INIT_WORK(&ar->svc_rdy_work, ath10k_wmi_event_service_ready_work);
9524*4882a593Smuzhiyun INIT_WORK(&ar->radar_confirmation_work,
9525*4882a593Smuzhiyun ath10k_radar_confirmation_work);
9526*4882a593Smuzhiyun
9527*4882a593Smuzhiyun if (test_bit(ATH10K_FW_FEATURE_MGMT_TX_BY_REF,
9528*4882a593Smuzhiyun ar->running_fw->fw_file.fw_features)) {
9529*4882a593Smuzhiyun idr_init(&ar->wmi.mgmt_pending_tx);
9530*4882a593Smuzhiyun }
9531*4882a593Smuzhiyun
9532*4882a593Smuzhiyun return 0;
9533*4882a593Smuzhiyun }
9534*4882a593Smuzhiyun
ath10k_wmi_free_host_mem(struct ath10k * ar)9535*4882a593Smuzhiyun void ath10k_wmi_free_host_mem(struct ath10k *ar)
9536*4882a593Smuzhiyun {
9537*4882a593Smuzhiyun int i;
9538*4882a593Smuzhiyun
9539*4882a593Smuzhiyun /* free the host memory chunks requested by firmware */
9540*4882a593Smuzhiyun for (i = 0; i < ar->wmi.num_mem_chunks; i++) {
9541*4882a593Smuzhiyun dma_free_coherent(ar->dev,
9542*4882a593Smuzhiyun ar->wmi.mem_chunks[i].len,
9543*4882a593Smuzhiyun ar->wmi.mem_chunks[i].vaddr,
9544*4882a593Smuzhiyun ar->wmi.mem_chunks[i].paddr);
9545*4882a593Smuzhiyun }
9546*4882a593Smuzhiyun
9547*4882a593Smuzhiyun ar->wmi.num_mem_chunks = 0;
9548*4882a593Smuzhiyun }
9549*4882a593Smuzhiyun
ath10k_wmi_mgmt_tx_clean_up_pending(int msdu_id,void * ptr,void * ctx)9550*4882a593Smuzhiyun static int ath10k_wmi_mgmt_tx_clean_up_pending(int msdu_id, void *ptr,
9551*4882a593Smuzhiyun void *ctx)
9552*4882a593Smuzhiyun {
9553*4882a593Smuzhiyun struct ath10k_mgmt_tx_pkt_addr *pkt_addr = ptr;
9554*4882a593Smuzhiyun struct ath10k *ar = ctx;
9555*4882a593Smuzhiyun struct sk_buff *msdu;
9556*4882a593Smuzhiyun
9557*4882a593Smuzhiyun ath10k_dbg(ar, ATH10K_DBG_WMI,
9558*4882a593Smuzhiyun "force cleanup mgmt msdu_id %hu\n", msdu_id);
9559*4882a593Smuzhiyun
9560*4882a593Smuzhiyun msdu = pkt_addr->vaddr;
9561*4882a593Smuzhiyun dma_unmap_single(ar->dev, pkt_addr->paddr,
9562*4882a593Smuzhiyun msdu->len, DMA_TO_DEVICE);
9563*4882a593Smuzhiyun ieee80211_free_txskb(ar->hw, msdu);
9564*4882a593Smuzhiyun
9565*4882a593Smuzhiyun return 0;
9566*4882a593Smuzhiyun }
9567*4882a593Smuzhiyun
ath10k_wmi_detach(struct ath10k * ar)9568*4882a593Smuzhiyun void ath10k_wmi_detach(struct ath10k *ar)
9569*4882a593Smuzhiyun {
9570*4882a593Smuzhiyun if (test_bit(ATH10K_FW_FEATURE_MGMT_TX_BY_REF,
9571*4882a593Smuzhiyun ar->running_fw->fw_file.fw_features)) {
9572*4882a593Smuzhiyun spin_lock_bh(&ar->data_lock);
9573*4882a593Smuzhiyun idr_for_each(&ar->wmi.mgmt_pending_tx,
9574*4882a593Smuzhiyun ath10k_wmi_mgmt_tx_clean_up_pending, ar);
9575*4882a593Smuzhiyun idr_destroy(&ar->wmi.mgmt_pending_tx);
9576*4882a593Smuzhiyun spin_unlock_bh(&ar->data_lock);
9577*4882a593Smuzhiyun }
9578*4882a593Smuzhiyun
9579*4882a593Smuzhiyun cancel_work_sync(&ar->svc_rdy_work);
9580*4882a593Smuzhiyun dev_kfree_skb(ar->svc_rdy_skb);
9581*4882a593Smuzhiyun }
9582