xref: /OK3568_Linux_fs/kernel/drivers/net/wireless/ath/ath10k/usb.h (revision 4882a59341e53eb6f0b4789bf948001014eff981) 
1*4882a593Smuzhiyun /* SPDX-License-Identifier: ISC */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Copyright (c) 2004-2011 Atheros Communications Inc.
4*4882a593Smuzhiyun  * Copyright (c) 2011-2012 Qualcomm Atheros, Inc.
5*4882a593Smuzhiyun  * Copyright (c) 2016-2017 Erik Stromdahl <erik.stromdahl@gmail.com>
6*4882a593Smuzhiyun  */
7*4882a593Smuzhiyun 
8*4882a593Smuzhiyun #ifndef _USB_H_
9*4882a593Smuzhiyun #define _USB_H_
10*4882a593Smuzhiyun 
11*4882a593Smuzhiyun /* constants */
12*4882a593Smuzhiyun #define TX_URB_COUNT               32
13*4882a593Smuzhiyun #define RX_URB_COUNT               32
14*4882a593Smuzhiyun #define ATH10K_USB_RX_BUFFER_SIZE  4096
15*4882a593Smuzhiyun 
16*4882a593Smuzhiyun #define ATH10K_USB_PIPE_INVALID ATH10K_USB_PIPE_MAX
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun /* USB endpoint definitions */
19*4882a593Smuzhiyun #define ATH10K_USB_EP_ADDR_APP_CTRL_IN          0x81
20*4882a593Smuzhiyun #define ATH10K_USB_EP_ADDR_APP_DATA_IN          0x82
21*4882a593Smuzhiyun #define ATH10K_USB_EP_ADDR_APP_DATA2_IN         0x83
22*4882a593Smuzhiyun #define ATH10K_USB_EP_ADDR_APP_INT_IN           0x84
23*4882a593Smuzhiyun 
24*4882a593Smuzhiyun #define ATH10K_USB_EP_ADDR_APP_CTRL_OUT         0x01
25*4882a593Smuzhiyun #define ATH10K_USB_EP_ADDR_APP_DATA_LP_OUT      0x02
26*4882a593Smuzhiyun #define ATH10K_USB_EP_ADDR_APP_DATA_MP_OUT      0x03
27*4882a593Smuzhiyun #define ATH10K_USB_EP_ADDR_APP_DATA_HP_OUT      0x04
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun /* diagnostic command defnitions */
30*4882a593Smuzhiyun #define ATH10K_USB_CONTROL_REQ_SEND_BMI_CMD        1
31*4882a593Smuzhiyun #define ATH10K_USB_CONTROL_REQ_RECV_BMI_RESP       2
32*4882a593Smuzhiyun #define ATH10K_USB_CONTROL_REQ_DIAG_CMD            3
33*4882a593Smuzhiyun #define ATH10K_USB_CONTROL_REQ_DIAG_RESP           4
34*4882a593Smuzhiyun 
35*4882a593Smuzhiyun #define ATH10K_USB_CTRL_DIAG_CC_READ               0
36*4882a593Smuzhiyun #define ATH10K_USB_CTRL_DIAG_CC_WRITE              1
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun #define ATH10K_USB_IS_BULK_EP(attr) (((attr) & 3) == 0x02)
39*4882a593Smuzhiyun #define ATH10K_USB_IS_INT_EP(attr)  (((attr) & 3) == 0x03)
40*4882a593Smuzhiyun #define ATH10K_USB_IS_ISOC_EP(attr) (((attr) & 3) == 0x01)
41*4882a593Smuzhiyun #define ATH10K_USB_IS_DIR_IN(addr)  ((addr) & 0x80)
42*4882a593Smuzhiyun 
43*4882a593Smuzhiyun struct ath10k_usb_ctrl_diag_cmd_write {
44*4882a593Smuzhiyun 	__le32 cmd;
45*4882a593Smuzhiyun 	__le32 address;
46*4882a593Smuzhiyun 	__le32 value;
47*4882a593Smuzhiyun 	__le32 padding;
48*4882a593Smuzhiyun } __packed;
49*4882a593Smuzhiyun 
50*4882a593Smuzhiyun struct ath10k_usb_ctrl_diag_cmd_read {
51*4882a593Smuzhiyun 	__le32 cmd;
52*4882a593Smuzhiyun 	__le32 address;
53*4882a593Smuzhiyun } __packed;
54*4882a593Smuzhiyun 
55*4882a593Smuzhiyun struct ath10k_usb_ctrl_diag_resp_read {
56*4882a593Smuzhiyun 	u8 value[4];
57*4882a593Smuzhiyun } __packed;
58*4882a593Smuzhiyun 
59*4882a593Smuzhiyun /* tx/rx pipes for usb */
60*4882a593Smuzhiyun enum ath10k_usb_pipe_id {
61*4882a593Smuzhiyun 	ATH10K_USB_PIPE_TX_CTRL = 0,
62*4882a593Smuzhiyun 	ATH10K_USB_PIPE_TX_DATA_LP,
63*4882a593Smuzhiyun 	ATH10K_USB_PIPE_TX_DATA_MP,
64*4882a593Smuzhiyun 	ATH10K_USB_PIPE_TX_DATA_HP,
65*4882a593Smuzhiyun 	ATH10K_USB_PIPE_RX_CTRL,
66*4882a593Smuzhiyun 	ATH10K_USB_PIPE_RX_DATA,
67*4882a593Smuzhiyun 	ATH10K_USB_PIPE_RX_DATA2,
68*4882a593Smuzhiyun 	ATH10K_USB_PIPE_RX_INT,
69*4882a593Smuzhiyun 	ATH10K_USB_PIPE_MAX
70*4882a593Smuzhiyun };
71*4882a593Smuzhiyun 
72*4882a593Smuzhiyun struct ath10k_usb_pipe {
73*4882a593Smuzhiyun 	struct list_head urb_list_head;
74*4882a593Smuzhiyun 	struct usb_anchor urb_submitted;
75*4882a593Smuzhiyun 	u32 urb_alloc;
76*4882a593Smuzhiyun 	u32 urb_cnt;
77*4882a593Smuzhiyun 	u32 urb_cnt_thresh;
78*4882a593Smuzhiyun 	unsigned int usb_pipe_handle;
79*4882a593Smuzhiyun 	u32 flags;
80*4882a593Smuzhiyun 	u8 ep_address;
81*4882a593Smuzhiyun 	u8 logical_pipe_num;
82*4882a593Smuzhiyun 	struct ath10k_usb *ar_usb;
83*4882a593Smuzhiyun 	u16 max_packet_size;
84*4882a593Smuzhiyun 	struct work_struct io_complete_work;
85*4882a593Smuzhiyun 	struct sk_buff_head io_comp_queue;
86*4882a593Smuzhiyun 	struct usb_endpoint_descriptor *ep_desc;
87*4882a593Smuzhiyun };
88*4882a593Smuzhiyun 
89*4882a593Smuzhiyun #define ATH10K_USB_PIPE_FLAG_TX BIT(0)
90*4882a593Smuzhiyun 
91*4882a593Smuzhiyun /* usb device object */
92*4882a593Smuzhiyun struct ath10k_usb {
93*4882a593Smuzhiyun 	/* protects pipe->urb_list_head and  pipe->urb_cnt */
94*4882a593Smuzhiyun 	spinlock_t cs_lock;
95*4882a593Smuzhiyun 
96*4882a593Smuzhiyun 	struct usb_device *udev;
97*4882a593Smuzhiyun 	struct usb_interface *interface;
98*4882a593Smuzhiyun 	struct ath10k_usb_pipe pipes[ATH10K_USB_PIPE_MAX];
99*4882a593Smuzhiyun 	u8 *diag_cmd_buffer;
100*4882a593Smuzhiyun 	u8 *diag_resp_buffer;
101*4882a593Smuzhiyun 	struct ath10k *ar;
102*4882a593Smuzhiyun };
103*4882a593Smuzhiyun 
104*4882a593Smuzhiyun /* usb urb object */
105*4882a593Smuzhiyun struct ath10k_urb_context {
106*4882a593Smuzhiyun 	struct list_head link;
107*4882a593Smuzhiyun 	struct ath10k_usb_pipe *pipe;
108*4882a593Smuzhiyun 	struct sk_buff *skb;
109*4882a593Smuzhiyun 	struct ath10k *ar;
110*4882a593Smuzhiyun };
111*4882a593Smuzhiyun 
ath10k_usb_priv(struct ath10k * ar)112*4882a593Smuzhiyun static inline struct ath10k_usb *ath10k_usb_priv(struct ath10k *ar)
113*4882a593Smuzhiyun {
114*4882a593Smuzhiyun 	return (struct ath10k_usb *)ar->drv_priv;
115*4882a593Smuzhiyun }
116*4882a593Smuzhiyun 
117*4882a593Smuzhiyun #endif
118