xref: /OK3568_Linux_fs/kernel/drivers/net/wireless/ath/ath10k/hif.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: ISC */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Copyright (c) 2005-2011 Atheros Communications Inc.
4*4882a593Smuzhiyun  * Copyright (c) 2011-2015,2017 Qualcomm Atheros, Inc.
5*4882a593Smuzhiyun  */
6*4882a593Smuzhiyun 
7*4882a593Smuzhiyun #ifndef _HIF_H_
8*4882a593Smuzhiyun #define _HIF_H_
9*4882a593Smuzhiyun 
10*4882a593Smuzhiyun #include <linux/kernel.h>
11*4882a593Smuzhiyun #include "core.h"
12*4882a593Smuzhiyun #include "bmi.h"
13*4882a593Smuzhiyun #include "debug.h"
14*4882a593Smuzhiyun 
15*4882a593Smuzhiyun /* Types of fw logging mode */
16*4882a593Smuzhiyun enum ath_dbg_mode {
17*4882a593Smuzhiyun 	ATH10K_ENABLE_FW_LOG_DIAG,
18*4882a593Smuzhiyun 	ATH10K_ENABLE_FW_LOG_CE,
19*4882a593Smuzhiyun };
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun struct ath10k_hif_sg_item {
22*4882a593Smuzhiyun 	u16 transfer_id;
23*4882a593Smuzhiyun 	void *transfer_context; /* NULL = tx completion callback not called */
24*4882a593Smuzhiyun 	void *vaddr; /* for debugging mostly */
25*4882a593Smuzhiyun 	dma_addr_t paddr;
26*4882a593Smuzhiyun 	u16 len;
27*4882a593Smuzhiyun };
28*4882a593Smuzhiyun 
29*4882a593Smuzhiyun struct ath10k_hif_ops {
30*4882a593Smuzhiyun 	/* send a scatter-gather list to the target */
31*4882a593Smuzhiyun 	int (*tx_sg)(struct ath10k *ar, u8 pipe_id,
32*4882a593Smuzhiyun 		     struct ath10k_hif_sg_item *items, int n_items);
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun 	/* read firmware memory through the diagnose interface */
35*4882a593Smuzhiyun 	int (*diag_read)(struct ath10k *ar, u32 address, void *buf,
36*4882a593Smuzhiyun 			 size_t buf_len);
37*4882a593Smuzhiyun 
38*4882a593Smuzhiyun 	int (*diag_write)(struct ath10k *ar, u32 address, const void *data,
39*4882a593Smuzhiyun 			  int nbytes);
40*4882a593Smuzhiyun 	/*
41*4882a593Smuzhiyun 	 * API to handle HIF-specific BMI message exchanges, this API is
42*4882a593Smuzhiyun 	 * synchronous and only allowed to be called from a context that
43*4882a593Smuzhiyun 	 * can block (sleep)
44*4882a593Smuzhiyun 	 */
45*4882a593Smuzhiyun 	int (*exchange_bmi_msg)(struct ath10k *ar,
46*4882a593Smuzhiyun 				void *request, u32 request_len,
47*4882a593Smuzhiyun 				void *response, u32 *response_len);
48*4882a593Smuzhiyun 
49*4882a593Smuzhiyun 	/* Post BMI phase, after FW is loaded. Starts regular operation */
50*4882a593Smuzhiyun 	int (*start)(struct ath10k *ar);
51*4882a593Smuzhiyun 
52*4882a593Smuzhiyun 	/* Clean up what start() did. This does not revert to BMI phase. If
53*4882a593Smuzhiyun 	 * desired so, call power_down() and power_up()
54*4882a593Smuzhiyun 	 */
55*4882a593Smuzhiyun 	void (*stop)(struct ath10k *ar);
56*4882a593Smuzhiyun 
57*4882a593Smuzhiyun 	int (*start_post)(struct ath10k *ar);
58*4882a593Smuzhiyun 
59*4882a593Smuzhiyun 	int (*get_htt_tx_complete)(struct ath10k *ar);
60*4882a593Smuzhiyun 
61*4882a593Smuzhiyun 	int (*map_service_to_pipe)(struct ath10k *ar, u16 service_id,
62*4882a593Smuzhiyun 				   u8 *ul_pipe, u8 *dl_pipe);
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun 	void (*get_default_pipe)(struct ath10k *ar, u8 *ul_pipe, u8 *dl_pipe);
65*4882a593Smuzhiyun 
66*4882a593Smuzhiyun 	/*
67*4882a593Smuzhiyun 	 * Check if prior sends have completed.
68*4882a593Smuzhiyun 	 *
69*4882a593Smuzhiyun 	 * Check whether the pipe in question has any completed
70*4882a593Smuzhiyun 	 * sends that have not yet been processed.
71*4882a593Smuzhiyun 	 * This function is only relevant for HIF pipes that are configured
72*4882a593Smuzhiyun 	 * to be polled rather than interrupt-driven.
73*4882a593Smuzhiyun 	 */
74*4882a593Smuzhiyun 	void (*send_complete_check)(struct ath10k *ar, u8 pipe_id, int force);
75*4882a593Smuzhiyun 
76*4882a593Smuzhiyun 	u16 (*get_free_queue_number)(struct ath10k *ar, u8 pipe_id);
77*4882a593Smuzhiyun 
78*4882a593Smuzhiyun 	u32 (*read32)(struct ath10k *ar, u32 address);
79*4882a593Smuzhiyun 
80*4882a593Smuzhiyun 	void (*write32)(struct ath10k *ar, u32 address, u32 value);
81*4882a593Smuzhiyun 
82*4882a593Smuzhiyun 	/* Power up the device and enter BMI transfer mode for FW download */
83*4882a593Smuzhiyun 	int (*power_up)(struct ath10k *ar, enum ath10k_firmware_mode fw_mode);
84*4882a593Smuzhiyun 
85*4882a593Smuzhiyun 	/* Power down the device and free up resources. stop() must be called
86*4882a593Smuzhiyun 	 * before this if start() was called earlier
87*4882a593Smuzhiyun 	 */
88*4882a593Smuzhiyun 	void (*power_down)(struct ath10k *ar);
89*4882a593Smuzhiyun 
90*4882a593Smuzhiyun 	int (*suspend)(struct ath10k *ar);
91*4882a593Smuzhiyun 	int (*resume)(struct ath10k *ar);
92*4882a593Smuzhiyun 
93*4882a593Smuzhiyun 	/* fetch calibration data from target eeprom */
94*4882a593Smuzhiyun 	int (*fetch_cal_eeprom)(struct ath10k *ar, void **data,
95*4882a593Smuzhiyun 				size_t *data_len);
96*4882a593Smuzhiyun 
97*4882a593Smuzhiyun 	int (*get_target_info)(struct ath10k *ar,
98*4882a593Smuzhiyun 			       struct bmi_target_info *target_info);
99*4882a593Smuzhiyun 	int (*set_target_log_mode)(struct ath10k *ar, u8 fw_log_mode);
100*4882a593Smuzhiyun };
101*4882a593Smuzhiyun 
ath10k_hif_tx_sg(struct ath10k * ar,u8 pipe_id,struct ath10k_hif_sg_item * items,int n_items)102*4882a593Smuzhiyun static inline int ath10k_hif_tx_sg(struct ath10k *ar, u8 pipe_id,
103*4882a593Smuzhiyun 				   struct ath10k_hif_sg_item *items,
104*4882a593Smuzhiyun 				   int n_items)
105*4882a593Smuzhiyun {
106*4882a593Smuzhiyun 	return ar->hif.ops->tx_sg(ar, pipe_id, items, n_items);
107*4882a593Smuzhiyun }
108*4882a593Smuzhiyun 
ath10k_hif_diag_read(struct ath10k * ar,u32 address,void * buf,size_t buf_len)109*4882a593Smuzhiyun static inline int ath10k_hif_diag_read(struct ath10k *ar, u32 address, void *buf,
110*4882a593Smuzhiyun 				       size_t buf_len)
111*4882a593Smuzhiyun {
112*4882a593Smuzhiyun 	return ar->hif.ops->diag_read(ar, address, buf, buf_len);
113*4882a593Smuzhiyun }
114*4882a593Smuzhiyun 
ath10k_hif_diag_write(struct ath10k * ar,u32 address,const void * data,int nbytes)115*4882a593Smuzhiyun static inline int ath10k_hif_diag_write(struct ath10k *ar, u32 address,
116*4882a593Smuzhiyun 					const void *data, int nbytes)
117*4882a593Smuzhiyun {
118*4882a593Smuzhiyun 	if (!ar->hif.ops->diag_write)
119*4882a593Smuzhiyun 		return -EOPNOTSUPP;
120*4882a593Smuzhiyun 
121*4882a593Smuzhiyun 	return ar->hif.ops->diag_write(ar, address, data, nbytes);
122*4882a593Smuzhiyun }
123*4882a593Smuzhiyun 
ath10k_hif_exchange_bmi_msg(struct ath10k * ar,void * request,u32 request_len,void * response,u32 * response_len)124*4882a593Smuzhiyun static inline int ath10k_hif_exchange_bmi_msg(struct ath10k *ar,
125*4882a593Smuzhiyun 					      void *request, u32 request_len,
126*4882a593Smuzhiyun 					      void *response, u32 *response_len)
127*4882a593Smuzhiyun {
128*4882a593Smuzhiyun 	return ar->hif.ops->exchange_bmi_msg(ar, request, request_len,
129*4882a593Smuzhiyun 					     response, response_len);
130*4882a593Smuzhiyun }
131*4882a593Smuzhiyun 
ath10k_hif_start(struct ath10k * ar)132*4882a593Smuzhiyun static inline int ath10k_hif_start(struct ath10k *ar)
133*4882a593Smuzhiyun {
134*4882a593Smuzhiyun 	return ar->hif.ops->start(ar);
135*4882a593Smuzhiyun }
136*4882a593Smuzhiyun 
ath10k_hif_stop(struct ath10k * ar)137*4882a593Smuzhiyun static inline void ath10k_hif_stop(struct ath10k *ar)
138*4882a593Smuzhiyun {
139*4882a593Smuzhiyun 	return ar->hif.ops->stop(ar);
140*4882a593Smuzhiyun }
141*4882a593Smuzhiyun 
ath10k_hif_start_post(struct ath10k * ar)142*4882a593Smuzhiyun static inline int ath10k_hif_start_post(struct ath10k *ar)
143*4882a593Smuzhiyun {
144*4882a593Smuzhiyun 	if (ar->hif.ops->start_post)
145*4882a593Smuzhiyun 		return ar->hif.ops->start_post(ar);
146*4882a593Smuzhiyun 	return 0;
147*4882a593Smuzhiyun }
148*4882a593Smuzhiyun 
ath10k_hif_get_htt_tx_complete(struct ath10k * ar)149*4882a593Smuzhiyun static inline int ath10k_hif_get_htt_tx_complete(struct ath10k *ar)
150*4882a593Smuzhiyun {
151*4882a593Smuzhiyun 	if (ar->hif.ops->get_htt_tx_complete)
152*4882a593Smuzhiyun 		return ar->hif.ops->get_htt_tx_complete(ar);
153*4882a593Smuzhiyun 	return 0;
154*4882a593Smuzhiyun }
155*4882a593Smuzhiyun 
ath10k_hif_map_service_to_pipe(struct ath10k * ar,u16 service_id,u8 * ul_pipe,u8 * dl_pipe)156*4882a593Smuzhiyun static inline int ath10k_hif_map_service_to_pipe(struct ath10k *ar,
157*4882a593Smuzhiyun 						 u16 service_id,
158*4882a593Smuzhiyun 						 u8 *ul_pipe, u8 *dl_pipe)
159*4882a593Smuzhiyun {
160*4882a593Smuzhiyun 	return ar->hif.ops->map_service_to_pipe(ar, service_id,
161*4882a593Smuzhiyun 						ul_pipe, dl_pipe);
162*4882a593Smuzhiyun }
163*4882a593Smuzhiyun 
ath10k_hif_get_default_pipe(struct ath10k * ar,u8 * ul_pipe,u8 * dl_pipe)164*4882a593Smuzhiyun static inline void ath10k_hif_get_default_pipe(struct ath10k *ar,
165*4882a593Smuzhiyun 					       u8 *ul_pipe, u8 *dl_pipe)
166*4882a593Smuzhiyun {
167*4882a593Smuzhiyun 	ar->hif.ops->get_default_pipe(ar, ul_pipe, dl_pipe);
168*4882a593Smuzhiyun }
169*4882a593Smuzhiyun 
ath10k_hif_send_complete_check(struct ath10k * ar,u8 pipe_id,int force)170*4882a593Smuzhiyun static inline void ath10k_hif_send_complete_check(struct ath10k *ar,
171*4882a593Smuzhiyun 						  u8 pipe_id, int force)
172*4882a593Smuzhiyun {
173*4882a593Smuzhiyun 	if (ar->hif.ops->send_complete_check)
174*4882a593Smuzhiyun 		ar->hif.ops->send_complete_check(ar, pipe_id, force);
175*4882a593Smuzhiyun }
176*4882a593Smuzhiyun 
ath10k_hif_get_free_queue_number(struct ath10k * ar,u8 pipe_id)177*4882a593Smuzhiyun static inline u16 ath10k_hif_get_free_queue_number(struct ath10k *ar,
178*4882a593Smuzhiyun 						   u8 pipe_id)
179*4882a593Smuzhiyun {
180*4882a593Smuzhiyun 	return ar->hif.ops->get_free_queue_number(ar, pipe_id);
181*4882a593Smuzhiyun }
182*4882a593Smuzhiyun 
ath10k_hif_power_up(struct ath10k * ar,enum ath10k_firmware_mode fw_mode)183*4882a593Smuzhiyun static inline int ath10k_hif_power_up(struct ath10k *ar,
184*4882a593Smuzhiyun 				      enum ath10k_firmware_mode fw_mode)
185*4882a593Smuzhiyun {
186*4882a593Smuzhiyun 	return ar->hif.ops->power_up(ar, fw_mode);
187*4882a593Smuzhiyun }
188*4882a593Smuzhiyun 
ath10k_hif_power_down(struct ath10k * ar)189*4882a593Smuzhiyun static inline void ath10k_hif_power_down(struct ath10k *ar)
190*4882a593Smuzhiyun {
191*4882a593Smuzhiyun 	ar->hif.ops->power_down(ar);
192*4882a593Smuzhiyun }
193*4882a593Smuzhiyun 
ath10k_hif_suspend(struct ath10k * ar)194*4882a593Smuzhiyun static inline int ath10k_hif_suspend(struct ath10k *ar)
195*4882a593Smuzhiyun {
196*4882a593Smuzhiyun 	if (!ar->hif.ops->suspend)
197*4882a593Smuzhiyun 		return -EOPNOTSUPP;
198*4882a593Smuzhiyun 
199*4882a593Smuzhiyun 	return ar->hif.ops->suspend(ar);
200*4882a593Smuzhiyun }
201*4882a593Smuzhiyun 
ath10k_hif_resume(struct ath10k * ar)202*4882a593Smuzhiyun static inline int ath10k_hif_resume(struct ath10k *ar)
203*4882a593Smuzhiyun {
204*4882a593Smuzhiyun 	if (!ar->hif.ops->resume)
205*4882a593Smuzhiyun 		return -EOPNOTSUPP;
206*4882a593Smuzhiyun 
207*4882a593Smuzhiyun 	return ar->hif.ops->resume(ar);
208*4882a593Smuzhiyun }
209*4882a593Smuzhiyun 
ath10k_hif_read32(struct ath10k * ar,u32 address)210*4882a593Smuzhiyun static inline u32 ath10k_hif_read32(struct ath10k *ar, u32 address)
211*4882a593Smuzhiyun {
212*4882a593Smuzhiyun 	if (!ar->hif.ops->read32) {
213*4882a593Smuzhiyun 		ath10k_warn(ar, "hif read32 not supported\n");
214*4882a593Smuzhiyun 		return 0xdeaddead;
215*4882a593Smuzhiyun 	}
216*4882a593Smuzhiyun 
217*4882a593Smuzhiyun 	return ar->hif.ops->read32(ar, address);
218*4882a593Smuzhiyun }
219*4882a593Smuzhiyun 
ath10k_hif_write32(struct ath10k * ar,u32 address,u32 data)220*4882a593Smuzhiyun static inline void ath10k_hif_write32(struct ath10k *ar,
221*4882a593Smuzhiyun 				      u32 address, u32 data)
222*4882a593Smuzhiyun {
223*4882a593Smuzhiyun 	if (!ar->hif.ops->write32) {
224*4882a593Smuzhiyun 		ath10k_warn(ar, "hif write32 not supported\n");
225*4882a593Smuzhiyun 		return;
226*4882a593Smuzhiyun 	}
227*4882a593Smuzhiyun 
228*4882a593Smuzhiyun 	ar->hif.ops->write32(ar, address, data);
229*4882a593Smuzhiyun }
230*4882a593Smuzhiyun 
ath10k_hif_fetch_cal_eeprom(struct ath10k * ar,void ** data,size_t * data_len)231*4882a593Smuzhiyun static inline int ath10k_hif_fetch_cal_eeprom(struct ath10k *ar,
232*4882a593Smuzhiyun 					      void **data,
233*4882a593Smuzhiyun 					      size_t *data_len)
234*4882a593Smuzhiyun {
235*4882a593Smuzhiyun 	if (!ar->hif.ops->fetch_cal_eeprom)
236*4882a593Smuzhiyun 		return -EOPNOTSUPP;
237*4882a593Smuzhiyun 
238*4882a593Smuzhiyun 	return ar->hif.ops->fetch_cal_eeprom(ar, data, data_len);
239*4882a593Smuzhiyun }
240*4882a593Smuzhiyun 
ath10k_hif_get_target_info(struct ath10k * ar,struct bmi_target_info * tgt_info)241*4882a593Smuzhiyun static inline int ath10k_hif_get_target_info(struct ath10k *ar,
242*4882a593Smuzhiyun 					     struct bmi_target_info *tgt_info)
243*4882a593Smuzhiyun {
244*4882a593Smuzhiyun 	if (!ar->hif.ops->get_target_info)
245*4882a593Smuzhiyun 		return -EOPNOTSUPP;
246*4882a593Smuzhiyun 
247*4882a593Smuzhiyun 	return ar->hif.ops->get_target_info(ar, tgt_info);
248*4882a593Smuzhiyun }
249*4882a593Smuzhiyun 
ath10k_hif_set_target_log_mode(struct ath10k * ar,u8 fw_log_mode)250*4882a593Smuzhiyun static inline int ath10k_hif_set_target_log_mode(struct ath10k *ar,
251*4882a593Smuzhiyun 						 u8 fw_log_mode)
252*4882a593Smuzhiyun {
253*4882a593Smuzhiyun 	if (!ar->hif.ops->set_target_log_mode)
254*4882a593Smuzhiyun 		return -EOPNOTSUPP;
255*4882a593Smuzhiyun 
256*4882a593Smuzhiyun 	return ar->hif.ops->set_target_log_mode(ar, fw_log_mode);
257*4882a593Smuzhiyun }
258*4882a593Smuzhiyun #endif /* _HIF_H_ */
259