1*4882a593Smuzhiyun /* SPDX-License-Identifier: ISC */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Copyright (c) 2005-2011 Atheros Communications Inc. 4*4882a593Smuzhiyun * Copyright (c) 2011-2015,2017 Qualcomm Atheros, Inc. 5*4882a593Smuzhiyun */ 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun #ifndef _BMI_H_ 8*4882a593Smuzhiyun #define _BMI_H_ 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #include "core.h" 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun /* 13*4882a593Smuzhiyun * Bootloader Messaging Interface (BMI) 14*4882a593Smuzhiyun * 15*4882a593Smuzhiyun * BMI is a very simple messaging interface used during initialization 16*4882a593Smuzhiyun * to read memory, write memory, execute code, and to define an 17*4882a593Smuzhiyun * application entry PC. 18*4882a593Smuzhiyun * 19*4882a593Smuzhiyun * It is used to download an application to QCA988x, to provide 20*4882a593Smuzhiyun * patches to code that is already resident on QCA988x, and generally 21*4882a593Smuzhiyun * to examine and modify state. The Host has an opportunity to use 22*4882a593Smuzhiyun * BMI only once during bootup. Once the Host issues a BMI_DONE 23*4882a593Smuzhiyun * command, this opportunity ends. 24*4882a593Smuzhiyun * 25*4882a593Smuzhiyun * The Host writes BMI requests to mailbox0, and reads BMI responses 26*4882a593Smuzhiyun * from mailbox0. BMI requests all begin with a command 27*4882a593Smuzhiyun * (see below for specific commands), and are followed by 28*4882a593Smuzhiyun * command-specific data. 29*4882a593Smuzhiyun * 30*4882a593Smuzhiyun * Flow control: 31*4882a593Smuzhiyun * The Host can only issue a command once the Target gives it a 32*4882a593Smuzhiyun * "BMI Command Credit", using AR8K Counter #4. As soon as the 33*4882a593Smuzhiyun * Target has completed a command, it issues another BMI Command 34*4882a593Smuzhiyun * Credit (so the Host can issue the next command). 35*4882a593Smuzhiyun * 36*4882a593Smuzhiyun * BMI handles all required Target-side cache flushing. 37*4882a593Smuzhiyun */ 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun /* Maximum data size used for BMI transfers */ 40*4882a593Smuzhiyun #define BMI_MAX_DATA_SIZE 256 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun /* len = cmd + addr + length */ 43*4882a593Smuzhiyun #define BMI_MAX_CMDBUF_SIZE (BMI_MAX_DATA_SIZE + \ 44*4882a593Smuzhiyun sizeof(u32) + \ 45*4882a593Smuzhiyun sizeof(u32) + \ 46*4882a593Smuzhiyun sizeof(u32)) 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun /* Maximum data size used for large BMI transfers */ 49*4882a593Smuzhiyun #define BMI_MAX_LARGE_DATA_SIZE 2048 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun /* len = cmd + addr + length */ 52*4882a593Smuzhiyun #define BMI_MAX_LARGE_CMDBUF_SIZE (BMI_MAX_LARGE_DATA_SIZE + \ 53*4882a593Smuzhiyun sizeof(u32) + \ 54*4882a593Smuzhiyun sizeof(u32) + \ 55*4882a593Smuzhiyun sizeof(u32)) 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun /* BMI Commands */ 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun enum bmi_cmd_id { 60*4882a593Smuzhiyun BMI_NO_COMMAND = 0, 61*4882a593Smuzhiyun BMI_DONE = 1, 62*4882a593Smuzhiyun BMI_READ_MEMORY = 2, 63*4882a593Smuzhiyun BMI_WRITE_MEMORY = 3, 64*4882a593Smuzhiyun BMI_EXECUTE = 4, 65*4882a593Smuzhiyun BMI_SET_APP_START = 5, 66*4882a593Smuzhiyun BMI_READ_SOC_REGISTER = 6, 67*4882a593Smuzhiyun BMI_READ_SOC_WORD = 6, 68*4882a593Smuzhiyun BMI_WRITE_SOC_REGISTER = 7, 69*4882a593Smuzhiyun BMI_WRITE_SOC_WORD = 7, 70*4882a593Smuzhiyun BMI_GET_TARGET_ID = 8, 71*4882a593Smuzhiyun BMI_GET_TARGET_INFO = 8, 72*4882a593Smuzhiyun BMI_ROMPATCH_INSTALL = 9, 73*4882a593Smuzhiyun BMI_ROMPATCH_UNINSTALL = 10, 74*4882a593Smuzhiyun BMI_ROMPATCH_ACTIVATE = 11, 75*4882a593Smuzhiyun BMI_ROMPATCH_DEACTIVATE = 12, 76*4882a593Smuzhiyun BMI_LZ_STREAM_START = 13, /* should be followed by LZ_DATA */ 77*4882a593Smuzhiyun BMI_LZ_DATA = 14, 78*4882a593Smuzhiyun BMI_NVRAM_PROCESS = 15, 79*4882a593Smuzhiyun }; 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun #define BMI_NVRAM_SEG_NAME_SZ 16 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun #define BMI_PARAM_GET_EEPROM_BOARD_ID 0x10 84*4882a593Smuzhiyun #define BMI_PARAM_GET_FLASH_BOARD_ID 0x8000 85*4882a593Smuzhiyun #define BMI_PARAM_FLASH_SECTION_ALL 0x10000 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun /* Dual-band Extended Board ID */ 88*4882a593Smuzhiyun #define BMI_PARAM_GET_EXT_BOARD_ID 0x40000 89*4882a593Smuzhiyun #define ATH10K_BMI_EXT_BOARD_ID_SUPPORT 0x40000 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun #define ATH10K_BMI_BOARD_ID_FROM_OTP_MASK 0x7c00 92*4882a593Smuzhiyun #define ATH10K_BMI_BOARD_ID_FROM_OTP_LSB 10 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun #define ATH10K_BMI_CHIP_ID_FROM_OTP_MASK 0x18000 95*4882a593Smuzhiyun #define ATH10K_BMI_CHIP_ID_FROM_OTP_LSB 15 96*4882a593Smuzhiyun 97*4882a593Smuzhiyun #define ATH10K_BMI_BOARD_ID_STATUS_MASK 0xff 98*4882a593Smuzhiyun #define ATH10K_BMI_EBOARD_ID_STATUS_MASK 0xff 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun struct bmi_cmd { 101*4882a593Smuzhiyun __le32 id; /* enum bmi_cmd_id */ 102*4882a593Smuzhiyun union { 103*4882a593Smuzhiyun struct { 104*4882a593Smuzhiyun } done; 105*4882a593Smuzhiyun struct { 106*4882a593Smuzhiyun __le32 addr; 107*4882a593Smuzhiyun __le32 len; 108*4882a593Smuzhiyun } read_mem; 109*4882a593Smuzhiyun struct { 110*4882a593Smuzhiyun __le32 addr; 111*4882a593Smuzhiyun __le32 len; 112*4882a593Smuzhiyun u8 payload[0]; 113*4882a593Smuzhiyun } write_mem; 114*4882a593Smuzhiyun struct { 115*4882a593Smuzhiyun __le32 addr; 116*4882a593Smuzhiyun __le32 param; 117*4882a593Smuzhiyun } execute; 118*4882a593Smuzhiyun struct { 119*4882a593Smuzhiyun __le32 addr; 120*4882a593Smuzhiyun } set_app_start; 121*4882a593Smuzhiyun struct { 122*4882a593Smuzhiyun __le32 addr; 123*4882a593Smuzhiyun } read_soc_reg; 124*4882a593Smuzhiyun struct { 125*4882a593Smuzhiyun __le32 addr; 126*4882a593Smuzhiyun __le32 value; 127*4882a593Smuzhiyun } write_soc_reg; 128*4882a593Smuzhiyun struct { 129*4882a593Smuzhiyun } get_target_info; 130*4882a593Smuzhiyun struct { 131*4882a593Smuzhiyun __le32 rom_addr; 132*4882a593Smuzhiyun __le32 ram_addr; /* or value */ 133*4882a593Smuzhiyun __le32 size; 134*4882a593Smuzhiyun __le32 activate; /* 0=install, but dont activate */ 135*4882a593Smuzhiyun } rompatch_install; 136*4882a593Smuzhiyun struct { 137*4882a593Smuzhiyun __le32 patch_id; 138*4882a593Smuzhiyun } rompatch_uninstall; 139*4882a593Smuzhiyun struct { 140*4882a593Smuzhiyun __le32 count; 141*4882a593Smuzhiyun __le32 patch_ids[0]; /* length of @count */ 142*4882a593Smuzhiyun } rompatch_activate; 143*4882a593Smuzhiyun struct { 144*4882a593Smuzhiyun __le32 count; 145*4882a593Smuzhiyun __le32 patch_ids[0]; /* length of @count */ 146*4882a593Smuzhiyun } rompatch_deactivate; 147*4882a593Smuzhiyun struct { 148*4882a593Smuzhiyun __le32 addr; 149*4882a593Smuzhiyun } lz_start; 150*4882a593Smuzhiyun struct { 151*4882a593Smuzhiyun __le32 len; /* max BMI_MAX_DATA_SIZE */ 152*4882a593Smuzhiyun u8 payload[0]; /* length of @len */ 153*4882a593Smuzhiyun } lz_data; 154*4882a593Smuzhiyun struct { 155*4882a593Smuzhiyun u8 name[BMI_NVRAM_SEG_NAME_SZ]; 156*4882a593Smuzhiyun } nvram_process; 157*4882a593Smuzhiyun u8 payload[BMI_MAX_CMDBUF_SIZE]; 158*4882a593Smuzhiyun }; 159*4882a593Smuzhiyun } __packed; 160*4882a593Smuzhiyun 161*4882a593Smuzhiyun union bmi_resp { 162*4882a593Smuzhiyun struct { 163*4882a593Smuzhiyun u8 payload[0]; 164*4882a593Smuzhiyun } read_mem; 165*4882a593Smuzhiyun struct { 166*4882a593Smuzhiyun __le32 result; 167*4882a593Smuzhiyun } execute; 168*4882a593Smuzhiyun struct { 169*4882a593Smuzhiyun __le32 value; 170*4882a593Smuzhiyun } read_soc_reg; 171*4882a593Smuzhiyun struct { 172*4882a593Smuzhiyun __le32 len; 173*4882a593Smuzhiyun __le32 version; 174*4882a593Smuzhiyun __le32 type; 175*4882a593Smuzhiyun } get_target_info; 176*4882a593Smuzhiyun struct { 177*4882a593Smuzhiyun __le32 patch_id; 178*4882a593Smuzhiyun } rompatch_install; 179*4882a593Smuzhiyun struct { 180*4882a593Smuzhiyun __le32 patch_id; 181*4882a593Smuzhiyun } rompatch_uninstall; 182*4882a593Smuzhiyun struct { 183*4882a593Smuzhiyun /* 0 = nothing executed 184*4882a593Smuzhiyun * otherwise = NVRAM segment return value 185*4882a593Smuzhiyun */ 186*4882a593Smuzhiyun __le32 result; 187*4882a593Smuzhiyun } nvram_process; 188*4882a593Smuzhiyun u8 payload[BMI_MAX_CMDBUF_SIZE]; 189*4882a593Smuzhiyun } __packed; 190*4882a593Smuzhiyun 191*4882a593Smuzhiyun struct bmi_target_info { 192*4882a593Smuzhiyun u32 version; 193*4882a593Smuzhiyun u32 type; 194*4882a593Smuzhiyun }; 195*4882a593Smuzhiyun 196*4882a593Smuzhiyun struct bmi_segmented_file_header { 197*4882a593Smuzhiyun __le32 magic_num; 198*4882a593Smuzhiyun __le32 file_flags; 199*4882a593Smuzhiyun u8 data[]; 200*4882a593Smuzhiyun }; 201*4882a593Smuzhiyun 202*4882a593Smuzhiyun struct bmi_segmented_metadata { 203*4882a593Smuzhiyun __le32 addr; 204*4882a593Smuzhiyun __le32 length; 205*4882a593Smuzhiyun u8 data[]; 206*4882a593Smuzhiyun }; 207*4882a593Smuzhiyun 208*4882a593Smuzhiyun #define BMI_SGMTFILE_MAGIC_NUM 0x544d4753 /* "SGMT" */ 209*4882a593Smuzhiyun #define BMI_SGMTFILE_FLAG_COMPRESS 1 210*4882a593Smuzhiyun 211*4882a593Smuzhiyun /* Special values for bmi_segmented_metadata.length (all have high bit set) */ 212*4882a593Smuzhiyun 213*4882a593Smuzhiyun /* end of segmented data */ 214*4882a593Smuzhiyun #define BMI_SGMTFILE_DONE 0xffffffff 215*4882a593Smuzhiyun 216*4882a593Smuzhiyun /* Board Data segment */ 217*4882a593Smuzhiyun #define BMI_SGMTFILE_BDDATA 0xfffffffe 218*4882a593Smuzhiyun 219*4882a593Smuzhiyun /* set beginning address */ 220*4882a593Smuzhiyun #define BMI_SGMTFILE_BEGINADDR 0xfffffffd 221*4882a593Smuzhiyun 222*4882a593Smuzhiyun /* immediate function execution */ 223*4882a593Smuzhiyun #define BMI_SGMTFILE_EXEC 0xfffffffc 224*4882a593Smuzhiyun 225*4882a593Smuzhiyun /* in jiffies */ 226*4882a593Smuzhiyun #define BMI_COMMUNICATION_TIMEOUT_HZ (3 * HZ) 227*4882a593Smuzhiyun 228*4882a593Smuzhiyun #define BMI_CE_NUM_TO_TARG 0 229*4882a593Smuzhiyun #define BMI_CE_NUM_TO_HOST 1 230*4882a593Smuzhiyun 231*4882a593Smuzhiyun void ath10k_bmi_start(struct ath10k *ar); 232*4882a593Smuzhiyun int ath10k_bmi_done(struct ath10k *ar); 233*4882a593Smuzhiyun int ath10k_bmi_get_target_info(struct ath10k *ar, 234*4882a593Smuzhiyun struct bmi_target_info *target_info); 235*4882a593Smuzhiyun int ath10k_bmi_get_target_info_sdio(struct ath10k *ar, 236*4882a593Smuzhiyun struct bmi_target_info *target_info); 237*4882a593Smuzhiyun int ath10k_bmi_read_memory(struct ath10k *ar, u32 address, 238*4882a593Smuzhiyun void *buffer, u32 length); 239*4882a593Smuzhiyun int ath10k_bmi_write_memory(struct ath10k *ar, u32 address, 240*4882a593Smuzhiyun const void *buffer, u32 length); 241*4882a593Smuzhiyun 242*4882a593Smuzhiyun #define ath10k_bmi_read32(ar, item, val) \ 243*4882a593Smuzhiyun ({ \ 244*4882a593Smuzhiyun int ret; \ 245*4882a593Smuzhiyun u32 addr; \ 246*4882a593Smuzhiyun __le32 tmp; \ 247*4882a593Smuzhiyun \ 248*4882a593Smuzhiyun addr = host_interest_item_address(HI_ITEM(item)); \ 249*4882a593Smuzhiyun ret = ath10k_bmi_read_memory(ar, addr, (u8 *)&tmp, 4); \ 250*4882a593Smuzhiyun if (!ret) \ 251*4882a593Smuzhiyun *val = __le32_to_cpu(tmp); \ 252*4882a593Smuzhiyun ret; \ 253*4882a593Smuzhiyun }) 254*4882a593Smuzhiyun 255*4882a593Smuzhiyun #define ath10k_bmi_write32(ar, item, val) \ 256*4882a593Smuzhiyun ({ \ 257*4882a593Smuzhiyun int ret; \ 258*4882a593Smuzhiyun u32 address; \ 259*4882a593Smuzhiyun __le32 v = __cpu_to_le32(val); \ 260*4882a593Smuzhiyun \ 261*4882a593Smuzhiyun address = host_interest_item_address(HI_ITEM(item)); \ 262*4882a593Smuzhiyun ret = ath10k_bmi_write_memory(ar, address, \ 263*4882a593Smuzhiyun (u8 *)&v, sizeof(v)); \ 264*4882a593Smuzhiyun ret; \ 265*4882a593Smuzhiyun }) 266*4882a593Smuzhiyun 267*4882a593Smuzhiyun int ath10k_bmi_execute(struct ath10k *ar, u32 address, u32 param, u32 *result); 268*4882a593Smuzhiyun int ath10k_bmi_lz_stream_start(struct ath10k *ar, u32 address); 269*4882a593Smuzhiyun int ath10k_bmi_lz_data(struct ath10k *ar, const void *buffer, u32 length); 270*4882a593Smuzhiyun 271*4882a593Smuzhiyun int ath10k_bmi_fast_download(struct ath10k *ar, u32 address, 272*4882a593Smuzhiyun const void *buffer, u32 length); 273*4882a593Smuzhiyun int ath10k_bmi_read_soc_reg(struct ath10k *ar, u32 address, u32 *reg_val); 274*4882a593Smuzhiyun int ath10k_bmi_write_soc_reg(struct ath10k *ar, u32 address, u32 reg_val); 275*4882a593Smuzhiyun int ath10k_bmi_set_start(struct ath10k *ar, u32 address); 276*4882a593Smuzhiyun 277*4882a593Smuzhiyun #endif /* _BMI_H_ */ 278