xref: /OK3568_Linux_fs/kernel/drivers/net/wireless/ath/ar5523/ar5523.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun  * Copyright (c) 2006 Damien Bergamini <damien.bergamini@free.fr>
3*4882a593Smuzhiyun  * Copyright (c) 2006 Sam Leffler, Errno Consulting
4*4882a593Smuzhiyun  * Copyright (c) 2007 Christoph Hellwig <hch@lst.de>
5*4882a593Smuzhiyun  * Copyright (c) 2008-2009 Weongyo Jeong <weongyo@freebsd.org>
6*4882a593Smuzhiyun  * Copyright (c) 2012 Pontus Fuchs <pontus.fuchs@gmail.com>
7*4882a593Smuzhiyun  *
8*4882a593Smuzhiyun  * Permission to use, copy, modify, and/or distribute this software for any
9*4882a593Smuzhiyun  * purpose with or without fee is hereby granted, provided that the above
10*4882a593Smuzhiyun  * copyright notice and this permission notice appear in all copies.
11*4882a593Smuzhiyun  *
12*4882a593Smuzhiyun  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
13*4882a593Smuzhiyun  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
14*4882a593Smuzhiyun  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
15*4882a593Smuzhiyun  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
16*4882a593Smuzhiyun  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
17*4882a593Smuzhiyun  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
18*4882a593Smuzhiyun  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
19*4882a593Smuzhiyun  */
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun /*
22*4882a593Smuzhiyun  * This driver is based on the uath driver written by Damien Bergamini for
23*4882a593Smuzhiyun  * OpenBSD, who did black-box analysis of the Windows binary driver to find
24*4882a593Smuzhiyun  * out how the hardware works.  It contains a lot magic numbers because of
25*4882a593Smuzhiyun  * that and only has minimal functionality.
26*4882a593Smuzhiyun  */
27*4882a593Smuzhiyun #include <linux/compiler.h>
28*4882a593Smuzhiyun #include <linux/kernel.h>
29*4882a593Smuzhiyun #include <linux/module.h>
30*4882a593Smuzhiyun #include <linux/list.h>
31*4882a593Smuzhiyun #include <linux/completion.h>
32*4882a593Smuzhiyun #include <linux/firmware.h>
33*4882a593Smuzhiyun #include <linux/skbuff.h>
34*4882a593Smuzhiyun #include <linux/usb.h>
35*4882a593Smuzhiyun #include <net/mac80211.h>
36*4882a593Smuzhiyun 
37*4882a593Smuzhiyun #include "ar5523.h"
38*4882a593Smuzhiyun #include "ar5523_hw.h"
39*4882a593Smuzhiyun 
40*4882a593Smuzhiyun /*
41*4882a593Smuzhiyun  * Various supported device vendors/products.
42*4882a593Smuzhiyun  * UB51: AR5005UG 802.11b/g, UB52: AR5005UX 802.11a/b/g
43*4882a593Smuzhiyun  */
44*4882a593Smuzhiyun 
45*4882a593Smuzhiyun static int ar5523_submit_rx_cmd(struct ar5523 *ar);
46*4882a593Smuzhiyun static void ar5523_data_tx_pkt_put(struct ar5523 *ar);
47*4882a593Smuzhiyun 
ar5523_read_reply(struct ar5523 * ar,struct ar5523_cmd_hdr * hdr,struct ar5523_tx_cmd * cmd)48*4882a593Smuzhiyun static void ar5523_read_reply(struct ar5523 *ar, struct ar5523_cmd_hdr *hdr,
49*4882a593Smuzhiyun 			      struct ar5523_tx_cmd *cmd)
50*4882a593Smuzhiyun {
51*4882a593Smuzhiyun 	int dlen, olen;
52*4882a593Smuzhiyun 	__be32 *rp;
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun 	dlen = be32_to_cpu(hdr->len) - sizeof(*hdr);
55*4882a593Smuzhiyun 
56*4882a593Smuzhiyun 	if (dlen < 0) {
57*4882a593Smuzhiyun 		WARN_ON(1);
58*4882a593Smuzhiyun 		goto out;
59*4882a593Smuzhiyun 	}
60*4882a593Smuzhiyun 
61*4882a593Smuzhiyun 	ar5523_dbg(ar, "Code = %d len = %d\n", be32_to_cpu(hdr->code) & 0xff,
62*4882a593Smuzhiyun 		   dlen);
63*4882a593Smuzhiyun 
64*4882a593Smuzhiyun 	rp = (__be32 *)(hdr + 1);
65*4882a593Smuzhiyun 	if (dlen >= sizeof(u32)) {
66*4882a593Smuzhiyun 		olen = be32_to_cpu(rp[0]);
67*4882a593Smuzhiyun 		dlen -= sizeof(u32);
68*4882a593Smuzhiyun 		if (olen == 0) {
69*4882a593Smuzhiyun 			/* convention is 0 =>'s one word */
70*4882a593Smuzhiyun 			olen = sizeof(u32);
71*4882a593Smuzhiyun 		}
72*4882a593Smuzhiyun 	} else
73*4882a593Smuzhiyun 		olen = 0;
74*4882a593Smuzhiyun 
75*4882a593Smuzhiyun 	if (cmd->odata) {
76*4882a593Smuzhiyun 		if (cmd->olen < olen) {
77*4882a593Smuzhiyun 			ar5523_err(ar, "olen too small %d < %d\n",
78*4882a593Smuzhiyun 				   cmd->olen, olen);
79*4882a593Smuzhiyun 			cmd->olen = 0;
80*4882a593Smuzhiyun 			cmd->res = -EOVERFLOW;
81*4882a593Smuzhiyun 		} else {
82*4882a593Smuzhiyun 			cmd->olen = olen;
83*4882a593Smuzhiyun 			memcpy(cmd->odata, &rp[1], olen);
84*4882a593Smuzhiyun 			cmd->res = 0;
85*4882a593Smuzhiyun 		}
86*4882a593Smuzhiyun 	}
87*4882a593Smuzhiyun 
88*4882a593Smuzhiyun out:
89*4882a593Smuzhiyun 	complete(&cmd->done);
90*4882a593Smuzhiyun }
91*4882a593Smuzhiyun 
ar5523_cmd_rx_cb(struct urb * urb)92*4882a593Smuzhiyun static void ar5523_cmd_rx_cb(struct urb *urb)
93*4882a593Smuzhiyun {
94*4882a593Smuzhiyun 	struct ar5523 *ar = urb->context;
95*4882a593Smuzhiyun 	struct ar5523_tx_cmd *cmd = &ar->tx_cmd;
96*4882a593Smuzhiyun 	struct ar5523_cmd_hdr *hdr = ar->rx_cmd_buf;
97*4882a593Smuzhiyun 	int dlen;
98*4882a593Smuzhiyun 	u32 code, hdrlen;
99*4882a593Smuzhiyun 
100*4882a593Smuzhiyun 	if (urb->status) {
101*4882a593Smuzhiyun 		if (urb->status != -ESHUTDOWN)
102*4882a593Smuzhiyun 			ar5523_err(ar, "RX USB error %d.\n", urb->status);
103*4882a593Smuzhiyun 		goto skip;
104*4882a593Smuzhiyun 	}
105*4882a593Smuzhiyun 
106*4882a593Smuzhiyun 	if (urb->actual_length < sizeof(struct ar5523_cmd_hdr)) {
107*4882a593Smuzhiyun 		ar5523_err(ar, "RX USB to short.\n");
108*4882a593Smuzhiyun 		goto skip;
109*4882a593Smuzhiyun 	}
110*4882a593Smuzhiyun 
111*4882a593Smuzhiyun 	ar5523_dbg(ar, "%s code %02x priv %d\n", __func__,
112*4882a593Smuzhiyun 		   be32_to_cpu(hdr->code) & 0xff, hdr->priv);
113*4882a593Smuzhiyun 
114*4882a593Smuzhiyun 	code = be32_to_cpu(hdr->code);
115*4882a593Smuzhiyun 	hdrlen = be32_to_cpu(hdr->len);
116*4882a593Smuzhiyun 
117*4882a593Smuzhiyun 	switch (code & 0xff) {
118*4882a593Smuzhiyun 	default:
119*4882a593Smuzhiyun 		/* reply to a read command */
120*4882a593Smuzhiyun 		if (hdr->priv != AR5523_CMD_ID) {
121*4882a593Smuzhiyun 			ar5523_err(ar, "Unexpected command id: %02x\n",
122*4882a593Smuzhiyun 				   code & 0xff);
123*4882a593Smuzhiyun 			goto skip;
124*4882a593Smuzhiyun 		}
125*4882a593Smuzhiyun 		ar5523_read_reply(ar, hdr, cmd);
126*4882a593Smuzhiyun 		break;
127*4882a593Smuzhiyun 
128*4882a593Smuzhiyun 	case WDCMSG_DEVICE_AVAIL:
129*4882a593Smuzhiyun 		ar5523_dbg(ar, "WDCMSG_DEVICE_AVAIL\n");
130*4882a593Smuzhiyun 		cmd->res = 0;
131*4882a593Smuzhiyun 		cmd->olen = 0;
132*4882a593Smuzhiyun 		complete(&cmd->done);
133*4882a593Smuzhiyun 		break;
134*4882a593Smuzhiyun 
135*4882a593Smuzhiyun 	case WDCMSG_SEND_COMPLETE:
136*4882a593Smuzhiyun 		ar5523_dbg(ar, "WDCMSG_SEND_COMPLETE: %d pending\n",
137*4882a593Smuzhiyun 			atomic_read(&ar->tx_nr_pending));
138*4882a593Smuzhiyun 		if (!test_bit(AR5523_HW_UP, &ar->flags))
139*4882a593Smuzhiyun 			ar5523_dbg(ar, "Unexpected WDCMSG_SEND_COMPLETE\n");
140*4882a593Smuzhiyun 		else {
141*4882a593Smuzhiyun 			mod_timer(&ar->tx_wd_timer,
142*4882a593Smuzhiyun 				  jiffies + AR5523_TX_WD_TIMEOUT);
143*4882a593Smuzhiyun 			ar5523_data_tx_pkt_put(ar);
144*4882a593Smuzhiyun 
145*4882a593Smuzhiyun 		}
146*4882a593Smuzhiyun 		break;
147*4882a593Smuzhiyun 
148*4882a593Smuzhiyun 	case WDCMSG_TARGET_START:
149*4882a593Smuzhiyun 		/* This command returns a bogus id so it needs special
150*4882a593Smuzhiyun 		   handling */
151*4882a593Smuzhiyun 		dlen = hdrlen - sizeof(*hdr);
152*4882a593Smuzhiyun 		if (dlen != (int)sizeof(u32)) {
153*4882a593Smuzhiyun 			ar5523_err(ar, "Invalid reply to WDCMSG_TARGET_START");
154*4882a593Smuzhiyun 			return;
155*4882a593Smuzhiyun 		}
156*4882a593Smuzhiyun 		if (!cmd->odata) {
157*4882a593Smuzhiyun 			ar5523_err(ar, "Unexpected WDCMSG_TARGET_START reply");
158*4882a593Smuzhiyun 			return;
159*4882a593Smuzhiyun 		}
160*4882a593Smuzhiyun 		memcpy(cmd->odata, hdr + 1, sizeof(u32));
161*4882a593Smuzhiyun 		cmd->olen = sizeof(u32);
162*4882a593Smuzhiyun 		cmd->res = 0;
163*4882a593Smuzhiyun 		complete(&cmd->done);
164*4882a593Smuzhiyun 		break;
165*4882a593Smuzhiyun 
166*4882a593Smuzhiyun 	case WDCMSG_STATS_UPDATE:
167*4882a593Smuzhiyun 		ar5523_dbg(ar, "WDCMSG_STATS_UPDATE\n");
168*4882a593Smuzhiyun 		break;
169*4882a593Smuzhiyun 	}
170*4882a593Smuzhiyun 
171*4882a593Smuzhiyun skip:
172*4882a593Smuzhiyun 	ar5523_submit_rx_cmd(ar);
173*4882a593Smuzhiyun }
174*4882a593Smuzhiyun 
ar5523_alloc_rx_cmd(struct ar5523 * ar)175*4882a593Smuzhiyun static int ar5523_alloc_rx_cmd(struct ar5523 *ar)
176*4882a593Smuzhiyun {
177*4882a593Smuzhiyun 	ar->rx_cmd_urb = usb_alloc_urb(0, GFP_KERNEL);
178*4882a593Smuzhiyun 	if (!ar->rx_cmd_urb)
179*4882a593Smuzhiyun 		return -ENOMEM;
180*4882a593Smuzhiyun 
181*4882a593Smuzhiyun 	ar->rx_cmd_buf = usb_alloc_coherent(ar->dev, AR5523_MAX_RXCMDSZ,
182*4882a593Smuzhiyun 					    GFP_KERNEL,
183*4882a593Smuzhiyun 					    &ar->rx_cmd_urb->transfer_dma);
184*4882a593Smuzhiyun 	if (!ar->rx_cmd_buf) {
185*4882a593Smuzhiyun 		usb_free_urb(ar->rx_cmd_urb);
186*4882a593Smuzhiyun 		return -ENOMEM;
187*4882a593Smuzhiyun 	}
188*4882a593Smuzhiyun 	return 0;
189*4882a593Smuzhiyun }
190*4882a593Smuzhiyun 
ar5523_cancel_rx_cmd(struct ar5523 * ar)191*4882a593Smuzhiyun static void ar5523_cancel_rx_cmd(struct ar5523 *ar)
192*4882a593Smuzhiyun {
193*4882a593Smuzhiyun 	usb_kill_urb(ar->rx_cmd_urb);
194*4882a593Smuzhiyun }
195*4882a593Smuzhiyun 
ar5523_free_rx_cmd(struct ar5523 * ar)196*4882a593Smuzhiyun static void ar5523_free_rx_cmd(struct ar5523 *ar)
197*4882a593Smuzhiyun {
198*4882a593Smuzhiyun 	usb_free_coherent(ar->dev, AR5523_MAX_RXCMDSZ,
199*4882a593Smuzhiyun 			  ar->rx_cmd_buf, ar->rx_cmd_urb->transfer_dma);
200*4882a593Smuzhiyun 	usb_free_urb(ar->rx_cmd_urb);
201*4882a593Smuzhiyun }
202*4882a593Smuzhiyun 
ar5523_submit_rx_cmd(struct ar5523 * ar)203*4882a593Smuzhiyun static int ar5523_submit_rx_cmd(struct ar5523 *ar)
204*4882a593Smuzhiyun {
205*4882a593Smuzhiyun 	int error;
206*4882a593Smuzhiyun 
207*4882a593Smuzhiyun 	usb_fill_bulk_urb(ar->rx_cmd_urb, ar->dev,
208*4882a593Smuzhiyun 			  ar5523_cmd_rx_pipe(ar->dev), ar->rx_cmd_buf,
209*4882a593Smuzhiyun 			  AR5523_MAX_RXCMDSZ, ar5523_cmd_rx_cb, ar);
210*4882a593Smuzhiyun 	ar->rx_cmd_urb->transfer_flags |= URB_NO_TRANSFER_DMA_MAP;
211*4882a593Smuzhiyun 
212*4882a593Smuzhiyun 	error = usb_submit_urb(ar->rx_cmd_urb, GFP_ATOMIC);
213*4882a593Smuzhiyun 	if (error) {
214*4882a593Smuzhiyun 		if (error != -ENODEV)
215*4882a593Smuzhiyun 			ar5523_err(ar, "error %d when submitting rx urb\n",
216*4882a593Smuzhiyun 				   error);
217*4882a593Smuzhiyun 		return error;
218*4882a593Smuzhiyun 	}
219*4882a593Smuzhiyun 	return 0;
220*4882a593Smuzhiyun }
221*4882a593Smuzhiyun 
222*4882a593Smuzhiyun /*
223*4882a593Smuzhiyun  * Command submitted cb
224*4882a593Smuzhiyun  */
ar5523_cmd_tx_cb(struct urb * urb)225*4882a593Smuzhiyun static void ar5523_cmd_tx_cb(struct urb *urb)
226*4882a593Smuzhiyun {
227*4882a593Smuzhiyun 	struct ar5523_tx_cmd *cmd = urb->context;
228*4882a593Smuzhiyun 	struct ar5523 *ar = cmd->ar;
229*4882a593Smuzhiyun 
230*4882a593Smuzhiyun 	if (urb->status) {
231*4882a593Smuzhiyun 		ar5523_err(ar, "Failed to TX command. Status = %d\n",
232*4882a593Smuzhiyun 			   urb->status);
233*4882a593Smuzhiyun 		cmd->res = urb->status;
234*4882a593Smuzhiyun 		complete(&cmd->done);
235*4882a593Smuzhiyun 		return;
236*4882a593Smuzhiyun 	}
237*4882a593Smuzhiyun 
238*4882a593Smuzhiyun 	if (!(cmd->flags & AR5523_CMD_FLAG_READ)) {
239*4882a593Smuzhiyun 		cmd->res = 0;
240*4882a593Smuzhiyun 		complete(&cmd->done);
241*4882a593Smuzhiyun 	}
242*4882a593Smuzhiyun }
243*4882a593Smuzhiyun 
ar5523_cmd(struct ar5523 * ar,u32 code,const void * idata,int ilen,void * odata,int olen,int flags)244*4882a593Smuzhiyun static int ar5523_cmd(struct ar5523 *ar, u32 code, const void *idata,
245*4882a593Smuzhiyun 		      int ilen, void *odata, int olen, int flags)
246*4882a593Smuzhiyun {
247*4882a593Smuzhiyun 	struct ar5523_cmd_hdr *hdr;
248*4882a593Smuzhiyun 	struct ar5523_tx_cmd *cmd = &ar->tx_cmd;
249*4882a593Smuzhiyun 	int xferlen, error;
250*4882a593Smuzhiyun 
251*4882a593Smuzhiyun 	/* always bulk-out a multiple of 4 bytes */
252*4882a593Smuzhiyun 	xferlen = (sizeof(struct ar5523_cmd_hdr) + ilen + 3) & ~3;
253*4882a593Smuzhiyun 
254*4882a593Smuzhiyun 	hdr = (struct ar5523_cmd_hdr *)cmd->buf_tx;
255*4882a593Smuzhiyun 	memset(hdr, 0, sizeof(struct ar5523_cmd_hdr));
256*4882a593Smuzhiyun 	hdr->len  = cpu_to_be32(xferlen);
257*4882a593Smuzhiyun 	hdr->code = cpu_to_be32(code);
258*4882a593Smuzhiyun 	hdr->priv = AR5523_CMD_ID;
259*4882a593Smuzhiyun 
260*4882a593Smuzhiyun 	if (flags & AR5523_CMD_FLAG_MAGIC)
261*4882a593Smuzhiyun 		hdr->magic = cpu_to_be32(1 << 24);
262*4882a593Smuzhiyun 	if (ilen)
263*4882a593Smuzhiyun 		memcpy(hdr + 1, idata, ilen);
264*4882a593Smuzhiyun 
265*4882a593Smuzhiyun 	cmd->odata = odata;
266*4882a593Smuzhiyun 	cmd->olen = olen;
267*4882a593Smuzhiyun 	cmd->flags = flags;
268*4882a593Smuzhiyun 
269*4882a593Smuzhiyun 	ar5523_dbg(ar, "do cmd %02x\n", code);
270*4882a593Smuzhiyun 
271*4882a593Smuzhiyun 	usb_fill_bulk_urb(cmd->urb_tx, ar->dev, ar5523_cmd_tx_pipe(ar->dev),
272*4882a593Smuzhiyun 			  cmd->buf_tx, xferlen, ar5523_cmd_tx_cb, cmd);
273*4882a593Smuzhiyun 	cmd->urb_tx->transfer_flags |= URB_NO_TRANSFER_DMA_MAP;
274*4882a593Smuzhiyun 
275*4882a593Smuzhiyun 	error = usb_submit_urb(cmd->urb_tx, GFP_KERNEL);
276*4882a593Smuzhiyun 	if (error) {
277*4882a593Smuzhiyun 		ar5523_err(ar, "could not send command 0x%x, error=%d\n",
278*4882a593Smuzhiyun 			   code, error);
279*4882a593Smuzhiyun 		return error;
280*4882a593Smuzhiyun 	}
281*4882a593Smuzhiyun 
282*4882a593Smuzhiyun 	if (!wait_for_completion_timeout(&cmd->done, 2 * HZ)) {
283*4882a593Smuzhiyun 		cmd->odata = NULL;
284*4882a593Smuzhiyun 		ar5523_err(ar, "timeout waiting for command %02x reply\n",
285*4882a593Smuzhiyun 			   code);
286*4882a593Smuzhiyun 		cmd->res = -ETIMEDOUT;
287*4882a593Smuzhiyun 	}
288*4882a593Smuzhiyun 	return cmd->res;
289*4882a593Smuzhiyun }
290*4882a593Smuzhiyun 
ar5523_cmd_write(struct ar5523 * ar,u32 code,const void * data,int len,int flags)291*4882a593Smuzhiyun static int ar5523_cmd_write(struct ar5523 *ar, u32 code, const void *data,
292*4882a593Smuzhiyun 			    int len, int flags)
293*4882a593Smuzhiyun {
294*4882a593Smuzhiyun 	flags &= ~AR5523_CMD_FLAG_READ;
295*4882a593Smuzhiyun 	return ar5523_cmd(ar, code, data, len, NULL, 0, flags);
296*4882a593Smuzhiyun }
297*4882a593Smuzhiyun 
ar5523_cmd_read(struct ar5523 * ar,u32 code,const void * idata,int ilen,void * odata,int olen,int flags)298*4882a593Smuzhiyun static int ar5523_cmd_read(struct ar5523 *ar, u32 code, const void *idata,
299*4882a593Smuzhiyun 			   int ilen, void *odata, int olen, int flags)
300*4882a593Smuzhiyun {
301*4882a593Smuzhiyun 	flags |= AR5523_CMD_FLAG_READ;
302*4882a593Smuzhiyun 	return ar5523_cmd(ar, code, idata, ilen, odata, olen, flags);
303*4882a593Smuzhiyun }
304*4882a593Smuzhiyun 
ar5523_config(struct ar5523 * ar,u32 reg,u32 val)305*4882a593Smuzhiyun static int ar5523_config(struct ar5523 *ar, u32 reg, u32 val)
306*4882a593Smuzhiyun {
307*4882a593Smuzhiyun 	struct ar5523_write_mac write;
308*4882a593Smuzhiyun 	int error;
309*4882a593Smuzhiyun 
310*4882a593Smuzhiyun 	write.reg = cpu_to_be32(reg);
311*4882a593Smuzhiyun 	write.len = cpu_to_be32(0);	/* 0 = single write */
312*4882a593Smuzhiyun 	*(__be32 *)write.data = cpu_to_be32(val);
313*4882a593Smuzhiyun 
314*4882a593Smuzhiyun 	error = ar5523_cmd_write(ar, WDCMSG_TARGET_SET_CONFIG, &write,
315*4882a593Smuzhiyun 				 3 * sizeof(u32), 0);
316*4882a593Smuzhiyun 	if (error != 0)
317*4882a593Smuzhiyun 		ar5523_err(ar, "could not write register 0x%02x\n", reg);
318*4882a593Smuzhiyun 	return error;
319*4882a593Smuzhiyun }
320*4882a593Smuzhiyun 
ar5523_config_multi(struct ar5523 * ar,u32 reg,const void * data,int len)321*4882a593Smuzhiyun static int ar5523_config_multi(struct ar5523 *ar, u32 reg, const void *data,
322*4882a593Smuzhiyun 			       int len)
323*4882a593Smuzhiyun {
324*4882a593Smuzhiyun 	struct ar5523_write_mac write;
325*4882a593Smuzhiyun 	int error;
326*4882a593Smuzhiyun 
327*4882a593Smuzhiyun 	write.reg = cpu_to_be32(reg);
328*4882a593Smuzhiyun 	write.len = cpu_to_be32(len);
329*4882a593Smuzhiyun 	memcpy(write.data, data, len);
330*4882a593Smuzhiyun 
331*4882a593Smuzhiyun 	/* properly handle the case where len is zero (reset) */
332*4882a593Smuzhiyun 	error = ar5523_cmd_write(ar, WDCMSG_TARGET_SET_CONFIG, &write,
333*4882a593Smuzhiyun 	    (len == 0) ? sizeof(u32) : 2 * sizeof(u32) + len, 0);
334*4882a593Smuzhiyun 	if (error != 0)
335*4882a593Smuzhiyun 		ar5523_err(ar, "could not write %d bytes to register 0x%02x\n",
336*4882a593Smuzhiyun 			   len, reg);
337*4882a593Smuzhiyun 	return error;
338*4882a593Smuzhiyun }
339*4882a593Smuzhiyun 
ar5523_get_status(struct ar5523 * ar,u32 which,void * odata,int olen)340*4882a593Smuzhiyun static int ar5523_get_status(struct ar5523 *ar, u32 which, void *odata,
341*4882a593Smuzhiyun 			     int olen)
342*4882a593Smuzhiyun {
343*4882a593Smuzhiyun 	int error;
344*4882a593Smuzhiyun 	__be32 which_be;
345*4882a593Smuzhiyun 
346*4882a593Smuzhiyun 	which_be = cpu_to_be32(which);
347*4882a593Smuzhiyun 	error = ar5523_cmd_read(ar, WDCMSG_TARGET_GET_STATUS,
348*4882a593Smuzhiyun 	    &which_be, sizeof(which_be), odata, olen, AR5523_CMD_FLAG_MAGIC);
349*4882a593Smuzhiyun 	if (error != 0)
350*4882a593Smuzhiyun 		ar5523_err(ar, "could not read EEPROM offset 0x%02x\n", which);
351*4882a593Smuzhiyun 	return error;
352*4882a593Smuzhiyun }
353*4882a593Smuzhiyun 
ar5523_get_capability(struct ar5523 * ar,u32 cap,u32 * val)354*4882a593Smuzhiyun static int ar5523_get_capability(struct ar5523 *ar, u32 cap, u32 *val)
355*4882a593Smuzhiyun {
356*4882a593Smuzhiyun 	int error;
357*4882a593Smuzhiyun 	__be32 cap_be, val_be;
358*4882a593Smuzhiyun 
359*4882a593Smuzhiyun 	cap_be = cpu_to_be32(cap);
360*4882a593Smuzhiyun 	error = ar5523_cmd_read(ar, WDCMSG_TARGET_GET_CAPABILITY, &cap_be,
361*4882a593Smuzhiyun 				sizeof(cap_be), &val_be, sizeof(__be32),
362*4882a593Smuzhiyun 				AR5523_CMD_FLAG_MAGIC);
363*4882a593Smuzhiyun 	if (error != 0) {
364*4882a593Smuzhiyun 		ar5523_err(ar, "could not read capability %u\n", cap);
365*4882a593Smuzhiyun 		return error;
366*4882a593Smuzhiyun 	}
367*4882a593Smuzhiyun 	*val = be32_to_cpu(val_be);
368*4882a593Smuzhiyun 	return error;
369*4882a593Smuzhiyun }
370*4882a593Smuzhiyun 
ar5523_get_devcap(struct ar5523 * ar)371*4882a593Smuzhiyun static int ar5523_get_devcap(struct ar5523 *ar)
372*4882a593Smuzhiyun {
373*4882a593Smuzhiyun #define	GETCAP(x) do {				\
374*4882a593Smuzhiyun 	error = ar5523_get_capability(ar, x, &cap);		\
375*4882a593Smuzhiyun 	if (error != 0)					\
376*4882a593Smuzhiyun 		return error;				\
377*4882a593Smuzhiyun 	ar5523_info(ar, "Cap: "			\
378*4882a593Smuzhiyun 	    "%s=0x%08x\n", #x, cap);	\
379*4882a593Smuzhiyun } while (0)
380*4882a593Smuzhiyun 	int error;
381*4882a593Smuzhiyun 	u32 cap;
382*4882a593Smuzhiyun 
383*4882a593Smuzhiyun 	/* collect device capabilities */
384*4882a593Smuzhiyun 	GETCAP(CAP_TARGET_VERSION);
385*4882a593Smuzhiyun 	GETCAP(CAP_TARGET_REVISION);
386*4882a593Smuzhiyun 	GETCAP(CAP_MAC_VERSION);
387*4882a593Smuzhiyun 	GETCAP(CAP_MAC_REVISION);
388*4882a593Smuzhiyun 	GETCAP(CAP_PHY_REVISION);
389*4882a593Smuzhiyun 	GETCAP(CAP_ANALOG_5GHz_REVISION);
390*4882a593Smuzhiyun 	GETCAP(CAP_ANALOG_2GHz_REVISION);
391*4882a593Smuzhiyun 
392*4882a593Smuzhiyun 	GETCAP(CAP_REG_DOMAIN);
393*4882a593Smuzhiyun 	GETCAP(CAP_REG_CAP_BITS);
394*4882a593Smuzhiyun 	GETCAP(CAP_WIRELESS_MODES);
395*4882a593Smuzhiyun 	GETCAP(CAP_CHAN_SPREAD_SUPPORT);
396*4882a593Smuzhiyun 	GETCAP(CAP_COMPRESS_SUPPORT);
397*4882a593Smuzhiyun 	GETCAP(CAP_BURST_SUPPORT);
398*4882a593Smuzhiyun 	GETCAP(CAP_FAST_FRAMES_SUPPORT);
399*4882a593Smuzhiyun 	GETCAP(CAP_CHAP_TUNING_SUPPORT);
400*4882a593Smuzhiyun 	GETCAP(CAP_TURBOG_SUPPORT);
401*4882a593Smuzhiyun 	GETCAP(CAP_TURBO_PRIME_SUPPORT);
402*4882a593Smuzhiyun 	GETCAP(CAP_DEVICE_TYPE);
403*4882a593Smuzhiyun 	GETCAP(CAP_WME_SUPPORT);
404*4882a593Smuzhiyun 	GETCAP(CAP_TOTAL_QUEUES);
405*4882a593Smuzhiyun 	GETCAP(CAP_CONNECTION_ID_MAX);
406*4882a593Smuzhiyun 
407*4882a593Smuzhiyun 	GETCAP(CAP_LOW_5GHZ_CHAN);
408*4882a593Smuzhiyun 	GETCAP(CAP_HIGH_5GHZ_CHAN);
409*4882a593Smuzhiyun 	GETCAP(CAP_LOW_2GHZ_CHAN);
410*4882a593Smuzhiyun 	GETCAP(CAP_HIGH_2GHZ_CHAN);
411*4882a593Smuzhiyun 	GETCAP(CAP_TWICE_ANTENNAGAIN_5G);
412*4882a593Smuzhiyun 	GETCAP(CAP_TWICE_ANTENNAGAIN_2G);
413*4882a593Smuzhiyun 
414*4882a593Smuzhiyun 	GETCAP(CAP_CIPHER_AES_CCM);
415*4882a593Smuzhiyun 	GETCAP(CAP_CIPHER_TKIP);
416*4882a593Smuzhiyun 	GETCAP(CAP_MIC_TKIP);
417*4882a593Smuzhiyun 	return 0;
418*4882a593Smuzhiyun }
419*4882a593Smuzhiyun 
ar5523_set_ledsteady(struct ar5523 * ar,int lednum,int ledmode)420*4882a593Smuzhiyun static int ar5523_set_ledsteady(struct ar5523 *ar, int lednum, int ledmode)
421*4882a593Smuzhiyun {
422*4882a593Smuzhiyun 	struct ar5523_cmd_ledsteady led;
423*4882a593Smuzhiyun 
424*4882a593Smuzhiyun 	led.lednum = cpu_to_be32(lednum);
425*4882a593Smuzhiyun 	led.ledmode = cpu_to_be32(ledmode);
426*4882a593Smuzhiyun 
427*4882a593Smuzhiyun 	ar5523_dbg(ar, "set %s led %s (steady)\n",
428*4882a593Smuzhiyun 		   (lednum == UATH_LED_LINK) ? "link" : "activity",
429*4882a593Smuzhiyun 		   ledmode ? "on" : "off");
430*4882a593Smuzhiyun 	return ar5523_cmd_write(ar, WDCMSG_SET_LED_STEADY, &led, sizeof(led),
431*4882a593Smuzhiyun 				 0);
432*4882a593Smuzhiyun }
433*4882a593Smuzhiyun 
ar5523_set_rxfilter(struct ar5523 * ar,u32 bits,u32 op)434*4882a593Smuzhiyun static int ar5523_set_rxfilter(struct ar5523 *ar, u32 bits, u32 op)
435*4882a593Smuzhiyun {
436*4882a593Smuzhiyun 	struct ar5523_cmd_rx_filter rxfilter;
437*4882a593Smuzhiyun 
438*4882a593Smuzhiyun 	rxfilter.bits = cpu_to_be32(bits);
439*4882a593Smuzhiyun 	rxfilter.op = cpu_to_be32(op);
440*4882a593Smuzhiyun 
441*4882a593Smuzhiyun 	ar5523_dbg(ar, "setting Rx filter=0x%x flags=0x%x\n", bits, op);
442*4882a593Smuzhiyun 	return ar5523_cmd_write(ar, WDCMSG_RX_FILTER, &rxfilter,
443*4882a593Smuzhiyun 				 sizeof(rxfilter), 0);
444*4882a593Smuzhiyun }
445*4882a593Smuzhiyun 
ar5523_reset_tx_queues(struct ar5523 * ar)446*4882a593Smuzhiyun static int ar5523_reset_tx_queues(struct ar5523 *ar)
447*4882a593Smuzhiyun {
448*4882a593Smuzhiyun 	__be32 qid = cpu_to_be32(0);
449*4882a593Smuzhiyun 
450*4882a593Smuzhiyun 	ar5523_dbg(ar, "resetting Tx queue\n");
451*4882a593Smuzhiyun 	return ar5523_cmd_write(ar, WDCMSG_RELEASE_TX_QUEUE,
452*4882a593Smuzhiyun 				 &qid, sizeof(qid), 0);
453*4882a593Smuzhiyun }
454*4882a593Smuzhiyun 
ar5523_set_chan(struct ar5523 * ar)455*4882a593Smuzhiyun static int ar5523_set_chan(struct ar5523 *ar)
456*4882a593Smuzhiyun {
457*4882a593Smuzhiyun 	struct ieee80211_conf *conf = &ar->hw->conf;
458*4882a593Smuzhiyun 
459*4882a593Smuzhiyun 	struct ar5523_cmd_reset reset;
460*4882a593Smuzhiyun 
461*4882a593Smuzhiyun 	memset(&reset, 0, sizeof(reset));
462*4882a593Smuzhiyun 	reset.flags |= cpu_to_be32(UATH_CHAN_2GHZ);
463*4882a593Smuzhiyun 	reset.flags |= cpu_to_be32(UATH_CHAN_OFDM);
464*4882a593Smuzhiyun 	reset.freq = cpu_to_be32(conf->chandef.chan->center_freq);
465*4882a593Smuzhiyun 	reset.maxrdpower = cpu_to_be32(50);	/* XXX */
466*4882a593Smuzhiyun 	reset.channelchange = cpu_to_be32(1);
467*4882a593Smuzhiyun 	reset.keeprccontent = cpu_to_be32(0);
468*4882a593Smuzhiyun 
469*4882a593Smuzhiyun 	ar5523_dbg(ar, "set chan flags 0x%x freq %d\n",
470*4882a593Smuzhiyun 		   be32_to_cpu(reset.flags),
471*4882a593Smuzhiyun 		   conf->chandef.chan->center_freq);
472*4882a593Smuzhiyun 	return ar5523_cmd_write(ar, WDCMSG_RESET, &reset, sizeof(reset), 0);
473*4882a593Smuzhiyun }
474*4882a593Smuzhiyun 
ar5523_queue_init(struct ar5523 * ar)475*4882a593Smuzhiyun static int ar5523_queue_init(struct ar5523 *ar)
476*4882a593Smuzhiyun {
477*4882a593Smuzhiyun 	struct ar5523_cmd_txq_setup qinfo;
478*4882a593Smuzhiyun 
479*4882a593Smuzhiyun 	ar5523_dbg(ar, "setting up Tx queue\n");
480*4882a593Smuzhiyun 	qinfo.qid	     = cpu_to_be32(0);
481*4882a593Smuzhiyun 	qinfo.len	     = cpu_to_be32(sizeof(qinfo.attr));
482*4882a593Smuzhiyun 	qinfo.attr.priority  = cpu_to_be32(0);	/* XXX */
483*4882a593Smuzhiyun 	qinfo.attr.aifs	     = cpu_to_be32(3);
484*4882a593Smuzhiyun 	qinfo.attr.logcwmin  = cpu_to_be32(4);
485*4882a593Smuzhiyun 	qinfo.attr.logcwmax  = cpu_to_be32(10);
486*4882a593Smuzhiyun 	qinfo.attr.bursttime = cpu_to_be32(0);
487*4882a593Smuzhiyun 	qinfo.attr.mode	     = cpu_to_be32(0);
488*4882a593Smuzhiyun 	qinfo.attr.qflags    = cpu_to_be32(1);	/* XXX? */
489*4882a593Smuzhiyun 	return ar5523_cmd_write(ar, WDCMSG_SETUP_TX_QUEUE, &qinfo,
490*4882a593Smuzhiyun 				 sizeof(qinfo), 0);
491*4882a593Smuzhiyun }
492*4882a593Smuzhiyun 
ar5523_switch_chan(struct ar5523 * ar)493*4882a593Smuzhiyun static int ar5523_switch_chan(struct ar5523 *ar)
494*4882a593Smuzhiyun {
495*4882a593Smuzhiyun 	int error;
496*4882a593Smuzhiyun 
497*4882a593Smuzhiyun 	error = ar5523_set_chan(ar);
498*4882a593Smuzhiyun 	if (error) {
499*4882a593Smuzhiyun 		ar5523_err(ar, "could not set chan, error %d\n", error);
500*4882a593Smuzhiyun 		goto out_err;
501*4882a593Smuzhiyun 	}
502*4882a593Smuzhiyun 
503*4882a593Smuzhiyun 	/* reset Tx rings */
504*4882a593Smuzhiyun 	error = ar5523_reset_tx_queues(ar);
505*4882a593Smuzhiyun 	if (error) {
506*4882a593Smuzhiyun 		ar5523_err(ar, "could not reset Tx queues, error %d\n",
507*4882a593Smuzhiyun 			   error);
508*4882a593Smuzhiyun 		goto out_err;
509*4882a593Smuzhiyun 	}
510*4882a593Smuzhiyun 	/* set Tx rings WME properties */
511*4882a593Smuzhiyun 	error = ar5523_queue_init(ar);
512*4882a593Smuzhiyun 	if (error)
513*4882a593Smuzhiyun 		ar5523_err(ar, "could not init wme, error %d\n", error);
514*4882a593Smuzhiyun 
515*4882a593Smuzhiyun out_err:
516*4882a593Smuzhiyun 	return error;
517*4882a593Smuzhiyun }
518*4882a593Smuzhiyun 
ar5523_rx_data_put(struct ar5523 * ar,struct ar5523_rx_data * data)519*4882a593Smuzhiyun static void ar5523_rx_data_put(struct ar5523 *ar,
520*4882a593Smuzhiyun 				struct ar5523_rx_data *data)
521*4882a593Smuzhiyun {
522*4882a593Smuzhiyun 	unsigned long flags;
523*4882a593Smuzhiyun 	spin_lock_irqsave(&ar->rx_data_list_lock, flags);
524*4882a593Smuzhiyun 	list_move(&data->list, &ar->rx_data_free);
525*4882a593Smuzhiyun 	spin_unlock_irqrestore(&ar->rx_data_list_lock, flags);
526*4882a593Smuzhiyun }
527*4882a593Smuzhiyun 
ar5523_data_rx_cb(struct urb * urb)528*4882a593Smuzhiyun static void ar5523_data_rx_cb(struct urb *urb)
529*4882a593Smuzhiyun {
530*4882a593Smuzhiyun 	struct ar5523_rx_data *data = urb->context;
531*4882a593Smuzhiyun 	struct ar5523 *ar = data->ar;
532*4882a593Smuzhiyun 	struct ar5523_rx_desc *desc;
533*4882a593Smuzhiyun 	struct ar5523_chunk *chunk;
534*4882a593Smuzhiyun 	struct ieee80211_hw *hw = ar->hw;
535*4882a593Smuzhiyun 	struct ieee80211_rx_status *rx_status;
536*4882a593Smuzhiyun 	u32 rxlen;
537*4882a593Smuzhiyun 	int usblen = urb->actual_length;
538*4882a593Smuzhiyun 	int hdrlen, pad;
539*4882a593Smuzhiyun 
540*4882a593Smuzhiyun 	ar5523_dbg(ar, "%s\n", __func__);
541*4882a593Smuzhiyun 	/* sync/async unlink faults aren't errors */
542*4882a593Smuzhiyun 	if (urb->status) {
543*4882a593Smuzhiyun 		if (urb->status != -ESHUTDOWN)
544*4882a593Smuzhiyun 			ar5523_err(ar, "%s: USB err: %d\n", __func__,
545*4882a593Smuzhiyun 				   urb->status);
546*4882a593Smuzhiyun 		goto skip;
547*4882a593Smuzhiyun 	}
548*4882a593Smuzhiyun 
549*4882a593Smuzhiyun 	if (usblen < AR5523_MIN_RXBUFSZ) {
550*4882a593Smuzhiyun 		ar5523_err(ar, "RX: wrong xfer size (usblen=%d)\n", usblen);
551*4882a593Smuzhiyun 		goto skip;
552*4882a593Smuzhiyun 	}
553*4882a593Smuzhiyun 
554*4882a593Smuzhiyun 	chunk = (struct ar5523_chunk *) data->skb->data;
555*4882a593Smuzhiyun 
556*4882a593Smuzhiyun 	if (((chunk->flags & UATH_CFLAGS_FINAL) == 0) ||
557*4882a593Smuzhiyun 		chunk->seqnum != 0) {
558*4882a593Smuzhiyun 		ar5523_dbg(ar, "RX: No final flag. s: %d f: %02x l: %d\n",
559*4882a593Smuzhiyun 			   chunk->seqnum, chunk->flags,
560*4882a593Smuzhiyun 			   be16_to_cpu(chunk->length));
561*4882a593Smuzhiyun 		goto skip;
562*4882a593Smuzhiyun 	}
563*4882a593Smuzhiyun 
564*4882a593Smuzhiyun 	/* Rx descriptor is located at the end, 32-bit aligned */
565*4882a593Smuzhiyun 	desc = (struct ar5523_rx_desc *)
566*4882a593Smuzhiyun 		(data->skb->data + usblen - sizeof(struct ar5523_rx_desc));
567*4882a593Smuzhiyun 
568*4882a593Smuzhiyun 	rxlen = be32_to_cpu(desc->len);
569*4882a593Smuzhiyun 	if (rxlen > ar->rxbufsz) {
570*4882a593Smuzhiyun 		ar5523_dbg(ar, "RX: Bad descriptor (len=%d)\n",
571*4882a593Smuzhiyun 			   be32_to_cpu(desc->len));
572*4882a593Smuzhiyun 		goto skip;
573*4882a593Smuzhiyun 	}
574*4882a593Smuzhiyun 
575*4882a593Smuzhiyun 	if (!rxlen) {
576*4882a593Smuzhiyun 		ar5523_dbg(ar, "RX: rxlen is 0\n");
577*4882a593Smuzhiyun 		goto skip;
578*4882a593Smuzhiyun 	}
579*4882a593Smuzhiyun 
580*4882a593Smuzhiyun 	if (be32_to_cpu(desc->status) != 0) {
581*4882a593Smuzhiyun 		ar5523_dbg(ar, "Bad RX status (0x%x len = %d). Skip\n",
582*4882a593Smuzhiyun 			   be32_to_cpu(desc->status), be32_to_cpu(desc->len));
583*4882a593Smuzhiyun 		goto skip;
584*4882a593Smuzhiyun 	}
585*4882a593Smuzhiyun 
586*4882a593Smuzhiyun 	skb_reserve(data->skb, sizeof(*chunk));
587*4882a593Smuzhiyun 	skb_put(data->skb, rxlen - sizeof(struct ar5523_rx_desc));
588*4882a593Smuzhiyun 
589*4882a593Smuzhiyun 	hdrlen = ieee80211_get_hdrlen_from_skb(data->skb);
590*4882a593Smuzhiyun 	if (!IS_ALIGNED(hdrlen, 4)) {
591*4882a593Smuzhiyun 		ar5523_dbg(ar, "eek, alignment workaround activated\n");
592*4882a593Smuzhiyun 		pad = ALIGN(hdrlen, 4) - hdrlen;
593*4882a593Smuzhiyun 		memmove(data->skb->data + pad, data->skb->data, hdrlen);
594*4882a593Smuzhiyun 		skb_pull(data->skb, pad);
595*4882a593Smuzhiyun 		skb_put(data->skb, pad);
596*4882a593Smuzhiyun 	}
597*4882a593Smuzhiyun 
598*4882a593Smuzhiyun 	rx_status = IEEE80211_SKB_RXCB(data->skb);
599*4882a593Smuzhiyun 	memset(rx_status, 0, sizeof(*rx_status));
600*4882a593Smuzhiyun 	rx_status->freq = be32_to_cpu(desc->channel);
601*4882a593Smuzhiyun 	rx_status->band = hw->conf.chandef.chan->band;
602*4882a593Smuzhiyun 	rx_status->signal = -95 + be32_to_cpu(desc->rssi);
603*4882a593Smuzhiyun 
604*4882a593Smuzhiyun 	ieee80211_rx_irqsafe(hw, data->skb);
605*4882a593Smuzhiyun 	data->skb = NULL;
606*4882a593Smuzhiyun 
607*4882a593Smuzhiyun skip:
608*4882a593Smuzhiyun 	if (data->skb) {
609*4882a593Smuzhiyun 		dev_kfree_skb_irq(data->skb);
610*4882a593Smuzhiyun 		data->skb = NULL;
611*4882a593Smuzhiyun 	}
612*4882a593Smuzhiyun 
613*4882a593Smuzhiyun 	ar5523_rx_data_put(ar, data);
614*4882a593Smuzhiyun 	if (atomic_inc_return(&ar->rx_data_free_cnt) >=
615*4882a593Smuzhiyun 	    AR5523_RX_DATA_REFILL_COUNT &&
616*4882a593Smuzhiyun 	    test_bit(AR5523_HW_UP, &ar->flags))
617*4882a593Smuzhiyun 		queue_work(ar->wq, &ar->rx_refill_work);
618*4882a593Smuzhiyun }
619*4882a593Smuzhiyun 
ar5523_rx_refill_work(struct work_struct * work)620*4882a593Smuzhiyun static void ar5523_rx_refill_work(struct work_struct *work)
621*4882a593Smuzhiyun {
622*4882a593Smuzhiyun 	struct ar5523 *ar = container_of(work, struct ar5523, rx_refill_work);
623*4882a593Smuzhiyun 	struct ar5523_rx_data *data;
624*4882a593Smuzhiyun 	unsigned long flags;
625*4882a593Smuzhiyun 	int error;
626*4882a593Smuzhiyun 
627*4882a593Smuzhiyun 	ar5523_dbg(ar, "%s\n", __func__);
628*4882a593Smuzhiyun 	do {
629*4882a593Smuzhiyun 		spin_lock_irqsave(&ar->rx_data_list_lock, flags);
630*4882a593Smuzhiyun 
631*4882a593Smuzhiyun 		if (!list_empty(&ar->rx_data_free))
632*4882a593Smuzhiyun 			data = (struct ar5523_rx_data *) ar->rx_data_free.next;
633*4882a593Smuzhiyun 		else
634*4882a593Smuzhiyun 			data = NULL;
635*4882a593Smuzhiyun 		spin_unlock_irqrestore(&ar->rx_data_list_lock, flags);
636*4882a593Smuzhiyun 
637*4882a593Smuzhiyun 		if (!data)
638*4882a593Smuzhiyun 			goto done;
639*4882a593Smuzhiyun 
640*4882a593Smuzhiyun 		data->skb = alloc_skb(ar->rxbufsz, GFP_KERNEL);
641*4882a593Smuzhiyun 		if (!data->skb) {
642*4882a593Smuzhiyun 			ar5523_err(ar, "could not allocate rx skbuff\n");
643*4882a593Smuzhiyun 			return;
644*4882a593Smuzhiyun 		}
645*4882a593Smuzhiyun 
646*4882a593Smuzhiyun 		usb_fill_bulk_urb(data->urb, ar->dev,
647*4882a593Smuzhiyun 				  ar5523_data_rx_pipe(ar->dev), data->skb->data,
648*4882a593Smuzhiyun 				  ar->rxbufsz, ar5523_data_rx_cb, data);
649*4882a593Smuzhiyun 
650*4882a593Smuzhiyun 		spin_lock_irqsave(&ar->rx_data_list_lock, flags);
651*4882a593Smuzhiyun 		list_move(&data->list, &ar->rx_data_used);
652*4882a593Smuzhiyun 		spin_unlock_irqrestore(&ar->rx_data_list_lock, flags);
653*4882a593Smuzhiyun 		atomic_dec(&ar->rx_data_free_cnt);
654*4882a593Smuzhiyun 
655*4882a593Smuzhiyun 		error = usb_submit_urb(data->urb, GFP_KERNEL);
656*4882a593Smuzhiyun 		if (error) {
657*4882a593Smuzhiyun 			kfree_skb(data->skb);
658*4882a593Smuzhiyun 			if (error != -ENODEV)
659*4882a593Smuzhiyun 				ar5523_err(ar, "Err sending rx data urb %d\n",
660*4882a593Smuzhiyun 					   error);
661*4882a593Smuzhiyun 			ar5523_rx_data_put(ar, data);
662*4882a593Smuzhiyun 			atomic_inc(&ar->rx_data_free_cnt);
663*4882a593Smuzhiyun 			return;
664*4882a593Smuzhiyun 		}
665*4882a593Smuzhiyun 
666*4882a593Smuzhiyun 	} while (true);
667*4882a593Smuzhiyun done:
668*4882a593Smuzhiyun 	return;
669*4882a593Smuzhiyun }
670*4882a593Smuzhiyun 
ar5523_cancel_rx_bufs(struct ar5523 * ar)671*4882a593Smuzhiyun static void ar5523_cancel_rx_bufs(struct ar5523 *ar)
672*4882a593Smuzhiyun {
673*4882a593Smuzhiyun 	struct ar5523_rx_data *data;
674*4882a593Smuzhiyun 	unsigned long flags;
675*4882a593Smuzhiyun 
676*4882a593Smuzhiyun 	do {
677*4882a593Smuzhiyun 		spin_lock_irqsave(&ar->rx_data_list_lock, flags);
678*4882a593Smuzhiyun 		if (!list_empty(&ar->rx_data_used))
679*4882a593Smuzhiyun 			data = (struct ar5523_rx_data *) ar->rx_data_used.next;
680*4882a593Smuzhiyun 		else
681*4882a593Smuzhiyun 			data = NULL;
682*4882a593Smuzhiyun 		spin_unlock_irqrestore(&ar->rx_data_list_lock, flags);
683*4882a593Smuzhiyun 
684*4882a593Smuzhiyun 		if (!data)
685*4882a593Smuzhiyun 			break;
686*4882a593Smuzhiyun 
687*4882a593Smuzhiyun 		usb_kill_urb(data->urb);
688*4882a593Smuzhiyun 		list_move(&data->list, &ar->rx_data_free);
689*4882a593Smuzhiyun 		atomic_inc(&ar->rx_data_free_cnt);
690*4882a593Smuzhiyun 	} while (data);
691*4882a593Smuzhiyun }
692*4882a593Smuzhiyun 
ar5523_free_rx_bufs(struct ar5523 * ar)693*4882a593Smuzhiyun static void ar5523_free_rx_bufs(struct ar5523 *ar)
694*4882a593Smuzhiyun {
695*4882a593Smuzhiyun 	struct ar5523_rx_data *data;
696*4882a593Smuzhiyun 
697*4882a593Smuzhiyun 	ar5523_cancel_rx_bufs(ar);
698*4882a593Smuzhiyun 	while (!list_empty(&ar->rx_data_free)) {
699*4882a593Smuzhiyun 		data = (struct ar5523_rx_data *) ar->rx_data_free.next;
700*4882a593Smuzhiyun 		list_del(&data->list);
701*4882a593Smuzhiyun 		usb_free_urb(data->urb);
702*4882a593Smuzhiyun 	}
703*4882a593Smuzhiyun }
704*4882a593Smuzhiyun 
ar5523_alloc_rx_bufs(struct ar5523 * ar)705*4882a593Smuzhiyun static int ar5523_alloc_rx_bufs(struct ar5523 *ar)
706*4882a593Smuzhiyun {
707*4882a593Smuzhiyun 	int i;
708*4882a593Smuzhiyun 
709*4882a593Smuzhiyun 	for (i = 0; i < AR5523_RX_DATA_COUNT; i++) {
710*4882a593Smuzhiyun 		struct ar5523_rx_data *data = &ar->rx_data[i];
711*4882a593Smuzhiyun 
712*4882a593Smuzhiyun 		data->ar = ar;
713*4882a593Smuzhiyun 		data->urb = usb_alloc_urb(0, GFP_KERNEL);
714*4882a593Smuzhiyun 		if (!data->urb)
715*4882a593Smuzhiyun 			goto err;
716*4882a593Smuzhiyun 		list_add_tail(&data->list, &ar->rx_data_free);
717*4882a593Smuzhiyun 		atomic_inc(&ar->rx_data_free_cnt);
718*4882a593Smuzhiyun 	}
719*4882a593Smuzhiyun 	return 0;
720*4882a593Smuzhiyun 
721*4882a593Smuzhiyun err:
722*4882a593Smuzhiyun 	ar5523_free_rx_bufs(ar);
723*4882a593Smuzhiyun 	return -ENOMEM;
724*4882a593Smuzhiyun }
725*4882a593Smuzhiyun 
ar5523_data_tx_pkt_put(struct ar5523 * ar)726*4882a593Smuzhiyun static void ar5523_data_tx_pkt_put(struct ar5523 *ar)
727*4882a593Smuzhiyun {
728*4882a593Smuzhiyun 	atomic_dec(&ar->tx_nr_total);
729*4882a593Smuzhiyun 	if (!atomic_dec_return(&ar->tx_nr_pending)) {
730*4882a593Smuzhiyun 		del_timer(&ar->tx_wd_timer);
731*4882a593Smuzhiyun 		wake_up(&ar->tx_flush_waitq);
732*4882a593Smuzhiyun 	}
733*4882a593Smuzhiyun 
734*4882a593Smuzhiyun 	if (atomic_read(&ar->tx_nr_total) < AR5523_TX_DATA_RESTART_COUNT) {
735*4882a593Smuzhiyun 		ar5523_dbg(ar, "restart tx queue\n");
736*4882a593Smuzhiyun 		ieee80211_wake_queues(ar->hw);
737*4882a593Smuzhiyun 	}
738*4882a593Smuzhiyun }
739*4882a593Smuzhiyun 
ar5523_data_tx_cb(struct urb * urb)740*4882a593Smuzhiyun static void ar5523_data_tx_cb(struct urb *urb)
741*4882a593Smuzhiyun {
742*4882a593Smuzhiyun 	struct sk_buff *skb = urb->context;
743*4882a593Smuzhiyun 	struct ieee80211_tx_info *txi = IEEE80211_SKB_CB(skb);
744*4882a593Smuzhiyun 	struct ar5523_tx_data *data = (struct ar5523_tx_data *)
745*4882a593Smuzhiyun 				       txi->driver_data;
746*4882a593Smuzhiyun 	struct ar5523 *ar = data->ar;
747*4882a593Smuzhiyun 	unsigned long flags;
748*4882a593Smuzhiyun 
749*4882a593Smuzhiyun 	ar5523_dbg(ar, "data tx urb completed: %d\n", urb->status);
750*4882a593Smuzhiyun 
751*4882a593Smuzhiyun 	spin_lock_irqsave(&ar->tx_data_list_lock, flags);
752*4882a593Smuzhiyun 	list_del(&data->list);
753*4882a593Smuzhiyun 	spin_unlock_irqrestore(&ar->tx_data_list_lock, flags);
754*4882a593Smuzhiyun 
755*4882a593Smuzhiyun 	if (urb->status) {
756*4882a593Smuzhiyun 		ar5523_dbg(ar, "%s: urb status: %d\n", __func__, urb->status);
757*4882a593Smuzhiyun 		ar5523_data_tx_pkt_put(ar);
758*4882a593Smuzhiyun 		ieee80211_free_txskb(ar->hw, skb);
759*4882a593Smuzhiyun 	} else {
760*4882a593Smuzhiyun 		skb_pull(skb, sizeof(struct ar5523_tx_desc) + sizeof(__be32));
761*4882a593Smuzhiyun 		ieee80211_tx_status_irqsafe(ar->hw, skb);
762*4882a593Smuzhiyun 	}
763*4882a593Smuzhiyun 	usb_free_urb(urb);
764*4882a593Smuzhiyun }
765*4882a593Smuzhiyun 
ar5523_tx(struct ieee80211_hw * hw,struct ieee80211_tx_control * control,struct sk_buff * skb)766*4882a593Smuzhiyun static void ar5523_tx(struct ieee80211_hw *hw,
767*4882a593Smuzhiyun 		       struct ieee80211_tx_control *control,
768*4882a593Smuzhiyun 		       struct sk_buff *skb)
769*4882a593Smuzhiyun {
770*4882a593Smuzhiyun 	struct ieee80211_tx_info *txi = IEEE80211_SKB_CB(skb);
771*4882a593Smuzhiyun 	struct ar5523_tx_data *data = (struct ar5523_tx_data *)
772*4882a593Smuzhiyun 					txi->driver_data;
773*4882a593Smuzhiyun 	struct ar5523 *ar = hw->priv;
774*4882a593Smuzhiyun 	unsigned long flags;
775*4882a593Smuzhiyun 
776*4882a593Smuzhiyun 	ar5523_dbg(ar, "tx called\n");
777*4882a593Smuzhiyun 	if (atomic_inc_return(&ar->tx_nr_total) >= AR5523_TX_DATA_COUNT) {
778*4882a593Smuzhiyun 		ar5523_dbg(ar, "tx queue full\n");
779*4882a593Smuzhiyun 		ar5523_dbg(ar, "stop queues (tot %d pend %d)\n",
780*4882a593Smuzhiyun 			   atomic_read(&ar->tx_nr_total),
781*4882a593Smuzhiyun 			   atomic_read(&ar->tx_nr_pending));
782*4882a593Smuzhiyun 		ieee80211_stop_queues(hw);
783*4882a593Smuzhiyun 	}
784*4882a593Smuzhiyun 
785*4882a593Smuzhiyun 	spin_lock_irqsave(&ar->tx_data_list_lock, flags);
786*4882a593Smuzhiyun 	list_add_tail(&data->list, &ar->tx_queue_pending);
787*4882a593Smuzhiyun 	spin_unlock_irqrestore(&ar->tx_data_list_lock, flags);
788*4882a593Smuzhiyun 
789*4882a593Smuzhiyun 	ieee80211_queue_work(ar->hw, &ar->tx_work);
790*4882a593Smuzhiyun }
791*4882a593Smuzhiyun 
ar5523_tx_work_locked(struct ar5523 * ar)792*4882a593Smuzhiyun static void ar5523_tx_work_locked(struct ar5523 *ar)
793*4882a593Smuzhiyun {
794*4882a593Smuzhiyun 	struct ar5523_tx_data *data;
795*4882a593Smuzhiyun 	struct ar5523_tx_desc *desc;
796*4882a593Smuzhiyun 	struct ar5523_chunk *chunk;
797*4882a593Smuzhiyun 	struct ieee80211_tx_info *txi;
798*4882a593Smuzhiyun 	struct urb *urb;
799*4882a593Smuzhiyun 	struct sk_buff *skb;
800*4882a593Smuzhiyun 	int error = 0, paylen;
801*4882a593Smuzhiyun 	u32 txqid;
802*4882a593Smuzhiyun 	unsigned long flags;
803*4882a593Smuzhiyun 
804*4882a593Smuzhiyun 	BUILD_BUG_ON(sizeof(struct ar5523_tx_data) >
805*4882a593Smuzhiyun 		     IEEE80211_TX_INFO_DRIVER_DATA_SIZE);
806*4882a593Smuzhiyun 
807*4882a593Smuzhiyun 	ar5523_dbg(ar, "%s\n", __func__);
808*4882a593Smuzhiyun 	do {
809*4882a593Smuzhiyun 		spin_lock_irqsave(&ar->tx_data_list_lock, flags);
810*4882a593Smuzhiyun 		if (!list_empty(&ar->tx_queue_pending)) {
811*4882a593Smuzhiyun 			data = (struct ar5523_tx_data *)
812*4882a593Smuzhiyun 				ar->tx_queue_pending.next;
813*4882a593Smuzhiyun 			list_del(&data->list);
814*4882a593Smuzhiyun 		} else
815*4882a593Smuzhiyun 			data = NULL;
816*4882a593Smuzhiyun 		spin_unlock_irqrestore(&ar->tx_data_list_lock, flags);
817*4882a593Smuzhiyun 
818*4882a593Smuzhiyun 		if (!data)
819*4882a593Smuzhiyun 			break;
820*4882a593Smuzhiyun 
821*4882a593Smuzhiyun 		txi = container_of((void *)data, struct ieee80211_tx_info,
822*4882a593Smuzhiyun 				   driver_data);
823*4882a593Smuzhiyun 		txqid = 0;
824*4882a593Smuzhiyun 
825*4882a593Smuzhiyun 		skb = container_of((void *)txi, struct sk_buff, cb);
826*4882a593Smuzhiyun 		paylen = skb->len;
827*4882a593Smuzhiyun 
828*4882a593Smuzhiyun 		urb = usb_alloc_urb(0, GFP_KERNEL);
829*4882a593Smuzhiyun 		if (!urb) {
830*4882a593Smuzhiyun 			ieee80211_free_txskb(ar->hw, skb);
831*4882a593Smuzhiyun 			continue;
832*4882a593Smuzhiyun 		}
833*4882a593Smuzhiyun 
834*4882a593Smuzhiyun 		data->ar = ar;
835*4882a593Smuzhiyun 		data->urb = urb;
836*4882a593Smuzhiyun 
837*4882a593Smuzhiyun 		desc = skb_push(skb, sizeof(*desc));
838*4882a593Smuzhiyun 		chunk = skb_push(skb, sizeof(*chunk));
839*4882a593Smuzhiyun 
840*4882a593Smuzhiyun 		chunk->seqnum = 0;
841*4882a593Smuzhiyun 		chunk->flags = UATH_CFLAGS_FINAL;
842*4882a593Smuzhiyun 		chunk->length = cpu_to_be16(skb->len);
843*4882a593Smuzhiyun 
844*4882a593Smuzhiyun 		desc->msglen = cpu_to_be32(skb->len);
845*4882a593Smuzhiyun 		desc->msgid  = AR5523_DATA_ID;
846*4882a593Smuzhiyun 		desc->buflen = cpu_to_be32(paylen);
847*4882a593Smuzhiyun 		desc->type   = cpu_to_be32(WDCMSG_SEND);
848*4882a593Smuzhiyun 		desc->flags  = cpu_to_be32(UATH_TX_NOTIFY);
849*4882a593Smuzhiyun 
850*4882a593Smuzhiyun 		if (test_bit(AR5523_CONNECTED, &ar->flags))
851*4882a593Smuzhiyun 			desc->connid = cpu_to_be32(AR5523_ID_BSS);
852*4882a593Smuzhiyun 		else
853*4882a593Smuzhiyun 			desc->connid = cpu_to_be32(AR5523_ID_BROADCAST);
854*4882a593Smuzhiyun 
855*4882a593Smuzhiyun 		if (txi->flags & IEEE80211_TX_CTL_USE_MINRATE)
856*4882a593Smuzhiyun 			txqid |= UATH_TXQID_MINRATE;
857*4882a593Smuzhiyun 
858*4882a593Smuzhiyun 		desc->txqid = cpu_to_be32(txqid);
859*4882a593Smuzhiyun 
860*4882a593Smuzhiyun 		urb->transfer_flags = URB_ZERO_PACKET;
861*4882a593Smuzhiyun 		usb_fill_bulk_urb(urb, ar->dev, ar5523_data_tx_pipe(ar->dev),
862*4882a593Smuzhiyun 				  skb->data, skb->len, ar5523_data_tx_cb, skb);
863*4882a593Smuzhiyun 
864*4882a593Smuzhiyun 		spin_lock_irqsave(&ar->tx_data_list_lock, flags);
865*4882a593Smuzhiyun 		list_add_tail(&data->list, &ar->tx_queue_submitted);
866*4882a593Smuzhiyun 		spin_unlock_irqrestore(&ar->tx_data_list_lock, flags);
867*4882a593Smuzhiyun 		mod_timer(&ar->tx_wd_timer, jiffies + AR5523_TX_WD_TIMEOUT);
868*4882a593Smuzhiyun 		atomic_inc(&ar->tx_nr_pending);
869*4882a593Smuzhiyun 
870*4882a593Smuzhiyun 		ar5523_dbg(ar, "TX Frame (%d pending)\n",
871*4882a593Smuzhiyun 			   atomic_read(&ar->tx_nr_pending));
872*4882a593Smuzhiyun 		error = usb_submit_urb(urb, GFP_KERNEL);
873*4882a593Smuzhiyun 		if (error) {
874*4882a593Smuzhiyun 			ar5523_err(ar, "error %d when submitting tx urb\n",
875*4882a593Smuzhiyun 				   error);
876*4882a593Smuzhiyun 			spin_lock_irqsave(&ar->tx_data_list_lock, flags);
877*4882a593Smuzhiyun 			list_del(&data->list);
878*4882a593Smuzhiyun 			spin_unlock_irqrestore(&ar->tx_data_list_lock, flags);
879*4882a593Smuzhiyun 			atomic_dec(&ar->tx_nr_pending);
880*4882a593Smuzhiyun 			ar5523_data_tx_pkt_put(ar);
881*4882a593Smuzhiyun 			usb_free_urb(urb);
882*4882a593Smuzhiyun 			ieee80211_free_txskb(ar->hw, skb);
883*4882a593Smuzhiyun 		}
884*4882a593Smuzhiyun 	} while (true);
885*4882a593Smuzhiyun }
886*4882a593Smuzhiyun 
ar5523_tx_work(struct work_struct * work)887*4882a593Smuzhiyun static void ar5523_tx_work(struct work_struct *work)
888*4882a593Smuzhiyun {
889*4882a593Smuzhiyun 	struct ar5523 *ar = container_of(work, struct ar5523, tx_work);
890*4882a593Smuzhiyun 
891*4882a593Smuzhiyun 	ar5523_dbg(ar, "%s\n", __func__);
892*4882a593Smuzhiyun 	mutex_lock(&ar->mutex);
893*4882a593Smuzhiyun 	ar5523_tx_work_locked(ar);
894*4882a593Smuzhiyun 	mutex_unlock(&ar->mutex);
895*4882a593Smuzhiyun }
896*4882a593Smuzhiyun 
ar5523_tx_wd_timer(struct timer_list * t)897*4882a593Smuzhiyun static void ar5523_tx_wd_timer(struct timer_list *t)
898*4882a593Smuzhiyun {
899*4882a593Smuzhiyun 	struct ar5523 *ar = from_timer(ar, t, tx_wd_timer);
900*4882a593Smuzhiyun 
901*4882a593Smuzhiyun 	ar5523_dbg(ar, "TX watchdog timer triggered\n");
902*4882a593Smuzhiyun 	ieee80211_queue_work(ar->hw, &ar->tx_wd_work);
903*4882a593Smuzhiyun }
904*4882a593Smuzhiyun 
ar5523_tx_wd_work(struct work_struct * work)905*4882a593Smuzhiyun static void ar5523_tx_wd_work(struct work_struct *work)
906*4882a593Smuzhiyun {
907*4882a593Smuzhiyun 	struct ar5523 *ar = container_of(work, struct ar5523, tx_wd_work);
908*4882a593Smuzhiyun 
909*4882a593Smuzhiyun 	/* Occasionally the TX queues stop responding. The only way to
910*4882a593Smuzhiyun 	 * recover seems to be to reset the dongle.
911*4882a593Smuzhiyun 	 */
912*4882a593Smuzhiyun 
913*4882a593Smuzhiyun 	mutex_lock(&ar->mutex);
914*4882a593Smuzhiyun 	ar5523_err(ar, "TX queue stuck (tot %d pend %d)\n",
915*4882a593Smuzhiyun 		   atomic_read(&ar->tx_nr_total),
916*4882a593Smuzhiyun 		   atomic_read(&ar->tx_nr_pending));
917*4882a593Smuzhiyun 
918*4882a593Smuzhiyun 	ar5523_err(ar, "Will restart dongle.\n");
919*4882a593Smuzhiyun 	ar5523_cmd_write(ar, WDCMSG_TARGET_RESET, NULL, 0, 0);
920*4882a593Smuzhiyun 	mutex_unlock(&ar->mutex);
921*4882a593Smuzhiyun }
922*4882a593Smuzhiyun 
ar5523_flush_tx(struct ar5523 * ar)923*4882a593Smuzhiyun static void ar5523_flush_tx(struct ar5523 *ar)
924*4882a593Smuzhiyun {
925*4882a593Smuzhiyun 	ar5523_tx_work_locked(ar);
926*4882a593Smuzhiyun 
927*4882a593Smuzhiyun 	/* Don't waste time trying to flush if USB is disconnected */
928*4882a593Smuzhiyun 	if (test_bit(AR5523_USB_DISCONNECTED, &ar->flags))
929*4882a593Smuzhiyun 		return;
930*4882a593Smuzhiyun 	if (!wait_event_timeout(ar->tx_flush_waitq,
931*4882a593Smuzhiyun 	    !atomic_read(&ar->tx_nr_pending), AR5523_FLUSH_TIMEOUT))
932*4882a593Smuzhiyun 		ar5523_err(ar, "flush timeout (tot %d pend %d)\n",
933*4882a593Smuzhiyun 			   atomic_read(&ar->tx_nr_total),
934*4882a593Smuzhiyun 			   atomic_read(&ar->tx_nr_pending));
935*4882a593Smuzhiyun }
936*4882a593Smuzhiyun 
ar5523_free_tx_cmd(struct ar5523 * ar)937*4882a593Smuzhiyun static void ar5523_free_tx_cmd(struct ar5523 *ar)
938*4882a593Smuzhiyun {
939*4882a593Smuzhiyun 	struct ar5523_tx_cmd *cmd = &ar->tx_cmd;
940*4882a593Smuzhiyun 
941*4882a593Smuzhiyun 	usb_free_coherent(ar->dev, AR5523_MAX_RXCMDSZ, cmd->buf_tx,
942*4882a593Smuzhiyun 			  cmd->urb_tx->transfer_dma);
943*4882a593Smuzhiyun 	usb_free_urb(cmd->urb_tx);
944*4882a593Smuzhiyun }
945*4882a593Smuzhiyun 
ar5523_alloc_tx_cmd(struct ar5523 * ar)946*4882a593Smuzhiyun static int ar5523_alloc_tx_cmd(struct ar5523 *ar)
947*4882a593Smuzhiyun {
948*4882a593Smuzhiyun 	struct ar5523_tx_cmd *cmd = &ar->tx_cmd;
949*4882a593Smuzhiyun 
950*4882a593Smuzhiyun 	cmd->ar = ar;
951*4882a593Smuzhiyun 	init_completion(&cmd->done);
952*4882a593Smuzhiyun 
953*4882a593Smuzhiyun 	cmd->urb_tx = usb_alloc_urb(0, GFP_KERNEL);
954*4882a593Smuzhiyun 	if (!cmd->urb_tx)
955*4882a593Smuzhiyun 		return -ENOMEM;
956*4882a593Smuzhiyun 	cmd->buf_tx = usb_alloc_coherent(ar->dev, AR5523_MAX_TXCMDSZ,
957*4882a593Smuzhiyun 					 GFP_KERNEL,
958*4882a593Smuzhiyun 					 &cmd->urb_tx->transfer_dma);
959*4882a593Smuzhiyun 	if (!cmd->buf_tx) {
960*4882a593Smuzhiyun 		usb_free_urb(cmd->urb_tx);
961*4882a593Smuzhiyun 		return -ENOMEM;
962*4882a593Smuzhiyun 	}
963*4882a593Smuzhiyun 	return 0;
964*4882a593Smuzhiyun }
965*4882a593Smuzhiyun 
966*4882a593Smuzhiyun /*
967*4882a593Smuzhiyun  * This function is called periodically (every second) when associated to
968*4882a593Smuzhiyun  * query device statistics.
969*4882a593Smuzhiyun  */
ar5523_stat_work(struct work_struct * work)970*4882a593Smuzhiyun static void ar5523_stat_work(struct work_struct *work)
971*4882a593Smuzhiyun {
972*4882a593Smuzhiyun 	struct ar5523 *ar = container_of(work, struct ar5523, stat_work.work);
973*4882a593Smuzhiyun 	int error;
974*4882a593Smuzhiyun 
975*4882a593Smuzhiyun 	ar5523_dbg(ar, "%s\n", __func__);
976*4882a593Smuzhiyun 	mutex_lock(&ar->mutex);
977*4882a593Smuzhiyun 
978*4882a593Smuzhiyun 	/*
979*4882a593Smuzhiyun 	 * Send request for statistics asynchronously once a second. This
980*4882a593Smuzhiyun 	 * seems to be important. Throughput is a lot better if this is done.
981*4882a593Smuzhiyun 	 */
982*4882a593Smuzhiyun 	error = ar5523_cmd_write(ar, WDCMSG_TARGET_GET_STATS, NULL, 0, 0);
983*4882a593Smuzhiyun 	if (error)
984*4882a593Smuzhiyun 		ar5523_err(ar, "could not query stats, error %d\n", error);
985*4882a593Smuzhiyun 	mutex_unlock(&ar->mutex);
986*4882a593Smuzhiyun 	ieee80211_queue_delayed_work(ar->hw, &ar->stat_work, HZ);
987*4882a593Smuzhiyun }
988*4882a593Smuzhiyun 
989*4882a593Smuzhiyun /*
990*4882a593Smuzhiyun  * Interface routines to the mac80211 stack.
991*4882a593Smuzhiyun  */
ar5523_start(struct ieee80211_hw * hw)992*4882a593Smuzhiyun static int ar5523_start(struct ieee80211_hw *hw)
993*4882a593Smuzhiyun {
994*4882a593Smuzhiyun 	struct ar5523 *ar = hw->priv;
995*4882a593Smuzhiyun 	int error;
996*4882a593Smuzhiyun 	__be32 val;
997*4882a593Smuzhiyun 
998*4882a593Smuzhiyun 	ar5523_dbg(ar, "start called\n");
999*4882a593Smuzhiyun 
1000*4882a593Smuzhiyun 	mutex_lock(&ar->mutex);
1001*4882a593Smuzhiyun 	val = cpu_to_be32(0);
1002*4882a593Smuzhiyun 	ar5523_cmd_write(ar, WDCMSG_BIND, &val, sizeof(val), 0);
1003*4882a593Smuzhiyun 
1004*4882a593Smuzhiyun 	/* set MAC address */
1005*4882a593Smuzhiyun 	ar5523_config_multi(ar, CFG_MAC_ADDR, &ar->hw->wiphy->perm_addr,
1006*4882a593Smuzhiyun 			    ETH_ALEN);
1007*4882a593Smuzhiyun 
1008*4882a593Smuzhiyun 	/* XXX honor net80211 state */
1009*4882a593Smuzhiyun 	ar5523_config(ar, CFG_RATE_CONTROL_ENABLE, 0x00000001);
1010*4882a593Smuzhiyun 	ar5523_config(ar, CFG_DIVERSITY_CTL, 0x00000001);
1011*4882a593Smuzhiyun 	ar5523_config(ar, CFG_ABOLT, 0x0000003f);
1012*4882a593Smuzhiyun 	ar5523_config(ar, CFG_WME_ENABLED, 0x00000000);
1013*4882a593Smuzhiyun 
1014*4882a593Smuzhiyun 	ar5523_config(ar, CFG_SERVICE_TYPE, 1);
1015*4882a593Smuzhiyun 	ar5523_config(ar, CFG_TP_SCALE, 0x00000000);
1016*4882a593Smuzhiyun 	ar5523_config(ar, CFG_TPC_HALF_DBM5, 0x0000003c);
1017*4882a593Smuzhiyun 	ar5523_config(ar, CFG_TPC_HALF_DBM2, 0x0000003c);
1018*4882a593Smuzhiyun 	ar5523_config(ar, CFG_OVERRD_TX_POWER, 0x00000000);
1019*4882a593Smuzhiyun 	ar5523_config(ar, CFG_GMODE_PROTECTION, 0x00000000);
1020*4882a593Smuzhiyun 	ar5523_config(ar, CFG_GMODE_PROTECT_RATE_INDEX, 0x00000003);
1021*4882a593Smuzhiyun 	ar5523_config(ar, CFG_PROTECTION_TYPE, 0x00000000);
1022*4882a593Smuzhiyun 	ar5523_config(ar, CFG_MODE_CTS, 0x00000002);
1023*4882a593Smuzhiyun 
1024*4882a593Smuzhiyun 	error = ar5523_cmd_read(ar, WDCMSG_TARGET_START, NULL, 0,
1025*4882a593Smuzhiyun 	    &val, sizeof(val), AR5523_CMD_FLAG_MAGIC);
1026*4882a593Smuzhiyun 	if (error) {
1027*4882a593Smuzhiyun 		ar5523_dbg(ar, "could not start target, error %d\n", error);
1028*4882a593Smuzhiyun 		goto err;
1029*4882a593Smuzhiyun 	}
1030*4882a593Smuzhiyun 	ar5523_dbg(ar, "WDCMSG_TARGET_START returns handle: 0x%x\n",
1031*4882a593Smuzhiyun 		   be32_to_cpu(val));
1032*4882a593Smuzhiyun 
1033*4882a593Smuzhiyun 	ar5523_switch_chan(ar);
1034*4882a593Smuzhiyun 
1035*4882a593Smuzhiyun 	val = cpu_to_be32(TARGET_DEVICE_AWAKE);
1036*4882a593Smuzhiyun 	ar5523_cmd_write(ar, WDCMSG_SET_PWR_MODE, &val, sizeof(val), 0);
1037*4882a593Smuzhiyun 	/* XXX? check */
1038*4882a593Smuzhiyun 	ar5523_cmd_write(ar, WDCMSG_RESET_KEY_CACHE, NULL, 0, 0);
1039*4882a593Smuzhiyun 
1040*4882a593Smuzhiyun 	set_bit(AR5523_HW_UP, &ar->flags);
1041*4882a593Smuzhiyun 	queue_work(ar->wq, &ar->rx_refill_work);
1042*4882a593Smuzhiyun 
1043*4882a593Smuzhiyun 	/* enable Rx */
1044*4882a593Smuzhiyun 	ar5523_set_rxfilter(ar, 0, UATH_FILTER_OP_INIT);
1045*4882a593Smuzhiyun 	ar5523_set_rxfilter(ar,
1046*4882a593Smuzhiyun 			    UATH_FILTER_RX_UCAST | UATH_FILTER_RX_MCAST |
1047*4882a593Smuzhiyun 			    UATH_FILTER_RX_BCAST | UATH_FILTER_RX_BEACON,
1048*4882a593Smuzhiyun 			    UATH_FILTER_OP_SET);
1049*4882a593Smuzhiyun 
1050*4882a593Smuzhiyun 	ar5523_set_ledsteady(ar, UATH_LED_ACTIVITY, UATH_LED_ON);
1051*4882a593Smuzhiyun 	ar5523_dbg(ar, "start OK\n");
1052*4882a593Smuzhiyun 
1053*4882a593Smuzhiyun err:
1054*4882a593Smuzhiyun 	mutex_unlock(&ar->mutex);
1055*4882a593Smuzhiyun 	return error;
1056*4882a593Smuzhiyun }
1057*4882a593Smuzhiyun 
ar5523_stop(struct ieee80211_hw * hw)1058*4882a593Smuzhiyun static void ar5523_stop(struct ieee80211_hw *hw)
1059*4882a593Smuzhiyun {
1060*4882a593Smuzhiyun 	struct ar5523 *ar = hw->priv;
1061*4882a593Smuzhiyun 
1062*4882a593Smuzhiyun 	ar5523_dbg(ar, "stop called\n");
1063*4882a593Smuzhiyun 
1064*4882a593Smuzhiyun 	cancel_delayed_work_sync(&ar->stat_work);
1065*4882a593Smuzhiyun 	mutex_lock(&ar->mutex);
1066*4882a593Smuzhiyun 	clear_bit(AR5523_HW_UP, &ar->flags);
1067*4882a593Smuzhiyun 
1068*4882a593Smuzhiyun 	ar5523_set_ledsteady(ar, UATH_LED_LINK, UATH_LED_OFF);
1069*4882a593Smuzhiyun 	ar5523_set_ledsteady(ar, UATH_LED_ACTIVITY, UATH_LED_OFF);
1070*4882a593Smuzhiyun 
1071*4882a593Smuzhiyun 	ar5523_cmd_write(ar, WDCMSG_TARGET_STOP, NULL, 0, 0);
1072*4882a593Smuzhiyun 
1073*4882a593Smuzhiyun 	del_timer_sync(&ar->tx_wd_timer);
1074*4882a593Smuzhiyun 	cancel_work_sync(&ar->tx_wd_work);
1075*4882a593Smuzhiyun 	cancel_work_sync(&ar->rx_refill_work);
1076*4882a593Smuzhiyun 	ar5523_cancel_rx_bufs(ar);
1077*4882a593Smuzhiyun 	mutex_unlock(&ar->mutex);
1078*4882a593Smuzhiyun }
1079*4882a593Smuzhiyun 
ar5523_set_rts_threshold(struct ieee80211_hw * hw,u32 value)1080*4882a593Smuzhiyun static int ar5523_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
1081*4882a593Smuzhiyun {
1082*4882a593Smuzhiyun 	struct ar5523 *ar = hw->priv;
1083*4882a593Smuzhiyun 	int ret;
1084*4882a593Smuzhiyun 
1085*4882a593Smuzhiyun 	ar5523_dbg(ar, "set_rts_threshold called\n");
1086*4882a593Smuzhiyun 	mutex_lock(&ar->mutex);
1087*4882a593Smuzhiyun 
1088*4882a593Smuzhiyun 	ret = ar5523_config(ar, CFG_USER_RTS_THRESHOLD, value);
1089*4882a593Smuzhiyun 
1090*4882a593Smuzhiyun 	mutex_unlock(&ar->mutex);
1091*4882a593Smuzhiyun 	return ret;
1092*4882a593Smuzhiyun }
1093*4882a593Smuzhiyun 
ar5523_flush(struct ieee80211_hw * hw,struct ieee80211_vif * vif,u32 queues,bool drop)1094*4882a593Smuzhiyun static void ar5523_flush(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
1095*4882a593Smuzhiyun 			 u32 queues, bool drop)
1096*4882a593Smuzhiyun {
1097*4882a593Smuzhiyun 	struct ar5523 *ar = hw->priv;
1098*4882a593Smuzhiyun 
1099*4882a593Smuzhiyun 	ar5523_dbg(ar, "flush called\n");
1100*4882a593Smuzhiyun 	ar5523_flush_tx(ar);
1101*4882a593Smuzhiyun }
1102*4882a593Smuzhiyun 
ar5523_add_interface(struct ieee80211_hw * hw,struct ieee80211_vif * vif)1103*4882a593Smuzhiyun static int ar5523_add_interface(struct ieee80211_hw *hw,
1104*4882a593Smuzhiyun 				struct ieee80211_vif *vif)
1105*4882a593Smuzhiyun {
1106*4882a593Smuzhiyun 	struct ar5523 *ar = hw->priv;
1107*4882a593Smuzhiyun 
1108*4882a593Smuzhiyun 	ar5523_dbg(ar, "add interface called\n");
1109*4882a593Smuzhiyun 
1110*4882a593Smuzhiyun 	if (ar->vif) {
1111*4882a593Smuzhiyun 		ar5523_dbg(ar, "invalid add_interface\n");
1112*4882a593Smuzhiyun 		return -EOPNOTSUPP;
1113*4882a593Smuzhiyun 	}
1114*4882a593Smuzhiyun 
1115*4882a593Smuzhiyun 	switch (vif->type) {
1116*4882a593Smuzhiyun 	case NL80211_IFTYPE_STATION:
1117*4882a593Smuzhiyun 		ar->vif = vif;
1118*4882a593Smuzhiyun 		break;
1119*4882a593Smuzhiyun 	default:
1120*4882a593Smuzhiyun 		return -EOPNOTSUPP;
1121*4882a593Smuzhiyun 	}
1122*4882a593Smuzhiyun 	return 0;
1123*4882a593Smuzhiyun }
1124*4882a593Smuzhiyun 
ar5523_remove_interface(struct ieee80211_hw * hw,struct ieee80211_vif * vif)1125*4882a593Smuzhiyun static void ar5523_remove_interface(struct ieee80211_hw *hw,
1126*4882a593Smuzhiyun 				    struct ieee80211_vif *vif)
1127*4882a593Smuzhiyun {
1128*4882a593Smuzhiyun 	struct ar5523 *ar = hw->priv;
1129*4882a593Smuzhiyun 
1130*4882a593Smuzhiyun 	ar5523_dbg(ar, "remove interface called\n");
1131*4882a593Smuzhiyun 	ar->vif = NULL;
1132*4882a593Smuzhiyun }
1133*4882a593Smuzhiyun 
ar5523_hwconfig(struct ieee80211_hw * hw,u32 changed)1134*4882a593Smuzhiyun static int ar5523_hwconfig(struct ieee80211_hw *hw, u32 changed)
1135*4882a593Smuzhiyun {
1136*4882a593Smuzhiyun 	struct ar5523 *ar = hw->priv;
1137*4882a593Smuzhiyun 
1138*4882a593Smuzhiyun 	ar5523_dbg(ar, "config called\n");
1139*4882a593Smuzhiyun 	mutex_lock(&ar->mutex);
1140*4882a593Smuzhiyun 	if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
1141*4882a593Smuzhiyun 		ar5523_dbg(ar, "Do channel switch\n");
1142*4882a593Smuzhiyun 		ar5523_flush_tx(ar);
1143*4882a593Smuzhiyun 		ar5523_switch_chan(ar);
1144*4882a593Smuzhiyun 	}
1145*4882a593Smuzhiyun 	mutex_unlock(&ar->mutex);
1146*4882a593Smuzhiyun 	return 0;
1147*4882a593Smuzhiyun }
1148*4882a593Smuzhiyun 
ar5523_get_wlan_mode(struct ar5523 * ar,struct ieee80211_bss_conf * bss_conf)1149*4882a593Smuzhiyun static int ar5523_get_wlan_mode(struct ar5523 *ar,
1150*4882a593Smuzhiyun 				struct ieee80211_bss_conf *bss_conf)
1151*4882a593Smuzhiyun {
1152*4882a593Smuzhiyun 	struct ieee80211_supported_band *band;
1153*4882a593Smuzhiyun 	int bit;
1154*4882a593Smuzhiyun 	struct ieee80211_sta *sta;
1155*4882a593Smuzhiyun 	u32 sta_rate_set;
1156*4882a593Smuzhiyun 
1157*4882a593Smuzhiyun 	band = ar->hw->wiphy->bands[ar->hw->conf.chandef.chan->band];
1158*4882a593Smuzhiyun 	sta = ieee80211_find_sta(ar->vif, bss_conf->bssid);
1159*4882a593Smuzhiyun 	if (!sta) {
1160*4882a593Smuzhiyun 		ar5523_info(ar, "STA not found!\n");
1161*4882a593Smuzhiyun 		return WLAN_MODE_11b;
1162*4882a593Smuzhiyun 	}
1163*4882a593Smuzhiyun 	sta_rate_set = sta->supp_rates[ar->hw->conf.chandef.chan->band];
1164*4882a593Smuzhiyun 
1165*4882a593Smuzhiyun 	for (bit = 0; bit < band->n_bitrates; bit++) {
1166*4882a593Smuzhiyun 		if (sta_rate_set & 1) {
1167*4882a593Smuzhiyun 			int rate = band->bitrates[bit].bitrate;
1168*4882a593Smuzhiyun 			switch (rate) {
1169*4882a593Smuzhiyun 			case 60:
1170*4882a593Smuzhiyun 			case 90:
1171*4882a593Smuzhiyun 			case 120:
1172*4882a593Smuzhiyun 			case 180:
1173*4882a593Smuzhiyun 			case 240:
1174*4882a593Smuzhiyun 			case 360:
1175*4882a593Smuzhiyun 			case 480:
1176*4882a593Smuzhiyun 			case 540:
1177*4882a593Smuzhiyun 				return WLAN_MODE_11g;
1178*4882a593Smuzhiyun 			}
1179*4882a593Smuzhiyun 		}
1180*4882a593Smuzhiyun 		sta_rate_set >>= 1;
1181*4882a593Smuzhiyun 	}
1182*4882a593Smuzhiyun 	return WLAN_MODE_11b;
1183*4882a593Smuzhiyun }
1184*4882a593Smuzhiyun 
ar5523_create_rateset(struct ar5523 * ar,struct ieee80211_bss_conf * bss_conf,struct ar5523_cmd_rateset * rs,bool basic)1185*4882a593Smuzhiyun static void ar5523_create_rateset(struct ar5523 *ar,
1186*4882a593Smuzhiyun 				  struct ieee80211_bss_conf *bss_conf,
1187*4882a593Smuzhiyun 				  struct ar5523_cmd_rateset *rs,
1188*4882a593Smuzhiyun 				  bool basic)
1189*4882a593Smuzhiyun {
1190*4882a593Smuzhiyun 	struct ieee80211_supported_band *band;
1191*4882a593Smuzhiyun 	struct ieee80211_sta *sta;
1192*4882a593Smuzhiyun 	int bit, i = 0;
1193*4882a593Smuzhiyun 	u32 sta_rate_set, basic_rate_set;
1194*4882a593Smuzhiyun 
1195*4882a593Smuzhiyun 	sta = ieee80211_find_sta(ar->vif, bss_conf->bssid);
1196*4882a593Smuzhiyun 	basic_rate_set = bss_conf->basic_rates;
1197*4882a593Smuzhiyun 	if (!sta) {
1198*4882a593Smuzhiyun 		ar5523_info(ar, "STA not found. Cannot set rates\n");
1199*4882a593Smuzhiyun 		sta_rate_set = bss_conf->basic_rates;
1200*4882a593Smuzhiyun 	} else
1201*4882a593Smuzhiyun 		sta_rate_set = sta->supp_rates[ar->hw->conf.chandef.chan->band];
1202*4882a593Smuzhiyun 
1203*4882a593Smuzhiyun 	ar5523_dbg(ar, "sta rate_set = %08x\n", sta_rate_set);
1204*4882a593Smuzhiyun 
1205*4882a593Smuzhiyun 	band = ar->hw->wiphy->bands[ar->hw->conf.chandef.chan->band];
1206*4882a593Smuzhiyun 	for (bit = 0; bit < band->n_bitrates; bit++) {
1207*4882a593Smuzhiyun 		BUG_ON(i >= AR5523_MAX_NRATES);
1208*4882a593Smuzhiyun 		ar5523_dbg(ar, "Considering rate %d : %d\n",
1209*4882a593Smuzhiyun 			   band->bitrates[bit].hw_value, sta_rate_set & 1);
1210*4882a593Smuzhiyun 		if (sta_rate_set & 1) {
1211*4882a593Smuzhiyun 			rs->set[i] = band->bitrates[bit].hw_value;
1212*4882a593Smuzhiyun 			if (basic_rate_set & 1 && basic)
1213*4882a593Smuzhiyun 				rs->set[i] |= 0x80;
1214*4882a593Smuzhiyun 			i++;
1215*4882a593Smuzhiyun 		}
1216*4882a593Smuzhiyun 		sta_rate_set >>= 1;
1217*4882a593Smuzhiyun 		basic_rate_set >>= 1;
1218*4882a593Smuzhiyun 	}
1219*4882a593Smuzhiyun 
1220*4882a593Smuzhiyun 	rs->length = i;
1221*4882a593Smuzhiyun }
1222*4882a593Smuzhiyun 
ar5523_set_basic_rates(struct ar5523 * ar,struct ieee80211_bss_conf * bss)1223*4882a593Smuzhiyun static int ar5523_set_basic_rates(struct ar5523 *ar,
1224*4882a593Smuzhiyun 				  struct ieee80211_bss_conf *bss)
1225*4882a593Smuzhiyun {
1226*4882a593Smuzhiyun 	struct ar5523_cmd_rates rates;
1227*4882a593Smuzhiyun 
1228*4882a593Smuzhiyun 	memset(&rates, 0, sizeof(rates));
1229*4882a593Smuzhiyun 	rates.connid = cpu_to_be32(2);		/* XXX */
1230*4882a593Smuzhiyun 	rates.size   = cpu_to_be32(sizeof(struct ar5523_cmd_rateset));
1231*4882a593Smuzhiyun 	ar5523_create_rateset(ar, bss, &rates.rateset, true);
1232*4882a593Smuzhiyun 
1233*4882a593Smuzhiyun 	return ar5523_cmd_write(ar, WDCMSG_SET_BASIC_RATE, &rates,
1234*4882a593Smuzhiyun 				sizeof(rates), 0);
1235*4882a593Smuzhiyun }
1236*4882a593Smuzhiyun 
ar5523_create_connection(struct ar5523 * ar,struct ieee80211_vif * vif,struct ieee80211_bss_conf * bss)1237*4882a593Smuzhiyun static int ar5523_create_connection(struct ar5523 *ar,
1238*4882a593Smuzhiyun 				    struct ieee80211_vif *vif,
1239*4882a593Smuzhiyun 				    struct ieee80211_bss_conf *bss)
1240*4882a593Smuzhiyun {
1241*4882a593Smuzhiyun 	struct ar5523_cmd_create_connection create;
1242*4882a593Smuzhiyun 	int wlan_mode;
1243*4882a593Smuzhiyun 
1244*4882a593Smuzhiyun 	memset(&create, 0, sizeof(create));
1245*4882a593Smuzhiyun 	create.connid = cpu_to_be32(2);
1246*4882a593Smuzhiyun 	create.bssid = cpu_to_be32(0);
1247*4882a593Smuzhiyun 	/* XXX packed or not?  */
1248*4882a593Smuzhiyun 	create.size = cpu_to_be32(sizeof(struct ar5523_cmd_rateset));
1249*4882a593Smuzhiyun 
1250*4882a593Smuzhiyun 	ar5523_create_rateset(ar, bss, &create.connattr.rateset, false);
1251*4882a593Smuzhiyun 
1252*4882a593Smuzhiyun 	wlan_mode = ar5523_get_wlan_mode(ar, bss);
1253*4882a593Smuzhiyun 	create.connattr.wlanmode = cpu_to_be32(wlan_mode);
1254*4882a593Smuzhiyun 
1255*4882a593Smuzhiyun 	return ar5523_cmd_write(ar, WDCMSG_CREATE_CONNECTION, &create,
1256*4882a593Smuzhiyun 				sizeof(create), 0);
1257*4882a593Smuzhiyun }
1258*4882a593Smuzhiyun 
ar5523_write_associd(struct ar5523 * ar,struct ieee80211_bss_conf * bss)1259*4882a593Smuzhiyun static int ar5523_write_associd(struct ar5523 *ar,
1260*4882a593Smuzhiyun 				struct ieee80211_bss_conf *bss)
1261*4882a593Smuzhiyun {
1262*4882a593Smuzhiyun 	struct ar5523_cmd_set_associd associd;
1263*4882a593Smuzhiyun 
1264*4882a593Smuzhiyun 	memset(&associd, 0, sizeof(associd));
1265*4882a593Smuzhiyun 	associd.defaultrateix = cpu_to_be32(0);	/* XXX */
1266*4882a593Smuzhiyun 	associd.associd = cpu_to_be32(bss->aid);
1267*4882a593Smuzhiyun 	associd.timoffset = cpu_to_be32(0x3b);	/* XXX */
1268*4882a593Smuzhiyun 	memcpy(associd.bssid, bss->bssid, ETH_ALEN);
1269*4882a593Smuzhiyun 	return ar5523_cmd_write(ar, WDCMSG_WRITE_ASSOCID, &associd,
1270*4882a593Smuzhiyun 				sizeof(associd), 0);
1271*4882a593Smuzhiyun }
1272*4882a593Smuzhiyun 
ar5523_bss_info_changed(struct ieee80211_hw * hw,struct ieee80211_vif * vif,struct ieee80211_bss_conf * bss,u32 changed)1273*4882a593Smuzhiyun static void ar5523_bss_info_changed(struct ieee80211_hw *hw,
1274*4882a593Smuzhiyun 				    struct ieee80211_vif *vif,
1275*4882a593Smuzhiyun 				    struct ieee80211_bss_conf *bss,
1276*4882a593Smuzhiyun 				    u32 changed)
1277*4882a593Smuzhiyun {
1278*4882a593Smuzhiyun 	struct ar5523 *ar = hw->priv;
1279*4882a593Smuzhiyun 	int error;
1280*4882a593Smuzhiyun 
1281*4882a593Smuzhiyun 	ar5523_dbg(ar, "bss_info_changed called\n");
1282*4882a593Smuzhiyun 	mutex_lock(&ar->mutex);
1283*4882a593Smuzhiyun 
1284*4882a593Smuzhiyun 	if (!(changed & BSS_CHANGED_ASSOC))
1285*4882a593Smuzhiyun 		goto out_unlock;
1286*4882a593Smuzhiyun 
1287*4882a593Smuzhiyun 	if (bss->assoc) {
1288*4882a593Smuzhiyun 		error = ar5523_create_connection(ar, vif, bss);
1289*4882a593Smuzhiyun 		if (error) {
1290*4882a593Smuzhiyun 			ar5523_err(ar, "could not create connection\n");
1291*4882a593Smuzhiyun 			goto out_unlock;
1292*4882a593Smuzhiyun 		}
1293*4882a593Smuzhiyun 
1294*4882a593Smuzhiyun 		error = ar5523_set_basic_rates(ar, bss);
1295*4882a593Smuzhiyun 		if (error) {
1296*4882a593Smuzhiyun 			ar5523_err(ar, "could not set negotiated rate set\n");
1297*4882a593Smuzhiyun 			goto out_unlock;
1298*4882a593Smuzhiyun 		}
1299*4882a593Smuzhiyun 
1300*4882a593Smuzhiyun 		error = ar5523_write_associd(ar, bss);
1301*4882a593Smuzhiyun 		if (error) {
1302*4882a593Smuzhiyun 			ar5523_err(ar, "could not set association\n");
1303*4882a593Smuzhiyun 			goto out_unlock;
1304*4882a593Smuzhiyun 		}
1305*4882a593Smuzhiyun 
1306*4882a593Smuzhiyun 		/* turn link LED on */
1307*4882a593Smuzhiyun 		ar5523_set_ledsteady(ar, UATH_LED_LINK, UATH_LED_ON);
1308*4882a593Smuzhiyun 		set_bit(AR5523_CONNECTED, &ar->flags);
1309*4882a593Smuzhiyun 		ieee80211_queue_delayed_work(hw, &ar->stat_work, HZ);
1310*4882a593Smuzhiyun 
1311*4882a593Smuzhiyun 	} else {
1312*4882a593Smuzhiyun 		cancel_delayed_work(&ar->stat_work);
1313*4882a593Smuzhiyun 		clear_bit(AR5523_CONNECTED, &ar->flags);
1314*4882a593Smuzhiyun 		ar5523_set_ledsteady(ar, UATH_LED_LINK, UATH_LED_OFF);
1315*4882a593Smuzhiyun 	}
1316*4882a593Smuzhiyun 
1317*4882a593Smuzhiyun out_unlock:
1318*4882a593Smuzhiyun 	mutex_unlock(&ar->mutex);
1319*4882a593Smuzhiyun 
1320*4882a593Smuzhiyun }
1321*4882a593Smuzhiyun 
1322*4882a593Smuzhiyun #define AR5523_SUPPORTED_FILTERS (FIF_ALLMULTI | \
1323*4882a593Smuzhiyun 				  FIF_FCSFAIL | \
1324*4882a593Smuzhiyun 				  FIF_OTHER_BSS)
1325*4882a593Smuzhiyun 
ar5523_configure_filter(struct ieee80211_hw * hw,unsigned int changed_flags,unsigned int * total_flags,u64 multicast)1326*4882a593Smuzhiyun static void ar5523_configure_filter(struct ieee80211_hw *hw,
1327*4882a593Smuzhiyun 				    unsigned int changed_flags,
1328*4882a593Smuzhiyun 				    unsigned int *total_flags,
1329*4882a593Smuzhiyun 				    u64 multicast)
1330*4882a593Smuzhiyun {
1331*4882a593Smuzhiyun 	struct ar5523 *ar = hw->priv;
1332*4882a593Smuzhiyun 	u32 filter = 0;
1333*4882a593Smuzhiyun 
1334*4882a593Smuzhiyun 	ar5523_dbg(ar, "configure_filter called\n");
1335*4882a593Smuzhiyun 	mutex_lock(&ar->mutex);
1336*4882a593Smuzhiyun 	ar5523_flush_tx(ar);
1337*4882a593Smuzhiyun 
1338*4882a593Smuzhiyun 	*total_flags &= AR5523_SUPPORTED_FILTERS;
1339*4882a593Smuzhiyun 
1340*4882a593Smuzhiyun 	/* The filters seems strange. UATH_FILTER_RX_BCAST and
1341*4882a593Smuzhiyun 	 * UATH_FILTER_RX_MCAST does not result in those frames being RXed.
1342*4882a593Smuzhiyun 	 * The only way I have found to get [mb]cast frames seems to be
1343*4882a593Smuzhiyun 	 * to set UATH_FILTER_RX_PROM. */
1344*4882a593Smuzhiyun 	filter |= UATH_FILTER_RX_UCAST | UATH_FILTER_RX_MCAST |
1345*4882a593Smuzhiyun 		  UATH_FILTER_RX_BCAST | UATH_FILTER_RX_BEACON |
1346*4882a593Smuzhiyun 		  UATH_FILTER_RX_PROM;
1347*4882a593Smuzhiyun 
1348*4882a593Smuzhiyun 	ar5523_set_rxfilter(ar, 0, UATH_FILTER_OP_INIT);
1349*4882a593Smuzhiyun 	ar5523_set_rxfilter(ar, filter, UATH_FILTER_OP_SET);
1350*4882a593Smuzhiyun 
1351*4882a593Smuzhiyun 	mutex_unlock(&ar->mutex);
1352*4882a593Smuzhiyun }
1353*4882a593Smuzhiyun 
1354*4882a593Smuzhiyun static const struct ieee80211_ops ar5523_ops = {
1355*4882a593Smuzhiyun 	.start			= ar5523_start,
1356*4882a593Smuzhiyun 	.stop			= ar5523_stop,
1357*4882a593Smuzhiyun 	.tx			= ar5523_tx,
1358*4882a593Smuzhiyun 	.set_rts_threshold	= ar5523_set_rts_threshold,
1359*4882a593Smuzhiyun 	.add_interface		= ar5523_add_interface,
1360*4882a593Smuzhiyun 	.remove_interface	= ar5523_remove_interface,
1361*4882a593Smuzhiyun 	.config			= ar5523_hwconfig,
1362*4882a593Smuzhiyun 	.bss_info_changed	= ar5523_bss_info_changed,
1363*4882a593Smuzhiyun 	.configure_filter	= ar5523_configure_filter,
1364*4882a593Smuzhiyun 	.flush			= ar5523_flush,
1365*4882a593Smuzhiyun };
1366*4882a593Smuzhiyun 
ar5523_host_available(struct ar5523 * ar)1367*4882a593Smuzhiyun static int ar5523_host_available(struct ar5523 *ar)
1368*4882a593Smuzhiyun {
1369*4882a593Smuzhiyun 	struct ar5523_cmd_host_available setup;
1370*4882a593Smuzhiyun 
1371*4882a593Smuzhiyun 	/* inform target the host is available */
1372*4882a593Smuzhiyun 	setup.sw_ver_major = cpu_to_be32(ATH_SW_VER_MAJOR);
1373*4882a593Smuzhiyun 	setup.sw_ver_minor = cpu_to_be32(ATH_SW_VER_MINOR);
1374*4882a593Smuzhiyun 	setup.sw_ver_patch = cpu_to_be32(ATH_SW_VER_PATCH);
1375*4882a593Smuzhiyun 	setup.sw_ver_build = cpu_to_be32(ATH_SW_VER_BUILD);
1376*4882a593Smuzhiyun 	return ar5523_cmd_read(ar, WDCMSG_HOST_AVAILABLE,
1377*4882a593Smuzhiyun 			       &setup, sizeof(setup), NULL, 0, 0);
1378*4882a593Smuzhiyun }
1379*4882a593Smuzhiyun 
ar5523_get_devstatus(struct ar5523 * ar)1380*4882a593Smuzhiyun static int ar5523_get_devstatus(struct ar5523 *ar)
1381*4882a593Smuzhiyun {
1382*4882a593Smuzhiyun 	u8 macaddr[ETH_ALEN];
1383*4882a593Smuzhiyun 	int error;
1384*4882a593Smuzhiyun 
1385*4882a593Smuzhiyun 	/* retrieve MAC address */
1386*4882a593Smuzhiyun 	error = ar5523_get_status(ar, ST_MAC_ADDR, macaddr, ETH_ALEN);
1387*4882a593Smuzhiyun 	if (error) {
1388*4882a593Smuzhiyun 		ar5523_err(ar, "could not read MAC address\n");
1389*4882a593Smuzhiyun 		return error;
1390*4882a593Smuzhiyun 	}
1391*4882a593Smuzhiyun 
1392*4882a593Smuzhiyun 	SET_IEEE80211_PERM_ADDR(ar->hw, macaddr);
1393*4882a593Smuzhiyun 
1394*4882a593Smuzhiyun 	error = ar5523_get_status(ar, ST_SERIAL_NUMBER,
1395*4882a593Smuzhiyun 	    &ar->serial[0], sizeof(ar->serial));
1396*4882a593Smuzhiyun 	if (error) {
1397*4882a593Smuzhiyun 		ar5523_err(ar, "could not read device serial number\n");
1398*4882a593Smuzhiyun 		return error;
1399*4882a593Smuzhiyun 	}
1400*4882a593Smuzhiyun 	return 0;
1401*4882a593Smuzhiyun }
1402*4882a593Smuzhiyun 
1403*4882a593Smuzhiyun #define AR5523_SANE_RXBUFSZ 2000
1404*4882a593Smuzhiyun 
ar5523_get_max_rxsz(struct ar5523 * ar)1405*4882a593Smuzhiyun static int ar5523_get_max_rxsz(struct ar5523 *ar)
1406*4882a593Smuzhiyun {
1407*4882a593Smuzhiyun 	int error;
1408*4882a593Smuzhiyun 	__be32 rxsize;
1409*4882a593Smuzhiyun 
1410*4882a593Smuzhiyun 	/* Get max rx size */
1411*4882a593Smuzhiyun 	error = ar5523_get_status(ar, ST_WDC_TRANSPORT_CHUNK_SIZE, &rxsize,
1412*4882a593Smuzhiyun 				  sizeof(rxsize));
1413*4882a593Smuzhiyun 	if (error != 0) {
1414*4882a593Smuzhiyun 		ar5523_err(ar, "could not read max RX size\n");
1415*4882a593Smuzhiyun 		return error;
1416*4882a593Smuzhiyun 	}
1417*4882a593Smuzhiyun 
1418*4882a593Smuzhiyun 	ar->rxbufsz = be32_to_cpu(rxsize);
1419*4882a593Smuzhiyun 
1420*4882a593Smuzhiyun 	if (!ar->rxbufsz || ar->rxbufsz > AR5523_SANE_RXBUFSZ) {
1421*4882a593Smuzhiyun 		ar5523_err(ar, "Bad rxbufsz from device. Using %d instead\n",
1422*4882a593Smuzhiyun 			   AR5523_SANE_RXBUFSZ);
1423*4882a593Smuzhiyun 		ar->rxbufsz = AR5523_SANE_RXBUFSZ;
1424*4882a593Smuzhiyun 	}
1425*4882a593Smuzhiyun 
1426*4882a593Smuzhiyun 	ar5523_dbg(ar, "Max RX buf size: %d\n", ar->rxbufsz);
1427*4882a593Smuzhiyun 	return 0;
1428*4882a593Smuzhiyun }
1429*4882a593Smuzhiyun 
1430*4882a593Smuzhiyun /*
1431*4882a593Smuzhiyun  * This is copied from rtl818x, but we should probably move this
1432*4882a593Smuzhiyun  * to common code as in OpenBSD.
1433*4882a593Smuzhiyun  */
1434*4882a593Smuzhiyun static const struct ieee80211_rate ar5523_rates[] = {
1435*4882a593Smuzhiyun 	{ .bitrate = 10, .hw_value = 2, },
1436*4882a593Smuzhiyun 	{ .bitrate = 20, .hw_value = 4 },
1437*4882a593Smuzhiyun 	{ .bitrate = 55, .hw_value = 11, },
1438*4882a593Smuzhiyun 	{ .bitrate = 110, .hw_value = 22, },
1439*4882a593Smuzhiyun 	{ .bitrate = 60, .hw_value = 12, },
1440*4882a593Smuzhiyun 	{ .bitrate = 90, .hw_value = 18, },
1441*4882a593Smuzhiyun 	{ .bitrate = 120, .hw_value = 24, },
1442*4882a593Smuzhiyun 	{ .bitrate = 180, .hw_value = 36, },
1443*4882a593Smuzhiyun 	{ .bitrate = 240, .hw_value = 48, },
1444*4882a593Smuzhiyun 	{ .bitrate = 360, .hw_value = 72, },
1445*4882a593Smuzhiyun 	{ .bitrate = 480, .hw_value = 96, },
1446*4882a593Smuzhiyun 	{ .bitrate = 540, .hw_value = 108, },
1447*4882a593Smuzhiyun };
1448*4882a593Smuzhiyun 
1449*4882a593Smuzhiyun static const struct ieee80211_channel ar5523_channels[] = {
1450*4882a593Smuzhiyun 	{ .center_freq = 2412 },
1451*4882a593Smuzhiyun 	{ .center_freq = 2417 },
1452*4882a593Smuzhiyun 	{ .center_freq = 2422 },
1453*4882a593Smuzhiyun 	{ .center_freq = 2427 },
1454*4882a593Smuzhiyun 	{ .center_freq = 2432 },
1455*4882a593Smuzhiyun 	{ .center_freq = 2437 },
1456*4882a593Smuzhiyun 	{ .center_freq = 2442 },
1457*4882a593Smuzhiyun 	{ .center_freq = 2447 },
1458*4882a593Smuzhiyun 	{ .center_freq = 2452 },
1459*4882a593Smuzhiyun 	{ .center_freq = 2457 },
1460*4882a593Smuzhiyun 	{ .center_freq = 2462 },
1461*4882a593Smuzhiyun 	{ .center_freq = 2467 },
1462*4882a593Smuzhiyun 	{ .center_freq = 2472 },
1463*4882a593Smuzhiyun 	{ .center_freq = 2484 },
1464*4882a593Smuzhiyun };
1465*4882a593Smuzhiyun 
ar5523_init_modes(struct ar5523 * ar)1466*4882a593Smuzhiyun static int ar5523_init_modes(struct ar5523 *ar)
1467*4882a593Smuzhiyun {
1468*4882a593Smuzhiyun 	BUILD_BUG_ON(sizeof(ar->channels) != sizeof(ar5523_channels));
1469*4882a593Smuzhiyun 	BUILD_BUG_ON(sizeof(ar->rates) != sizeof(ar5523_rates));
1470*4882a593Smuzhiyun 
1471*4882a593Smuzhiyun 	memcpy(ar->channels, ar5523_channels, sizeof(ar5523_channels));
1472*4882a593Smuzhiyun 	memcpy(ar->rates, ar5523_rates, sizeof(ar5523_rates));
1473*4882a593Smuzhiyun 
1474*4882a593Smuzhiyun 	ar->band.band = NL80211_BAND_2GHZ;
1475*4882a593Smuzhiyun 	ar->band.channels = ar->channels;
1476*4882a593Smuzhiyun 	ar->band.n_channels = ARRAY_SIZE(ar5523_channels);
1477*4882a593Smuzhiyun 	ar->band.bitrates = ar->rates;
1478*4882a593Smuzhiyun 	ar->band.n_bitrates = ARRAY_SIZE(ar5523_rates);
1479*4882a593Smuzhiyun 	ar->hw->wiphy->bands[NL80211_BAND_2GHZ] = &ar->band;
1480*4882a593Smuzhiyun 	return 0;
1481*4882a593Smuzhiyun }
1482*4882a593Smuzhiyun 
1483*4882a593Smuzhiyun /*
1484*4882a593Smuzhiyun  * Load the MIPS R4000 microcode into the device.  Once the image is loaded,
1485*4882a593Smuzhiyun  * the device will detach itself from the bus and reattach later with a new
1486*4882a593Smuzhiyun  * product Id (a la ezusb).
1487*4882a593Smuzhiyun  */
ar5523_load_firmware(struct usb_device * dev)1488*4882a593Smuzhiyun static int ar5523_load_firmware(struct usb_device *dev)
1489*4882a593Smuzhiyun {
1490*4882a593Smuzhiyun 	struct ar5523_fwblock *txblock, *rxblock;
1491*4882a593Smuzhiyun 	const struct firmware *fw;
1492*4882a593Smuzhiyun 	void *fwbuf;
1493*4882a593Smuzhiyun 	int len, offset;
1494*4882a593Smuzhiyun 	int foolen; /* XXX(hch): handle short transfers */
1495*4882a593Smuzhiyun 	int error = -ENXIO;
1496*4882a593Smuzhiyun 
1497*4882a593Smuzhiyun 	if (request_firmware(&fw, AR5523_FIRMWARE_FILE, &dev->dev)) {
1498*4882a593Smuzhiyun 		dev_err(&dev->dev, "no firmware found: %s\n",
1499*4882a593Smuzhiyun 			AR5523_FIRMWARE_FILE);
1500*4882a593Smuzhiyun 		return -ENOENT;
1501*4882a593Smuzhiyun 	}
1502*4882a593Smuzhiyun 
1503*4882a593Smuzhiyun 	txblock = kmalloc(sizeof(*txblock), GFP_KERNEL);
1504*4882a593Smuzhiyun 	if (!txblock)
1505*4882a593Smuzhiyun 		goto out;
1506*4882a593Smuzhiyun 
1507*4882a593Smuzhiyun 	rxblock = kmalloc(sizeof(*rxblock), GFP_KERNEL);
1508*4882a593Smuzhiyun 	if (!rxblock)
1509*4882a593Smuzhiyun 		goto out_free_txblock;
1510*4882a593Smuzhiyun 
1511*4882a593Smuzhiyun 	fwbuf = kmalloc(AR5523_MAX_FWBLOCK_SIZE, GFP_KERNEL);
1512*4882a593Smuzhiyun 	if (!fwbuf)
1513*4882a593Smuzhiyun 		goto out_free_rxblock;
1514*4882a593Smuzhiyun 
1515*4882a593Smuzhiyun 	memset(txblock, 0, sizeof(struct ar5523_fwblock));
1516*4882a593Smuzhiyun 	txblock->flags = cpu_to_be32(AR5523_WRITE_BLOCK);
1517*4882a593Smuzhiyun 	txblock->total = cpu_to_be32(fw->size);
1518*4882a593Smuzhiyun 
1519*4882a593Smuzhiyun 	offset = 0;
1520*4882a593Smuzhiyun 	len = fw->size;
1521*4882a593Smuzhiyun 	while (len > 0) {
1522*4882a593Smuzhiyun 		int mlen = min(len, AR5523_MAX_FWBLOCK_SIZE);
1523*4882a593Smuzhiyun 
1524*4882a593Smuzhiyun 		txblock->remain = cpu_to_be32(len - mlen);
1525*4882a593Smuzhiyun 		txblock->len = cpu_to_be32(mlen);
1526*4882a593Smuzhiyun 
1527*4882a593Smuzhiyun 		/* send firmware block meta-data */
1528*4882a593Smuzhiyun 		error = usb_bulk_msg(dev, ar5523_cmd_tx_pipe(dev),
1529*4882a593Smuzhiyun 				     txblock, sizeof(*txblock), &foolen,
1530*4882a593Smuzhiyun 				     AR5523_CMD_TIMEOUT);
1531*4882a593Smuzhiyun 		if (error) {
1532*4882a593Smuzhiyun 			dev_err(&dev->dev,
1533*4882a593Smuzhiyun 				"could not send firmware block info\n");
1534*4882a593Smuzhiyun 			goto out_free_fwbuf;
1535*4882a593Smuzhiyun 		}
1536*4882a593Smuzhiyun 
1537*4882a593Smuzhiyun 		/* send firmware block data */
1538*4882a593Smuzhiyun 		memcpy(fwbuf, fw->data + offset, mlen);
1539*4882a593Smuzhiyun 		error = usb_bulk_msg(dev, ar5523_data_tx_pipe(dev),
1540*4882a593Smuzhiyun 				     fwbuf, mlen, &foolen,
1541*4882a593Smuzhiyun 				     AR5523_DATA_TIMEOUT);
1542*4882a593Smuzhiyun 		if (error) {
1543*4882a593Smuzhiyun 			dev_err(&dev->dev,
1544*4882a593Smuzhiyun 				"could not send firmware block data\n");
1545*4882a593Smuzhiyun 			goto out_free_fwbuf;
1546*4882a593Smuzhiyun 		}
1547*4882a593Smuzhiyun 
1548*4882a593Smuzhiyun 		/* wait for ack from firmware */
1549*4882a593Smuzhiyun 		error = usb_bulk_msg(dev, ar5523_cmd_rx_pipe(dev),
1550*4882a593Smuzhiyun 				     rxblock, sizeof(*rxblock), &foolen,
1551*4882a593Smuzhiyun 				     AR5523_CMD_TIMEOUT);
1552*4882a593Smuzhiyun 		if (error) {
1553*4882a593Smuzhiyun 			dev_err(&dev->dev,
1554*4882a593Smuzhiyun 				"could not read firmware answer\n");
1555*4882a593Smuzhiyun 			goto out_free_fwbuf;
1556*4882a593Smuzhiyun 		}
1557*4882a593Smuzhiyun 
1558*4882a593Smuzhiyun 		len -= mlen;
1559*4882a593Smuzhiyun 		offset += mlen;
1560*4882a593Smuzhiyun 	}
1561*4882a593Smuzhiyun 
1562*4882a593Smuzhiyun 	/*
1563*4882a593Smuzhiyun 	 * Set the error to -ENXIO to make sure we continue probing for
1564*4882a593Smuzhiyun 	 * a driver.
1565*4882a593Smuzhiyun 	 */
1566*4882a593Smuzhiyun 	error = -ENXIO;
1567*4882a593Smuzhiyun 
1568*4882a593Smuzhiyun  out_free_fwbuf:
1569*4882a593Smuzhiyun 	kfree(fwbuf);
1570*4882a593Smuzhiyun  out_free_rxblock:
1571*4882a593Smuzhiyun 	kfree(rxblock);
1572*4882a593Smuzhiyun  out_free_txblock:
1573*4882a593Smuzhiyun 	kfree(txblock);
1574*4882a593Smuzhiyun  out:
1575*4882a593Smuzhiyun 	release_firmware(fw);
1576*4882a593Smuzhiyun 	return error;
1577*4882a593Smuzhiyun }
1578*4882a593Smuzhiyun 
ar5523_probe(struct usb_interface * intf,const struct usb_device_id * id)1579*4882a593Smuzhiyun static int ar5523_probe(struct usb_interface *intf,
1580*4882a593Smuzhiyun 			const struct usb_device_id *id)
1581*4882a593Smuzhiyun {
1582*4882a593Smuzhiyun 	struct usb_device *dev = interface_to_usbdev(intf);
1583*4882a593Smuzhiyun 	struct ieee80211_hw *hw;
1584*4882a593Smuzhiyun 	struct ar5523 *ar;
1585*4882a593Smuzhiyun 	int error = -ENOMEM;
1586*4882a593Smuzhiyun 
1587*4882a593Smuzhiyun 	/*
1588*4882a593Smuzhiyun 	 * Load firmware if the device requires it.  This will return
1589*4882a593Smuzhiyun 	 * -ENXIO on success and we'll get called back afer the usb
1590*4882a593Smuzhiyun 	 * id changes to indicate that the firmware is present.
1591*4882a593Smuzhiyun 	 */
1592*4882a593Smuzhiyun 	if (id->driver_info & AR5523_FLAG_PRE_FIRMWARE)
1593*4882a593Smuzhiyun 		return ar5523_load_firmware(dev);
1594*4882a593Smuzhiyun 
1595*4882a593Smuzhiyun 
1596*4882a593Smuzhiyun 	hw = ieee80211_alloc_hw(sizeof(*ar), &ar5523_ops);
1597*4882a593Smuzhiyun 	if (!hw)
1598*4882a593Smuzhiyun 		goto out;
1599*4882a593Smuzhiyun 	SET_IEEE80211_DEV(hw, &intf->dev);
1600*4882a593Smuzhiyun 
1601*4882a593Smuzhiyun 	ar = hw->priv;
1602*4882a593Smuzhiyun 	ar->hw = hw;
1603*4882a593Smuzhiyun 	ar->dev = dev;
1604*4882a593Smuzhiyun 	mutex_init(&ar->mutex);
1605*4882a593Smuzhiyun 
1606*4882a593Smuzhiyun 	INIT_DELAYED_WORK(&ar->stat_work, ar5523_stat_work);
1607*4882a593Smuzhiyun 	timer_setup(&ar->tx_wd_timer, ar5523_tx_wd_timer, 0);
1608*4882a593Smuzhiyun 	INIT_WORK(&ar->tx_wd_work, ar5523_tx_wd_work);
1609*4882a593Smuzhiyun 	INIT_WORK(&ar->tx_work, ar5523_tx_work);
1610*4882a593Smuzhiyun 	INIT_LIST_HEAD(&ar->tx_queue_pending);
1611*4882a593Smuzhiyun 	INIT_LIST_HEAD(&ar->tx_queue_submitted);
1612*4882a593Smuzhiyun 	spin_lock_init(&ar->tx_data_list_lock);
1613*4882a593Smuzhiyun 	atomic_set(&ar->tx_nr_total, 0);
1614*4882a593Smuzhiyun 	atomic_set(&ar->tx_nr_pending, 0);
1615*4882a593Smuzhiyun 	init_waitqueue_head(&ar->tx_flush_waitq);
1616*4882a593Smuzhiyun 
1617*4882a593Smuzhiyun 	atomic_set(&ar->rx_data_free_cnt, 0);
1618*4882a593Smuzhiyun 	INIT_WORK(&ar->rx_refill_work, ar5523_rx_refill_work);
1619*4882a593Smuzhiyun 	INIT_LIST_HEAD(&ar->rx_data_free);
1620*4882a593Smuzhiyun 	INIT_LIST_HEAD(&ar->rx_data_used);
1621*4882a593Smuzhiyun 	spin_lock_init(&ar->rx_data_list_lock);
1622*4882a593Smuzhiyun 
1623*4882a593Smuzhiyun 	ar->wq = create_singlethread_workqueue("ar5523");
1624*4882a593Smuzhiyun 	if (!ar->wq) {
1625*4882a593Smuzhiyun 		ar5523_err(ar, "Could not create wq\n");
1626*4882a593Smuzhiyun 		goto out_free_ar;
1627*4882a593Smuzhiyun 	}
1628*4882a593Smuzhiyun 
1629*4882a593Smuzhiyun 	error = ar5523_alloc_rx_bufs(ar);
1630*4882a593Smuzhiyun 	if (error) {
1631*4882a593Smuzhiyun 		ar5523_err(ar, "Could not allocate rx buffers\n");
1632*4882a593Smuzhiyun 		goto out_free_wq;
1633*4882a593Smuzhiyun 	}
1634*4882a593Smuzhiyun 
1635*4882a593Smuzhiyun 	error = ar5523_alloc_rx_cmd(ar);
1636*4882a593Smuzhiyun 	if (error) {
1637*4882a593Smuzhiyun 		ar5523_err(ar, "Could not allocate rx command buffers\n");
1638*4882a593Smuzhiyun 		goto out_free_rx_bufs;
1639*4882a593Smuzhiyun 	}
1640*4882a593Smuzhiyun 
1641*4882a593Smuzhiyun 	error = ar5523_alloc_tx_cmd(ar);
1642*4882a593Smuzhiyun 	if (error) {
1643*4882a593Smuzhiyun 		ar5523_err(ar, "Could not allocate tx command buffers\n");
1644*4882a593Smuzhiyun 		goto out_free_rx_cmd;
1645*4882a593Smuzhiyun 	}
1646*4882a593Smuzhiyun 
1647*4882a593Smuzhiyun 	error = ar5523_submit_rx_cmd(ar);
1648*4882a593Smuzhiyun 	if (error) {
1649*4882a593Smuzhiyun 		ar5523_err(ar, "Failed to submit rx cmd\n");
1650*4882a593Smuzhiyun 		goto out_free_tx_cmd;
1651*4882a593Smuzhiyun 	}
1652*4882a593Smuzhiyun 
1653*4882a593Smuzhiyun 	/*
1654*4882a593Smuzhiyun 	 * We're now ready to send/receive firmware commands.
1655*4882a593Smuzhiyun 	 */
1656*4882a593Smuzhiyun 	error = ar5523_host_available(ar);
1657*4882a593Smuzhiyun 	if (error) {
1658*4882a593Smuzhiyun 		ar5523_err(ar, "could not initialize adapter\n");
1659*4882a593Smuzhiyun 		goto out_cancel_rx_cmd;
1660*4882a593Smuzhiyun 	}
1661*4882a593Smuzhiyun 
1662*4882a593Smuzhiyun 	error = ar5523_get_max_rxsz(ar);
1663*4882a593Smuzhiyun 	if (error) {
1664*4882a593Smuzhiyun 		ar5523_err(ar, "could not get caps from adapter\n");
1665*4882a593Smuzhiyun 		goto out_cancel_rx_cmd;
1666*4882a593Smuzhiyun 	}
1667*4882a593Smuzhiyun 
1668*4882a593Smuzhiyun 	error = ar5523_get_devcap(ar);
1669*4882a593Smuzhiyun 	if (error) {
1670*4882a593Smuzhiyun 		ar5523_err(ar, "could not get caps from adapter\n");
1671*4882a593Smuzhiyun 		goto out_cancel_rx_cmd;
1672*4882a593Smuzhiyun 	}
1673*4882a593Smuzhiyun 
1674*4882a593Smuzhiyun 	error = ar5523_get_devstatus(ar);
1675*4882a593Smuzhiyun 	if (error != 0) {
1676*4882a593Smuzhiyun 		ar5523_err(ar, "could not get device status\n");
1677*4882a593Smuzhiyun 		goto out_cancel_rx_cmd;
1678*4882a593Smuzhiyun 	}
1679*4882a593Smuzhiyun 
1680*4882a593Smuzhiyun 	ar5523_info(ar, "MAC/BBP AR5523, RF AR%c112\n",
1681*4882a593Smuzhiyun 			(id->driver_info & AR5523_FLAG_ABG) ? '5' : '2');
1682*4882a593Smuzhiyun 
1683*4882a593Smuzhiyun 	ar->vif = NULL;
1684*4882a593Smuzhiyun 	ieee80211_hw_set(hw, HAS_RATE_CONTROL);
1685*4882a593Smuzhiyun 	ieee80211_hw_set(hw, RX_INCLUDES_FCS);
1686*4882a593Smuzhiyun 	ieee80211_hw_set(hw, SIGNAL_DBM);
1687*4882a593Smuzhiyun 	hw->extra_tx_headroom = sizeof(struct ar5523_tx_desc) +
1688*4882a593Smuzhiyun 				sizeof(struct ar5523_chunk);
1689*4882a593Smuzhiyun 	hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
1690*4882a593Smuzhiyun 	hw->queues = 1;
1691*4882a593Smuzhiyun 
1692*4882a593Smuzhiyun 	error = ar5523_init_modes(ar);
1693*4882a593Smuzhiyun 	if (error)
1694*4882a593Smuzhiyun 		goto out_cancel_rx_cmd;
1695*4882a593Smuzhiyun 
1696*4882a593Smuzhiyun 	wiphy_ext_feature_set(hw->wiphy, NL80211_EXT_FEATURE_CQM_RSSI_LIST);
1697*4882a593Smuzhiyun 
1698*4882a593Smuzhiyun 	usb_set_intfdata(intf, hw);
1699*4882a593Smuzhiyun 
1700*4882a593Smuzhiyun 	error = ieee80211_register_hw(hw);
1701*4882a593Smuzhiyun 	if (error) {
1702*4882a593Smuzhiyun 		ar5523_err(ar, "could not register device\n");
1703*4882a593Smuzhiyun 		goto out_cancel_rx_cmd;
1704*4882a593Smuzhiyun 	}
1705*4882a593Smuzhiyun 
1706*4882a593Smuzhiyun 	ar5523_info(ar, "Found and initialized AR5523 device\n");
1707*4882a593Smuzhiyun 	return 0;
1708*4882a593Smuzhiyun 
1709*4882a593Smuzhiyun out_cancel_rx_cmd:
1710*4882a593Smuzhiyun 	ar5523_cancel_rx_cmd(ar);
1711*4882a593Smuzhiyun out_free_tx_cmd:
1712*4882a593Smuzhiyun 	ar5523_free_tx_cmd(ar);
1713*4882a593Smuzhiyun out_free_rx_cmd:
1714*4882a593Smuzhiyun 	ar5523_free_rx_cmd(ar);
1715*4882a593Smuzhiyun out_free_rx_bufs:
1716*4882a593Smuzhiyun 	ar5523_free_rx_bufs(ar);
1717*4882a593Smuzhiyun out_free_wq:
1718*4882a593Smuzhiyun 	destroy_workqueue(ar->wq);
1719*4882a593Smuzhiyun out_free_ar:
1720*4882a593Smuzhiyun 	ieee80211_free_hw(hw);
1721*4882a593Smuzhiyun out:
1722*4882a593Smuzhiyun 	return error;
1723*4882a593Smuzhiyun }
1724*4882a593Smuzhiyun 
ar5523_disconnect(struct usb_interface * intf)1725*4882a593Smuzhiyun static void ar5523_disconnect(struct usb_interface *intf)
1726*4882a593Smuzhiyun {
1727*4882a593Smuzhiyun 	struct ieee80211_hw *hw = usb_get_intfdata(intf);
1728*4882a593Smuzhiyun 	struct ar5523 *ar = hw->priv;
1729*4882a593Smuzhiyun 
1730*4882a593Smuzhiyun 	ar5523_dbg(ar, "detaching\n");
1731*4882a593Smuzhiyun 	set_bit(AR5523_USB_DISCONNECTED, &ar->flags);
1732*4882a593Smuzhiyun 
1733*4882a593Smuzhiyun 	ieee80211_unregister_hw(hw);
1734*4882a593Smuzhiyun 
1735*4882a593Smuzhiyun 	ar5523_cancel_rx_cmd(ar);
1736*4882a593Smuzhiyun 	ar5523_free_tx_cmd(ar);
1737*4882a593Smuzhiyun 	ar5523_free_rx_cmd(ar);
1738*4882a593Smuzhiyun 	ar5523_free_rx_bufs(ar);
1739*4882a593Smuzhiyun 
1740*4882a593Smuzhiyun 	destroy_workqueue(ar->wq);
1741*4882a593Smuzhiyun 
1742*4882a593Smuzhiyun 	ieee80211_free_hw(hw);
1743*4882a593Smuzhiyun 	usb_set_intfdata(intf, NULL);
1744*4882a593Smuzhiyun }
1745*4882a593Smuzhiyun 
1746*4882a593Smuzhiyun #define AR5523_DEVICE_UG(vendor, device) \
1747*4882a593Smuzhiyun 	{ USB_DEVICE((vendor), (device)) }, \
1748*4882a593Smuzhiyun 	{ USB_DEVICE((vendor), (device) + 1), \
1749*4882a593Smuzhiyun 		.driver_info = AR5523_FLAG_PRE_FIRMWARE }
1750*4882a593Smuzhiyun #define AR5523_DEVICE_UX(vendor, device) \
1751*4882a593Smuzhiyun 	{ USB_DEVICE((vendor), (device)), \
1752*4882a593Smuzhiyun 		.driver_info = AR5523_FLAG_ABG }, \
1753*4882a593Smuzhiyun 	{ USB_DEVICE((vendor), (device) + 1), \
1754*4882a593Smuzhiyun 		.driver_info = AR5523_FLAG_ABG|AR5523_FLAG_PRE_FIRMWARE }
1755*4882a593Smuzhiyun 
1756*4882a593Smuzhiyun static const struct usb_device_id ar5523_id_table[] = {
1757*4882a593Smuzhiyun 	AR5523_DEVICE_UG(0x168c, 0x0001),	/* Atheros / AR5523 */
1758*4882a593Smuzhiyun 	AR5523_DEVICE_UG(0x0cf3, 0x0001),	/* Atheros2 / AR5523_1 */
1759*4882a593Smuzhiyun 	AR5523_DEVICE_UG(0x0cf3, 0x0003),	/* Atheros2 / AR5523_2 */
1760*4882a593Smuzhiyun 	AR5523_DEVICE_UX(0x0cf3, 0x0005),	/* Atheros2 / AR5523_3 */
1761*4882a593Smuzhiyun 	AR5523_DEVICE_UG(0x0d8e, 0x7801),	/* Conceptronic / AR5523_1 */
1762*4882a593Smuzhiyun 	AR5523_DEVICE_UX(0x0d8e, 0x7811),	/* Conceptronic / AR5523_2 */
1763*4882a593Smuzhiyun 	AR5523_DEVICE_UX(0x2001, 0x3a00),	/* Dlink / DWLAG132 */
1764*4882a593Smuzhiyun 	AR5523_DEVICE_UG(0x2001, 0x3a02),	/* Dlink / DWLG132 */
1765*4882a593Smuzhiyun 	AR5523_DEVICE_UX(0x2001, 0x3a04),	/* Dlink / DWLAG122 */
1766*4882a593Smuzhiyun 	AR5523_DEVICE_UG(0x07d1, 0x3a07),	/* D-Link / WUA-2340 rev A1 */
1767*4882a593Smuzhiyun 	AR5523_DEVICE_UG(0x1690, 0x0712),	/* Gigaset / AR5523 */
1768*4882a593Smuzhiyun 	AR5523_DEVICE_UG(0x1690, 0x0710),	/* Gigaset / SMCWUSBTG */
1769*4882a593Smuzhiyun 	AR5523_DEVICE_UG(0x129b, 0x160b),	/* Gigaset / USB stick 108
1770*4882a593Smuzhiyun 						   (CyberTAN Technology) */
1771*4882a593Smuzhiyun 	AR5523_DEVICE_UG(0x16ab, 0x7801),	/* Globalsun / AR5523_1 */
1772*4882a593Smuzhiyun 	AR5523_DEVICE_UX(0x16ab, 0x7811),	/* Globalsun / AR5523_2 */
1773*4882a593Smuzhiyun 	AR5523_DEVICE_UG(0x0d8e, 0x7802),	/* Globalsun / AR5523_3 */
1774*4882a593Smuzhiyun 	AR5523_DEVICE_UX(0x0846, 0x4300),	/* Netgear / WG111U */
1775*4882a593Smuzhiyun 	AR5523_DEVICE_UG(0x0846, 0x4250),	/* Netgear / WG111T */
1776*4882a593Smuzhiyun 	AR5523_DEVICE_UG(0x0846, 0x5f00),	/* Netgear / WPN111 */
1777*4882a593Smuzhiyun 	AR5523_DEVICE_UG(0x083a, 0x4506),	/* SMC / EZ Connect
1778*4882a593Smuzhiyun 						   SMCWUSBT-G2 */
1779*4882a593Smuzhiyun 	AR5523_DEVICE_UG(0x157e, 0x3006),	/* Umedia / AR5523_1 */
1780*4882a593Smuzhiyun 	AR5523_DEVICE_UX(0x157e, 0x3205),	/* Umedia / AR5523_2 */
1781*4882a593Smuzhiyun 	AR5523_DEVICE_UG(0x157e, 0x3006),	/* Umedia / TEW444UBEU */
1782*4882a593Smuzhiyun 	AR5523_DEVICE_UG(0x1435, 0x0826),	/* Wistronneweb / AR5523_1 */
1783*4882a593Smuzhiyun 	AR5523_DEVICE_UX(0x1435, 0x0828),	/* Wistronneweb / AR5523_2 */
1784*4882a593Smuzhiyun 	AR5523_DEVICE_UG(0x0cde, 0x0012),	/* Zcom / AR5523 */
1785*4882a593Smuzhiyun 	AR5523_DEVICE_UG(0x1385, 0x4250),	/* Netgear3 / WG111T (2) */
1786*4882a593Smuzhiyun 	AR5523_DEVICE_UG(0x1385, 0x5f00),	/* Netgear / WPN111 */
1787*4882a593Smuzhiyun 	AR5523_DEVICE_UG(0x1385, 0x5f02),	/* Netgear / WPN111 */
1788*4882a593Smuzhiyun 	{ }
1789*4882a593Smuzhiyun };
1790*4882a593Smuzhiyun MODULE_DEVICE_TABLE(usb, ar5523_id_table);
1791*4882a593Smuzhiyun 
1792*4882a593Smuzhiyun static struct usb_driver ar5523_driver = {
1793*4882a593Smuzhiyun 	.name		= "ar5523",
1794*4882a593Smuzhiyun 	.id_table	= ar5523_id_table,
1795*4882a593Smuzhiyun 	.probe		= ar5523_probe,
1796*4882a593Smuzhiyun 	.disconnect	= ar5523_disconnect,
1797*4882a593Smuzhiyun };
1798*4882a593Smuzhiyun 
1799*4882a593Smuzhiyun module_usb_driver(ar5523_driver);
1800*4882a593Smuzhiyun 
1801*4882a593Smuzhiyun MODULE_LICENSE("Dual BSD/GPL");
1802*4882a593Smuzhiyun MODULE_FIRMWARE(AR5523_FIRMWARE_FILE);
1803