1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * phylink models the MAC to optional PHY connection, supporting
4*4882a593Smuzhiyun * technologies such as SFP cages where the PHY is hot-pluggable.
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * Copyright (C) 2015 Russell King
7*4882a593Smuzhiyun */
8*4882a593Smuzhiyun #include <linux/ethtool.h>
9*4882a593Smuzhiyun #include <linux/export.h>
10*4882a593Smuzhiyun #include <linux/gpio/consumer.h>
11*4882a593Smuzhiyun #include <linux/netdevice.h>
12*4882a593Smuzhiyun #include <linux/of.h>
13*4882a593Smuzhiyun #include <linux/of_mdio.h>
14*4882a593Smuzhiyun #include <linux/phy.h>
15*4882a593Smuzhiyun #include <linux/phy_fixed.h>
16*4882a593Smuzhiyun #include <linux/phylink.h>
17*4882a593Smuzhiyun #include <linux/rtnetlink.h>
18*4882a593Smuzhiyun #include <linux/spinlock.h>
19*4882a593Smuzhiyun #include <linux/timer.h>
20*4882a593Smuzhiyun #include <linux/workqueue.h>
21*4882a593Smuzhiyun
22*4882a593Smuzhiyun #include "sfp.h"
23*4882a593Smuzhiyun #include "swphy.h"
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun #define SUPPORTED_INTERFACES \
26*4882a593Smuzhiyun (SUPPORTED_TP | SUPPORTED_MII | SUPPORTED_FIBRE | \
27*4882a593Smuzhiyun SUPPORTED_BNC | SUPPORTED_AUI | SUPPORTED_Backplane)
28*4882a593Smuzhiyun #define ADVERTISED_INTERFACES \
29*4882a593Smuzhiyun (ADVERTISED_TP | ADVERTISED_MII | ADVERTISED_FIBRE | \
30*4882a593Smuzhiyun ADVERTISED_BNC | ADVERTISED_AUI | ADVERTISED_Backplane)
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun enum {
33*4882a593Smuzhiyun PHYLINK_DISABLE_STOPPED,
34*4882a593Smuzhiyun PHYLINK_DISABLE_LINK,
35*4882a593Smuzhiyun };
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun /**
38*4882a593Smuzhiyun * struct phylink - internal data type for phylink
39*4882a593Smuzhiyun */
40*4882a593Smuzhiyun struct phylink {
41*4882a593Smuzhiyun /* private: */
42*4882a593Smuzhiyun struct net_device *netdev;
43*4882a593Smuzhiyun const struct phylink_mac_ops *mac_ops;
44*4882a593Smuzhiyun const struct phylink_pcs_ops *pcs_ops;
45*4882a593Smuzhiyun struct phylink_config *config;
46*4882a593Smuzhiyun struct phylink_pcs *pcs;
47*4882a593Smuzhiyun struct device *dev;
48*4882a593Smuzhiyun unsigned int old_link_state:1;
49*4882a593Smuzhiyun
50*4882a593Smuzhiyun unsigned long phylink_disable_state; /* bitmask of disables */
51*4882a593Smuzhiyun struct phy_device *phydev;
52*4882a593Smuzhiyun phy_interface_t link_interface; /* PHY_INTERFACE_xxx */
53*4882a593Smuzhiyun u8 cfg_link_an_mode; /* MLO_AN_xxx */
54*4882a593Smuzhiyun u8 cur_link_an_mode;
55*4882a593Smuzhiyun u8 link_port; /* The current non-phy ethtool port */
56*4882a593Smuzhiyun __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun /* The link configuration settings */
59*4882a593Smuzhiyun struct phylink_link_state link_config;
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun /* The current settings */
62*4882a593Smuzhiyun phy_interface_t cur_interface;
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun struct gpio_desc *link_gpio;
65*4882a593Smuzhiyun unsigned int link_irq;
66*4882a593Smuzhiyun struct timer_list link_poll;
67*4882a593Smuzhiyun void (*get_fixed_state)(struct net_device *dev,
68*4882a593Smuzhiyun struct phylink_link_state *s);
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun struct mutex state_mutex;
71*4882a593Smuzhiyun struct phylink_link_state phy_state;
72*4882a593Smuzhiyun struct work_struct resolve;
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun bool mac_link_dropped;
75*4882a593Smuzhiyun
76*4882a593Smuzhiyun struct sfp_bus *sfp_bus;
77*4882a593Smuzhiyun bool sfp_may_have_phy;
78*4882a593Smuzhiyun __ETHTOOL_DECLARE_LINK_MODE_MASK(sfp_support);
79*4882a593Smuzhiyun u8 sfp_port;
80*4882a593Smuzhiyun };
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun #define phylink_printk(level, pl, fmt, ...) \
83*4882a593Smuzhiyun do { \
84*4882a593Smuzhiyun if ((pl)->config->type == PHYLINK_NETDEV) \
85*4882a593Smuzhiyun netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \
86*4882a593Smuzhiyun else if ((pl)->config->type == PHYLINK_DEV) \
87*4882a593Smuzhiyun dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \
88*4882a593Smuzhiyun } while (0)
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun #define phylink_err(pl, fmt, ...) \
91*4882a593Smuzhiyun phylink_printk(KERN_ERR, pl, fmt, ##__VA_ARGS__)
92*4882a593Smuzhiyun #define phylink_warn(pl, fmt, ...) \
93*4882a593Smuzhiyun phylink_printk(KERN_WARNING, pl, fmt, ##__VA_ARGS__)
94*4882a593Smuzhiyun #define phylink_info(pl, fmt, ...) \
95*4882a593Smuzhiyun phylink_printk(KERN_INFO, pl, fmt, ##__VA_ARGS__)
96*4882a593Smuzhiyun #if defined(CONFIG_DYNAMIC_DEBUG)
97*4882a593Smuzhiyun #define phylink_dbg(pl, fmt, ...) \
98*4882a593Smuzhiyun do { \
99*4882a593Smuzhiyun if ((pl)->config->type == PHYLINK_NETDEV) \
100*4882a593Smuzhiyun netdev_dbg((pl)->netdev, fmt, ##__VA_ARGS__); \
101*4882a593Smuzhiyun else if ((pl)->config->type == PHYLINK_DEV) \
102*4882a593Smuzhiyun dev_dbg((pl)->dev, fmt, ##__VA_ARGS__); \
103*4882a593Smuzhiyun } while (0)
104*4882a593Smuzhiyun #elif defined(DEBUG)
105*4882a593Smuzhiyun #define phylink_dbg(pl, fmt, ...) \
106*4882a593Smuzhiyun phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__)
107*4882a593Smuzhiyun #else
108*4882a593Smuzhiyun #define phylink_dbg(pl, fmt, ...) \
109*4882a593Smuzhiyun ({ \
110*4882a593Smuzhiyun if (0) \
111*4882a593Smuzhiyun phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__); \
112*4882a593Smuzhiyun })
113*4882a593Smuzhiyun #endif
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun /**
116*4882a593Smuzhiyun * phylink_set_port_modes() - set the port type modes in the ethtool mask
117*4882a593Smuzhiyun * @mask: ethtool link mode mask
118*4882a593Smuzhiyun *
119*4882a593Smuzhiyun * Sets all the port type modes in the ethtool mask. MAC drivers should
120*4882a593Smuzhiyun * use this in their 'validate' callback.
121*4882a593Smuzhiyun */
phylink_set_port_modes(unsigned long * mask)122*4882a593Smuzhiyun void phylink_set_port_modes(unsigned long *mask)
123*4882a593Smuzhiyun {
124*4882a593Smuzhiyun phylink_set(mask, TP);
125*4882a593Smuzhiyun phylink_set(mask, AUI);
126*4882a593Smuzhiyun phylink_set(mask, MII);
127*4882a593Smuzhiyun phylink_set(mask, FIBRE);
128*4882a593Smuzhiyun phylink_set(mask, BNC);
129*4882a593Smuzhiyun phylink_set(mask, Backplane);
130*4882a593Smuzhiyun }
131*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(phylink_set_port_modes);
132*4882a593Smuzhiyun
phylink_is_empty_linkmode(const unsigned long * linkmode)133*4882a593Smuzhiyun static int phylink_is_empty_linkmode(const unsigned long *linkmode)
134*4882a593Smuzhiyun {
135*4882a593Smuzhiyun __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp) = { 0, };
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun phylink_set_port_modes(tmp);
138*4882a593Smuzhiyun phylink_set(tmp, Autoneg);
139*4882a593Smuzhiyun phylink_set(tmp, Pause);
140*4882a593Smuzhiyun phylink_set(tmp, Asym_Pause);
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun return linkmode_subset(linkmode, tmp);
143*4882a593Smuzhiyun }
144*4882a593Smuzhiyun
phylink_an_mode_str(unsigned int mode)145*4882a593Smuzhiyun static const char *phylink_an_mode_str(unsigned int mode)
146*4882a593Smuzhiyun {
147*4882a593Smuzhiyun static const char *modestr[] = {
148*4882a593Smuzhiyun [MLO_AN_PHY] = "phy",
149*4882a593Smuzhiyun [MLO_AN_FIXED] = "fixed",
150*4882a593Smuzhiyun [MLO_AN_INBAND] = "inband",
151*4882a593Smuzhiyun };
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun return mode < ARRAY_SIZE(modestr) ? modestr[mode] : "unknown";
154*4882a593Smuzhiyun }
155*4882a593Smuzhiyun
phylink_validate(struct phylink * pl,unsigned long * supported,struct phylink_link_state * state)156*4882a593Smuzhiyun static int phylink_validate(struct phylink *pl, unsigned long *supported,
157*4882a593Smuzhiyun struct phylink_link_state *state)
158*4882a593Smuzhiyun {
159*4882a593Smuzhiyun pl->mac_ops->validate(pl->config, supported, state);
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun return phylink_is_empty_linkmode(supported) ? -EINVAL : 0;
162*4882a593Smuzhiyun }
163*4882a593Smuzhiyun
phylink_parse_fixedlink(struct phylink * pl,struct fwnode_handle * fwnode)164*4882a593Smuzhiyun static int phylink_parse_fixedlink(struct phylink *pl,
165*4882a593Smuzhiyun struct fwnode_handle *fwnode)
166*4882a593Smuzhiyun {
167*4882a593Smuzhiyun struct fwnode_handle *fixed_node;
168*4882a593Smuzhiyun const struct phy_setting *s;
169*4882a593Smuzhiyun struct gpio_desc *desc;
170*4882a593Smuzhiyun u32 speed;
171*4882a593Smuzhiyun int ret;
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun fixed_node = fwnode_get_named_child_node(fwnode, "fixed-link");
174*4882a593Smuzhiyun if (fixed_node) {
175*4882a593Smuzhiyun ret = fwnode_property_read_u32(fixed_node, "speed", &speed);
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun pl->link_config.speed = speed;
178*4882a593Smuzhiyun pl->link_config.duplex = DUPLEX_HALF;
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun if (fwnode_property_read_bool(fixed_node, "full-duplex"))
181*4882a593Smuzhiyun pl->link_config.duplex = DUPLEX_FULL;
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun /* We treat the "pause" and "asym-pause" terminology as
184*4882a593Smuzhiyun * defining the link partner's ability. */
185*4882a593Smuzhiyun if (fwnode_property_read_bool(fixed_node, "pause"))
186*4882a593Smuzhiyun __set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
187*4882a593Smuzhiyun pl->link_config.lp_advertising);
188*4882a593Smuzhiyun if (fwnode_property_read_bool(fixed_node, "asym-pause"))
189*4882a593Smuzhiyun __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
190*4882a593Smuzhiyun pl->link_config.lp_advertising);
191*4882a593Smuzhiyun
192*4882a593Smuzhiyun if (ret == 0) {
193*4882a593Smuzhiyun desc = fwnode_gpiod_get_index(fixed_node, "link", 0,
194*4882a593Smuzhiyun GPIOD_IN, "?");
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun if (!IS_ERR(desc))
197*4882a593Smuzhiyun pl->link_gpio = desc;
198*4882a593Smuzhiyun else if (desc == ERR_PTR(-EPROBE_DEFER))
199*4882a593Smuzhiyun ret = -EPROBE_DEFER;
200*4882a593Smuzhiyun }
201*4882a593Smuzhiyun fwnode_handle_put(fixed_node);
202*4882a593Smuzhiyun
203*4882a593Smuzhiyun if (ret)
204*4882a593Smuzhiyun return ret;
205*4882a593Smuzhiyun } else {
206*4882a593Smuzhiyun u32 prop[5];
207*4882a593Smuzhiyun
208*4882a593Smuzhiyun ret = fwnode_property_read_u32_array(fwnode, "fixed-link",
209*4882a593Smuzhiyun NULL, 0);
210*4882a593Smuzhiyun if (ret != ARRAY_SIZE(prop)) {
211*4882a593Smuzhiyun phylink_err(pl, "broken fixed-link?\n");
212*4882a593Smuzhiyun return -EINVAL;
213*4882a593Smuzhiyun }
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun ret = fwnode_property_read_u32_array(fwnode, "fixed-link",
216*4882a593Smuzhiyun prop, ARRAY_SIZE(prop));
217*4882a593Smuzhiyun if (!ret) {
218*4882a593Smuzhiyun pl->link_config.duplex = prop[1] ?
219*4882a593Smuzhiyun DUPLEX_FULL : DUPLEX_HALF;
220*4882a593Smuzhiyun pl->link_config.speed = prop[2];
221*4882a593Smuzhiyun if (prop[3])
222*4882a593Smuzhiyun __set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
223*4882a593Smuzhiyun pl->link_config.lp_advertising);
224*4882a593Smuzhiyun if (prop[4])
225*4882a593Smuzhiyun __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
226*4882a593Smuzhiyun pl->link_config.lp_advertising);
227*4882a593Smuzhiyun }
228*4882a593Smuzhiyun }
229*4882a593Smuzhiyun
230*4882a593Smuzhiyun if (pl->link_config.speed > SPEED_1000 &&
231*4882a593Smuzhiyun pl->link_config.duplex != DUPLEX_FULL)
232*4882a593Smuzhiyun phylink_warn(pl, "fixed link specifies half duplex for %dMbps link?\n",
233*4882a593Smuzhiyun pl->link_config.speed);
234*4882a593Smuzhiyun
235*4882a593Smuzhiyun bitmap_fill(pl->supported, __ETHTOOL_LINK_MODE_MASK_NBITS);
236*4882a593Smuzhiyun linkmode_copy(pl->link_config.advertising, pl->supported);
237*4882a593Smuzhiyun phylink_validate(pl, pl->supported, &pl->link_config);
238*4882a593Smuzhiyun
239*4882a593Smuzhiyun s = phy_lookup_setting(pl->link_config.speed, pl->link_config.duplex,
240*4882a593Smuzhiyun pl->supported, true);
241*4882a593Smuzhiyun linkmode_zero(pl->supported);
242*4882a593Smuzhiyun phylink_set(pl->supported, MII);
243*4882a593Smuzhiyun phylink_set(pl->supported, Pause);
244*4882a593Smuzhiyun phylink_set(pl->supported, Asym_Pause);
245*4882a593Smuzhiyun phylink_set(pl->supported, Autoneg);
246*4882a593Smuzhiyun if (s) {
247*4882a593Smuzhiyun __set_bit(s->bit, pl->supported);
248*4882a593Smuzhiyun __set_bit(s->bit, pl->link_config.lp_advertising);
249*4882a593Smuzhiyun } else {
250*4882a593Smuzhiyun phylink_warn(pl, "fixed link %s duplex %dMbps not recognised\n",
251*4882a593Smuzhiyun pl->link_config.duplex == DUPLEX_FULL ? "full" : "half",
252*4882a593Smuzhiyun pl->link_config.speed);
253*4882a593Smuzhiyun }
254*4882a593Smuzhiyun
255*4882a593Smuzhiyun linkmode_and(pl->link_config.advertising, pl->link_config.advertising,
256*4882a593Smuzhiyun pl->supported);
257*4882a593Smuzhiyun
258*4882a593Smuzhiyun pl->link_config.link = 1;
259*4882a593Smuzhiyun pl->link_config.an_complete = 1;
260*4882a593Smuzhiyun
261*4882a593Smuzhiyun return 0;
262*4882a593Smuzhiyun }
263*4882a593Smuzhiyun
phylink_parse_mode(struct phylink * pl,struct fwnode_handle * fwnode)264*4882a593Smuzhiyun static int phylink_parse_mode(struct phylink *pl, struct fwnode_handle *fwnode)
265*4882a593Smuzhiyun {
266*4882a593Smuzhiyun struct fwnode_handle *dn;
267*4882a593Smuzhiyun const char *managed;
268*4882a593Smuzhiyun
269*4882a593Smuzhiyun dn = fwnode_get_named_child_node(fwnode, "fixed-link");
270*4882a593Smuzhiyun if (dn || fwnode_property_present(fwnode, "fixed-link"))
271*4882a593Smuzhiyun pl->cfg_link_an_mode = MLO_AN_FIXED;
272*4882a593Smuzhiyun fwnode_handle_put(dn);
273*4882a593Smuzhiyun
274*4882a593Smuzhiyun if (fwnode_property_read_string(fwnode, "managed", &managed) == 0 &&
275*4882a593Smuzhiyun strcmp(managed, "in-band-status") == 0) {
276*4882a593Smuzhiyun if (pl->cfg_link_an_mode == MLO_AN_FIXED) {
277*4882a593Smuzhiyun phylink_err(pl,
278*4882a593Smuzhiyun "can't use both fixed-link and in-band-status\n");
279*4882a593Smuzhiyun return -EINVAL;
280*4882a593Smuzhiyun }
281*4882a593Smuzhiyun
282*4882a593Smuzhiyun linkmode_zero(pl->supported);
283*4882a593Smuzhiyun phylink_set(pl->supported, MII);
284*4882a593Smuzhiyun phylink_set(pl->supported, Autoneg);
285*4882a593Smuzhiyun phylink_set(pl->supported, Asym_Pause);
286*4882a593Smuzhiyun phylink_set(pl->supported, Pause);
287*4882a593Smuzhiyun pl->link_config.an_enabled = true;
288*4882a593Smuzhiyun pl->cfg_link_an_mode = MLO_AN_INBAND;
289*4882a593Smuzhiyun
290*4882a593Smuzhiyun switch (pl->link_config.interface) {
291*4882a593Smuzhiyun case PHY_INTERFACE_MODE_SGMII:
292*4882a593Smuzhiyun case PHY_INTERFACE_MODE_QSGMII:
293*4882a593Smuzhiyun phylink_set(pl->supported, 10baseT_Half);
294*4882a593Smuzhiyun phylink_set(pl->supported, 10baseT_Full);
295*4882a593Smuzhiyun phylink_set(pl->supported, 100baseT_Half);
296*4882a593Smuzhiyun phylink_set(pl->supported, 100baseT_Full);
297*4882a593Smuzhiyun phylink_set(pl->supported, 1000baseT_Half);
298*4882a593Smuzhiyun phylink_set(pl->supported, 1000baseT_Full);
299*4882a593Smuzhiyun break;
300*4882a593Smuzhiyun
301*4882a593Smuzhiyun case PHY_INTERFACE_MODE_1000BASEX:
302*4882a593Smuzhiyun phylink_set(pl->supported, 1000baseX_Full);
303*4882a593Smuzhiyun break;
304*4882a593Smuzhiyun
305*4882a593Smuzhiyun case PHY_INTERFACE_MODE_2500BASEX:
306*4882a593Smuzhiyun phylink_set(pl->supported, 2500baseX_Full);
307*4882a593Smuzhiyun break;
308*4882a593Smuzhiyun
309*4882a593Smuzhiyun case PHY_INTERFACE_MODE_USXGMII:
310*4882a593Smuzhiyun case PHY_INTERFACE_MODE_10GKR:
311*4882a593Smuzhiyun case PHY_INTERFACE_MODE_10GBASER:
312*4882a593Smuzhiyun phylink_set(pl->supported, 10baseT_Half);
313*4882a593Smuzhiyun phylink_set(pl->supported, 10baseT_Full);
314*4882a593Smuzhiyun phylink_set(pl->supported, 100baseT_Half);
315*4882a593Smuzhiyun phylink_set(pl->supported, 100baseT_Full);
316*4882a593Smuzhiyun phylink_set(pl->supported, 1000baseT_Half);
317*4882a593Smuzhiyun phylink_set(pl->supported, 1000baseT_Full);
318*4882a593Smuzhiyun phylink_set(pl->supported, 1000baseX_Full);
319*4882a593Smuzhiyun phylink_set(pl->supported, 1000baseKX_Full);
320*4882a593Smuzhiyun phylink_set(pl->supported, 2500baseT_Full);
321*4882a593Smuzhiyun phylink_set(pl->supported, 2500baseX_Full);
322*4882a593Smuzhiyun phylink_set(pl->supported, 5000baseT_Full);
323*4882a593Smuzhiyun phylink_set(pl->supported, 10000baseT_Full);
324*4882a593Smuzhiyun phylink_set(pl->supported, 10000baseKR_Full);
325*4882a593Smuzhiyun phylink_set(pl->supported, 10000baseKX4_Full);
326*4882a593Smuzhiyun phylink_set(pl->supported, 10000baseCR_Full);
327*4882a593Smuzhiyun phylink_set(pl->supported, 10000baseSR_Full);
328*4882a593Smuzhiyun phylink_set(pl->supported, 10000baseLR_Full);
329*4882a593Smuzhiyun phylink_set(pl->supported, 10000baseLRM_Full);
330*4882a593Smuzhiyun phylink_set(pl->supported, 10000baseER_Full);
331*4882a593Smuzhiyun break;
332*4882a593Smuzhiyun
333*4882a593Smuzhiyun case PHY_INTERFACE_MODE_XLGMII:
334*4882a593Smuzhiyun phylink_set(pl->supported, 25000baseCR_Full);
335*4882a593Smuzhiyun phylink_set(pl->supported, 25000baseKR_Full);
336*4882a593Smuzhiyun phylink_set(pl->supported, 25000baseSR_Full);
337*4882a593Smuzhiyun phylink_set(pl->supported, 40000baseKR4_Full);
338*4882a593Smuzhiyun phylink_set(pl->supported, 40000baseCR4_Full);
339*4882a593Smuzhiyun phylink_set(pl->supported, 40000baseSR4_Full);
340*4882a593Smuzhiyun phylink_set(pl->supported, 40000baseLR4_Full);
341*4882a593Smuzhiyun phylink_set(pl->supported, 50000baseCR2_Full);
342*4882a593Smuzhiyun phylink_set(pl->supported, 50000baseKR2_Full);
343*4882a593Smuzhiyun phylink_set(pl->supported, 50000baseSR2_Full);
344*4882a593Smuzhiyun phylink_set(pl->supported, 50000baseKR_Full);
345*4882a593Smuzhiyun phylink_set(pl->supported, 50000baseSR_Full);
346*4882a593Smuzhiyun phylink_set(pl->supported, 50000baseCR_Full);
347*4882a593Smuzhiyun phylink_set(pl->supported, 50000baseLR_ER_FR_Full);
348*4882a593Smuzhiyun phylink_set(pl->supported, 50000baseDR_Full);
349*4882a593Smuzhiyun phylink_set(pl->supported, 100000baseKR4_Full);
350*4882a593Smuzhiyun phylink_set(pl->supported, 100000baseSR4_Full);
351*4882a593Smuzhiyun phylink_set(pl->supported, 100000baseCR4_Full);
352*4882a593Smuzhiyun phylink_set(pl->supported, 100000baseLR4_ER4_Full);
353*4882a593Smuzhiyun phylink_set(pl->supported, 100000baseKR2_Full);
354*4882a593Smuzhiyun phylink_set(pl->supported, 100000baseSR2_Full);
355*4882a593Smuzhiyun phylink_set(pl->supported, 100000baseCR2_Full);
356*4882a593Smuzhiyun phylink_set(pl->supported, 100000baseLR2_ER2_FR2_Full);
357*4882a593Smuzhiyun phylink_set(pl->supported, 100000baseDR2_Full);
358*4882a593Smuzhiyun break;
359*4882a593Smuzhiyun
360*4882a593Smuzhiyun default:
361*4882a593Smuzhiyun phylink_err(pl,
362*4882a593Smuzhiyun "incorrect link mode %s for in-band status\n",
363*4882a593Smuzhiyun phy_modes(pl->link_config.interface));
364*4882a593Smuzhiyun return -EINVAL;
365*4882a593Smuzhiyun }
366*4882a593Smuzhiyun
367*4882a593Smuzhiyun linkmode_copy(pl->link_config.advertising, pl->supported);
368*4882a593Smuzhiyun
369*4882a593Smuzhiyun if (phylink_validate(pl, pl->supported, &pl->link_config)) {
370*4882a593Smuzhiyun phylink_err(pl,
371*4882a593Smuzhiyun "failed to validate link configuration for in-band status\n");
372*4882a593Smuzhiyun return -EINVAL;
373*4882a593Smuzhiyun }
374*4882a593Smuzhiyun
375*4882a593Smuzhiyun /* Check if MAC/PCS also supports Autoneg. */
376*4882a593Smuzhiyun pl->link_config.an_enabled = phylink_test(pl->supported, Autoneg);
377*4882a593Smuzhiyun }
378*4882a593Smuzhiyun
379*4882a593Smuzhiyun return 0;
380*4882a593Smuzhiyun }
381*4882a593Smuzhiyun
phylink_apply_manual_flow(struct phylink * pl,struct phylink_link_state * state)382*4882a593Smuzhiyun static void phylink_apply_manual_flow(struct phylink *pl,
383*4882a593Smuzhiyun struct phylink_link_state *state)
384*4882a593Smuzhiyun {
385*4882a593Smuzhiyun /* If autoneg is disabled, pause AN is also disabled */
386*4882a593Smuzhiyun if (!state->an_enabled)
387*4882a593Smuzhiyun state->pause &= ~MLO_PAUSE_AN;
388*4882a593Smuzhiyun
389*4882a593Smuzhiyun /* Manual configuration of pause modes */
390*4882a593Smuzhiyun if (!(pl->link_config.pause & MLO_PAUSE_AN))
391*4882a593Smuzhiyun state->pause = pl->link_config.pause;
392*4882a593Smuzhiyun }
393*4882a593Smuzhiyun
phylink_resolve_flow(struct phylink_link_state * state)394*4882a593Smuzhiyun static void phylink_resolve_flow(struct phylink_link_state *state)
395*4882a593Smuzhiyun {
396*4882a593Smuzhiyun bool tx_pause, rx_pause;
397*4882a593Smuzhiyun
398*4882a593Smuzhiyun state->pause = MLO_PAUSE_NONE;
399*4882a593Smuzhiyun if (state->duplex == DUPLEX_FULL) {
400*4882a593Smuzhiyun linkmode_resolve_pause(state->advertising,
401*4882a593Smuzhiyun state->lp_advertising,
402*4882a593Smuzhiyun &tx_pause, &rx_pause);
403*4882a593Smuzhiyun if (tx_pause)
404*4882a593Smuzhiyun state->pause |= MLO_PAUSE_TX;
405*4882a593Smuzhiyun if (rx_pause)
406*4882a593Smuzhiyun state->pause |= MLO_PAUSE_RX;
407*4882a593Smuzhiyun }
408*4882a593Smuzhiyun }
409*4882a593Smuzhiyun
phylink_mac_config(struct phylink * pl,const struct phylink_link_state * state)410*4882a593Smuzhiyun static void phylink_mac_config(struct phylink *pl,
411*4882a593Smuzhiyun const struct phylink_link_state *state)
412*4882a593Smuzhiyun {
413*4882a593Smuzhiyun phylink_dbg(pl,
414*4882a593Smuzhiyun "%s: mode=%s/%s/%s/%s adv=%*pb pause=%02x link=%u an=%u\n",
415*4882a593Smuzhiyun __func__, phylink_an_mode_str(pl->cur_link_an_mode),
416*4882a593Smuzhiyun phy_modes(state->interface),
417*4882a593Smuzhiyun phy_speed_to_str(state->speed),
418*4882a593Smuzhiyun phy_duplex_to_str(state->duplex),
419*4882a593Smuzhiyun __ETHTOOL_LINK_MODE_MASK_NBITS, state->advertising,
420*4882a593Smuzhiyun state->pause, state->link, state->an_enabled);
421*4882a593Smuzhiyun
422*4882a593Smuzhiyun pl->mac_ops->mac_config(pl->config, pl->cur_link_an_mode, state);
423*4882a593Smuzhiyun }
424*4882a593Smuzhiyun
phylink_mac_pcs_an_restart(struct phylink * pl)425*4882a593Smuzhiyun static void phylink_mac_pcs_an_restart(struct phylink *pl)
426*4882a593Smuzhiyun {
427*4882a593Smuzhiyun if (pl->link_config.an_enabled &&
428*4882a593Smuzhiyun phy_interface_mode_is_8023z(pl->link_config.interface) &&
429*4882a593Smuzhiyun phylink_autoneg_inband(pl->cur_link_an_mode)) {
430*4882a593Smuzhiyun if (pl->pcs_ops)
431*4882a593Smuzhiyun pl->pcs_ops->pcs_an_restart(pl->pcs);
432*4882a593Smuzhiyun else
433*4882a593Smuzhiyun pl->mac_ops->mac_an_restart(pl->config);
434*4882a593Smuzhiyun }
435*4882a593Smuzhiyun }
436*4882a593Smuzhiyun
phylink_major_config(struct phylink * pl,bool restart,const struct phylink_link_state * state)437*4882a593Smuzhiyun static void phylink_major_config(struct phylink *pl, bool restart,
438*4882a593Smuzhiyun const struct phylink_link_state *state)
439*4882a593Smuzhiyun {
440*4882a593Smuzhiyun int err;
441*4882a593Smuzhiyun
442*4882a593Smuzhiyun phylink_dbg(pl, "major config %s\n", phy_modes(state->interface));
443*4882a593Smuzhiyun
444*4882a593Smuzhiyun if (pl->mac_ops->mac_prepare) {
445*4882a593Smuzhiyun err = pl->mac_ops->mac_prepare(pl->config, pl->cur_link_an_mode,
446*4882a593Smuzhiyun state->interface);
447*4882a593Smuzhiyun if (err < 0) {
448*4882a593Smuzhiyun phylink_err(pl, "mac_prepare failed: %pe\n",
449*4882a593Smuzhiyun ERR_PTR(err));
450*4882a593Smuzhiyun return;
451*4882a593Smuzhiyun }
452*4882a593Smuzhiyun }
453*4882a593Smuzhiyun
454*4882a593Smuzhiyun phylink_mac_config(pl, state);
455*4882a593Smuzhiyun
456*4882a593Smuzhiyun if (pl->pcs_ops) {
457*4882a593Smuzhiyun err = pl->pcs_ops->pcs_config(pl->pcs, pl->cur_link_an_mode,
458*4882a593Smuzhiyun state->interface,
459*4882a593Smuzhiyun state->advertising,
460*4882a593Smuzhiyun !!(pl->link_config.pause &
461*4882a593Smuzhiyun MLO_PAUSE_AN));
462*4882a593Smuzhiyun if (err < 0)
463*4882a593Smuzhiyun phylink_err(pl, "pcs_config failed: %pe\n",
464*4882a593Smuzhiyun ERR_PTR(err));
465*4882a593Smuzhiyun if (err > 0)
466*4882a593Smuzhiyun restart = true;
467*4882a593Smuzhiyun }
468*4882a593Smuzhiyun if (restart)
469*4882a593Smuzhiyun phylink_mac_pcs_an_restart(pl);
470*4882a593Smuzhiyun
471*4882a593Smuzhiyun if (pl->mac_ops->mac_finish) {
472*4882a593Smuzhiyun err = pl->mac_ops->mac_finish(pl->config, pl->cur_link_an_mode,
473*4882a593Smuzhiyun state->interface);
474*4882a593Smuzhiyun if (err < 0)
475*4882a593Smuzhiyun phylink_err(pl, "mac_finish failed: %pe\n",
476*4882a593Smuzhiyun ERR_PTR(err));
477*4882a593Smuzhiyun }
478*4882a593Smuzhiyun }
479*4882a593Smuzhiyun
480*4882a593Smuzhiyun /*
481*4882a593Smuzhiyun * Reconfigure for a change of inband advertisement.
482*4882a593Smuzhiyun * If we have a separate PCS, we only need to call its pcs_config() method,
483*4882a593Smuzhiyun * and then restart AN if it indicates something changed. Otherwise, we do
484*4882a593Smuzhiyun * the full MAC reconfiguration.
485*4882a593Smuzhiyun */
phylink_change_inband_advert(struct phylink * pl)486*4882a593Smuzhiyun static int phylink_change_inband_advert(struct phylink *pl)
487*4882a593Smuzhiyun {
488*4882a593Smuzhiyun int ret;
489*4882a593Smuzhiyun
490*4882a593Smuzhiyun if (test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state))
491*4882a593Smuzhiyun return 0;
492*4882a593Smuzhiyun
493*4882a593Smuzhiyun if (!pl->pcs_ops) {
494*4882a593Smuzhiyun /* Legacy method */
495*4882a593Smuzhiyun phylink_mac_config(pl, &pl->link_config);
496*4882a593Smuzhiyun phylink_mac_pcs_an_restart(pl);
497*4882a593Smuzhiyun return 0;
498*4882a593Smuzhiyun }
499*4882a593Smuzhiyun
500*4882a593Smuzhiyun phylink_dbg(pl, "%s: mode=%s/%s adv=%*pb pause=%02x\n", __func__,
501*4882a593Smuzhiyun phylink_an_mode_str(pl->cur_link_an_mode),
502*4882a593Smuzhiyun phy_modes(pl->link_config.interface),
503*4882a593Smuzhiyun __ETHTOOL_LINK_MODE_MASK_NBITS, pl->link_config.advertising,
504*4882a593Smuzhiyun pl->link_config.pause);
505*4882a593Smuzhiyun
506*4882a593Smuzhiyun /* Modern PCS-based method; update the advert at the PCS, and
507*4882a593Smuzhiyun * restart negotiation if the pcs_config() helper indicates that
508*4882a593Smuzhiyun * the programmed advertisement has changed.
509*4882a593Smuzhiyun */
510*4882a593Smuzhiyun ret = pl->pcs_ops->pcs_config(pl->pcs, pl->cur_link_an_mode,
511*4882a593Smuzhiyun pl->link_config.interface,
512*4882a593Smuzhiyun pl->link_config.advertising,
513*4882a593Smuzhiyun !!(pl->link_config.pause & MLO_PAUSE_AN));
514*4882a593Smuzhiyun if (ret < 0)
515*4882a593Smuzhiyun return ret;
516*4882a593Smuzhiyun
517*4882a593Smuzhiyun if (ret > 0)
518*4882a593Smuzhiyun phylink_mac_pcs_an_restart(pl);
519*4882a593Smuzhiyun
520*4882a593Smuzhiyun return 0;
521*4882a593Smuzhiyun }
522*4882a593Smuzhiyun
phylink_mac_pcs_get_state(struct phylink * pl,struct phylink_link_state * state)523*4882a593Smuzhiyun static void phylink_mac_pcs_get_state(struct phylink *pl,
524*4882a593Smuzhiyun struct phylink_link_state *state)
525*4882a593Smuzhiyun {
526*4882a593Smuzhiyun linkmode_copy(state->advertising, pl->link_config.advertising);
527*4882a593Smuzhiyun linkmode_zero(state->lp_advertising);
528*4882a593Smuzhiyun state->interface = pl->link_config.interface;
529*4882a593Smuzhiyun state->an_enabled = pl->link_config.an_enabled;
530*4882a593Smuzhiyun state->speed = SPEED_UNKNOWN;
531*4882a593Smuzhiyun state->duplex = DUPLEX_UNKNOWN;
532*4882a593Smuzhiyun state->pause = MLO_PAUSE_NONE;
533*4882a593Smuzhiyun state->an_complete = 0;
534*4882a593Smuzhiyun state->link = 1;
535*4882a593Smuzhiyun
536*4882a593Smuzhiyun if (pl->pcs_ops)
537*4882a593Smuzhiyun pl->pcs_ops->pcs_get_state(pl->pcs, state);
538*4882a593Smuzhiyun else if (pl->mac_ops->mac_pcs_get_state)
539*4882a593Smuzhiyun pl->mac_ops->mac_pcs_get_state(pl->config, state);
540*4882a593Smuzhiyun else
541*4882a593Smuzhiyun state->link = 0;
542*4882a593Smuzhiyun }
543*4882a593Smuzhiyun
544*4882a593Smuzhiyun /* The fixed state is... fixed except for the link state,
545*4882a593Smuzhiyun * which may be determined by a GPIO or a callback.
546*4882a593Smuzhiyun */
phylink_get_fixed_state(struct phylink * pl,struct phylink_link_state * state)547*4882a593Smuzhiyun static void phylink_get_fixed_state(struct phylink *pl,
548*4882a593Smuzhiyun struct phylink_link_state *state)
549*4882a593Smuzhiyun {
550*4882a593Smuzhiyun *state = pl->link_config;
551*4882a593Smuzhiyun if (pl->config->get_fixed_state)
552*4882a593Smuzhiyun pl->config->get_fixed_state(pl->config, state);
553*4882a593Smuzhiyun else if (pl->link_gpio)
554*4882a593Smuzhiyun state->link = !!gpiod_get_value_cansleep(pl->link_gpio);
555*4882a593Smuzhiyun
556*4882a593Smuzhiyun phylink_resolve_flow(state);
557*4882a593Smuzhiyun }
558*4882a593Smuzhiyun
phylink_mac_initial_config(struct phylink * pl,bool force_restart)559*4882a593Smuzhiyun static void phylink_mac_initial_config(struct phylink *pl, bool force_restart)
560*4882a593Smuzhiyun {
561*4882a593Smuzhiyun struct phylink_link_state link_state;
562*4882a593Smuzhiyun
563*4882a593Smuzhiyun switch (pl->cur_link_an_mode) {
564*4882a593Smuzhiyun case MLO_AN_PHY:
565*4882a593Smuzhiyun link_state = pl->phy_state;
566*4882a593Smuzhiyun break;
567*4882a593Smuzhiyun
568*4882a593Smuzhiyun case MLO_AN_FIXED:
569*4882a593Smuzhiyun phylink_get_fixed_state(pl, &link_state);
570*4882a593Smuzhiyun break;
571*4882a593Smuzhiyun
572*4882a593Smuzhiyun case MLO_AN_INBAND:
573*4882a593Smuzhiyun link_state = pl->link_config;
574*4882a593Smuzhiyun if (link_state.interface == PHY_INTERFACE_MODE_SGMII)
575*4882a593Smuzhiyun link_state.pause = MLO_PAUSE_NONE;
576*4882a593Smuzhiyun break;
577*4882a593Smuzhiyun
578*4882a593Smuzhiyun default: /* can't happen */
579*4882a593Smuzhiyun return;
580*4882a593Smuzhiyun }
581*4882a593Smuzhiyun
582*4882a593Smuzhiyun link_state.link = false;
583*4882a593Smuzhiyun
584*4882a593Smuzhiyun phylink_apply_manual_flow(pl, &link_state);
585*4882a593Smuzhiyun phylink_major_config(pl, force_restart, &link_state);
586*4882a593Smuzhiyun }
587*4882a593Smuzhiyun
phylink_pause_to_str(int pause)588*4882a593Smuzhiyun static const char *phylink_pause_to_str(int pause)
589*4882a593Smuzhiyun {
590*4882a593Smuzhiyun switch (pause & MLO_PAUSE_TXRX_MASK) {
591*4882a593Smuzhiyun case MLO_PAUSE_TX | MLO_PAUSE_RX:
592*4882a593Smuzhiyun return "rx/tx";
593*4882a593Smuzhiyun case MLO_PAUSE_TX:
594*4882a593Smuzhiyun return "tx";
595*4882a593Smuzhiyun case MLO_PAUSE_RX:
596*4882a593Smuzhiyun return "rx";
597*4882a593Smuzhiyun default:
598*4882a593Smuzhiyun return "off";
599*4882a593Smuzhiyun }
600*4882a593Smuzhiyun }
601*4882a593Smuzhiyun
phylink_link_up(struct phylink * pl,struct phylink_link_state link_state)602*4882a593Smuzhiyun static void phylink_link_up(struct phylink *pl,
603*4882a593Smuzhiyun struct phylink_link_state link_state)
604*4882a593Smuzhiyun {
605*4882a593Smuzhiyun struct net_device *ndev = pl->netdev;
606*4882a593Smuzhiyun
607*4882a593Smuzhiyun pl->cur_interface = link_state.interface;
608*4882a593Smuzhiyun
609*4882a593Smuzhiyun if (pl->pcs_ops && pl->pcs_ops->pcs_link_up)
610*4882a593Smuzhiyun pl->pcs_ops->pcs_link_up(pl->pcs, pl->cur_link_an_mode,
611*4882a593Smuzhiyun pl->cur_interface,
612*4882a593Smuzhiyun link_state.speed, link_state.duplex);
613*4882a593Smuzhiyun
614*4882a593Smuzhiyun pl->mac_ops->mac_link_up(pl->config, pl->phydev,
615*4882a593Smuzhiyun pl->cur_link_an_mode, pl->cur_interface,
616*4882a593Smuzhiyun link_state.speed, link_state.duplex,
617*4882a593Smuzhiyun !!(link_state.pause & MLO_PAUSE_TX),
618*4882a593Smuzhiyun !!(link_state.pause & MLO_PAUSE_RX));
619*4882a593Smuzhiyun
620*4882a593Smuzhiyun if (ndev)
621*4882a593Smuzhiyun netif_carrier_on(ndev);
622*4882a593Smuzhiyun
623*4882a593Smuzhiyun phylink_info(pl,
624*4882a593Smuzhiyun "Link is Up - %s/%s - flow control %s\n",
625*4882a593Smuzhiyun phy_speed_to_str(link_state.speed),
626*4882a593Smuzhiyun phy_duplex_to_str(link_state.duplex),
627*4882a593Smuzhiyun phylink_pause_to_str(link_state.pause));
628*4882a593Smuzhiyun }
629*4882a593Smuzhiyun
phylink_link_down(struct phylink * pl)630*4882a593Smuzhiyun static void phylink_link_down(struct phylink *pl)
631*4882a593Smuzhiyun {
632*4882a593Smuzhiyun struct net_device *ndev = pl->netdev;
633*4882a593Smuzhiyun
634*4882a593Smuzhiyun if (ndev)
635*4882a593Smuzhiyun netif_carrier_off(ndev);
636*4882a593Smuzhiyun pl->mac_ops->mac_link_down(pl->config, pl->cur_link_an_mode,
637*4882a593Smuzhiyun pl->cur_interface);
638*4882a593Smuzhiyun phylink_info(pl, "Link is Down\n");
639*4882a593Smuzhiyun }
640*4882a593Smuzhiyun
phylink_resolve(struct work_struct * w)641*4882a593Smuzhiyun static void phylink_resolve(struct work_struct *w)
642*4882a593Smuzhiyun {
643*4882a593Smuzhiyun struct phylink *pl = container_of(w, struct phylink, resolve);
644*4882a593Smuzhiyun struct phylink_link_state link_state;
645*4882a593Smuzhiyun struct net_device *ndev = pl->netdev;
646*4882a593Smuzhiyun bool mac_config = false;
647*4882a593Smuzhiyun bool retrigger = false;
648*4882a593Smuzhiyun bool cur_link_state;
649*4882a593Smuzhiyun
650*4882a593Smuzhiyun mutex_lock(&pl->state_mutex);
651*4882a593Smuzhiyun if (pl->netdev)
652*4882a593Smuzhiyun cur_link_state = netif_carrier_ok(ndev);
653*4882a593Smuzhiyun else
654*4882a593Smuzhiyun cur_link_state = pl->old_link_state;
655*4882a593Smuzhiyun
656*4882a593Smuzhiyun if (pl->phylink_disable_state) {
657*4882a593Smuzhiyun pl->mac_link_dropped = false;
658*4882a593Smuzhiyun link_state.link = false;
659*4882a593Smuzhiyun } else if (pl->mac_link_dropped) {
660*4882a593Smuzhiyun link_state.link = false;
661*4882a593Smuzhiyun retrigger = true;
662*4882a593Smuzhiyun } else {
663*4882a593Smuzhiyun switch (pl->cur_link_an_mode) {
664*4882a593Smuzhiyun case MLO_AN_PHY:
665*4882a593Smuzhiyun link_state = pl->phy_state;
666*4882a593Smuzhiyun phylink_apply_manual_flow(pl, &link_state);
667*4882a593Smuzhiyun mac_config = link_state.link;
668*4882a593Smuzhiyun break;
669*4882a593Smuzhiyun
670*4882a593Smuzhiyun case MLO_AN_FIXED:
671*4882a593Smuzhiyun phylink_get_fixed_state(pl, &link_state);
672*4882a593Smuzhiyun mac_config = link_state.link;
673*4882a593Smuzhiyun break;
674*4882a593Smuzhiyun
675*4882a593Smuzhiyun case MLO_AN_INBAND:
676*4882a593Smuzhiyun phylink_mac_pcs_get_state(pl, &link_state);
677*4882a593Smuzhiyun
678*4882a593Smuzhiyun /* The PCS may have a latching link-fail indicator.
679*4882a593Smuzhiyun * If the link was up, bring the link down and
680*4882a593Smuzhiyun * re-trigger the resolve. Otherwise, re-read the
681*4882a593Smuzhiyun * PCS state to get the current status of the link.
682*4882a593Smuzhiyun */
683*4882a593Smuzhiyun if (!link_state.link) {
684*4882a593Smuzhiyun if (cur_link_state)
685*4882a593Smuzhiyun retrigger = true;
686*4882a593Smuzhiyun else
687*4882a593Smuzhiyun phylink_mac_pcs_get_state(pl,
688*4882a593Smuzhiyun &link_state);
689*4882a593Smuzhiyun }
690*4882a593Smuzhiyun
691*4882a593Smuzhiyun /* If we have a phy, the "up" state is the union of
692*4882a593Smuzhiyun * both the PHY and the MAC */
693*4882a593Smuzhiyun if (pl->phydev)
694*4882a593Smuzhiyun link_state.link &= pl->phy_state.link;
695*4882a593Smuzhiyun
696*4882a593Smuzhiyun /* Only update if the PHY link is up */
697*4882a593Smuzhiyun if (pl->phydev && pl->phy_state.link) {
698*4882a593Smuzhiyun /* If the interface has changed, force a
699*4882a593Smuzhiyun * link down event if the link isn't already
700*4882a593Smuzhiyun * down, and re-resolve.
701*4882a593Smuzhiyun */
702*4882a593Smuzhiyun if (link_state.interface !=
703*4882a593Smuzhiyun pl->phy_state.interface) {
704*4882a593Smuzhiyun retrigger = true;
705*4882a593Smuzhiyun link_state.link = false;
706*4882a593Smuzhiyun }
707*4882a593Smuzhiyun link_state.interface = pl->phy_state.interface;
708*4882a593Smuzhiyun
709*4882a593Smuzhiyun /* If we have a PHY, we need to update with
710*4882a593Smuzhiyun * the PHY flow control bits. */
711*4882a593Smuzhiyun link_state.pause = pl->phy_state.pause;
712*4882a593Smuzhiyun mac_config = true;
713*4882a593Smuzhiyun }
714*4882a593Smuzhiyun phylink_apply_manual_flow(pl, &link_state);
715*4882a593Smuzhiyun break;
716*4882a593Smuzhiyun }
717*4882a593Smuzhiyun }
718*4882a593Smuzhiyun
719*4882a593Smuzhiyun if (mac_config) {
720*4882a593Smuzhiyun if (link_state.interface != pl->link_config.interface) {
721*4882a593Smuzhiyun /* The interface has changed, force the link down and
722*4882a593Smuzhiyun * then reconfigure.
723*4882a593Smuzhiyun */
724*4882a593Smuzhiyun if (cur_link_state) {
725*4882a593Smuzhiyun phylink_link_down(pl);
726*4882a593Smuzhiyun cur_link_state = false;
727*4882a593Smuzhiyun }
728*4882a593Smuzhiyun phylink_major_config(pl, false, &link_state);
729*4882a593Smuzhiyun pl->link_config.interface = link_state.interface;
730*4882a593Smuzhiyun } else if (!pl->pcs_ops) {
731*4882a593Smuzhiyun /* The interface remains unchanged, only the speed,
732*4882a593Smuzhiyun * duplex or pause settings have changed. Call the
733*4882a593Smuzhiyun * old mac_config() method to configure the MAC/PCS
734*4882a593Smuzhiyun * only if we do not have a PCS installed (an
735*4882a593Smuzhiyun * unconverted user.)
736*4882a593Smuzhiyun */
737*4882a593Smuzhiyun phylink_mac_config(pl, &link_state);
738*4882a593Smuzhiyun }
739*4882a593Smuzhiyun }
740*4882a593Smuzhiyun
741*4882a593Smuzhiyun if (link_state.link != cur_link_state) {
742*4882a593Smuzhiyun pl->old_link_state = link_state.link;
743*4882a593Smuzhiyun if (!link_state.link)
744*4882a593Smuzhiyun phylink_link_down(pl);
745*4882a593Smuzhiyun else
746*4882a593Smuzhiyun phylink_link_up(pl, link_state);
747*4882a593Smuzhiyun }
748*4882a593Smuzhiyun if (!link_state.link && retrigger) {
749*4882a593Smuzhiyun pl->mac_link_dropped = false;
750*4882a593Smuzhiyun queue_work(system_power_efficient_wq, &pl->resolve);
751*4882a593Smuzhiyun }
752*4882a593Smuzhiyun mutex_unlock(&pl->state_mutex);
753*4882a593Smuzhiyun }
754*4882a593Smuzhiyun
phylink_run_resolve(struct phylink * pl)755*4882a593Smuzhiyun static void phylink_run_resolve(struct phylink *pl)
756*4882a593Smuzhiyun {
757*4882a593Smuzhiyun if (!pl->phylink_disable_state)
758*4882a593Smuzhiyun queue_work(system_power_efficient_wq, &pl->resolve);
759*4882a593Smuzhiyun }
760*4882a593Smuzhiyun
phylink_run_resolve_and_disable(struct phylink * pl,int bit)761*4882a593Smuzhiyun static void phylink_run_resolve_and_disable(struct phylink *pl, int bit)
762*4882a593Smuzhiyun {
763*4882a593Smuzhiyun unsigned long state = pl->phylink_disable_state;
764*4882a593Smuzhiyun
765*4882a593Smuzhiyun set_bit(bit, &pl->phylink_disable_state);
766*4882a593Smuzhiyun if (state == 0) {
767*4882a593Smuzhiyun queue_work(system_power_efficient_wq, &pl->resolve);
768*4882a593Smuzhiyun flush_work(&pl->resolve);
769*4882a593Smuzhiyun }
770*4882a593Smuzhiyun }
771*4882a593Smuzhiyun
phylink_fixed_poll(struct timer_list * t)772*4882a593Smuzhiyun static void phylink_fixed_poll(struct timer_list *t)
773*4882a593Smuzhiyun {
774*4882a593Smuzhiyun struct phylink *pl = container_of(t, struct phylink, link_poll);
775*4882a593Smuzhiyun
776*4882a593Smuzhiyun mod_timer(t, jiffies + HZ);
777*4882a593Smuzhiyun
778*4882a593Smuzhiyun phylink_run_resolve(pl);
779*4882a593Smuzhiyun }
780*4882a593Smuzhiyun
781*4882a593Smuzhiyun static const struct sfp_upstream_ops sfp_phylink_ops;
782*4882a593Smuzhiyun
phylink_register_sfp(struct phylink * pl,struct fwnode_handle * fwnode)783*4882a593Smuzhiyun static int phylink_register_sfp(struct phylink *pl,
784*4882a593Smuzhiyun struct fwnode_handle *fwnode)
785*4882a593Smuzhiyun {
786*4882a593Smuzhiyun struct sfp_bus *bus;
787*4882a593Smuzhiyun int ret;
788*4882a593Smuzhiyun
789*4882a593Smuzhiyun if (!fwnode)
790*4882a593Smuzhiyun return 0;
791*4882a593Smuzhiyun
792*4882a593Smuzhiyun bus = sfp_bus_find_fwnode(fwnode);
793*4882a593Smuzhiyun if (IS_ERR(bus)) {
794*4882a593Smuzhiyun ret = PTR_ERR(bus);
795*4882a593Smuzhiyun phylink_err(pl, "unable to attach SFP bus: %d\n", ret);
796*4882a593Smuzhiyun return ret;
797*4882a593Smuzhiyun }
798*4882a593Smuzhiyun
799*4882a593Smuzhiyun pl->sfp_bus = bus;
800*4882a593Smuzhiyun
801*4882a593Smuzhiyun ret = sfp_bus_add_upstream(bus, pl, &sfp_phylink_ops);
802*4882a593Smuzhiyun sfp_bus_put(bus);
803*4882a593Smuzhiyun
804*4882a593Smuzhiyun return ret;
805*4882a593Smuzhiyun }
806*4882a593Smuzhiyun
807*4882a593Smuzhiyun /**
808*4882a593Smuzhiyun * phylink_create() - create a phylink instance
809*4882a593Smuzhiyun * @config: a pointer to the target &struct phylink_config
810*4882a593Smuzhiyun * @fwnode: a pointer to a &struct fwnode_handle describing the network
811*4882a593Smuzhiyun * interface
812*4882a593Smuzhiyun * @iface: the desired link mode defined by &typedef phy_interface_t
813*4882a593Smuzhiyun * @mac_ops: a pointer to a &struct phylink_mac_ops for the MAC.
814*4882a593Smuzhiyun *
815*4882a593Smuzhiyun * Create a new phylink instance, and parse the link parameters found in @np.
816*4882a593Smuzhiyun * This will parse in-band modes, fixed-link or SFP configuration.
817*4882a593Smuzhiyun *
818*4882a593Smuzhiyun * Note: the rtnl lock must not be held when calling this function.
819*4882a593Smuzhiyun *
820*4882a593Smuzhiyun * Returns a pointer to a &struct phylink, or an error-pointer value. Users
821*4882a593Smuzhiyun * must use IS_ERR() to check for errors from this function.
822*4882a593Smuzhiyun */
phylink_create(struct phylink_config * config,struct fwnode_handle * fwnode,phy_interface_t iface,const struct phylink_mac_ops * mac_ops)823*4882a593Smuzhiyun struct phylink *phylink_create(struct phylink_config *config,
824*4882a593Smuzhiyun struct fwnode_handle *fwnode,
825*4882a593Smuzhiyun phy_interface_t iface,
826*4882a593Smuzhiyun const struct phylink_mac_ops *mac_ops)
827*4882a593Smuzhiyun {
828*4882a593Smuzhiyun struct phylink *pl;
829*4882a593Smuzhiyun int ret;
830*4882a593Smuzhiyun
831*4882a593Smuzhiyun pl = kzalloc(sizeof(*pl), GFP_KERNEL);
832*4882a593Smuzhiyun if (!pl)
833*4882a593Smuzhiyun return ERR_PTR(-ENOMEM);
834*4882a593Smuzhiyun
835*4882a593Smuzhiyun mutex_init(&pl->state_mutex);
836*4882a593Smuzhiyun INIT_WORK(&pl->resolve, phylink_resolve);
837*4882a593Smuzhiyun
838*4882a593Smuzhiyun pl->config = config;
839*4882a593Smuzhiyun if (config->type == PHYLINK_NETDEV) {
840*4882a593Smuzhiyun pl->netdev = to_net_dev(config->dev);
841*4882a593Smuzhiyun } else if (config->type == PHYLINK_DEV) {
842*4882a593Smuzhiyun pl->dev = config->dev;
843*4882a593Smuzhiyun } else {
844*4882a593Smuzhiyun kfree(pl);
845*4882a593Smuzhiyun return ERR_PTR(-EINVAL);
846*4882a593Smuzhiyun }
847*4882a593Smuzhiyun
848*4882a593Smuzhiyun pl->phy_state.interface = iface;
849*4882a593Smuzhiyun pl->link_interface = iface;
850*4882a593Smuzhiyun if (iface == PHY_INTERFACE_MODE_MOCA)
851*4882a593Smuzhiyun pl->link_port = PORT_BNC;
852*4882a593Smuzhiyun else
853*4882a593Smuzhiyun pl->link_port = PORT_MII;
854*4882a593Smuzhiyun pl->link_config.interface = iface;
855*4882a593Smuzhiyun pl->link_config.pause = MLO_PAUSE_AN;
856*4882a593Smuzhiyun pl->link_config.speed = SPEED_UNKNOWN;
857*4882a593Smuzhiyun pl->link_config.duplex = DUPLEX_UNKNOWN;
858*4882a593Smuzhiyun pl->link_config.an_enabled = true;
859*4882a593Smuzhiyun pl->mac_ops = mac_ops;
860*4882a593Smuzhiyun __set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state);
861*4882a593Smuzhiyun timer_setup(&pl->link_poll, phylink_fixed_poll, 0);
862*4882a593Smuzhiyun
863*4882a593Smuzhiyun bitmap_fill(pl->supported, __ETHTOOL_LINK_MODE_MASK_NBITS);
864*4882a593Smuzhiyun linkmode_copy(pl->link_config.advertising, pl->supported);
865*4882a593Smuzhiyun phylink_validate(pl, pl->supported, &pl->link_config);
866*4882a593Smuzhiyun
867*4882a593Smuzhiyun ret = phylink_parse_mode(pl, fwnode);
868*4882a593Smuzhiyun if (ret < 0) {
869*4882a593Smuzhiyun kfree(pl);
870*4882a593Smuzhiyun return ERR_PTR(ret);
871*4882a593Smuzhiyun }
872*4882a593Smuzhiyun
873*4882a593Smuzhiyun if (pl->cfg_link_an_mode == MLO_AN_FIXED) {
874*4882a593Smuzhiyun ret = phylink_parse_fixedlink(pl, fwnode);
875*4882a593Smuzhiyun if (ret < 0) {
876*4882a593Smuzhiyun kfree(pl);
877*4882a593Smuzhiyun return ERR_PTR(ret);
878*4882a593Smuzhiyun }
879*4882a593Smuzhiyun }
880*4882a593Smuzhiyun
881*4882a593Smuzhiyun pl->cur_link_an_mode = pl->cfg_link_an_mode;
882*4882a593Smuzhiyun
883*4882a593Smuzhiyun ret = phylink_register_sfp(pl, fwnode);
884*4882a593Smuzhiyun if (ret < 0) {
885*4882a593Smuzhiyun kfree(pl);
886*4882a593Smuzhiyun return ERR_PTR(ret);
887*4882a593Smuzhiyun }
888*4882a593Smuzhiyun
889*4882a593Smuzhiyun return pl;
890*4882a593Smuzhiyun }
891*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(phylink_create);
892*4882a593Smuzhiyun
893*4882a593Smuzhiyun /**
894*4882a593Smuzhiyun * phylink_set_pcs() - set the current PCS for phylink to use
895*4882a593Smuzhiyun * @pl: a pointer to a &struct phylink returned from phylink_create()
896*4882a593Smuzhiyun * @pcs: a pointer to the &struct phylink_pcs
897*4882a593Smuzhiyun *
898*4882a593Smuzhiyun * Bind the MAC PCS to phylink. This may be called after phylink_create(),
899*4882a593Smuzhiyun * in mac_prepare() or mac_config() methods if it is desired to dynamically
900*4882a593Smuzhiyun * change the PCS.
901*4882a593Smuzhiyun *
902*4882a593Smuzhiyun * Please note that there are behavioural changes with the mac_config()
903*4882a593Smuzhiyun * callback if a PCS is present (denoting a newer setup) so removing a PCS
904*4882a593Smuzhiyun * is not supported, and if a PCS is going to be used, it must be registered
905*4882a593Smuzhiyun * by calling phylink_set_pcs() at the latest in the first mac_config() call.
906*4882a593Smuzhiyun */
phylink_set_pcs(struct phylink * pl,struct phylink_pcs * pcs)907*4882a593Smuzhiyun void phylink_set_pcs(struct phylink *pl, struct phylink_pcs *pcs)
908*4882a593Smuzhiyun {
909*4882a593Smuzhiyun pl->pcs = pcs;
910*4882a593Smuzhiyun pl->pcs_ops = pcs->ops;
911*4882a593Smuzhiyun }
912*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(phylink_set_pcs);
913*4882a593Smuzhiyun
914*4882a593Smuzhiyun /**
915*4882a593Smuzhiyun * phylink_destroy() - cleanup and destroy the phylink instance
916*4882a593Smuzhiyun * @pl: a pointer to a &struct phylink returned from phylink_create()
917*4882a593Smuzhiyun *
918*4882a593Smuzhiyun * Destroy a phylink instance. Any PHY that has been attached must have been
919*4882a593Smuzhiyun * cleaned up via phylink_disconnect_phy() prior to calling this function.
920*4882a593Smuzhiyun *
921*4882a593Smuzhiyun * Note: the rtnl lock must not be held when calling this function.
922*4882a593Smuzhiyun */
phylink_destroy(struct phylink * pl)923*4882a593Smuzhiyun void phylink_destroy(struct phylink *pl)
924*4882a593Smuzhiyun {
925*4882a593Smuzhiyun sfp_bus_del_upstream(pl->sfp_bus);
926*4882a593Smuzhiyun if (pl->link_gpio)
927*4882a593Smuzhiyun gpiod_put(pl->link_gpio);
928*4882a593Smuzhiyun
929*4882a593Smuzhiyun cancel_work_sync(&pl->resolve);
930*4882a593Smuzhiyun kfree(pl);
931*4882a593Smuzhiyun }
932*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(phylink_destroy);
933*4882a593Smuzhiyun
phylink_phy_change(struct phy_device * phydev,bool up)934*4882a593Smuzhiyun static void phylink_phy_change(struct phy_device *phydev, bool up)
935*4882a593Smuzhiyun {
936*4882a593Smuzhiyun struct phylink *pl = phydev->phylink;
937*4882a593Smuzhiyun bool tx_pause, rx_pause;
938*4882a593Smuzhiyun
939*4882a593Smuzhiyun phy_get_pause(phydev, &tx_pause, &rx_pause);
940*4882a593Smuzhiyun
941*4882a593Smuzhiyun mutex_lock(&pl->state_mutex);
942*4882a593Smuzhiyun pl->phy_state.speed = phydev->speed;
943*4882a593Smuzhiyun pl->phy_state.duplex = phydev->duplex;
944*4882a593Smuzhiyun pl->phy_state.pause = MLO_PAUSE_NONE;
945*4882a593Smuzhiyun if (tx_pause)
946*4882a593Smuzhiyun pl->phy_state.pause |= MLO_PAUSE_TX;
947*4882a593Smuzhiyun if (rx_pause)
948*4882a593Smuzhiyun pl->phy_state.pause |= MLO_PAUSE_RX;
949*4882a593Smuzhiyun pl->phy_state.interface = phydev->interface;
950*4882a593Smuzhiyun pl->phy_state.link = up;
951*4882a593Smuzhiyun mutex_unlock(&pl->state_mutex);
952*4882a593Smuzhiyun
953*4882a593Smuzhiyun phylink_run_resolve(pl);
954*4882a593Smuzhiyun
955*4882a593Smuzhiyun phylink_dbg(pl, "phy link %s %s/%s/%s\n", up ? "up" : "down",
956*4882a593Smuzhiyun phy_modes(phydev->interface),
957*4882a593Smuzhiyun phy_speed_to_str(phydev->speed),
958*4882a593Smuzhiyun phy_duplex_to_str(phydev->duplex));
959*4882a593Smuzhiyun }
960*4882a593Smuzhiyun
phylink_bringup_phy(struct phylink * pl,struct phy_device * phy,phy_interface_t interface)961*4882a593Smuzhiyun static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy,
962*4882a593Smuzhiyun phy_interface_t interface)
963*4882a593Smuzhiyun {
964*4882a593Smuzhiyun struct phylink_link_state config;
965*4882a593Smuzhiyun __ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
966*4882a593Smuzhiyun char *irq_str;
967*4882a593Smuzhiyun int ret;
968*4882a593Smuzhiyun
969*4882a593Smuzhiyun /*
970*4882a593Smuzhiyun * This is the new way of dealing with flow control for PHYs,
971*4882a593Smuzhiyun * as described by Timur Tabi in commit 529ed1275263 ("net: phy:
972*4882a593Smuzhiyun * phy drivers should not set SUPPORTED_[Asym_]Pause") except
973*4882a593Smuzhiyun * using our validate call to the MAC, we rely upon the MAC
974*4882a593Smuzhiyun * clearing the bits from both supported and advertising fields.
975*4882a593Smuzhiyun */
976*4882a593Smuzhiyun phy_support_asym_pause(phy);
977*4882a593Smuzhiyun
978*4882a593Smuzhiyun memset(&config, 0, sizeof(config));
979*4882a593Smuzhiyun linkmode_copy(supported, phy->supported);
980*4882a593Smuzhiyun linkmode_copy(config.advertising, phy->advertising);
981*4882a593Smuzhiyun
982*4882a593Smuzhiyun /* Clause 45 PHYs switch their Serdes lane between several different
983*4882a593Smuzhiyun * modes, normally 10GBASE-R, SGMII. Some use 2500BASE-X for 2.5G
984*4882a593Smuzhiyun * speeds. We really need to know which interface modes the PHY and
985*4882a593Smuzhiyun * MAC supports to properly work out which linkmodes can be supported.
986*4882a593Smuzhiyun */
987*4882a593Smuzhiyun if (phy->is_c45 &&
988*4882a593Smuzhiyun interface != PHY_INTERFACE_MODE_RXAUI &&
989*4882a593Smuzhiyun interface != PHY_INTERFACE_MODE_XAUI &&
990*4882a593Smuzhiyun interface != PHY_INTERFACE_MODE_USXGMII)
991*4882a593Smuzhiyun config.interface = PHY_INTERFACE_MODE_NA;
992*4882a593Smuzhiyun else
993*4882a593Smuzhiyun config.interface = interface;
994*4882a593Smuzhiyun
995*4882a593Smuzhiyun ret = phylink_validate(pl, supported, &config);
996*4882a593Smuzhiyun if (ret) {
997*4882a593Smuzhiyun phylink_warn(pl, "validation of %s with support %*pb and advertisement %*pb failed: %d\n",
998*4882a593Smuzhiyun phy_modes(config.interface),
999*4882a593Smuzhiyun __ETHTOOL_LINK_MODE_MASK_NBITS, phy->supported,
1000*4882a593Smuzhiyun __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising,
1001*4882a593Smuzhiyun ret);
1002*4882a593Smuzhiyun return ret;
1003*4882a593Smuzhiyun }
1004*4882a593Smuzhiyun
1005*4882a593Smuzhiyun phy->phylink = pl;
1006*4882a593Smuzhiyun phy->phy_link_change = phylink_phy_change;
1007*4882a593Smuzhiyun
1008*4882a593Smuzhiyun irq_str = phy_attached_info_irq(phy);
1009*4882a593Smuzhiyun phylink_info(pl,
1010*4882a593Smuzhiyun "PHY [%s] driver [%s] (irq=%s)\n",
1011*4882a593Smuzhiyun dev_name(&phy->mdio.dev), phy->drv->name, irq_str);
1012*4882a593Smuzhiyun kfree(irq_str);
1013*4882a593Smuzhiyun
1014*4882a593Smuzhiyun mutex_lock(&phy->lock);
1015*4882a593Smuzhiyun mutex_lock(&pl->state_mutex);
1016*4882a593Smuzhiyun pl->phydev = phy;
1017*4882a593Smuzhiyun pl->phy_state.interface = interface;
1018*4882a593Smuzhiyun pl->phy_state.pause = MLO_PAUSE_NONE;
1019*4882a593Smuzhiyun pl->phy_state.speed = SPEED_UNKNOWN;
1020*4882a593Smuzhiyun pl->phy_state.duplex = DUPLEX_UNKNOWN;
1021*4882a593Smuzhiyun linkmode_copy(pl->supported, supported);
1022*4882a593Smuzhiyun linkmode_copy(pl->link_config.advertising, config.advertising);
1023*4882a593Smuzhiyun
1024*4882a593Smuzhiyun /* Restrict the phy advertisement according to the MAC support. */
1025*4882a593Smuzhiyun linkmode_copy(phy->advertising, config.advertising);
1026*4882a593Smuzhiyun mutex_unlock(&pl->state_mutex);
1027*4882a593Smuzhiyun mutex_unlock(&phy->lock);
1028*4882a593Smuzhiyun
1029*4882a593Smuzhiyun phylink_dbg(pl,
1030*4882a593Smuzhiyun "phy: setting supported %*pb advertising %*pb\n",
1031*4882a593Smuzhiyun __ETHTOOL_LINK_MODE_MASK_NBITS, pl->supported,
1032*4882a593Smuzhiyun __ETHTOOL_LINK_MODE_MASK_NBITS, phy->advertising);
1033*4882a593Smuzhiyun
1034*4882a593Smuzhiyun if (phy_interrupt_is_valid(phy))
1035*4882a593Smuzhiyun phy_request_interrupt(phy);
1036*4882a593Smuzhiyun
1037*4882a593Smuzhiyun return 0;
1038*4882a593Smuzhiyun }
1039*4882a593Smuzhiyun
phylink_attach_phy(struct phylink * pl,struct phy_device * phy,phy_interface_t interface)1040*4882a593Smuzhiyun static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy,
1041*4882a593Smuzhiyun phy_interface_t interface)
1042*4882a593Smuzhiyun {
1043*4882a593Smuzhiyun if (WARN_ON(pl->cfg_link_an_mode == MLO_AN_FIXED ||
1044*4882a593Smuzhiyun (pl->cfg_link_an_mode == MLO_AN_INBAND &&
1045*4882a593Smuzhiyun phy_interface_mode_is_8023z(interface))))
1046*4882a593Smuzhiyun return -EINVAL;
1047*4882a593Smuzhiyun
1048*4882a593Smuzhiyun if (pl->phydev)
1049*4882a593Smuzhiyun return -EBUSY;
1050*4882a593Smuzhiyun
1051*4882a593Smuzhiyun return phy_attach_direct(pl->netdev, phy, 0, interface);
1052*4882a593Smuzhiyun }
1053*4882a593Smuzhiyun
1054*4882a593Smuzhiyun /**
1055*4882a593Smuzhiyun * phylink_connect_phy() - connect a PHY to the phylink instance
1056*4882a593Smuzhiyun * @pl: a pointer to a &struct phylink returned from phylink_create()
1057*4882a593Smuzhiyun * @phy: a pointer to a &struct phy_device.
1058*4882a593Smuzhiyun *
1059*4882a593Smuzhiyun * Connect @phy to the phylink instance specified by @pl by calling
1060*4882a593Smuzhiyun * phy_attach_direct(). Configure the @phy according to the MAC driver's
1061*4882a593Smuzhiyun * capabilities, start the PHYLIB state machine and enable any interrupts
1062*4882a593Smuzhiyun * that the PHY supports.
1063*4882a593Smuzhiyun *
1064*4882a593Smuzhiyun * This updates the phylink's ethtool supported and advertising link mode
1065*4882a593Smuzhiyun * masks.
1066*4882a593Smuzhiyun *
1067*4882a593Smuzhiyun * Returns 0 on success or a negative errno.
1068*4882a593Smuzhiyun */
phylink_connect_phy(struct phylink * pl,struct phy_device * phy)1069*4882a593Smuzhiyun int phylink_connect_phy(struct phylink *pl, struct phy_device *phy)
1070*4882a593Smuzhiyun {
1071*4882a593Smuzhiyun int ret;
1072*4882a593Smuzhiyun
1073*4882a593Smuzhiyun /* Use PHY device/driver interface */
1074*4882a593Smuzhiyun if (pl->link_interface == PHY_INTERFACE_MODE_NA) {
1075*4882a593Smuzhiyun pl->link_interface = phy->interface;
1076*4882a593Smuzhiyun pl->link_config.interface = pl->link_interface;
1077*4882a593Smuzhiyun }
1078*4882a593Smuzhiyun
1079*4882a593Smuzhiyun ret = phylink_attach_phy(pl, phy, pl->link_interface);
1080*4882a593Smuzhiyun if (ret < 0)
1081*4882a593Smuzhiyun return ret;
1082*4882a593Smuzhiyun
1083*4882a593Smuzhiyun ret = phylink_bringup_phy(pl, phy, pl->link_config.interface);
1084*4882a593Smuzhiyun if (ret)
1085*4882a593Smuzhiyun phy_detach(phy);
1086*4882a593Smuzhiyun
1087*4882a593Smuzhiyun return ret;
1088*4882a593Smuzhiyun }
1089*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(phylink_connect_phy);
1090*4882a593Smuzhiyun
1091*4882a593Smuzhiyun /**
1092*4882a593Smuzhiyun * phylink_of_phy_connect() - connect the PHY specified in the DT mode.
1093*4882a593Smuzhiyun * @pl: a pointer to a &struct phylink returned from phylink_create()
1094*4882a593Smuzhiyun * @dn: a pointer to a &struct device_node.
1095*4882a593Smuzhiyun * @flags: PHY-specific flags to communicate to the PHY device driver
1096*4882a593Smuzhiyun *
1097*4882a593Smuzhiyun * Connect the phy specified in the device node @dn to the phylink instance
1098*4882a593Smuzhiyun * specified by @pl. Actions specified in phylink_connect_phy() will be
1099*4882a593Smuzhiyun * performed.
1100*4882a593Smuzhiyun *
1101*4882a593Smuzhiyun * Returns 0 on success or a negative errno.
1102*4882a593Smuzhiyun */
phylink_of_phy_connect(struct phylink * pl,struct device_node * dn,u32 flags)1103*4882a593Smuzhiyun int phylink_of_phy_connect(struct phylink *pl, struct device_node *dn,
1104*4882a593Smuzhiyun u32 flags)
1105*4882a593Smuzhiyun {
1106*4882a593Smuzhiyun struct device_node *phy_node;
1107*4882a593Smuzhiyun struct phy_device *phy_dev;
1108*4882a593Smuzhiyun int ret;
1109*4882a593Smuzhiyun
1110*4882a593Smuzhiyun /* Fixed links and 802.3z are handled without needing a PHY */
1111*4882a593Smuzhiyun if (pl->cfg_link_an_mode == MLO_AN_FIXED ||
1112*4882a593Smuzhiyun (pl->cfg_link_an_mode == MLO_AN_INBAND &&
1113*4882a593Smuzhiyun phy_interface_mode_is_8023z(pl->link_interface)))
1114*4882a593Smuzhiyun return 0;
1115*4882a593Smuzhiyun
1116*4882a593Smuzhiyun phy_node = of_parse_phandle(dn, "phy-handle", 0);
1117*4882a593Smuzhiyun if (!phy_node)
1118*4882a593Smuzhiyun phy_node = of_parse_phandle(dn, "phy", 0);
1119*4882a593Smuzhiyun if (!phy_node)
1120*4882a593Smuzhiyun phy_node = of_parse_phandle(dn, "phy-device", 0);
1121*4882a593Smuzhiyun
1122*4882a593Smuzhiyun if (!phy_node) {
1123*4882a593Smuzhiyun if (pl->cfg_link_an_mode == MLO_AN_PHY)
1124*4882a593Smuzhiyun return -ENODEV;
1125*4882a593Smuzhiyun return 0;
1126*4882a593Smuzhiyun }
1127*4882a593Smuzhiyun
1128*4882a593Smuzhiyun phy_dev = of_phy_find_device(phy_node);
1129*4882a593Smuzhiyun /* We're done with the phy_node handle */
1130*4882a593Smuzhiyun of_node_put(phy_node);
1131*4882a593Smuzhiyun if (!phy_dev)
1132*4882a593Smuzhiyun return -ENODEV;
1133*4882a593Smuzhiyun
1134*4882a593Smuzhiyun ret = phy_attach_direct(pl->netdev, phy_dev, flags,
1135*4882a593Smuzhiyun pl->link_interface);
1136*4882a593Smuzhiyun if (ret)
1137*4882a593Smuzhiyun return ret;
1138*4882a593Smuzhiyun
1139*4882a593Smuzhiyun ret = phylink_bringup_phy(pl, phy_dev, pl->link_config.interface);
1140*4882a593Smuzhiyun if (ret)
1141*4882a593Smuzhiyun phy_detach(phy_dev);
1142*4882a593Smuzhiyun
1143*4882a593Smuzhiyun return ret;
1144*4882a593Smuzhiyun }
1145*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(phylink_of_phy_connect);
1146*4882a593Smuzhiyun
1147*4882a593Smuzhiyun /**
1148*4882a593Smuzhiyun * phylink_disconnect_phy() - disconnect any PHY attached to the phylink
1149*4882a593Smuzhiyun * instance.
1150*4882a593Smuzhiyun * @pl: a pointer to a &struct phylink returned from phylink_create()
1151*4882a593Smuzhiyun *
1152*4882a593Smuzhiyun * Disconnect any current PHY from the phylink instance described by @pl.
1153*4882a593Smuzhiyun */
phylink_disconnect_phy(struct phylink * pl)1154*4882a593Smuzhiyun void phylink_disconnect_phy(struct phylink *pl)
1155*4882a593Smuzhiyun {
1156*4882a593Smuzhiyun struct phy_device *phy;
1157*4882a593Smuzhiyun
1158*4882a593Smuzhiyun ASSERT_RTNL();
1159*4882a593Smuzhiyun
1160*4882a593Smuzhiyun phy = pl->phydev;
1161*4882a593Smuzhiyun if (phy) {
1162*4882a593Smuzhiyun mutex_lock(&phy->lock);
1163*4882a593Smuzhiyun mutex_lock(&pl->state_mutex);
1164*4882a593Smuzhiyun pl->phydev = NULL;
1165*4882a593Smuzhiyun mutex_unlock(&pl->state_mutex);
1166*4882a593Smuzhiyun mutex_unlock(&phy->lock);
1167*4882a593Smuzhiyun flush_work(&pl->resolve);
1168*4882a593Smuzhiyun
1169*4882a593Smuzhiyun phy_disconnect(phy);
1170*4882a593Smuzhiyun }
1171*4882a593Smuzhiyun }
1172*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(phylink_disconnect_phy);
1173*4882a593Smuzhiyun
1174*4882a593Smuzhiyun /**
1175*4882a593Smuzhiyun * phylink_mac_change() - notify phylink of a change in MAC state
1176*4882a593Smuzhiyun * @pl: a pointer to a &struct phylink returned from phylink_create()
1177*4882a593Smuzhiyun * @up: indicates whether the link is currently up.
1178*4882a593Smuzhiyun *
1179*4882a593Smuzhiyun * The MAC driver should call this driver when the state of its link
1180*4882a593Smuzhiyun * changes (eg, link failure, new negotiation results, etc.)
1181*4882a593Smuzhiyun */
phylink_mac_change(struct phylink * pl,bool up)1182*4882a593Smuzhiyun void phylink_mac_change(struct phylink *pl, bool up)
1183*4882a593Smuzhiyun {
1184*4882a593Smuzhiyun if (!up)
1185*4882a593Smuzhiyun pl->mac_link_dropped = true;
1186*4882a593Smuzhiyun phylink_run_resolve(pl);
1187*4882a593Smuzhiyun phylink_dbg(pl, "mac link %s\n", up ? "up" : "down");
1188*4882a593Smuzhiyun }
1189*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(phylink_mac_change);
1190*4882a593Smuzhiyun
phylink_link_handler(int irq,void * data)1191*4882a593Smuzhiyun static irqreturn_t phylink_link_handler(int irq, void *data)
1192*4882a593Smuzhiyun {
1193*4882a593Smuzhiyun struct phylink *pl = data;
1194*4882a593Smuzhiyun
1195*4882a593Smuzhiyun phylink_run_resolve(pl);
1196*4882a593Smuzhiyun
1197*4882a593Smuzhiyun return IRQ_HANDLED;
1198*4882a593Smuzhiyun }
1199*4882a593Smuzhiyun
1200*4882a593Smuzhiyun /**
1201*4882a593Smuzhiyun * phylink_start() - start a phylink instance
1202*4882a593Smuzhiyun * @pl: a pointer to a &struct phylink returned from phylink_create()
1203*4882a593Smuzhiyun *
1204*4882a593Smuzhiyun * Start the phylink instance specified by @pl, configuring the MAC for the
1205*4882a593Smuzhiyun * desired link mode(s) and negotiation style. This should be called from the
1206*4882a593Smuzhiyun * network device driver's &struct net_device_ops ndo_open() method.
1207*4882a593Smuzhiyun */
phylink_start(struct phylink * pl)1208*4882a593Smuzhiyun void phylink_start(struct phylink *pl)
1209*4882a593Smuzhiyun {
1210*4882a593Smuzhiyun bool poll = false;
1211*4882a593Smuzhiyun
1212*4882a593Smuzhiyun ASSERT_RTNL();
1213*4882a593Smuzhiyun
1214*4882a593Smuzhiyun phylink_info(pl, "configuring for %s/%s link mode\n",
1215*4882a593Smuzhiyun phylink_an_mode_str(pl->cur_link_an_mode),
1216*4882a593Smuzhiyun phy_modes(pl->link_config.interface));
1217*4882a593Smuzhiyun
1218*4882a593Smuzhiyun /* Always set the carrier off */
1219*4882a593Smuzhiyun if (pl->netdev)
1220*4882a593Smuzhiyun netif_carrier_off(pl->netdev);
1221*4882a593Smuzhiyun
1222*4882a593Smuzhiyun /* Apply the link configuration to the MAC when starting. This allows
1223*4882a593Smuzhiyun * a fixed-link to start with the correct parameters, and also
1224*4882a593Smuzhiyun * ensures that we set the appropriate advertisement for Serdes links.
1225*4882a593Smuzhiyun *
1226*4882a593Smuzhiyun * Restart autonegotiation if using 802.3z to ensure that the link
1227*4882a593Smuzhiyun * parameters are properly negotiated. This is necessary for DSA
1228*4882a593Smuzhiyun * switches using 802.3z negotiation to ensure they see our modes.
1229*4882a593Smuzhiyun */
1230*4882a593Smuzhiyun phylink_mac_initial_config(pl, true);
1231*4882a593Smuzhiyun
1232*4882a593Smuzhiyun clear_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state);
1233*4882a593Smuzhiyun phylink_run_resolve(pl);
1234*4882a593Smuzhiyun
1235*4882a593Smuzhiyun if (pl->cfg_link_an_mode == MLO_AN_FIXED && pl->link_gpio) {
1236*4882a593Smuzhiyun int irq = gpiod_to_irq(pl->link_gpio);
1237*4882a593Smuzhiyun
1238*4882a593Smuzhiyun if (irq > 0) {
1239*4882a593Smuzhiyun if (!request_irq(irq, phylink_link_handler,
1240*4882a593Smuzhiyun IRQF_TRIGGER_RISING |
1241*4882a593Smuzhiyun IRQF_TRIGGER_FALLING,
1242*4882a593Smuzhiyun "netdev link", pl))
1243*4882a593Smuzhiyun pl->link_irq = irq;
1244*4882a593Smuzhiyun else
1245*4882a593Smuzhiyun irq = 0;
1246*4882a593Smuzhiyun }
1247*4882a593Smuzhiyun if (irq <= 0)
1248*4882a593Smuzhiyun poll = true;
1249*4882a593Smuzhiyun }
1250*4882a593Smuzhiyun
1251*4882a593Smuzhiyun switch (pl->cfg_link_an_mode) {
1252*4882a593Smuzhiyun case MLO_AN_FIXED:
1253*4882a593Smuzhiyun poll |= pl->config->poll_fixed_state;
1254*4882a593Smuzhiyun break;
1255*4882a593Smuzhiyun case MLO_AN_INBAND:
1256*4882a593Smuzhiyun poll |= pl->config->pcs_poll;
1257*4882a593Smuzhiyun if (pl->pcs)
1258*4882a593Smuzhiyun poll |= pl->pcs->poll;
1259*4882a593Smuzhiyun break;
1260*4882a593Smuzhiyun }
1261*4882a593Smuzhiyun if (poll)
1262*4882a593Smuzhiyun mod_timer(&pl->link_poll, jiffies + HZ);
1263*4882a593Smuzhiyun if (pl->phydev)
1264*4882a593Smuzhiyun phy_start(pl->phydev);
1265*4882a593Smuzhiyun if (pl->sfp_bus)
1266*4882a593Smuzhiyun sfp_upstream_start(pl->sfp_bus);
1267*4882a593Smuzhiyun }
1268*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(phylink_start);
1269*4882a593Smuzhiyun
1270*4882a593Smuzhiyun /**
1271*4882a593Smuzhiyun * phylink_stop() - stop a phylink instance
1272*4882a593Smuzhiyun * @pl: a pointer to a &struct phylink returned from phylink_create()
1273*4882a593Smuzhiyun *
1274*4882a593Smuzhiyun * Stop the phylink instance specified by @pl. This should be called from the
1275*4882a593Smuzhiyun * network device driver's &struct net_device_ops ndo_stop() method. The
1276*4882a593Smuzhiyun * network device's carrier state should not be changed prior to calling this
1277*4882a593Smuzhiyun * function.
1278*4882a593Smuzhiyun */
phylink_stop(struct phylink * pl)1279*4882a593Smuzhiyun void phylink_stop(struct phylink *pl)
1280*4882a593Smuzhiyun {
1281*4882a593Smuzhiyun ASSERT_RTNL();
1282*4882a593Smuzhiyun
1283*4882a593Smuzhiyun if (pl->sfp_bus)
1284*4882a593Smuzhiyun sfp_upstream_stop(pl->sfp_bus);
1285*4882a593Smuzhiyun if (pl->phydev)
1286*4882a593Smuzhiyun phy_stop(pl->phydev);
1287*4882a593Smuzhiyun del_timer_sync(&pl->link_poll);
1288*4882a593Smuzhiyun if (pl->link_irq) {
1289*4882a593Smuzhiyun free_irq(pl->link_irq, pl);
1290*4882a593Smuzhiyun pl->link_irq = 0;
1291*4882a593Smuzhiyun }
1292*4882a593Smuzhiyun
1293*4882a593Smuzhiyun phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_STOPPED);
1294*4882a593Smuzhiyun }
1295*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(phylink_stop);
1296*4882a593Smuzhiyun
1297*4882a593Smuzhiyun /**
1298*4882a593Smuzhiyun * phylink_ethtool_get_wol() - get the wake on lan parameters for the PHY
1299*4882a593Smuzhiyun * @pl: a pointer to a &struct phylink returned from phylink_create()
1300*4882a593Smuzhiyun * @wol: a pointer to &struct ethtool_wolinfo to hold the read parameters
1301*4882a593Smuzhiyun *
1302*4882a593Smuzhiyun * Read the wake on lan parameters from the PHY attached to the phylink
1303*4882a593Smuzhiyun * instance specified by @pl. If no PHY is currently attached, report no
1304*4882a593Smuzhiyun * support for wake on lan.
1305*4882a593Smuzhiyun */
phylink_ethtool_get_wol(struct phylink * pl,struct ethtool_wolinfo * wol)1306*4882a593Smuzhiyun void phylink_ethtool_get_wol(struct phylink *pl, struct ethtool_wolinfo *wol)
1307*4882a593Smuzhiyun {
1308*4882a593Smuzhiyun ASSERT_RTNL();
1309*4882a593Smuzhiyun
1310*4882a593Smuzhiyun wol->supported = 0;
1311*4882a593Smuzhiyun wol->wolopts = 0;
1312*4882a593Smuzhiyun
1313*4882a593Smuzhiyun if (pl->phydev)
1314*4882a593Smuzhiyun phy_ethtool_get_wol(pl->phydev, wol);
1315*4882a593Smuzhiyun }
1316*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(phylink_ethtool_get_wol);
1317*4882a593Smuzhiyun
1318*4882a593Smuzhiyun /**
1319*4882a593Smuzhiyun * phylink_ethtool_set_wol() - set wake on lan parameters
1320*4882a593Smuzhiyun * @pl: a pointer to a &struct phylink returned from phylink_create()
1321*4882a593Smuzhiyun * @wol: a pointer to &struct ethtool_wolinfo for the desired parameters
1322*4882a593Smuzhiyun *
1323*4882a593Smuzhiyun * Set the wake on lan parameters for the PHY attached to the phylink
1324*4882a593Smuzhiyun * instance specified by @pl. If no PHY is attached, returns %EOPNOTSUPP
1325*4882a593Smuzhiyun * error.
1326*4882a593Smuzhiyun *
1327*4882a593Smuzhiyun * Returns zero on success or negative errno code.
1328*4882a593Smuzhiyun */
phylink_ethtool_set_wol(struct phylink * pl,struct ethtool_wolinfo * wol)1329*4882a593Smuzhiyun int phylink_ethtool_set_wol(struct phylink *pl, struct ethtool_wolinfo *wol)
1330*4882a593Smuzhiyun {
1331*4882a593Smuzhiyun int ret = -EOPNOTSUPP;
1332*4882a593Smuzhiyun
1333*4882a593Smuzhiyun ASSERT_RTNL();
1334*4882a593Smuzhiyun
1335*4882a593Smuzhiyun if (pl->phydev)
1336*4882a593Smuzhiyun ret = phy_ethtool_set_wol(pl->phydev, wol);
1337*4882a593Smuzhiyun
1338*4882a593Smuzhiyun return ret;
1339*4882a593Smuzhiyun }
1340*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(phylink_ethtool_set_wol);
1341*4882a593Smuzhiyun
phylink_merge_link_mode(unsigned long * dst,const unsigned long * b)1342*4882a593Smuzhiyun static void phylink_merge_link_mode(unsigned long *dst, const unsigned long *b)
1343*4882a593Smuzhiyun {
1344*4882a593Smuzhiyun __ETHTOOL_DECLARE_LINK_MODE_MASK(mask);
1345*4882a593Smuzhiyun
1346*4882a593Smuzhiyun linkmode_zero(mask);
1347*4882a593Smuzhiyun phylink_set_port_modes(mask);
1348*4882a593Smuzhiyun
1349*4882a593Smuzhiyun linkmode_and(dst, dst, mask);
1350*4882a593Smuzhiyun linkmode_or(dst, dst, b);
1351*4882a593Smuzhiyun }
1352*4882a593Smuzhiyun
phylink_get_ksettings(const struct phylink_link_state * state,struct ethtool_link_ksettings * kset)1353*4882a593Smuzhiyun static void phylink_get_ksettings(const struct phylink_link_state *state,
1354*4882a593Smuzhiyun struct ethtool_link_ksettings *kset)
1355*4882a593Smuzhiyun {
1356*4882a593Smuzhiyun phylink_merge_link_mode(kset->link_modes.advertising, state->advertising);
1357*4882a593Smuzhiyun linkmode_copy(kset->link_modes.lp_advertising, state->lp_advertising);
1358*4882a593Smuzhiyun kset->base.speed = state->speed;
1359*4882a593Smuzhiyun kset->base.duplex = state->duplex;
1360*4882a593Smuzhiyun kset->base.autoneg = state->an_enabled ? AUTONEG_ENABLE :
1361*4882a593Smuzhiyun AUTONEG_DISABLE;
1362*4882a593Smuzhiyun }
1363*4882a593Smuzhiyun
1364*4882a593Smuzhiyun /**
1365*4882a593Smuzhiyun * phylink_ethtool_ksettings_get() - get the current link settings
1366*4882a593Smuzhiyun * @pl: a pointer to a &struct phylink returned from phylink_create()
1367*4882a593Smuzhiyun * @kset: a pointer to a &struct ethtool_link_ksettings to hold link settings
1368*4882a593Smuzhiyun *
1369*4882a593Smuzhiyun * Read the current link settings for the phylink instance specified by @pl.
1370*4882a593Smuzhiyun * This will be the link settings read from the MAC, PHY or fixed link
1371*4882a593Smuzhiyun * settings depending on the current negotiation mode.
1372*4882a593Smuzhiyun */
phylink_ethtool_ksettings_get(struct phylink * pl,struct ethtool_link_ksettings * kset)1373*4882a593Smuzhiyun int phylink_ethtool_ksettings_get(struct phylink *pl,
1374*4882a593Smuzhiyun struct ethtool_link_ksettings *kset)
1375*4882a593Smuzhiyun {
1376*4882a593Smuzhiyun struct phylink_link_state link_state;
1377*4882a593Smuzhiyun
1378*4882a593Smuzhiyun ASSERT_RTNL();
1379*4882a593Smuzhiyun
1380*4882a593Smuzhiyun if (pl->phydev) {
1381*4882a593Smuzhiyun phy_ethtool_ksettings_get(pl->phydev, kset);
1382*4882a593Smuzhiyun } else {
1383*4882a593Smuzhiyun kset->base.port = pl->link_port;
1384*4882a593Smuzhiyun }
1385*4882a593Smuzhiyun
1386*4882a593Smuzhiyun linkmode_copy(kset->link_modes.supported, pl->supported);
1387*4882a593Smuzhiyun
1388*4882a593Smuzhiyun switch (pl->cur_link_an_mode) {
1389*4882a593Smuzhiyun case MLO_AN_FIXED:
1390*4882a593Smuzhiyun /* We are using fixed settings. Report these as the
1391*4882a593Smuzhiyun * current link settings - and note that these also
1392*4882a593Smuzhiyun * represent the supported speeds/duplex/pause modes.
1393*4882a593Smuzhiyun */
1394*4882a593Smuzhiyun phylink_get_fixed_state(pl, &link_state);
1395*4882a593Smuzhiyun phylink_get_ksettings(&link_state, kset);
1396*4882a593Smuzhiyun break;
1397*4882a593Smuzhiyun
1398*4882a593Smuzhiyun case MLO_AN_INBAND:
1399*4882a593Smuzhiyun /* If there is a phy attached, then use the reported
1400*4882a593Smuzhiyun * settings from the phy with no modification.
1401*4882a593Smuzhiyun */
1402*4882a593Smuzhiyun if (pl->phydev)
1403*4882a593Smuzhiyun break;
1404*4882a593Smuzhiyun
1405*4882a593Smuzhiyun phylink_mac_pcs_get_state(pl, &link_state);
1406*4882a593Smuzhiyun
1407*4882a593Smuzhiyun /* The MAC is reporting the link results from its own PCS
1408*4882a593Smuzhiyun * layer via in-band status. Report these as the current
1409*4882a593Smuzhiyun * link settings.
1410*4882a593Smuzhiyun */
1411*4882a593Smuzhiyun phylink_get_ksettings(&link_state, kset);
1412*4882a593Smuzhiyun break;
1413*4882a593Smuzhiyun }
1414*4882a593Smuzhiyun
1415*4882a593Smuzhiyun return 0;
1416*4882a593Smuzhiyun }
1417*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_get);
1418*4882a593Smuzhiyun
1419*4882a593Smuzhiyun /**
1420*4882a593Smuzhiyun * phylink_ethtool_ksettings_set() - set the link settings
1421*4882a593Smuzhiyun * @pl: a pointer to a &struct phylink returned from phylink_create()
1422*4882a593Smuzhiyun * @kset: a pointer to a &struct ethtool_link_ksettings for the desired modes
1423*4882a593Smuzhiyun */
phylink_ethtool_ksettings_set(struct phylink * pl,const struct ethtool_link_ksettings * kset)1424*4882a593Smuzhiyun int phylink_ethtool_ksettings_set(struct phylink *pl,
1425*4882a593Smuzhiyun const struct ethtool_link_ksettings *kset)
1426*4882a593Smuzhiyun {
1427*4882a593Smuzhiyun __ETHTOOL_DECLARE_LINK_MODE_MASK(support);
1428*4882a593Smuzhiyun struct phylink_link_state config;
1429*4882a593Smuzhiyun const struct phy_setting *s;
1430*4882a593Smuzhiyun
1431*4882a593Smuzhiyun ASSERT_RTNL();
1432*4882a593Smuzhiyun
1433*4882a593Smuzhiyun if (pl->phydev) {
1434*4882a593Smuzhiyun /* We can rely on phylib for this update; we also do not need
1435*4882a593Smuzhiyun * to update the pl->link_config settings:
1436*4882a593Smuzhiyun * - the configuration returned via ksettings_get() will come
1437*4882a593Smuzhiyun * from phylib whenever a PHY is present.
1438*4882a593Smuzhiyun * - link_config.interface will be updated by the PHY calling
1439*4882a593Smuzhiyun * back via phylink_phy_change() and a subsequent resolve.
1440*4882a593Smuzhiyun * - initial link configuration for PHY mode comes from the
1441*4882a593Smuzhiyun * last phy state updated via phylink_phy_change().
1442*4882a593Smuzhiyun * - other configuration changes (e.g. pause modes) are
1443*4882a593Smuzhiyun * performed directly via phylib.
1444*4882a593Smuzhiyun * - if in in-band mode with a PHY, the link configuration
1445*4882a593Smuzhiyun * is passed on the link from the PHY, and all of
1446*4882a593Smuzhiyun * link_config.{speed,duplex,an_enabled,pause} are not used.
1447*4882a593Smuzhiyun * - the only possible use would be link_config.advertising
1448*4882a593Smuzhiyun * pause modes when in 1000base-X mode with a PHY, but in
1449*4882a593Smuzhiyun * the presence of a PHY, this should not be changed as that
1450*4882a593Smuzhiyun * should be determined from the media side advertisement.
1451*4882a593Smuzhiyun */
1452*4882a593Smuzhiyun return phy_ethtool_ksettings_set(pl->phydev, kset);
1453*4882a593Smuzhiyun }
1454*4882a593Smuzhiyun
1455*4882a593Smuzhiyun linkmode_copy(support, pl->supported);
1456*4882a593Smuzhiyun config = pl->link_config;
1457*4882a593Smuzhiyun config.an_enabled = kset->base.autoneg == AUTONEG_ENABLE;
1458*4882a593Smuzhiyun
1459*4882a593Smuzhiyun /* Mask out unsupported advertisements, and force the autoneg bit */
1460*4882a593Smuzhiyun linkmode_and(config.advertising, kset->link_modes.advertising,
1461*4882a593Smuzhiyun support);
1462*4882a593Smuzhiyun linkmode_mod_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, config.advertising,
1463*4882a593Smuzhiyun config.an_enabled);
1464*4882a593Smuzhiyun
1465*4882a593Smuzhiyun /* FIXME: should we reject autoneg if phy/mac does not support it? */
1466*4882a593Smuzhiyun switch (kset->base.autoneg) {
1467*4882a593Smuzhiyun case AUTONEG_DISABLE:
1468*4882a593Smuzhiyun /* Autonegotiation disabled, select a suitable speed and
1469*4882a593Smuzhiyun * duplex.
1470*4882a593Smuzhiyun */
1471*4882a593Smuzhiyun s = phy_lookup_setting(kset->base.speed, kset->base.duplex,
1472*4882a593Smuzhiyun support, false);
1473*4882a593Smuzhiyun if (!s)
1474*4882a593Smuzhiyun return -EINVAL;
1475*4882a593Smuzhiyun
1476*4882a593Smuzhiyun /* If we have a fixed link, refuse to change link parameters.
1477*4882a593Smuzhiyun * If the link parameters match, accept them but do nothing.
1478*4882a593Smuzhiyun */
1479*4882a593Smuzhiyun if (pl->cur_link_an_mode == MLO_AN_FIXED) {
1480*4882a593Smuzhiyun if (s->speed != pl->link_config.speed ||
1481*4882a593Smuzhiyun s->duplex != pl->link_config.duplex)
1482*4882a593Smuzhiyun return -EINVAL;
1483*4882a593Smuzhiyun return 0;
1484*4882a593Smuzhiyun }
1485*4882a593Smuzhiyun
1486*4882a593Smuzhiyun config.speed = s->speed;
1487*4882a593Smuzhiyun config.duplex = s->duplex;
1488*4882a593Smuzhiyun break;
1489*4882a593Smuzhiyun
1490*4882a593Smuzhiyun case AUTONEG_ENABLE:
1491*4882a593Smuzhiyun /* If we have a fixed link, allow autonegotiation (since that
1492*4882a593Smuzhiyun * is our default case) but do not allow the advertisement to
1493*4882a593Smuzhiyun * be changed. If the advertisement matches, simply return.
1494*4882a593Smuzhiyun */
1495*4882a593Smuzhiyun if (pl->cur_link_an_mode == MLO_AN_FIXED) {
1496*4882a593Smuzhiyun if (!linkmode_equal(config.advertising,
1497*4882a593Smuzhiyun pl->link_config.advertising))
1498*4882a593Smuzhiyun return -EINVAL;
1499*4882a593Smuzhiyun return 0;
1500*4882a593Smuzhiyun }
1501*4882a593Smuzhiyun
1502*4882a593Smuzhiyun config.speed = SPEED_UNKNOWN;
1503*4882a593Smuzhiyun config.duplex = DUPLEX_UNKNOWN;
1504*4882a593Smuzhiyun break;
1505*4882a593Smuzhiyun
1506*4882a593Smuzhiyun default:
1507*4882a593Smuzhiyun return -EINVAL;
1508*4882a593Smuzhiyun }
1509*4882a593Smuzhiyun
1510*4882a593Smuzhiyun /* We have ruled out the case with a PHY attached, and the
1511*4882a593Smuzhiyun * fixed-link cases. All that is left are in-band links.
1512*4882a593Smuzhiyun */
1513*4882a593Smuzhiyun if (phylink_validate(pl, support, &config))
1514*4882a593Smuzhiyun return -EINVAL;
1515*4882a593Smuzhiyun
1516*4882a593Smuzhiyun /* If autonegotiation is enabled, we must have an advertisement */
1517*4882a593Smuzhiyun if (config.an_enabled && phylink_is_empty_linkmode(config.advertising))
1518*4882a593Smuzhiyun return -EINVAL;
1519*4882a593Smuzhiyun
1520*4882a593Smuzhiyun /* If this link is with an SFP, ensure that changes to advertised modes
1521*4882a593Smuzhiyun * also cause the associated interface to be selected such that the
1522*4882a593Smuzhiyun * link can be configured correctly.
1523*4882a593Smuzhiyun */
1524*4882a593Smuzhiyun if (pl->sfp_port && pl->sfp_bus) {
1525*4882a593Smuzhiyun config.interface = sfp_select_interface(pl->sfp_bus,
1526*4882a593Smuzhiyun config.advertising);
1527*4882a593Smuzhiyun if (config.interface == PHY_INTERFACE_MODE_NA) {
1528*4882a593Smuzhiyun phylink_err(pl,
1529*4882a593Smuzhiyun "selection of interface failed, advertisement %*pb\n",
1530*4882a593Smuzhiyun __ETHTOOL_LINK_MODE_MASK_NBITS,
1531*4882a593Smuzhiyun config.advertising);
1532*4882a593Smuzhiyun return -EINVAL;
1533*4882a593Smuzhiyun }
1534*4882a593Smuzhiyun
1535*4882a593Smuzhiyun /* Revalidate with the selected interface */
1536*4882a593Smuzhiyun linkmode_copy(support, pl->supported);
1537*4882a593Smuzhiyun if (phylink_validate(pl, support, &config)) {
1538*4882a593Smuzhiyun phylink_err(pl, "validation of %s/%s with support %*pb failed\n",
1539*4882a593Smuzhiyun phylink_an_mode_str(pl->cur_link_an_mode),
1540*4882a593Smuzhiyun phy_modes(config.interface),
1541*4882a593Smuzhiyun __ETHTOOL_LINK_MODE_MASK_NBITS, support);
1542*4882a593Smuzhiyun return -EINVAL;
1543*4882a593Smuzhiyun }
1544*4882a593Smuzhiyun }
1545*4882a593Smuzhiyun
1546*4882a593Smuzhiyun mutex_lock(&pl->state_mutex);
1547*4882a593Smuzhiyun pl->link_config.speed = config.speed;
1548*4882a593Smuzhiyun pl->link_config.duplex = config.duplex;
1549*4882a593Smuzhiyun pl->link_config.an_enabled = config.an_enabled;
1550*4882a593Smuzhiyun
1551*4882a593Smuzhiyun if (pl->link_config.interface != config.interface) {
1552*4882a593Smuzhiyun /* The interface changed, e.g. 1000base-X <-> 2500base-X */
1553*4882a593Smuzhiyun /* We need to force the link down, then change the interface */
1554*4882a593Smuzhiyun if (pl->old_link_state) {
1555*4882a593Smuzhiyun phylink_link_down(pl);
1556*4882a593Smuzhiyun pl->old_link_state = false;
1557*4882a593Smuzhiyun }
1558*4882a593Smuzhiyun if (!test_bit(PHYLINK_DISABLE_STOPPED,
1559*4882a593Smuzhiyun &pl->phylink_disable_state))
1560*4882a593Smuzhiyun phylink_major_config(pl, false, &config);
1561*4882a593Smuzhiyun pl->link_config.interface = config.interface;
1562*4882a593Smuzhiyun linkmode_copy(pl->link_config.advertising, config.advertising);
1563*4882a593Smuzhiyun } else if (!linkmode_equal(pl->link_config.advertising,
1564*4882a593Smuzhiyun config.advertising)) {
1565*4882a593Smuzhiyun linkmode_copy(pl->link_config.advertising, config.advertising);
1566*4882a593Smuzhiyun phylink_change_inband_advert(pl);
1567*4882a593Smuzhiyun }
1568*4882a593Smuzhiyun mutex_unlock(&pl->state_mutex);
1569*4882a593Smuzhiyun
1570*4882a593Smuzhiyun return 0;
1571*4882a593Smuzhiyun }
1572*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_set);
1573*4882a593Smuzhiyun
1574*4882a593Smuzhiyun /**
1575*4882a593Smuzhiyun * phylink_ethtool_nway_reset() - restart negotiation
1576*4882a593Smuzhiyun * @pl: a pointer to a &struct phylink returned from phylink_create()
1577*4882a593Smuzhiyun *
1578*4882a593Smuzhiyun * Restart negotiation for the phylink instance specified by @pl. This will
1579*4882a593Smuzhiyun * cause any attached phy to restart negotiation with the link partner, and
1580*4882a593Smuzhiyun * if the MAC is in a BaseX mode, the MAC will also be requested to restart
1581*4882a593Smuzhiyun * negotiation.
1582*4882a593Smuzhiyun *
1583*4882a593Smuzhiyun * Returns zero on success, or negative error code.
1584*4882a593Smuzhiyun */
phylink_ethtool_nway_reset(struct phylink * pl)1585*4882a593Smuzhiyun int phylink_ethtool_nway_reset(struct phylink *pl)
1586*4882a593Smuzhiyun {
1587*4882a593Smuzhiyun int ret = 0;
1588*4882a593Smuzhiyun
1589*4882a593Smuzhiyun ASSERT_RTNL();
1590*4882a593Smuzhiyun
1591*4882a593Smuzhiyun if (pl->phydev)
1592*4882a593Smuzhiyun ret = phy_restart_aneg(pl->phydev);
1593*4882a593Smuzhiyun phylink_mac_pcs_an_restart(pl);
1594*4882a593Smuzhiyun
1595*4882a593Smuzhiyun return ret;
1596*4882a593Smuzhiyun }
1597*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(phylink_ethtool_nway_reset);
1598*4882a593Smuzhiyun
1599*4882a593Smuzhiyun /**
1600*4882a593Smuzhiyun * phylink_ethtool_get_pauseparam() - get the current pause parameters
1601*4882a593Smuzhiyun * @pl: a pointer to a &struct phylink returned from phylink_create()
1602*4882a593Smuzhiyun * @pause: a pointer to a &struct ethtool_pauseparam
1603*4882a593Smuzhiyun */
phylink_ethtool_get_pauseparam(struct phylink * pl,struct ethtool_pauseparam * pause)1604*4882a593Smuzhiyun void phylink_ethtool_get_pauseparam(struct phylink *pl,
1605*4882a593Smuzhiyun struct ethtool_pauseparam *pause)
1606*4882a593Smuzhiyun {
1607*4882a593Smuzhiyun ASSERT_RTNL();
1608*4882a593Smuzhiyun
1609*4882a593Smuzhiyun pause->autoneg = !!(pl->link_config.pause & MLO_PAUSE_AN);
1610*4882a593Smuzhiyun pause->rx_pause = !!(pl->link_config.pause & MLO_PAUSE_RX);
1611*4882a593Smuzhiyun pause->tx_pause = !!(pl->link_config.pause & MLO_PAUSE_TX);
1612*4882a593Smuzhiyun }
1613*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(phylink_ethtool_get_pauseparam);
1614*4882a593Smuzhiyun
1615*4882a593Smuzhiyun /**
1616*4882a593Smuzhiyun * phylink_ethtool_set_pauseparam() - set the current pause parameters
1617*4882a593Smuzhiyun * @pl: a pointer to a &struct phylink returned from phylink_create()
1618*4882a593Smuzhiyun * @pause: a pointer to a &struct ethtool_pauseparam
1619*4882a593Smuzhiyun */
phylink_ethtool_set_pauseparam(struct phylink * pl,struct ethtool_pauseparam * pause)1620*4882a593Smuzhiyun int phylink_ethtool_set_pauseparam(struct phylink *pl,
1621*4882a593Smuzhiyun struct ethtool_pauseparam *pause)
1622*4882a593Smuzhiyun {
1623*4882a593Smuzhiyun struct phylink_link_state *config = &pl->link_config;
1624*4882a593Smuzhiyun bool manual_changed;
1625*4882a593Smuzhiyun int pause_state;
1626*4882a593Smuzhiyun
1627*4882a593Smuzhiyun ASSERT_RTNL();
1628*4882a593Smuzhiyun
1629*4882a593Smuzhiyun if (pl->cur_link_an_mode == MLO_AN_FIXED)
1630*4882a593Smuzhiyun return -EOPNOTSUPP;
1631*4882a593Smuzhiyun
1632*4882a593Smuzhiyun if (!phylink_test(pl->supported, Pause) &&
1633*4882a593Smuzhiyun !phylink_test(pl->supported, Asym_Pause))
1634*4882a593Smuzhiyun return -EOPNOTSUPP;
1635*4882a593Smuzhiyun
1636*4882a593Smuzhiyun if (!phylink_test(pl->supported, Asym_Pause) &&
1637*4882a593Smuzhiyun pause->rx_pause != pause->tx_pause)
1638*4882a593Smuzhiyun return -EINVAL;
1639*4882a593Smuzhiyun
1640*4882a593Smuzhiyun pause_state = 0;
1641*4882a593Smuzhiyun if (pause->autoneg)
1642*4882a593Smuzhiyun pause_state |= MLO_PAUSE_AN;
1643*4882a593Smuzhiyun if (pause->rx_pause)
1644*4882a593Smuzhiyun pause_state |= MLO_PAUSE_RX;
1645*4882a593Smuzhiyun if (pause->tx_pause)
1646*4882a593Smuzhiyun pause_state |= MLO_PAUSE_TX;
1647*4882a593Smuzhiyun
1648*4882a593Smuzhiyun mutex_lock(&pl->state_mutex);
1649*4882a593Smuzhiyun /*
1650*4882a593Smuzhiyun * See the comments for linkmode_set_pause(), wrt the deficiencies
1651*4882a593Smuzhiyun * with the current implementation. A solution to this issue would
1652*4882a593Smuzhiyun * be:
1653*4882a593Smuzhiyun * ethtool Local device
1654*4882a593Smuzhiyun * rx tx Pause AsymDir
1655*4882a593Smuzhiyun * 0 0 0 0
1656*4882a593Smuzhiyun * 1 0 1 1
1657*4882a593Smuzhiyun * 0 1 0 1
1658*4882a593Smuzhiyun * 1 1 1 1
1659*4882a593Smuzhiyun * and then use the ethtool rx/tx enablement status to mask the
1660*4882a593Smuzhiyun * rx/tx pause resolution.
1661*4882a593Smuzhiyun */
1662*4882a593Smuzhiyun linkmode_set_pause(config->advertising, pause->tx_pause,
1663*4882a593Smuzhiyun pause->rx_pause);
1664*4882a593Smuzhiyun
1665*4882a593Smuzhiyun manual_changed = (config->pause ^ pause_state) & MLO_PAUSE_AN ||
1666*4882a593Smuzhiyun (!(pause_state & MLO_PAUSE_AN) &&
1667*4882a593Smuzhiyun (config->pause ^ pause_state) & MLO_PAUSE_TXRX_MASK);
1668*4882a593Smuzhiyun
1669*4882a593Smuzhiyun config->pause = pause_state;
1670*4882a593Smuzhiyun
1671*4882a593Smuzhiyun /* Update our in-band advertisement, triggering a renegotiation if
1672*4882a593Smuzhiyun * the advertisement changed.
1673*4882a593Smuzhiyun */
1674*4882a593Smuzhiyun if (!pl->phydev)
1675*4882a593Smuzhiyun phylink_change_inband_advert(pl);
1676*4882a593Smuzhiyun
1677*4882a593Smuzhiyun mutex_unlock(&pl->state_mutex);
1678*4882a593Smuzhiyun
1679*4882a593Smuzhiyun /* If we have a PHY, a change of the pause frame advertisement will
1680*4882a593Smuzhiyun * cause phylib to renegotiate (if AN is enabled) which will in turn
1681*4882a593Smuzhiyun * call our phylink_phy_change() and trigger a resolve. Note that
1682*4882a593Smuzhiyun * we can't hold our state mutex while calling phy_set_asym_pause().
1683*4882a593Smuzhiyun */
1684*4882a593Smuzhiyun if (pl->phydev)
1685*4882a593Smuzhiyun phy_set_asym_pause(pl->phydev, pause->rx_pause,
1686*4882a593Smuzhiyun pause->tx_pause);
1687*4882a593Smuzhiyun
1688*4882a593Smuzhiyun /* If the manual pause settings changed, make sure we trigger a
1689*4882a593Smuzhiyun * resolve to update their state; we can not guarantee that the
1690*4882a593Smuzhiyun * link will cycle.
1691*4882a593Smuzhiyun */
1692*4882a593Smuzhiyun if (manual_changed) {
1693*4882a593Smuzhiyun pl->mac_link_dropped = true;
1694*4882a593Smuzhiyun phylink_run_resolve(pl);
1695*4882a593Smuzhiyun }
1696*4882a593Smuzhiyun
1697*4882a593Smuzhiyun return 0;
1698*4882a593Smuzhiyun }
1699*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam);
1700*4882a593Smuzhiyun
1701*4882a593Smuzhiyun /**
1702*4882a593Smuzhiyun * phylink_ethtool_get_eee_err() - read the energy efficient ethernet error
1703*4882a593Smuzhiyun * counter
1704*4882a593Smuzhiyun * @pl: a pointer to a &struct phylink returned from phylink_create().
1705*4882a593Smuzhiyun *
1706*4882a593Smuzhiyun * Read the Energy Efficient Ethernet error counter from the PHY associated
1707*4882a593Smuzhiyun * with the phylink instance specified by @pl.
1708*4882a593Smuzhiyun *
1709*4882a593Smuzhiyun * Returns positive error counter value, or negative error code.
1710*4882a593Smuzhiyun */
phylink_get_eee_err(struct phylink * pl)1711*4882a593Smuzhiyun int phylink_get_eee_err(struct phylink *pl)
1712*4882a593Smuzhiyun {
1713*4882a593Smuzhiyun int ret = 0;
1714*4882a593Smuzhiyun
1715*4882a593Smuzhiyun ASSERT_RTNL();
1716*4882a593Smuzhiyun
1717*4882a593Smuzhiyun if (pl->phydev)
1718*4882a593Smuzhiyun ret = phy_get_eee_err(pl->phydev);
1719*4882a593Smuzhiyun
1720*4882a593Smuzhiyun return ret;
1721*4882a593Smuzhiyun }
1722*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(phylink_get_eee_err);
1723*4882a593Smuzhiyun
1724*4882a593Smuzhiyun /**
1725*4882a593Smuzhiyun * phylink_init_eee() - init and check the EEE features
1726*4882a593Smuzhiyun * @pl: a pointer to a &struct phylink returned from phylink_create()
1727*4882a593Smuzhiyun * @clk_stop_enable: allow PHY to stop receive clock
1728*4882a593Smuzhiyun *
1729*4882a593Smuzhiyun * Must be called either with RTNL held or within mac_link_up()
1730*4882a593Smuzhiyun */
phylink_init_eee(struct phylink * pl,bool clk_stop_enable)1731*4882a593Smuzhiyun int phylink_init_eee(struct phylink *pl, bool clk_stop_enable)
1732*4882a593Smuzhiyun {
1733*4882a593Smuzhiyun int ret = -EOPNOTSUPP;
1734*4882a593Smuzhiyun
1735*4882a593Smuzhiyun if (pl->phydev)
1736*4882a593Smuzhiyun ret = phy_init_eee(pl->phydev, clk_stop_enable);
1737*4882a593Smuzhiyun
1738*4882a593Smuzhiyun return ret;
1739*4882a593Smuzhiyun }
1740*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(phylink_init_eee);
1741*4882a593Smuzhiyun
1742*4882a593Smuzhiyun /**
1743*4882a593Smuzhiyun * phylink_ethtool_get_eee() - read the energy efficient ethernet parameters
1744*4882a593Smuzhiyun * @pl: a pointer to a &struct phylink returned from phylink_create()
1745*4882a593Smuzhiyun * @eee: a pointer to a &struct ethtool_eee for the read parameters
1746*4882a593Smuzhiyun */
phylink_ethtool_get_eee(struct phylink * pl,struct ethtool_eee * eee)1747*4882a593Smuzhiyun int phylink_ethtool_get_eee(struct phylink *pl, struct ethtool_eee *eee)
1748*4882a593Smuzhiyun {
1749*4882a593Smuzhiyun int ret = -EOPNOTSUPP;
1750*4882a593Smuzhiyun
1751*4882a593Smuzhiyun ASSERT_RTNL();
1752*4882a593Smuzhiyun
1753*4882a593Smuzhiyun if (pl->phydev)
1754*4882a593Smuzhiyun ret = phy_ethtool_get_eee(pl->phydev, eee);
1755*4882a593Smuzhiyun
1756*4882a593Smuzhiyun return ret;
1757*4882a593Smuzhiyun }
1758*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(phylink_ethtool_get_eee);
1759*4882a593Smuzhiyun
1760*4882a593Smuzhiyun /**
1761*4882a593Smuzhiyun * phylink_ethtool_set_eee() - set the energy efficient ethernet parameters
1762*4882a593Smuzhiyun * @pl: a pointer to a &struct phylink returned from phylink_create()
1763*4882a593Smuzhiyun * @eee: a pointer to a &struct ethtool_eee for the desired parameters
1764*4882a593Smuzhiyun */
phylink_ethtool_set_eee(struct phylink * pl,struct ethtool_eee * eee)1765*4882a593Smuzhiyun int phylink_ethtool_set_eee(struct phylink *pl, struct ethtool_eee *eee)
1766*4882a593Smuzhiyun {
1767*4882a593Smuzhiyun int ret = -EOPNOTSUPP;
1768*4882a593Smuzhiyun
1769*4882a593Smuzhiyun ASSERT_RTNL();
1770*4882a593Smuzhiyun
1771*4882a593Smuzhiyun if (pl->phydev)
1772*4882a593Smuzhiyun ret = phy_ethtool_set_eee(pl->phydev, eee);
1773*4882a593Smuzhiyun
1774*4882a593Smuzhiyun return ret;
1775*4882a593Smuzhiyun }
1776*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(phylink_ethtool_set_eee);
1777*4882a593Smuzhiyun
1778*4882a593Smuzhiyun /* This emulates MII registers for a fixed-mode phy operating as per the
1779*4882a593Smuzhiyun * passed in state. "aneg" defines if we report negotiation is possible.
1780*4882a593Smuzhiyun *
1781*4882a593Smuzhiyun * FIXME: should deal with negotiation state too.
1782*4882a593Smuzhiyun */
phylink_mii_emul_read(unsigned int reg,struct phylink_link_state * state)1783*4882a593Smuzhiyun static int phylink_mii_emul_read(unsigned int reg,
1784*4882a593Smuzhiyun struct phylink_link_state *state)
1785*4882a593Smuzhiyun {
1786*4882a593Smuzhiyun struct fixed_phy_status fs;
1787*4882a593Smuzhiyun unsigned long *lpa = state->lp_advertising;
1788*4882a593Smuzhiyun int val;
1789*4882a593Smuzhiyun
1790*4882a593Smuzhiyun fs.link = state->link;
1791*4882a593Smuzhiyun fs.speed = state->speed;
1792*4882a593Smuzhiyun fs.duplex = state->duplex;
1793*4882a593Smuzhiyun fs.pause = test_bit(ETHTOOL_LINK_MODE_Pause_BIT, lpa);
1794*4882a593Smuzhiyun fs.asym_pause = test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, lpa);
1795*4882a593Smuzhiyun
1796*4882a593Smuzhiyun val = swphy_read_reg(reg, &fs);
1797*4882a593Smuzhiyun if (reg == MII_BMSR) {
1798*4882a593Smuzhiyun if (!state->an_complete)
1799*4882a593Smuzhiyun val &= ~BMSR_ANEGCOMPLETE;
1800*4882a593Smuzhiyun }
1801*4882a593Smuzhiyun return val;
1802*4882a593Smuzhiyun }
1803*4882a593Smuzhiyun
phylink_phy_read(struct phylink * pl,unsigned int phy_id,unsigned int reg)1804*4882a593Smuzhiyun static int phylink_phy_read(struct phylink *pl, unsigned int phy_id,
1805*4882a593Smuzhiyun unsigned int reg)
1806*4882a593Smuzhiyun {
1807*4882a593Smuzhiyun struct phy_device *phydev = pl->phydev;
1808*4882a593Smuzhiyun int prtad, devad;
1809*4882a593Smuzhiyun
1810*4882a593Smuzhiyun if (mdio_phy_id_is_c45(phy_id)) {
1811*4882a593Smuzhiyun prtad = mdio_phy_id_prtad(phy_id);
1812*4882a593Smuzhiyun devad = mdio_phy_id_devad(phy_id);
1813*4882a593Smuzhiyun devad = mdiobus_c45_addr(devad, reg);
1814*4882a593Smuzhiyun } else if (phydev->is_c45) {
1815*4882a593Smuzhiyun switch (reg) {
1816*4882a593Smuzhiyun case MII_BMCR:
1817*4882a593Smuzhiyun case MII_BMSR:
1818*4882a593Smuzhiyun case MII_PHYSID1:
1819*4882a593Smuzhiyun case MII_PHYSID2:
1820*4882a593Smuzhiyun devad = __ffs(phydev->c45_ids.mmds_present);
1821*4882a593Smuzhiyun break;
1822*4882a593Smuzhiyun case MII_ADVERTISE:
1823*4882a593Smuzhiyun case MII_LPA:
1824*4882a593Smuzhiyun if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN))
1825*4882a593Smuzhiyun return -EINVAL;
1826*4882a593Smuzhiyun devad = MDIO_MMD_AN;
1827*4882a593Smuzhiyun if (reg == MII_ADVERTISE)
1828*4882a593Smuzhiyun reg = MDIO_AN_ADVERTISE;
1829*4882a593Smuzhiyun else
1830*4882a593Smuzhiyun reg = MDIO_AN_LPA;
1831*4882a593Smuzhiyun break;
1832*4882a593Smuzhiyun default:
1833*4882a593Smuzhiyun return -EINVAL;
1834*4882a593Smuzhiyun }
1835*4882a593Smuzhiyun prtad = phy_id;
1836*4882a593Smuzhiyun devad = mdiobus_c45_addr(devad, reg);
1837*4882a593Smuzhiyun } else {
1838*4882a593Smuzhiyun prtad = phy_id;
1839*4882a593Smuzhiyun devad = reg;
1840*4882a593Smuzhiyun }
1841*4882a593Smuzhiyun return mdiobus_read(pl->phydev->mdio.bus, prtad, devad);
1842*4882a593Smuzhiyun }
1843*4882a593Smuzhiyun
phylink_phy_write(struct phylink * pl,unsigned int phy_id,unsigned int reg,unsigned int val)1844*4882a593Smuzhiyun static int phylink_phy_write(struct phylink *pl, unsigned int phy_id,
1845*4882a593Smuzhiyun unsigned int reg, unsigned int val)
1846*4882a593Smuzhiyun {
1847*4882a593Smuzhiyun struct phy_device *phydev = pl->phydev;
1848*4882a593Smuzhiyun int prtad, devad;
1849*4882a593Smuzhiyun
1850*4882a593Smuzhiyun if (mdio_phy_id_is_c45(phy_id)) {
1851*4882a593Smuzhiyun prtad = mdio_phy_id_prtad(phy_id);
1852*4882a593Smuzhiyun devad = mdio_phy_id_devad(phy_id);
1853*4882a593Smuzhiyun devad = mdiobus_c45_addr(devad, reg);
1854*4882a593Smuzhiyun } else if (phydev->is_c45) {
1855*4882a593Smuzhiyun switch (reg) {
1856*4882a593Smuzhiyun case MII_BMCR:
1857*4882a593Smuzhiyun case MII_BMSR:
1858*4882a593Smuzhiyun case MII_PHYSID1:
1859*4882a593Smuzhiyun case MII_PHYSID2:
1860*4882a593Smuzhiyun devad = __ffs(phydev->c45_ids.mmds_present);
1861*4882a593Smuzhiyun break;
1862*4882a593Smuzhiyun case MII_ADVERTISE:
1863*4882a593Smuzhiyun case MII_LPA:
1864*4882a593Smuzhiyun if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN))
1865*4882a593Smuzhiyun return -EINVAL;
1866*4882a593Smuzhiyun devad = MDIO_MMD_AN;
1867*4882a593Smuzhiyun if (reg == MII_ADVERTISE)
1868*4882a593Smuzhiyun reg = MDIO_AN_ADVERTISE;
1869*4882a593Smuzhiyun else
1870*4882a593Smuzhiyun reg = MDIO_AN_LPA;
1871*4882a593Smuzhiyun break;
1872*4882a593Smuzhiyun default:
1873*4882a593Smuzhiyun return -EINVAL;
1874*4882a593Smuzhiyun }
1875*4882a593Smuzhiyun prtad = phy_id;
1876*4882a593Smuzhiyun devad = mdiobus_c45_addr(devad, reg);
1877*4882a593Smuzhiyun } else {
1878*4882a593Smuzhiyun prtad = phy_id;
1879*4882a593Smuzhiyun devad = reg;
1880*4882a593Smuzhiyun }
1881*4882a593Smuzhiyun
1882*4882a593Smuzhiyun return mdiobus_write(phydev->mdio.bus, prtad, devad, val);
1883*4882a593Smuzhiyun }
1884*4882a593Smuzhiyun
phylink_mii_read(struct phylink * pl,unsigned int phy_id,unsigned int reg)1885*4882a593Smuzhiyun static int phylink_mii_read(struct phylink *pl, unsigned int phy_id,
1886*4882a593Smuzhiyun unsigned int reg)
1887*4882a593Smuzhiyun {
1888*4882a593Smuzhiyun struct phylink_link_state state;
1889*4882a593Smuzhiyun int val = 0xffff;
1890*4882a593Smuzhiyun
1891*4882a593Smuzhiyun switch (pl->cur_link_an_mode) {
1892*4882a593Smuzhiyun case MLO_AN_FIXED:
1893*4882a593Smuzhiyun if (phy_id == 0) {
1894*4882a593Smuzhiyun phylink_get_fixed_state(pl, &state);
1895*4882a593Smuzhiyun val = phylink_mii_emul_read(reg, &state);
1896*4882a593Smuzhiyun }
1897*4882a593Smuzhiyun break;
1898*4882a593Smuzhiyun
1899*4882a593Smuzhiyun case MLO_AN_PHY:
1900*4882a593Smuzhiyun return -EOPNOTSUPP;
1901*4882a593Smuzhiyun
1902*4882a593Smuzhiyun case MLO_AN_INBAND:
1903*4882a593Smuzhiyun if (phy_id == 0) {
1904*4882a593Smuzhiyun phylink_mac_pcs_get_state(pl, &state);
1905*4882a593Smuzhiyun val = phylink_mii_emul_read(reg, &state);
1906*4882a593Smuzhiyun }
1907*4882a593Smuzhiyun break;
1908*4882a593Smuzhiyun }
1909*4882a593Smuzhiyun
1910*4882a593Smuzhiyun return val & 0xffff;
1911*4882a593Smuzhiyun }
1912*4882a593Smuzhiyun
phylink_mii_write(struct phylink * pl,unsigned int phy_id,unsigned int reg,unsigned int val)1913*4882a593Smuzhiyun static int phylink_mii_write(struct phylink *pl, unsigned int phy_id,
1914*4882a593Smuzhiyun unsigned int reg, unsigned int val)
1915*4882a593Smuzhiyun {
1916*4882a593Smuzhiyun switch (pl->cur_link_an_mode) {
1917*4882a593Smuzhiyun case MLO_AN_FIXED:
1918*4882a593Smuzhiyun break;
1919*4882a593Smuzhiyun
1920*4882a593Smuzhiyun case MLO_AN_PHY:
1921*4882a593Smuzhiyun return -EOPNOTSUPP;
1922*4882a593Smuzhiyun
1923*4882a593Smuzhiyun case MLO_AN_INBAND:
1924*4882a593Smuzhiyun break;
1925*4882a593Smuzhiyun }
1926*4882a593Smuzhiyun
1927*4882a593Smuzhiyun return 0;
1928*4882a593Smuzhiyun }
1929*4882a593Smuzhiyun
1930*4882a593Smuzhiyun /**
1931*4882a593Smuzhiyun * phylink_mii_ioctl() - generic mii ioctl interface
1932*4882a593Smuzhiyun * @pl: a pointer to a &struct phylink returned from phylink_create()
1933*4882a593Smuzhiyun * @ifr: a pointer to a &struct ifreq for socket ioctls
1934*4882a593Smuzhiyun * @cmd: ioctl cmd to execute
1935*4882a593Smuzhiyun *
1936*4882a593Smuzhiyun * Perform the specified MII ioctl on the PHY attached to the phylink instance
1937*4882a593Smuzhiyun * specified by @pl. If no PHY is attached, emulate the presence of the PHY.
1938*4882a593Smuzhiyun *
1939*4882a593Smuzhiyun * Returns: zero on success or negative error code.
1940*4882a593Smuzhiyun *
1941*4882a593Smuzhiyun * %SIOCGMIIPHY:
1942*4882a593Smuzhiyun * read register from the current PHY.
1943*4882a593Smuzhiyun * %SIOCGMIIREG:
1944*4882a593Smuzhiyun * read register from the specified PHY.
1945*4882a593Smuzhiyun * %SIOCSMIIREG:
1946*4882a593Smuzhiyun * set a register on the specified PHY.
1947*4882a593Smuzhiyun */
phylink_mii_ioctl(struct phylink * pl,struct ifreq * ifr,int cmd)1948*4882a593Smuzhiyun int phylink_mii_ioctl(struct phylink *pl, struct ifreq *ifr, int cmd)
1949*4882a593Smuzhiyun {
1950*4882a593Smuzhiyun struct mii_ioctl_data *mii = if_mii(ifr);
1951*4882a593Smuzhiyun int ret;
1952*4882a593Smuzhiyun
1953*4882a593Smuzhiyun ASSERT_RTNL();
1954*4882a593Smuzhiyun
1955*4882a593Smuzhiyun if (pl->phydev) {
1956*4882a593Smuzhiyun /* PHYs only exist for MLO_AN_PHY and SGMII */
1957*4882a593Smuzhiyun switch (cmd) {
1958*4882a593Smuzhiyun case SIOCGMIIPHY:
1959*4882a593Smuzhiyun mii->phy_id = pl->phydev->mdio.addr;
1960*4882a593Smuzhiyun fallthrough;
1961*4882a593Smuzhiyun
1962*4882a593Smuzhiyun case SIOCGMIIREG:
1963*4882a593Smuzhiyun ret = phylink_phy_read(pl, mii->phy_id, mii->reg_num);
1964*4882a593Smuzhiyun if (ret >= 0) {
1965*4882a593Smuzhiyun mii->val_out = ret;
1966*4882a593Smuzhiyun ret = 0;
1967*4882a593Smuzhiyun }
1968*4882a593Smuzhiyun break;
1969*4882a593Smuzhiyun
1970*4882a593Smuzhiyun case SIOCSMIIREG:
1971*4882a593Smuzhiyun ret = phylink_phy_write(pl, mii->phy_id, mii->reg_num,
1972*4882a593Smuzhiyun mii->val_in);
1973*4882a593Smuzhiyun break;
1974*4882a593Smuzhiyun
1975*4882a593Smuzhiyun default:
1976*4882a593Smuzhiyun ret = phy_mii_ioctl(pl->phydev, ifr, cmd);
1977*4882a593Smuzhiyun break;
1978*4882a593Smuzhiyun }
1979*4882a593Smuzhiyun } else {
1980*4882a593Smuzhiyun switch (cmd) {
1981*4882a593Smuzhiyun case SIOCGMIIPHY:
1982*4882a593Smuzhiyun mii->phy_id = 0;
1983*4882a593Smuzhiyun fallthrough;
1984*4882a593Smuzhiyun
1985*4882a593Smuzhiyun case SIOCGMIIREG:
1986*4882a593Smuzhiyun ret = phylink_mii_read(pl, mii->phy_id, mii->reg_num);
1987*4882a593Smuzhiyun if (ret >= 0) {
1988*4882a593Smuzhiyun mii->val_out = ret;
1989*4882a593Smuzhiyun ret = 0;
1990*4882a593Smuzhiyun }
1991*4882a593Smuzhiyun break;
1992*4882a593Smuzhiyun
1993*4882a593Smuzhiyun case SIOCSMIIREG:
1994*4882a593Smuzhiyun ret = phylink_mii_write(pl, mii->phy_id, mii->reg_num,
1995*4882a593Smuzhiyun mii->val_in);
1996*4882a593Smuzhiyun break;
1997*4882a593Smuzhiyun
1998*4882a593Smuzhiyun default:
1999*4882a593Smuzhiyun ret = -EOPNOTSUPP;
2000*4882a593Smuzhiyun break;
2001*4882a593Smuzhiyun }
2002*4882a593Smuzhiyun }
2003*4882a593Smuzhiyun
2004*4882a593Smuzhiyun return ret;
2005*4882a593Smuzhiyun }
2006*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(phylink_mii_ioctl);
2007*4882a593Smuzhiyun
2008*4882a593Smuzhiyun /**
2009*4882a593Smuzhiyun * phylink_speed_down() - set the non-SFP PHY to lowest speed supported by both
2010*4882a593Smuzhiyun * link partners
2011*4882a593Smuzhiyun * @pl: a pointer to a &struct phylink returned from phylink_create()
2012*4882a593Smuzhiyun * @sync: perform action synchronously
2013*4882a593Smuzhiyun *
2014*4882a593Smuzhiyun * If we have a PHY that is not part of a SFP module, then set the speed
2015*4882a593Smuzhiyun * as described in the phy_speed_down() function. Please see this function
2016*4882a593Smuzhiyun * for a description of the @sync parameter.
2017*4882a593Smuzhiyun *
2018*4882a593Smuzhiyun * Returns zero if there is no PHY, otherwise as per phy_speed_down().
2019*4882a593Smuzhiyun */
phylink_speed_down(struct phylink * pl,bool sync)2020*4882a593Smuzhiyun int phylink_speed_down(struct phylink *pl, bool sync)
2021*4882a593Smuzhiyun {
2022*4882a593Smuzhiyun int ret = 0;
2023*4882a593Smuzhiyun
2024*4882a593Smuzhiyun ASSERT_RTNL();
2025*4882a593Smuzhiyun
2026*4882a593Smuzhiyun if (!pl->sfp_bus && pl->phydev)
2027*4882a593Smuzhiyun ret = phy_speed_down(pl->phydev, sync);
2028*4882a593Smuzhiyun
2029*4882a593Smuzhiyun return ret;
2030*4882a593Smuzhiyun }
2031*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(phylink_speed_down);
2032*4882a593Smuzhiyun
2033*4882a593Smuzhiyun /**
2034*4882a593Smuzhiyun * phylink_speed_up() - restore the advertised speeds prior to the call to
2035*4882a593Smuzhiyun * phylink_speed_down()
2036*4882a593Smuzhiyun * @pl: a pointer to a &struct phylink returned from phylink_create()
2037*4882a593Smuzhiyun *
2038*4882a593Smuzhiyun * If we have a PHY that is not part of a SFP module, then restore the
2039*4882a593Smuzhiyun * PHY speeds as per phy_speed_up().
2040*4882a593Smuzhiyun *
2041*4882a593Smuzhiyun * Returns zero if there is no PHY, otherwise as per phy_speed_up().
2042*4882a593Smuzhiyun */
phylink_speed_up(struct phylink * pl)2043*4882a593Smuzhiyun int phylink_speed_up(struct phylink *pl)
2044*4882a593Smuzhiyun {
2045*4882a593Smuzhiyun int ret = 0;
2046*4882a593Smuzhiyun
2047*4882a593Smuzhiyun ASSERT_RTNL();
2048*4882a593Smuzhiyun
2049*4882a593Smuzhiyun if (!pl->sfp_bus && pl->phydev)
2050*4882a593Smuzhiyun ret = phy_speed_up(pl->phydev);
2051*4882a593Smuzhiyun
2052*4882a593Smuzhiyun return ret;
2053*4882a593Smuzhiyun }
2054*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(phylink_speed_up);
2055*4882a593Smuzhiyun
phylink_sfp_attach(void * upstream,struct sfp_bus * bus)2056*4882a593Smuzhiyun static void phylink_sfp_attach(void *upstream, struct sfp_bus *bus)
2057*4882a593Smuzhiyun {
2058*4882a593Smuzhiyun struct phylink *pl = upstream;
2059*4882a593Smuzhiyun
2060*4882a593Smuzhiyun pl->netdev->sfp_bus = bus;
2061*4882a593Smuzhiyun }
2062*4882a593Smuzhiyun
phylink_sfp_detach(void * upstream,struct sfp_bus * bus)2063*4882a593Smuzhiyun static void phylink_sfp_detach(void *upstream, struct sfp_bus *bus)
2064*4882a593Smuzhiyun {
2065*4882a593Smuzhiyun struct phylink *pl = upstream;
2066*4882a593Smuzhiyun
2067*4882a593Smuzhiyun pl->netdev->sfp_bus = NULL;
2068*4882a593Smuzhiyun }
2069*4882a593Smuzhiyun
phylink_sfp_config(struct phylink * pl,u8 mode,const unsigned long * supported,const unsigned long * advertising)2070*4882a593Smuzhiyun static int phylink_sfp_config(struct phylink *pl, u8 mode,
2071*4882a593Smuzhiyun const unsigned long *supported,
2072*4882a593Smuzhiyun const unsigned long *advertising)
2073*4882a593Smuzhiyun {
2074*4882a593Smuzhiyun __ETHTOOL_DECLARE_LINK_MODE_MASK(support1);
2075*4882a593Smuzhiyun __ETHTOOL_DECLARE_LINK_MODE_MASK(support);
2076*4882a593Smuzhiyun struct phylink_link_state config;
2077*4882a593Smuzhiyun phy_interface_t iface;
2078*4882a593Smuzhiyun bool changed;
2079*4882a593Smuzhiyun int ret;
2080*4882a593Smuzhiyun
2081*4882a593Smuzhiyun linkmode_copy(support, supported);
2082*4882a593Smuzhiyun
2083*4882a593Smuzhiyun memset(&config, 0, sizeof(config));
2084*4882a593Smuzhiyun linkmode_copy(config.advertising, advertising);
2085*4882a593Smuzhiyun config.interface = PHY_INTERFACE_MODE_NA;
2086*4882a593Smuzhiyun config.speed = SPEED_UNKNOWN;
2087*4882a593Smuzhiyun config.duplex = DUPLEX_UNKNOWN;
2088*4882a593Smuzhiyun config.pause = MLO_PAUSE_AN;
2089*4882a593Smuzhiyun config.an_enabled = pl->link_config.an_enabled;
2090*4882a593Smuzhiyun
2091*4882a593Smuzhiyun /* Ignore errors if we're expecting a PHY to attach later */
2092*4882a593Smuzhiyun ret = phylink_validate(pl, support, &config);
2093*4882a593Smuzhiyun if (ret) {
2094*4882a593Smuzhiyun phylink_err(pl, "validation with support %*pb failed: %d\n",
2095*4882a593Smuzhiyun __ETHTOOL_LINK_MODE_MASK_NBITS, support, ret);
2096*4882a593Smuzhiyun return ret;
2097*4882a593Smuzhiyun }
2098*4882a593Smuzhiyun
2099*4882a593Smuzhiyun iface = sfp_select_interface(pl->sfp_bus, config.advertising);
2100*4882a593Smuzhiyun if (iface == PHY_INTERFACE_MODE_NA) {
2101*4882a593Smuzhiyun phylink_err(pl,
2102*4882a593Smuzhiyun "selection of interface failed, advertisement %*pb\n",
2103*4882a593Smuzhiyun __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising);
2104*4882a593Smuzhiyun return -EINVAL;
2105*4882a593Smuzhiyun }
2106*4882a593Smuzhiyun
2107*4882a593Smuzhiyun config.interface = iface;
2108*4882a593Smuzhiyun linkmode_copy(support1, support);
2109*4882a593Smuzhiyun ret = phylink_validate(pl, support1, &config);
2110*4882a593Smuzhiyun if (ret) {
2111*4882a593Smuzhiyun phylink_err(pl, "validation of %s/%s with support %*pb failed: %d\n",
2112*4882a593Smuzhiyun phylink_an_mode_str(mode),
2113*4882a593Smuzhiyun phy_modes(config.interface),
2114*4882a593Smuzhiyun __ETHTOOL_LINK_MODE_MASK_NBITS, support, ret);
2115*4882a593Smuzhiyun return ret;
2116*4882a593Smuzhiyun }
2117*4882a593Smuzhiyun
2118*4882a593Smuzhiyun phylink_dbg(pl, "requesting link mode %s/%s with support %*pb\n",
2119*4882a593Smuzhiyun phylink_an_mode_str(mode), phy_modes(config.interface),
2120*4882a593Smuzhiyun __ETHTOOL_LINK_MODE_MASK_NBITS, support);
2121*4882a593Smuzhiyun
2122*4882a593Smuzhiyun if (phy_interface_mode_is_8023z(iface) && pl->phydev)
2123*4882a593Smuzhiyun return -EINVAL;
2124*4882a593Smuzhiyun
2125*4882a593Smuzhiyun changed = !linkmode_equal(pl->supported, support) ||
2126*4882a593Smuzhiyun !linkmode_equal(pl->link_config.advertising,
2127*4882a593Smuzhiyun config.advertising);
2128*4882a593Smuzhiyun if (changed) {
2129*4882a593Smuzhiyun linkmode_copy(pl->supported, support);
2130*4882a593Smuzhiyun linkmode_copy(pl->link_config.advertising, config.advertising);
2131*4882a593Smuzhiyun }
2132*4882a593Smuzhiyun
2133*4882a593Smuzhiyun if (pl->cur_link_an_mode != mode ||
2134*4882a593Smuzhiyun pl->link_config.interface != config.interface) {
2135*4882a593Smuzhiyun pl->link_config.interface = config.interface;
2136*4882a593Smuzhiyun pl->cur_link_an_mode = mode;
2137*4882a593Smuzhiyun
2138*4882a593Smuzhiyun changed = true;
2139*4882a593Smuzhiyun
2140*4882a593Smuzhiyun phylink_info(pl, "switched to %s/%s link mode\n",
2141*4882a593Smuzhiyun phylink_an_mode_str(mode),
2142*4882a593Smuzhiyun phy_modes(config.interface));
2143*4882a593Smuzhiyun }
2144*4882a593Smuzhiyun
2145*4882a593Smuzhiyun pl->link_port = pl->sfp_port;
2146*4882a593Smuzhiyun
2147*4882a593Smuzhiyun if (changed && !test_bit(PHYLINK_DISABLE_STOPPED,
2148*4882a593Smuzhiyun &pl->phylink_disable_state))
2149*4882a593Smuzhiyun phylink_mac_initial_config(pl, false);
2150*4882a593Smuzhiyun
2151*4882a593Smuzhiyun return ret;
2152*4882a593Smuzhiyun }
2153*4882a593Smuzhiyun
phylink_sfp_module_insert(void * upstream,const struct sfp_eeprom_id * id)2154*4882a593Smuzhiyun static int phylink_sfp_module_insert(void *upstream,
2155*4882a593Smuzhiyun const struct sfp_eeprom_id *id)
2156*4882a593Smuzhiyun {
2157*4882a593Smuzhiyun struct phylink *pl = upstream;
2158*4882a593Smuzhiyun unsigned long *support = pl->sfp_support;
2159*4882a593Smuzhiyun
2160*4882a593Smuzhiyun ASSERT_RTNL();
2161*4882a593Smuzhiyun
2162*4882a593Smuzhiyun linkmode_zero(support);
2163*4882a593Smuzhiyun sfp_parse_support(pl->sfp_bus, id, support);
2164*4882a593Smuzhiyun pl->sfp_port = sfp_parse_port(pl->sfp_bus, id, support);
2165*4882a593Smuzhiyun
2166*4882a593Smuzhiyun /* If this module may have a PHY connecting later, defer until later */
2167*4882a593Smuzhiyun pl->sfp_may_have_phy = sfp_may_have_phy(pl->sfp_bus, id);
2168*4882a593Smuzhiyun if (pl->sfp_may_have_phy)
2169*4882a593Smuzhiyun return 0;
2170*4882a593Smuzhiyun
2171*4882a593Smuzhiyun return phylink_sfp_config(pl, MLO_AN_INBAND, support, support);
2172*4882a593Smuzhiyun }
2173*4882a593Smuzhiyun
phylink_sfp_module_start(void * upstream)2174*4882a593Smuzhiyun static int phylink_sfp_module_start(void *upstream)
2175*4882a593Smuzhiyun {
2176*4882a593Smuzhiyun struct phylink *pl = upstream;
2177*4882a593Smuzhiyun
2178*4882a593Smuzhiyun /* If this SFP module has a PHY, start the PHY now. */
2179*4882a593Smuzhiyun if (pl->phydev) {
2180*4882a593Smuzhiyun phy_start(pl->phydev);
2181*4882a593Smuzhiyun return 0;
2182*4882a593Smuzhiyun }
2183*4882a593Smuzhiyun
2184*4882a593Smuzhiyun /* If the module may have a PHY but we didn't detect one we
2185*4882a593Smuzhiyun * need to configure the MAC here.
2186*4882a593Smuzhiyun */
2187*4882a593Smuzhiyun if (!pl->sfp_may_have_phy)
2188*4882a593Smuzhiyun return 0;
2189*4882a593Smuzhiyun
2190*4882a593Smuzhiyun return phylink_sfp_config(pl, MLO_AN_INBAND,
2191*4882a593Smuzhiyun pl->sfp_support, pl->sfp_support);
2192*4882a593Smuzhiyun }
2193*4882a593Smuzhiyun
phylink_sfp_module_stop(void * upstream)2194*4882a593Smuzhiyun static void phylink_sfp_module_stop(void *upstream)
2195*4882a593Smuzhiyun {
2196*4882a593Smuzhiyun struct phylink *pl = upstream;
2197*4882a593Smuzhiyun
2198*4882a593Smuzhiyun /* If this SFP module has a PHY, stop it. */
2199*4882a593Smuzhiyun if (pl->phydev)
2200*4882a593Smuzhiyun phy_stop(pl->phydev);
2201*4882a593Smuzhiyun }
2202*4882a593Smuzhiyun
phylink_sfp_link_down(void * upstream)2203*4882a593Smuzhiyun static void phylink_sfp_link_down(void *upstream)
2204*4882a593Smuzhiyun {
2205*4882a593Smuzhiyun struct phylink *pl = upstream;
2206*4882a593Smuzhiyun
2207*4882a593Smuzhiyun ASSERT_RTNL();
2208*4882a593Smuzhiyun
2209*4882a593Smuzhiyun phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_LINK);
2210*4882a593Smuzhiyun }
2211*4882a593Smuzhiyun
phylink_sfp_link_up(void * upstream)2212*4882a593Smuzhiyun static void phylink_sfp_link_up(void *upstream)
2213*4882a593Smuzhiyun {
2214*4882a593Smuzhiyun struct phylink *pl = upstream;
2215*4882a593Smuzhiyun
2216*4882a593Smuzhiyun ASSERT_RTNL();
2217*4882a593Smuzhiyun
2218*4882a593Smuzhiyun clear_bit(PHYLINK_DISABLE_LINK, &pl->phylink_disable_state);
2219*4882a593Smuzhiyun phylink_run_resolve(pl);
2220*4882a593Smuzhiyun }
2221*4882a593Smuzhiyun
2222*4882a593Smuzhiyun /* The Broadcom BCM84881 in the Methode DM7052 is unable to provide a SGMII
2223*4882a593Smuzhiyun * or 802.3z control word, so inband will not work.
2224*4882a593Smuzhiyun */
phylink_phy_no_inband(struct phy_device * phy)2225*4882a593Smuzhiyun static bool phylink_phy_no_inband(struct phy_device *phy)
2226*4882a593Smuzhiyun {
2227*4882a593Smuzhiyun return phy->is_c45 &&
2228*4882a593Smuzhiyun (phy->c45_ids.device_ids[1] & 0xfffffff0) == 0xae025150;
2229*4882a593Smuzhiyun }
2230*4882a593Smuzhiyun
phylink_sfp_connect_phy(void * upstream,struct phy_device * phy)2231*4882a593Smuzhiyun static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy)
2232*4882a593Smuzhiyun {
2233*4882a593Smuzhiyun struct phylink *pl = upstream;
2234*4882a593Smuzhiyun phy_interface_t interface;
2235*4882a593Smuzhiyun u8 mode;
2236*4882a593Smuzhiyun int ret;
2237*4882a593Smuzhiyun
2238*4882a593Smuzhiyun /*
2239*4882a593Smuzhiyun * This is the new way of dealing with flow control for PHYs,
2240*4882a593Smuzhiyun * as described by Timur Tabi in commit 529ed1275263 ("net: phy:
2241*4882a593Smuzhiyun * phy drivers should not set SUPPORTED_[Asym_]Pause") except
2242*4882a593Smuzhiyun * using our validate call to the MAC, we rely upon the MAC
2243*4882a593Smuzhiyun * clearing the bits from both supported and advertising fields.
2244*4882a593Smuzhiyun */
2245*4882a593Smuzhiyun phy_support_asym_pause(phy);
2246*4882a593Smuzhiyun
2247*4882a593Smuzhiyun if (phylink_phy_no_inband(phy))
2248*4882a593Smuzhiyun mode = MLO_AN_PHY;
2249*4882a593Smuzhiyun else
2250*4882a593Smuzhiyun mode = MLO_AN_INBAND;
2251*4882a593Smuzhiyun
2252*4882a593Smuzhiyun /* Do the initial configuration */
2253*4882a593Smuzhiyun ret = phylink_sfp_config(pl, mode, phy->supported, phy->advertising);
2254*4882a593Smuzhiyun if (ret < 0)
2255*4882a593Smuzhiyun return ret;
2256*4882a593Smuzhiyun
2257*4882a593Smuzhiyun interface = pl->link_config.interface;
2258*4882a593Smuzhiyun ret = phylink_attach_phy(pl, phy, interface);
2259*4882a593Smuzhiyun if (ret < 0)
2260*4882a593Smuzhiyun return ret;
2261*4882a593Smuzhiyun
2262*4882a593Smuzhiyun ret = phylink_bringup_phy(pl, phy, interface);
2263*4882a593Smuzhiyun if (ret)
2264*4882a593Smuzhiyun phy_detach(phy);
2265*4882a593Smuzhiyun
2266*4882a593Smuzhiyun return ret;
2267*4882a593Smuzhiyun }
2268*4882a593Smuzhiyun
phylink_sfp_disconnect_phy(void * upstream)2269*4882a593Smuzhiyun static void phylink_sfp_disconnect_phy(void *upstream)
2270*4882a593Smuzhiyun {
2271*4882a593Smuzhiyun phylink_disconnect_phy(upstream);
2272*4882a593Smuzhiyun }
2273*4882a593Smuzhiyun
2274*4882a593Smuzhiyun static const struct sfp_upstream_ops sfp_phylink_ops = {
2275*4882a593Smuzhiyun .attach = phylink_sfp_attach,
2276*4882a593Smuzhiyun .detach = phylink_sfp_detach,
2277*4882a593Smuzhiyun .module_insert = phylink_sfp_module_insert,
2278*4882a593Smuzhiyun .module_start = phylink_sfp_module_start,
2279*4882a593Smuzhiyun .module_stop = phylink_sfp_module_stop,
2280*4882a593Smuzhiyun .link_up = phylink_sfp_link_up,
2281*4882a593Smuzhiyun .link_down = phylink_sfp_link_down,
2282*4882a593Smuzhiyun .connect_phy = phylink_sfp_connect_phy,
2283*4882a593Smuzhiyun .disconnect_phy = phylink_sfp_disconnect_phy,
2284*4882a593Smuzhiyun };
2285*4882a593Smuzhiyun
2286*4882a593Smuzhiyun /* Helpers for MAC drivers */
2287*4882a593Smuzhiyun
2288*4882a593Smuzhiyun /**
2289*4882a593Smuzhiyun * phylink_helper_basex_speed() - 1000BaseX/2500BaseX helper
2290*4882a593Smuzhiyun * @state: a pointer to a &struct phylink_link_state
2291*4882a593Smuzhiyun *
2292*4882a593Smuzhiyun * Inspect the interface mode, advertising mask or forced speed and
2293*4882a593Smuzhiyun * decide whether to run at 2.5Gbit or 1Gbit appropriately, switching
2294*4882a593Smuzhiyun * the interface mode to suit. @state->interface is appropriately
2295*4882a593Smuzhiyun * updated, and the advertising mask has the "other" baseX_Full flag
2296*4882a593Smuzhiyun * cleared.
2297*4882a593Smuzhiyun */
phylink_helper_basex_speed(struct phylink_link_state * state)2298*4882a593Smuzhiyun void phylink_helper_basex_speed(struct phylink_link_state *state)
2299*4882a593Smuzhiyun {
2300*4882a593Smuzhiyun if (phy_interface_mode_is_8023z(state->interface)) {
2301*4882a593Smuzhiyun bool want_2500 = state->an_enabled ?
2302*4882a593Smuzhiyun phylink_test(state->advertising, 2500baseX_Full) :
2303*4882a593Smuzhiyun state->speed == SPEED_2500;
2304*4882a593Smuzhiyun
2305*4882a593Smuzhiyun if (want_2500) {
2306*4882a593Smuzhiyun phylink_clear(state->advertising, 1000baseX_Full);
2307*4882a593Smuzhiyun state->interface = PHY_INTERFACE_MODE_2500BASEX;
2308*4882a593Smuzhiyun } else {
2309*4882a593Smuzhiyun phylink_clear(state->advertising, 2500baseX_Full);
2310*4882a593Smuzhiyun state->interface = PHY_INTERFACE_MODE_1000BASEX;
2311*4882a593Smuzhiyun }
2312*4882a593Smuzhiyun }
2313*4882a593Smuzhiyun }
2314*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(phylink_helper_basex_speed);
2315*4882a593Smuzhiyun
phylink_decode_c37_word(struct phylink_link_state * state,uint16_t config_reg,int speed)2316*4882a593Smuzhiyun static void phylink_decode_c37_word(struct phylink_link_state *state,
2317*4882a593Smuzhiyun uint16_t config_reg, int speed)
2318*4882a593Smuzhiyun {
2319*4882a593Smuzhiyun bool tx_pause, rx_pause;
2320*4882a593Smuzhiyun int fd_bit;
2321*4882a593Smuzhiyun
2322*4882a593Smuzhiyun if (speed == SPEED_2500)
2323*4882a593Smuzhiyun fd_bit = ETHTOOL_LINK_MODE_2500baseX_Full_BIT;
2324*4882a593Smuzhiyun else
2325*4882a593Smuzhiyun fd_bit = ETHTOOL_LINK_MODE_1000baseX_Full_BIT;
2326*4882a593Smuzhiyun
2327*4882a593Smuzhiyun mii_lpa_mod_linkmode_x(state->lp_advertising, config_reg, fd_bit);
2328*4882a593Smuzhiyun
2329*4882a593Smuzhiyun if (linkmode_test_bit(fd_bit, state->advertising) &&
2330*4882a593Smuzhiyun linkmode_test_bit(fd_bit, state->lp_advertising)) {
2331*4882a593Smuzhiyun state->speed = speed;
2332*4882a593Smuzhiyun state->duplex = DUPLEX_FULL;
2333*4882a593Smuzhiyun } else {
2334*4882a593Smuzhiyun /* negotiation failure */
2335*4882a593Smuzhiyun state->link = false;
2336*4882a593Smuzhiyun }
2337*4882a593Smuzhiyun
2338*4882a593Smuzhiyun linkmode_resolve_pause(state->advertising, state->lp_advertising,
2339*4882a593Smuzhiyun &tx_pause, &rx_pause);
2340*4882a593Smuzhiyun
2341*4882a593Smuzhiyun if (tx_pause)
2342*4882a593Smuzhiyun state->pause |= MLO_PAUSE_TX;
2343*4882a593Smuzhiyun if (rx_pause)
2344*4882a593Smuzhiyun state->pause |= MLO_PAUSE_RX;
2345*4882a593Smuzhiyun }
2346*4882a593Smuzhiyun
phylink_decode_sgmii_word(struct phylink_link_state * state,uint16_t config_reg)2347*4882a593Smuzhiyun static void phylink_decode_sgmii_word(struct phylink_link_state *state,
2348*4882a593Smuzhiyun uint16_t config_reg)
2349*4882a593Smuzhiyun {
2350*4882a593Smuzhiyun if (!(config_reg & LPA_SGMII_LINK)) {
2351*4882a593Smuzhiyun state->link = false;
2352*4882a593Smuzhiyun return;
2353*4882a593Smuzhiyun }
2354*4882a593Smuzhiyun
2355*4882a593Smuzhiyun switch (config_reg & LPA_SGMII_SPD_MASK) {
2356*4882a593Smuzhiyun case LPA_SGMII_10:
2357*4882a593Smuzhiyun state->speed = SPEED_10;
2358*4882a593Smuzhiyun break;
2359*4882a593Smuzhiyun case LPA_SGMII_100:
2360*4882a593Smuzhiyun state->speed = SPEED_100;
2361*4882a593Smuzhiyun break;
2362*4882a593Smuzhiyun case LPA_SGMII_1000:
2363*4882a593Smuzhiyun state->speed = SPEED_1000;
2364*4882a593Smuzhiyun break;
2365*4882a593Smuzhiyun default:
2366*4882a593Smuzhiyun state->link = false;
2367*4882a593Smuzhiyun return;
2368*4882a593Smuzhiyun }
2369*4882a593Smuzhiyun if (config_reg & LPA_SGMII_FULL_DUPLEX)
2370*4882a593Smuzhiyun state->duplex = DUPLEX_FULL;
2371*4882a593Smuzhiyun else
2372*4882a593Smuzhiyun state->duplex = DUPLEX_HALF;
2373*4882a593Smuzhiyun }
2374*4882a593Smuzhiyun
2375*4882a593Smuzhiyun /**
2376*4882a593Smuzhiyun * phylink_decode_usxgmii_word() - decode the USXGMII word from a MAC PCS
2377*4882a593Smuzhiyun * @state: a pointer to a struct phylink_link_state.
2378*4882a593Smuzhiyun * @lpa: a 16 bit value which stores the USXGMII auto-negotiation word
2379*4882a593Smuzhiyun *
2380*4882a593Smuzhiyun * Helper for MAC PCS supporting the USXGMII protocol and the auto-negotiation
2381*4882a593Smuzhiyun * code word. Decode the USXGMII code word and populate the corresponding fields
2382*4882a593Smuzhiyun * (speed, duplex) into the phylink_link_state structure.
2383*4882a593Smuzhiyun */
phylink_decode_usxgmii_word(struct phylink_link_state * state,uint16_t lpa)2384*4882a593Smuzhiyun void phylink_decode_usxgmii_word(struct phylink_link_state *state,
2385*4882a593Smuzhiyun uint16_t lpa)
2386*4882a593Smuzhiyun {
2387*4882a593Smuzhiyun switch (lpa & MDIO_USXGMII_SPD_MASK) {
2388*4882a593Smuzhiyun case MDIO_USXGMII_10:
2389*4882a593Smuzhiyun state->speed = SPEED_10;
2390*4882a593Smuzhiyun break;
2391*4882a593Smuzhiyun case MDIO_USXGMII_100:
2392*4882a593Smuzhiyun state->speed = SPEED_100;
2393*4882a593Smuzhiyun break;
2394*4882a593Smuzhiyun case MDIO_USXGMII_1000:
2395*4882a593Smuzhiyun state->speed = SPEED_1000;
2396*4882a593Smuzhiyun break;
2397*4882a593Smuzhiyun case MDIO_USXGMII_2500:
2398*4882a593Smuzhiyun state->speed = SPEED_2500;
2399*4882a593Smuzhiyun break;
2400*4882a593Smuzhiyun case MDIO_USXGMII_5000:
2401*4882a593Smuzhiyun state->speed = SPEED_5000;
2402*4882a593Smuzhiyun break;
2403*4882a593Smuzhiyun case MDIO_USXGMII_10G:
2404*4882a593Smuzhiyun state->speed = SPEED_10000;
2405*4882a593Smuzhiyun break;
2406*4882a593Smuzhiyun default:
2407*4882a593Smuzhiyun state->link = false;
2408*4882a593Smuzhiyun return;
2409*4882a593Smuzhiyun }
2410*4882a593Smuzhiyun
2411*4882a593Smuzhiyun if (lpa & MDIO_USXGMII_FULL_DUPLEX)
2412*4882a593Smuzhiyun state->duplex = DUPLEX_FULL;
2413*4882a593Smuzhiyun else
2414*4882a593Smuzhiyun state->duplex = DUPLEX_HALF;
2415*4882a593Smuzhiyun }
2416*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(phylink_decode_usxgmii_word);
2417*4882a593Smuzhiyun
2418*4882a593Smuzhiyun /**
2419*4882a593Smuzhiyun * phylink_mii_c22_pcs_get_state() - read the MAC PCS state
2420*4882a593Smuzhiyun * @pcs: a pointer to a &struct mdio_device.
2421*4882a593Smuzhiyun * @state: a pointer to a &struct phylink_link_state.
2422*4882a593Smuzhiyun *
2423*4882a593Smuzhiyun * Helper for MAC PCS supporting the 802.3 clause 22 register set for
2424*4882a593Smuzhiyun * clause 37 negotiation and/or SGMII control.
2425*4882a593Smuzhiyun *
2426*4882a593Smuzhiyun * Read the MAC PCS state from the MII device configured in @config and
2427*4882a593Smuzhiyun * parse the Clause 37 or Cisco SGMII link partner negotiation word into
2428*4882a593Smuzhiyun * the phylink @state structure. This is suitable to be directly plugged
2429*4882a593Smuzhiyun * into the mac_pcs_get_state() member of the struct phylink_mac_ops
2430*4882a593Smuzhiyun * structure.
2431*4882a593Smuzhiyun */
phylink_mii_c22_pcs_get_state(struct mdio_device * pcs,struct phylink_link_state * state)2432*4882a593Smuzhiyun void phylink_mii_c22_pcs_get_state(struct mdio_device *pcs,
2433*4882a593Smuzhiyun struct phylink_link_state *state)
2434*4882a593Smuzhiyun {
2435*4882a593Smuzhiyun struct mii_bus *bus = pcs->bus;
2436*4882a593Smuzhiyun int addr = pcs->addr;
2437*4882a593Smuzhiyun int bmsr, lpa;
2438*4882a593Smuzhiyun
2439*4882a593Smuzhiyun bmsr = mdiobus_read(bus, addr, MII_BMSR);
2440*4882a593Smuzhiyun lpa = mdiobus_read(bus, addr, MII_LPA);
2441*4882a593Smuzhiyun if (bmsr < 0 || lpa < 0) {
2442*4882a593Smuzhiyun state->link = false;
2443*4882a593Smuzhiyun return;
2444*4882a593Smuzhiyun }
2445*4882a593Smuzhiyun
2446*4882a593Smuzhiyun state->link = !!(bmsr & BMSR_LSTATUS);
2447*4882a593Smuzhiyun state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE);
2448*4882a593Smuzhiyun if (!state->link)
2449*4882a593Smuzhiyun return;
2450*4882a593Smuzhiyun
2451*4882a593Smuzhiyun switch (state->interface) {
2452*4882a593Smuzhiyun case PHY_INTERFACE_MODE_1000BASEX:
2453*4882a593Smuzhiyun phylink_decode_c37_word(state, lpa, SPEED_1000);
2454*4882a593Smuzhiyun break;
2455*4882a593Smuzhiyun
2456*4882a593Smuzhiyun case PHY_INTERFACE_MODE_2500BASEX:
2457*4882a593Smuzhiyun phylink_decode_c37_word(state, lpa, SPEED_2500);
2458*4882a593Smuzhiyun break;
2459*4882a593Smuzhiyun
2460*4882a593Smuzhiyun case PHY_INTERFACE_MODE_SGMII:
2461*4882a593Smuzhiyun case PHY_INTERFACE_MODE_QSGMII:
2462*4882a593Smuzhiyun phylink_decode_sgmii_word(state, lpa);
2463*4882a593Smuzhiyun break;
2464*4882a593Smuzhiyun
2465*4882a593Smuzhiyun default:
2466*4882a593Smuzhiyun state->link = false;
2467*4882a593Smuzhiyun break;
2468*4882a593Smuzhiyun }
2469*4882a593Smuzhiyun }
2470*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_get_state);
2471*4882a593Smuzhiyun
2472*4882a593Smuzhiyun /**
2473*4882a593Smuzhiyun * phylink_mii_c22_pcs_set_advertisement() - configure the clause 37 PCS
2474*4882a593Smuzhiyun * advertisement
2475*4882a593Smuzhiyun * @pcs: a pointer to a &struct mdio_device.
2476*4882a593Smuzhiyun * @interface: the PHY interface mode being configured
2477*4882a593Smuzhiyun * @advertising: the ethtool advertisement mask
2478*4882a593Smuzhiyun *
2479*4882a593Smuzhiyun * Helper for MAC PCS supporting the 802.3 clause 22 register set for
2480*4882a593Smuzhiyun * clause 37 negotiation and/or SGMII control.
2481*4882a593Smuzhiyun *
2482*4882a593Smuzhiyun * Configure the clause 37 PCS advertisement as specified by @state. This
2483*4882a593Smuzhiyun * does not trigger a renegotiation; phylink will do that via the
2484*4882a593Smuzhiyun * mac_an_restart() method of the struct phylink_mac_ops structure.
2485*4882a593Smuzhiyun *
2486*4882a593Smuzhiyun * Returns negative error code on failure to configure the advertisement,
2487*4882a593Smuzhiyun * zero if no change has been made, or one if the advertisement has changed.
2488*4882a593Smuzhiyun */
phylink_mii_c22_pcs_set_advertisement(struct mdio_device * pcs,phy_interface_t interface,const unsigned long * advertising)2489*4882a593Smuzhiyun int phylink_mii_c22_pcs_set_advertisement(struct mdio_device *pcs,
2490*4882a593Smuzhiyun phy_interface_t interface,
2491*4882a593Smuzhiyun const unsigned long *advertising)
2492*4882a593Smuzhiyun {
2493*4882a593Smuzhiyun struct mii_bus *bus = pcs->bus;
2494*4882a593Smuzhiyun int addr = pcs->addr;
2495*4882a593Smuzhiyun int val, ret;
2496*4882a593Smuzhiyun u16 adv;
2497*4882a593Smuzhiyun
2498*4882a593Smuzhiyun switch (interface) {
2499*4882a593Smuzhiyun case PHY_INTERFACE_MODE_1000BASEX:
2500*4882a593Smuzhiyun case PHY_INTERFACE_MODE_2500BASEX:
2501*4882a593Smuzhiyun adv = ADVERTISE_1000XFULL;
2502*4882a593Smuzhiyun if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT,
2503*4882a593Smuzhiyun advertising))
2504*4882a593Smuzhiyun adv |= ADVERTISE_1000XPAUSE;
2505*4882a593Smuzhiyun if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
2506*4882a593Smuzhiyun advertising))
2507*4882a593Smuzhiyun adv |= ADVERTISE_1000XPSE_ASYM;
2508*4882a593Smuzhiyun
2509*4882a593Smuzhiyun val = mdiobus_read(bus, addr, MII_ADVERTISE);
2510*4882a593Smuzhiyun if (val < 0)
2511*4882a593Smuzhiyun return val;
2512*4882a593Smuzhiyun
2513*4882a593Smuzhiyun if (val == adv)
2514*4882a593Smuzhiyun return 0;
2515*4882a593Smuzhiyun
2516*4882a593Smuzhiyun ret = mdiobus_write(bus, addr, MII_ADVERTISE, adv);
2517*4882a593Smuzhiyun if (ret < 0)
2518*4882a593Smuzhiyun return ret;
2519*4882a593Smuzhiyun
2520*4882a593Smuzhiyun return 1;
2521*4882a593Smuzhiyun
2522*4882a593Smuzhiyun case PHY_INTERFACE_MODE_SGMII:
2523*4882a593Smuzhiyun val = mdiobus_read(bus, addr, MII_ADVERTISE);
2524*4882a593Smuzhiyun if (val < 0)
2525*4882a593Smuzhiyun return val;
2526*4882a593Smuzhiyun
2527*4882a593Smuzhiyun if (val == 0x0001)
2528*4882a593Smuzhiyun return 0;
2529*4882a593Smuzhiyun
2530*4882a593Smuzhiyun ret = mdiobus_write(bus, addr, MII_ADVERTISE, 0x0001);
2531*4882a593Smuzhiyun if (ret < 0)
2532*4882a593Smuzhiyun return ret;
2533*4882a593Smuzhiyun
2534*4882a593Smuzhiyun return 1;
2535*4882a593Smuzhiyun
2536*4882a593Smuzhiyun default:
2537*4882a593Smuzhiyun /* Nothing to do for other modes */
2538*4882a593Smuzhiyun return 0;
2539*4882a593Smuzhiyun }
2540*4882a593Smuzhiyun }
2541*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_set_advertisement);
2542*4882a593Smuzhiyun
2543*4882a593Smuzhiyun /**
2544*4882a593Smuzhiyun * phylink_mii_c22_pcs_config() - configure clause 22 PCS
2545*4882a593Smuzhiyun * @pcs: a pointer to a &struct mdio_device.
2546*4882a593Smuzhiyun * @mode: link autonegotiation mode
2547*4882a593Smuzhiyun * @interface: the PHY interface mode being configured
2548*4882a593Smuzhiyun * @advertising: the ethtool advertisement mask
2549*4882a593Smuzhiyun *
2550*4882a593Smuzhiyun * Configure a Clause 22 PCS PHY with the appropriate negotiation
2551*4882a593Smuzhiyun * parameters for the @mode, @interface and @advertising parameters.
2552*4882a593Smuzhiyun * Returns negative error number on failure, zero if the advertisement
2553*4882a593Smuzhiyun * has not changed, or positive if there is a change.
2554*4882a593Smuzhiyun */
phylink_mii_c22_pcs_config(struct mdio_device * pcs,unsigned int mode,phy_interface_t interface,const unsigned long * advertising)2555*4882a593Smuzhiyun int phylink_mii_c22_pcs_config(struct mdio_device *pcs, unsigned int mode,
2556*4882a593Smuzhiyun phy_interface_t interface,
2557*4882a593Smuzhiyun const unsigned long *advertising)
2558*4882a593Smuzhiyun {
2559*4882a593Smuzhiyun bool changed;
2560*4882a593Smuzhiyun u16 bmcr;
2561*4882a593Smuzhiyun int ret;
2562*4882a593Smuzhiyun
2563*4882a593Smuzhiyun ret = phylink_mii_c22_pcs_set_advertisement(pcs, interface,
2564*4882a593Smuzhiyun advertising);
2565*4882a593Smuzhiyun if (ret < 0)
2566*4882a593Smuzhiyun return ret;
2567*4882a593Smuzhiyun
2568*4882a593Smuzhiyun changed = ret > 0;
2569*4882a593Smuzhiyun
2570*4882a593Smuzhiyun bmcr = mode == MLO_AN_INBAND ? BMCR_ANENABLE : 0;
2571*4882a593Smuzhiyun ret = mdiobus_modify(pcs->bus, pcs->addr, MII_BMCR,
2572*4882a593Smuzhiyun BMCR_ANENABLE, bmcr);
2573*4882a593Smuzhiyun if (ret < 0)
2574*4882a593Smuzhiyun return ret;
2575*4882a593Smuzhiyun
2576*4882a593Smuzhiyun return changed ? 1 : 0;
2577*4882a593Smuzhiyun }
2578*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_config);
2579*4882a593Smuzhiyun
2580*4882a593Smuzhiyun /**
2581*4882a593Smuzhiyun * phylink_mii_c22_pcs_an_restart() - restart 802.3z autonegotiation
2582*4882a593Smuzhiyun * @pcs: a pointer to a &struct mdio_device.
2583*4882a593Smuzhiyun *
2584*4882a593Smuzhiyun * Helper for MAC PCS supporting the 802.3 clause 22 register set for
2585*4882a593Smuzhiyun * clause 37 negotiation.
2586*4882a593Smuzhiyun *
2587*4882a593Smuzhiyun * Restart the clause 37 negotiation with the link partner. This is
2588*4882a593Smuzhiyun * suitable to be directly plugged into the mac_pcs_get_state() member
2589*4882a593Smuzhiyun * of the struct phylink_mac_ops structure.
2590*4882a593Smuzhiyun */
phylink_mii_c22_pcs_an_restart(struct mdio_device * pcs)2591*4882a593Smuzhiyun void phylink_mii_c22_pcs_an_restart(struct mdio_device *pcs)
2592*4882a593Smuzhiyun {
2593*4882a593Smuzhiyun struct mii_bus *bus = pcs->bus;
2594*4882a593Smuzhiyun int val, addr = pcs->addr;
2595*4882a593Smuzhiyun
2596*4882a593Smuzhiyun val = mdiobus_read(bus, addr, MII_BMCR);
2597*4882a593Smuzhiyun if (val >= 0) {
2598*4882a593Smuzhiyun val |= BMCR_ANRESTART;
2599*4882a593Smuzhiyun
2600*4882a593Smuzhiyun mdiobus_write(bus, addr, MII_BMCR, val);
2601*4882a593Smuzhiyun }
2602*4882a593Smuzhiyun }
2603*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_an_restart);
2604*4882a593Smuzhiyun
phylink_mii_c45_pcs_get_state(struct mdio_device * pcs,struct phylink_link_state * state)2605*4882a593Smuzhiyun void phylink_mii_c45_pcs_get_state(struct mdio_device *pcs,
2606*4882a593Smuzhiyun struct phylink_link_state *state)
2607*4882a593Smuzhiyun {
2608*4882a593Smuzhiyun struct mii_bus *bus = pcs->bus;
2609*4882a593Smuzhiyun int addr = pcs->addr;
2610*4882a593Smuzhiyun int stat;
2611*4882a593Smuzhiyun
2612*4882a593Smuzhiyun stat = mdiobus_c45_read(bus, addr, MDIO_MMD_PCS, MDIO_STAT1);
2613*4882a593Smuzhiyun if (stat < 0) {
2614*4882a593Smuzhiyun state->link = false;
2615*4882a593Smuzhiyun return;
2616*4882a593Smuzhiyun }
2617*4882a593Smuzhiyun
2618*4882a593Smuzhiyun state->link = !!(stat & MDIO_STAT1_LSTATUS);
2619*4882a593Smuzhiyun if (!state->link)
2620*4882a593Smuzhiyun return;
2621*4882a593Smuzhiyun
2622*4882a593Smuzhiyun switch (state->interface) {
2623*4882a593Smuzhiyun case PHY_INTERFACE_MODE_10GBASER:
2624*4882a593Smuzhiyun state->speed = SPEED_10000;
2625*4882a593Smuzhiyun state->duplex = DUPLEX_FULL;
2626*4882a593Smuzhiyun break;
2627*4882a593Smuzhiyun
2628*4882a593Smuzhiyun default:
2629*4882a593Smuzhiyun break;
2630*4882a593Smuzhiyun }
2631*4882a593Smuzhiyun }
2632*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(phylink_mii_c45_pcs_get_state);
2633*4882a593Smuzhiyun
2634*4882a593Smuzhiyun MODULE_LICENSE("GPL v2");
2635