xref: /OK3568_Linux_fs/kernel/drivers/net/phy/phy-core.c (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0+
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * Core PHY library, taken from phy.c
4*4882a593Smuzhiyun  */
5*4882a593Smuzhiyun #include <linux/export.h>
6*4882a593Smuzhiyun #include <linux/phy.h>
7*4882a593Smuzhiyun #include <linux/of.h>
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun /**
10*4882a593Smuzhiyun  * phy_speed_to_str - Return a string representing the PHY link speed
11*4882a593Smuzhiyun  *
12*4882a593Smuzhiyun  * @speed: Speed of the link
13*4882a593Smuzhiyun  */
phy_speed_to_str(int speed)14*4882a593Smuzhiyun const char *phy_speed_to_str(int speed)
15*4882a593Smuzhiyun {
16*4882a593Smuzhiyun 	BUILD_BUG_ON_MSG(__ETHTOOL_LINK_MODE_MASK_NBITS != 92,
17*4882a593Smuzhiyun 		"Enum ethtool_link_mode_bit_indices and phylib are out of sync. "
18*4882a593Smuzhiyun 		"If a speed or mode has been added please update phy_speed_to_str "
19*4882a593Smuzhiyun 		"and the PHY settings array.\n");
20*4882a593Smuzhiyun 
21*4882a593Smuzhiyun 	switch (speed) {
22*4882a593Smuzhiyun 	case SPEED_10:
23*4882a593Smuzhiyun 		return "10Mbps";
24*4882a593Smuzhiyun 	case SPEED_100:
25*4882a593Smuzhiyun 		return "100Mbps";
26*4882a593Smuzhiyun 	case SPEED_1000:
27*4882a593Smuzhiyun 		return "1Gbps";
28*4882a593Smuzhiyun 	case SPEED_2500:
29*4882a593Smuzhiyun 		return "2.5Gbps";
30*4882a593Smuzhiyun 	case SPEED_5000:
31*4882a593Smuzhiyun 		return "5Gbps";
32*4882a593Smuzhiyun 	case SPEED_10000:
33*4882a593Smuzhiyun 		return "10Gbps";
34*4882a593Smuzhiyun 	case SPEED_14000:
35*4882a593Smuzhiyun 		return "14Gbps";
36*4882a593Smuzhiyun 	case SPEED_20000:
37*4882a593Smuzhiyun 		return "20Gbps";
38*4882a593Smuzhiyun 	case SPEED_25000:
39*4882a593Smuzhiyun 		return "25Gbps";
40*4882a593Smuzhiyun 	case SPEED_40000:
41*4882a593Smuzhiyun 		return "40Gbps";
42*4882a593Smuzhiyun 	case SPEED_50000:
43*4882a593Smuzhiyun 		return "50Gbps";
44*4882a593Smuzhiyun 	case SPEED_56000:
45*4882a593Smuzhiyun 		return "56Gbps";
46*4882a593Smuzhiyun 	case SPEED_100000:
47*4882a593Smuzhiyun 		return "100Gbps";
48*4882a593Smuzhiyun 	case SPEED_200000:
49*4882a593Smuzhiyun 		return "200Gbps";
50*4882a593Smuzhiyun 	case SPEED_400000:
51*4882a593Smuzhiyun 		return "400Gbps";
52*4882a593Smuzhiyun 	case SPEED_UNKNOWN:
53*4882a593Smuzhiyun 		return "Unknown";
54*4882a593Smuzhiyun 	default:
55*4882a593Smuzhiyun 		return "Unsupported (update phy-core.c)";
56*4882a593Smuzhiyun 	}
57*4882a593Smuzhiyun }
58*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(phy_speed_to_str);
59*4882a593Smuzhiyun 
60*4882a593Smuzhiyun /**
61*4882a593Smuzhiyun  * phy_duplex_to_str - Return string describing the duplex
62*4882a593Smuzhiyun  *
63*4882a593Smuzhiyun  * @duplex: Duplex setting to describe
64*4882a593Smuzhiyun  */
phy_duplex_to_str(unsigned int duplex)65*4882a593Smuzhiyun const char *phy_duplex_to_str(unsigned int duplex)
66*4882a593Smuzhiyun {
67*4882a593Smuzhiyun 	if (duplex == DUPLEX_HALF)
68*4882a593Smuzhiyun 		return "Half";
69*4882a593Smuzhiyun 	if (duplex == DUPLEX_FULL)
70*4882a593Smuzhiyun 		return "Full";
71*4882a593Smuzhiyun 	if (duplex == DUPLEX_UNKNOWN)
72*4882a593Smuzhiyun 		return "Unknown";
73*4882a593Smuzhiyun 	return "Unsupported (update phy-core.c)";
74*4882a593Smuzhiyun }
75*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(phy_duplex_to_str);
76*4882a593Smuzhiyun 
77*4882a593Smuzhiyun /* A mapping of all SUPPORTED settings to speed/duplex.  This table
78*4882a593Smuzhiyun  * must be grouped by speed and sorted in descending match priority
79*4882a593Smuzhiyun  * - iow, descending speed. */
80*4882a593Smuzhiyun 
81*4882a593Smuzhiyun #define PHY_SETTING(s, d, b) { .speed = SPEED_ ## s, .duplex = DUPLEX_ ## d, \
82*4882a593Smuzhiyun 			       .bit = ETHTOOL_LINK_MODE_ ## b ## _BIT}
83*4882a593Smuzhiyun 
84*4882a593Smuzhiyun static const struct phy_setting settings[] = {
85*4882a593Smuzhiyun 	/* 400G */
86*4882a593Smuzhiyun 	PHY_SETTING( 400000, FULL, 400000baseCR8_Full		),
87*4882a593Smuzhiyun 	PHY_SETTING( 400000, FULL, 400000baseKR8_Full		),
88*4882a593Smuzhiyun 	PHY_SETTING( 400000, FULL, 400000baseLR8_ER8_FR8_Full	),
89*4882a593Smuzhiyun 	PHY_SETTING( 400000, FULL, 400000baseDR8_Full		),
90*4882a593Smuzhiyun 	PHY_SETTING( 400000, FULL, 400000baseSR8_Full		),
91*4882a593Smuzhiyun 	PHY_SETTING( 400000, FULL, 400000baseCR4_Full		),
92*4882a593Smuzhiyun 	PHY_SETTING( 400000, FULL, 400000baseKR4_Full		),
93*4882a593Smuzhiyun 	PHY_SETTING( 400000, FULL, 400000baseLR4_ER4_FR4_Full	),
94*4882a593Smuzhiyun 	PHY_SETTING( 400000, FULL, 400000baseDR4_Full		),
95*4882a593Smuzhiyun 	PHY_SETTING( 400000, FULL, 400000baseSR4_Full		),
96*4882a593Smuzhiyun 	/* 200G */
97*4882a593Smuzhiyun 	PHY_SETTING( 200000, FULL, 200000baseCR4_Full		),
98*4882a593Smuzhiyun 	PHY_SETTING( 200000, FULL, 200000baseKR4_Full		),
99*4882a593Smuzhiyun 	PHY_SETTING( 200000, FULL, 200000baseLR4_ER4_FR4_Full	),
100*4882a593Smuzhiyun 	PHY_SETTING( 200000, FULL, 200000baseDR4_Full		),
101*4882a593Smuzhiyun 	PHY_SETTING( 200000, FULL, 200000baseSR4_Full		),
102*4882a593Smuzhiyun 	PHY_SETTING( 200000, FULL, 200000baseCR2_Full		),
103*4882a593Smuzhiyun 	PHY_SETTING( 200000, FULL, 200000baseKR2_Full		),
104*4882a593Smuzhiyun 	PHY_SETTING( 200000, FULL, 200000baseLR2_ER2_FR2_Full	),
105*4882a593Smuzhiyun 	PHY_SETTING( 200000, FULL, 200000baseDR2_Full		),
106*4882a593Smuzhiyun 	PHY_SETTING( 200000, FULL, 200000baseSR2_Full		),
107*4882a593Smuzhiyun 	/* 100G */
108*4882a593Smuzhiyun 	PHY_SETTING( 100000, FULL, 100000baseCR4_Full		),
109*4882a593Smuzhiyun 	PHY_SETTING( 100000, FULL, 100000baseKR4_Full		),
110*4882a593Smuzhiyun 	PHY_SETTING( 100000, FULL, 100000baseLR4_ER4_Full	),
111*4882a593Smuzhiyun 	PHY_SETTING( 100000, FULL, 100000baseSR4_Full		),
112*4882a593Smuzhiyun 	PHY_SETTING( 100000, FULL, 100000baseCR2_Full		),
113*4882a593Smuzhiyun 	PHY_SETTING( 100000, FULL, 100000baseKR2_Full		),
114*4882a593Smuzhiyun 	PHY_SETTING( 100000, FULL, 100000baseLR2_ER2_FR2_Full	),
115*4882a593Smuzhiyun 	PHY_SETTING( 100000, FULL, 100000baseDR2_Full		),
116*4882a593Smuzhiyun 	PHY_SETTING( 100000, FULL, 100000baseSR2_Full		),
117*4882a593Smuzhiyun 	PHY_SETTING( 100000, FULL, 100000baseCR_Full		),
118*4882a593Smuzhiyun 	PHY_SETTING( 100000, FULL, 100000baseKR_Full		),
119*4882a593Smuzhiyun 	PHY_SETTING( 100000, FULL, 100000baseLR_ER_FR_Full	),
120*4882a593Smuzhiyun 	PHY_SETTING( 100000, FULL, 100000baseDR_Full		),
121*4882a593Smuzhiyun 	PHY_SETTING( 100000, FULL, 100000baseSR_Full		),
122*4882a593Smuzhiyun 	/* 56G */
123*4882a593Smuzhiyun 	PHY_SETTING(  56000, FULL,  56000baseCR4_Full	  	),
124*4882a593Smuzhiyun 	PHY_SETTING(  56000, FULL,  56000baseKR4_Full	  	),
125*4882a593Smuzhiyun 	PHY_SETTING(  56000, FULL,  56000baseLR4_Full	  	),
126*4882a593Smuzhiyun 	PHY_SETTING(  56000, FULL,  56000baseSR4_Full	  	),
127*4882a593Smuzhiyun 	/* 50G */
128*4882a593Smuzhiyun 	PHY_SETTING(  50000, FULL,  50000baseCR2_Full		),
129*4882a593Smuzhiyun 	PHY_SETTING(  50000, FULL,  50000baseKR2_Full		),
130*4882a593Smuzhiyun 	PHY_SETTING(  50000, FULL,  50000baseSR2_Full		),
131*4882a593Smuzhiyun 	PHY_SETTING(  50000, FULL,  50000baseCR_Full		),
132*4882a593Smuzhiyun 	PHY_SETTING(  50000, FULL,  50000baseKR_Full		),
133*4882a593Smuzhiyun 	PHY_SETTING(  50000, FULL,  50000baseLR_ER_FR_Full	),
134*4882a593Smuzhiyun 	PHY_SETTING(  50000, FULL,  50000baseDR_Full		),
135*4882a593Smuzhiyun 	PHY_SETTING(  50000, FULL,  50000baseSR_Full		),
136*4882a593Smuzhiyun 	/* 40G */
137*4882a593Smuzhiyun 	PHY_SETTING(  40000, FULL,  40000baseCR4_Full		),
138*4882a593Smuzhiyun 	PHY_SETTING(  40000, FULL,  40000baseKR4_Full		),
139*4882a593Smuzhiyun 	PHY_SETTING(  40000, FULL,  40000baseLR4_Full		),
140*4882a593Smuzhiyun 	PHY_SETTING(  40000, FULL,  40000baseSR4_Full		),
141*4882a593Smuzhiyun 	/* 25G */
142*4882a593Smuzhiyun 	PHY_SETTING(  25000, FULL,  25000baseCR_Full		),
143*4882a593Smuzhiyun 	PHY_SETTING(  25000, FULL,  25000baseKR_Full		),
144*4882a593Smuzhiyun 	PHY_SETTING(  25000, FULL,  25000baseSR_Full		),
145*4882a593Smuzhiyun 	/* 20G */
146*4882a593Smuzhiyun 	PHY_SETTING(  20000, FULL,  20000baseKR2_Full		),
147*4882a593Smuzhiyun 	PHY_SETTING(  20000, FULL,  20000baseMLD2_Full		),
148*4882a593Smuzhiyun 	/* 10G */
149*4882a593Smuzhiyun 	PHY_SETTING(  10000, FULL,  10000baseCR_Full		),
150*4882a593Smuzhiyun 	PHY_SETTING(  10000, FULL,  10000baseER_Full		),
151*4882a593Smuzhiyun 	PHY_SETTING(  10000, FULL,  10000baseKR_Full		),
152*4882a593Smuzhiyun 	PHY_SETTING(  10000, FULL,  10000baseKX4_Full		),
153*4882a593Smuzhiyun 	PHY_SETTING(  10000, FULL,  10000baseLR_Full		),
154*4882a593Smuzhiyun 	PHY_SETTING(  10000, FULL,  10000baseLRM_Full		),
155*4882a593Smuzhiyun 	PHY_SETTING(  10000, FULL,  10000baseR_FEC		),
156*4882a593Smuzhiyun 	PHY_SETTING(  10000, FULL,  10000baseSR_Full		),
157*4882a593Smuzhiyun 	PHY_SETTING(  10000, FULL,  10000baseT_Full		),
158*4882a593Smuzhiyun 	/* 5G */
159*4882a593Smuzhiyun 	PHY_SETTING(   5000, FULL,   5000baseT_Full		),
160*4882a593Smuzhiyun 	/* 2.5G */
161*4882a593Smuzhiyun 	PHY_SETTING(   2500, FULL,   2500baseT_Full		),
162*4882a593Smuzhiyun 	PHY_SETTING(   2500, FULL,   2500baseX_Full		),
163*4882a593Smuzhiyun 	/* 1G */
164*4882a593Smuzhiyun 	PHY_SETTING(   1000, FULL,   1000baseT_Full		),
165*4882a593Smuzhiyun 	PHY_SETTING(   1000, HALF,   1000baseT_Half		),
166*4882a593Smuzhiyun 	PHY_SETTING(   1000, FULL,   1000baseT1_Full		),
167*4882a593Smuzhiyun 	PHY_SETTING(   1000, FULL,   1000baseX_Full		),
168*4882a593Smuzhiyun 	PHY_SETTING(   1000, FULL,   1000baseKX_Full		),
169*4882a593Smuzhiyun 	/* 100M */
170*4882a593Smuzhiyun 	PHY_SETTING(    100, FULL,    100baseT_Full		),
171*4882a593Smuzhiyun 	PHY_SETTING(    100, FULL,    100baseT1_Full		),
172*4882a593Smuzhiyun 	PHY_SETTING(    100, HALF,    100baseT_Half		),
173*4882a593Smuzhiyun 	PHY_SETTING(    100, HALF,    100baseFX_Half		),
174*4882a593Smuzhiyun 	PHY_SETTING(    100, FULL,    100baseFX_Full		),
175*4882a593Smuzhiyun 	/* 10M */
176*4882a593Smuzhiyun 	PHY_SETTING(     10, FULL,     10baseT_Full		),
177*4882a593Smuzhiyun 	PHY_SETTING(     10, HALF,     10baseT_Half		),
178*4882a593Smuzhiyun };
179*4882a593Smuzhiyun #undef PHY_SETTING
180*4882a593Smuzhiyun 
181*4882a593Smuzhiyun /**
182*4882a593Smuzhiyun  * phy_lookup_setting - lookup a PHY setting
183*4882a593Smuzhiyun  * @speed: speed to match
184*4882a593Smuzhiyun  * @duplex: duplex to match
185*4882a593Smuzhiyun  * @mask: allowed link modes
186*4882a593Smuzhiyun  * @exact: an exact match is required
187*4882a593Smuzhiyun  *
188*4882a593Smuzhiyun  * Search the settings array for a setting that matches the speed and
189*4882a593Smuzhiyun  * duplex, and which is supported.
190*4882a593Smuzhiyun  *
191*4882a593Smuzhiyun  * If @exact is unset, either an exact match or %NULL for no match will
192*4882a593Smuzhiyun  * be returned.
193*4882a593Smuzhiyun  *
194*4882a593Smuzhiyun  * If @exact is set, an exact match, the fastest supported setting at
195*4882a593Smuzhiyun  * or below the specified speed, the slowest supported setting, or if
196*4882a593Smuzhiyun  * they all fail, %NULL will be returned.
197*4882a593Smuzhiyun  */
198*4882a593Smuzhiyun const struct phy_setting *
phy_lookup_setting(int speed,int duplex,const unsigned long * mask,bool exact)199*4882a593Smuzhiyun phy_lookup_setting(int speed, int duplex, const unsigned long *mask, bool exact)
200*4882a593Smuzhiyun {
201*4882a593Smuzhiyun 	const struct phy_setting *p, *match = NULL, *last = NULL;
202*4882a593Smuzhiyun 	int i;
203*4882a593Smuzhiyun 
204*4882a593Smuzhiyun 	for (i = 0, p = settings; i < ARRAY_SIZE(settings); i++, p++) {
205*4882a593Smuzhiyun 		if (p->bit < __ETHTOOL_LINK_MODE_MASK_NBITS &&
206*4882a593Smuzhiyun 		    test_bit(p->bit, mask)) {
207*4882a593Smuzhiyun 			last = p;
208*4882a593Smuzhiyun 			if (p->speed == speed && p->duplex == duplex) {
209*4882a593Smuzhiyun 				/* Exact match for speed and duplex */
210*4882a593Smuzhiyun 				match = p;
211*4882a593Smuzhiyun 				break;
212*4882a593Smuzhiyun 			} else if (!exact) {
213*4882a593Smuzhiyun 				if (!match && p->speed <= speed)
214*4882a593Smuzhiyun 					/* Candidate */
215*4882a593Smuzhiyun 					match = p;
216*4882a593Smuzhiyun 
217*4882a593Smuzhiyun 				if (p->speed < speed)
218*4882a593Smuzhiyun 					break;
219*4882a593Smuzhiyun 			}
220*4882a593Smuzhiyun 		}
221*4882a593Smuzhiyun 	}
222*4882a593Smuzhiyun 
223*4882a593Smuzhiyun 	if (!match && !exact)
224*4882a593Smuzhiyun 		match = last;
225*4882a593Smuzhiyun 
226*4882a593Smuzhiyun 	return match;
227*4882a593Smuzhiyun }
228*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(phy_lookup_setting);
229*4882a593Smuzhiyun 
phy_speeds(unsigned int * speeds,size_t size,unsigned long * mask)230*4882a593Smuzhiyun size_t phy_speeds(unsigned int *speeds, size_t size,
231*4882a593Smuzhiyun 		  unsigned long *mask)
232*4882a593Smuzhiyun {
233*4882a593Smuzhiyun 	size_t count;
234*4882a593Smuzhiyun 	int i;
235*4882a593Smuzhiyun 
236*4882a593Smuzhiyun 	for (i = 0, count = 0; i < ARRAY_SIZE(settings) && count < size; i++)
237*4882a593Smuzhiyun 		if (settings[i].bit < __ETHTOOL_LINK_MODE_MASK_NBITS &&
238*4882a593Smuzhiyun 		    test_bit(settings[i].bit, mask) &&
239*4882a593Smuzhiyun 		    (count == 0 || speeds[count - 1] != settings[i].speed))
240*4882a593Smuzhiyun 			speeds[count++] = settings[i].speed;
241*4882a593Smuzhiyun 
242*4882a593Smuzhiyun 	return count;
243*4882a593Smuzhiyun }
244*4882a593Smuzhiyun 
__set_linkmode_max_speed(u32 max_speed,unsigned long * addr)245*4882a593Smuzhiyun static int __set_linkmode_max_speed(u32 max_speed, unsigned long *addr)
246*4882a593Smuzhiyun {
247*4882a593Smuzhiyun 	const struct phy_setting *p;
248*4882a593Smuzhiyun 	int i;
249*4882a593Smuzhiyun 
250*4882a593Smuzhiyun 	for (i = 0, p = settings; i < ARRAY_SIZE(settings); i++, p++) {
251*4882a593Smuzhiyun 		if (p->speed > max_speed)
252*4882a593Smuzhiyun 			linkmode_clear_bit(p->bit, addr);
253*4882a593Smuzhiyun 		else
254*4882a593Smuzhiyun 			break;
255*4882a593Smuzhiyun 	}
256*4882a593Smuzhiyun 
257*4882a593Smuzhiyun 	return 0;
258*4882a593Smuzhiyun }
259*4882a593Smuzhiyun 
__set_phy_supported(struct phy_device * phydev,u32 max_speed)260*4882a593Smuzhiyun static int __set_phy_supported(struct phy_device *phydev, u32 max_speed)
261*4882a593Smuzhiyun {
262*4882a593Smuzhiyun 	return __set_linkmode_max_speed(max_speed, phydev->supported);
263*4882a593Smuzhiyun }
264*4882a593Smuzhiyun 
265*4882a593Smuzhiyun /**
266*4882a593Smuzhiyun  * phy_set_max_speed - Set the maximum speed the PHY should support
267*4882a593Smuzhiyun  *
268*4882a593Smuzhiyun  * @phydev: The phy_device struct
269*4882a593Smuzhiyun  * @max_speed: Maximum speed
270*4882a593Smuzhiyun  *
271*4882a593Smuzhiyun  * The PHY might be more capable than the MAC. For example a Fast Ethernet
272*4882a593Smuzhiyun  * is connected to a 1G PHY. This function allows the MAC to indicate its
273*4882a593Smuzhiyun  * maximum speed, and so limit what the PHY will advertise.
274*4882a593Smuzhiyun  */
phy_set_max_speed(struct phy_device * phydev,u32 max_speed)275*4882a593Smuzhiyun int phy_set_max_speed(struct phy_device *phydev, u32 max_speed)
276*4882a593Smuzhiyun {
277*4882a593Smuzhiyun 	int err;
278*4882a593Smuzhiyun 
279*4882a593Smuzhiyun 	err = __set_phy_supported(phydev, max_speed);
280*4882a593Smuzhiyun 	if (err)
281*4882a593Smuzhiyun 		return err;
282*4882a593Smuzhiyun 
283*4882a593Smuzhiyun 	phy_advertise_supported(phydev);
284*4882a593Smuzhiyun 
285*4882a593Smuzhiyun 	return 0;
286*4882a593Smuzhiyun }
287*4882a593Smuzhiyun EXPORT_SYMBOL(phy_set_max_speed);
288*4882a593Smuzhiyun 
of_set_phy_supported(struct phy_device * phydev)289*4882a593Smuzhiyun void of_set_phy_supported(struct phy_device *phydev)
290*4882a593Smuzhiyun {
291*4882a593Smuzhiyun 	struct device_node *node = phydev->mdio.dev.of_node;
292*4882a593Smuzhiyun 	u32 max_speed;
293*4882a593Smuzhiyun 
294*4882a593Smuzhiyun 	if (!IS_ENABLED(CONFIG_OF_MDIO))
295*4882a593Smuzhiyun 		return;
296*4882a593Smuzhiyun 
297*4882a593Smuzhiyun 	if (!node)
298*4882a593Smuzhiyun 		return;
299*4882a593Smuzhiyun 
300*4882a593Smuzhiyun 	if (!of_property_read_u32(node, "max-speed", &max_speed))
301*4882a593Smuzhiyun 		__set_phy_supported(phydev, max_speed);
302*4882a593Smuzhiyun }
303*4882a593Smuzhiyun 
of_set_phy_eee_broken(struct phy_device * phydev)304*4882a593Smuzhiyun void of_set_phy_eee_broken(struct phy_device *phydev)
305*4882a593Smuzhiyun {
306*4882a593Smuzhiyun 	struct device_node *node = phydev->mdio.dev.of_node;
307*4882a593Smuzhiyun 	u32 broken = 0;
308*4882a593Smuzhiyun 
309*4882a593Smuzhiyun 	if (!IS_ENABLED(CONFIG_OF_MDIO))
310*4882a593Smuzhiyun 		return;
311*4882a593Smuzhiyun 
312*4882a593Smuzhiyun 	if (!node)
313*4882a593Smuzhiyun 		return;
314*4882a593Smuzhiyun 
315*4882a593Smuzhiyun 	if (of_property_read_bool(node, "eee-broken-100tx"))
316*4882a593Smuzhiyun 		broken |= MDIO_EEE_100TX;
317*4882a593Smuzhiyun 	if (of_property_read_bool(node, "eee-broken-1000t"))
318*4882a593Smuzhiyun 		broken |= MDIO_EEE_1000T;
319*4882a593Smuzhiyun 	if (of_property_read_bool(node, "eee-broken-10gt"))
320*4882a593Smuzhiyun 		broken |= MDIO_EEE_10GT;
321*4882a593Smuzhiyun 	if (of_property_read_bool(node, "eee-broken-1000kx"))
322*4882a593Smuzhiyun 		broken |= MDIO_EEE_1000KX;
323*4882a593Smuzhiyun 	if (of_property_read_bool(node, "eee-broken-10gkx4"))
324*4882a593Smuzhiyun 		broken |= MDIO_EEE_10GKX4;
325*4882a593Smuzhiyun 	if (of_property_read_bool(node, "eee-broken-10gkr"))
326*4882a593Smuzhiyun 		broken |= MDIO_EEE_10GKR;
327*4882a593Smuzhiyun 
328*4882a593Smuzhiyun 	phydev->eee_broken_modes = broken;
329*4882a593Smuzhiyun }
330*4882a593Smuzhiyun 
331*4882a593Smuzhiyun /**
332*4882a593Smuzhiyun  * phy_resolve_aneg_pause - Determine pause autoneg results
333*4882a593Smuzhiyun  *
334*4882a593Smuzhiyun  * @phydev: The phy_device struct
335*4882a593Smuzhiyun  *
336*4882a593Smuzhiyun  * Once autoneg has completed the local pause settings can be
337*4882a593Smuzhiyun  * resolved.  Determine if pause and asymmetric pause should be used
338*4882a593Smuzhiyun  * by the MAC.
339*4882a593Smuzhiyun  */
340*4882a593Smuzhiyun 
phy_resolve_aneg_pause(struct phy_device * phydev)341*4882a593Smuzhiyun void phy_resolve_aneg_pause(struct phy_device *phydev)
342*4882a593Smuzhiyun {
343*4882a593Smuzhiyun 	if (phydev->duplex == DUPLEX_FULL) {
344*4882a593Smuzhiyun 		phydev->pause = linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT,
345*4882a593Smuzhiyun 						  phydev->lp_advertising);
346*4882a593Smuzhiyun 		phydev->asym_pause = linkmode_test_bit(
347*4882a593Smuzhiyun 			ETHTOOL_LINK_MODE_Asym_Pause_BIT,
348*4882a593Smuzhiyun 			phydev->lp_advertising);
349*4882a593Smuzhiyun 	}
350*4882a593Smuzhiyun }
351*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(phy_resolve_aneg_pause);
352*4882a593Smuzhiyun 
353*4882a593Smuzhiyun /**
354*4882a593Smuzhiyun  * phy_resolve_aneg_linkmode - resolve the advertisements into PHY settings
355*4882a593Smuzhiyun  * @phydev: The phy_device struct
356*4882a593Smuzhiyun  *
357*4882a593Smuzhiyun  * Resolve our and the link partner advertisements into their corresponding
358*4882a593Smuzhiyun  * speed and duplex. If full duplex was negotiated, extract the pause mode
359*4882a593Smuzhiyun  * from the link partner mask.
360*4882a593Smuzhiyun  */
phy_resolve_aneg_linkmode(struct phy_device * phydev)361*4882a593Smuzhiyun void phy_resolve_aneg_linkmode(struct phy_device *phydev)
362*4882a593Smuzhiyun {
363*4882a593Smuzhiyun 	__ETHTOOL_DECLARE_LINK_MODE_MASK(common);
364*4882a593Smuzhiyun 	int i;
365*4882a593Smuzhiyun 
366*4882a593Smuzhiyun 	linkmode_and(common, phydev->lp_advertising, phydev->advertising);
367*4882a593Smuzhiyun 
368*4882a593Smuzhiyun 	for (i = 0; i < ARRAY_SIZE(settings); i++)
369*4882a593Smuzhiyun 		if (test_bit(settings[i].bit, common)) {
370*4882a593Smuzhiyun 			phydev->speed = settings[i].speed;
371*4882a593Smuzhiyun 			phydev->duplex = settings[i].duplex;
372*4882a593Smuzhiyun 			break;
373*4882a593Smuzhiyun 		}
374*4882a593Smuzhiyun 
375*4882a593Smuzhiyun 	phy_resolve_aneg_pause(phydev);
376*4882a593Smuzhiyun }
377*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(phy_resolve_aneg_linkmode);
378*4882a593Smuzhiyun 
379*4882a593Smuzhiyun /**
380*4882a593Smuzhiyun  * phy_check_downshift - check whether downshift occurred
381*4882a593Smuzhiyun  * @phydev: The phy_device struct
382*4882a593Smuzhiyun  *
383*4882a593Smuzhiyun  * Check whether a downshift to a lower speed occurred. If this should be the
384*4882a593Smuzhiyun  * case warn the user.
385*4882a593Smuzhiyun  * Prerequisite for detecting downshift is that PHY driver implements the
386*4882a593Smuzhiyun  * read_status callback and sets phydev->speed to the actual link speed.
387*4882a593Smuzhiyun  */
phy_check_downshift(struct phy_device * phydev)388*4882a593Smuzhiyun void phy_check_downshift(struct phy_device *phydev)
389*4882a593Smuzhiyun {
390*4882a593Smuzhiyun 	__ETHTOOL_DECLARE_LINK_MODE_MASK(common);
391*4882a593Smuzhiyun 	int i, speed = SPEED_UNKNOWN;
392*4882a593Smuzhiyun 
393*4882a593Smuzhiyun 	phydev->downshifted_rate = 0;
394*4882a593Smuzhiyun 
395*4882a593Smuzhiyun 	if (phydev->autoneg == AUTONEG_DISABLE ||
396*4882a593Smuzhiyun 	    phydev->speed == SPEED_UNKNOWN)
397*4882a593Smuzhiyun 		return;
398*4882a593Smuzhiyun 
399*4882a593Smuzhiyun 	linkmode_and(common, phydev->lp_advertising, phydev->advertising);
400*4882a593Smuzhiyun 
401*4882a593Smuzhiyun 	for (i = 0; i < ARRAY_SIZE(settings); i++)
402*4882a593Smuzhiyun 		if (test_bit(settings[i].bit, common)) {
403*4882a593Smuzhiyun 			speed = settings[i].speed;
404*4882a593Smuzhiyun 			break;
405*4882a593Smuzhiyun 		}
406*4882a593Smuzhiyun 
407*4882a593Smuzhiyun 	if (speed == SPEED_UNKNOWN || phydev->speed >= speed)
408*4882a593Smuzhiyun 		return;
409*4882a593Smuzhiyun 
410*4882a593Smuzhiyun 	phydev_warn(phydev, "Downshift occurred from negotiated speed %s to actual speed %s, check cabling!\n",
411*4882a593Smuzhiyun 		    phy_speed_to_str(speed), phy_speed_to_str(phydev->speed));
412*4882a593Smuzhiyun 
413*4882a593Smuzhiyun 	phydev->downshifted_rate = 1;
414*4882a593Smuzhiyun }
415*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(phy_check_downshift);
416*4882a593Smuzhiyun 
phy_resolve_min_speed(struct phy_device * phydev,bool fdx_only)417*4882a593Smuzhiyun static int phy_resolve_min_speed(struct phy_device *phydev, bool fdx_only)
418*4882a593Smuzhiyun {
419*4882a593Smuzhiyun 	__ETHTOOL_DECLARE_LINK_MODE_MASK(common);
420*4882a593Smuzhiyun 	int i = ARRAY_SIZE(settings);
421*4882a593Smuzhiyun 
422*4882a593Smuzhiyun 	linkmode_and(common, phydev->lp_advertising, phydev->advertising);
423*4882a593Smuzhiyun 
424*4882a593Smuzhiyun 	while (--i >= 0) {
425*4882a593Smuzhiyun 		if (test_bit(settings[i].bit, common)) {
426*4882a593Smuzhiyun 			if (fdx_only && settings[i].duplex != DUPLEX_FULL)
427*4882a593Smuzhiyun 				continue;
428*4882a593Smuzhiyun 			return settings[i].speed;
429*4882a593Smuzhiyun 		}
430*4882a593Smuzhiyun 	}
431*4882a593Smuzhiyun 
432*4882a593Smuzhiyun 	return SPEED_UNKNOWN;
433*4882a593Smuzhiyun }
434*4882a593Smuzhiyun 
phy_speed_down_core(struct phy_device * phydev)435*4882a593Smuzhiyun int phy_speed_down_core(struct phy_device *phydev)
436*4882a593Smuzhiyun {
437*4882a593Smuzhiyun 	int min_common_speed = phy_resolve_min_speed(phydev, true);
438*4882a593Smuzhiyun 
439*4882a593Smuzhiyun 	if (min_common_speed == SPEED_UNKNOWN)
440*4882a593Smuzhiyun 		return -EINVAL;
441*4882a593Smuzhiyun 
442*4882a593Smuzhiyun 	return __set_linkmode_max_speed(min_common_speed, phydev->advertising);
443*4882a593Smuzhiyun }
444*4882a593Smuzhiyun 
mmd_phy_indirect(struct mii_bus * bus,int phy_addr,int devad,u16 regnum)445*4882a593Smuzhiyun static void mmd_phy_indirect(struct mii_bus *bus, int phy_addr, int devad,
446*4882a593Smuzhiyun 			     u16 regnum)
447*4882a593Smuzhiyun {
448*4882a593Smuzhiyun 	/* Write the desired MMD Devad */
449*4882a593Smuzhiyun 	__mdiobus_write(bus, phy_addr, MII_MMD_CTRL, devad);
450*4882a593Smuzhiyun 
451*4882a593Smuzhiyun 	/* Write the desired MMD register address */
452*4882a593Smuzhiyun 	__mdiobus_write(bus, phy_addr, MII_MMD_DATA, regnum);
453*4882a593Smuzhiyun 
454*4882a593Smuzhiyun 	/* Select the Function : DATA with no post increment */
455*4882a593Smuzhiyun 	__mdiobus_write(bus, phy_addr, MII_MMD_CTRL,
456*4882a593Smuzhiyun 			devad | MII_MMD_CTRL_NOINCR);
457*4882a593Smuzhiyun }
458*4882a593Smuzhiyun 
459*4882a593Smuzhiyun /**
460*4882a593Smuzhiyun  * __phy_read_mmd - Convenience function for reading a register
461*4882a593Smuzhiyun  * from an MMD on a given PHY.
462*4882a593Smuzhiyun  * @phydev: The phy_device struct
463*4882a593Smuzhiyun  * @devad: The MMD to read from (0..31)
464*4882a593Smuzhiyun  * @regnum: The register on the MMD to read (0..65535)
465*4882a593Smuzhiyun  *
466*4882a593Smuzhiyun  * Same rules as for __phy_read();
467*4882a593Smuzhiyun  */
__phy_read_mmd(struct phy_device * phydev,int devad,u32 regnum)468*4882a593Smuzhiyun int __phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum)
469*4882a593Smuzhiyun {
470*4882a593Smuzhiyun 	int val;
471*4882a593Smuzhiyun 
472*4882a593Smuzhiyun 	if (regnum > (u16)~0 || devad > 32)
473*4882a593Smuzhiyun 		return -EINVAL;
474*4882a593Smuzhiyun 
475*4882a593Smuzhiyun 	if (phydev->drv && phydev->drv->read_mmd) {
476*4882a593Smuzhiyun 		val = phydev->drv->read_mmd(phydev, devad, regnum);
477*4882a593Smuzhiyun 	} else if (phydev->is_c45) {
478*4882a593Smuzhiyun 		val = __mdiobus_c45_read(phydev->mdio.bus, phydev->mdio.addr,
479*4882a593Smuzhiyun 					 devad, regnum);
480*4882a593Smuzhiyun 	} else {
481*4882a593Smuzhiyun 		struct mii_bus *bus = phydev->mdio.bus;
482*4882a593Smuzhiyun 		int phy_addr = phydev->mdio.addr;
483*4882a593Smuzhiyun 
484*4882a593Smuzhiyun 		mmd_phy_indirect(bus, phy_addr, devad, regnum);
485*4882a593Smuzhiyun 
486*4882a593Smuzhiyun 		/* Read the content of the MMD's selected register */
487*4882a593Smuzhiyun 		val = __mdiobus_read(bus, phy_addr, MII_MMD_DATA);
488*4882a593Smuzhiyun 	}
489*4882a593Smuzhiyun 	return val;
490*4882a593Smuzhiyun }
491*4882a593Smuzhiyun EXPORT_SYMBOL(__phy_read_mmd);
492*4882a593Smuzhiyun 
493*4882a593Smuzhiyun /**
494*4882a593Smuzhiyun  * phy_read_mmd - Convenience function for reading a register
495*4882a593Smuzhiyun  * from an MMD on a given PHY.
496*4882a593Smuzhiyun  * @phydev: The phy_device struct
497*4882a593Smuzhiyun  * @devad: The MMD to read from
498*4882a593Smuzhiyun  * @regnum: The register on the MMD to read
499*4882a593Smuzhiyun  *
500*4882a593Smuzhiyun  * Same rules as for phy_read();
501*4882a593Smuzhiyun  */
phy_read_mmd(struct phy_device * phydev,int devad,u32 regnum)502*4882a593Smuzhiyun int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum)
503*4882a593Smuzhiyun {
504*4882a593Smuzhiyun 	int ret;
505*4882a593Smuzhiyun 
506*4882a593Smuzhiyun 	phy_lock_mdio_bus(phydev);
507*4882a593Smuzhiyun 	ret = __phy_read_mmd(phydev, devad, regnum);
508*4882a593Smuzhiyun 	phy_unlock_mdio_bus(phydev);
509*4882a593Smuzhiyun 
510*4882a593Smuzhiyun 	return ret;
511*4882a593Smuzhiyun }
512*4882a593Smuzhiyun EXPORT_SYMBOL(phy_read_mmd);
513*4882a593Smuzhiyun 
514*4882a593Smuzhiyun /**
515*4882a593Smuzhiyun  * __phy_write_mmd - Convenience function for writing a register
516*4882a593Smuzhiyun  * on an MMD on a given PHY.
517*4882a593Smuzhiyun  * @phydev: The phy_device struct
518*4882a593Smuzhiyun  * @devad: The MMD to read from
519*4882a593Smuzhiyun  * @regnum: The register on the MMD to read
520*4882a593Smuzhiyun  * @val: value to write to @regnum
521*4882a593Smuzhiyun  *
522*4882a593Smuzhiyun  * Same rules as for __phy_write();
523*4882a593Smuzhiyun  */
__phy_write_mmd(struct phy_device * phydev,int devad,u32 regnum,u16 val)524*4882a593Smuzhiyun int __phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val)
525*4882a593Smuzhiyun {
526*4882a593Smuzhiyun 	int ret;
527*4882a593Smuzhiyun 
528*4882a593Smuzhiyun 	if (regnum > (u16)~0 || devad > 32)
529*4882a593Smuzhiyun 		return -EINVAL;
530*4882a593Smuzhiyun 
531*4882a593Smuzhiyun 	if (phydev->drv && phydev->drv->write_mmd) {
532*4882a593Smuzhiyun 		ret = phydev->drv->write_mmd(phydev, devad, regnum, val);
533*4882a593Smuzhiyun 	} else if (phydev->is_c45) {
534*4882a593Smuzhiyun 		ret = __mdiobus_c45_write(phydev->mdio.bus, phydev->mdio.addr,
535*4882a593Smuzhiyun 					  devad, regnum, val);
536*4882a593Smuzhiyun 	} else {
537*4882a593Smuzhiyun 		struct mii_bus *bus = phydev->mdio.bus;
538*4882a593Smuzhiyun 		int phy_addr = phydev->mdio.addr;
539*4882a593Smuzhiyun 
540*4882a593Smuzhiyun 		mmd_phy_indirect(bus, phy_addr, devad, regnum);
541*4882a593Smuzhiyun 
542*4882a593Smuzhiyun 		/* Write the data into MMD's selected register */
543*4882a593Smuzhiyun 		__mdiobus_write(bus, phy_addr, MII_MMD_DATA, val);
544*4882a593Smuzhiyun 
545*4882a593Smuzhiyun 		ret = 0;
546*4882a593Smuzhiyun 	}
547*4882a593Smuzhiyun 	return ret;
548*4882a593Smuzhiyun }
549*4882a593Smuzhiyun EXPORT_SYMBOL(__phy_write_mmd);
550*4882a593Smuzhiyun 
551*4882a593Smuzhiyun /**
552*4882a593Smuzhiyun  * phy_write_mmd - Convenience function for writing a register
553*4882a593Smuzhiyun  * on an MMD on a given PHY.
554*4882a593Smuzhiyun  * @phydev: The phy_device struct
555*4882a593Smuzhiyun  * @devad: The MMD to read from
556*4882a593Smuzhiyun  * @regnum: The register on the MMD to read
557*4882a593Smuzhiyun  * @val: value to write to @regnum
558*4882a593Smuzhiyun  *
559*4882a593Smuzhiyun  * Same rules as for phy_write();
560*4882a593Smuzhiyun  */
phy_write_mmd(struct phy_device * phydev,int devad,u32 regnum,u16 val)561*4882a593Smuzhiyun int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val)
562*4882a593Smuzhiyun {
563*4882a593Smuzhiyun 	int ret;
564*4882a593Smuzhiyun 
565*4882a593Smuzhiyun 	phy_lock_mdio_bus(phydev);
566*4882a593Smuzhiyun 	ret = __phy_write_mmd(phydev, devad, regnum, val);
567*4882a593Smuzhiyun 	phy_unlock_mdio_bus(phydev);
568*4882a593Smuzhiyun 
569*4882a593Smuzhiyun 	return ret;
570*4882a593Smuzhiyun }
571*4882a593Smuzhiyun EXPORT_SYMBOL(phy_write_mmd);
572*4882a593Smuzhiyun 
573*4882a593Smuzhiyun /**
574*4882a593Smuzhiyun  * phy_modify_changed - Function for modifying a PHY register
575*4882a593Smuzhiyun  * @phydev: the phy_device struct
576*4882a593Smuzhiyun  * @regnum: register number to modify
577*4882a593Smuzhiyun  * @mask: bit mask of bits to clear
578*4882a593Smuzhiyun  * @set: new value of bits set in mask to write to @regnum
579*4882a593Smuzhiyun  *
580*4882a593Smuzhiyun  * NOTE: MUST NOT be called from interrupt context,
581*4882a593Smuzhiyun  * because the bus read/write functions may wait for an interrupt
582*4882a593Smuzhiyun  * to conclude the operation.
583*4882a593Smuzhiyun  *
584*4882a593Smuzhiyun  * Returns negative errno, 0 if there was no change, and 1 in case of change
585*4882a593Smuzhiyun  */
phy_modify_changed(struct phy_device * phydev,u32 regnum,u16 mask,u16 set)586*4882a593Smuzhiyun int phy_modify_changed(struct phy_device *phydev, u32 regnum, u16 mask, u16 set)
587*4882a593Smuzhiyun {
588*4882a593Smuzhiyun 	int ret;
589*4882a593Smuzhiyun 
590*4882a593Smuzhiyun 	phy_lock_mdio_bus(phydev);
591*4882a593Smuzhiyun 	ret = __phy_modify_changed(phydev, regnum, mask, set);
592*4882a593Smuzhiyun 	phy_unlock_mdio_bus(phydev);
593*4882a593Smuzhiyun 
594*4882a593Smuzhiyun 	return ret;
595*4882a593Smuzhiyun }
596*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(phy_modify_changed);
597*4882a593Smuzhiyun 
598*4882a593Smuzhiyun /**
599*4882a593Smuzhiyun  * __phy_modify - Convenience function for modifying a PHY register
600*4882a593Smuzhiyun  * @phydev: the phy_device struct
601*4882a593Smuzhiyun  * @regnum: register number to modify
602*4882a593Smuzhiyun  * @mask: bit mask of bits to clear
603*4882a593Smuzhiyun  * @set: new value of bits set in mask to write to @regnum
604*4882a593Smuzhiyun  *
605*4882a593Smuzhiyun  * NOTE: MUST NOT be called from interrupt context,
606*4882a593Smuzhiyun  * because the bus read/write functions may wait for an interrupt
607*4882a593Smuzhiyun  * to conclude the operation.
608*4882a593Smuzhiyun  */
__phy_modify(struct phy_device * phydev,u32 regnum,u16 mask,u16 set)609*4882a593Smuzhiyun int __phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set)
610*4882a593Smuzhiyun {
611*4882a593Smuzhiyun 	int ret;
612*4882a593Smuzhiyun 
613*4882a593Smuzhiyun 	ret = __phy_modify_changed(phydev, regnum, mask, set);
614*4882a593Smuzhiyun 
615*4882a593Smuzhiyun 	return ret < 0 ? ret : 0;
616*4882a593Smuzhiyun }
617*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(__phy_modify);
618*4882a593Smuzhiyun 
619*4882a593Smuzhiyun /**
620*4882a593Smuzhiyun  * phy_modify - Convenience function for modifying a given PHY register
621*4882a593Smuzhiyun  * @phydev: the phy_device struct
622*4882a593Smuzhiyun  * @regnum: register number to write
623*4882a593Smuzhiyun  * @mask: bit mask of bits to clear
624*4882a593Smuzhiyun  * @set: new value of bits set in mask to write to @regnum
625*4882a593Smuzhiyun  *
626*4882a593Smuzhiyun  * NOTE: MUST NOT be called from interrupt context,
627*4882a593Smuzhiyun  * because the bus read/write functions may wait for an interrupt
628*4882a593Smuzhiyun  * to conclude the operation.
629*4882a593Smuzhiyun  */
phy_modify(struct phy_device * phydev,u32 regnum,u16 mask,u16 set)630*4882a593Smuzhiyun int phy_modify(struct phy_device *phydev, u32 regnum, u16 mask, u16 set)
631*4882a593Smuzhiyun {
632*4882a593Smuzhiyun 	int ret;
633*4882a593Smuzhiyun 
634*4882a593Smuzhiyun 	phy_lock_mdio_bus(phydev);
635*4882a593Smuzhiyun 	ret = __phy_modify(phydev, regnum, mask, set);
636*4882a593Smuzhiyun 	phy_unlock_mdio_bus(phydev);
637*4882a593Smuzhiyun 
638*4882a593Smuzhiyun 	return ret;
639*4882a593Smuzhiyun }
640*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(phy_modify);
641*4882a593Smuzhiyun 
642*4882a593Smuzhiyun /**
643*4882a593Smuzhiyun  * __phy_modify_mmd_changed - Function for modifying a register on MMD
644*4882a593Smuzhiyun  * @phydev: the phy_device struct
645*4882a593Smuzhiyun  * @devad: the MMD containing register to modify
646*4882a593Smuzhiyun  * @regnum: register number to modify
647*4882a593Smuzhiyun  * @mask: bit mask of bits to clear
648*4882a593Smuzhiyun  * @set: new value of bits set in mask to write to @regnum
649*4882a593Smuzhiyun  *
650*4882a593Smuzhiyun  * Unlocked helper function which allows a MMD register to be modified as
651*4882a593Smuzhiyun  * new register value = (old register value & ~mask) | set
652*4882a593Smuzhiyun  *
653*4882a593Smuzhiyun  * Returns negative errno, 0 if there was no change, and 1 in case of change
654*4882a593Smuzhiyun  */
__phy_modify_mmd_changed(struct phy_device * phydev,int devad,u32 regnum,u16 mask,u16 set)655*4882a593Smuzhiyun int __phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
656*4882a593Smuzhiyun 			     u16 mask, u16 set)
657*4882a593Smuzhiyun {
658*4882a593Smuzhiyun 	int new, ret;
659*4882a593Smuzhiyun 
660*4882a593Smuzhiyun 	ret = __phy_read_mmd(phydev, devad, regnum);
661*4882a593Smuzhiyun 	if (ret < 0)
662*4882a593Smuzhiyun 		return ret;
663*4882a593Smuzhiyun 
664*4882a593Smuzhiyun 	new = (ret & ~mask) | set;
665*4882a593Smuzhiyun 	if (new == ret)
666*4882a593Smuzhiyun 		return 0;
667*4882a593Smuzhiyun 
668*4882a593Smuzhiyun 	ret = __phy_write_mmd(phydev, devad, regnum, new);
669*4882a593Smuzhiyun 
670*4882a593Smuzhiyun 	return ret < 0 ? ret : 1;
671*4882a593Smuzhiyun }
672*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(__phy_modify_mmd_changed);
673*4882a593Smuzhiyun 
674*4882a593Smuzhiyun /**
675*4882a593Smuzhiyun  * phy_modify_mmd_changed - Function for modifying a register on MMD
676*4882a593Smuzhiyun  * @phydev: the phy_device struct
677*4882a593Smuzhiyun  * @devad: the MMD containing register to modify
678*4882a593Smuzhiyun  * @regnum: register number to modify
679*4882a593Smuzhiyun  * @mask: bit mask of bits to clear
680*4882a593Smuzhiyun  * @set: new value of bits set in mask to write to @regnum
681*4882a593Smuzhiyun  *
682*4882a593Smuzhiyun  * NOTE: MUST NOT be called from interrupt context,
683*4882a593Smuzhiyun  * because the bus read/write functions may wait for an interrupt
684*4882a593Smuzhiyun  * to conclude the operation.
685*4882a593Smuzhiyun  *
686*4882a593Smuzhiyun  * Returns negative errno, 0 if there was no change, and 1 in case of change
687*4882a593Smuzhiyun  */
phy_modify_mmd_changed(struct phy_device * phydev,int devad,u32 regnum,u16 mask,u16 set)688*4882a593Smuzhiyun int phy_modify_mmd_changed(struct phy_device *phydev, int devad, u32 regnum,
689*4882a593Smuzhiyun 			   u16 mask, u16 set)
690*4882a593Smuzhiyun {
691*4882a593Smuzhiyun 	int ret;
692*4882a593Smuzhiyun 
693*4882a593Smuzhiyun 	phy_lock_mdio_bus(phydev);
694*4882a593Smuzhiyun 	ret = __phy_modify_mmd_changed(phydev, devad, regnum, mask, set);
695*4882a593Smuzhiyun 	phy_unlock_mdio_bus(phydev);
696*4882a593Smuzhiyun 
697*4882a593Smuzhiyun 	return ret;
698*4882a593Smuzhiyun }
699*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(phy_modify_mmd_changed);
700*4882a593Smuzhiyun 
701*4882a593Smuzhiyun /**
702*4882a593Smuzhiyun  * __phy_modify_mmd - Convenience function for modifying a register on MMD
703*4882a593Smuzhiyun  * @phydev: the phy_device struct
704*4882a593Smuzhiyun  * @devad: the MMD containing register to modify
705*4882a593Smuzhiyun  * @regnum: register number to modify
706*4882a593Smuzhiyun  * @mask: bit mask of bits to clear
707*4882a593Smuzhiyun  * @set: new value of bits set in mask to write to @regnum
708*4882a593Smuzhiyun  *
709*4882a593Smuzhiyun  * NOTE: MUST NOT be called from interrupt context,
710*4882a593Smuzhiyun  * because the bus read/write functions may wait for an interrupt
711*4882a593Smuzhiyun  * to conclude the operation.
712*4882a593Smuzhiyun  */
__phy_modify_mmd(struct phy_device * phydev,int devad,u32 regnum,u16 mask,u16 set)713*4882a593Smuzhiyun int __phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
714*4882a593Smuzhiyun 		     u16 mask, u16 set)
715*4882a593Smuzhiyun {
716*4882a593Smuzhiyun 	int ret;
717*4882a593Smuzhiyun 
718*4882a593Smuzhiyun 	ret = __phy_modify_mmd_changed(phydev, devad, regnum, mask, set);
719*4882a593Smuzhiyun 
720*4882a593Smuzhiyun 	return ret < 0 ? ret : 0;
721*4882a593Smuzhiyun }
722*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(__phy_modify_mmd);
723*4882a593Smuzhiyun 
724*4882a593Smuzhiyun /**
725*4882a593Smuzhiyun  * phy_modify_mmd - Convenience function for modifying a register on MMD
726*4882a593Smuzhiyun  * @phydev: the phy_device struct
727*4882a593Smuzhiyun  * @devad: the MMD containing register to modify
728*4882a593Smuzhiyun  * @regnum: register number to modify
729*4882a593Smuzhiyun  * @mask: bit mask of bits to clear
730*4882a593Smuzhiyun  * @set: new value of bits set in mask to write to @regnum
731*4882a593Smuzhiyun  *
732*4882a593Smuzhiyun  * NOTE: MUST NOT be called from interrupt context,
733*4882a593Smuzhiyun  * because the bus read/write functions may wait for an interrupt
734*4882a593Smuzhiyun  * to conclude the operation.
735*4882a593Smuzhiyun  */
phy_modify_mmd(struct phy_device * phydev,int devad,u32 regnum,u16 mask,u16 set)736*4882a593Smuzhiyun int phy_modify_mmd(struct phy_device *phydev, int devad, u32 regnum,
737*4882a593Smuzhiyun 		   u16 mask, u16 set)
738*4882a593Smuzhiyun {
739*4882a593Smuzhiyun 	int ret;
740*4882a593Smuzhiyun 
741*4882a593Smuzhiyun 	phy_lock_mdio_bus(phydev);
742*4882a593Smuzhiyun 	ret = __phy_modify_mmd(phydev, devad, regnum, mask, set);
743*4882a593Smuzhiyun 	phy_unlock_mdio_bus(phydev);
744*4882a593Smuzhiyun 
745*4882a593Smuzhiyun 	return ret;
746*4882a593Smuzhiyun }
747*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(phy_modify_mmd);
748*4882a593Smuzhiyun 
__phy_read_page(struct phy_device * phydev)749*4882a593Smuzhiyun static int __phy_read_page(struct phy_device *phydev)
750*4882a593Smuzhiyun {
751*4882a593Smuzhiyun 	if (WARN_ONCE(!phydev->drv->read_page, "read_page callback not available, PHY driver not loaded?\n"))
752*4882a593Smuzhiyun 		return -EOPNOTSUPP;
753*4882a593Smuzhiyun 
754*4882a593Smuzhiyun 	return phydev->drv->read_page(phydev);
755*4882a593Smuzhiyun }
756*4882a593Smuzhiyun 
__phy_write_page(struct phy_device * phydev,int page)757*4882a593Smuzhiyun static int __phy_write_page(struct phy_device *phydev, int page)
758*4882a593Smuzhiyun {
759*4882a593Smuzhiyun 	if (WARN_ONCE(!phydev->drv->write_page, "write_page callback not available, PHY driver not loaded?\n"))
760*4882a593Smuzhiyun 		return -EOPNOTSUPP;
761*4882a593Smuzhiyun 
762*4882a593Smuzhiyun 	return phydev->drv->write_page(phydev, page);
763*4882a593Smuzhiyun }
764*4882a593Smuzhiyun 
765*4882a593Smuzhiyun /**
766*4882a593Smuzhiyun  * phy_save_page() - take the bus lock and save the current page
767*4882a593Smuzhiyun  * @phydev: a pointer to a &struct phy_device
768*4882a593Smuzhiyun  *
769*4882a593Smuzhiyun  * Take the MDIO bus lock, and return the current page number. On error,
770*4882a593Smuzhiyun  * returns a negative errno. phy_restore_page() must always be called
771*4882a593Smuzhiyun  * after this, irrespective of success or failure of this call.
772*4882a593Smuzhiyun  */
phy_save_page(struct phy_device * phydev)773*4882a593Smuzhiyun int phy_save_page(struct phy_device *phydev)
774*4882a593Smuzhiyun {
775*4882a593Smuzhiyun 	phy_lock_mdio_bus(phydev);
776*4882a593Smuzhiyun 	return __phy_read_page(phydev);
777*4882a593Smuzhiyun }
778*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(phy_save_page);
779*4882a593Smuzhiyun 
780*4882a593Smuzhiyun /**
781*4882a593Smuzhiyun  * phy_select_page() - take the bus lock, save the current page, and set a page
782*4882a593Smuzhiyun  * @phydev: a pointer to a &struct phy_device
783*4882a593Smuzhiyun  * @page: desired page
784*4882a593Smuzhiyun  *
785*4882a593Smuzhiyun  * Take the MDIO bus lock to protect against concurrent access, save the
786*4882a593Smuzhiyun  * current PHY page, and set the current page.  On error, returns a
787*4882a593Smuzhiyun  * negative errno, otherwise returns the previous page number.
788*4882a593Smuzhiyun  * phy_restore_page() must always be called after this, irrespective
789*4882a593Smuzhiyun  * of success or failure of this call.
790*4882a593Smuzhiyun  */
phy_select_page(struct phy_device * phydev,int page)791*4882a593Smuzhiyun int phy_select_page(struct phy_device *phydev, int page)
792*4882a593Smuzhiyun {
793*4882a593Smuzhiyun 	int ret, oldpage;
794*4882a593Smuzhiyun 
795*4882a593Smuzhiyun 	oldpage = ret = phy_save_page(phydev);
796*4882a593Smuzhiyun 	if (ret < 0)
797*4882a593Smuzhiyun 		return ret;
798*4882a593Smuzhiyun 
799*4882a593Smuzhiyun 	if (oldpage != page) {
800*4882a593Smuzhiyun 		ret = __phy_write_page(phydev, page);
801*4882a593Smuzhiyun 		if (ret < 0)
802*4882a593Smuzhiyun 			return ret;
803*4882a593Smuzhiyun 	}
804*4882a593Smuzhiyun 
805*4882a593Smuzhiyun 	return oldpage;
806*4882a593Smuzhiyun }
807*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(phy_select_page);
808*4882a593Smuzhiyun 
809*4882a593Smuzhiyun /**
810*4882a593Smuzhiyun  * phy_restore_page() - restore the page register and release the bus lock
811*4882a593Smuzhiyun  * @phydev: a pointer to a &struct phy_device
812*4882a593Smuzhiyun  * @oldpage: the old page, return value from phy_save_page() or phy_select_page()
813*4882a593Smuzhiyun  * @ret: operation's return code
814*4882a593Smuzhiyun  *
815*4882a593Smuzhiyun  * Release the MDIO bus lock, restoring @oldpage if it is a valid page.
816*4882a593Smuzhiyun  * This function propagates the earliest error code from the group of
817*4882a593Smuzhiyun  * operations.
818*4882a593Smuzhiyun  *
819*4882a593Smuzhiyun  * Returns:
820*4882a593Smuzhiyun  *   @oldpage if it was a negative value, otherwise
821*4882a593Smuzhiyun  *   @ret if it was a negative errno value, otherwise
822*4882a593Smuzhiyun  *   phy_write_page()'s negative value if it were in error, otherwise
823*4882a593Smuzhiyun  *   @ret.
824*4882a593Smuzhiyun  */
phy_restore_page(struct phy_device * phydev,int oldpage,int ret)825*4882a593Smuzhiyun int phy_restore_page(struct phy_device *phydev, int oldpage, int ret)
826*4882a593Smuzhiyun {
827*4882a593Smuzhiyun 	int r;
828*4882a593Smuzhiyun 
829*4882a593Smuzhiyun 	if (oldpage >= 0) {
830*4882a593Smuzhiyun 		r = __phy_write_page(phydev, oldpage);
831*4882a593Smuzhiyun 
832*4882a593Smuzhiyun 		/* Propagate the operation return code if the page write
833*4882a593Smuzhiyun 		 * was successful.
834*4882a593Smuzhiyun 		 */
835*4882a593Smuzhiyun 		if (ret >= 0 && r < 0)
836*4882a593Smuzhiyun 			ret = r;
837*4882a593Smuzhiyun 	} else {
838*4882a593Smuzhiyun 		/* Propagate the phy page selection error code */
839*4882a593Smuzhiyun 		ret = oldpage;
840*4882a593Smuzhiyun 	}
841*4882a593Smuzhiyun 
842*4882a593Smuzhiyun 	phy_unlock_mdio_bus(phydev);
843*4882a593Smuzhiyun 
844*4882a593Smuzhiyun 	return ret;
845*4882a593Smuzhiyun }
846*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(phy_restore_page);
847*4882a593Smuzhiyun 
848*4882a593Smuzhiyun /**
849*4882a593Smuzhiyun  * phy_read_paged() - Convenience function for reading a paged register
850*4882a593Smuzhiyun  * @phydev: a pointer to a &struct phy_device
851*4882a593Smuzhiyun  * @page: the page for the phy
852*4882a593Smuzhiyun  * @regnum: register number
853*4882a593Smuzhiyun  *
854*4882a593Smuzhiyun  * Same rules as for phy_read().
855*4882a593Smuzhiyun  */
phy_read_paged(struct phy_device * phydev,int page,u32 regnum)856*4882a593Smuzhiyun int phy_read_paged(struct phy_device *phydev, int page, u32 regnum)
857*4882a593Smuzhiyun {
858*4882a593Smuzhiyun 	int ret = 0, oldpage;
859*4882a593Smuzhiyun 
860*4882a593Smuzhiyun 	oldpage = phy_select_page(phydev, page);
861*4882a593Smuzhiyun 	if (oldpage >= 0)
862*4882a593Smuzhiyun 		ret = __phy_read(phydev, regnum);
863*4882a593Smuzhiyun 
864*4882a593Smuzhiyun 	return phy_restore_page(phydev, oldpage, ret);
865*4882a593Smuzhiyun }
866*4882a593Smuzhiyun EXPORT_SYMBOL(phy_read_paged);
867*4882a593Smuzhiyun 
868*4882a593Smuzhiyun /**
869*4882a593Smuzhiyun  * phy_write_paged() - Convenience function for writing a paged register
870*4882a593Smuzhiyun  * @phydev: a pointer to a &struct phy_device
871*4882a593Smuzhiyun  * @page: the page for the phy
872*4882a593Smuzhiyun  * @regnum: register number
873*4882a593Smuzhiyun  * @val: value to write
874*4882a593Smuzhiyun  *
875*4882a593Smuzhiyun  * Same rules as for phy_write().
876*4882a593Smuzhiyun  */
phy_write_paged(struct phy_device * phydev,int page,u32 regnum,u16 val)877*4882a593Smuzhiyun int phy_write_paged(struct phy_device *phydev, int page, u32 regnum, u16 val)
878*4882a593Smuzhiyun {
879*4882a593Smuzhiyun 	int ret = 0, oldpage;
880*4882a593Smuzhiyun 
881*4882a593Smuzhiyun 	oldpage = phy_select_page(phydev, page);
882*4882a593Smuzhiyun 	if (oldpage >= 0)
883*4882a593Smuzhiyun 		ret = __phy_write(phydev, regnum, val);
884*4882a593Smuzhiyun 
885*4882a593Smuzhiyun 	return phy_restore_page(phydev, oldpage, ret);
886*4882a593Smuzhiyun }
887*4882a593Smuzhiyun EXPORT_SYMBOL(phy_write_paged);
888*4882a593Smuzhiyun 
889*4882a593Smuzhiyun /**
890*4882a593Smuzhiyun  * phy_modify_paged_changed() - Function for modifying a paged register
891*4882a593Smuzhiyun  * @phydev: a pointer to a &struct phy_device
892*4882a593Smuzhiyun  * @page: the page for the phy
893*4882a593Smuzhiyun  * @regnum: register number
894*4882a593Smuzhiyun  * @mask: bit mask of bits to clear
895*4882a593Smuzhiyun  * @set: bit mask of bits to set
896*4882a593Smuzhiyun  *
897*4882a593Smuzhiyun  * Returns negative errno, 0 if there was no change, and 1 in case of change
898*4882a593Smuzhiyun  */
phy_modify_paged_changed(struct phy_device * phydev,int page,u32 regnum,u16 mask,u16 set)899*4882a593Smuzhiyun int phy_modify_paged_changed(struct phy_device *phydev, int page, u32 regnum,
900*4882a593Smuzhiyun 			     u16 mask, u16 set)
901*4882a593Smuzhiyun {
902*4882a593Smuzhiyun 	int ret = 0, oldpage;
903*4882a593Smuzhiyun 
904*4882a593Smuzhiyun 	oldpage = phy_select_page(phydev, page);
905*4882a593Smuzhiyun 	if (oldpage >= 0)
906*4882a593Smuzhiyun 		ret = __phy_modify_changed(phydev, regnum, mask, set);
907*4882a593Smuzhiyun 
908*4882a593Smuzhiyun 	return phy_restore_page(phydev, oldpage, ret);
909*4882a593Smuzhiyun }
910*4882a593Smuzhiyun EXPORT_SYMBOL(phy_modify_paged_changed);
911*4882a593Smuzhiyun 
912*4882a593Smuzhiyun /**
913*4882a593Smuzhiyun  * phy_modify_paged() - Convenience function for modifying a paged register
914*4882a593Smuzhiyun  * @phydev: a pointer to a &struct phy_device
915*4882a593Smuzhiyun  * @page: the page for the phy
916*4882a593Smuzhiyun  * @regnum: register number
917*4882a593Smuzhiyun  * @mask: bit mask of bits to clear
918*4882a593Smuzhiyun  * @set: bit mask of bits to set
919*4882a593Smuzhiyun  *
920*4882a593Smuzhiyun  * Same rules as for phy_read() and phy_write().
921*4882a593Smuzhiyun  */
phy_modify_paged(struct phy_device * phydev,int page,u32 regnum,u16 mask,u16 set)922*4882a593Smuzhiyun int phy_modify_paged(struct phy_device *phydev, int page, u32 regnum,
923*4882a593Smuzhiyun 		     u16 mask, u16 set)
924*4882a593Smuzhiyun {
925*4882a593Smuzhiyun 	int ret = phy_modify_paged_changed(phydev, page, regnum, mask, set);
926*4882a593Smuzhiyun 
927*4882a593Smuzhiyun 	return ret < 0 ? ret : 0;
928*4882a593Smuzhiyun }
929*4882a593Smuzhiyun EXPORT_SYMBOL(phy_modify_paged);
930